1 2019-05-28 Nick Alcock <nick.alcock@oracle.com>
3 * ctf-api.h (ctf_errno): New declaration.
4 (ctf_errmsg): Likewise.
6 2019-05-28 Nick Alcock <nick.alcock@oracle.com>
8 * ctf-api.h (ctf_setdebug): New.
9 (ctf_getdebug): Likewise.
11 2019-05-28 Nick Alcock <nick.alcock@oracle.com>
13 * ctf-api.h: New file.
15 2019-05-28 Nick Alcock <nick.alcock@oracle.com>
19 2019-05-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
21 * elf/aarch64.h (DT_AARCH64_VARIANT_PCS): Define.
22 (STO_AARCH64_VARIANT_PCS): Define.
24 2019-05-24 Alan Modra <amodra@gmail.com>
26 * elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
27 (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
28 (R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
29 (R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
30 (R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
31 (R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
32 (R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
33 (R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
34 (R_PPC64_D28, R_PPC64_PCREL28): Define.
36 2019-05-24 Peter Bergner <bergner@linux.ibm.com>
37 Alan Modra <amodra@gmail.com>
39 * dis-asm.h (WIDE_OUTPUT): Define.
40 * opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
41 (PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
42 (PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
44 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
46 * elf/bpf.h: New file.
48 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
50 * elf/arm.h (Tag_MVE_arch): Define new enum value.
51 * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
53 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
55 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
58 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
60 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
63 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
65 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
67 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
69 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
72 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
74 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
76 (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
78 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
80 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
82 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
84 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
86 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
88 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
90 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
92 * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
94 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
96 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
98 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
100 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
102 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
104 * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
106 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
108 * opcode/aarch64.h (AARCH64_FEATURE_SVE2
109 AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
110 AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
113 2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
114 Faraz Shahbazker <fshahbazker@wavecomp.com>
116 * opcode/mips.h (ASE_EVA_R6): New macro.
117 (M_LLWPE_AB, M_SCWPE_AB): New enum values.
119 2019-05-01 Sudakshina Das <sudi.das@arm.com>
121 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
122 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
124 2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
125 Faraz Shahbazker <fshahbazker@wavecomp.com>
127 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
128 (M_SCWP_AB, M_SCDP_AB): Likewise.
130 2019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
132 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
134 2019-04-15 Sudakshina Das <sudi.das@arm.com>
136 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
138 2019-04-15 Sudakshina Das <sudi.das@arm.com>
140 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
142 2019-04-15 Sudakshina Das <sudi.das@arm.com>
144 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
146 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
148 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
149 (MAX_TAG_CPU_ARCH): Set value to above macro.
150 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
151 (ARM_AEXT_V8_1M_MAIN): Likewise.
152 (ARM_AEXT2_V8_1M_MAIN): Likewise.
153 (ARM_ARCH_V8_1M_MAIN): Likewise.
155 2019-04-11 Sudakshina Das <sudi.das@arm.com>
157 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
159 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
161 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
163 2019-04-07 Alan Modra <amodra@gmail.com>
166 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
168 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
169 (sub_ddmmss): Likewise.
171 2019-04-06 H.J. Lu <hongjiu.lu@intel.com>
173 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
175 2019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
177 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
178 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
179 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
180 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
181 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
182 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
183 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
184 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
186 2019-03-28 Alan Modra <amodra@gmail.com>
189 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
191 2019-03-25 Tamar Christina <tamar.christina@arm.com>
193 * dis-asm.h (struct disassemble_info): Add stop_offset.
195 2019-03-13 Sudakshina Das <sudi.das@arm.com>
197 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
199 2019-03-13 Sudakshina Das <sudi.das@arm.com>
200 Szabolcs Nagy <szabolcs.nagy@arm.com>
202 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
204 2019-03-13 Sudakshina Das <sudi.das@arm.com>
206 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
207 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
208 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
210 2019-02-20 Alan Hayward <alan.hayward@arm.com>
212 * elf/common.h (NT_ARM_PAC_MASK): Add define.
214 2019-02-15 Saagar Jha <saagar@saagarjha.com>
216 * mach-o/loader.h: Use new OS names in comments.
218 2019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
220 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
221 (splay_tree_delete_value_fn): Likewise.
223 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
225 * opcode/s390.h (enum s390_opcode_cpu_val): Add
228 2019-01-25 Sudakshina Das <sudi.das@arm.com>
229 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
231 * opcode/aarch64.h (enum aarch64_opnd): Remove
232 AARCH64_OPND_ADDR_SIMPLE_2.
233 (enum aarch64_insn_class): Remove ldstgv_indexed.
235 2019-01-22 Tom Tromey <tom@tromey.com>
237 * coff/ecoff.h: Include coff/sym.h.
239 2018-06-24 Nick Clifton <nickc@redhat.com>
243 2019-01-16 Kito Cheng <kito@andestech.com>
245 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
246 (Tag_RISCV_arch): Likewise.
247 (Tag_RISCV_priv_spec): Likewise.
248 (Tag_RISCV_priv_spec_minor): Likewise.
249 (Tag_RISCV_priv_spec_revision): Likewise.
250 (Tag_RISCV_unaligned_access): Likewise.
251 (Tag_RISCV_stack_align): Likewise.
253 2019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
255 * dis-asm.h: include <string.h>
257 2019-01-10 Nick Clifton <nickc@redhat.com>
260 2018-12-22 Jason Merrill <jason@redhat.com>
262 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
263 ARM, HP, and EDG demangling styles.
265 2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
270 * libiberty.h: Mechanically replace "can not" with "cannot".
271 * plugin-api.h: Likewise.
273 2018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
275 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
276 (E_FLAG_RX_V3): New RXv3 type.
277 * opcode/rx.h (RX_Size): Add double size.
278 (RX_Operand_Type): Add double FPU registers.
279 (RX_Opcode_ID): Add new instuctions.
281 2019-01-01 Alan Modra <amodra@gmail.com>
283 Update year range in copyright notice of all files.
285 For older changes see ChangeLog-2018
287 Copyright (C) 2019 Free Software Foundation, Inc.
289 Copying and distribution of this file, with or without modification,
290 are permitted in any medium without royalty provided the copyright
291 notice and this notice are preserved.
297 version-control: never