1 2018-12-06 Alan Modra <amodra@gmail.com>
3 * opcode/ppc.h (E_OPCODE_MASK, E_LI_MASK, E_LI_INSN): Define.
5 2018-12-06 Andrew Burgess <andrew.burgess@embecosm.com>
7 * dis-asm.h (riscv_symbol_is_valid): Declare.
8 * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
9 (RISCV_FAKE_LABEL_CHAR): Define.
11 2018-12-03 Kito Cheng <kito@andestech.com>
13 * opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to
16 2018-11-27 Jim Wilson <jimw@sifive.com>
18 * opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
19 (OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
21 2018-11-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
23 * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
24 (ARM_ARCH_V6M_ONLY): Remove.
25 (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
26 ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
27 ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
28 ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
29 ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
30 ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
31 ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
32 ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
33 ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
34 ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
35 ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
36 ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
37 FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
38 FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
39 FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
40 FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
41 FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
42 FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
43 ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
44 ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
45 ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
46 ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
47 ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
48 ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
49 ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
50 ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
51 ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
52 ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
53 ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
54 ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
55 ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
56 FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
57 FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
58 FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
59 FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
60 FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
61 FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
62 FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
63 FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
64 FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
65 FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
66 FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
67 FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
68 FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
69 ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
70 ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
71 ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
72 ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
73 ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
74 ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
75 ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
76 ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
77 ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
78 ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.
80 2018-11-12 Sudakshina Das <sudi.das@arm.com>
82 * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
83 (aarch64_insn_class): Add ldstgv_indexed.
85 2018-11-12 Sudakshina Das <sudi.das@arm.com>
87 * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
88 and AARCH64_OPND_ADDR_SIMM13.
89 (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
91 2018-11-12 Sudakshina Das <sudi.das@arm.com>
93 * opcode/aarch64.h (aarch64_opnd): Add
94 AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
96 2018-11-12 Sudakshina Das <sudi.das@arm.com>
98 * opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
100 2018-11-07 Roman Bolshakov <r.bolshakov@yadro.com>
101 Saagar Jha <saagar@saagarjha.com>
103 * mach-o/external.h (mach_o_nversion_min_command_external): Rename
105 (mach_o_note_command_external): New.
106 (mach_o_build_version_command_external): New.
107 * mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
108 (BFD_MACH_O_LC_NOTE): Define.
110 2018-11-06 Romain Margheriti <lilrom13@gmail.com>
113 * mach-o/loader.h: Add BFD_MACH_O_LC_BUILD_VERSION.
115 2018-11-06 Sudakshina Das <sudi.das@arm.com>
117 * opcode/arm.h (ARM_ARCH_V8_5A): Move ARM_EXT2_PREDRES and
119 (ARM_AEXT2_V8_5A): Here.
121 2018-10-26 John Baldwin <jhb@FreeBSD.org>
123 * elf/common.h (AT_FREEBSD_HWCAP2): Define.
125 2018-10-09 Sudakshina Das <sudi.das@arm.com>
127 * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
128 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
130 2018-10-09 Sudakshina Das <sudi.das@arm.com>
132 * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
133 (AARCH64_FEATURE_ID_PFR2): New.
134 (AARCH64_ARCH_V8_5): Add both by default.
136 2018-10-09 Sudakshina Das <sudi.das@arm.com>
138 * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
139 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
140 (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
141 (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
142 define HINT #imm values.
143 (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
145 2018-10-09 Sudakshina Das <sudi.das@arm.com>
147 * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
149 2018-10-09 Sudakshina Das <sudi.das@arm.com>
151 * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
153 2018-10-09 Sudakshina Das <sudi.das@arm.com>
155 * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
156 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
157 (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
158 (aarch64_sys_regs_sr): Declare new table.
160 2018-10-09 Sudakshina Das <sudi.das@arm.com>
162 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
163 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
165 2018-10-09 Sudakshina Das <sudi.das@arm.com>
167 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
168 (AARCH64_FEATURE_FRINTTS): New.
169 (AARCH64_ARCH_V8_5): Add both by default.
171 2018-10-09 Sudakshina Das <sudi.das@arm.com>
173 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
174 (AARCH64_ARCH_V8_5): New.
176 2018-10-08 Alan Modra <amodra@gmail.com>
178 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
180 2018-10-05 Sudakshina Das <sudi.das@arm.com>
182 * opcode/arm.h (ARM_EXT2_PREDRES): New.
183 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
185 2018-10-05 Sudakshina Das <sudi.das@arm.com>
187 * opcode/arm.h (ARM_EXT2_SB): New.
188 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
190 2018-10-05 Sudakshina Das <sudi.das@arm.com>
192 * opcode/arm.h (ARM_EXT2_V8_5A): New.
193 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
195 2018-10-05 Richard Henderson <rth@twiddle.net>
197 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
198 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
199 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
200 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
201 R_OR1K_SLO13, R_OR1K_PLTA26.
203 2018-10-05 Richard Henderson <rth@twiddle.net>
205 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
206 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
207 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
209 2018-10-03 Tamar Christina <tamar.christina@arm.com>
211 * opcode/aarch64.h (aarch64_inst): Remove.
212 (enum err_type): Add ERR_VFI.
213 (aarch64_is_destructive_by_operands): New.
214 (init_insn_sequence): New.
215 (aarch64_decode_insn): Remove param name.
217 2018-10-03 Tamar Christina <tamar.christina@arm.com>
219 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
222 2018-10-03 Tamar Christina <tamar.christina@arm.com>
224 * opcode/aarch64.h (enum err_type): New.
225 (aarch64_decode_insn): Use it.
227 2018-10-03 Tamar Christina <tamar.christina@arm.com>
229 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
230 (aarch64_opcode_encode): Use it.
232 2018-10-03 Tamar Christina <tamar.christina@arm.com>
234 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
235 extend flags field size.
236 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
238 2018-10-03 John Darrington <john@darrington.wattle.id.au>
240 * dis-asm.h (print_insn_s12z): New declaration.
242 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
244 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
245 (MASK_FENCE_TSO): Likewise.
247 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
249 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
251 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
254 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
255 include zero size sections at start of PT_NOTE segment.
257 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
259 * elf/nds32.h: Remove the unused target features.
260 * dis-asm.h (disassemble_init_nds32): Declared.
261 * elf/nds32.h (E_NDS32_NULL): Removed.
262 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
263 * opcode/nds32.h: Ident.
264 (N32_SUB6, INSN_LW): New macros.
265 (enum n32_opcodes): Updated.
266 * elf/nds32.h: Doc fixes.
267 * elf/nds32.h: Add R_NDS32_LSI.
268 * elf/nds32.h: Add new relocations for TLS.
270 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
272 * elf/common.h (AT_SUN_HWCAP): Rename to ...
273 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
275 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
276 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
278 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
280 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
282 2018-08-31 Alan Modra <amodra@gmail.com>
284 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
285 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
286 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
287 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
289 2018-08-30 Kito Cheng <kito@andestech.com>
291 * opcode/riscv.h (MAX_SUBSET_NUM): New.
292 (riscv_opcode): Add xlen_requirement field and change type of
295 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
297 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
298 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
300 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
302 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
303 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
305 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
307 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
309 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
310 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
311 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
312 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
314 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
316 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
317 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
318 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
320 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
322 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
323 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
324 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
326 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
328 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
329 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
330 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
332 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
334 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
335 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
336 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
337 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
338 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
339 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
340 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
341 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
342 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
343 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
344 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
345 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
346 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
347 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
348 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
349 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
350 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
351 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
352 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
353 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
354 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
355 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
356 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
357 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
358 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
359 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
360 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
361 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
362 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
363 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
364 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
365 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
366 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
367 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
368 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
369 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
370 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
371 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
372 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
373 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
374 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
375 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
376 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
377 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
378 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
379 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
380 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
381 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
382 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
383 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
384 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
385 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
386 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
387 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
388 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
389 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
391 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
393 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
395 2018-08-21 John Darrington <john@darrington.wattle.id.au>
397 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
399 2018-08-21 Alan Modra <amodra@gmail.com>
401 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
402 Mention use of "extract" function to provide default value.
403 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
404 (ppc_optional_operand_value): Rewrite to use extract function.
406 2018-08-18 John Darrington <john@darrington.wattle.id.au>
408 * opcode/s12z.h: New file.
410 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
412 * elf/arm.h: Updated comments for e_flags definitions.
414 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
416 * elf/arc.h (Tag_ARC_ATR_version): New tag.
418 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
420 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
422 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
425 2018-07-26 Martin Liska <mliska@suse.cz>
428 * libiberty.h (make_temp_file_with_prefix): New function.
430 2018-07-30 Jim Wilson <jimw@sifive.com>
432 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
433 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
434 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
436 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
438 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
439 * elf/csky.h: New file.
441 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
442 Maciej W. Rozycki <macro@linux-mips.org>
444 * elf/mips.h (AFL_ASE_MASK): Correct typo.
446 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
448 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
450 2018-07-26 Alan Modra <amodra@gmail.com>
452 * elf/ppc64.h: Specify byte offset to local entry for values
453 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
454 value for such functions when entering via global entry point.
455 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
457 2018-07-24 Alan Modra <amodra@gmail.com>
460 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
462 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
463 Maciej W. Rozycki <macro@mips.com>
465 * elf/mips.h (AFL_ASE_MMI): New macro.
466 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
467 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
469 2018-07-17 Maciej W. Rozycki <macro@mips.com>
471 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
473 2018-07-06 Alan Modra <amodra@gmail.com>
475 * diagnostics.h: Comment on macro usage.
477 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
479 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
482 2018-07-02 Maciej W. Rozycki <macro@mips.com>
485 * dis-asm.h (disasm_option_arg_t): New typedef.
486 (disasm_options_and_args_t): Likewise.
487 (disasm_options_t): Add `arg' member, document members.
488 (disassembler_options_mips): New prototype.
489 (disassembler_options_arm, disassembler_options_powerpc)
490 (disassembler_options_s390): Update prototypes.
492 2018-06-29 Tamar Christina <tamar.christina@arm.com>
495 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
497 2018-06-26 Alan Modra <amodra@gmail.com>
499 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
501 2018-06-24 Nick Clifton <nickc@redhat.com>
505 2018-06-21 Alan Hayward <alan.hayward@arm.com>
507 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
510 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
514 2018-05-24 Tom Rix <trix@juniper.net>
516 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
518 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
520 * longlong.h [__riscv] (__umulsidi3): Define.
521 [__riscv] (umul_ppmm): Likewise.
522 [__riscv] (__muluw3): Likewise.
524 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
526 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
527 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
528 * opcode/mips.h: Document "+\" operand format.
529 (ASE_GINV): New macro.
531 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
532 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
534 * elf/mips.h (AFL_ASE_CRC): New macro.
535 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
536 * opcode/mips.h (ASE_CRC): New macro.
537 * opcode/mips.h (ASE_CRC64): Likewise.
539 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
541 * elf/xtensa.h (xtensa_read_table_entries)
542 (xtensa_compute_fill_extra_space): New declarations.
544 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
546 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
549 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
551 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
552 (DIAGNOSTIC_STRINGIFY): Likewise.
553 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
554 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
555 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
556 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
557 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
558 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
560 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
562 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
564 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
566 * splay-tree.h (splay_tree_compare_strings,
567 splay_tree_delete_pointers): Declare new utility functions.
569 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
571 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
573 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
575 * elf/riscv.h (EF_RISCV_RVE): New define.
577 2018-05-18 John Darrington <john@darrington.wattle.id.au>
579 * elf/s12z.h: New header.
581 2018-05-15 Tamar Christina <tamar.christina@arm.com>
584 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
586 2018-05-15 Tamar Christina <tamar.christina@arm.com>
589 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
590 (aarch64_print_operand): Support notes.
592 2018-05-15 Tamar Christina <tamar.christina@arm.com>
595 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
596 (aarch64_decode_insn): Accept error struct.
598 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
600 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
602 2018-05-10 John Darrington <john@darrington.wattle.id.au>
604 * elf/common.h (EM_S12Z): New macro.
606 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
608 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
609 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
610 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
611 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
613 2018-05-08 Jim Wilson <jimw@sifive.com>
615 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
616 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
617 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
619 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
621 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
622 (vle_num_opcodes): Likewise.
623 (spe2_num_opcodes): Likewise.
625 2018-05-04 Alan Modra <amodra@gmail.com>
627 * ansidecl.h: Import from gcc.
628 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
630 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
632 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
634 * dis-asm.h: Added print_nfp_disassembler_options prototype.
635 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
636 Generic System V Application Binary Interface.
637 * elf/nfp.h: New, for NFP support.
638 * opcode/nfp.h: New, for NFP support.
640 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
641 Mickaël Guêné <mickael.guene@st.com>
643 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
644 R_ARM_TLS_IE32_FDPIC.
646 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
647 Mickaël Guêné <mickael.guene@st.com>
649 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
651 (R_ARM_FUNCDESC_VALUE): Define new relocations.
653 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
654 Mickaël Guêné <mickael.guene@st.com>
656 * elf/arm.h (EF_ARM_FDPIC): New.
658 2018-04-18 Alan Modra <amodra@gmail.com>
660 * coff/mipspe.h: Delete.
662 2018-04-18 Alan Modra <amodra@gmail.com>
664 * aout/dynix3.h: Delete.
666 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
668 Microblaze Target: PIC data text relative
670 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
671 * elf/microblaze.h (Add 3 new relocations):
672 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
673 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
675 2018-04-17 Alan Modra <amodra@gmail.com>
677 * elf/i370.h: Revert removal.
678 * elf/i860.h: Likewise.
679 * elf/i960.h: Likewise.
681 2018-04-16 Alan Modra <amodra@gmail.com>
683 * coff/sparc.h: Delete.
685 2018-04-16 Alan Modra <amodra@gmail.com>
687 * aout/host.h: Remove m68k-aout and m68k-coff support.
688 * aout/hp300hpux.h: Delete.
689 * coff/apollo.h: Delete.
690 * coff/aux-coff.h: Delete.
691 * coff/m68k.h: Delete.
693 2018-04-16 Alan Modra <amodra@gmail.com>
695 * dis-asm.h: Remove sh5 and sh64 support.
697 2018-04-16 Alan Modra <amodra@gmail.com>
699 * coff/internal.h: Remove w65 support.
700 * coff/w65.h: Delete.
702 2018-04-16 Alan Modra <amodra@gmail.com>
704 * coff/we32k.h: Delete.
706 2018-04-16 Alan Modra <amodra@gmail.com>
708 * coff/internal.h: Remove m88k support.
709 * coff/m88k.h: Delete.
710 * opcode/m88k.h: Delete.
712 2018-04-16 Alan Modra <amodra@gmail.com>
714 * elf/i370.h: Delete.
715 * opcode/i370.h: Delete.
717 2018-04-16 Alan Modra <amodra@gmail.com>
719 * coff/h8500.h: Delete.
720 * coff/internal.h: Remove h8500 support.
722 2018-04-16 Alan Modra <amodra@gmail.com>
724 * coff/h8300.h: Delete.
726 2018-04-16 Alan Modra <amodra@gmail.com>
730 2018-04-16 Alan Modra <amodra@gmail.com>
732 * aout/host.h: Remove newsos3 support.
734 2018-04-16 Alan Modra <amodra@gmail.com>
736 * nlm/ChangeLog-9315: Delete.
737 * nlm/alpha-ext.h: Delete.
738 * nlm/common.h: Delete.
739 * nlm/external.h: Delete.
740 * nlm/i386-ext.h: Delete.
741 * nlm/internal.h: Delete.
742 * nlm/ppc-ext.h: Delete.
743 * nlm/sparc32-ext.h: Delete.
745 2018-04-16 Alan Modra <amodra@gmail.com>
747 * opcode/tahoe.h: Delete.
749 2018-04-11 Alan Modra <amodra@gmail.com>
751 * aout/adobe.h: Delete.
752 * aout/reloc.h: Delete.
753 * coff/i860.h: Delete.
754 * coff/i960.h: Delete.
755 * elf/i860.h: Delete.
756 * elf/i960.h: Delete.
757 * opcode/i860.h: Delete.
758 * opcode/i960.h: Delete.
759 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
760 * aout/ar.h (ARMAGB): Remove.
761 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
762 union internal_auxent): Remove i960 support.
764 2018-04-09 Alan Modra <amodra@gmail.com>
766 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
767 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
769 2018-03-28 Renlin Li <renlin.li@arm.com>
772 * elf/aarch64.h: Add relocation number for
773 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
774 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
775 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
776 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
777 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
778 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
779 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
780 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
782 2018-03-28 Nick Clifton <nickc@redhat.com>
785 * opcode/aarch64.h (enum aarch64_opnd): Add
786 AARCH64_OPND_SVE_ADDR_R.
788 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
790 * elf/common.h (DF_1_KMOD): New.
791 (DF_1_WEAKFILTER): Likewise.
792 (DF_1_NOCOMMON): Likewise.
794 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
796 * opcode/riscv.h (OP_MASK_FUNCT3): New.
797 (OP_SH_FUNCT3): Likewise.
798 (OP_MASK_FUNCT7): Likewise.
799 (OP_SH_FUNCT7): Likewise.
800 (OP_MASK_OP2): Likewise.
801 (OP_SH_OP2): Likewise.
802 (OP_MASK_CFUNCT4): Likewise.
803 (OP_SH_CFUNCT4): Likewise.
804 (OP_MASK_CFUNCT3): Likewise.
805 (OP_SH_CFUNCT3): Likewise.
806 (riscv_insn_types): Likewise.
808 2018-03-13 Nick Clifton <nickc@redhat.com>
811 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
814 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
816 * opcode/i386 (OLDGCC_COMPAT): Removed.
818 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
820 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
822 2018-02-20 Maciej W. Rozycki <macro@mips.com>
824 * opcode/mips.h: Remove `M' operand code.
826 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
828 * coff/msdos.h: New header.
829 * coff/pe.h: Move common defines to msdos.h.
830 * coff/powerpc.h: Likewise.
832 2018-01-13 Nick Clifton <nickc@redhat.com>
836 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
839 * bfdlink.h (bfd_link_info): Add separate_code.
841 2018-01-04 Jim Wilson <jimw@sifive.com>
843 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
844 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
845 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
846 Add alias to map mbadaddr to CSR_MTVAL.
848 2018-01-03 Alan Modra <amodra@gmail.com>
850 Update year range in copyright notice of all files.
852 For older changes see ChangeLog-2017
854 Copyright (C) 2018 Free Software Foundation, Inc.
856 Copying and distribution of this file, with or without modification,
857 are permitted in any medium without royalty provided the copyright
858 notice and this notice are preserved.
864 version-control: never