include/ChangeLog

   1 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
   2
   3         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
   4         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
   5         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
   6
   7 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
   8
   9         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
  10         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
  11         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
  12
  13 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  14
  15         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
  16         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
  17         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
  18         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
  19         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
  20         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
  21         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
  22         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
  23         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
  24         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
  25         (aarch64_sve_dupm_mov_immediate_p): Declare.
  26
  27 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  28
  29         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
  30         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
  31         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
  32         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
  33         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
  34
  35 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  36
  37         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
  38         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
  39         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
  40         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
  41         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
  42         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
  43         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
  44         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
  45         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
  46         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
  47         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
  48         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
  49         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
  50         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
  51         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
  52         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
  53         Likewise.
  54
  55 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  56
  57         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
  58         aarch64_opnd.
  59         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
  60         (aarch64_opnd_info): Make shifter.amount an int64_t and
  61         rearrange the fields.
  62
  63 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  64
  65         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
  66         (AARCH64_OPND_SVE_PRFOP): Likewise.
  67         (aarch64_sve_pattern_array): Declare.
  68         (aarch64_sve_prfop_array): Likewise.
  69
  70 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  71
  72         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
  73         (AARCH64_OPND_QLF_P_M): Likewise.
  74
  75 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  76
  77         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
  78         aarch64_operand_class.
  79         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
  80         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
  81         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
  82         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
  83         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
  84         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
  85         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
  86         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
  87
  88 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  89
  90         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
  91         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
  92
  93 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  94
  95         * opcode/aarch64.h (F_STRICT): New flag.
  96
  97 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
  98
  99         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 100
 101 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 102         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 103         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 104         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 105         relocation.
 106
 107 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 108
 109         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 110         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 111
 112 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 113
 114         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 115
 116 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 117
 118         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 119
 120 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 121
 122         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 123         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 124         ARC_NUM_ADDRTYPES.
 125         * opcode/arc.h: Add BMU to insn_class_t enum.
 126         * opcode/arc.h: Add PMU to insn_class_t enum.
 127
 128 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 129
 130         * dis-asm.h: Declare print_arc_disassembler_options.
 131
 132 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 133
 134         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 135         out_implib_bfd fields.
 136
 137 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 138
 139         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 140
 141 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 142
 143         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 144         (SHF_ARM_PURECODE): ... this.
 145
 146 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 147
 148         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 149         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 150         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 151         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 152
 153 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 154
 155         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 156         of enabled FPU features.
 157
 158 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 159
 160         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 161         SPARC_OPCODE_ARCH_MAX into the enum.
 162
 163 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 164
 165         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 166
 167 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 168
 169         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 170
 171 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 172
 173         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 174
 175 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 176
 177         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 178         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 179         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 180         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 181
 182 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 183
 184         * opcode/arc.h: Make insn_class_t alphabetical again.
 185
 186 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 187
 188         * elf/dlx.h: Wrap in extern C.
 189         * elf/xtensa.h: Likewise.
 190         * opcode/arc.h: Likewise.
 191
 192 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 193
 194         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 195         tilegx_pipeline.
 196
 197 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 198
 199         * opcode/arc.h: Add nps400 extension and instruction
 200         subclass.
 201         Remove ARC_OPCODE_NPS400
 202         * elf/arc.h: Remove E_ARC_MACH_NPS400
 203
 204 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 205
 206         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 207         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 208         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 209         SPARC_OPCODE_ARCH_V9M.
 210
 211 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 212
 213         * opcode/msp430-decode.h (MSP430_Size): Remove.
 214         (Msp430_Opcode_Decoded): Change type of size to int.
 215
 216 2016-06-11  Alan Modra  <amodra@gmail.com>
 217
 218         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 219
 220 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 221
 222         * opcode/sparc.h: Add missing documentation for hyperprivileged
 223         registers in rd (%) and rs1 ($).
 224
 225 2016-06-07  Alan Modra  <amodra@gmail.com>
 226
 227         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 228         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 229         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 230         PPC_APUINFO_VLE: Define.
 231
 232 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 233
 234         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 235         entries.
 236         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 237
 238 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 239
 240         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 241         (struct arc_long_opcode): New structure.
 242         (arc_long_opcodes): Declare.
 243         (arc_num_long_opcodes): Declare.
 244
 245 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 246
 247         * elf/mips.h: Add extern "C".
 248         * elf/sh.h: Likewise.
 249         * opcode/d10v.h: Likewise.
 250         * opcode/d30v.h: Likewise.
 251         * opcode/ia64.h: Likewise.
 252         * opcode/mips.h: Likewise.
 253         * opcode/ppc.h: Likewise.
 254         * opcode/sparc.h: Likewise.
 255         * opcode/tic6x.h: Likewise.
 256         * opcode/v850.h: Likewise.
 257
 258 2016-05-28  Alan Modra  <amodra@gmail.com>
 259
 260         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 261         Return void from multiple_definition, multiple_common,
 262         add_to_set, constructor, warning, undefined_symbol,
 263         reloc_overflow, reloc_dangerous and unattached_reloc.
 264
 265 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 266
 267         * opcode/metag.h: wrap declarations in extern "C".
 268
 269 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 270
 271         * opcode/arc.h (insn_subclass_t): Add COND.
 272         (flag_class_t): Add F_CLASS_EXTEND.
 273
 274 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 275
 276         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 277         insn_class.
 278         (struct arc_flag_class): Renamed attribute class to flag_class.
 279
 280 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 281
 282         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 283         plain symbol.
 284
 285 2016-04-29  Tom Tromey  <tom@tromey.com>
 286
 287         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 288         DW_LANG_Rust_old>: New constants.
 289
 290 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 291
 292         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 293         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 294         * opcode/mips.h (ASE_DSPR3): New macro.
 295
 296 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 297             Nick Clifton  <nickc@redhat.com>
 298
 299         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 300         enumerator.
 301         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 302         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 303         (ARM_SYM_BRANCH_TYPE): Replace by ...
 304         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 305         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 306         BFD_ASSERT is defined or not.
 307
 308 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 309
 310         * elf/arm.h (Tag_DSP_extension): Define.
 311
 312 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 313
 314         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 315
 316 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 317
 318         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 319         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 320         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 321         for the high core bits.
 322
 323 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 324
 325         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 326         (ARC_SYNTAX_NOP): Likewsie.
 327         (ARC_OP1_MUST_BE_IMM): Update defined value.
 328         (ARC_OP1_IMM_IMPLIED): Likewise.
 329         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 330
 331 2016-04-28  Nick Clifton  <nickc@redhat.com>
 332
 333         PR target/19722
 334         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 335
 336 2016-04-27  Alan Modra  <amodra@gmail.com>
 337
 338         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 339         undef.  Formatting.
 340
 341 2016-04-21  Nick Clifton  <nickc@redhat.com>
 342
 343         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 344
 345 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 346
 347         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 348
 349 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 350
 351         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 352
 353 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 354
 355         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 356
 357 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 358
 359         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 360
 361 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 362
 363         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 364         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 365
 366 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 367
 368         * opcode/arc.h (flag_class_t): Update.
 369         (ARC_OPCODE_NONE): Define.
 370         (ARC_OPCODE_ARCALL): Likewise.
 371         (ARC_OPCODE_ARCFPX): Likewise.
 372         (ARC_REGISTER_READONLY): Likewise.
 373         (ARC_REGISTER_WRITEONLY): Likewise.
 374         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 375         (arc_aux_reg): Add cpu.
 376
 377 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 378
 379         * opcode/arc.h (arc_num_opcodes): Remove.
 380         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 381         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 382         (ARC_SUFFIX_FLAG): Define.
 383         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 384         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 385         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 386         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 387         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 388         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 389         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 390         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 391         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 392         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 393
 394 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 395
 396         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 397         (ARC_FPUDA): Define.
 398         (arc_aux_reg): Add new field.
 399
 400 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 401
 402         * opcode/arc-func.h (replace_bits24): Changed.
 403         (replace_bits24_be): Created.
 404
 405 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 406
 407         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 408         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 409         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 410         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 411         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 412         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 413         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 414         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 415         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 416         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 417         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 418         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 419         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 420         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 421
 422 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 423
 424         * opcode/i960.h: Add const qualifiers.
 425         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 426
 427 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 428
 429         * opcodes/arc.h (insn_class_t): Add BITOP type.
 430
 431 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 432
 433         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 434         new classes instead.
 435
 436 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 437
 438         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 439         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 440
 441 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 442
 443         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 444
 445 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 446
 447         * elf/arc.h (EF_ARC_MACH): Delete.
 448         (EF_ARC_MACH_MSK): Remove out of date comment.
 449
 450 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 451
 452         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 453
 454 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 455
 456         PR ld/19807
 457         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 458
 459 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 460             Andrew Burgess  <andrew.burgess@embecosm.com>
 461
 462         * elf/arc-reloc.def: Add a call to ME within the formula for each
 463         relocation that requires middle-endian correction.
 464
 465 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 466
 467         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 468         * opcode/h8300.h (struct h8_opcode): Likewise.
 469         * opcode/hppa.h (struct pa_opcode): Likewise.
 470         * opcode/msp430.h: Likewise.
 471         * opcode/spu.h (struct spu_opcode): Likewise.
 472         * opcode/tic30.h (struct _register): Likewise.
 473         * opcode/tic4x.h (struct tic4x_register): Likewise.
 474         (struct tic4x_cond): Likewise.
 475         (struct tic4x_indirect): Likewise.
 476         (struct tic4x_inst): Likewise.
 477         * opcode/visium.h (struct reg_entry): Likewise.
 478
 479 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 480
 481         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 482         (ARM_CPU_HAS_FEATURE): Add comment.
 483
 484 2016-03-03  Than McIntosh <thanm@google.com>
 485
 486         * plugin-api.h: Add new hooks to the plugin transfer vector to
 487         to support querying section alignment and section size.
 488         (ld_plugin_get_input_section_alignment): New hook.
 489         (ld_plugin_get_input_section_size): New hook.
 490         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 491         and LDPT_GET_INPUT_SECTION_SIZE.
 492         (ld_plugin_tv): Add tv_get_input_section_alignment and
 493         tv_get_input_section_size.
 494
 495 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 496
 497         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 498
 499 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 500
 501         PR ld/19645
 502         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 503         (bfd_link_info): Add elf_stt_common.
 504
 505 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 506
 507         PR ld/19636
 508         PR ld/19704
 509         PR ld/19719
 510         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 511
 512 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 513             Jiong Wang  <jiong.wang@arm.com>
 514
 515         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 516
 517 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 518             Janek van Oirschot  <jvanoirs@synopsys.com>
 519
 520         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 521         (arc_num_relax_opcodes): Declare.
 522
 523 2016-02-09  Nick Clifton  <nickc@redhat.com>
 524
 525         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 526         * opcode/nds32.h (nds32_r45map): Likewise.
 527         (nds32_r54map): Likewise.
 528         * opcode/visium.h (gen_reg_table): Likewise.
 529         (fp_reg_table, cc_table, opcode_table): Likewise.
 530
 531 2016-02-09  Alan Modra  <amodra@gmail.com>
 532
 533         PR 16583
 534         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 535
 536 2016-02-04  Nick Clifton  <nickc@redhat.com>
 537
 538         PR target/19561
 539         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 540         (RRUX): Synthesise using case 2 rather than 7.
 541
 542 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 543
 544         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 545         (NT_FREEBSD_PROCSTAT_PROC): Define.
 546         (NT_FREEBSD_PROCSTAT_FILES): Define.
 547         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 548         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 549         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 550         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 551         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 552         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 553         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 554
 555 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 556             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 557
 558         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 559         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 560         (ARC_TLS_LE_32): Fixed formula.
 561         (ARC_TLS_GD_LD): Use new special function.
 562         * opcode/arc-func.h: Changed all the replacement
 563         functions to clear the patching bits before doing an or it with the value
 564         argument.
 565
 566 2016-01-18  Nick Clifton  <nickc@redhat.com>
 567
 568         PR ld/19440
 569         * coff/internal.h (internal_syment): Use int to hold section
 570         number.
 571         (N_UNDEF): Cast to int not short.
 572         (N_ABS): Likewise.
 573         (N_DEBUG): Likewise.
 574         (N_TV): Likewise.
 575         (P_TV): Likewise.
 576
 577 2016-01-11  Nick Clifton  <nickc@redhat.com>
 578
 579         Import this change from GCC mainline:
 580
 581         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 582
 583         * longlong.h: Change !__SHMEDIA__ to
 584         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 585         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 586
 587 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 588
 589         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 590
 591 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 592
 593         * libiberty.h (dupargv): Change arg to char * const *.
 594         (writeargv, countargv): Likewise.
 595
 596 2016-01-01  Alan Modra  <amodra@gmail.com>
 597
 598         Update year range in copyright notice of all files.
 599
 600 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 601 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 602 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 603 som/ChangeLog-1015, and vms/ChangeLog-1015
 604 \f
 605 Copyright (C) 2016 Free Software Foundation, Inc.
 606
 607 Copying and distribution of this file, with or without modification,
 608 are permitted in any medium without royalty provided the copyright
 609 notice and this notice are preserved.
 610
 611 Local Variables:
 612 mode: change-log
 613 left-margin: 8
 614 fill-column: 74
 615 version-control: never
 616 End: