i965_drv_video/shaders/vme/vme_header.inc

   1 /*
   2  * Copyright © <2010>, Intel Corporation.
   3  *
   4  * This program is licensed under the terms and conditions of the
   5  * Eclipse Public License (EPL), version 1.0.  The full text of the EPL is at
   6  * http://www.opensource.org/licenses/eclipse-1.0.php.
   7  *
   8  */
   9 // Modual name: ME_header.inc
  10 //
  11 // Global symbols define
  12 //
  13
  14 /*
  15  * Constant
  16  */
  17 define(`VME_MESSAGE_TYPE_INTER',        `1')
  18 define(`VME_MESSAGE_TYPE_INTRA',        `2')
  19 define(`VME_MESSAGE_TYPE_MIXED',        `3')
  20
  21 define(`BLOCK_32X1',                    `0x0000001F')
  22 define(`BLOCK_4X16',                    `0x000F0003')
  23
  24 define(`LUMA_INTRA_16x16_DISABLE',      `0x1')
  25 define(`LUMA_INTRA_8x8_DISABLE',        `0x2')
  26 define(`LUMA_INTRA_4x4_DISABLE',        `0x4')
  27
  28 define(`INTRA_PRED_AVAIL_FLAG_AE',      `0x60')
  29 define(`INTRA_PRED_AVAIL_FLAG_B',       `0x10')
  30 define(`INTRA_PRED_AVAIL_FLAG_C',       `0x8')
  31 define(`INTRA_PRED_AVAIL_FLAG_D',       `0x4')
  32
  33 define(`BIND_IDX_VME',                  `0')
  34 define(`BIND_IDX_VME_REF0',             `1')
  35 define(`BIND_IDX_VME_REF1',             `2')
  36 define(`BIND_IDX_OUTPUT',               `3')
  37 define(`BIND_IDX_INEP',                 `4')
  38
  39 define(`SUB_PEL_MODE_INTEGER',          `0x00000000')
  40 define(`SUB_PEL_MODE_HALF',             `0x00001000')
  41 define(`SUB_PEL_MODE_QUARTER',          `0x00003000')
  42
  43 define(`INTER_SAD_NONE',                `0x00000000')
  44 define(`INTER_SAD_HAAR',                `0x00200000')
  45
  46 define(`INTRA_SAD_NONE',                `0x00000000')
  47 define(`INTRA_SAD_HAAR',                `0x00800000')
  48
  49 define(`INTER_PART_MASK',                               `0x7E000000')
  50
  51 define(`REF_REGION_SIZE',               `0x2020:UW')
  52
  53 define(`BI_SUB_MB_PART_MASK',           `0x0c000000')
  54 define(`MAX_NUM_MV',                    `0x00000020')
  55 define(`SEARCH_PATH_LEN',                               `0x00003F3F')
  56
  57 define(`INTRA_PREDICTORE_MODE',         `0x11111111:UD')
  58
  59 /* GRF registers
  60  * r0 header
  61  * r1~r4 constant buffer (reserved)
  62  * r5 inline data
  63  * r6~r11 reserved
  64  * r12 write back of VME message
  65  * r13 write back of Oword Block Write
  66  */
  67 /*
  68  * GRF 0 -- header
  69  */
  70 define(`thread_id_ub',          `r0.20<0,1,0>:UB')  /* thread id in payload */
  71
  72 /*
  73  * GRF 1~4 -- Constant Buffer (reserved)
  74  */
  75
  76 /*
  77  * GRF 5 -- inline data
  78  */
  79 define(`inline_reg0',           `r5')
  80 define(`w_in_mb_uw',            `inline_reg0.2')
  81 define(`orig_xy_ub',            `inline_reg0.0')
  82 define(`orig_x_ub',             `inline_reg0.0')    /* in macroblock */
  83 define(`orig_y_ub',             `inline_reg0.1')
  84
  85 /*
  86  * GRF 6~11 -- reserved
  87  */
  88
  89 /*
  90  * GRF 12~15 -- write back for VME message
  91  */
  92 define(`vme_wb',                `r12')
  93 define(`vme_wb0',               `r12')
  94 define(`vme_wb1',               `r13')
  95 define(`vme_wb2',               `r14')
  96 define(`vme_wb3',               `r15')
  97
  98 /*
  99  * GRF 16 -- write back for Oword Block Write message with write commit bit
 100  */
 101 define(`obw_wb',                `r16')
 102
 103 /*
 104  * GRF 18~21 -- Intra Neighbor Edge Pixels
 105  */
 106 define(`INEP_ROW',              `r18')
 107 define(`INEP_COL0',             `r20')
 108 define(`INEP_COL1',             `r21')
 109
 110 /*
 111  * temporary registers
 112  */
 113 define(`tmp_reg0',              `r32')
 114 define(`tmp_reg1',              `r33')
 115 define(`intra_part_mask_ub',    `tmp_reg1.28')
 116 define(`mb_intra_struct_ub',    `tmp_reg1.29')
 117 define(`tmp_reg2',              `r34')
 118 define(`tmp_x_w',               `tmp_reg2.0')
 119 define(`tmp_reg3',              `r35')
 120
 121 /*
 122  * MRF registers
 123  */
 124 define(`msg_reg0',              `m0')               /* m0 */
 125 define(`msg_reg1',              `m1')               /* m1 */
 126 define(`msg_reg2',              `m2')               /* m2 */
 127 define(`msg_reg3',              `m3')               /* m3 */
 128
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