2 * Copyright © <2010>, Intel Corporation.
4 * This program is licensed under the terms and conditions of the
5 * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
6 * http://www.opensource.org/licenses/eclipse-1.0.php.
9 // Modual name: IntraFrame.asm
11 // Make intra predition estimation for Intra frame
15 // Now, begin source code....
18 include(`vme_header.inc')
24 mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1};
25 mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1};
31 mul (2) tmp_reg0.8<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* Source = (x, y) * 16 */
32 mul (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1};
33 add (2) tmp_reg0.0<1>:W tmp_reg0.0<2,2,1>:W -8:W {align1}; /* Reference = (x-8,y-8)-(x+24,y+24) */
34 mov (1) tmp_reg0.12<1>:UD INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER:UD {align1}; /* 16x16 Source, 1/4 pixel, harr */
36 mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
37 mov (1) tmp_reg0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 32x32 */
38 mov (8) msg_reg0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1};
41 mov (1) tmp_reg1.4<1>:UD MAX_NUM_MV:UD {align1}; /* Default value MAX 32 MVs */
42 mov (1) tmp_reg1.8<1>:UD SEARCH_PATH_LEN:UD {align1};
44 mov (8) msg_reg1<1>:UD tmp_reg1.0<8,8,1>:UD {align1};
47 mov (8) msg_reg2<1>:UD 0x0:UD {align1};
50 mov (8) msg_reg3<1>:UD 0x0:UD {align1};
52 send (8) 0 vme_wb null vme(BIND_IDX_VME,0,0,VME_MESSAGE_TYPE_INTER) mlen 4 rlen 4 {align1};
55 * Oword Block Write message
57 mul (1) tmp_reg3.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1};
58 add (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1};
59 mul (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD 0x4:UD {align1};
60 mov (1) tmp_reg3.20<1>:UB thread_id_ub {align1}; /* dispatch id */
61 mov (8) msg_reg0.0<1>:UD tmp_reg3.0<8,8,1>:UD {align1};
63 mov (2) tmp_reg3.0<1>:UW vme_wb1.0<2,2,1>:UB {align1};
64 add (2) tmp_reg3.0<1>:W tmp_reg3.0<16,16,1>:W -32:W {align1};
66 mov (8) msg_reg1.0<1>:UD tmp_reg3.0<8,8,0>:UD {align1};
68 mov (8) msg_reg2.0<1>:UD tmp_reg3.0<8,8,0>:UD {align1};
70 /* bind index 3, write 4 oword, msg type: 8(OWord Block Write) */
71 send (16) 0 obw_wb null write(BIND_IDX_OUTPUT, 3, 8, 1) mlen 3 rlen 1 {align1};
76 mov (8) msg_reg0<1>:UD r0<8,8,1>:UD {align1};
77 send (16) 0 acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};