2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
29 #ifndef __I965_POST_PROCESSING_H__
30 #define __I965_POST_PROCESSING_H__
32 #define MAX_PP_SURFACES 32
34 #define I965_PP_FLAG_DEINTERLACING 1
35 #define I965_PP_FLAG_AVS 2
46 #define NUM_PP_MODULES 5
48 struct pp_load_save_context
54 struct pp_scaling_context
68 struct pp_dndi_context
77 struct i965_kernel kernel;
80 void (*initialize)(VADriverContextP ctx, VASurfaceID surface, int input,
81 unsigned short srcw, unsigned short srch,
82 unsigned short destw, unsigned short desth);
85 struct pp_static_parameter
89 float procamp_constant_c0;
91 /* Load and Same r1.1 */
92 unsigned int source_packed_y_offset:8;
93 unsigned int source_packed_u_offset:8;
94 unsigned int source_packed_v_offset:8;
98 /* Load and Save r1.2 */
100 unsigned int destination_packed_y_offset:8;
101 unsigned int destination_packed_u_offset:8;
102 unsigned int destination_packed_v_offset:8;
108 unsigned int destination_rgb_format:8;
109 unsigned int pad0:24;
114 float procamp_constant_c1;
117 float procamp_constant_c2;
120 unsigned int statistics_surface_picth:16; /* Devided by 2 */
121 unsigned int pad1:16;
126 unsigned int pad0:24;
127 unsigned int top_field_first:8;
130 /* AVS/Scaling r1.6 */
131 float normalized_video_y_scaling_step;
135 float procamp_constant_c5;
140 float procamp_constant_c3;
146 float wg_csc_constant_c4;
149 float wg_csc_constant_c8;
152 float procamp_constant_c4;
161 float wg_csc_constant_c9;
166 float wg_csc_constant_c0;
169 float scaling_step_ratio;
172 float normalized_alpha_y_scaling;
175 float wg_csc_constant_c4;
178 float wg_csc_constant_c1;
181 int horizontal_origin_offset:16;
182 int vertical_origin_offset:16;
187 unsigned int color_pixel;
190 float wg_csc_constant_c2;
194 float wg_csc_constant_c3;
199 float wg_csc_constant_c6;
201 /* ALL r4.1 MBZ ???*/
208 unsigned int pad1:15;
210 unsigned int pad2:16;
215 unsigned int motion_history_coefficient_m2:8;
216 unsigned int motion_history_coefficient_m1:8;
217 unsigned int pad0:16;
222 float wg_csc_constant_c7;
225 float wg_csc_constant_c10;
228 float source_video_frame_normalized_horizontal_origin;
234 float wg_csc_constant_c11;
238 struct pp_inline_parameter
242 int destination_block_horizontal_origin:16;
243 int destination_block_vertical_origin:16;
248 float source_surface_block_normalized_horizontal_origin;
252 unsigned int variance_surface_vertical_origin:16;
253 unsigned int pad0:16;
257 /* AVS/Scaling r5.2 */
258 float source_surface_block_normalized_vertical_origin;
261 float alpha_surface_block_normalized_horizontal_origin;
264 float alpha_surface_block_normalized_vertical_origin;
267 unsigned int alpha_mask_x:16;
268 unsigned int alpha_mask_y:8;
269 unsigned int block_count_x:8;
272 unsigned int block_horizontal_mask:16;
273 unsigned int block_vertical_mask:8;
274 unsigned int number_blocks:8;
276 /* AVS/Scaling r5.7 */
277 float normalized_video_x_scaling_step;
282 float video_step_delta;
285 unsigned int padx[7];
289 struct i965_post_processing_context
292 struct pp_module pp_modules[NUM_PP_MODULES];
293 struct pp_static_parameter pp_static_parameter;
294 struct pp_inline_parameter pp_inline_parameter;
303 } surfaces[MAX_PP_SURFACES];
311 int num_interface_descriptors;
322 } sampler_state_table;
327 unsigned int vfe_start;
328 unsigned int cs_start;
330 unsigned int num_vfe_entries;
331 unsigned int num_cs_entries;
333 unsigned int size_vfe_entry;
334 unsigned int size_cs_entry;
342 struct pp_load_save_context pp_load_save_context;
343 struct pp_scaling_context pp_scaling_context;
344 struct pp_avs_context pp_avs_context;
345 struct pp_dndi_context pp_dndi_context;
348 int (*pp_x_steps)(void *private_context);
349 int (*pp_y_steps)(void *private_context);
350 int (*pp_set_block_parameter)(struct i965_post_processing_context *pp_context, int x, int y);
354 i965_post_processing(
355 VADriverContextP ctx,
357 const VARectangle *src_rect,
358 const VARectangle *dst_rect,
363 i965_post_processing_terminate(VADriverContextP ctx);
365 i965_post_processing_init(VADriverContextP ctx);
367 #endif /* __I965_POST_PROCESSING_H__ */