i965_drv_video/i965_drv_video.h

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Xiang Haihao <haihao.xiang@intel.com>
  26  *    Zou Nan hai <nanhai.zou@intel.com>
  27  *
  28  */
  29
  30 #ifndef _I965_DRV_VIDEO_H_
  31 #define _I965_DRV_VIDEO_H_
  32
  33 #include <va/va.h>
  34 #include <va/va_backend.h>
  35
  36 #include "object_heap.h"
  37
  38 #include "intel_driver.h"
  39
  40 #include "i965_render.h"
  41
  42 #define I965_MAX_PROFILES                       11
  43 #define I965_MAX_ENTRYPOINTS                    5
  44 #define I965_MAX_CONFIG_ATTRIBUTES              10
  45 #define I965_MAX_IMAGE_FORMATS                  3
  46 #define I965_MAX_SUBPIC_FORMATS                 4
  47 #define I965_MAX_DISPLAY_ATTRIBUTES             4
  48 #define I965_STR_VENDOR                         "i965 Driver 0.1"
  49
  50 struct media_kernel
  51 {
  52     char *name;
  53     int interface;
  54     unsigned int (*bin)[4];
  55     int size;
  56     dri_bo *bo;
  57 };
  58
  59 struct buffer_store
  60 {
  61     unsigned char *buffer;
  62     dri_bo *bo;
  63     int ref_count;
  64     int num_elements;
  65 };
  66
  67 struct object_config
  68 {
  69     struct object_base base;
  70     VAProfile profile;
  71     VAEntrypoint entrypoint;
  72     VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
  73     int num_attribs;
  74 };
  75
  76 #define NUM_SLICES     10
  77
  78 struct decode_state
  79 {
  80     struct buffer_store *pic_param;
  81     struct buffer_store **slice_params;
  82     struct buffer_store *iq_matrix;
  83     struct buffer_store *bit_plane;
  84     struct buffer_store **slice_datas;
  85     VASurfaceID current_render_target;
  86     int max_slice_params;
  87     int max_slice_datas;
  88     int num_slice_params;
  89     int num_slice_datas;
  90 };
  91
  92 struct encode_state
  93 {
  94     struct buffer_store *seq_param;
  95     struct buffer_store *pic_param;
  96     struct buffer_store *pic_control;
  97     struct buffer_store *iq_matrix;
  98     struct buffer_store *q_matrix;
  99     struct buffer_store **slice_params;
 100     VASurfaceID current_render_target;
 101     int max_slice_params;
 102     int num_slice_params;
 103 };
 104
 105 #define CODEC_DEC       0
 106 #define CODEC_ENC       1
 107
 108 union codec_state
 109 {
 110     struct decode_state dec;
 111     struct encode_state enc;
 112 };
 113
 114 struct hw_context
 115 {
 116     void (*run)(VADriverContextP ctx,
 117                 VAProfile profile,
 118                 union codec_state *codec_state,
 119                 struct hw_context *hw_context);
 120     void (*destroy)(void *);
 121 };
 122
 123 struct object_context
 124 {
 125     struct object_base base;
 126     VAContextID context_id;
 127     VAConfigID config_id;
 128     VASurfaceID *render_targets;                //input->encode, output->decode
 129     int num_render_targets;
 130     int picture_width;
 131     int picture_height;
 132     int flags;
 133     int codec_type;
 134     union codec_state codec_state;
 135     struct hw_context *hw_context;
 136 };
 137
 138 #define SURFACE_REFERENCED      (1 << 0)
 139 #define SURFACE_DISPLAYED       (1 << 1)
 140 #define SURFACE_DERIVED         (1 << 2)
 141 #define SURFACE_REF_DIS_MASK    ((SURFACE_REFERENCED) | \
 142                                  (SURFACE_DISPLAYED))
 143 #define SURFACE_ALL_MASK        ((SURFACE_REFERENCED) | \
 144                                  (SURFACE_DISPLAYED) |  \
 145                                  (SURFACE_DERIVED))
 146
 147 struct object_surface
 148 {
 149     struct object_base base;
 150     VASurfaceStatus status;
 151     VASubpictureID subpic;
 152     int width;
 153     int height;
 154     int size;
 155     int orig_width;
 156     int orig_height;
 157     int flags;
 158     dri_bo *bo;
 159     int pp_out_width;
 160     int pp_out_height;
 161     int orig_pp_out_width;
 162     int orig_pp_out_height;
 163     dri_bo *pp_out_bo;
 164     VAImageID locked_image_id;
 165     void (*free_private_data)(void **data);
 166     void *private_data;
 167 };
 168
 169 struct object_buffer
 170 {
 171     struct object_base base;
 172     struct buffer_store *buffer_store;
 173     int max_num_elements;
 174     int num_elements;
 175     int size_element;
 176     VABufferType type;
 177 };
 178
 179 struct object_image
 180 {
 181     struct object_base base;
 182     VAImage image;
 183     dri_bo *bo;
 184     unsigned int *palette;
 185     VASurfaceID derived_surface;
 186 };
 187
 188 struct object_subpic
 189 {
 190     struct object_base base;
 191     VAImageID image;
 192     VARectangle src_rect;
 193     VARectangle dst_rect;
 194     unsigned int format;
 195     int width;
 196     int height;
 197     int pitch;
 198     dri_bo *bo;
 199 };
 200
 201 struct hw_codec_info
 202 {
 203     struct hw_context *(*dec_hw_context_init)(VADriverContextP, VAProfile);
 204     struct hw_context *(*enc_hw_context_init)(VADriverContextP, VAProfile);
 205 };
 206
 207 struct i965_driver_data
 208 {
 209     struct intel_driver_data intel;
 210     struct object_heap config_heap;
 211     struct object_heap context_heap;
 212     struct object_heap surface_heap;
 213     struct object_heap buffer_heap;
 214     struct object_heap image_heap;
 215     struct object_heap subpic_heap;
 216     struct i965_render_state render_state;
 217     struct hw_codec_info *codec_info;
 218     void *pp_context;
 219 };
 220
 221 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
 222 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
 223 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
 224 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
 225 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
 226 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
 227
 228 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
 229 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
 230 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
 231 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
 232 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
 233 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
 234
 235 #define FOURCC_IA44 0x34344149
 236 #define FOURCC_AI44 0x34344941
 237
 238 #define STRIDE(w)               (((w) + 0xf) & ~0xf)
 239 #define SIZE_YUV420(w, h)       (h * (STRIDE(w) + STRIDE(w >> 1)))
 240
 241 static INLINE struct i965_driver_data *
 242 i965_driver_data(VADriverContextP ctx)
 243 {
 244     return (struct i965_driver_data *)(ctx->pDriverData);
 245 }
 246
 247 #endif /* _I965_DRV_VIDEO_H_ */