1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
23 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
25 * modified by John Hassey (hassey@dg-rtp.dg.com)
26 * x86-64 support added by Jan Hubicka (jh@suse.cz)
30 * The main tables describing the instructions is essentially a copy
31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
32 * Programmers Manual. Usually, there is a capital letter, followed
33 * by a small letter. The capital letter tell the addressing mode,
34 * and the small letter tells about the operand size. Refer to
35 * the Intel manual for details.
40 #include "qemu-common.h"
46 #ifndef UNIXWARE_COMPAT
47 /* Set non-zero for broken, compatible instructions. Set to zero for
48 non-broken opcodes. */
49 #define UNIXWARE_COMPAT 1
52 static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
53 static void ckprefix PARAMS ((void));
54 static const char *prefix_name PARAMS ((int, int));
55 static int print_insn PARAMS ((bfd_vma, disassemble_info *));
56 static void dofloat PARAMS ((int));
57 static void OP_ST PARAMS ((int, int));
58 static void OP_STi PARAMS ((int, int));
59 static int putop PARAMS ((const char *, int));
60 static void oappend PARAMS ((const char *));
61 static void append_seg PARAMS ((void));
62 static void OP_indirE PARAMS ((int, int));
63 static void print_operand_value (char *buf, size_t bufsize, int hex,
65 static void OP_E PARAMS ((int, int));
66 static void OP_G PARAMS ((int, int));
67 static bfd_vma get64 PARAMS ((void));
68 static bfd_signed_vma get32 PARAMS ((void));
69 static bfd_signed_vma get32s PARAMS ((void));
70 static int get16 PARAMS ((void));
71 static void set_op PARAMS ((bfd_vma, int));
72 static void OP_REG PARAMS ((int, int));
73 static void OP_IMREG PARAMS ((int, int));
74 static void OP_I PARAMS ((int, int));
75 static void OP_I64 PARAMS ((int, int));
76 static void OP_sI PARAMS ((int, int));
77 static void OP_J PARAMS ((int, int));
78 static void OP_SEG PARAMS ((int, int));
79 static void OP_DIR PARAMS ((int, int));
80 static void OP_OFF PARAMS ((int, int));
81 static void OP_OFF64 PARAMS ((int, int));
82 static void ptr_reg PARAMS ((int, int));
83 static void OP_ESreg PARAMS ((int, int));
84 static void OP_DSreg PARAMS ((int, int));
85 static void OP_C PARAMS ((int, int));
86 static void OP_D PARAMS ((int, int));
87 static void OP_T PARAMS ((int, int));
88 static void OP_Rd PARAMS ((int, int));
89 static void OP_MMX PARAMS ((int, int));
90 static void OP_XMM PARAMS ((int, int));
91 static void OP_EM PARAMS ((int, int));
92 static void OP_EX PARAMS ((int, int));
93 static void OP_MS PARAMS ((int, int));
94 static void OP_XS PARAMS ((int, int));
95 static void OP_3DNowSuffix PARAMS ((int, int));
96 static void OP_SIMD_Suffix PARAMS ((int, int));
97 static void SIMD_Fixup PARAMS ((int, int));
98 static void BadOp PARAMS ((void));
101 /* Points to first byte not fetched. */
102 bfd_byte *max_fetched;
103 bfd_byte the_buffer[MAXLEN];
109 /* The opcode for the fwait instruction, which we treat as a prefix
111 #define FWAIT_OPCODE (0x9b)
113 /* Set to 1 for 64bit mode disassembly. */
114 static int mode_64bit;
116 /* Flags for the prefixes for the current instruction. See below. */
119 /* REX prefix the current instruction. See below. */
121 /* Bits of REX we've already used. */
127 /* Mark parts used in the REX prefix. When we are testing for
128 empty prefix (for 8bit register REX extension), just mask it
129 out. Otherwise test for REX bit is excuse for existence of REX
130 only in case value is nonzero. */
131 #define USED_REX(value) \
134 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
139 /* Flags for prefixes which we somehow handled when printing the
140 current instruction. */
141 static int used_prefixes;
143 /* Flags stored in PREFIXES. */
144 #define PREFIX_REPZ 1
145 #define PREFIX_REPNZ 2
146 #define PREFIX_LOCK 4
148 #define PREFIX_SS 0x10
149 #define PREFIX_DS 0x20
150 #define PREFIX_ES 0x40
151 #define PREFIX_FS 0x80
152 #define PREFIX_GS 0x100
153 #define PREFIX_DATA 0x200
154 #define PREFIX_ADDR 0x400
155 #define PREFIX_FWAIT 0x800
157 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
158 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
160 #define FETCH_DATA(info, addr) \
161 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
162 ? 1 : fetch_data ((info), (addr)))
165 fetch_data (info, addr)
166 struct disassemble_info *info;
170 struct dis_private *priv = (struct dis_private *) info->private_data;
171 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
173 status = (*info->read_memory_func) (start,
175 addr - priv->max_fetched,
179 /* If we did manage to read at least one byte, then
180 print_insn_i386 will do something sensible. Otherwise, print
181 an error. We do that here because this is where we know
183 if (priv->max_fetched == priv->the_buffer)
184 (*info->memory_error_func) (status, start, info);
185 longjmp (priv->bailout, 1);
188 priv->max_fetched = addr;
194 #define Eb OP_E, b_mode
195 #define Ev OP_E, v_mode
196 #define Ed OP_E, d_mode
197 #define indirEb OP_indirE, b_mode
198 #define indirEv OP_indirE, v_mode
199 #define Ew OP_E, w_mode
200 #define Ma OP_E, v_mode
201 #define M OP_E, 0 /* lea, lgdt, etc. */
202 #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
203 #define Gb OP_G, b_mode
204 #define Gv OP_G, v_mode
205 #define Gd OP_G, d_mode
206 #define Gw OP_G, w_mode
207 #define Rd OP_Rd, d_mode
208 #define Rm OP_Rd, m_mode
209 #define Ib OP_I, b_mode
210 #define sIb OP_sI, b_mode /* sign extened byte */
211 #define Iv OP_I, v_mode
212 #define Iq OP_I, q_mode
213 #define Iv64 OP_I64, v_mode
214 #define Iw OP_I, w_mode
215 #define Jb OP_J, b_mode
216 #define Jv OP_J, v_mode
217 #define Cm OP_C, m_mode
218 #define Dm OP_D, m_mode
219 #define Td OP_T, d_mode
221 #define RMeAX OP_REG, eAX_reg
222 #define RMeBX OP_REG, eBX_reg
223 #define RMeCX OP_REG, eCX_reg
224 #define RMeDX OP_REG, eDX_reg
225 #define RMeSP OP_REG, eSP_reg
226 #define RMeBP OP_REG, eBP_reg
227 #define RMeSI OP_REG, eSI_reg
228 #define RMeDI OP_REG, eDI_reg
229 #define RMrAX OP_REG, rAX_reg
230 #define RMrBX OP_REG, rBX_reg
231 #define RMrCX OP_REG, rCX_reg
232 #define RMrDX OP_REG, rDX_reg
233 #define RMrSP OP_REG, rSP_reg
234 #define RMrBP OP_REG, rBP_reg
235 #define RMrSI OP_REG, rSI_reg
236 #define RMrDI OP_REG, rDI_reg
237 #define RMAL OP_REG, al_reg
238 #define RMAL OP_REG, al_reg
239 #define RMCL OP_REG, cl_reg
240 #define RMDL OP_REG, dl_reg
241 #define RMBL OP_REG, bl_reg
242 #define RMAH OP_REG, ah_reg
243 #define RMCH OP_REG, ch_reg
244 #define RMDH OP_REG, dh_reg
245 #define RMBH OP_REG, bh_reg
246 #define RMAX OP_REG, ax_reg
247 #define RMDX OP_REG, dx_reg
249 #define eAX OP_IMREG, eAX_reg
250 #define eBX OP_IMREG, eBX_reg
251 #define eCX OP_IMREG, eCX_reg
252 #define eDX OP_IMREG, eDX_reg
253 #define eSP OP_IMREG, eSP_reg
254 #define eBP OP_IMREG, eBP_reg
255 #define eSI OP_IMREG, eSI_reg
256 #define eDI OP_IMREG, eDI_reg
257 #define AL OP_IMREG, al_reg
258 #define AL OP_IMREG, al_reg
259 #define CL OP_IMREG, cl_reg
260 #define DL OP_IMREG, dl_reg
261 #define BL OP_IMREG, bl_reg
262 #define AH OP_IMREG, ah_reg
263 #define CH OP_IMREG, ch_reg
264 #define DH OP_IMREG, dh_reg
265 #define BH OP_IMREG, bh_reg
266 #define AX OP_IMREG, ax_reg
267 #define DX OP_IMREG, dx_reg
268 #define indirDX OP_IMREG, indir_dx_reg
270 #define Sw OP_SEG, w_mode
272 #define Ob OP_OFF, b_mode
273 #define Ob64 OP_OFF64, b_mode
274 #define Ov OP_OFF, v_mode
275 #define Ov64 OP_OFF64, v_mode
276 #define Xb OP_DSreg, eSI_reg
277 #define Xv OP_DSreg, eSI_reg
278 #define Yb OP_ESreg, eDI_reg
279 #define Yv OP_ESreg, eDI_reg
280 #define DSBX OP_DSreg, eBX_reg
282 #define es OP_REG, es_reg
283 #define ss OP_REG, ss_reg
284 #define cs OP_REG, cs_reg
285 #define ds OP_REG, ds_reg
286 #define fs OP_REG, fs_reg
287 #define gs OP_REG, gs_reg
291 #define EM OP_EM, v_mode
292 #define EX OP_EX, v_mode
293 #define MS OP_MS, v_mode
294 #define XS OP_XS, v_mode
296 #define OPSUF OP_3DNowSuffix, 0
297 #define OPSIMD OP_SIMD_Suffix, 0
299 #define cond_jump_flag NULL, cond_jump_mode
300 #define loop_jcxz_flag NULL, loop_jcxz_mode
302 /* bits in sizeflag */
303 #define SUFFIX_ALWAYS 4
307 #define b_mode 1 /* byte operand */
308 #define v_mode 2 /* operand size depends on prefixes */
309 #define w_mode 3 /* word operand */
310 #define d_mode 4 /* double word operand */
311 #define q_mode 5 /* quad word operand */
313 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
314 #define cond_jump_mode 8
315 #define loop_jcxz_mode 9
360 #define indir_dx_reg 150
364 #define USE_PREFIX_USER_TABLE 3
365 #define X86_64_SPECIAL 4
367 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
369 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
370 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
371 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
372 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
373 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
374 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
375 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
376 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
377 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
378 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
379 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
380 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
381 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
382 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
383 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
384 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
385 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
386 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
387 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
388 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
389 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
390 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
391 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
393 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
394 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
395 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
396 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
397 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
398 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
399 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
400 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
401 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
402 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
403 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
404 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
405 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
406 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
407 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
408 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
409 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
410 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
411 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
412 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
413 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
414 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
415 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
416 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
417 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
418 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
419 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
421 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
423 typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
435 /* Upper case letters in the instruction names here are macros.
436 'A' => print 'b' if no register operands or suffix_always is true
437 'B' => print 'b' if suffix_always is true
438 'E' => print 'e' if 32-bit form of jcxz
439 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
440 'H' => print ",pt" or ",pn" branch hint
441 'L' => print 'l' if suffix_always is true
442 'N' => print 'n' if instruction has no wait "prefix"
443 'O' => print 'd', or 'o'
444 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
445 . or suffix_always is true. print 'q' if rex prefix is present.
446 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
448 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
449 'S' => print 'w', 'l' or 'q' if suffix_always is true
450 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
451 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
452 'X' => print 's', 'd' depending on data16 prefix (for XMM)
453 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
454 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
456 Many of the above letters print nothing in Intel mode. See "putop"
459 Braces '{' and '}', and vertical bars '|', indicate alternative
460 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
461 modes. In cases where there are only two alternatives, the X86_64
462 instruction is reserved, and "(bad)" is printed.
465 static const struct dis386 dis386[] = {
467 { "addB", Eb, Gb, XX },
468 { "addS", Ev, Gv, XX },
469 { "addB", Gb, Eb, XX },
470 { "addS", Gv, Ev, XX },
471 { "addB", AL, Ib, XX },
472 { "addS", eAX, Iv, XX },
473 { "push{T|}", es, XX, XX },
474 { "pop{T|}", es, XX, XX },
476 { "orB", Eb, Gb, XX },
477 { "orS", Ev, Gv, XX },
478 { "orB", Gb, Eb, XX },
479 { "orS", Gv, Ev, XX },
480 { "orB", AL, Ib, XX },
481 { "orS", eAX, Iv, XX },
482 { "push{T|}", cs, XX, XX },
483 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
485 { "adcB", Eb, Gb, XX },
486 { "adcS", Ev, Gv, XX },
487 { "adcB", Gb, Eb, XX },
488 { "adcS", Gv, Ev, XX },
489 { "adcB", AL, Ib, XX },
490 { "adcS", eAX, Iv, XX },
491 { "push{T|}", ss, XX, XX },
492 { "popT|}", ss, XX, XX },
494 { "sbbB", Eb, Gb, XX },
495 { "sbbS", Ev, Gv, XX },
496 { "sbbB", Gb, Eb, XX },
497 { "sbbS", Gv, Ev, XX },
498 { "sbbB", AL, Ib, XX },
499 { "sbbS", eAX, Iv, XX },
500 { "push{T|}", ds, XX, XX },
501 { "pop{T|}", ds, XX, XX },
503 { "andB", Eb, Gb, XX },
504 { "andS", Ev, Gv, XX },
505 { "andB", Gb, Eb, XX },
506 { "andS", Gv, Ev, XX },
507 { "andB", AL, Ib, XX },
508 { "andS", eAX, Iv, XX },
509 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
510 { "daa{|}", XX, XX, XX },
512 { "subB", Eb, Gb, XX },
513 { "subS", Ev, Gv, XX },
514 { "subB", Gb, Eb, XX },
515 { "subS", Gv, Ev, XX },
516 { "subB", AL, Ib, XX },
517 { "subS", eAX, Iv, XX },
518 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
519 { "das{|}", XX, XX, XX },
521 { "xorB", Eb, Gb, XX },
522 { "xorS", Ev, Gv, XX },
523 { "xorB", Gb, Eb, XX },
524 { "xorS", Gv, Ev, XX },
525 { "xorB", AL, Ib, XX },
526 { "xorS", eAX, Iv, XX },
527 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
528 { "aaa{|}", XX, XX, XX },
530 { "cmpB", Eb, Gb, XX },
531 { "cmpS", Ev, Gv, XX },
532 { "cmpB", Gb, Eb, XX },
533 { "cmpS", Gv, Ev, XX },
534 { "cmpB", AL, Ib, XX },
535 { "cmpS", eAX, Iv, XX },
536 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
537 { "aas{|}", XX, XX, XX },
539 { "inc{S|}", RMeAX, XX, XX },
540 { "inc{S|}", RMeCX, XX, XX },
541 { "inc{S|}", RMeDX, XX, XX },
542 { "inc{S|}", RMeBX, XX, XX },
543 { "inc{S|}", RMeSP, XX, XX },
544 { "inc{S|}", RMeBP, XX, XX },
545 { "inc{S|}", RMeSI, XX, XX },
546 { "inc{S|}", RMeDI, XX, XX },
548 { "dec{S|}", RMeAX, XX, XX },
549 { "dec{S|}", RMeCX, XX, XX },
550 { "dec{S|}", RMeDX, XX, XX },
551 { "dec{S|}", RMeBX, XX, XX },
552 { "dec{S|}", RMeSP, XX, XX },
553 { "dec{S|}", RMeBP, XX, XX },
554 { "dec{S|}", RMeSI, XX, XX },
555 { "dec{S|}", RMeDI, XX, XX },
557 { "pushS", RMrAX, XX, XX },
558 { "pushS", RMrCX, XX, XX },
559 { "pushS", RMrDX, XX, XX },
560 { "pushS", RMrBX, XX, XX },
561 { "pushS", RMrSP, XX, XX },
562 { "pushS", RMrBP, XX, XX },
563 { "pushS", RMrSI, XX, XX },
564 { "pushS", RMrDI, XX, XX },
566 { "popS", RMrAX, XX, XX },
567 { "popS", RMrCX, XX, XX },
568 { "popS", RMrDX, XX, XX },
569 { "popS", RMrBX, XX, XX },
570 { "popS", RMrSP, XX, XX },
571 { "popS", RMrBP, XX, XX },
572 { "popS", RMrSI, XX, XX },
573 { "popS", RMrDI, XX, XX },
575 { "pusha{P|}", XX, XX, XX },
576 { "popa{P|}", XX, XX, XX },
577 { "bound{S|}", Gv, Ma, XX },
579 { "(bad)", XX, XX, XX }, /* seg fs */
580 { "(bad)", XX, XX, XX }, /* seg gs */
581 { "(bad)", XX, XX, XX }, /* op size prefix */
582 { "(bad)", XX, XX, XX }, /* adr size prefix */
584 { "pushT", Iq, XX, XX },
585 { "imulS", Gv, Ev, Iv },
586 { "pushT", sIb, XX, XX },
587 { "imulS", Gv, Ev, sIb },
588 { "ins{b||b|}", Yb, indirDX, XX },
589 { "ins{R||R|}", Yv, indirDX, XX },
590 { "outs{b||b|}", indirDX, Xb, XX },
591 { "outs{R||R|}", indirDX, Xv, XX },
593 { "joH", Jb, XX, cond_jump_flag },
594 { "jnoH", Jb, XX, cond_jump_flag },
595 { "jbH", Jb, XX, cond_jump_flag },
596 { "jaeH", Jb, XX, cond_jump_flag },
597 { "jeH", Jb, XX, cond_jump_flag },
598 { "jneH", Jb, XX, cond_jump_flag },
599 { "jbeH", Jb, XX, cond_jump_flag },
600 { "jaH", Jb, XX, cond_jump_flag },
602 { "jsH", Jb, XX, cond_jump_flag },
603 { "jnsH", Jb, XX, cond_jump_flag },
604 { "jpH", Jb, XX, cond_jump_flag },
605 { "jnpH", Jb, XX, cond_jump_flag },
606 { "jlH", Jb, XX, cond_jump_flag },
607 { "jgeH", Jb, XX, cond_jump_flag },
608 { "jleH", Jb, XX, cond_jump_flag },
609 { "jgH", Jb, XX, cond_jump_flag },
613 { "(bad)", XX, XX, XX },
615 { "testB", Eb, Gb, XX },
616 { "testS", Ev, Gv, XX },
617 { "xchgB", Eb, Gb, XX },
618 { "xchgS", Ev, Gv, XX },
620 { "movB", Eb, Gb, XX },
621 { "movS", Ev, Gv, XX },
622 { "movB", Gb, Eb, XX },
623 { "movS", Gv, Ev, XX },
624 { "movQ", Ev, Sw, XX },
625 { "leaS", Gv, M, XX },
626 { "movQ", Sw, Ev, XX },
627 { "popU", Ev, XX, XX },
629 { "nop", XX, XX, XX },
630 /* FIXME: NOP with REPz prefix is called PAUSE. */
631 { "xchgS", RMeCX, eAX, XX },
632 { "xchgS", RMeDX, eAX, XX },
633 { "xchgS", RMeBX, eAX, XX },
634 { "xchgS", RMeSP, eAX, XX },
635 { "xchgS", RMeBP, eAX, XX },
636 { "xchgS", RMeSI, eAX, XX },
637 { "xchgS", RMeDI, eAX, XX },
639 { "cW{tR||tR|}", XX, XX, XX },
640 { "cR{tO||tO|}", XX, XX, XX },
641 { "lcall{T|}", Ap, XX, XX },
642 { "(bad)", XX, XX, XX }, /* fwait */
643 { "pushfT", XX, XX, XX },
644 { "popfT", XX, XX, XX },
645 { "sahf{|}", XX, XX, XX },
646 { "lahf{|}", XX, XX, XX },
648 { "movB", AL, Ob64, XX },
649 { "movS", eAX, Ov64, XX },
650 { "movB", Ob64, AL, XX },
651 { "movS", Ov64, eAX, XX },
652 { "movs{b||b|}", Yb, Xb, XX },
653 { "movs{R||R|}", Yv, Xv, XX },
654 { "cmps{b||b|}", Xb, Yb, XX },
655 { "cmps{R||R|}", Xv, Yv, XX },
657 { "testB", AL, Ib, XX },
658 { "testS", eAX, Iv, XX },
659 { "stosB", Yb, AL, XX },
660 { "stosS", Yv, eAX, XX },
661 { "lodsB", AL, Xb, XX },
662 { "lodsS", eAX, Xv, XX },
663 { "scasB", AL, Yb, XX },
664 { "scasS", eAX, Yv, XX },
666 { "movB", RMAL, Ib, XX },
667 { "movB", RMCL, Ib, XX },
668 { "movB", RMDL, Ib, XX },
669 { "movB", RMBL, Ib, XX },
670 { "movB", RMAH, Ib, XX },
671 { "movB", RMCH, Ib, XX },
672 { "movB", RMDH, Ib, XX },
673 { "movB", RMBH, Ib, XX },
675 { "movS", RMeAX, Iv64, XX },
676 { "movS", RMeCX, Iv64, XX },
677 { "movS", RMeDX, Iv64, XX },
678 { "movS", RMeBX, Iv64, XX },
679 { "movS", RMeSP, Iv64, XX },
680 { "movS", RMeBP, Iv64, XX },
681 { "movS", RMeSI, Iv64, XX },
682 { "movS", RMeDI, Iv64, XX },
686 { "retT", Iw, XX, XX },
687 { "retT", XX, XX, XX },
688 { "les{S|}", Gv, Mp, XX },
689 { "ldsS", Gv, Mp, XX },
690 { "movA", Eb, Ib, XX },
691 { "movQ", Ev, Iv, XX },
693 { "enterT", Iw, Ib, XX },
694 { "leaveT", XX, XX, XX },
695 { "lretP", Iw, XX, XX },
696 { "lretP", XX, XX, XX },
697 { "int3", XX, XX, XX },
698 { "int", Ib, XX, XX },
699 { "into{|}", XX, XX, XX },
700 { "iretP", XX, XX, XX },
706 { "aam{|}", sIb, XX, XX },
707 { "aad{|}", sIb, XX, XX },
708 { "(bad)", XX, XX, XX },
709 { "xlat", DSBX, XX, XX },
720 { "loopneFH", Jb, XX, loop_jcxz_flag },
721 { "loopeFH", Jb, XX, loop_jcxz_flag },
722 { "loopFH", Jb, XX, loop_jcxz_flag },
723 { "jEcxzH", Jb, XX, loop_jcxz_flag },
724 { "inB", AL, Ib, XX },
725 { "inS", eAX, Ib, XX },
726 { "outB", Ib, AL, XX },
727 { "outS", Ib, eAX, XX },
729 { "callT", Jv, XX, XX },
730 { "jmpT", Jv, XX, XX },
731 { "ljmp{T|}", Ap, XX, XX },
732 { "jmp", Jb, XX, XX },
733 { "inB", AL, indirDX, XX },
734 { "inS", eAX, indirDX, XX },
735 { "outB", indirDX, AL, XX },
736 { "outS", indirDX, eAX, XX },
738 { "(bad)", XX, XX, XX }, /* lock prefix */
739 { "(bad)", XX, XX, XX },
740 { "(bad)", XX, XX, XX }, /* repne */
741 { "(bad)", XX, XX, XX }, /* repz */
742 { "hlt", XX, XX, XX },
743 { "cmc", XX, XX, XX },
747 { "clc", XX, XX, XX },
748 { "stc", XX, XX, XX },
749 { "cli", XX, XX, XX },
750 { "sti", XX, XX, XX },
751 { "cld", XX, XX, XX },
752 { "std", XX, XX, XX },
757 static const struct dis386 dis386_twobyte[] = {
761 { "larS", Gv, Ew, XX },
762 { "lslS", Gv, Ew, XX },
763 { "(bad)", XX, XX, XX },
764 { "syscall", XX, XX, XX },
765 { "clts", XX, XX, XX },
766 { "sysretP", XX, XX, XX },
768 { "invd", XX, XX, XX },
769 { "wbinvd", XX, XX, XX },
770 { "(bad)", XX, XX, XX },
771 { "ud2a", XX, XX, XX },
772 { "(bad)", XX, XX, XX },
774 { "femms", XX, XX, XX },
775 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
779 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
780 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
781 { "unpcklpX", XM, EX, XX },
782 { "unpckhpX", XM, EX, XX },
783 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
784 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
787 { "(bad)", XX, XX, XX },
788 { "(bad)", XX, XX, XX },
789 { "(bad)", XX, XX, XX },
790 { "(bad)", XX, XX, XX },
791 { "(bad)", XX, XX, XX },
792 { "(bad)", XX, XX, XX },
793 { "(bad)", XX, XX, XX },
795 { "movL", Rm, Cm, XX },
796 { "movL", Rm, Dm, XX },
797 { "movL", Cm, Rm, XX },
798 { "movL", Dm, Rm, XX },
799 { "movL", Rd, Td, XX },
800 { "(bad)", XX, XX, XX },
801 { "movL", Td, Rd, XX },
802 { "(bad)", XX, XX, XX },
804 { "movapX", XM, EX, XX },
805 { "movapX", EX, XM, XX },
807 { "movntpX", Ev, XM, XX },
810 { "ucomisX", XM,EX, XX },
811 { "comisX", XM,EX, XX },
813 { "wrmsr", XX, XX, XX },
814 { "rdtsc", XX, XX, XX },
815 { "rdmsr", XX, XX, XX },
816 { "rdpmc", XX, XX, XX },
817 { "sysenter", XX, XX, XX },
818 { "sysexit", XX, XX, XX },
819 { "(bad)", XX, XX, XX },
820 { "(bad)", XX, XX, XX },
822 { "(bad)", XX, XX, XX },
823 { "(bad)", XX, XX, XX },
824 { "(bad)", XX, XX, XX },
825 { "(bad)", XX, XX, XX },
826 { "(bad)", XX, XX, XX },
827 { "(bad)", XX, XX, XX },
828 { "(bad)", XX, XX, XX },
829 { "(bad)", XX, XX, XX },
831 { "cmovo", Gv, Ev, XX },
832 { "cmovno", Gv, Ev, XX },
833 { "cmovb", Gv, Ev, XX },
834 { "cmovae", Gv, Ev, XX },
835 { "cmove", Gv, Ev, XX },
836 { "cmovne", Gv, Ev, XX },
837 { "cmovbe", Gv, Ev, XX },
838 { "cmova", Gv, Ev, XX },
840 { "cmovs", Gv, Ev, XX },
841 { "cmovns", Gv, Ev, XX },
842 { "cmovp", Gv, Ev, XX },
843 { "cmovnp", Gv, Ev, XX },
844 { "cmovl", Gv, Ev, XX },
845 { "cmovge", Gv, Ev, XX },
846 { "cmovle", Gv, Ev, XX },
847 { "cmovg", Gv, Ev, XX },
849 { "movmskpX", Gd, XS, XX },
853 { "andpX", XM, EX, XX },
854 { "andnpX", XM, EX, XX },
855 { "orpX", XM, EX, XX },
856 { "xorpX", XM, EX, XX },
867 { "punpcklbw", MX, EM, XX },
868 { "punpcklwd", MX, EM, XX },
869 { "punpckldq", MX, EM, XX },
870 { "packsswb", MX, EM, XX },
871 { "pcmpgtb", MX, EM, XX },
872 { "pcmpgtw", MX, EM, XX },
873 { "pcmpgtd", MX, EM, XX },
874 { "packuswb", MX, EM, XX },
876 { "punpckhbw", MX, EM, XX },
877 { "punpckhwd", MX, EM, XX },
878 { "punpckhdq", MX, EM, XX },
879 { "packssdw", MX, EM, XX },
882 { "movd", MX, Ed, XX },
889 { "pcmpeqb", MX, EM, XX },
890 { "pcmpeqw", MX, EM, XX },
891 { "pcmpeqd", MX, EM, XX },
892 { "emms", XX, XX, XX },
894 { "(bad)", XX, XX, XX },
895 { "(bad)", XX, XX, XX },
896 { "(bad)", XX, XX, XX },
897 { "(bad)", XX, XX, XX },
898 { "(bad)", XX, XX, XX },
899 { "(bad)", XX, XX, XX },
903 { "joH", Jv, XX, cond_jump_flag },
904 { "jnoH", Jv, XX, cond_jump_flag },
905 { "jbH", Jv, XX, cond_jump_flag },
906 { "jaeH", Jv, XX, cond_jump_flag },
907 { "jeH", Jv, XX, cond_jump_flag },
908 { "jneH", Jv, XX, cond_jump_flag },
909 { "jbeH", Jv, XX, cond_jump_flag },
910 { "jaH", Jv, XX, cond_jump_flag },
912 { "jsH", Jv, XX, cond_jump_flag },
913 { "jnsH", Jv, XX, cond_jump_flag },
914 { "jpH", Jv, XX, cond_jump_flag },
915 { "jnpH", Jv, XX, cond_jump_flag },
916 { "jlH", Jv, XX, cond_jump_flag },
917 { "jgeH", Jv, XX, cond_jump_flag },
918 { "jleH", Jv, XX, cond_jump_flag },
919 { "jgH", Jv, XX, cond_jump_flag },
921 { "seto", Eb, XX, XX },
922 { "setno", Eb, XX, XX },
923 { "setb", Eb, XX, XX },
924 { "setae", Eb, XX, XX },
925 { "sete", Eb, XX, XX },
926 { "setne", Eb, XX, XX },
927 { "setbe", Eb, XX, XX },
928 { "seta", Eb, XX, XX },
930 { "sets", Eb, XX, XX },
931 { "setns", Eb, XX, XX },
932 { "setp", Eb, XX, XX },
933 { "setnp", Eb, XX, XX },
934 { "setl", Eb, XX, XX },
935 { "setge", Eb, XX, XX },
936 { "setle", Eb, XX, XX },
937 { "setg", Eb, XX, XX },
939 { "pushT", fs, XX, XX },
940 { "popT", fs, XX, XX },
941 { "cpuid", XX, XX, XX },
942 { "btS", Ev, Gv, XX },
943 { "shldS", Ev, Gv, Ib },
944 { "shldS", Ev, Gv, CL },
945 { "(bad)", XX, XX, XX },
946 { "(bad)", XX, XX, XX },
948 { "pushT", gs, XX, XX },
949 { "popT", gs, XX, XX },
950 { "rsm", XX, XX, XX },
951 { "btsS", Ev, Gv, XX },
952 { "shrdS", Ev, Gv, Ib },
953 { "shrdS", Ev, Gv, CL },
955 { "imulS", Gv, Ev, XX },
957 { "cmpxchgB", Eb, Gb, XX },
958 { "cmpxchgS", Ev, Gv, XX },
959 { "lssS", Gv, Mp, XX },
960 { "btrS", Ev, Gv, XX },
961 { "lfsS", Gv, Mp, XX },
962 { "lgsS", Gv, Mp, XX },
963 { "movz{bR|x|bR|x}", Gv, Eb, XX },
964 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
966 { "(bad)", XX, XX, XX },
967 { "ud2b", XX, XX, XX },
969 { "btcS", Ev, Gv, XX },
970 { "bsfS", Gv, Ev, XX },
971 { "bsrS", Gv, Ev, XX },
972 { "movs{bR|x|bR|x}", Gv, Eb, XX },
973 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
975 { "xaddB", Eb, Gb, XX },
976 { "xaddS", Ev, Gv, XX },
978 { "movntiS", Ev, Gv, XX },
979 { "pinsrw", MX, Ed, Ib },
980 { "pextrw", Gd, MS, Ib },
981 { "shufpX", XM, EX, Ib },
984 { "bswap", RMeAX, XX, XX },
985 { "bswap", RMeCX, XX, XX },
986 { "bswap", RMeDX, XX, XX },
987 { "bswap", RMeBX, XX, XX },
988 { "bswap", RMeSP, XX, XX },
989 { "bswap", RMeBP, XX, XX },
990 { "bswap", RMeSI, XX, XX },
991 { "bswap", RMeDI, XX, XX },
993 { "(bad)", XX, XX, XX },
994 { "psrlw", MX, EM, XX },
995 { "psrld", MX, EM, XX },
996 { "psrlq", MX, EM, XX },
997 { "paddq", MX, EM, XX },
998 { "pmullw", MX, EM, XX },
1000 { "pmovmskb", Gd, MS, XX },
1002 { "psubusb", MX, EM, XX },
1003 { "psubusw", MX, EM, XX },
1004 { "pminub", MX, EM, XX },
1005 { "pand", MX, EM, XX },
1006 { "paddusb", MX, EM, XX },
1007 { "paddusw", MX, EM, XX },
1008 { "pmaxub", MX, EM, XX },
1009 { "pandn", MX, EM, XX },
1011 { "pavgb", MX, EM, XX },
1012 { "psraw", MX, EM, XX },
1013 { "psrad", MX, EM, XX },
1014 { "pavgw", MX, EM, XX },
1015 { "pmulhuw", MX, EM, XX },
1016 { "pmulhw", MX, EM, XX },
1020 { "psubsb", MX, EM, XX },
1021 { "psubsw", MX, EM, XX },
1022 { "pminsw", MX, EM, XX },
1023 { "por", MX, EM, XX },
1024 { "paddsb", MX, EM, XX },
1025 { "paddsw", MX, EM, XX },
1026 { "pmaxsw", MX, EM, XX },
1027 { "pxor", MX, EM, XX },
1029 { "(bad)", XX, XX, XX },
1030 { "psllw", MX, EM, XX },
1031 { "pslld", MX, EM, XX },
1032 { "psllq", MX, EM, XX },
1033 { "pmuludq", MX, EM, XX },
1034 { "pmaddwd", MX, EM, XX },
1035 { "psadbw", MX, EM, XX },
1038 { "psubb", MX, EM, XX },
1039 { "psubw", MX, EM, XX },
1040 { "psubd", MX, EM, XX },
1041 { "psubq", MX, EM, XX },
1042 { "paddb", MX, EM, XX },
1043 { "paddw", MX, EM, XX },
1044 { "paddd", MX, EM, XX },
1045 { "(bad)", XX, XX, XX }
1048 static const unsigned char onebyte_has_modrm[256] = {
1049 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1050 /* ------------------------------- */
1051 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1052 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1053 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1054 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1055 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1056 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1057 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1058 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1059 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1060 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1061 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1062 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1063 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1064 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1065 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1066 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1067 /* ------------------------------- */
1068 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1071 static const unsigned char twobyte_has_modrm[256] = {
1072 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1073 /* ------------------------------- */
1074 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1075 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1076 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1077 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1078 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1079 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1080 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1081 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
1082 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1083 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1084 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
1085 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1086 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1087 /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1088 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1089 /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1090 /* ------------------------------- */
1091 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1094 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1095 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1096 /* ------------------------------- */
1097 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1098 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1099 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1100 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1101 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1102 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1103 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1104 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1105 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1106 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1107 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1108 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1109 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1110 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1111 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1112 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1113 /* ------------------------------- */
1114 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1117 static char obuf[100];
1119 static char scratchbuf[100];
1120 static unsigned char *start_codep;
1121 static unsigned char *insn_codep;
1122 static unsigned char *codep;
1123 static disassemble_info *the_info;
1127 static unsigned char need_modrm;
1129 /* If we are accessing mod/rm/reg without need_modrm set, then the
1130 values are stale. Hitting this abort likely indicates that you
1131 need to update onebyte_has_modrm or twobyte_has_modrm. */
1132 #define MODRM_CHECK if (!need_modrm) abort ()
1134 static const char * const *names64;
1135 static const char * const *names32;
1136 static const char * const *names16;
1137 static const char * const *names8;
1138 static const char * const *names8rex;
1139 static const char * const *names_seg;
1140 static const char * const *index16;
1142 static const char * const intel_names64[] = {
1143 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1144 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1146 static const char * const intel_names32[] = {
1147 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1148 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1150 static const char * const intel_names16[] = {
1151 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1152 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1154 static const char * const intel_names8[] = {
1155 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1157 static const char * const intel_names8rex[] = {
1158 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1159 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1161 static const char * const intel_names_seg[] = {
1162 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1164 static const char * const intel_index16[] = {
1165 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1168 static const char * const att_names64[] = {
1169 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1170 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1172 static const char * const att_names32[] = {
1173 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1174 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1176 static const char * const att_names16[] = {
1177 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1178 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1180 static const char * const att_names8[] = {
1181 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1183 static const char * const att_names8rex[] = {
1184 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1185 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1187 static const char * const att_names_seg[] = {
1188 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1190 static const char * const att_index16[] = {
1191 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1194 static const struct dis386 grps[][8] = {
1197 { "addA", Eb, Ib, XX },
1198 { "orA", Eb, Ib, XX },
1199 { "adcA", Eb, Ib, XX },
1200 { "sbbA", Eb, Ib, XX },
1201 { "andA", Eb, Ib, XX },
1202 { "subA", Eb, Ib, XX },
1203 { "xorA", Eb, Ib, XX },
1204 { "cmpA", Eb, Ib, XX }
1208 { "addQ", Ev, Iv, XX },
1209 { "orQ", Ev, Iv, XX },
1210 { "adcQ", Ev, Iv, XX },
1211 { "sbbQ", Ev, Iv, XX },
1212 { "andQ", Ev, Iv, XX },
1213 { "subQ", Ev, Iv, XX },
1214 { "xorQ", Ev, Iv, XX },
1215 { "cmpQ", Ev, Iv, XX }
1219 { "addQ", Ev, sIb, XX },
1220 { "orQ", Ev, sIb, XX },
1221 { "adcQ", Ev, sIb, XX },
1222 { "sbbQ", Ev, sIb, XX },
1223 { "andQ", Ev, sIb, XX },
1224 { "subQ", Ev, sIb, XX },
1225 { "xorQ", Ev, sIb, XX },
1226 { "cmpQ", Ev, sIb, XX }
1230 { "rolA", Eb, Ib, XX },
1231 { "rorA", Eb, Ib, XX },
1232 { "rclA", Eb, Ib, XX },
1233 { "rcrA", Eb, Ib, XX },
1234 { "shlA", Eb, Ib, XX },
1235 { "shrA", Eb, Ib, XX },
1236 { "(bad)", XX, XX, XX },
1237 { "sarA", Eb, Ib, XX },
1241 { "rolQ", Ev, Ib, XX },
1242 { "rorQ", Ev, Ib, XX },
1243 { "rclQ", Ev, Ib, XX },
1244 { "rcrQ", Ev, Ib, XX },
1245 { "shlQ", Ev, Ib, XX },
1246 { "shrQ", Ev, Ib, XX },
1247 { "(bad)", XX, XX, XX },
1248 { "sarQ", Ev, Ib, XX },
1252 { "rolA", Eb, XX, XX },
1253 { "rorA", Eb, XX, XX },
1254 { "rclA", Eb, XX, XX },
1255 { "rcrA", Eb, XX, XX },
1256 { "shlA", Eb, XX, XX },
1257 { "shrA", Eb, XX, XX },
1258 { "(bad)", XX, XX, XX },
1259 { "sarA", Eb, XX, XX },
1263 { "rolQ", Ev, XX, XX },
1264 { "rorQ", Ev, XX, XX },
1265 { "rclQ", Ev, XX, XX },
1266 { "rcrQ", Ev, XX, XX },
1267 { "shlQ", Ev, XX, XX },
1268 { "shrQ", Ev, XX, XX },
1269 { "(bad)", XX, XX, XX},
1270 { "sarQ", Ev, XX, XX },
1274 { "rolA", Eb, CL, XX },
1275 { "rorA", Eb, CL, XX },
1276 { "rclA", Eb, CL, XX },
1277 { "rcrA", Eb, CL, XX },
1278 { "shlA", Eb, CL, XX },
1279 { "shrA", Eb, CL, XX },
1280 { "(bad)", XX, XX, XX },
1281 { "sarA", Eb, CL, XX },
1285 { "rolQ", Ev, CL, XX },
1286 { "rorQ", Ev, CL, XX },
1287 { "rclQ", Ev, CL, XX },
1288 { "rcrQ", Ev, CL, XX },
1289 { "shlQ", Ev, CL, XX },
1290 { "shrQ", Ev, CL, XX },
1291 { "(bad)", XX, XX, XX },
1292 { "sarQ", Ev, CL, XX }
1296 { "testA", Eb, Ib, XX },
1297 { "(bad)", Eb, XX, XX },
1298 { "notA", Eb, XX, XX },
1299 { "negA", Eb, XX, XX },
1300 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1301 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1302 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1303 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1307 { "testQ", Ev, Iv, XX },
1308 { "(bad)", XX, XX, XX },
1309 { "notQ", Ev, XX, XX },
1310 { "negQ", Ev, XX, XX },
1311 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1312 { "imulQ", Ev, XX, XX },
1313 { "divQ", Ev, XX, XX },
1314 { "idivQ", Ev, XX, XX },
1318 { "incA", Eb, XX, XX },
1319 { "decA", Eb, XX, XX },
1320 { "(bad)", XX, XX, XX },
1321 { "(bad)", XX, XX, XX },
1322 { "(bad)", XX, XX, XX },
1323 { "(bad)", XX, XX, XX },
1324 { "(bad)", XX, XX, XX },
1325 { "(bad)", XX, XX, XX },
1329 { "incQ", Ev, XX, XX },
1330 { "decQ", Ev, XX, XX },
1331 { "callT", indirEv, XX, XX },
1332 { "lcallT", indirEv, XX, XX },
1333 { "jmpT", indirEv, XX, XX },
1334 { "ljmpT", indirEv, XX, XX },
1335 { "pushU", Ev, XX, XX },
1336 { "(bad)", XX, XX, XX },
1340 { "sldtQ", Ev, XX, XX },
1341 { "strQ", Ev, XX, XX },
1342 { "lldt", Ew, XX, XX },
1343 { "ltr", Ew, XX, XX },
1344 { "verr", Ew, XX, XX },
1345 { "verw", Ew, XX, XX },
1346 { "(bad)", XX, XX, XX },
1347 { "(bad)", XX, XX, XX }
1351 { "sgdtQ", M, XX, XX },
1352 { "sidtQ", M, XX, XX },
1353 { "lgdtQ", M, XX, XX },
1354 { "lidtQ", M, XX, XX },
1355 { "smswQ", Ev, XX, XX },
1356 { "(bad)", XX, XX, XX },
1357 { "lmsw", Ew, XX, XX },
1358 { "invlpg", Ew, XX, XX },
1362 { "(bad)", XX, XX, XX },
1363 { "(bad)", XX, XX, XX },
1364 { "(bad)", XX, XX, XX },
1365 { "(bad)", XX, XX, XX },
1366 { "btQ", Ev, Ib, XX },
1367 { "btsQ", Ev, Ib, XX },
1368 { "btrQ", Ev, Ib, XX },
1369 { "btcQ", Ev, Ib, XX },
1373 { "(bad)", XX, XX, XX },
1374 { "cmpxchg8b", Ev, XX, XX },
1375 { "(bad)", XX, XX, XX },
1376 { "(bad)", XX, XX, XX },
1377 { "(bad)", XX, XX, XX },
1378 { "(bad)", XX, XX, XX },
1379 { "(bad)", XX, XX, XX },
1380 { "(bad)", XX, XX, XX },
1384 { "(bad)", XX, XX, XX },
1385 { "(bad)", XX, XX, XX },
1386 { "psrlw", MS, Ib, XX },
1387 { "(bad)", XX, XX, XX },
1388 { "psraw", MS, Ib, XX },
1389 { "(bad)", XX, XX, XX },
1390 { "psllw", MS, Ib, XX },
1391 { "(bad)", XX, XX, XX },
1395 { "(bad)", XX, XX, XX },
1396 { "(bad)", XX, XX, XX },
1397 { "psrld", MS, Ib, XX },
1398 { "(bad)", XX, XX, XX },
1399 { "psrad", MS, Ib, XX },
1400 { "(bad)", XX, XX, XX },
1401 { "pslld", MS, Ib, XX },
1402 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "(bad)", XX, XX, XX },
1408 { "psrlq", MS, Ib, XX },
1409 { "psrldq", MS, Ib, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "(bad)", XX, XX, XX },
1412 { "psllq", MS, Ib, XX },
1413 { "pslldq", MS, Ib, XX },
1417 { "fxsave", Ev, XX, XX },
1418 { "fxrstor", Ev, XX, XX },
1419 { "ldmxcsr", Ev, XX, XX },
1420 { "stmxcsr", Ev, XX, XX },
1421 { "(bad)", XX, XX, XX },
1422 { "lfence", None, XX, XX },
1423 { "mfence", None, XX, XX },
1424 { "sfence", None, XX, XX },
1425 /* FIXME: the sfence with memory operand is clflush! */
1429 { "prefetchnta", Ev, XX, XX },
1430 { "prefetcht0", Ev, XX, XX },
1431 { "prefetcht1", Ev, XX, XX },
1432 { "prefetcht2", Ev, XX, XX },
1433 { "(bad)", XX, XX, XX },
1434 { "(bad)", XX, XX, XX },
1435 { "(bad)", XX, XX, XX },
1436 { "(bad)", XX, XX, XX },
1440 { "prefetch", Eb, XX, XX },
1441 { "prefetchw", Eb, XX, XX },
1442 { "(bad)", XX, XX, XX },
1443 { "(bad)", XX, XX, XX },
1444 { "(bad)", XX, XX, XX },
1445 { "(bad)", XX, XX, XX },
1446 { "(bad)", XX, XX, XX },
1447 { "(bad)", XX, XX, XX },
1451 static const struct dis386 prefix_user_table[][4] = {
1454 { "addps", XM, EX, XX },
1455 { "addss", XM, EX, XX },
1456 { "addpd", XM, EX, XX },
1457 { "addsd", XM, EX, XX },
1461 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1462 { "", XM, EX, OPSIMD },
1463 { "", XM, EX, OPSIMD },
1464 { "", XM, EX, OPSIMD },
1468 { "cvtpi2ps", XM, EM, XX },
1469 { "cvtsi2ssY", XM, Ev, XX },
1470 { "cvtpi2pd", XM, EM, XX },
1471 { "cvtsi2sdY", XM, Ev, XX },
1475 { "cvtps2pi", MX, EX, XX },
1476 { "cvtss2siY", Gv, EX, XX },
1477 { "cvtpd2pi", MX, EX, XX },
1478 { "cvtsd2siY", Gv, EX, XX },
1482 { "cvttps2pi", MX, EX, XX },
1483 { "cvttss2siY", Gv, EX, XX },
1484 { "cvttpd2pi", MX, EX, XX },
1485 { "cvttsd2siY", Gv, EX, XX },
1489 { "divps", XM, EX, XX },
1490 { "divss", XM, EX, XX },
1491 { "divpd", XM, EX, XX },
1492 { "divsd", XM, EX, XX },
1496 { "maxps", XM, EX, XX },
1497 { "maxss", XM, EX, XX },
1498 { "maxpd", XM, EX, XX },
1499 { "maxsd", XM, EX, XX },
1503 { "minps", XM, EX, XX },
1504 { "minss", XM, EX, XX },
1505 { "minpd", XM, EX, XX },
1506 { "minsd", XM, EX, XX },
1510 { "movups", XM, EX, XX },
1511 { "movss", XM, EX, XX },
1512 { "movupd", XM, EX, XX },
1513 { "movsd", XM, EX, XX },
1517 { "movups", EX, XM, XX },
1518 { "movss", EX, XM, XX },
1519 { "movupd", EX, XM, XX },
1520 { "movsd", EX, XM, XX },
1524 { "mulps", XM, EX, XX },
1525 { "mulss", XM, EX, XX },
1526 { "mulpd", XM, EX, XX },
1527 { "mulsd", XM, EX, XX },
1531 { "rcpps", XM, EX, XX },
1532 { "rcpss", XM, EX, XX },
1533 { "(bad)", XM, EX, XX },
1534 { "(bad)", XM, EX, XX },
1538 { "rsqrtps", XM, EX, XX },
1539 { "rsqrtss", XM, EX, XX },
1540 { "(bad)", XM, EX, XX },
1541 { "(bad)", XM, EX, XX },
1545 { "sqrtps", XM, EX, XX },
1546 { "sqrtss", XM, EX, XX },
1547 { "sqrtpd", XM, EX, XX },
1548 { "sqrtsd", XM, EX, XX },
1552 { "subps", XM, EX, XX },
1553 { "subss", XM, EX, XX },
1554 { "subpd", XM, EX, XX },
1555 { "subsd", XM, EX, XX },
1559 { "(bad)", XM, EX, XX },
1560 { "cvtdq2pd", XM, EX, XX },
1561 { "cvttpd2dq", XM, EX, XX },
1562 { "cvtpd2dq", XM, EX, XX },
1566 { "cvtdq2ps", XM, EX, XX },
1567 { "cvttps2dq",XM, EX, XX },
1568 { "cvtps2dq",XM, EX, XX },
1569 { "(bad)", XM, EX, XX },
1573 { "cvtps2pd", XM, EX, XX },
1574 { "cvtss2sd", XM, EX, XX },
1575 { "cvtpd2ps", XM, EX, XX },
1576 { "cvtsd2ss", XM, EX, XX },
1580 { "maskmovq", MX, MS, XX },
1581 { "(bad)", XM, EX, XX },
1582 { "maskmovdqu", XM, EX, XX },
1583 { "(bad)", XM, EX, XX },
1587 { "movq", MX, EM, XX },
1588 { "movdqu", XM, EX, XX },
1589 { "movdqa", XM, EX, XX },
1590 { "(bad)", XM, EX, XX },
1594 { "movq", EM, MX, XX },
1595 { "movdqu", EX, XM, XX },
1596 { "movdqa", EX, XM, XX },
1597 { "(bad)", EX, XM, XX },
1601 { "(bad)", EX, XM, XX },
1602 { "movq2dq", XM, MS, XX },
1603 { "movq", EX, XM, XX },
1604 { "movdq2q", MX, XS, XX },
1608 { "pshufw", MX, EM, Ib },
1609 { "pshufhw", XM, EX, Ib },
1610 { "pshufd", XM, EX, Ib },
1611 { "pshuflw", XM, EX, Ib },
1615 { "movd", Ed, MX, XX },
1616 { "movq", XM, EX, XX },
1617 { "movd", Ed, XM, XX },
1618 { "(bad)", Ed, XM, XX },
1622 { "(bad)", MX, EX, XX },
1623 { "(bad)", XM, EX, XX },
1624 { "punpckhqdq", XM, EX, XX },
1625 { "(bad)", XM, EX, XX },
1629 { "movntq", Ev, MX, XX },
1630 { "(bad)", Ev, XM, XX },
1631 { "movntdq", Ev, XM, XX },
1632 { "(bad)", Ev, XM, XX },
1636 { "(bad)", MX, EX, XX },
1637 { "(bad)", XM, EX, XX },
1638 { "punpcklqdq", XM, EX, XX },
1639 { "(bad)", XM, EX, XX },
1643 static const struct dis386 x86_64_table[][2] = {
1645 { "arpl", Ew, Gw, XX },
1646 { "movs{||lq|xd}", Gv, Ed, XX },
1650 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1662 FETCH_DATA (the_info, codep + 1);
1666 /* REX prefixes family. */
1689 prefixes |= PREFIX_REPZ;
1692 prefixes |= PREFIX_REPNZ;
1695 prefixes |= PREFIX_LOCK;
1698 prefixes |= PREFIX_CS;
1701 prefixes |= PREFIX_SS;
1704 prefixes |= PREFIX_DS;
1707 prefixes |= PREFIX_ES;
1710 prefixes |= PREFIX_FS;
1713 prefixes |= PREFIX_GS;
1716 prefixes |= PREFIX_DATA;
1719 prefixes |= PREFIX_ADDR;
1722 /* fwait is really an instruction. If there are prefixes
1723 before the fwait, they belong to the fwait, *not* to the
1724 following instruction. */
1727 prefixes |= PREFIX_FWAIT;
1731 prefixes = PREFIX_FWAIT;
1736 /* Rex is ignored when followed by another prefix. */
1739 oappend (prefix_name (rex, 0));
1747 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1751 prefix_name (pref, sizeflag)
1757 /* REX prefixes family. */
1809 return (sizeflag & DFLAG) ? "data16" : "data32";
1812 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1814 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
1822 static char op1out[100], op2out[100], op3out[100];
1823 static int op_ad, op_index[3];
1824 static bfd_vma op_address[3];
1825 static bfd_vma op_riprel[3];
1826 static bfd_vma start_pc;
1829 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1830 * (see topic "Redundant prefixes" in the "Differences from 8086"
1831 * section of the "Virtual 8086 Mode" chapter.)
1832 * 'pc' should be the address of this instruction, it will
1833 * be used to print the target address if this is a relative jump or call
1834 * The function returns the length of this instruction in bytes.
1837 static int8_t intel_syntax;
1838 static char open_char;
1839 static char close_char;
1840 static char separator_char;
1841 static char scale_char;
1844 print_insn_i386 (pc, info)
1846 disassemble_info *info;
1850 return print_insn (pc, info);
1854 print_insn (pc, info)
1856 disassemble_info *info;
1858 const struct dis386 *dp;
1861 char *first, *second, *third;
1863 unsigned char uses_SSE_prefix;
1866 struct dis_private priv;
1868 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1869 || info->mach == bfd_mach_x86_64);
1871 if (intel_syntax == -1)
1872 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1873 || info->mach == bfd_mach_x86_64_intel_syntax);
1875 if (info->mach == bfd_mach_i386_i386
1876 || info->mach == bfd_mach_x86_64
1877 || info->mach == bfd_mach_i386_i386_intel_syntax
1878 || info->mach == bfd_mach_x86_64_intel_syntax)
1879 priv.orig_sizeflag = AFLAG | DFLAG;
1880 else if (info->mach == bfd_mach_i386_i8086)
1881 priv.orig_sizeflag = 0;
1885 for (p = info->disassembler_options; p != NULL; )
1887 if (strncmp (p, "x86-64", 6) == 0)
1890 priv.orig_sizeflag = AFLAG | DFLAG;
1892 else if (strncmp (p, "i386", 4) == 0)
1895 priv.orig_sizeflag = AFLAG | DFLAG;
1897 else if (strncmp (p, "i8086", 5) == 0)
1900 priv.orig_sizeflag = 0;
1902 else if (strncmp (p, "intel", 5) == 0)
1906 else if (strncmp (p, "att", 3) == 0)
1910 else if (strncmp (p, "addr", 4) == 0)
1912 if (p[4] == '1' && p[5] == '6')
1913 priv.orig_sizeflag &= ~AFLAG;
1914 else if (p[4] == '3' && p[5] == '2')
1915 priv.orig_sizeflag |= AFLAG;
1917 else if (strncmp (p, "data", 4) == 0)
1919 if (p[4] == '1' && p[5] == '6')
1920 priv.orig_sizeflag &= ~DFLAG;
1921 else if (p[4] == '3' && p[5] == '2')
1922 priv.orig_sizeflag |= DFLAG;
1924 else if (strncmp (p, "suffix", 6) == 0)
1925 priv.orig_sizeflag |= SUFFIX_ALWAYS;
1927 p = strchr (p, ',');
1934 names64 = intel_names64;
1935 names32 = intel_names32;
1936 names16 = intel_names16;
1937 names8 = intel_names8;
1938 names8rex = intel_names8rex;
1939 names_seg = intel_names_seg;
1940 index16 = intel_index16;
1943 separator_char = '+';
1948 names64 = att_names64;
1949 names32 = att_names32;
1950 names16 = att_names16;
1951 names8 = att_names8;
1952 names8rex = att_names8rex;
1953 names_seg = att_names_seg;
1954 index16 = att_index16;
1957 separator_char = ',';
1961 /* The output looks better if we put 7 bytes on a line, since that
1962 puts most long word instructions on a single line. */
1963 info->bytes_per_line = 7;
1965 info->private_data = (PTR) &priv;
1966 priv.max_fetched = priv.the_buffer;
1967 priv.insn_start = pc;
1974 op_index[0] = op_index[1] = op_index[2] = -1;
1978 start_codep = priv.the_buffer;
1979 codep = priv.the_buffer;
1981 if (setjmp (priv.bailout) != 0)
1985 /* Getting here means we tried for data but didn't get it. That
1986 means we have an incomplete instruction of some sort. Just
1987 print the first byte as a prefix or a .byte pseudo-op. */
1988 if (codep > priv.the_buffer)
1990 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
1992 (*info->fprintf_func) (info->stream, "%s", name);
1995 /* Just print the first byte as a .byte instruction. */
1996 (*info->fprintf_func) (info->stream, ".byte 0x%x",
1997 (unsigned int) priv.the_buffer[0]);
2010 sizeflag = priv.orig_sizeflag;
2012 FETCH_DATA (info, codep + 1);
2013 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2015 if ((prefixes & PREFIX_FWAIT)
2016 && ((*codep < 0xd8) || (*codep > 0xdf)))
2020 /* fwait not followed by floating point instruction. Print the
2021 first prefix, which is probably fwait itself. */
2022 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2024 name = INTERNAL_DISASSEMBLER_ERROR;
2025 (*info->fprintf_func) (info->stream, "%s", name);
2031 FETCH_DATA (info, codep + 2);
2032 dp = &dis386_twobyte[*++codep];
2033 need_modrm = twobyte_has_modrm[*codep];
2034 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2038 dp = &dis386[*codep];
2039 need_modrm = onebyte_has_modrm[*codep];
2040 uses_SSE_prefix = 0;
2044 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2047 used_prefixes |= PREFIX_REPZ;
2049 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2052 used_prefixes |= PREFIX_REPNZ;
2054 if (prefixes & PREFIX_LOCK)
2057 used_prefixes |= PREFIX_LOCK;
2060 if (prefixes & PREFIX_ADDR)
2063 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2065 if ((sizeflag & AFLAG) || mode_64bit)
2066 oappend ("addr32 ");
2068 oappend ("addr16 ");
2069 used_prefixes |= PREFIX_ADDR;
2073 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2076 if (dp->bytemode3 == cond_jump_mode
2077 && dp->bytemode1 == v_mode
2080 if (sizeflag & DFLAG)
2081 oappend ("data32 ");
2083 oappend ("data16 ");
2084 used_prefixes |= PREFIX_DATA;
2090 FETCH_DATA (info, codep + 1);
2091 mod = (*codep >> 6) & 3;
2092 reg = (*codep >> 3) & 7;
2096 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2103 if (dp->name == NULL)
2105 switch (dp->bytemode1)
2108 dp = &grps[dp->bytemode2][reg];
2111 case USE_PREFIX_USER_TABLE:
2113 used_prefixes |= (prefixes & PREFIX_REPZ);
2114 if (prefixes & PREFIX_REPZ)
2118 used_prefixes |= (prefixes & PREFIX_DATA);
2119 if (prefixes & PREFIX_DATA)
2123 used_prefixes |= (prefixes & PREFIX_REPNZ);
2124 if (prefixes & PREFIX_REPNZ)
2128 dp = &prefix_user_table[dp->bytemode2][index];
2131 case X86_64_SPECIAL:
2132 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2136 oappend (INTERNAL_DISASSEMBLER_ERROR);
2141 if (putop (dp->name, sizeflag) == 0)
2146 (*dp->op1) (dp->bytemode1, sizeflag);
2151 (*dp->op2) (dp->bytemode2, sizeflag);
2156 (*dp->op3) (dp->bytemode3, sizeflag);
2160 /* See if any prefixes were not used. If so, print the first one
2161 separately. If we don't do this, we'll wind up printing an
2162 instruction stream which does not precisely correspond to the
2163 bytes we are disassembling. */
2164 if ((prefixes & ~used_prefixes) != 0)
2168 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2170 name = INTERNAL_DISASSEMBLER_ERROR;
2171 (*info->fprintf_func) (info->stream, "%s", name);
2174 if (rex & ~rex_used)
2177 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2179 name = INTERNAL_DISASSEMBLER_ERROR;
2180 (*info->fprintf_func) (info->stream, "%s ", name);
2183 obufp = obuf + strlen (obuf);
2184 for (i = strlen (obuf); i < 6; i++)
2187 (*info->fprintf_func) (info->stream, "%s", obuf);
2189 /* The enter and bound instructions are printed with operands in the same
2190 order as the intel book; everything else is printed in reverse order. */
2191 if (intel_syntax || two_source_ops)
2196 op_ad = op_index[0];
2197 op_index[0] = op_index[2];
2198 op_index[2] = op_ad;
2209 if (op_index[0] != -1 && !op_riprel[0])
2210 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2212 (*info->fprintf_func) (info->stream, "%s", first);
2218 (*info->fprintf_func) (info->stream, ",");
2219 if (op_index[1] != -1 && !op_riprel[1])
2220 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2222 (*info->fprintf_func) (info->stream, "%s", second);
2228 (*info->fprintf_func) (info->stream, ",");
2229 if (op_index[2] != -1 && !op_riprel[2])
2230 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2232 (*info->fprintf_func) (info->stream, "%s", third);
2234 for (i = 0; i < 3; i++)
2235 if (op_index[i] != -1 && op_riprel[i])
2237 (*info->fprintf_func) (info->stream, " # ");
2238 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2239 + op_address[op_index[i]]), info);
2241 return codep - priv.the_buffer;
2244 static const char *float_mem[] = {
2320 #define STi OP_STi, 0
2322 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2323 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2324 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2325 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2326 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2327 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2328 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2329 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2330 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2332 static const struct dis386 float_reg[][8] = {
2335 { "fadd", ST, STi, XX },
2336 { "fmul", ST, STi, XX },
2337 { "fcom", STi, XX, XX },
2338 { "fcomp", STi, XX, XX },
2339 { "fsub", ST, STi, XX },
2340 { "fsubr", ST, STi, XX },
2341 { "fdiv", ST, STi, XX },
2342 { "fdivr", ST, STi, XX },
2346 { "fld", STi, XX, XX },
2347 { "fxch", STi, XX, XX },
2349 { "(bad)", XX, XX, XX },
2357 { "fcmovb", ST, STi, XX },
2358 { "fcmove", ST, STi, XX },
2359 { "fcmovbe",ST, STi, XX },
2360 { "fcmovu", ST, STi, XX },
2361 { "(bad)", XX, XX, XX },
2363 { "(bad)", XX, XX, XX },
2364 { "(bad)", XX, XX, XX },
2368 { "fcmovnb",ST, STi, XX },
2369 { "fcmovne",ST, STi, XX },
2370 { "fcmovnbe",ST, STi, XX },
2371 { "fcmovnu",ST, STi, XX },
2373 { "fucomi", ST, STi, XX },
2374 { "fcomi", ST, STi, XX },
2375 { "(bad)", XX, XX, XX },
2379 { "fadd", STi, ST, XX },
2380 { "fmul", STi, ST, XX },
2381 { "(bad)", XX, XX, XX },
2382 { "(bad)", XX, XX, XX },
2384 { "fsub", STi, ST, XX },
2385 { "fsubr", STi, ST, XX },
2386 { "fdiv", STi, ST, XX },
2387 { "fdivr", STi, ST, XX },
2389 { "fsubr", STi, ST, XX },
2390 { "fsub", STi, ST, XX },
2391 { "fdivr", STi, ST, XX },
2392 { "fdiv", STi, ST, XX },
2397 { "ffree", STi, XX, XX },
2398 { "(bad)", XX, XX, XX },
2399 { "fst", STi, XX, XX },
2400 { "fstp", STi, XX, XX },
2401 { "fucom", STi, XX, XX },
2402 { "fucomp", STi, XX, XX },
2403 { "(bad)", XX, XX, XX },
2404 { "(bad)", XX, XX, XX },
2408 { "faddp", STi, ST, XX },
2409 { "fmulp", STi, ST, XX },
2410 { "(bad)", XX, XX, XX },
2413 { "fsubp", STi, ST, XX },
2414 { "fsubrp", STi, ST, XX },
2415 { "fdivp", STi, ST, XX },
2416 { "fdivrp", STi, ST, XX },
2418 { "fsubrp", STi, ST, XX },
2419 { "fsubp", STi, ST, XX },
2420 { "fdivrp", STi, ST, XX },
2421 { "fdivp", STi, ST, XX },
2426 { "ffreep", STi, XX, XX },
2427 { "(bad)", XX, XX, XX },
2428 { "(bad)", XX, XX, XX },
2429 { "(bad)", XX, XX, XX },
2431 { "fucomip",ST, STi, XX },
2432 { "fcomip", ST, STi, XX },
2433 { "(bad)", XX, XX, XX },
2437 static const char *fgrps[][8] = {
2440 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2445 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2450 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2455 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2460 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2465 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2470 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2471 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2476 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2481 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2489 const struct dis386 *dp;
2490 unsigned char floatop;
2492 floatop = codep[-1];
2496 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag);
2498 if (floatop == 0xdb)
2499 OP_E (x_mode, sizeflag);
2500 else if (floatop == 0xdd)
2501 OP_E (d_mode, sizeflag);
2503 OP_E (v_mode, sizeflag);
2506 /* Skip mod/rm byte. */
2510 dp = &float_reg[floatop - 0xd8][reg];
2511 if (dp->name == NULL)
2513 putop (fgrps[dp->bytemode1][rm], sizeflag);
2515 /* Instruction fnstsw is only one with strange arg. */
2516 if (floatop == 0xdf && codep[-1] == 0xe0)
2517 pstrcpy (op1out, sizeof(op1out), names16[0]);
2521 putop (dp->name, sizeflag);
2525 (*dp->op1) (dp->bytemode1, sizeflag);
2528 (*dp->op2) (dp->bytemode2, sizeflag);
2533 OP_ST (bytemode, sizeflag)
2541 OP_STi (bytemode, sizeflag)
2545 snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", rm);
2546 oappend (scratchbuf + intel_syntax);
2549 /* Capital letters in template are macros. */
2551 putop (template, sizeflag)
2552 const char *template;
2558 for (p = template; *p; p++)
2577 /* Alternative not valid. */
2578 pstrcpy (obuf, sizeof(obuf), "(bad)");
2582 else if (*p == '\0')
2600 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2606 if (sizeflag & SUFFIX_ALWAYS)
2609 case 'E': /* For jcxz/jecxz */
2612 if (sizeflag & AFLAG)
2618 if (sizeflag & AFLAG)
2620 used_prefixes |= (prefixes & PREFIX_ADDR);
2625 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2627 if (sizeflag & AFLAG)
2628 *obufp++ = mode_64bit ? 'q' : 'l';
2630 *obufp++ = mode_64bit ? 'l' : 'w';
2631 used_prefixes |= (prefixes & PREFIX_ADDR);
2637 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2638 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2640 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2643 if (prefixes & PREFIX_DS)
2652 if (sizeflag & SUFFIX_ALWAYS)
2656 if ((prefixes & PREFIX_FWAIT) == 0)
2659 used_prefixes |= PREFIX_FWAIT;
2662 USED_REX (REX_MODE64);
2663 if (rex & REX_MODE64)
2680 if ((prefixes & PREFIX_DATA)
2681 || (rex & REX_MODE64)
2682 || (sizeflag & SUFFIX_ALWAYS))
2684 USED_REX (REX_MODE64);
2685 if (rex & REX_MODE64)
2689 if (sizeflag & DFLAG)
2693 used_prefixes |= (prefixes & PREFIX_DATA);
2709 USED_REX (REX_MODE64);
2710 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2712 if (rex & REX_MODE64)
2716 if (sizeflag & DFLAG)
2720 used_prefixes |= (prefixes & PREFIX_DATA);
2725 USED_REX (REX_MODE64);
2728 if (rex & REX_MODE64)
2733 else if (sizeflag & DFLAG)
2746 if (rex & REX_MODE64)
2748 else if (sizeflag & DFLAG)
2753 if (!(rex & REX_MODE64))
2754 used_prefixes |= (prefixes & PREFIX_DATA);
2759 if (sizeflag & SUFFIX_ALWAYS)
2761 if (rex & REX_MODE64)
2765 if (sizeflag & DFLAG)
2769 used_prefixes |= (prefixes & PREFIX_DATA);
2774 if (prefixes & PREFIX_DATA)
2778 used_prefixes |= (prefixes & PREFIX_DATA);
2783 if (rex & REX_MODE64)
2785 USED_REX (REX_MODE64);
2789 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2791 /* operand size flag for cwtl, cbtw */
2795 else if (sizeflag & DFLAG)
2806 if (sizeflag & DFLAG)
2817 used_prefixes |= (prefixes & PREFIX_DATA);
2830 obufp += strlen (s);
2836 if (prefixes & PREFIX_CS)
2838 used_prefixes |= PREFIX_CS;
2839 oappend ("%cs:" + intel_syntax);
2841 if (prefixes & PREFIX_DS)
2843 used_prefixes |= PREFIX_DS;
2844 oappend ("%ds:" + intel_syntax);
2846 if (prefixes & PREFIX_SS)
2848 used_prefixes |= PREFIX_SS;
2849 oappend ("%ss:" + intel_syntax);
2851 if (prefixes & PREFIX_ES)
2853 used_prefixes |= PREFIX_ES;
2854 oappend ("%es:" + intel_syntax);
2856 if (prefixes & PREFIX_FS)
2858 used_prefixes |= PREFIX_FS;
2859 oappend ("%fs:" + intel_syntax);
2861 if (prefixes & PREFIX_GS)
2863 used_prefixes |= PREFIX_GS;
2864 oappend ("%gs:" + intel_syntax);
2869 OP_indirE (bytemode, sizeflag)
2875 OP_E (bytemode, sizeflag);
2879 print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp)
2889 snprintf_vma (tmp, sizeof(tmp), disp);
2890 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
2891 pstrcpy (buf + 2, bufsize - 2, tmp + i);
2895 bfd_signed_vma v = disp;
2902 /* Check for possible overflow on 0x8000000000000000. */
2905 pstrcpy (buf, bufsize, "9223372036854775808");
2911 pstrcpy (buf, bufsize, "0");
2919 tmp[28 - i] = (v % 10) + '0';
2923 pstrcpy (buf, bufsize, tmp + 29 - i);
2929 snprintf (buf, bufsize, "0x%x", (unsigned int) disp);
2931 snprintf (buf, bufsize, "%d", (int) disp);
2936 OP_E (bytemode, sizeflag)
2943 USED_REX (REX_EXTZ);
2947 /* Skip mod/rm byte. */
2958 oappend (names8rex[rm + add]);
2960 oappend (names8[rm + add]);
2963 oappend (names16[rm + add]);
2966 oappend (names32[rm + add]);
2969 oappend (names64[rm + add]);
2973 oappend (names64[rm + add]);
2975 oappend (names32[rm + add]);
2978 USED_REX (REX_MODE64);
2979 if (rex & REX_MODE64)
2980 oappend (names64[rm + add]);
2981 else if (sizeflag & DFLAG)
2982 oappend (names32[rm + add]);
2984 oappend (names16[rm + add]);
2985 used_prefixes |= (prefixes & PREFIX_DATA);
2988 if (!(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */)
2989 && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */)
2990 && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */))
2991 BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
2994 oappend (INTERNAL_DISASSEMBLER_ERROR);
3003 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3018 FETCH_DATA (the_info, codep + 1);
3019 scale = (*codep >> 6) & 3;
3020 index = (*codep >> 3) & 7;
3022 USED_REX (REX_EXTY);
3023 USED_REX (REX_EXTZ);
3034 if ((base & 7) == 5)
3037 if (mode_64bit && !havesib && (sizeflag & AFLAG))
3043 FETCH_DATA (the_info, codep + 1);
3045 if ((disp & 0x80) != 0)
3054 if (mod != 0 || (base & 7) == 5)
3056 print_operand_value (scratchbuf, sizeof(scratchbuf), !riprel, disp);
3057 oappend (scratchbuf);
3065 if (havebase || (havesib && (index != 4 || scale != 0)))
3072 oappend ("BYTE PTR ");
3075 oappend ("WORD PTR ");
3078 oappend ("DWORD PTR ");
3081 oappend ("QWORD PTR ");
3085 oappend ("DWORD PTR ");
3087 oappend ("QWORD PTR ");
3090 oappend ("XWORD PTR ");
3096 *obufp++ = open_char;
3097 if (intel_syntax && riprel)
3100 USED_REX (REX_EXTZ);
3101 if (!havesib && (rex & REX_EXTZ))
3104 oappend (mode_64bit && (sizeflag & AFLAG)
3105 ? names64[base] : names32[base]);
3114 *obufp++ = separator_char;
3117 snprintf (scratchbuf, sizeof(scratchbuf), "%s",
3118 mode_64bit && (sizeflag & AFLAG)
3119 ? names64[index] : names32[index]);
3122 snprintf (scratchbuf, sizeof(scratchbuf), ",%s",
3123 mode_64bit && (sizeflag & AFLAG)
3124 ? names64[index] : names32[index]);
3125 oappend (scratchbuf);
3129 && bytemode != b_mode
3130 && bytemode != w_mode
3131 && bytemode != v_mode))
3133 *obufp++ = scale_char;
3135 snprintf (scratchbuf, sizeof(scratchbuf), "%d", 1 << scale);
3136 oappend (scratchbuf);
3140 if (mod != 0 || (base & 7) == 5)
3142 /* Don't print zero displacements. */
3145 if ((bfd_signed_vma) disp > 0)
3151 print_operand_value (scratchbuf, sizeof(scratchbuf), 0,
3153 oappend (scratchbuf);
3157 *obufp++ = close_char;
3160 else if (intel_syntax)
3162 if (mod != 0 || (base & 7) == 5)
3164 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3165 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3169 oappend (names_seg[ds_reg - es_reg]);
3172 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
3173 oappend (scratchbuf);
3178 { /* 16 bit address mode */
3185 if ((disp & 0x8000) != 0)
3190 FETCH_DATA (the_info, codep + 1);
3192 if ((disp & 0x80) != 0)
3197 if ((disp & 0x8000) != 0)
3203 if (mod != 0 || (rm & 7) == 6)
3205 print_operand_value (scratchbuf, sizeof(scratchbuf), 0, disp);
3206 oappend (scratchbuf);
3209 if (mod != 0 || (rm & 7) != 6)
3211 *obufp++ = open_char;
3213 oappend (index16[rm + add]);
3214 *obufp++ = close_char;
3221 OP_G (bytemode, sizeflag)
3226 USED_REX (REX_EXTX);
3234 oappend (names8rex[reg + add]);
3236 oappend (names8[reg + add]);
3239 oappend (names16[reg + add]);
3242 oappend (names32[reg + add]);
3245 oappend (names64[reg + add]);
3248 USED_REX (REX_MODE64);
3249 if (rex & REX_MODE64)
3250 oappend (names64[reg + add]);
3251 else if (sizeflag & DFLAG)
3252 oappend (names32[reg + add]);
3254 oappend (names16[reg + add]);
3255 used_prefixes |= (prefixes & PREFIX_DATA);
3258 oappend (INTERNAL_DISASSEMBLER_ERROR);
3271 FETCH_DATA (the_info, codep + 8);
3272 a = *codep++ & 0xff;
3273 a |= (*codep++ & 0xff) << 8;
3274 a |= (*codep++ & 0xff) << 16;
3275 a |= (*codep++ & 0xff) << 24;
3276 b = *codep++ & 0xff;
3277 b |= (*codep++ & 0xff) << 8;
3278 b |= (*codep++ & 0xff) << 16;
3279 b |= (*codep++ & 0xff) << 24;
3280 x = a + ((bfd_vma) b << 32);
3288 static bfd_signed_vma
3291 bfd_signed_vma x = 0;
3293 FETCH_DATA (the_info, codep + 4);
3294 x = *codep++ & (bfd_signed_vma) 0xff;
3295 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3296 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3297 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3301 static bfd_signed_vma
3304 bfd_signed_vma x = 0;
3306 FETCH_DATA (the_info, codep + 4);
3307 x = *codep++ & (bfd_signed_vma) 0xff;
3308 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3309 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3310 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3312 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3322 FETCH_DATA (the_info, codep + 2);
3323 x = *codep++ & 0xff;
3324 x |= (*codep++ & 0xff) << 8;
3333 op_index[op_ad] = op_ad;
3336 op_address[op_ad] = op;
3337 op_riprel[op_ad] = riprel;
3341 /* Mask to get a 32-bit address. */
3342 op_address[op_ad] = op & 0xffffffff;
3343 op_riprel[op_ad] = riprel & 0xffffffff;
3348 OP_REG (code, sizeflag)
3354 USED_REX (REX_EXTZ);
3366 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3367 case sp_reg: case bp_reg: case si_reg: case di_reg:
3368 s = names16[code - ax_reg + add];
3370 case es_reg: case ss_reg: case cs_reg:
3371 case ds_reg: case fs_reg: case gs_reg:
3372 s = names_seg[code - es_reg + add];
3374 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3375 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3378 s = names8rex[code - al_reg + add];
3380 s = names8[code - al_reg];
3382 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3383 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3386 s = names64[code - rAX_reg + add];
3389 code += eAX_reg - rAX_reg;
3391 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3392 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3393 USED_REX (REX_MODE64);
3394 if (rex & REX_MODE64)
3395 s = names64[code - eAX_reg + add];
3396 else if (sizeflag & DFLAG)
3397 s = names32[code - eAX_reg + add];
3399 s = names16[code - eAX_reg + add];
3400 used_prefixes |= (prefixes & PREFIX_DATA);
3403 s = INTERNAL_DISASSEMBLER_ERROR;
3410 OP_IMREG (code, sizeflag)
3424 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3425 case sp_reg: case bp_reg: case si_reg: case di_reg:
3426 s = names16[code - ax_reg];
3428 case es_reg: case ss_reg: case cs_reg:
3429 case ds_reg: case fs_reg: case gs_reg:
3430 s = names_seg[code - es_reg];
3432 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3433 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3436 s = names8rex[code - al_reg];
3438 s = names8[code - al_reg];
3440 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3441 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3442 USED_REX (REX_MODE64);
3443 if (rex & REX_MODE64)
3444 s = names64[code - eAX_reg];
3445 else if (sizeflag & DFLAG)
3446 s = names32[code - eAX_reg];
3448 s = names16[code - eAX_reg];
3449 used_prefixes |= (prefixes & PREFIX_DATA);
3452 s = INTERNAL_DISASSEMBLER_ERROR;
3459 OP_I (bytemode, sizeflag)
3464 bfd_signed_vma mask = -1;
3469 FETCH_DATA (the_info, codep + 1);
3481 USED_REX (REX_MODE64);
3482 if (rex & REX_MODE64)
3484 else if (sizeflag & DFLAG)
3494 used_prefixes |= (prefixes & PREFIX_DATA);
3501 oappend (INTERNAL_DISASSEMBLER_ERROR);
3506 scratchbuf[0] = '$';
3507 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
3508 oappend (scratchbuf + intel_syntax);
3509 scratchbuf[0] = '\0';
3513 OP_I64 (bytemode, sizeflag)
3518 bfd_signed_vma mask = -1;
3522 OP_I (bytemode, sizeflag);
3529 FETCH_DATA (the_info, codep + 1);
3534 USED_REX (REX_MODE64);
3535 if (rex & REX_MODE64)
3537 else if (sizeflag & DFLAG)
3547 used_prefixes |= (prefixes & PREFIX_DATA);
3554 oappend (INTERNAL_DISASSEMBLER_ERROR);
3559 scratchbuf[0] = '$';
3560 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
3561 oappend (scratchbuf + intel_syntax);
3562 scratchbuf[0] = '\0';
3566 OP_sI (bytemode, sizeflag)
3571 bfd_signed_vma mask = -1;
3576 FETCH_DATA (the_info, codep + 1);
3578 if ((op & 0x80) != 0)
3583 USED_REX (REX_MODE64);
3584 if (rex & REX_MODE64)
3586 else if (sizeflag & DFLAG)
3595 if ((op & 0x8000) != 0)
3598 used_prefixes |= (prefixes & PREFIX_DATA);
3603 if ((op & 0x8000) != 0)
3607 oappend (INTERNAL_DISASSEMBLER_ERROR);
3611 scratchbuf[0] = '$';
3612 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
3613 oappend (scratchbuf + intel_syntax);
3617 OP_J (bytemode, sizeflag)
3627 FETCH_DATA (the_info, codep + 1);
3629 if ((disp & 0x80) != 0)
3633 if (sizeflag & DFLAG)
3638 /* For some reason, a data16 prefix on a jump instruction
3639 means that the pc is masked to 16 bits after the
3640 displacement is added! */
3645 oappend (INTERNAL_DISASSEMBLER_ERROR);
3648 disp = (start_pc + codep - start_codep + disp) & mask;
3650 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
3651 oappend (scratchbuf);
3655 OP_SEG (dummy, sizeflag)
3659 oappend (names_seg[reg]);
3663 OP_DIR (dummy, sizeflag)
3669 if (sizeflag & DFLAG)
3679 used_prefixes |= (prefixes & PREFIX_DATA);
3681 snprintf (scratchbuf, sizeof(scratchbuf), "0x%x,0x%x", seg, offset);
3683 snprintf (scratchbuf, sizeof(scratchbuf), "$0x%x,$0x%x", seg, offset);
3684 oappend (scratchbuf);
3688 OP_OFF (bytemode, sizeflag)
3696 if ((sizeflag & AFLAG) || mode_64bit)
3703 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3704 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3706 oappend (names_seg[ds_reg - es_reg]);
3710 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
3711 oappend (scratchbuf);
3715 OP_OFF64 (bytemode, sizeflag)
3723 OP_OFF (bytemode, sizeflag);
3733 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3734 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3736 oappend (names_seg[ds_reg - es_reg]);
3740 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
3741 oappend (scratchbuf);
3745 ptr_reg (code, sizeflag)
3755 USED_REX (REX_MODE64);
3756 if (rex & REX_MODE64)
3758 if (!(sizeflag & AFLAG))
3759 s = names32[code - eAX_reg];
3761 s = names64[code - eAX_reg];
3763 else if (sizeflag & AFLAG)
3764 s = names32[code - eAX_reg];
3766 s = names16[code - eAX_reg];
3775 OP_ESreg (code, sizeflag)
3779 oappend ("%es:" + intel_syntax);
3780 ptr_reg (code, sizeflag);
3784 OP_DSreg (code, sizeflag)
3795 prefixes |= PREFIX_DS;
3797 ptr_reg (code, sizeflag);
3801 OP_C (dummy, sizeflag)
3806 USED_REX (REX_EXTX);
3809 snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", reg + add);
3810 oappend (scratchbuf + intel_syntax);
3814 OP_D (dummy, sizeflag)
3819 USED_REX (REX_EXTX);
3823 snprintf (scratchbuf, sizeof(scratchbuf), "db%d", reg + add);
3825 snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", reg + add);
3826 oappend (scratchbuf);
3830 OP_T (dummy, sizeflag)
3834 snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", reg);
3835 oappend (scratchbuf + intel_syntax);
3839 OP_Rd (bytemode, sizeflag)
3844 OP_E (bytemode, sizeflag);
3850 OP_MMX (bytemode, sizeflag)
3855 USED_REX (REX_EXTX);
3858 used_prefixes |= (prefixes & PREFIX_DATA);
3859 if (prefixes & PREFIX_DATA)
3860 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg + add);
3862 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", reg + add);
3863 oappend (scratchbuf + intel_syntax);
3867 OP_XMM (bytemode, sizeflag)
3872 USED_REX (REX_EXTX);
3875 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg + add);
3876 oappend (scratchbuf + intel_syntax);
3880 OP_EM (bytemode, sizeflag)
3887 OP_E (bytemode, sizeflag);
3890 USED_REX (REX_EXTZ);
3894 /* Skip mod/rm byte. */
3897 used_prefixes |= (prefixes & PREFIX_DATA);
3898 if (prefixes & PREFIX_DATA)
3899 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", rm + add);
3901 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", rm + add);
3902 oappend (scratchbuf + intel_syntax);
3906 OP_EX (bytemode, sizeflag)
3913 OP_E (bytemode, sizeflag);
3916 USED_REX (REX_EXTZ);
3920 /* Skip mod/rm byte. */
3923 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", rm + add);
3924 oappend (scratchbuf + intel_syntax);
3928 OP_MS (bytemode, sizeflag)
3933 OP_EM (bytemode, sizeflag);
3939 OP_XS (bytemode, sizeflag)
3944 OP_EX (bytemode, sizeflag);
3949 static const char *Suffix3DNow[] = {
3950 /* 00 */ NULL, NULL, NULL, NULL,
3951 /* 04 */ NULL, NULL, NULL, NULL,
3952 /* 08 */ NULL, NULL, NULL, NULL,
3953 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
3954 /* 10 */ NULL, NULL, NULL, NULL,
3955 /* 14 */ NULL, NULL, NULL, NULL,
3956 /* 18 */ NULL, NULL, NULL, NULL,
3957 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
3958 /* 20 */ NULL, NULL, NULL, NULL,
3959 /* 24 */ NULL, NULL, NULL, NULL,
3960 /* 28 */ NULL, NULL, NULL, NULL,
3961 /* 2C */ NULL, NULL, NULL, NULL,
3962 /* 30 */ NULL, NULL, NULL, NULL,
3963 /* 34 */ NULL, NULL, NULL, NULL,
3964 /* 38 */ NULL, NULL, NULL, NULL,
3965 /* 3C */ NULL, NULL, NULL, NULL,
3966 /* 40 */ NULL, NULL, NULL, NULL,
3967 /* 44 */ NULL, NULL, NULL, NULL,
3968 /* 48 */ NULL, NULL, NULL, NULL,
3969 /* 4C */ NULL, NULL, NULL, NULL,
3970 /* 50 */ NULL, NULL, NULL, NULL,
3971 /* 54 */ NULL, NULL, NULL, NULL,
3972 /* 58 */ NULL, NULL, NULL, NULL,
3973 /* 5C */ NULL, NULL, NULL, NULL,
3974 /* 60 */ NULL, NULL, NULL, NULL,
3975 /* 64 */ NULL, NULL, NULL, NULL,
3976 /* 68 */ NULL, NULL, NULL, NULL,
3977 /* 6C */ NULL, NULL, NULL, NULL,
3978 /* 70 */ NULL, NULL, NULL, NULL,
3979 /* 74 */ NULL, NULL, NULL, NULL,
3980 /* 78 */ NULL, NULL, NULL, NULL,
3981 /* 7C */ NULL, NULL, NULL, NULL,
3982 /* 80 */ NULL, NULL, NULL, NULL,
3983 /* 84 */ NULL, NULL, NULL, NULL,
3984 /* 88 */ NULL, NULL, "pfnacc", NULL,
3985 /* 8C */ NULL, NULL, "pfpnacc", NULL,
3986 /* 90 */ "pfcmpge", NULL, NULL, NULL,
3987 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
3988 /* 98 */ NULL, NULL, "pfsub", NULL,
3989 /* 9C */ NULL, NULL, "pfadd", NULL,
3990 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
3991 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
3992 /* A8 */ NULL, NULL, "pfsubr", NULL,
3993 /* AC */ NULL, NULL, "pfacc", NULL,
3994 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
3995 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
3996 /* B8 */ NULL, NULL, NULL, "pswapd",
3997 /* BC */ NULL, NULL, NULL, "pavgusb",
3998 /* C0 */ NULL, NULL, NULL, NULL,
3999 /* C4 */ NULL, NULL, NULL, NULL,
4000 /* C8 */ NULL, NULL, NULL, NULL,
4001 /* CC */ NULL, NULL, NULL, NULL,
4002 /* D0 */ NULL, NULL, NULL, NULL,
4003 /* D4 */ NULL, NULL, NULL, NULL,
4004 /* D8 */ NULL, NULL, NULL, NULL,
4005 /* DC */ NULL, NULL, NULL, NULL,
4006 /* E0 */ NULL, NULL, NULL, NULL,
4007 /* E4 */ NULL, NULL, NULL, NULL,
4008 /* E8 */ NULL, NULL, NULL, NULL,
4009 /* EC */ NULL, NULL, NULL, NULL,
4010 /* F0 */ NULL, NULL, NULL, NULL,
4011 /* F4 */ NULL, NULL, NULL, NULL,
4012 /* F8 */ NULL, NULL, NULL, NULL,
4013 /* FC */ NULL, NULL, NULL, NULL,
4017 OP_3DNowSuffix (bytemode, sizeflag)
4021 const char *mnemonic;
4023 FETCH_DATA (the_info, codep + 1);
4024 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4025 place where an 8-bit immediate would normally go. ie. the last
4026 byte of the instruction. */
4027 obufp = obuf + strlen (obuf);
4028 mnemonic = Suffix3DNow[*codep++ & 0xff];
4033 /* Since a variable sized modrm/sib chunk is between the start
4034 of the opcode (0x0f0f) and the opcode suffix, we need to do
4035 all the modrm processing first, and don't know until now that
4036 we have a bad opcode. This necessitates some cleaning up. */
4043 static const char *simd_cmp_op[] = {
4055 OP_SIMD_Suffix (bytemode, sizeflag)
4059 unsigned int cmp_type;
4061 FETCH_DATA (the_info, codep + 1);
4062 obufp = obuf + strlen (obuf);
4063 cmp_type = *codep++ & 0xff;
4066 char suffix1 = 'p', suffix2 = 's';
4067 used_prefixes |= (prefixes & PREFIX_REPZ);
4068 if (prefixes & PREFIX_REPZ)
4072 used_prefixes |= (prefixes & PREFIX_DATA);
4073 if (prefixes & PREFIX_DATA)
4077 used_prefixes |= (prefixes & PREFIX_REPNZ);
4078 if (prefixes & PREFIX_REPNZ)
4079 suffix1 = 's', suffix2 = 'd';
4082 snprintf (scratchbuf, sizeof(scratchbuf), "cmp%s%c%c",
4083 simd_cmp_op[cmp_type], suffix1, suffix2);
4084 used_prefixes |= (prefixes & PREFIX_REPZ);
4085 oappend (scratchbuf);
4089 /* We have a bad extension byte. Clean up. */
4097 SIMD_Fixup (extrachar, sizeflag)
4101 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4102 forms of these instructions. */
4105 char *p = obuf + strlen (obuf);
4108 *(p - 1) = *(p - 2);
4109 *(p - 2) = *(p - 3);
4110 *(p - 3) = extrachar;
4117 /* Throw away prefixes and 1st. opcode byte. */
4118 codep = insn_codep + 1;