1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com>
5 * Based on allwinner u-boot sources rsb code which is:
6 * (C) Copyright 2007-2013
7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8 * lixiang <lixiang@allwinnertech.com>
19 #include <asm/arch/cpu.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/prcm.h>
22 #include <asm/arch/rsb.h>
24 static int sun8i_rsb_await_trans(struct sunxi_rsb_reg *base)
26 unsigned long tmo = timer_get_us() + 1000000;
31 stat = readl(&base->stat);
32 if (stat & RSB_STAT_LBSY_INT) {
36 if (stat & RSB_STAT_TERR_INT) {
40 if (stat & RSB_STAT_TOVER_INT) {
44 if (timer_get_us() > tmo) {
49 writel(stat, &base->stat); /* Clear status bits */
54 static int sun8i_rsb_do_trans(struct sunxi_rsb_reg *base)
56 setbits_le32(&base->ctrl, RSB_CTRL_START_TRANS);
58 return sun8i_rsb_await_trans(base);
61 static int sun8i_rsb_read(struct sunxi_rsb_reg *base, u16 runtime_addr,
62 u8 reg_addr, u8 *data)
66 writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_addr), &base->devaddr);
67 writel(reg_addr, &base->addr);
68 writel(RSB_CMD_BYTE_READ, &base->cmd);
70 ret = sun8i_rsb_do_trans(base);
74 *data = readl(&base->data) & 0xff;
79 static int sun8i_rsb_write(struct sunxi_rsb_reg *base, u16 runtime_addr,
82 writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_addr), &base->devaddr);
83 writel(reg_addr, &base->addr);
84 writel(data, &base->data);
85 writel(RSB_CMD_BYTE_WRITE, &base->cmd);
87 return sun8i_rsb_do_trans(base);
90 static int sun8i_rsb_set_device_address(struct sunxi_rsb_reg *base,
91 u16 device_addr, u16 runtime_addr)
93 writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_addr) |
94 RSB_DEVADDR_DEVICE_ADDR(device_addr), &base->devaddr);
95 writel(RSB_CMD_SET_RTSADDR, &base->cmd);
97 return sun8i_rsb_do_trans(base);
100 static void sun8i_rsb_set_clk(struct sunxi_rsb_reg *base)
105 /* Source is Hosc24M, set RSB clk to 3Mhz */
106 div = 24000000 / 3000000 / 2 - 1;
111 writel((cd_odly << 8) | div, &base->ccr);
114 static int sun8i_rsb_set_device_mode(struct sunxi_rsb_reg *base)
116 unsigned long tmo = timer_get_us() + 1000000;
118 writel(RSB_DMCR_DEVICE_MODE_START | RSB_DMCR_DEVICE_MODE_DATA,
121 while (readl(&base->dmcr) & RSB_DMCR_DEVICE_MODE_START) {
122 if (timer_get_us() > tmo)
126 return sun8i_rsb_await_trans(base);
129 static int sun8i_rsb_init(struct sunxi_rsb_reg *base)
131 writel(RSB_CTRL_SOFT_RST, &base->ctrl);
132 sun8i_rsb_set_clk(base);
134 return sun8i_rsb_set_device_mode(base);
137 #if IS_ENABLED(CONFIG_AXP_PMIC_BUS)
138 int rsb_read(const u16 runtime_addr, const u8 reg_addr, u8 *data)
140 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
142 return sun8i_rsb_read(base, runtime_addr, reg_addr, data);
145 int rsb_write(const u16 runtime_addr, const u8 reg_addr, u8 data)
147 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
149 return sun8i_rsb_write(base, runtime_addr, reg_addr, data);
152 int rsb_set_device_address(u16 device_addr, u16 runtime_addr)
154 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
156 return sun8i_rsb_set_device_address(base, device_addr, runtime_addr);
161 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
163 /* Enable RSB and PIO clk, and de-assert their resets */
164 prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_RSB);
166 if (IS_ENABLED(CONFIG_MACH_SUN9I)) {
167 sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN_R_RSB);
168 sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN_R_RSB);
169 sunxi_gpio_set_pull(SUNXI_GPN(0), 1);
170 sunxi_gpio_set_pull(SUNXI_GPN(1), 1);
171 sunxi_gpio_set_drv(SUNXI_GPN(0), 2);
172 sunxi_gpio_set_drv(SUNXI_GPN(1), 2);
174 sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB);
175 sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB);
176 sunxi_gpio_set_pull(SUNXI_GPL(0), 1);
177 sunxi_gpio_set_pull(SUNXI_GPL(1), 1);
178 sunxi_gpio_set_drv(SUNXI_GPL(0), 2);
179 sunxi_gpio_set_drv(SUNXI_GPL(1), 2);
182 return sun8i_rsb_init(base);
186 #if CONFIG_IS_ENABLED(DM_I2C)
187 struct sun8i_rsb_priv {
188 struct sunxi_rsb_reg *base;
192 * The mapping from hardware address to runtime address is fixed, and shared
193 * among all RSB drivers. See the comment in drivers/bus/sunxi-rsb.c in Linux.
195 static int sun8i_rsb_get_runtime_address(u16 device_addr)
197 if (device_addr == AXP_PMIC_PRI_DEVICE_ADDR)
198 return AXP_PMIC_PRI_RUNTIME_ADDR;
199 if (device_addr == AXP_PMIC_SEC_DEVICE_ADDR)
200 return AXP_PMIC_SEC_RUNTIME_ADDR;
205 static int sun8i_rsb_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
207 int runtime_addr = sun8i_rsb_get_runtime_address(msg->addr);
208 struct sun8i_rsb_priv *priv = dev_get_priv(bus);
210 if (runtime_addr < 0)
213 /* The hardware only supports SMBus-style transfers. */
214 if (nmsgs == 2 && msg[1].flags == I2C_M_RD && msg[1].len == 1)
215 return sun8i_rsb_read(priv->base, runtime_addr,
216 msg[0].buf[0], &msg[1].buf[0]);
218 if (nmsgs == 1 && msg[0].len == 2)
219 return sun8i_rsb_write(priv->base, runtime_addr,
220 msg[0].buf[0], msg[0].buf[1]);
225 static int sun8i_rsb_probe_chip(struct udevice *bus, uint chip_addr,
228 int runtime_addr = sun8i_rsb_get_runtime_address(chip_addr);
229 struct sun8i_rsb_priv *priv = dev_get_priv(bus);
231 if (runtime_addr < 0)
234 return sun8i_rsb_set_device_address(priv->base, chip_addr, runtime_addr);
237 static int sun8i_rsb_probe(struct udevice *bus)
239 struct sun8i_rsb_priv *priv = dev_get_priv(bus);
240 struct reset_ctl *reset;
243 priv->base = dev_read_addr_ptr(bus);
245 reset = devm_reset_control_get(bus, NULL);
247 reset_deassert(reset);
249 clk = devm_clk_get(bus, NULL);
253 return sun8i_rsb_init(priv->base);
256 static int sun8i_rsb_child_pre_probe(struct udevice *child)
258 struct dm_i2c_chip *chip = dev_get_parent_plat(child);
259 struct udevice *bus = child->parent;
261 /* Ensure each transfer is for a single register. */
262 chip->flags |= DM_I2C_CHIP_RD_ADDRESS | DM_I2C_CHIP_WR_ADDRESS;
264 return sun8i_rsb_probe_chip(bus, chip->chip_addr, 0);
267 static const struct dm_i2c_ops sun8i_rsb_ops = {
268 .xfer = sun8i_rsb_xfer,
269 .probe_chip = sun8i_rsb_probe_chip,
272 static const struct udevice_id sun8i_rsb_ids[] = {
273 { .compatible = "allwinner,sun8i-a23-rsb" },
277 U_BOOT_DRIVER(sun8i_rsb) = {
280 .of_match = sun8i_rsb_ids,
281 .probe = sun8i_rsb_probe,
282 .child_pre_probe = sun8i_rsb_child_pre_probe,
283 .priv_auto = sizeof(struct sun8i_rsb_priv),
284 .ops = &sun8i_rsb_ops,
286 #endif /* CONFIG_IS_ENABLED(DM_I2C) */