This patch adds IFUNC support for arm gold backend.
[external/binutils.git] / gold / arm.cc
1 // arm.cc -- arm target support for gold.
2
3 // Copyright (C) 2009-2015 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
7 // bfd/elf32-arm.c.
8
9 // This file is part of gold.
10
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
15
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19 // GNU General Public License for more details.
20
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
25
26 #include "gold.h"
27
28 #include <cstring>
29 #include <limits>
30 #include <cstdio>
31 #include <string>
32 #include <algorithm>
33 #include <map>
34 #include <utility>
35 #include <set>
36
37 #include "elfcpp.h"
38 #include "parameters.h"
39 #include "reloc.h"
40 #include "arm.h"
41 #include "object.h"
42 #include "symtab.h"
43 #include "layout.h"
44 #include "output.h"
45 #include "copy-relocs.h"
46 #include "target.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
49 #include "tls.h"
50 #include "defstd.h"
51 #include "gc.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
54 #include "nacl.h"
55
56 namespace
57 {
58
59 using namespace gold;
60
61 template<bool big_endian>
62 class Output_data_plt_arm;
63
64 template<bool big_endian>
65 class Output_data_plt_arm_standard;
66
67 template<bool big_endian>
68 class Stub_table;
69
70 template<bool big_endian>
71 class Arm_input_section;
72
73 class Arm_exidx_cantunwind;
74
75 class Arm_exidx_merged_section;
76
77 class Arm_exidx_fixup;
78
79 template<bool big_endian>
80 class Arm_output_section;
81
82 class Arm_exidx_input_section;
83
84 template<bool big_endian>
85 class Arm_relobj;
86
87 template<bool big_endian>
88 class Arm_relocate_functions;
89
90 template<bool big_endian>
91 class Arm_output_data_got;
92
93 template<bool big_endian>
94 class Target_arm;
95
96 // For convenience.
97 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
98
99 // Maximum branch offsets for ARM, THUMB and THUMB2.
100 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
101 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
102 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
103 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
104 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
105 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
106
107 // Thread Control Block size.
108 const size_t ARM_TCB_SIZE = 8;
109
110 // The arm target class.
111 //
112 // This is a very simple port of gold for ARM-EABI.  It is intended for
113 // supporting Android only for the time being.
114 //
115 // TODOs:
116 // - Implement all static relocation types documented in arm-reloc.def.
117 // - Make PLTs more flexible for different architecture features like
118 //   Thumb-2 and BE8.
119 // There are probably a lot more.
120
121 // Ideally we would like to avoid using global variables but this is used
122 // very in many places and sometimes in loops.  If we use a function
123 // returning a static instance of Arm_reloc_property_table, it will be very
124 // slow in an threaded environment since the static instance needs to be
125 // locked.  The pointer is below initialized in the
126 // Target::do_select_as_default_target() hook so that we do not spend time
127 // building the table if we are not linking ARM objects.
128 //
129 // An alternative is to to process the information in arm-reloc.def in
130 // compilation time and generate a representation of it in PODs only.  That
131 // way we can avoid initialization when the linker starts.
132
133 Arm_reloc_property_table* arm_reloc_property_table = NULL;
134
135 // Instruction template class.  This class is similar to the insn_sequence
136 // struct in bfd/elf32-arm.c.
137
138 class Insn_template
139 {
140  public:
141   // Types of instruction templates.
142   enum Type
143     {
144       THUMB16_TYPE = 1,
145       // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
146       // templates with class-specific semantics.  Currently this is used
147       // only by the Cortex_a8_stub class for handling condition codes in
148       // conditional branches.
149       THUMB16_SPECIAL_TYPE,
150       THUMB32_TYPE,
151       ARM_TYPE,
152       DATA_TYPE
153     };
154
155   // Factory methods to create instruction templates in different formats.
156
157   static const Insn_template
158   thumb16_insn(uint32_t data)
159   { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
160
161   // A Thumb conditional branch, in which the proper condition is inserted
162   // when we build the stub.
163   static const Insn_template
164   thumb16_bcond_insn(uint32_t data)
165   { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
166
167   static const Insn_template
168   thumb32_insn(uint32_t data)
169   { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
170
171   static const Insn_template
172   thumb32_b_insn(uint32_t data, int reloc_addend)
173   {
174     return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
175                          reloc_addend);
176   }
177
178   static const Insn_template
179   arm_insn(uint32_t data)
180   { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
181
182   static const Insn_template
183   arm_rel_insn(unsigned data, int reloc_addend)
184   { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
185
186   static const Insn_template
187   data_word(unsigned data, unsigned int r_type, int reloc_addend)
188   { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
189
190   // Accessors.  This class is used for read-only objects so no modifiers
191   // are provided.
192
193   uint32_t
194   data() const
195   { return this->data_; }
196
197   // Return the instruction sequence type of this.
198   Type
199   type() const
200   { return this->type_; }
201
202   // Return the ARM relocation type of this.
203   unsigned int
204   r_type() const
205   { return this->r_type_; }
206
207   int32_t
208   reloc_addend() const
209   { return this->reloc_addend_; }
210
211   // Return size of instruction template in bytes.
212   size_t
213   size() const;
214
215   // Return byte-alignment of instruction template.
216   unsigned
217   alignment() const;
218
219  private:
220   // We make the constructor private to ensure that only the factory
221   // methods are used.
222   inline
223   Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
224     : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
225   { }
226
227   // Instruction specific data.  This is used to store information like
228   // some of the instruction bits.
229   uint32_t data_;
230   // Instruction template type.
231   Type type_;
232   // Relocation type if there is a relocation or R_ARM_NONE otherwise.
233   unsigned int r_type_;
234   // Relocation addend.
235   int32_t reloc_addend_;
236 };
237
238 // Macro for generating code to stub types. One entry per long/short
239 // branch stub
240
241 #define DEF_STUBS \
242   DEF_STUB(long_branch_any_any) \
243   DEF_STUB(long_branch_v4t_arm_thumb) \
244   DEF_STUB(long_branch_thumb_only) \
245   DEF_STUB(long_branch_v4t_thumb_thumb) \
246   DEF_STUB(long_branch_v4t_thumb_arm) \
247   DEF_STUB(short_branch_v4t_thumb_arm) \
248   DEF_STUB(long_branch_any_arm_pic) \
249   DEF_STUB(long_branch_any_thumb_pic) \
250   DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
251   DEF_STUB(long_branch_v4t_arm_thumb_pic) \
252   DEF_STUB(long_branch_v4t_thumb_arm_pic) \
253   DEF_STUB(long_branch_thumb_only_pic) \
254   DEF_STUB(a8_veneer_b_cond) \
255   DEF_STUB(a8_veneer_b) \
256   DEF_STUB(a8_veneer_bl) \
257   DEF_STUB(a8_veneer_blx) \
258   DEF_STUB(v4_veneer_bx)
259
260 // Stub types.
261
262 #define DEF_STUB(x) arm_stub_##x,
263 typedef enum
264   {
265     arm_stub_none,
266     DEF_STUBS
267
268     // First reloc stub type.
269     arm_stub_reloc_first = arm_stub_long_branch_any_any,
270     // Last  reloc stub type.
271     arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
272
273     // First Cortex-A8 stub type.
274     arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
275     // Last Cortex-A8 stub type.
276     arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
277
278     // Last stub type.
279     arm_stub_type_last = arm_stub_v4_veneer_bx
280   } Stub_type;
281 #undef DEF_STUB
282
283 // Stub template class.  Templates are meant to be read-only objects.
284 // A stub template for a stub type contains all read-only attributes
285 // common to all stubs of the same type.
286
287 class Stub_template
288 {
289  public:
290   Stub_template(Stub_type, const Insn_template*, size_t);
291
292   ~Stub_template()
293   { }
294
295   // Return stub type.
296   Stub_type
297   type() const
298   { return this->type_; }
299
300   // Return an array of instruction templates.
301   const Insn_template*
302   insns() const
303   { return this->insns_; }
304
305   // Return size of template in number of instructions.
306   size_t
307   insn_count() const
308   { return this->insn_count_; }
309
310   // Return size of template in bytes.
311   size_t
312   size() const
313   { return this->size_; }
314
315   // Return alignment of the stub template.
316   unsigned
317   alignment() const
318   { return this->alignment_; }
319
320   // Return whether entry point is in thumb mode.
321   bool
322   entry_in_thumb_mode() const
323   { return this->entry_in_thumb_mode_; }
324
325   // Return number of relocations in this template.
326   size_t
327   reloc_count() const
328   { return this->relocs_.size(); }
329
330   // Return index of the I-th instruction with relocation.
331   size_t
332   reloc_insn_index(size_t i) const
333   {
334     gold_assert(i < this->relocs_.size());
335     return this->relocs_[i].first;
336   }
337
338   // Return the offset of the I-th instruction with relocation from the
339   // beginning of the stub.
340   section_size_type
341   reloc_offset(size_t i) const
342   {
343     gold_assert(i < this->relocs_.size());
344     return this->relocs_[i].second;
345   }
346
347  private:
348   // This contains information about an instruction template with a relocation
349   // and its offset from start of stub.
350   typedef std::pair<size_t, section_size_type> Reloc;
351
352   // A Stub_template may not be copied.  We want to share templates as much
353   // as possible.
354   Stub_template(const Stub_template&);
355   Stub_template& operator=(const Stub_template&);
356
357   // Stub type.
358   Stub_type type_;
359   // Points to an array of Insn_templates.
360   const Insn_template* insns_;
361   // Number of Insn_templates in insns_[].
362   size_t insn_count_;
363   // Size of templated instructions in bytes.
364   size_t size_;
365   // Alignment of templated instructions.
366   unsigned alignment_;
367   // Flag to indicate if entry is in thumb mode.
368   bool entry_in_thumb_mode_;
369   // A table of reloc instruction indices and offsets.  We can find these by
370   // looking at the instruction templates but we pre-compute and then stash
371   // them here for speed.
372   std::vector<Reloc> relocs_;
373 };
374
375 //
376 // A class for code stubs.  This is a base class for different type of
377 // stubs used in the ARM target.
378 //
379
380 class Stub
381 {
382  private:
383   static const section_offset_type invalid_offset =
384     static_cast<section_offset_type>(-1);
385
386  public:
387   Stub(const Stub_template* stub_template)
388     : stub_template_(stub_template), offset_(invalid_offset)
389   { }
390
391   virtual
392    ~Stub()
393   { }
394
395   // Return the stub template.
396   const Stub_template*
397   stub_template() const
398   { return this->stub_template_; }
399
400   // Return offset of code stub from beginning of its containing stub table.
401   section_offset_type
402   offset() const
403   {
404     gold_assert(this->offset_ != invalid_offset);
405     return this->offset_;
406   }
407
408   // Set offset of code stub from beginning of its containing stub table.
409   void
410   set_offset(section_offset_type offset)
411   { this->offset_ = offset; }
412
413   // Return the relocation target address of the i-th relocation in the
414   // stub.  This must be defined in a child class.
415   Arm_address
416   reloc_target(size_t i)
417   { return this->do_reloc_target(i); }
418
419   // Write a stub at output VIEW.  BIG_ENDIAN select how a stub is written.
420   void
421   write(unsigned char* view, section_size_type view_size, bool big_endian)
422   { this->do_write(view, view_size, big_endian); }
423
424   // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
425   // for the i-th instruction.
426   uint16_t
427   thumb16_special(size_t i)
428   { return this->do_thumb16_special(i); }
429
430  protected:
431   // This must be defined in the child class.
432   virtual Arm_address
433   do_reloc_target(size_t) = 0;
434
435   // This may be overridden in the child class.
436   virtual void
437   do_write(unsigned char* view, section_size_type view_size, bool big_endian)
438   {
439     if (big_endian)
440       this->do_fixed_endian_write<true>(view, view_size);
441     else
442       this->do_fixed_endian_write<false>(view, view_size);
443   }
444
445   // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
446   // instruction template.
447   virtual uint16_t
448   do_thumb16_special(size_t)
449   { gold_unreachable(); }
450
451  private:
452   // A template to implement do_write.
453   template<bool big_endian>
454   void inline
455   do_fixed_endian_write(unsigned char*, section_size_type);
456
457   // Its template.
458   const Stub_template* stub_template_;
459   // Offset within the section of containing this stub.
460   section_offset_type offset_;
461 };
462
463 // Reloc stub class.  These are stubs we use to fix up relocation because
464 // of limited branch ranges.
465
466 class Reloc_stub : public Stub
467 {
468  public:
469   static const unsigned int invalid_index = static_cast<unsigned int>(-1);
470   // We assume we never jump to this address.
471   static const Arm_address invalid_address = static_cast<Arm_address>(-1);
472
473   // Return destination address.
474   Arm_address
475   destination_address() const
476   {
477     gold_assert(this->destination_address_ != this->invalid_address);
478     return this->destination_address_;
479   }
480
481   // Set destination address.
482   void
483   set_destination_address(Arm_address address)
484   {
485     gold_assert(address != this->invalid_address);
486     this->destination_address_ = address;
487   }
488
489   // Reset destination address.
490   void
491   reset_destination_address()
492   { this->destination_address_ = this->invalid_address; }
493
494   // Determine stub type for a branch of a relocation of R_TYPE going
495   // from BRANCH_ADDRESS to BRANCH_TARGET.  If TARGET_IS_THUMB is set,
496   // the branch target is a thumb instruction.  TARGET is used for look
497   // up ARM-specific linker settings.
498   static Stub_type
499   stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
500                       Arm_address branch_target, bool target_is_thumb);
501
502   // Reloc_stub key.  A key is logically a triplet of a stub type, a symbol
503   // and an addend.  Since we treat global and local symbol differently, we
504   // use a Symbol object for a global symbol and a object-index pair for
505   // a local symbol.
506   class Key
507   {
508    public:
509     // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
510     // R_SYM.  Otherwise, this is a local symbol and RELOBJ must non-NULL
511     // and R_SYM must not be invalid_index.
512     Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
513         unsigned int r_sym, int32_t addend)
514       : stub_type_(stub_type), addend_(addend)
515     {
516       if (symbol != NULL)
517         {
518           this->r_sym_ = Reloc_stub::invalid_index;
519           this->u_.symbol = symbol;
520         }
521       else
522         {
523           gold_assert(relobj != NULL && r_sym != invalid_index);
524           this->r_sym_ = r_sym;
525           this->u_.relobj = relobj;
526         }
527     }
528
529     ~Key()
530     { }
531
532     // Accessors: Keys are meant to be read-only object so no modifiers are
533     // provided.
534
535     // Return stub type.
536     Stub_type
537     stub_type() const
538     { return this->stub_type_; }
539
540     // Return the local symbol index or invalid_index.
541     unsigned int
542     r_sym() const
543     { return this->r_sym_; }
544
545     // Return the symbol if there is one.
546     const Symbol*
547     symbol() const
548     { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
549
550     // Return the relobj if there is one.
551     const Relobj*
552     relobj() const
553     { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
554
555     // Whether this equals to another key k.
556     bool
557     eq(const Key& k) const
558     {
559       return ((this->stub_type_ == k.stub_type_)
560               && (this->r_sym_ == k.r_sym_)
561               && ((this->r_sym_ != Reloc_stub::invalid_index)
562                   ? (this->u_.relobj == k.u_.relobj)
563                   : (this->u_.symbol == k.u_.symbol))
564               && (this->addend_ == k.addend_));
565     }
566
567     // Return a hash value.
568     size_t
569     hash_value() const
570     {
571       return (this->stub_type_
572               ^ this->r_sym_
573               ^ gold::string_hash<char>(
574                     (this->r_sym_ != Reloc_stub::invalid_index)
575                     ? this->u_.relobj->name().c_str()
576                     : this->u_.symbol->name())
577               ^ this->addend_);
578     }
579
580     // Functors for STL associative containers.
581     struct hash
582     {
583       size_t
584       operator()(const Key& k) const
585       { return k.hash_value(); }
586     };
587
588     struct equal_to
589     {
590       bool
591       operator()(const Key& k1, const Key& k2) const
592       { return k1.eq(k2); }
593     };
594
595     // Name of key.  This is mainly for debugging.
596     std::string
597     name() const;
598
599    private:
600     // Stub type.
601     Stub_type stub_type_;
602     // If this is a local symbol, this is the index in the defining object.
603     // Otherwise, it is invalid_index for a global symbol.
604     unsigned int r_sym_;
605     // If r_sym_ is an invalid index, this points to a global symbol.
606     // Otherwise, it points to a relobj.  We used the unsized and target
607     // independent Symbol and Relobj classes instead of Sized_symbol<32> and
608     // Arm_relobj, in order to avoid making the stub class a template
609     // as most of the stub machinery is endianness-neutral.  However, it
610     // may require a bit of casting done by users of this class.
611     union
612     {
613       const Symbol* symbol;
614       const Relobj* relobj;
615     } u_;
616     // Addend associated with a reloc.
617     int32_t addend_;
618   };
619
620  protected:
621   // Reloc_stubs are created via a stub factory.  So these are protected.
622   Reloc_stub(const Stub_template* stub_template)
623     : Stub(stub_template), destination_address_(invalid_address)
624   { }
625
626   ~Reloc_stub()
627   { }
628
629   friend class Stub_factory;
630
631   // Return the relocation target address of the i-th relocation in the
632   // stub.
633   Arm_address
634   do_reloc_target(size_t i)
635   {
636     // All reloc stub have only one relocation.
637     gold_assert(i == 0);
638     return this->destination_address_;
639   }
640
641  private:
642   // Address of destination.
643   Arm_address destination_address_;
644 };
645
646 // Cortex-A8 stub class.  We need a Cortex-A8 stub to redirect any 32-bit
647 // THUMB branch that meets the following conditions:
648 //
649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
650 //    branch address is 0xffe.
651 // 2. The branch target address is in the same page as the first word of the
652 //    branch.
653 // 3. The branch follows a 32-bit instruction which is not a branch.
654 //
655 // To do the fix up, we need to store the address of the branch instruction
656 // and its target at least.  We also need to store the original branch
657 // instruction bits for the condition code in a conditional branch.  The
658 // condition code is used in a special instruction template.  We also want
659 // to identify input sections needing Cortex-A8 workaround quickly.  We store
660 // extra information about object and section index of the code section
661 // containing a branch being fixed up.  The information is used to mark
662 // the code section when we finalize the Cortex-A8 stubs.
663 //
664
665 class Cortex_a8_stub : public Stub
666 {
667  public:
668   ~Cortex_a8_stub()
669   { }
670
671   // Return the object of the code section containing the branch being fixed
672   // up.
673   Relobj*
674   relobj() const
675   { return this->relobj_; }
676
677   // Return the section index of the code section containing the branch being
678   // fixed up.
679   unsigned int
680   shndx() const
681   { return this->shndx_; }
682
683   // Return the source address of stub.  This is the address of the original
684   // branch instruction.  LSB is 1 always set to indicate that it is a THUMB
685   // instruction.
686   Arm_address
687   source_address() const
688   { return this->source_address_; }
689
690   // Return the destination address of the stub.  This is the branch taken
691   // address of the original branch instruction.  LSB is 1 if it is a THUMB
692   // instruction address.
693   Arm_address
694   destination_address() const
695   { return this->destination_address_; }
696
697   // Return the instruction being fixed up.
698   uint32_t
699   original_insn() const
700   { return this->original_insn_; }
701
702  protected:
703   // Cortex_a8_stubs are created via a stub factory.  So these are protected.
704   Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
705                  unsigned int shndx, Arm_address source_address,
706                  Arm_address destination_address, uint32_t original_insn)
707     : Stub(stub_template), relobj_(relobj), shndx_(shndx),
708       source_address_(source_address | 1U),
709       destination_address_(destination_address),
710       original_insn_(original_insn)
711   { }
712
713   friend class Stub_factory;
714
715   // Return the relocation target address of the i-th relocation in the
716   // stub.
717   Arm_address
718   do_reloc_target(size_t i)
719   {
720     if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
721       {
722         // The conditional branch veneer has two relocations.
723         gold_assert(i < 2);
724         return i == 0 ? this->source_address_ + 4 : this->destination_address_;
725       }
726     else
727       {
728         // All other Cortex-A8 stubs have only one relocation.
729         gold_assert(i == 0);
730         return this->destination_address_;
731       }
732   }
733
734   // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
735   uint16_t
736   do_thumb16_special(size_t);
737
738  private:
739   // Object of the code section containing the branch being fixed up.
740   Relobj* relobj_;
741   // Section index of the code section containing the branch begin fixed up.
742   unsigned int shndx_;
743   // Source address of original branch.
744   Arm_address source_address_;
745   // Destination address of the original branch.
746   Arm_address destination_address_;
747   // Original branch instruction.  This is needed for copying the condition
748   // code from a condition branch to its stub.
749   uint32_t original_insn_;
750 };
751
752 // ARMv4 BX Rx branch relocation stub class.
753 class Arm_v4bx_stub : public Stub
754 {
755  public:
756   ~Arm_v4bx_stub()
757   { }
758
759   // Return the associated register.
760   uint32_t
761   reg() const
762   { return this->reg_; }
763
764  protected:
765   // Arm V4BX stubs are created via a stub factory.  So these are protected.
766   Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
767     : Stub(stub_template), reg_(reg)
768   { }
769
770   friend class Stub_factory;
771
772   // Return the relocation target address of the i-th relocation in the
773   // stub.
774   Arm_address
775   do_reloc_target(size_t)
776   { gold_unreachable(); }
777
778   // This may be overridden in the child class.
779   virtual void
780   do_write(unsigned char* view, section_size_type view_size, bool big_endian)
781   {
782     if (big_endian)
783       this->do_fixed_endian_v4bx_write<true>(view, view_size);
784     else
785       this->do_fixed_endian_v4bx_write<false>(view, view_size);
786   }
787
788  private:
789   // A template to implement do_write.
790   template<bool big_endian>
791   void inline
792   do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
793   {
794     const Insn_template* insns = this->stub_template()->insns();
795     elfcpp::Swap<32, big_endian>::writeval(view,
796                                            (insns[0].data()
797                                            + (this->reg_ << 16)));
798     view += insns[0].size();
799     elfcpp::Swap<32, big_endian>::writeval(view,
800                                            (insns[1].data() + this->reg_));
801     view += insns[1].size();
802     elfcpp::Swap<32, big_endian>::writeval(view,
803                                            (insns[2].data() + this->reg_));
804   }
805
806   // A register index (r0-r14), which is associated with the stub.
807   uint32_t reg_;
808 };
809
810 // Stub factory class.
811
812 class Stub_factory
813 {
814  public:
815   // Return the unique instance of this class.
816   static const Stub_factory&
817   get_instance()
818   {
819     static Stub_factory singleton;
820     return singleton;
821   }
822
823   // Make a relocation stub.
824   Reloc_stub*
825   make_reloc_stub(Stub_type stub_type) const
826   {
827     gold_assert(stub_type >= arm_stub_reloc_first
828                 && stub_type <= arm_stub_reloc_last);
829     return new Reloc_stub(this->stub_templates_[stub_type]);
830   }
831
832   // Make a Cortex-A8 stub.
833   Cortex_a8_stub*
834   make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
835                       Arm_address source, Arm_address destination,
836                       uint32_t original_insn) const
837   {
838     gold_assert(stub_type >= arm_stub_cortex_a8_first
839                 && stub_type <= arm_stub_cortex_a8_last);
840     return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
841                               source, destination, original_insn);
842   }
843
844   // Make an ARM V4BX relocation stub.
845   // This method creates a stub from the arm_stub_v4_veneer_bx template only.
846   Arm_v4bx_stub*
847   make_arm_v4bx_stub(uint32_t reg) const
848   {
849     gold_assert(reg < 0xf);
850     return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
851                              reg);
852   }
853
854  private:
855   // Constructor and destructor are protected since we only return a single
856   // instance created in Stub_factory::get_instance().
857
858   Stub_factory();
859
860   // A Stub_factory may not be copied since it is a singleton.
861   Stub_factory(const Stub_factory&);
862   Stub_factory& operator=(Stub_factory&);
863
864   // Stub templates.  These are initialized in the constructor.
865   const Stub_template* stub_templates_[arm_stub_type_last+1];
866 };
867
868 // A class to hold stubs for the ARM target.
869
870 template<bool big_endian>
871 class Stub_table : public Output_data
872 {
873  public:
874   Stub_table(Arm_input_section<big_endian>* owner)
875     : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0),
876       reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
877       prev_data_size_(0), prev_addralign_(1)
878   { }
879
880   ~Stub_table()
881   { }
882
883   // Owner of this stub table.
884   Arm_input_section<big_endian>*
885   owner() const
886   { return this->owner_; }
887
888   // Whether this stub table is empty.
889   bool
890   empty() const
891   {
892     return (this->reloc_stubs_.empty()
893             && this->cortex_a8_stubs_.empty()
894             && this->arm_v4bx_stubs_.empty());
895   }
896
897   // Return the current data size.
898   off_t
899   current_data_size() const
900   { return this->current_data_size_for_child(); }
901
902   // Add a STUB using KEY.  The caller is responsible for avoiding addition
903   // if a STUB with the same key has already been added.
904   void
905   add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
906   {
907     const Stub_template* stub_template = stub->stub_template();
908     gold_assert(stub_template->type() == key.stub_type());
909     this->reloc_stubs_[key] = stub;
910
911     // Assign stub offset early.  We can do this because we never remove
912     // reloc stubs and they are in the beginning of the stub table.
913     uint64_t align = stub_template->alignment();
914     this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align);
915     stub->set_offset(this->reloc_stubs_size_);
916     this->reloc_stubs_size_ += stub_template->size();
917     this->reloc_stubs_addralign_ =
918       std::max(this->reloc_stubs_addralign_, align);
919   }
920
921   // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
922   // The caller is responsible for avoiding addition if a STUB with the same
923   // address has already been added.
924   void
925   add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
926   {
927     std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
928     this->cortex_a8_stubs_.insert(value);
929   }
930
931   // Add an ARM V4BX relocation stub. A register index will be retrieved
932   // from the stub.
933   void
934   add_arm_v4bx_stub(Arm_v4bx_stub* stub)
935   {
936     gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
937     this->arm_v4bx_stubs_[stub->reg()] = stub;
938   }
939
940   // Remove all Cortex-A8 stubs.
941   void
942   remove_all_cortex_a8_stubs();
943
944   // Look up a relocation stub using KEY.  Return NULL if there is none.
945   Reloc_stub*
946   find_reloc_stub(const Reloc_stub::Key& key) const
947   {
948     typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
949     return (p != this->reloc_stubs_.end()) ? p->second : NULL;
950   }
951
952   // Look up an arm v4bx relocation stub using the register index.
953   // Return NULL if there is none.
954   Arm_v4bx_stub*
955   find_arm_v4bx_stub(const uint32_t reg) const
956   {
957     gold_assert(reg < 0xf);
958     return this->arm_v4bx_stubs_[reg];
959   }
960
961   // Relocate stubs in this stub table.
962   void
963   relocate_stubs(const Relocate_info<32, big_endian>*,
964                  Target_arm<big_endian>*, Output_section*,
965                  unsigned char*, Arm_address, section_size_type);
966
967   // Update data size and alignment at the end of a relaxation pass.  Return
968   // true if either data size or alignment is different from that of the
969   // previous relaxation pass.
970   bool
971   update_data_size_and_addralign();
972
973   // Finalize stubs.  Set the offsets of all stubs and mark input sections
974   // needing the Cortex-A8 workaround.
975   void
976   finalize_stubs();
977
978   // Apply Cortex-A8 workaround to an address range.
979   void
980   apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
981                                               unsigned char*, Arm_address,
982                                               section_size_type);
983
984  protected:
985   // Write out section contents.
986   void
987   do_write(Output_file*);
988
989   // Return the required alignment.
990   uint64_t
991   do_addralign() const
992   { return this->prev_addralign_; }
993
994   // Reset address and file offset.
995   void
996   do_reset_address_and_file_offset()
997   { this->set_current_data_size_for_child(this->prev_data_size_); }
998
999   // Set final data size.
1000   void
1001   set_final_data_size()
1002   { this->set_data_size(this->current_data_size()); }
1003
1004  private:
1005   // Relocate one stub.
1006   void
1007   relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
1008                 Target_arm<big_endian>*, Output_section*,
1009                 unsigned char*, Arm_address, section_size_type);
1010
1011   // Unordered map of relocation stubs.
1012   typedef
1013     Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
1014                   Reloc_stub::Key::equal_to>
1015     Reloc_stub_map;
1016
1017   // List of Cortex-A8 stubs ordered by addresses of branches being
1018   // fixed up in output.
1019   typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1020   // List of Arm V4BX relocation stubs ordered by associated registers.
1021   typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1022
1023   // Owner of this stub table.
1024   Arm_input_section<big_endian>* owner_;
1025   // The relocation stubs.
1026   Reloc_stub_map reloc_stubs_;
1027   // Size of reloc stubs.
1028   off_t reloc_stubs_size_;
1029   // Maximum address alignment of reloc stubs.
1030   uint64_t reloc_stubs_addralign_;
1031   // The cortex_a8_stubs.
1032   Cortex_a8_stub_list cortex_a8_stubs_;
1033   // The Arm V4BX relocation stubs.
1034   Arm_v4bx_stub_list arm_v4bx_stubs_;
1035   // data size of this in the previous pass.
1036   off_t prev_data_size_;
1037   // address alignment of this in the previous pass.
1038   uint64_t prev_addralign_;
1039 };
1040
1041 // Arm_exidx_cantunwind class.  This represents an EXIDX_CANTUNWIND entry
1042 // we add to the end of an EXIDX input section that goes into the output.
1043
1044 class Arm_exidx_cantunwind : public Output_section_data
1045 {
1046  public:
1047   Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1048     : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1049   { }
1050
1051   // Return the object containing the section pointed by this.
1052   Relobj*
1053   relobj() const
1054   { return this->relobj_; }
1055
1056   // Return the section index of the section pointed by this.
1057   unsigned int
1058   shndx() const
1059   { return this->shndx_; }
1060
1061  protected:
1062   void
1063   do_write(Output_file* of)
1064   {
1065     if (parameters->target().is_big_endian())
1066       this->do_fixed_endian_write<true>(of);
1067     else
1068       this->do_fixed_endian_write<false>(of);
1069   }
1070
1071   // Write to a map file.
1072   void
1073   do_print_to_mapfile(Mapfile* mapfile) const
1074   { mapfile->print_output_data(this, _("** ARM cantunwind")); }
1075
1076  private:
1077   // Implement do_write for a given endianness.
1078   template<bool big_endian>
1079   void inline
1080   do_fixed_endian_write(Output_file*);
1081
1082   // The object containing the section pointed by this.
1083   Relobj* relobj_;
1084   // The section index of the section pointed by this.
1085   unsigned int shndx_;
1086 };
1087
1088 // During EXIDX coverage fix-up, we compact an EXIDX section.  The
1089 // Offset map is used to map input section offset within the EXIDX section
1090 // to the output offset from the start of this EXIDX section.
1091
1092 typedef std::map<section_offset_type, section_offset_type>
1093         Arm_exidx_section_offset_map;
1094
1095 // Arm_exidx_merged_section class.  This represents an EXIDX input section
1096 // with some of its entries merged.
1097
1098 class Arm_exidx_merged_section : public Output_relaxed_input_section
1099 {
1100  public:
1101   // Constructor for Arm_exidx_merged_section.
1102   // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1103   // SECTION_OFFSET_MAP points to a section offset map describing how
1104   // parts of the input section are mapped to output.  DELETED_BYTES is
1105   // the number of bytes deleted from the EXIDX input section.
1106   Arm_exidx_merged_section(
1107       const Arm_exidx_input_section& exidx_input_section,
1108       const Arm_exidx_section_offset_map& section_offset_map,
1109       uint32_t deleted_bytes);
1110
1111   // Build output contents.
1112   void
1113   build_contents(const unsigned char*, section_size_type);
1114
1115   // Return the original EXIDX input section.
1116   const Arm_exidx_input_section&
1117   exidx_input_section() const
1118   { return this->exidx_input_section_; }
1119
1120   // Return the section offset map.
1121   const Arm_exidx_section_offset_map&
1122   section_offset_map() const
1123   { return this->section_offset_map_; }
1124
1125  protected:
1126   // Write merged section into file OF.
1127   void
1128   do_write(Output_file* of);
1129
1130   bool
1131   do_output_offset(const Relobj*, unsigned int, section_offset_type,
1132                   section_offset_type*) const;
1133
1134  private:
1135   // Original EXIDX input section.
1136   const Arm_exidx_input_section& exidx_input_section_;
1137   // Section offset map.
1138   const Arm_exidx_section_offset_map& section_offset_map_;
1139   // Merged section contents.  We need to keep build the merged section
1140   // and save it here to avoid accessing the original EXIDX section when
1141   // we cannot lock the sections' object.
1142   unsigned char* section_contents_;
1143 };
1144
1145 // A class to wrap an ordinary input section containing executable code.
1146
1147 template<bool big_endian>
1148 class Arm_input_section : public Output_relaxed_input_section
1149 {
1150  public:
1151   Arm_input_section(Relobj* relobj, unsigned int shndx)
1152     : Output_relaxed_input_section(relobj, shndx, 1),
1153       original_addralign_(1), original_size_(0), stub_table_(NULL),
1154       original_contents_(NULL)
1155   { }
1156
1157   ~Arm_input_section()
1158   { delete[] this->original_contents_; }
1159
1160   // Initialize.
1161   void
1162   init();
1163
1164   // Whether this is a stub table owner.
1165   bool
1166   is_stub_table_owner() const
1167   { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1168
1169   // Return the stub table.
1170   Stub_table<big_endian>*
1171   stub_table() const
1172   { return this->stub_table_; }
1173
1174   // Set the stub_table.
1175   void
1176   set_stub_table(Stub_table<big_endian>* stub_table)
1177   { this->stub_table_ = stub_table; }
1178
1179   // Downcast a base pointer to an Arm_input_section pointer.  This is
1180   // not type-safe but we only use Arm_input_section not the base class.
1181   static Arm_input_section<big_endian>*
1182   as_arm_input_section(Output_relaxed_input_section* poris)
1183   { return static_cast<Arm_input_section<big_endian>*>(poris); }
1184
1185   // Return the original size of the section.
1186   uint32_t
1187   original_size() const
1188   { return this->original_size_; }
1189
1190  protected:
1191   // Write data to output file.
1192   void
1193   do_write(Output_file*);
1194
1195   // Return required alignment of this.
1196   uint64_t
1197   do_addralign() const
1198   {
1199     if (this->is_stub_table_owner())
1200       return std::max(this->stub_table_->addralign(),
1201                       static_cast<uint64_t>(this->original_addralign_));
1202     else
1203       return this->original_addralign_;
1204   }
1205
1206   // Finalize data size.
1207   void
1208   set_final_data_size();
1209
1210   // Reset address and file offset.
1211   void
1212   do_reset_address_and_file_offset();
1213
1214   // Output offset.
1215   bool
1216   do_output_offset(const Relobj* object, unsigned int shndx,
1217                    section_offset_type offset,
1218                    section_offset_type* poutput) const
1219   {
1220     if ((object == this->relobj())
1221         && (shndx == this->shndx())
1222         && (offset >= 0)
1223         && (offset <=
1224             convert_types<section_offset_type, uint32_t>(this->original_size_)))
1225       {
1226         *poutput = offset;
1227         return true;
1228       }
1229     else
1230       return false;
1231   }
1232
1233  private:
1234   // Copying is not allowed.
1235   Arm_input_section(const Arm_input_section&);
1236   Arm_input_section& operator=(const Arm_input_section&);
1237
1238   // Address alignment of the original input section.
1239   uint32_t original_addralign_;
1240   // Section size of the original input section.
1241   uint32_t original_size_;
1242   // Stub table.
1243   Stub_table<big_endian>* stub_table_;
1244   // Original section contents.  We have to make a copy here since the file
1245   // containing the original section may not be locked when we need to access
1246   // the contents.
1247   unsigned char* original_contents_;
1248 };
1249
1250 // Arm_exidx_fixup class.  This is used to define a number of methods
1251 // and keep states for fixing up EXIDX coverage.
1252
1253 class Arm_exidx_fixup
1254 {
1255  public:
1256   Arm_exidx_fixup(Output_section* exidx_output_section,
1257                   bool merge_exidx_entries = true)
1258     : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1259       last_inlined_entry_(0), last_input_section_(NULL),
1260       section_offset_map_(NULL), first_output_text_section_(NULL),
1261       merge_exidx_entries_(merge_exidx_entries)
1262   { }
1263
1264   ~Arm_exidx_fixup()
1265   { delete this->section_offset_map_; }
1266
1267   // Process an EXIDX section for entry merging.  SECTION_CONTENTS points
1268   // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1269   // number of bytes to be deleted in output.  If parts of the input EXIDX
1270   // section are merged a heap allocated Arm_exidx_section_offset_map is store
1271   // in the located PSECTION_OFFSET_MAP.   The caller owns the map and is
1272   // responsible for releasing it.
1273   template<bool big_endian>
1274   uint32_t
1275   process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1276                         const unsigned char* section_contents,
1277                         section_size_type section_size,
1278                         Arm_exidx_section_offset_map** psection_offset_map);
1279
1280   // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1281   // input section, if there is not one already.
1282   void
1283   add_exidx_cantunwind_as_needed();
1284
1285   // Return the output section for the text section which is linked to the
1286   // first exidx input in output.
1287   Output_section*
1288   first_output_text_section() const
1289   { return this->first_output_text_section_; }
1290
1291  private:
1292   // Copying is not allowed.
1293   Arm_exidx_fixup(const Arm_exidx_fixup&);
1294   Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1295
1296   // Type of EXIDX unwind entry.
1297   enum Unwind_type
1298   {
1299     // No type.
1300     UT_NONE,
1301     // EXIDX_CANTUNWIND.
1302     UT_EXIDX_CANTUNWIND,
1303     // Inlined entry.
1304     UT_INLINED_ENTRY,
1305     // Normal entry.
1306     UT_NORMAL_ENTRY,
1307   };
1308
1309   // Process an EXIDX entry.  We only care about the second word of the
1310   // entry.  Return true if the entry can be deleted.
1311   bool
1312   process_exidx_entry(uint32_t second_word);
1313
1314   // Update the current section offset map during EXIDX section fix-up.
1315   // If there is no map, create one.  INPUT_OFFSET is the offset of a
1316   // reference point, DELETED_BYTES is the number of deleted by in the
1317   // section so far.  If DELETE_ENTRY is true, the reference point and
1318   // all offsets after the previous reference point are discarded.
1319   void
1320   update_offset_map(section_offset_type input_offset,
1321                     section_size_type deleted_bytes, bool delete_entry);
1322
1323   // EXIDX output section.
1324   Output_section* exidx_output_section_;
1325   // Unwind type of the last EXIDX entry processed.
1326   Unwind_type last_unwind_type_;
1327   // Last seen inlined EXIDX entry.
1328   uint32_t last_inlined_entry_;
1329   // Last processed EXIDX input section.
1330   const Arm_exidx_input_section* last_input_section_;
1331   // Section offset map created in process_exidx_section.
1332   Arm_exidx_section_offset_map* section_offset_map_;
1333   // Output section for the text section which is linked to the first exidx
1334   // input in output.
1335   Output_section* first_output_text_section_;
1336
1337   bool merge_exidx_entries_;
1338 };
1339
1340 // Arm output section class.  This is defined mainly to add a number of
1341 // stub generation methods.
1342
1343 template<bool big_endian>
1344 class Arm_output_section : public Output_section
1345 {
1346  public:
1347   typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1348
1349   // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1350   Arm_output_section(const char* name, elfcpp::Elf_Word type,
1351                      elfcpp::Elf_Xword flags)
1352     : Output_section(name, type,
1353                      (type == elfcpp::SHT_ARM_EXIDX
1354                       ? flags | elfcpp::SHF_LINK_ORDER
1355                       : flags))
1356   {
1357     if (type == elfcpp::SHT_ARM_EXIDX)
1358       this->set_always_keeps_input_sections();
1359   }
1360
1361   ~Arm_output_section()
1362   { }
1363
1364   // Group input sections for stub generation.
1365   void
1366   group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*);
1367
1368   // Downcast a base pointer to an Arm_output_section pointer.  This is
1369   // not type-safe but we only use Arm_output_section not the base class.
1370   static Arm_output_section<big_endian>*
1371   as_arm_output_section(Output_section* os)
1372   { return static_cast<Arm_output_section<big_endian>*>(os); }
1373
1374   // Append all input text sections in this into LIST.
1375   void
1376   append_text_sections_to_list(Text_section_list* list);
1377
1378   // Fix EXIDX coverage of this EXIDX output section.  SORTED_TEXT_SECTION
1379   // is a list of text input sections sorted in ascending order of their
1380   // output addresses.
1381   void
1382   fix_exidx_coverage(Layout* layout,
1383                      const Text_section_list& sorted_text_section,
1384                      Symbol_table* symtab,
1385                      bool merge_exidx_entries,
1386                      const Task* task);
1387
1388   // Link an EXIDX section into its corresponding text section.
1389   void
1390   set_exidx_section_link();
1391
1392  private:
1393   // For convenience.
1394   typedef Output_section::Input_section Input_section;
1395   typedef Output_section::Input_section_list Input_section_list;
1396
1397   // Create a stub group.
1398   void create_stub_group(Input_section_list::const_iterator,
1399                          Input_section_list::const_iterator,
1400                          Input_section_list::const_iterator,
1401                          Target_arm<big_endian>*,
1402                          std::vector<Output_relaxed_input_section*>*,
1403                          const Task* task);
1404 };
1405
1406 // Arm_exidx_input_section class.  This represents an EXIDX input section.
1407
1408 class Arm_exidx_input_section
1409 {
1410  public:
1411   static const section_offset_type invalid_offset =
1412     static_cast<section_offset_type>(-1);
1413
1414   Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1415                           unsigned int link, uint32_t size,
1416                           uint32_t addralign, uint32_t text_size)
1417     : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1418       addralign_(addralign), text_size_(text_size), has_errors_(false)
1419   { }
1420
1421   ~Arm_exidx_input_section()
1422   { }
1423
1424   // Accessors:  This is a read-only class.
1425
1426   // Return the object containing this EXIDX input section.
1427   Relobj*
1428   relobj() const
1429   { return this->relobj_; }
1430
1431   // Return the section index of this EXIDX input section.
1432   unsigned int
1433   shndx() const
1434   { return this->shndx_; }
1435
1436   // Return the section index of linked text section in the same object.
1437   unsigned int
1438   link() const
1439   { return this->link_; }
1440
1441   // Return size of the EXIDX input section.
1442   uint32_t
1443   size() const
1444   { return this->size_; }
1445
1446   // Return address alignment of EXIDX input section.
1447   uint32_t
1448   addralign() const
1449   { return this->addralign_; }
1450
1451   // Return size of the associated text input section.
1452   uint32_t
1453   text_size() const
1454   { return this->text_size_; }
1455
1456   // Whether there are any errors in the EXIDX input section.
1457   bool
1458   has_errors() const
1459   { return this->has_errors_; }
1460
1461   // Set has-errors flag.
1462   void
1463   set_has_errors()
1464   { this->has_errors_ = true; }
1465
1466  private:
1467   // Object containing this.
1468   Relobj* relobj_;
1469   // Section index of this.
1470   unsigned int shndx_;
1471   // text section linked to this in the same object.
1472   unsigned int link_;
1473   // Size of this.  For ARM 32-bit is sufficient.
1474   uint32_t size_;
1475   // Address alignment of this.  For ARM 32-bit is sufficient.
1476   uint32_t addralign_;
1477   // Size of associated text section.
1478   uint32_t text_size_;
1479   // Whether this has any errors.
1480   bool has_errors_;
1481 };
1482
1483 // Arm_relobj class.
1484
1485 template<bool big_endian>
1486 class Arm_relobj : public Sized_relobj_file<32, big_endian>
1487 {
1488  public:
1489   static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1490
1491   Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1492              const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1493     : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr),
1494       stub_tables_(), local_symbol_is_thumb_function_(),
1495       attributes_section_data_(NULL), mapping_symbols_info_(),
1496       section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1497       output_local_symbol_count_needs_update_(false),
1498       merge_flags_and_attributes_(true)
1499   { }
1500
1501   ~Arm_relobj()
1502   { delete this->attributes_section_data_; }
1503
1504   // Return the stub table of the SHNDX-th section if there is one.
1505   Stub_table<big_endian>*
1506   stub_table(unsigned int shndx) const
1507   {
1508     gold_assert(shndx < this->stub_tables_.size());
1509     return this->stub_tables_[shndx];
1510   }
1511
1512   // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1513   void
1514   set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1515   {
1516     gold_assert(shndx < this->stub_tables_.size());
1517     this->stub_tables_[shndx] = stub_table;
1518   }
1519
1520   // Whether a local symbol is a THUMB function.  R_SYM is the symbol table
1521   // index.  This is only valid after do_count_local_symbol is called.
1522   bool
1523   local_symbol_is_thumb_function(unsigned int r_sym) const
1524   {
1525     gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1526     return this->local_symbol_is_thumb_function_[r_sym];
1527   }
1528
1529   // Scan all relocation sections for stub generation.
1530   void
1531   scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1532                           const Layout*);
1533
1534   // Convert regular input section with index SHNDX to a relaxed section.
1535   void
1536   convert_input_section_to_relaxed_section(unsigned shndx)
1537   {
1538     // The stubs have relocations and we need to process them after writing
1539     // out the stubs.  So relocation now must follow section write.
1540     this->set_section_offset(shndx, -1ULL);
1541     this->set_relocs_must_follow_section_writes();
1542   }
1543
1544   // Downcast a base pointer to an Arm_relobj pointer.  This is
1545   // not type-safe but we only use Arm_relobj not the base class.
1546   static Arm_relobj<big_endian>*
1547   as_arm_relobj(Relobj* relobj)
1548   { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1549
1550   // Processor-specific flags in ELF file header.  This is valid only after
1551   // reading symbols.
1552   elfcpp::Elf_Word
1553   processor_specific_flags() const
1554   { return this->processor_specific_flags_; }
1555
1556   // Attribute section data  This is the contents of the .ARM.attribute section
1557   // if there is one.
1558   const Attributes_section_data*
1559   attributes_section_data() const
1560   { return this->attributes_section_data_; }
1561
1562   // Mapping symbol location.
1563   typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1564
1565   // Functor for STL container.
1566   struct Mapping_symbol_position_less
1567   {
1568     bool
1569     operator()(const Mapping_symbol_position& p1,
1570                const Mapping_symbol_position& p2) const
1571     {
1572       return (p1.first < p2.first
1573               || (p1.first == p2.first && p1.second < p2.second));
1574     }
1575   };
1576
1577   // We only care about the first character of a mapping symbol, so
1578   // we only store that instead of the whole symbol name.
1579   typedef std::map<Mapping_symbol_position, char,
1580                    Mapping_symbol_position_less> Mapping_symbols_info;
1581
1582   // Whether a section contains any Cortex-A8 workaround.
1583   bool
1584   section_has_cortex_a8_workaround(unsigned int shndx) const
1585   {
1586     return (this->section_has_cortex_a8_workaround_ != NULL
1587             && (*this->section_has_cortex_a8_workaround_)[shndx]);
1588   }
1589
1590   // Mark a section that has Cortex-A8 workaround.
1591   void
1592   mark_section_for_cortex_a8_workaround(unsigned int shndx)
1593   {
1594     if (this->section_has_cortex_a8_workaround_ == NULL)
1595       this->section_has_cortex_a8_workaround_ =
1596         new std::vector<bool>(this->shnum(), false);
1597     (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1598   }
1599
1600   // Return the EXIDX section of an text section with index SHNDX or NULL
1601   // if the text section has no associated EXIDX section.
1602   const Arm_exidx_input_section*
1603   exidx_input_section_by_link(unsigned int shndx) const
1604   {
1605     Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1606     return ((p != this->exidx_section_map_.end()
1607              && p->second->link() == shndx)
1608             ? p->second
1609             : NULL);
1610   }
1611
1612   // Return the EXIDX section with index SHNDX or NULL if there is none.
1613   const Arm_exidx_input_section*
1614   exidx_input_section_by_shndx(unsigned shndx) const
1615   {
1616     Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1617     return ((p != this->exidx_section_map_.end()
1618              && p->second->shndx() == shndx)
1619             ? p->second
1620             : NULL);
1621   }
1622
1623   // Whether output local symbol count needs updating.
1624   bool
1625   output_local_symbol_count_needs_update() const
1626   { return this->output_local_symbol_count_needs_update_; }
1627
1628   // Set output_local_symbol_count_needs_update flag to be true.
1629   void
1630   set_output_local_symbol_count_needs_update()
1631   { this->output_local_symbol_count_needs_update_ = true; }
1632
1633   // Update output local symbol count at the end of relaxation.
1634   void
1635   update_output_local_symbol_count();
1636
1637   // Whether we want to merge processor-specific flags and attributes.
1638   bool
1639   merge_flags_and_attributes() const
1640   { return this->merge_flags_and_attributes_; }
1641
1642   // Export list of EXIDX section indices.
1643   void
1644   get_exidx_shndx_list(std::vector<unsigned int>* list) const
1645   {
1646     list->clear();
1647     for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin();
1648          p != this->exidx_section_map_.end();
1649          ++p)
1650       {
1651         if (p->second->shndx() == p->first)
1652           list->push_back(p->first);
1653       }
1654     // Sort list to make result independent of implementation of map.
1655     std::sort(list->begin(), list->end());
1656   }
1657
1658  protected:
1659   // Post constructor setup.
1660   void
1661   do_setup()
1662   {
1663     // Call parent's setup method.
1664     Sized_relobj_file<32, big_endian>::do_setup();
1665
1666     // Initialize look-up tables.
1667     Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1668     this->stub_tables_.swap(empty_stub_table_list);
1669   }
1670
1671   // Count the local symbols.
1672   void
1673   do_count_local_symbols(Stringpool_template<char>*,
1674                          Stringpool_template<char>*);
1675
1676   void
1677   do_relocate_sections(
1678       const Symbol_table* symtab, const Layout* layout,
1679       const unsigned char* pshdrs, Output_file* of,
1680       typename Sized_relobj_file<32, big_endian>::Views* pivews);
1681
1682   // Read the symbol information.
1683   void
1684   do_read_symbols(Read_symbols_data* sd);
1685
1686   // Process relocs for garbage collection.
1687   void
1688   do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1689
1690  private:
1691
1692   // Whether a section needs to be scanned for relocation stubs.
1693   bool
1694   section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1695                                     const Relobj::Output_sections&,
1696                                     const Symbol_table*, const unsigned char*);
1697
1698   // Whether a section is a scannable text section.
1699   bool
1700   section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1701                        const Output_section*, const Symbol_table*);
1702
1703   // Whether a section needs to be scanned for the Cortex-A8 erratum.
1704   bool
1705   section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1706                                         unsigned int, Output_section*,
1707                                         const Symbol_table*);
1708
1709   // Scan a section for the Cortex-A8 erratum.
1710   void
1711   scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1712                                      unsigned int, Output_section*,
1713                                      Target_arm<big_endian>*);
1714
1715   // Find the linked text section of an EXIDX section by looking at the
1716   // first relocation of the EXIDX section.  PSHDR points to the section
1717   // headers of a relocation section and PSYMS points to the local symbols.
1718   // PSHNDX points to a location storing the text section index if found.
1719   // Return whether we can find the linked section.
1720   bool
1721   find_linked_text_section(const unsigned char* pshdr,
1722                            const unsigned char* psyms, unsigned int* pshndx);
1723
1724   //
1725   // Make a new Arm_exidx_input_section object for EXIDX section with
1726   // index SHNDX and section header SHDR.  TEXT_SHNDX is the section
1727   // index of the linked text section.
1728   void
1729   make_exidx_input_section(unsigned int shndx,
1730                            const elfcpp::Shdr<32, big_endian>& shdr,
1731                            unsigned int text_shndx,
1732                            const elfcpp::Shdr<32, big_endian>& text_shdr);
1733
1734   // Return the output address of either a plain input section or a
1735   // relaxed input section.  SHNDX is the section index.
1736   Arm_address
1737   simple_input_section_output_address(unsigned int, Output_section*);
1738
1739   typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1740   typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1741     Exidx_section_map;
1742
1743   // List of stub tables.
1744   Stub_table_list stub_tables_;
1745   // Bit vector to tell if a local symbol is a thumb function or not.
1746   // This is only valid after do_count_local_symbol is called.
1747   std::vector<bool> local_symbol_is_thumb_function_;
1748   // processor-specific flags in ELF file header.
1749   elfcpp::Elf_Word processor_specific_flags_;
1750   // Object attributes if there is an .ARM.attributes section or NULL.
1751   Attributes_section_data* attributes_section_data_;
1752   // Mapping symbols information.
1753   Mapping_symbols_info mapping_symbols_info_;
1754   // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1755   std::vector<bool>* section_has_cortex_a8_workaround_;
1756   // Map a text section to its associated .ARM.exidx section, if there is one.
1757   Exidx_section_map exidx_section_map_;
1758   // Whether output local symbol count needs updating.
1759   bool output_local_symbol_count_needs_update_;
1760   // Whether we merge processor flags and attributes of this object to
1761   // output.
1762   bool merge_flags_and_attributes_;
1763 };
1764
1765 // Arm_dynobj class.
1766
1767 template<bool big_endian>
1768 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1769 {
1770  public:
1771   Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1772              const elfcpp::Ehdr<32, big_endian>& ehdr)
1773     : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1774       processor_specific_flags_(0), attributes_section_data_(NULL)
1775   { }
1776
1777   ~Arm_dynobj()
1778   { delete this->attributes_section_data_; }
1779
1780   // Downcast a base pointer to an Arm_relobj pointer.  This is
1781   // not type-safe but we only use Arm_relobj not the base class.
1782   static Arm_dynobj<big_endian>*
1783   as_arm_dynobj(Dynobj* dynobj)
1784   { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1785
1786   // Processor-specific flags in ELF file header.  This is valid only after
1787   // reading symbols.
1788   elfcpp::Elf_Word
1789   processor_specific_flags() const
1790   { return this->processor_specific_flags_; }
1791
1792   // Attributes section data.
1793   const Attributes_section_data*
1794   attributes_section_data() const
1795   { return this->attributes_section_data_; }
1796
1797  protected:
1798   // Read the symbol information.
1799   void
1800   do_read_symbols(Read_symbols_data* sd);
1801
1802  private:
1803   // processor-specific flags in ELF file header.
1804   elfcpp::Elf_Word processor_specific_flags_;
1805   // Object attributes if there is an .ARM.attributes section or NULL.
1806   Attributes_section_data* attributes_section_data_;
1807 };
1808
1809 // Functor to read reloc addends during stub generation.
1810
1811 template<int sh_type, bool big_endian>
1812 struct Stub_addend_reader
1813 {
1814   // Return the addend for a relocation of a particular type.  Depending
1815   // on whether this is a REL or RELA relocation, read the addend from a
1816   // view or from a Reloc object.
1817   elfcpp::Elf_types<32>::Elf_Swxword
1818   operator()(
1819     unsigned int /* r_type */,
1820     const unsigned char* /* view */,
1821     const typename Reloc_types<sh_type,
1822                                32, big_endian>::Reloc& /* reloc */) const;
1823 };
1824
1825 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1826
1827 template<bool big_endian>
1828 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1829 {
1830   elfcpp::Elf_types<32>::Elf_Swxword
1831   operator()(
1832     unsigned int,
1833     const unsigned char*,
1834     const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1835 };
1836
1837 // Specialized Stub_addend_reader for RELA type relocation sections.
1838 // We currently do not handle RELA type relocation sections but it is trivial
1839 // to implement the addend reader.  This is provided for completeness and to
1840 // make it easier to add support for RELA relocation sections in the future.
1841
1842 template<bool big_endian>
1843 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1844 {
1845   elfcpp::Elf_types<32>::Elf_Swxword
1846   operator()(
1847     unsigned int,
1848     const unsigned char*,
1849     const typename Reloc_types<elfcpp::SHT_RELA, 32,
1850                                big_endian>::Reloc& reloc) const
1851   { return reloc.get_r_addend(); }
1852 };
1853
1854 // Cortex_a8_reloc class.  We keep record of relocation that may need
1855 // the Cortex-A8 erratum workaround.
1856
1857 class Cortex_a8_reloc
1858 {
1859  public:
1860   Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1861                   Arm_address destination)
1862     : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1863   { }
1864
1865   ~Cortex_a8_reloc()
1866   { }
1867
1868   // Accessors:  This is a read-only class.
1869
1870   // Return the relocation stub associated with this relocation if there is
1871   // one.
1872   const Reloc_stub*
1873   reloc_stub() const
1874   { return this->reloc_stub_; }
1875
1876   // Return the relocation type.
1877   unsigned int
1878   r_type() const
1879   { return this->r_type_; }
1880
1881   // Return the destination address of the relocation.  LSB stores the THUMB
1882   // bit.
1883   Arm_address
1884   destination() const
1885   { return this->destination_; }
1886
1887  private:
1888   // Associated relocation stub if there is one, or NULL.
1889   const Reloc_stub* reloc_stub_;
1890   // Relocation type.
1891   unsigned int r_type_;
1892   // Destination address of this relocation.  LSB is used to distinguish
1893   // ARM/THUMB mode.
1894   Arm_address destination_;
1895 };
1896
1897 // Arm_output_data_got class.  We derive this from Output_data_got to add
1898 // extra methods to handle TLS relocations in a static link.
1899
1900 template<bool big_endian>
1901 class Arm_output_data_got : public Output_data_got<32, big_endian>
1902 {
1903  public:
1904   Arm_output_data_got(Symbol_table* symtab, Layout* layout)
1905     : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout)
1906   { }
1907
1908   // Add a static entry for the GOT entry at OFFSET.  GSYM is a global
1909   // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1910   // applied in a static link.
1911   void
1912   add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1913   { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); }
1914
1915   // Add a static reloc for the GOT entry at OFFSET.  RELOBJ is an object
1916   // defining a local symbol with INDEX.  R_TYPE is the code of a dynamic
1917   // relocation that needs to be applied in a static link.
1918   void
1919   add_static_reloc(unsigned int got_offset, unsigned int r_type,
1920                    Sized_relobj_file<32, big_endian>* relobj,
1921                    unsigned int index)
1922   {
1923     this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj,
1924                                                 index));
1925   }
1926
1927   // Add a GOT pair for R_ARM_TLS_GD32.  The creates a pair of GOT entries.
1928   // The first one is initialized to be 1, which is the module index for
1929   // the main executable and the second one 0.  A reloc of the type
1930   // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1931   // be applied by gold.  GSYM is a global symbol.
1932   void
1933   add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym);
1934
1935   // Same as the above but for a local symbol in OBJECT with INDEX.
1936   void
1937   add_tls_gd32_with_static_reloc(unsigned int got_type,
1938                                  Sized_relobj_file<32, big_endian>* object,
1939                                  unsigned int index);
1940
1941  protected:
1942   // Write out the GOT table.
1943   void
1944   do_write(Output_file*);
1945
1946  private:
1947   // This class represent dynamic relocations that need to be applied by
1948   // gold because we are using TLS relocations in a static link.
1949   class Static_reloc
1950   {
1951    public:
1952     Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1953       : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true)
1954     { this->u_.global.symbol = gsym; }
1955
1956     Static_reloc(unsigned int got_offset, unsigned int r_type,
1957           Sized_relobj_file<32, big_endian>* relobj, unsigned int index)
1958       : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false)
1959     {
1960       this->u_.local.relobj = relobj;
1961       this->u_.local.index = index;
1962     }
1963
1964     // Return the GOT offset.
1965     unsigned int
1966     got_offset() const
1967     { return this->got_offset_; }
1968
1969     // Relocation type.
1970     unsigned int
1971     r_type() const
1972     { return this->r_type_; }
1973
1974     // Whether the symbol is global or not.
1975     bool
1976     symbol_is_global() const
1977     { return this->symbol_is_global_; }
1978
1979     // For a relocation against a global symbol, the global symbol.
1980     Symbol*
1981     symbol() const
1982     {
1983       gold_assert(this->symbol_is_global_);
1984       return this->u_.global.symbol;
1985     }
1986
1987     // For a relocation against a local symbol, the defining object.
1988     Sized_relobj_file<32, big_endian>*
1989     relobj() const
1990     {
1991       gold_assert(!this->symbol_is_global_);
1992       return this->u_.local.relobj;
1993     }
1994
1995     // For a relocation against a local symbol, the local symbol index.
1996     unsigned int
1997     index() const
1998     {
1999       gold_assert(!this->symbol_is_global_);
2000       return this->u_.local.index;
2001     }
2002
2003    private:
2004     // GOT offset of the entry to which this relocation is applied.
2005     unsigned int got_offset_;
2006     // Type of relocation.
2007     unsigned int r_type_;
2008     // Whether this relocation is against a global symbol.
2009     bool symbol_is_global_;
2010     // A global or local symbol.
2011     union
2012     {
2013       struct
2014       {
2015         // For a global symbol, the symbol itself.
2016         Symbol* symbol;
2017       } global;
2018       struct
2019       {
2020         // For a local symbol, the object defining object.
2021         Sized_relobj_file<32, big_endian>* relobj;
2022         // For a local symbol, the symbol index.
2023         unsigned int index;
2024       } local;
2025     } u_;
2026   };
2027
2028   // Symbol table of the output object.
2029   Symbol_table* symbol_table_;
2030   // Layout of the output object.
2031   Layout* layout_;
2032   // Static relocs to be applied to the GOT.
2033   std::vector<Static_reloc> static_relocs_;
2034 };
2035
2036 // The ARM target has many relocation types with odd-sizes or noncontiguous
2037 // bits.  The default handling of relocatable relocation cannot process these
2038 // relocations.  So we have to extend the default code.
2039
2040 template<bool big_endian, int sh_type, typename Classify_reloc>
2041 class Arm_scan_relocatable_relocs :
2042   public Default_scan_relocatable_relocs<sh_type, Classify_reloc>
2043 {
2044  public:
2045   // Return the strategy to use for a local symbol which is a section
2046   // symbol, given the relocation type.
2047   inline Relocatable_relocs::Reloc_strategy
2048   local_section_strategy(unsigned int r_type, Relobj*)
2049   {
2050     if (sh_type == elfcpp::SHT_RELA)
2051       return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA;
2052     else
2053       {
2054         if (r_type == elfcpp::R_ARM_TARGET1
2055             || r_type == elfcpp::R_ARM_TARGET2)
2056           {
2057             const Target_arm<big_endian>* arm_target =
2058               Target_arm<big_endian>::default_target();
2059             r_type = arm_target->get_real_reloc_type(r_type);
2060           }
2061
2062         switch(r_type)
2063           {
2064           // Relocations that write nothing.  These exclude R_ARM_TARGET1
2065           // and R_ARM_TARGET2.
2066           case elfcpp::R_ARM_NONE:
2067           case elfcpp::R_ARM_V4BX:
2068           case elfcpp::R_ARM_TLS_GOTDESC:
2069           case elfcpp::R_ARM_TLS_CALL:
2070           case elfcpp::R_ARM_TLS_DESCSEQ:
2071           case elfcpp::R_ARM_THM_TLS_CALL:
2072           case elfcpp::R_ARM_GOTRELAX:
2073           case elfcpp::R_ARM_GNU_VTENTRY:
2074           case elfcpp::R_ARM_GNU_VTINHERIT:
2075           case elfcpp::R_ARM_THM_TLS_DESCSEQ16:
2076           case elfcpp::R_ARM_THM_TLS_DESCSEQ32:
2077             return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0;
2078           // These should have been converted to something else above.
2079           case elfcpp::R_ARM_TARGET1:
2080           case elfcpp::R_ARM_TARGET2:
2081             gold_unreachable();
2082           // Relocations that write full 32 bits and
2083           // have alignment of 1.
2084           case elfcpp::R_ARM_ABS32:
2085           case elfcpp::R_ARM_REL32:
2086           case elfcpp::R_ARM_SBREL32:
2087           case elfcpp::R_ARM_GOTOFF32:
2088           case elfcpp::R_ARM_BASE_PREL:
2089           case elfcpp::R_ARM_GOT_BREL:
2090           case elfcpp::R_ARM_BASE_ABS:
2091           case elfcpp::R_ARM_ABS32_NOI:
2092           case elfcpp::R_ARM_REL32_NOI:
2093           case elfcpp::R_ARM_PLT32_ABS:
2094           case elfcpp::R_ARM_GOT_ABS:
2095           case elfcpp::R_ARM_GOT_PREL:
2096           case elfcpp::R_ARM_TLS_GD32:
2097           case elfcpp::R_ARM_TLS_LDM32:
2098           case elfcpp::R_ARM_TLS_LDO32:
2099           case elfcpp::R_ARM_TLS_IE32:
2100           case elfcpp::R_ARM_TLS_LE32:
2101             return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED;
2102           default:
2103             // For all other static relocations, return RELOC_SPECIAL.
2104             return Relocatable_relocs::RELOC_SPECIAL;
2105           }
2106       }
2107   }
2108 };
2109
2110 template<bool big_endian>
2111 class Target_arm : public Sized_target<32, big_endian>
2112 {
2113  public:
2114   typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
2115     Reloc_section;
2116
2117   // When were are relocating a stub, we pass this as the relocation number.
2118   static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
2119
2120   Target_arm(const Target::Target_info* info = &arm_info)
2121     : Sized_target<32, big_endian>(info),
2122       got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL),
2123       rel_dyn_(NULL), rel_irelative_(NULL), copy_relocs_(elfcpp::R_ARM_COPY),
2124       got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2125       stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2126       should_force_pic_veneer_(false),
2127       arm_input_section_map_(), attributes_section_data_(NULL),
2128       fix_cortex_a8_(false), cortex_a8_relocs_info_()
2129   { }
2130
2131   // Whether we force PCI branch veneers.
2132   bool
2133   should_force_pic_veneer() const
2134   { return this->should_force_pic_veneer_; }
2135
2136   // Set PIC veneer flag.
2137   void
2138   set_should_force_pic_veneer(bool value)
2139   { this->should_force_pic_veneer_ = value; }
2140
2141   // Whether we use THUMB-2 instructions.
2142   bool
2143   using_thumb2() const
2144   {
2145     Object_attribute* attr =
2146       this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2147     int arch = attr->int_value();
2148     return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
2149   }
2150
2151   // Whether we use THUMB/THUMB-2 instructions only.
2152   bool
2153   using_thumb_only() const
2154   {
2155     Object_attribute* attr =
2156       this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2157
2158     if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2159         || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M)
2160       return true;
2161     if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
2162         && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
2163       return false;
2164     attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
2165     return attr->int_value() == 'M';
2166   }
2167
2168   // Whether we have an NOP instruction.  If not, use mov r0, r0 instead.
2169   bool
2170   may_use_arm_nop() const
2171   {
2172     Object_attribute* attr =
2173       this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2174     int arch = attr->int_value();
2175     return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2176             || arch == elfcpp::TAG_CPU_ARCH_V6K
2177             || arch == elfcpp::TAG_CPU_ARCH_V7
2178             || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2179   }
2180
2181   // Whether we have THUMB-2 NOP.W instruction.
2182   bool
2183   may_use_thumb2_nop() const
2184   {
2185     Object_attribute* attr =
2186       this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2187     int arch = attr->int_value();
2188     return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2189             || arch == elfcpp::TAG_CPU_ARCH_V7
2190             || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2191   }
2192
2193   // Whether we have v4T interworking instructions available.
2194   bool
2195   may_use_v4t_interworking() const
2196   {
2197     Object_attribute* attr =
2198       this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2199     int arch = attr->int_value();
2200     return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2201             && arch != elfcpp::TAG_CPU_ARCH_V4);
2202   }
2203
2204   // Whether we have v5T interworking instructions available.
2205   bool
2206   may_use_v5t_interworking() const
2207   {
2208     Object_attribute* attr =
2209       this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2210     int arch = attr->int_value();
2211     if (parameters->options().fix_arm1176())
2212       return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2213               || arch == elfcpp::TAG_CPU_ARCH_V7
2214               || arch == elfcpp::TAG_CPU_ARCH_V6_M
2215               || arch == elfcpp::TAG_CPU_ARCH_V6S_M
2216               || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2217     else
2218       return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2219               && arch != elfcpp::TAG_CPU_ARCH_V4
2220               && arch != elfcpp::TAG_CPU_ARCH_V4T);
2221   }
2222
2223   // Process the relocations to determine unreferenced sections for
2224   // garbage collection.
2225   void
2226   gc_process_relocs(Symbol_table* symtab,
2227                     Layout* layout,
2228                     Sized_relobj_file<32, big_endian>* object,
2229                     unsigned int data_shndx,
2230                     unsigned int sh_type,
2231                     const unsigned char* prelocs,
2232                     size_t reloc_count,
2233                     Output_section* output_section,
2234                     bool needs_special_offset_handling,
2235                     size_t local_symbol_count,
2236                     const unsigned char* plocal_symbols);
2237
2238   // Scan the relocations to look for symbol adjustments.
2239   void
2240   scan_relocs(Symbol_table* symtab,
2241               Layout* layout,
2242               Sized_relobj_file<32, big_endian>* object,
2243               unsigned int data_shndx,
2244               unsigned int sh_type,
2245               const unsigned char* prelocs,
2246               size_t reloc_count,
2247               Output_section* output_section,
2248               bool needs_special_offset_handling,
2249               size_t local_symbol_count,
2250               const unsigned char* plocal_symbols);
2251
2252   // Finalize the sections.
2253   void
2254   do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
2255
2256   // Return the value to use for a dynamic symbol which requires special
2257   // treatment.
2258   uint64_t
2259   do_dynsym_value(const Symbol*) const;
2260
2261   // Return the plt address for globals. Since we have irelative plt entries,
2262   // address calculation is not as straightforward as plt_address + plt_offset.
2263   uint64_t
2264   do_plt_address_for_global(const Symbol* gsym) const
2265   { return this->plt_section()->address_for_global(gsym); }
2266
2267   // Return the plt address for locals. Since we have irelative plt entries,
2268   // address calculation is not as straightforward as plt_address + plt_offset.
2269   uint64_t
2270   do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const
2271   { return this->plt_section()->address_for_local(relobj, symndx); }
2272
2273   // Relocate a section.
2274   void
2275   relocate_section(const Relocate_info<32, big_endian>*,
2276                    unsigned int sh_type,
2277                    const unsigned char* prelocs,
2278                    size_t reloc_count,
2279                    Output_section* output_section,
2280                    bool needs_special_offset_handling,
2281                    unsigned char* view,
2282                    Arm_address view_address,
2283                    section_size_type view_size,
2284                    const Reloc_symbol_changes*);
2285
2286   // Scan the relocs during a relocatable link.
2287   void
2288   scan_relocatable_relocs(Symbol_table* symtab,
2289                           Layout* layout,
2290                           Sized_relobj_file<32, big_endian>* object,
2291                           unsigned int data_shndx,
2292                           unsigned int sh_type,
2293                           const unsigned char* prelocs,
2294                           size_t reloc_count,
2295                           Output_section* output_section,
2296                           bool needs_special_offset_handling,
2297                           size_t local_symbol_count,
2298                           const unsigned char* plocal_symbols,
2299                           Relocatable_relocs*);
2300
2301   // Emit relocations for a section.
2302   void
2303   relocate_relocs(const Relocate_info<32, big_endian>*,
2304                   unsigned int sh_type,
2305                   const unsigned char* prelocs,
2306                   size_t reloc_count,
2307                   Output_section* output_section,
2308                   typename elfcpp::Elf_types<32>::Elf_Off
2309                     offset_in_output_section,
2310                   const Relocatable_relocs*,
2311                   unsigned char* view,
2312                   Arm_address view_address,
2313                   section_size_type view_size,
2314                   unsigned char* reloc_view,
2315                   section_size_type reloc_view_size);
2316
2317   // Perform target-specific processing in a relocatable link.  This is
2318   // only used if we use the relocation strategy RELOC_SPECIAL.
2319   void
2320   relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo,
2321                                unsigned int sh_type,
2322                                const unsigned char* preloc_in,
2323                                size_t relnum,
2324                                Output_section* output_section,
2325                                typename elfcpp::Elf_types<32>::Elf_Off
2326                                  offset_in_output_section,
2327                                unsigned char* view,
2328                                typename elfcpp::Elf_types<32>::Elf_Addr
2329                                  view_address,
2330                                section_size_type view_size,
2331                                unsigned char* preloc_out);
2332
2333   // Return whether SYM is defined by the ABI.
2334   bool
2335   do_is_defined_by_abi(const Symbol* sym) const
2336   { return strcmp(sym->name(), "__tls_get_addr") == 0; }
2337
2338   // Return whether there is a GOT section.
2339   bool
2340   has_got_section() const
2341   { return this->got_ != NULL; }
2342
2343   // Return the size of the GOT section.
2344   section_size_type
2345   got_size() const
2346   {
2347     gold_assert(this->got_ != NULL);
2348     return this->got_->data_size();
2349   }
2350
2351   // Return the number of entries in the GOT.
2352   unsigned int
2353   got_entry_count() const
2354   {
2355     if (!this->has_got_section())
2356       return 0;
2357     return this->got_size() / 4;
2358   }
2359
2360   // Return the number of entries in the PLT.
2361   unsigned int
2362   plt_entry_count() const;
2363
2364   // Return the offset of the first non-reserved PLT entry.
2365   unsigned int
2366   first_plt_entry_offset() const;
2367
2368   // Return the size of each PLT entry.
2369   unsigned int
2370   plt_entry_size() const;
2371
2372   // Get the section to use for IRELATIVE relocations, create it if necessary.
2373   Reloc_section*
2374   rel_irelative_section(Layout*);
2375
2376   // Map platform-specific reloc types
2377   static unsigned int
2378   get_real_reloc_type(unsigned int r_type);
2379
2380   //
2381   // Methods to support stub-generations.
2382   //
2383
2384   // Return the stub factory
2385   const Stub_factory&
2386   stub_factory() const
2387   { return this->stub_factory_; }
2388
2389   // Make a new Arm_input_section object.
2390   Arm_input_section<big_endian>*
2391   new_arm_input_section(Relobj*, unsigned int);
2392
2393   // Find the Arm_input_section object corresponding to the SHNDX-th input
2394   // section of RELOBJ.
2395   Arm_input_section<big_endian>*
2396   find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2397
2398   // Make a new Stub_table
2399   Stub_table<big_endian>*
2400   new_stub_table(Arm_input_section<big_endian>*);
2401
2402   // Scan a section for stub generation.
2403   void
2404   scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2405                          const unsigned char*, size_t, Output_section*,
2406                          bool, const unsigned char*, Arm_address,
2407                          section_size_type);
2408
2409   // Relocate a stub.
2410   void
2411   relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2412                 Output_section*, unsigned char*, Arm_address,
2413                 section_size_type);
2414
2415   // Get the default ARM target.
2416   static Target_arm<big_endian>*
2417   default_target()
2418   {
2419     gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2420                 && parameters->target().is_big_endian() == big_endian);
2421     return static_cast<Target_arm<big_endian>*>(
2422              parameters->sized_target<32, big_endian>());
2423   }
2424
2425   // Whether NAME belongs to a mapping symbol.
2426   static bool
2427   is_mapping_symbol_name(const char* name)
2428   {
2429     return (name
2430             && name[0] == '$'
2431             && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2432             && (name[2] == '\0' || name[2] == '.'));
2433   }
2434
2435   // Whether we work around the Cortex-A8 erratum.
2436   bool
2437   fix_cortex_a8() const
2438   { return this->fix_cortex_a8_; }
2439
2440   // Whether we merge exidx entries in debuginfo.
2441   bool
2442   merge_exidx_entries() const
2443   { return parameters->options().merge_exidx_entries(); }
2444
2445   // Whether we fix R_ARM_V4BX relocation.
2446   // 0 - do not fix
2447   // 1 - replace with MOV instruction (armv4 target)
2448   // 2 - make interworking veneer (>= armv4t targets only)
2449   General_options::Fix_v4bx
2450   fix_v4bx() const
2451   { return parameters->options().fix_v4bx(); }
2452
2453   // Scan a span of THUMB code section for Cortex-A8 erratum.
2454   void
2455   scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2456                                   section_size_type, section_size_type,
2457                                   const unsigned char*, Arm_address);
2458
2459   // Apply Cortex-A8 workaround to a branch.
2460   void
2461   apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2462                              unsigned char*, Arm_address);
2463
2464  protected:
2465   // Make the PLT-generator object.
2466   Output_data_plt_arm<big_endian>*
2467   make_data_plt(Layout* layout,
2468                 Arm_output_data_got<big_endian>* got,
2469                 Output_data_space* got_plt,
2470                 Output_data_space* got_irelative)
2471   { return this->do_make_data_plt(layout, got, got_plt, got_irelative); }
2472
2473   // Make an ELF object.
2474   Object*
2475   do_make_elf_object(const std::string&, Input_file*, off_t,
2476                      const elfcpp::Ehdr<32, big_endian>& ehdr);
2477
2478   Object*
2479   do_make_elf_object(const std::string&, Input_file*, off_t,
2480                      const elfcpp::Ehdr<32, !big_endian>&)
2481   { gold_unreachable(); }
2482
2483   Object*
2484   do_make_elf_object(const std::string&, Input_file*, off_t,
2485                       const elfcpp::Ehdr<64, false>&)
2486   { gold_unreachable(); }
2487
2488   Object*
2489   do_make_elf_object(const std::string&, Input_file*, off_t,
2490                      const elfcpp::Ehdr<64, true>&)
2491   { gold_unreachable(); }
2492
2493   // Make an output section.
2494   Output_section*
2495   do_make_output_section(const char* name, elfcpp::Elf_Word type,
2496                          elfcpp::Elf_Xword flags)
2497   { return new Arm_output_section<big_endian>(name, type, flags); }
2498
2499   void
2500   do_adjust_elf_header(unsigned char* view, int len);
2501
2502   // We only need to generate stubs, and hence perform relaxation if we are
2503   // not doing relocatable linking.
2504   bool
2505   do_may_relax() const
2506   { return !parameters->options().relocatable(); }
2507
2508   bool
2509   do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*);
2510
2511   // Determine whether an object attribute tag takes an integer, a
2512   // string or both.
2513   int
2514   do_attribute_arg_type(int tag) const;
2515
2516   // Reorder tags during output.
2517   int
2518   do_attributes_order(int num) const;
2519
2520   // This is called when the target is selected as the default.
2521   void
2522   do_select_as_default_target()
2523   {
2524     // No locking is required since there should only be one default target.
2525     // We cannot have both the big-endian and little-endian ARM targets
2526     // as the default.
2527     gold_assert(arm_reloc_property_table == NULL);
2528     arm_reloc_property_table = new Arm_reloc_property_table();
2529   }
2530
2531   // Virtual function which is set to return true by a target if
2532   // it can use relocation types to determine if a function's
2533   // pointer is taken.
2534   virtual bool
2535   do_can_check_for_function_pointers() const
2536   { return true; }
2537
2538   // Whether a section called SECTION_NAME may have function pointers to
2539   // sections not eligible for safe ICF folding.
2540   virtual bool
2541   do_section_may_have_icf_unsafe_pointers(const char* section_name) const
2542   {
2543     return (!is_prefix_of(".ARM.exidx", section_name)
2544             && !is_prefix_of(".ARM.extab", section_name)
2545             && Target::do_section_may_have_icf_unsafe_pointers(section_name));
2546   }
2547
2548   virtual void
2549   do_define_standard_symbols(Symbol_table*, Layout*);
2550
2551   virtual Output_data_plt_arm<big_endian>*
2552   do_make_data_plt(Layout* layout,
2553                    Arm_output_data_got<big_endian>* got,
2554                    Output_data_space* got_plt,
2555                    Output_data_space* got_irelative)
2556   {
2557     gold_assert(got_plt != NULL && got_irelative != NULL);
2558     return new Output_data_plt_arm_standard<big_endian>(
2559         layout, got, got_plt, got_irelative);
2560   }
2561
2562  private:
2563   // The class which scans relocations.
2564   class Scan
2565   {
2566    public:
2567     Scan()
2568       : issued_non_pic_error_(false)
2569     { }
2570
2571     static inline int
2572     get_reference_flags(unsigned int r_type);
2573
2574     inline void
2575     local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2576           Sized_relobj_file<32, big_endian>* object,
2577           unsigned int data_shndx,
2578           Output_section* output_section,
2579           const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2580           const elfcpp::Sym<32, big_endian>& lsym,
2581           bool is_discarded);
2582
2583     inline void
2584     global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2585            Sized_relobj_file<32, big_endian>* object,
2586            unsigned int data_shndx,
2587            Output_section* output_section,
2588            const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2589            Symbol* gsym);
2590
2591     inline bool
2592     local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2593                                         Sized_relobj_file<32, big_endian>* ,
2594                                         unsigned int ,
2595                                         Output_section* ,
2596                                         const elfcpp::Rel<32, big_endian>& ,
2597                                         unsigned int ,
2598                                         const elfcpp::Sym<32, big_endian>&);
2599
2600     inline bool
2601     global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2602                                          Sized_relobj_file<32, big_endian>* ,
2603                                          unsigned int ,
2604                                          Output_section* ,
2605                                          const elfcpp::Rel<32, big_endian>& ,
2606                                          unsigned int , Symbol*);
2607
2608    private:
2609     static void
2610     unsupported_reloc_local(Sized_relobj_file<32, big_endian>*,
2611                             unsigned int r_type);
2612
2613     static void
2614     unsupported_reloc_global(Sized_relobj_file<32, big_endian>*,
2615                              unsigned int r_type, Symbol*);
2616
2617     void
2618     check_non_pic(Relobj*, unsigned int r_type);
2619
2620     // Almost identical to Symbol::needs_plt_entry except that it also
2621     // handles STT_ARM_TFUNC.
2622     static bool
2623     symbol_needs_plt_entry(const Symbol* sym)
2624     {
2625       // An undefined symbol from an executable does not need a PLT entry.
2626       if (sym->is_undefined() && !parameters->options().shared())
2627         return false;
2628
2629       if (sym->type() == elfcpp::STT_GNU_IFUNC)
2630         return true;
2631
2632       return (!parameters->doing_static_link()
2633               && (sym->type() == elfcpp::STT_FUNC
2634                   || sym->type() == elfcpp::STT_ARM_TFUNC)
2635               && (sym->is_from_dynobj()
2636                   || sym->is_undefined()
2637                   || sym->is_preemptible()));
2638     }
2639
2640     inline bool
2641     possible_function_pointer_reloc(unsigned int r_type);
2642
2643     // Whether a plt entry is needed for ifunc.
2644     bool
2645     reloc_needs_plt_for_ifunc(Sized_relobj_file<32, big_endian>*,
2646                               unsigned int r_type);
2647
2648     // Whether we have issued an error about a non-PIC compilation.
2649     bool issued_non_pic_error_;
2650   };
2651
2652   // The class which implements relocation.
2653   class Relocate
2654   {
2655    public:
2656     Relocate()
2657     { }
2658
2659     ~Relocate()
2660     { }
2661
2662     // Return whether the static relocation needs to be applied.
2663     inline bool
2664     should_apply_static_reloc(const Sized_symbol<32>* gsym,
2665                               unsigned int r_type,
2666                               bool is_32bit,
2667                               Output_section* output_section);
2668
2669     // Do a relocation.  Return false if the caller should not issue
2670     // any warnings about this relocation.
2671     inline bool
2672     relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2673              Output_section*,  size_t relnum,
2674              const elfcpp::Rel<32, big_endian>&,
2675              unsigned int r_type, const Sized_symbol<32>*,
2676              const Symbol_value<32>*,
2677              unsigned char*, Arm_address,
2678              section_size_type);
2679
2680     // Return whether we want to pass flag NON_PIC_REF for this
2681     // reloc.  This means the relocation type accesses a symbol not via
2682     // GOT or PLT.
2683     static inline bool
2684     reloc_is_non_pic(unsigned int r_type)
2685     {
2686       switch (r_type)
2687         {
2688         // These relocation types reference GOT or PLT entries explicitly.
2689         case elfcpp::R_ARM_GOT_BREL:
2690         case elfcpp::R_ARM_GOT_ABS:
2691         case elfcpp::R_ARM_GOT_PREL:
2692         case elfcpp::R_ARM_GOT_BREL12:
2693         case elfcpp::R_ARM_PLT32_ABS:
2694         case elfcpp::R_ARM_TLS_GD32:
2695         case elfcpp::R_ARM_TLS_LDM32:
2696         case elfcpp::R_ARM_TLS_IE32:
2697         case elfcpp::R_ARM_TLS_IE12GP:
2698
2699         // These relocate types may use PLT entries.
2700         case elfcpp::R_ARM_CALL:
2701         case elfcpp::R_ARM_THM_CALL:
2702         case elfcpp::R_ARM_JUMP24:
2703         case elfcpp::R_ARM_THM_JUMP24:
2704         case elfcpp::R_ARM_THM_JUMP19:
2705         case elfcpp::R_ARM_PLT32:
2706         case elfcpp::R_ARM_THM_XPC22:
2707         case elfcpp::R_ARM_PREL31:
2708         case elfcpp::R_ARM_SBREL31:
2709           return false;
2710
2711         default:
2712           return true;
2713         }
2714     }
2715
2716    private:
2717     // Do a TLS relocation.
2718     inline typename Arm_relocate_functions<big_endian>::Status
2719     relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*,
2720                  size_t, const elfcpp::Rel<32, big_endian>&, unsigned int,
2721                  const Sized_symbol<32>*, const Symbol_value<32>*,
2722                  unsigned char*, elfcpp::Elf_types<32>::Elf_Addr,
2723                  section_size_type);
2724
2725   };
2726
2727   // A class which returns the size required for a relocation type,
2728   // used while scanning relocs during a relocatable link.
2729   class Relocatable_size_for_reloc
2730   {
2731    public:
2732     unsigned int
2733     get_size_for_reloc(unsigned int, Relobj*);
2734   };
2735
2736   // Adjust TLS relocation type based on the options and whether this
2737   // is a local symbol.
2738   static tls::Tls_optimization
2739   optimize_tls_reloc(bool is_final, int r_type);
2740
2741   // Get the GOT section, creating it if necessary.
2742   Arm_output_data_got<big_endian>*
2743   got_section(Symbol_table*, Layout*);
2744
2745   // Get the GOT PLT section.
2746   Output_data_space*
2747   got_plt_section() const
2748   {
2749     gold_assert(this->got_plt_ != NULL);
2750     return this->got_plt_;
2751   }
2752
2753   // Create the PLT section.
2754   void
2755   make_plt_section(Symbol_table* symtab, Layout* layout);
2756
2757   // Create a PLT entry for a global symbol.
2758   void
2759   make_plt_entry(Symbol_table*, Layout*, Symbol*);
2760
2761   // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2762   void
2763   make_local_ifunc_plt_entry(Symbol_table*, Layout*,
2764                              Sized_relobj_file<32, big_endian>* relobj,
2765                              unsigned int local_sym_index);
2766
2767   // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2768   void
2769   define_tls_base_symbol(Symbol_table*, Layout*);
2770
2771   // Create a GOT entry for the TLS module index.
2772   unsigned int
2773   got_mod_index_entry(Symbol_table* symtab, Layout* layout,
2774                       Sized_relobj_file<32, big_endian>* object);
2775
2776   // Get the PLT section.
2777   const Output_data_plt_arm<big_endian>*
2778   plt_section() const
2779   {
2780     gold_assert(this->plt_ != NULL);
2781     return this->plt_;
2782   }
2783
2784   // Get the dynamic reloc section, creating it if necessary.
2785   Reloc_section*
2786   rel_dyn_section(Layout*);
2787
2788   // Get the section to use for TLS_DESC relocations.
2789   Reloc_section*
2790   rel_tls_desc_section(Layout*) const;
2791
2792   // Return true if the symbol may need a COPY relocation.
2793   // References from an executable object to non-function symbols
2794   // defined in a dynamic object may need a COPY relocation.
2795   bool
2796   may_need_copy_reloc(Symbol* gsym)
2797   {
2798     return (gsym->type() != elfcpp::STT_ARM_TFUNC
2799             && gsym->may_need_copy_reloc());
2800   }
2801
2802   // Add a potential copy relocation.
2803   void
2804   copy_reloc(Symbol_table* symtab, Layout* layout,
2805              Sized_relobj_file<32, big_endian>* object,
2806              unsigned int shndx, Output_section* output_section,
2807              Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2808   {
2809     this->copy_relocs_.copy_reloc(symtab, layout,
2810                                   symtab->get_sized_symbol<32>(sym),
2811                                   object, shndx, output_section, reloc,
2812                                   this->rel_dyn_section(layout));
2813   }
2814
2815   // Whether two EABI versions are compatible.
2816   static bool
2817   are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2818
2819   // Merge processor-specific flags from input object and those in the ELF
2820   // header of the output.
2821   void
2822   merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2823
2824   // Get the secondary compatible architecture.
2825   static int
2826   get_secondary_compatible_arch(const Attributes_section_data*);
2827
2828   // Set the secondary compatible architecture.
2829   static void
2830   set_secondary_compatible_arch(Attributes_section_data*, int);
2831
2832   static int
2833   tag_cpu_arch_combine(const char*, int, int*, int, int);
2834
2835   // Helper to print AEABI enum tag value.
2836   static std::string
2837   aeabi_enum_name(unsigned int);
2838
2839   // Return string value for TAG_CPU_name.
2840   static std::string
2841   tag_cpu_name_value(unsigned int);
2842
2843   // Query attributes object to see if integer divide instructions may be
2844   // present in an object.
2845   static bool
2846   attributes_accept_div(int arch, int profile,
2847                         const Object_attribute* div_attr);
2848
2849   // Query attributes object to see if integer divide instructions are
2850   // forbidden to be in the object.  This is not the inverse of
2851   // attributes_accept_div.
2852   static bool
2853   attributes_forbid_div(const Object_attribute* div_attr);
2854
2855   // Merge object attributes from input object and those in the output.
2856   void
2857   merge_object_attributes(const char*, const Attributes_section_data*);
2858
2859   // Helper to get an AEABI object attribute
2860   Object_attribute*
2861   get_aeabi_object_attribute(int tag) const
2862   {
2863     Attributes_section_data* pasd = this->attributes_section_data_;
2864     gold_assert(pasd != NULL);
2865     Object_attribute* attr =
2866       pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2867     gold_assert(attr != NULL);
2868     return attr;
2869   }
2870
2871   //
2872   // Methods to support stub-generations.
2873   //
2874
2875   // Group input sections for stub generation.
2876   void
2877   group_sections(Layout*, section_size_type, bool, const Task*);
2878
2879   // Scan a relocation for stub generation.
2880   void
2881   scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2882                       const Sized_symbol<32>*, unsigned int,
2883                       const Symbol_value<32>*,
2884                       elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2885
2886   // Scan a relocation section for stub.
2887   template<int sh_type>
2888   void
2889   scan_reloc_section_for_stubs(
2890       const Relocate_info<32, big_endian>* relinfo,
2891       const unsigned char* prelocs,
2892       size_t reloc_count,
2893       Output_section* output_section,
2894       bool needs_special_offset_handling,
2895       const unsigned char* view,
2896       elfcpp::Elf_types<32>::Elf_Addr view_address,
2897       section_size_type);
2898
2899   // Fix .ARM.exidx section coverage.
2900   void
2901   fix_exidx_coverage(Layout*, const Input_objects*,
2902                      Arm_output_section<big_endian>*, Symbol_table*,
2903                      const Task*);
2904
2905   // Functors for STL set.
2906   struct output_section_address_less_than
2907   {
2908     bool
2909     operator()(const Output_section* s1, const Output_section* s2) const
2910     { return s1->address() < s2->address(); }
2911   };
2912
2913   // Information about this specific target which we pass to the
2914   // general Target structure.
2915   static const Target::Target_info arm_info;
2916
2917   // The types of GOT entries needed for this platform.
2918   // These values are exposed to the ABI in an incremental link.
2919   // Do not renumber existing values without changing the version
2920   // number of the .gnu_incremental_inputs section.
2921   enum Got_type
2922   {
2923     GOT_TYPE_STANDARD = 0,      // GOT entry for a regular symbol
2924     GOT_TYPE_TLS_NOFFSET = 1,   // GOT entry for negative TLS offset
2925     GOT_TYPE_TLS_OFFSET = 2,    // GOT entry for positive TLS offset
2926     GOT_TYPE_TLS_PAIR = 3,      // GOT entry for TLS module/offset pair
2927     GOT_TYPE_TLS_DESC = 4       // GOT entry for TLS_DESC pair
2928   };
2929
2930   typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2931
2932   // Map input section to Arm_input_section.
2933   typedef Unordered_map<Section_id,
2934                         Arm_input_section<big_endian>*,
2935                         Section_id_hash>
2936           Arm_input_section_map;
2937
2938   // Map output addresses to relocs for Cortex-A8 erratum.
2939   typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2940           Cortex_a8_relocs_info;
2941
2942   // The GOT section.
2943   Arm_output_data_got<big_endian>* got_;
2944   // The PLT section.
2945   Output_data_plt_arm<big_endian>* plt_;
2946   // The GOT PLT section.
2947   Output_data_space* got_plt_;
2948   // The GOT section for IRELATIVE relocations.
2949   Output_data_space* got_irelative_;
2950   // The dynamic reloc section.
2951   Reloc_section* rel_dyn_;
2952   // The section to use for IRELATIVE relocs.
2953   Reloc_section* rel_irelative_;
2954   // Relocs saved to avoid a COPY reloc.
2955   Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2956   // Offset of the GOT entry for the TLS module index.
2957   unsigned int got_mod_index_offset_;
2958   // True if the _TLS_MODULE_BASE_ symbol has been defined.
2959   bool tls_base_symbol_defined_;
2960   // Vector of Stub_tables created.
2961   Stub_table_list stub_tables_;
2962   // Stub factory.
2963   const Stub_factory &stub_factory_;
2964   // Whether we force PIC branch veneers.
2965   bool should_force_pic_veneer_;
2966   // Map for locating Arm_input_sections.
2967   Arm_input_section_map arm_input_section_map_;
2968   // Attributes section data in output.
2969   Attributes_section_data* attributes_section_data_;
2970   // Whether we want to fix code for Cortex-A8 erratum.
2971   bool fix_cortex_a8_;
2972   // Map addresses to relocs for Cortex-A8 erratum.
2973   Cortex_a8_relocs_info cortex_a8_relocs_info_;
2974 };
2975
2976 template<bool big_endian>
2977 const Target::Target_info Target_arm<big_endian>::arm_info =
2978 {
2979   32,                   // size
2980   big_endian,           // is_big_endian
2981   elfcpp::EM_ARM,       // machine_code
2982   false,                // has_make_symbol
2983   false,                // has_resolve
2984   false,                // has_code_fill
2985   true,                 // is_default_stack_executable
2986   false,                // can_icf_inline_merge_sections
2987   '\0',                 // wrap_char
2988   "/usr/lib/libc.so.1", // dynamic_linker
2989   0x8000,               // default_text_segment_address
2990   0x1000,               // abi_pagesize (overridable by -z max-page-size)
2991   0x1000,               // common_pagesize (overridable by -z common-page-size)
2992   false,                // isolate_execinstr
2993   0,                    // rosegment_gap
2994   elfcpp::SHN_UNDEF,    // small_common_shndx
2995   elfcpp::SHN_UNDEF,    // large_common_shndx
2996   0,                    // small_common_section_flags
2997   0,                    // large_common_section_flags
2998   ".ARM.attributes",    // attributes_section
2999   "aeabi",              // attributes_vendor
3000   "_start"              // entry_symbol_name
3001 };
3002
3003 // Arm relocate functions class
3004 //
3005
3006 template<bool big_endian>
3007 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
3008 {
3009  public:
3010   typedef enum
3011   {
3012     STATUS_OKAY,        // No error during relocation.
3013     STATUS_OVERFLOW,    // Relocation overflow.
3014     STATUS_BAD_RELOC    // Relocation cannot be applied.
3015   } Status;
3016
3017  private:
3018   typedef Relocate_functions<32, big_endian> Base;
3019   typedef Arm_relocate_functions<big_endian> This;
3020
3021   // Encoding of imm16 argument for movt and movw ARM instructions
3022   // from ARM ARM:
3023   //
3024   //     imm16 := imm4 | imm12
3025   //
3026   //  f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3027   // +-------+---------------+-------+-------+-----------------------+
3028   // |       |               |imm4   |       |imm12                  |
3029   // +-------+---------------+-------+-------+-----------------------+
3030
3031   // Extract the relocation addend from VAL based on the ARM
3032   // instruction encoding described above.
3033   static inline typename elfcpp::Swap<32, big_endian>::Valtype
3034   extract_arm_movw_movt_addend(
3035       typename elfcpp::Swap<32, big_endian>::Valtype val)
3036   {
3037     // According to the Elf ABI for ARM Architecture the immediate
3038     // field is sign-extended to form the addend.
3039     return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff));
3040   }
3041
3042   // Insert X into VAL based on the ARM instruction encoding described
3043   // above.
3044   static inline typename elfcpp::Swap<32, big_endian>::Valtype
3045   insert_val_arm_movw_movt(
3046       typename elfcpp::Swap<32, big_endian>::Valtype val,
3047       typename elfcpp::Swap<32, big_endian>::Valtype x)
3048   {
3049     val &= 0xfff0f000;
3050     val |= x & 0x0fff;
3051     val |= (x & 0xf000) << 4;
3052     return val;
3053   }
3054
3055   // Encoding of imm16 argument for movt and movw Thumb2 instructions
3056   // from ARM ARM:
3057   //
3058   //     imm16 := imm4 | i | imm3 | imm8
3059   //
3060   //  f e d c b a 9 8 7 6 5 4 3 2 1 0  f e d c b a 9 8 7 6 5 4 3 2 1 0
3061   // +---------+-+-----------+-------++-+-----+-------+---------------+
3062   // |         |i|           |imm4   || |imm3 |       |imm8           |
3063   // +---------+-+-----------+-------++-+-----+-------+---------------+
3064
3065   // Extract the relocation addend from VAL based on the Thumb2
3066   // instruction encoding described above.
3067   static inline typename elfcpp::Swap<32, big_endian>::Valtype
3068   extract_thumb_movw_movt_addend(
3069       typename elfcpp::Swap<32, big_endian>::Valtype val)
3070   {
3071     // According to the Elf ABI for ARM Architecture the immediate
3072     // field is sign-extended to form the addend.
3073     return Bits<16>::sign_extend32(((val >> 4) & 0xf000)
3074                                    | ((val >> 15) & 0x0800)
3075                                    | ((val >> 4) & 0x0700)
3076                                    | (val & 0x00ff));
3077   }
3078
3079   // Insert X into VAL based on the Thumb2 instruction encoding
3080   // described above.
3081   static inline typename elfcpp::Swap<32, big_endian>::Valtype
3082   insert_val_thumb_movw_movt(
3083       typename elfcpp::Swap<32, big_endian>::Valtype val,
3084       typename elfcpp::Swap<32, big_endian>::Valtype x)
3085   {
3086     val &= 0xfbf08f00;
3087     val |= (x & 0xf000) << 4;
3088     val |= (x & 0x0800) << 15;
3089     val |= (x & 0x0700) << 4;
3090     val |= (x & 0x00ff);
3091     return val;
3092   }
3093
3094   // Calculate the smallest constant Kn for the specified residual.
3095   // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3096   static uint32_t
3097   calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
3098   {
3099     int32_t msb;
3100
3101     if (residual == 0)
3102       return 0;
3103     // Determine the most significant bit in the residual and
3104     // align the resulting value to a 2-bit boundary.
3105     for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
3106       ;
3107     // The desired shift is now (msb - 6), or zero, whichever
3108     // is the greater.
3109     return (((msb - 6) < 0) ? 0 : (msb - 6));
3110   }
3111
3112   // Calculate the final residual for the specified group index.
3113   // If the passed group index is less than zero, the method will return
3114   // the value of the specified residual without any change.
3115   // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3116   static typename elfcpp::Swap<32, big_endian>::Valtype
3117   calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3118                     const int group)
3119   {
3120     for (int n = 0; n <= group; n++)
3121       {
3122         // Calculate which part of the value to mask.
3123         uint32_t shift = calc_grp_kn(residual);
3124         // Calculate the residual for the next time around.
3125         residual &= ~(residual & (0xff << shift));
3126       }
3127
3128     return residual;
3129   }
3130
3131   // Calculate the value of Gn for the specified group index.
3132   // We return it in the form of an encoded constant-and-rotation.
3133   // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3134   static typename elfcpp::Swap<32, big_endian>::Valtype
3135   calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3136               const int group)
3137   {
3138     typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
3139     uint32_t shift = 0;
3140
3141     for (int n = 0; n <= group; n++)
3142       {
3143         // Calculate which part of the value to mask.
3144         shift = calc_grp_kn(residual);
3145         // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3146         gn = residual & (0xff << shift);
3147         // Calculate the residual for the next time around.
3148         residual &= ~gn;
3149       }
3150     // Return Gn in the form of an encoded constant-and-rotation.
3151     return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
3152   }
3153
3154  public:
3155   // Handle ARM long branches.
3156   static typename This::Status
3157   arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3158                     unsigned char*, const Sized_symbol<32>*,
3159                     const Arm_relobj<big_endian>*, unsigned int,
3160                     const Symbol_value<32>*, Arm_address, Arm_address, bool);
3161
3162   // Handle THUMB long branches.
3163   static typename This::Status
3164   thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3165                       unsigned char*, const Sized_symbol<32>*,
3166                       const Arm_relobj<big_endian>*, unsigned int,
3167                       const Symbol_value<32>*, Arm_address, Arm_address, bool);
3168
3169
3170   // Return the branch offset of a 32-bit THUMB branch.
3171   static inline int32_t
3172   thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3173   {
3174     // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3175     // involving the J1 and J2 bits.
3176     uint32_t s = (upper_insn & (1U << 10)) >> 10;
3177     uint32_t upper = upper_insn & 0x3ffU;
3178     uint32_t lower = lower_insn & 0x7ffU;
3179     uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
3180     uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
3181     uint32_t i1 = j1 ^ s ? 0 : 1;
3182     uint32_t i2 = j2 ^ s ? 0 : 1;
3183
3184     return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22)
3185                                    | (upper << 12) | (lower << 1));
3186   }
3187
3188   // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3189   // UPPER_INSN is the original upper instruction of the branch.  Caller is
3190   // responsible for overflow checking and BLX offset adjustment.
3191   static inline uint16_t
3192   thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
3193   {
3194     uint32_t s = offset < 0 ? 1 : 0;
3195     uint32_t bits = static_cast<uint32_t>(offset);
3196     return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
3197   }
3198
3199   // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3200   // LOWER_INSN is the original lower instruction of the branch.  Caller is
3201   // responsible for overflow checking and BLX offset adjustment.
3202   static inline uint16_t
3203   thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
3204   {
3205     uint32_t s = offset < 0 ? 1 : 0;
3206     uint32_t bits = static_cast<uint32_t>(offset);
3207     return ((lower_insn & ~0x2fffU)
3208             | ((((bits >> 23) & 1) ^ !s) << 13)
3209             | ((((bits >> 22) & 1) ^ !s) << 11)
3210             | ((bits >> 1) & 0x7ffU));
3211   }
3212
3213   // Return the branch offset of a 32-bit THUMB conditional branch.
3214   static inline int32_t
3215   thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3216   {
3217     uint32_t s = (upper_insn & 0x0400U) >> 10;
3218     uint32_t j1 = (lower_insn & 0x2000U) >> 13;
3219     uint32_t j2 = (lower_insn & 0x0800U) >> 11;
3220     uint32_t lower = (lower_insn & 0x07ffU);
3221     uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
3222
3223     return Bits<21>::sign_extend32((upper << 12) | (lower << 1));
3224   }
3225
3226   // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3227   // instruction.  UPPER_INSN is the original upper instruction of the branch.
3228   // Caller is responsible for overflow checking.
3229   static inline uint16_t
3230   thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
3231   {
3232     uint32_t s = offset < 0 ? 1 : 0;
3233     uint32_t bits = static_cast<uint32_t>(offset);
3234     return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
3235   }
3236
3237   // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3238   // instruction.  LOWER_INSN is the original lower instruction of the branch.
3239   // The caller is responsible for overflow checking.
3240   static inline uint16_t
3241   thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
3242   {
3243     uint32_t bits = static_cast<uint32_t>(offset);
3244     uint32_t j2 = (bits & 0x00080000U) >> 19;
3245     uint32_t j1 = (bits & 0x00040000U) >> 18;
3246     uint32_t lo = (bits & 0x00000ffeU) >> 1;
3247
3248     return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
3249   }
3250
3251   // R_ARM_ABS8: S + A
3252   static inline typename This::Status
3253   abs8(unsigned char* view,
3254        const Sized_relobj_file<32, big_endian>* object,
3255        const Symbol_value<32>* psymval)
3256   {
3257     typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
3258     Valtype* wv = reinterpret_cast<Valtype*>(view);
3259     Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
3260     int32_t addend = Bits<8>::sign_extend32(val);
3261     Arm_address x = psymval->value(object, addend);
3262     val = Bits<32>::bit_select32(val, x, 0xffU);
3263     elfcpp::Swap<8, big_endian>::writeval(wv, val);
3264
3265     // R_ARM_ABS8 permits signed or unsigned results.
3266     return (Bits<8>::has_signed_unsigned_overflow32(x)
3267             ? This::STATUS_OVERFLOW
3268             : This::STATUS_OKAY);
3269   }
3270
3271   // R_ARM_THM_ABS5: S + A
3272   static inline typename This::Status
3273   thm_abs5(unsigned char* view,
3274        const Sized_relobj_file<32, big_endian>* object,
3275        const Symbol_value<32>* psymval)
3276   {
3277     typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3278     typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3279     Valtype* wv = reinterpret_cast<Valtype*>(view);
3280     Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3281     Reltype addend = (val & 0x7e0U) >> 6;
3282     Reltype x = psymval->value(object, addend);
3283     val = Bits<32>::bit_select32(val, x << 6, 0x7e0U);
3284     elfcpp::Swap<16, big_endian>::writeval(wv, val);
3285     return (Bits<5>::has_overflow32(x)
3286             ? This::STATUS_OVERFLOW
3287             : This::STATUS_OKAY);
3288   }
3289
3290   // R_ARM_ABS12: S + A
3291   static inline typename This::Status
3292   abs12(unsigned char* view,
3293         const Sized_relobj_file<32, big_endian>* object,
3294         const Symbol_value<32>* psymval)
3295   {
3296     typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3297     typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3298     Valtype* wv = reinterpret_cast<Valtype*>(view);
3299     Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3300     Reltype addend = val & 0x0fffU;
3301     Reltype x = psymval->value(object, addend);
3302     val = Bits<32>::bit_select32(val, x, 0x0fffU);
3303     elfcpp::Swap<32, big_endian>::writeval(wv, val);
3304     return (Bits<12>::has_overflow32(x)
3305             ? This::STATUS_OVERFLOW
3306             : This::STATUS_OKAY);
3307   }
3308
3309   // R_ARM_ABS16: S + A
3310   static inline typename This::Status
3311   abs16(unsigned char* view,
3312         const Sized_relobj_file<32, big_endian>* object,
3313         const Symbol_value<32>* psymval)
3314   {
3315     typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype;
3316     Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view);
3317     int32_t addend = Bits<16>::sign_extend32(val);
3318     Arm_address x = psymval->value(object, addend);
3319     val = Bits<32>::bit_select32(val, x, 0xffffU);
3320     elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val);
3321
3322     // R_ARM_ABS16 permits signed or unsigned results.
3323     return (Bits<16>::has_signed_unsigned_overflow32(x)
3324             ? This::STATUS_OVERFLOW
3325             : This::STATUS_OKAY);
3326   }
3327
3328   // R_ARM_ABS32: (S + A) | T
3329   static inline typename This::Status
3330   abs32(unsigned char* view,
3331         const Sized_relobj_file<32, big_endian>* object,
3332         const Symbol_value<32>* psymval,
3333         Arm_address thumb_bit)
3334   {
3335     typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3336     Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3337     Valtype x = psymval->value(object, addend) | thumb_bit;
3338     elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3339     return This::STATUS_OKAY;
3340   }
3341
3342   // R_ARM_REL32: (S + A) | T - P
3343   static inline typename This::Status
3344   rel32(unsigned char* view,
3345         const Sized_relobj_file<32, big_endian>* object,
3346         const Symbol_value<32>* psymval,
3347         Arm_address address,
3348         Arm_address thumb_bit)
3349   {
3350     typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3351     Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3352     Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3353     elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3354     return This::STATUS_OKAY;
3355   }
3356
3357   // R_ARM_THM_JUMP24: (S + A) | T - P
3358   static typename This::Status
3359   thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object,
3360              const Symbol_value<32>* psymval, Arm_address address,
3361              Arm_address thumb_bit);
3362
3363   // R_ARM_THM_JUMP6: S + A â€“ P
3364   static inline typename This::Status
3365   thm_jump6(unsigned char* view,
3366             const Sized_relobj_file<32, big_endian>* object,
3367             const Symbol_value<32>* psymval,
3368             Arm_address address)
3369   {
3370     typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3371     typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3372     Valtype* wv = reinterpret_cast<Valtype*>(view);
3373     Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3374     // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3375     Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
3376     Reltype x = (psymval->value(object, addend) - address);
3377     val = (val & 0xfd07) | ((x  & 0x0040) << 3) | ((val & 0x003e) << 2);
3378     elfcpp::Swap<16, big_endian>::writeval(wv, val);
3379     // CZB does only forward jumps.
3380     return ((x > 0x007e)
3381             ? This::STATUS_OVERFLOW
3382             : This::STATUS_OKAY);
3383   }
3384
3385   // R_ARM_THM_JUMP8: S + A â€“ P
3386   static inline typename This::Status
3387   thm_jump8(unsigned char* view,
3388             const Sized_relobj_file<32, big_endian>* object,
3389             const Symbol_value<32>* psymval,
3390             Arm_address address)
3391   {
3392     typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3393     Valtype* wv = reinterpret_cast<Valtype*>(view);
3394     Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3395     int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1);
3396     int32_t x = (psymval->value(object, addend) - address);
3397     elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00)
3398                                                 | ((x & 0x01fe) >> 1)));
3399     // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3400     return (Bits<9>::has_overflow32(x)
3401             ? This::STATUS_OVERFLOW
3402             : This::STATUS_OKAY);
3403   }
3404
3405   // R_ARM_THM_JUMP11: S + A â€“ P
3406   static inline typename This::Status
3407   thm_jump11(unsigned char* view,
3408             const Sized_relobj_file<32, big_endian>* object,
3409             const Symbol_value<32>* psymval,
3410             Arm_address address)
3411   {
3412     typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3413     Valtype* wv = reinterpret_cast<Valtype*>(view);
3414     Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3415     int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1);
3416     int32_t x = (psymval->value(object, addend) - address);
3417     elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800)
3418                                                 | ((x & 0x0ffe) >> 1)));
3419     // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3420     return (Bits<12>::has_overflow32(x)
3421             ? This::STATUS_OVERFLOW
3422             : This::STATUS_OKAY);
3423   }
3424
3425   // R_ARM_BASE_PREL: B(S) + A - P
3426   static inline typename This::Status
3427   base_prel(unsigned char* view,
3428             Arm_address origin,
3429             Arm_address address)
3430   {
3431     Base::rel32(view, origin - address);
3432     return STATUS_OKAY;
3433   }
3434
3435   // R_ARM_BASE_ABS: B(S) + A
3436   static inline typename This::Status
3437   base_abs(unsigned char* view,
3438            Arm_address origin)
3439   {
3440     Base::rel32(view, origin);
3441     return STATUS_OKAY;
3442   }
3443
3444   // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3445   static inline typename This::Status
3446   got_brel(unsigned char* view,
3447            typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
3448   {
3449     Base::rel32(view, got_offset);
3450     return This::STATUS_OKAY;
3451   }
3452
3453   // R_ARM_GOT_PREL: GOT(S) + A - P
3454   static inline typename This::Status
3455   got_prel(unsigned char* view,
3456            Arm_address got_entry,
3457            Arm_address address)
3458   {
3459     Base::rel32(view, got_entry - address);
3460     return This::STATUS_OKAY;
3461   }
3462
3463   // R_ARM_PREL: (S + A) | T - P
3464   static inline typename This::Status
3465   prel31(unsigned char* view,
3466          const Sized_relobj_file<32, big_endian>* object,
3467          const Symbol_value<32>* psymval,
3468          Arm_address address,
3469          Arm_address thumb_bit)
3470   {
3471     typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3472     Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3473     Valtype addend = Bits<31>::sign_extend32(val);
3474     Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3475     val = Bits<32>::bit_select32(val, x, 0x7fffffffU);
3476     elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val);
3477     return (Bits<31>::has_overflow32(x)
3478             ? This::STATUS_OVERFLOW
3479             : This::STATUS_OKAY);
3480   }
3481
3482   // R_ARM_MOVW_ABS_NC: (S + A) | T     (relative address base is )
3483   // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3484   // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3485   // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3486   static inline typename This::Status
3487   movw(unsigned char* view,
3488        const Sized_relobj_file<32, big_endian>* object,
3489        const Symbol_value<32>* psymval,
3490        Arm_address relative_address_base,
3491        Arm_address thumb_bit,
3492        bool check_overflow)
3493   {
3494     typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3495     Valtype* wv = reinterpret_cast<Valtype*>(view);
3496     Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3497     Valtype addend = This::extract_arm_movw_movt_addend(val);
3498     Valtype x = ((psymval->value(object, addend) | thumb_bit)
3499                  - relative_address_base);
3500     val = This::insert_val_arm_movw_movt(val, x);
3501     elfcpp::Swap<32, big_endian>::writeval(wv, val);
3502     return ((check_overflow && Bits<16>::has_overflow32(x))
3503             ? This::STATUS_OVERFLOW
3504             : This::STATUS_OKAY);
3505   }
3506
3507   // R_ARM_MOVT_ABS: S + A      (relative address base is 0)
3508   // R_ARM_MOVT_PREL: S + A - P
3509   // R_ARM_MOVT_BREL: S + A - B(S)
3510   static inline typename This::Status
3511   movt(unsigned char* view,
3512        const Sized_relobj_file<32, big_endian>* object,
3513        const Symbol_value<32>* psymval,
3514        Arm_address relative_address_base)
3515   {
3516     typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3517     Valtype* wv = reinterpret_cast<Valtype*>(view);
3518     Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3519     Valtype addend = This::extract_arm_movw_movt_addend(val);
3520     Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3521     val = This::insert_val_arm_movw_movt(val, x);
3522     elfcpp::Swap<32, big_endian>::writeval(wv, val);
3523     // FIXME: IHI0044D says that we should check for overflow.
3524     return This::STATUS_OKAY;
3525   }
3526
3527   // R_ARM_THM_MOVW_ABS_NC: S + A | T           (relative_address_base is 0)
3528   // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3529   // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3530   // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3531   static inline typename This::Status
3532   thm_movw(unsigned char* view,
3533            const Sized_relobj_file<32, big_endian>* object,
3534            const Symbol_value<32>* psymval,
3535            Arm_address relative_address_base,
3536            Arm_address thumb_bit,
3537            bool check_overflow)
3538   {
3539     typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3540     typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3541     Valtype* wv = reinterpret_cast<Valtype*>(view);
3542     Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3543                   | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3544     Reltype addend = This::extract_thumb_movw_movt_addend(val);
3545     Reltype x =
3546       (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3547     val = This::insert_val_thumb_movw_movt(val, x);
3548     elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3549     elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3550     return ((check_overflow && Bits<16>::has_overflow32(x))
3551             ? This::STATUS_OVERFLOW
3552             : This::STATUS_OKAY);
3553   }
3554
3555   // R_ARM_THM_MOVT_ABS: S + A          (relative address base is 0)
3556   // R_ARM_THM_MOVT_PREL: S + A - P
3557   // R_ARM_THM_MOVT_BREL: S + A - B(S)
3558   static inline typename This::Status
3559   thm_movt(unsigned char* view,
3560            const Sized_relobj_file<32, big_endian>* object,
3561            const Symbol_value<32>* psymval,
3562            Arm_address relative_address_base)
3563   {
3564     typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3565     typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3566     Valtype* wv = reinterpret_cast<Valtype*>(view);
3567     Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3568                   | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3569     Reltype addend = This::extract_thumb_movw_movt_addend(val);
3570     Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3571     val = This::insert_val_thumb_movw_movt(val, x);
3572     elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3573     elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3574     return This::STATUS_OKAY;
3575   }
3576
3577   // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3578   static inline typename This::Status
3579   thm_alu11(unsigned char* view,
3580             const Sized_relobj_file<32, big_endian>* object,
3581             const Symbol_value<32>* psymval,
3582             Arm_address address,
3583             Arm_address thumb_bit)
3584   {
3585     typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3586     typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3587     Valtype* wv = reinterpret_cast<Valtype*>(view);
3588     Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3589                    | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3590
3591     //        f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3592     // -----------------------------------------------------------------------
3593     // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd     |imm8
3594     // ADDW   1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd     |imm8
3595     // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd     |imm8
3596     // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd     |imm8
3597     // SUBW   1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd     |imm8
3598     // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd     |imm8
3599
3600     // Determine a sign for the addend.
3601     const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3602                       || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3603     // Thumb2 addend encoding:
3604     // imm12 := i | imm3 | imm8
3605     int32_t addend = (insn & 0xff)
3606                      | ((insn & 0x00007000) >> 4)
3607                      | ((insn & 0x04000000) >> 15);
3608     // Apply a sign to the added.
3609     addend *= sign;
3610
3611     int32_t x = (psymval->value(object, addend) | thumb_bit)
3612                 - (address & 0xfffffffc);
3613     Reltype val = abs(x);
3614     // Mask out the value and a distinct part of the ADD/SUB opcode
3615     // (bits 7:5 of opword).
3616     insn = (insn & 0xfb0f8f00)
3617            | (val & 0xff)
3618            | ((val & 0x700) << 4)
3619            | ((val & 0x800) << 15);
3620     // Set the opcode according to whether the value to go in the
3621     // place is negative.
3622     if (x < 0)
3623       insn |= 0x00a00000;
3624
3625     elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3626     elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3627     return ((val > 0xfff) ?
3628             This::STATUS_OVERFLOW : This::STATUS_OKAY);
3629   }
3630
3631   // R_ARM_THM_PC8: S + A - Pa (Thumb)
3632   static inline typename This::Status
3633   thm_pc8(unsigned char* view,
3634           const Sized_relobj_file<32, big_endian>* object,
3635           const Symbol_value<32>* psymval,
3636           Arm_address address)
3637   {
3638     typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3639     typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3640     Valtype* wv = reinterpret_cast<Valtype*>(view);
3641     Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3642     Reltype addend = ((insn & 0x00ff) << 2);
3643     int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3644     Reltype val = abs(x);
3645     insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3646
3647     elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3648     return ((val > 0x03fc)
3649             ? This::STATUS_OVERFLOW
3650             : This::STATUS_OKAY);
3651   }
3652
3653   // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3654   static inline typename This::Status
3655   thm_pc12(unsigned char* view,
3656            const Sized_relobj_file<32, big_endian>* object,
3657            const Symbol_value<32>* psymval,
3658            Arm_address address)
3659   {
3660     typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3661     typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3662     Valtype* wv = reinterpret_cast<Valtype*>(view);
3663     Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3664                    | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3665     // Determine a sign for the addend (positive if the U bit is 1).
3666     const int sign = (insn & 0x00800000) ? 1 : -1;
3667     int32_t addend = (insn & 0xfff);
3668     // Apply a sign to the added.
3669     addend *= sign;
3670
3671     int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3672     Reltype val = abs(x);
3673     // Mask out and apply the value and the U bit.
3674     insn = (insn & 0xff7ff000) | (val & 0xfff);
3675     // Set the U bit according to whether the value to go in the
3676     // place is positive.
3677     if (x >= 0)
3678       insn |= 0x00800000;
3679
3680     elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3681     elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3682     return ((val > 0xfff) ?
3683             This::STATUS_OVERFLOW : This::STATUS_OKAY);
3684   }
3685
3686   // R_ARM_V4BX
3687   static inline typename This::Status
3688   v4bx(const Relocate_info<32, big_endian>* relinfo,
3689        unsigned char* view,
3690        const Arm_relobj<big_endian>* object,
3691        const Arm_address address,
3692        const bool is_interworking)
3693   {
3694
3695     typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3696     Valtype* wv = reinterpret_cast<Valtype*>(view);
3697     Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3698
3699     // Ensure that we have a BX instruction.
3700     gold_assert((val & 0x0ffffff0) == 0x012fff10);
3701     const uint32_t reg = (val & 0xf);
3702     if (is_interworking && reg != 0xf)
3703       {
3704         Stub_table<big_endian>* stub_table =
3705             object->stub_table(relinfo->data_shndx);
3706         gold_assert(stub_table != NULL);
3707
3708         Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3709         gold_assert(stub != NULL);
3710
3711         int32_t veneer_address =
3712             stub_table->address() + stub->offset() - 8 - address;
3713         gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3714                     && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3715         // Replace with a branch to veneer (B <addr>)
3716         val = (val & 0xf0000000) | 0x0a000000
3717               | ((veneer_address >> 2) & 0x00ffffff);
3718       }
3719     else
3720       {
3721         // Preserve Rm (lowest four bits) and the condition code
3722         // (highest four bits). Other bits encode MOV PC,Rm.
3723         val = (val & 0xf000000f) | 0x01a0f000;
3724       }
3725     elfcpp::Swap<32, big_endian>::writeval(wv, val);
3726     return This::STATUS_OKAY;
3727   }
3728
3729   // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3730   // R_ARM_ALU_PC_G0:    ((S + A) | T) - P
3731   // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3732   // R_ARM_ALU_PC_G1:    ((S + A) | T) - P
3733   // R_ARM_ALU_PC_G2:    ((S + A) | T) - P
3734   // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3735   // R_ARM_ALU_SB_G0:    ((S + A) | T) - B(S)
3736   // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3737   // R_ARM_ALU_SB_G1:    ((S + A) | T) - B(S)
3738   // R_ARM_ALU_SB_G2:    ((S + A) | T) - B(S)
3739   static inline typename This::Status
3740   arm_grp_alu(unsigned char* view,
3741         const Sized_relobj_file<32, big_endian>* object,
3742         const Symbol_value<32>* psymval,
3743         const int group,
3744         Arm_address address,
3745         Arm_address thumb_bit,
3746         bool check_overflow)
3747   {
3748     gold_assert(group >= 0 && group < 3);
3749     typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3750     Valtype* wv = reinterpret_cast<Valtype*>(view);
3751     Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3752
3753     // ALU group relocations are allowed only for the ADD/SUB instructions.
3754     // (0x00800000 - ADD, 0x00400000 - SUB)
3755     const Valtype opcode = insn & 0x01e00000;
3756     if (opcode != 0x00800000 && opcode != 0x00400000)
3757       return This::STATUS_BAD_RELOC;
3758
3759     // Determine a sign for the addend.
3760     const int sign = (opcode == 0x00800000) ? 1 : -1;
3761     // shifter = rotate_imm * 2
3762     const uint32_t shifter = (insn & 0xf00) >> 7;
3763     // Initial addend value.
3764     int32_t addend = insn & 0xff;
3765     // Rotate addend right by shifter.
3766     addend = (addend >> shifter) | (addend << (32 - shifter));
3767     // Apply a sign to the added.
3768     addend *= sign;
3769
3770     int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3771     Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3772     // Check for overflow if required
3773     if (check_overflow
3774         && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3775       return This::STATUS_OVERFLOW;
3776
3777     // Mask out the value and the ADD/SUB part of the opcode; take care
3778     // not to destroy the S bit.
3779     insn &= 0xff1ff000;
3780     // Set the opcode according to whether the value to go in the
3781     // place is negative.
3782     insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3783     // Encode the offset (encoded Gn).
3784     insn |= gn;
3785
3786     elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3787     return This::STATUS_OKAY;
3788   }
3789
3790   // R_ARM_LDR_PC_G0: S + A - P
3791   // R_ARM_LDR_PC_G1: S + A - P
3792   // R_ARM_LDR_PC_G2: S + A - P
3793   // R_ARM_LDR_SB_G0: S + A - B(S)
3794   // R_ARM_LDR_SB_G1: S + A - B(S)
3795   // R_ARM_LDR_SB_G2: S + A - B(S)
3796   static inline typename This::Status
3797   arm_grp_ldr(unsigned char* view,
3798         const Sized_relobj_file<32, big_endian>* object,
3799         const Symbol_value<32>* psymval,
3800         const int group,
3801         Arm_address address)
3802   {
3803     gold_assert(group >= 0 && group < 3);
3804     typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3805     Valtype* wv = reinterpret_cast<Valtype*>(view);
3806     Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3807
3808     const int sign = (insn & 0x00800000) ? 1 : -1;
3809     int32_t addend = (insn & 0xfff) * sign;
3810     int32_t x = (psymval->value(object, addend) - address);
3811     // Calculate the relevant G(n-1) value to obtain this stage residual.
3812     Valtype residual =
3813         Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3814     if (residual >= 0x1000)
3815       return This::STATUS_OVERFLOW;
3816
3817     // Mask out the value and U bit.
3818     insn &= 0xff7ff000;
3819     // Set the U bit for non-negative values.
3820     if (x >= 0)
3821       insn |= 0x00800000;
3822     insn |= residual;
3823
3824     elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3825     return This::STATUS_OKAY;
3826   }
3827
3828   // R_ARM_LDRS_PC_G0: S + A - P
3829   // R_ARM_LDRS_PC_G1: S + A - P
3830   // R_ARM_LDRS_PC_G2: S + A - P
3831   // R_ARM_LDRS_SB_G0: S + A - B(S)
3832   // R_ARM_LDRS_SB_G1: S + A - B(S)
3833   // R_ARM_LDRS_SB_G2: S + A - B(S)
3834   static inline typename This::Status
3835   arm_grp_ldrs(unsigned char* view,
3836         const Sized_relobj_file<32, big_endian>* object,
3837         const Symbol_value<32>* psymval,
3838         const int group,
3839         Arm_address address)
3840   {
3841     gold_assert(group >= 0 && group < 3);
3842     typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3843     Valtype* wv = reinterpret_cast<Valtype*>(view);
3844     Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3845
3846     const int sign = (insn & 0x00800000) ? 1 : -1;
3847     int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3848     int32_t x = (psymval->value(object, addend) - address);
3849     // Calculate the relevant G(n-1) value to obtain this stage residual.
3850     Valtype residual =
3851         Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3852    if (residual >= 0x100)
3853       return This::STATUS_OVERFLOW;
3854
3855     // Mask out the value and U bit.
3856     insn &= 0xff7ff0f0;
3857     // Set the U bit for non-negative values.
3858     if (x >= 0)
3859       insn |= 0x00800000;
3860     insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3861
3862     elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3863     return This::STATUS_OKAY;
3864   }
3865
3866   // R_ARM_LDC_PC_G0: S + A - P
3867   // R_ARM_LDC_PC_G1: S + A - P
3868   // R_ARM_LDC_PC_G2: S + A - P
3869   // R_ARM_LDC_SB_G0: S + A - B(S)
3870   // R_ARM_LDC_SB_G1: S + A - B(S)
3871   // R_ARM_LDC_SB_G2: S + A - B(S)
3872   static inline typename This::Status
3873   arm_grp_ldc(unsigned char* view,
3874       const Sized_relobj_file<32, big_endian>* object,
3875       const Symbol_value<32>* psymval,
3876       const int group,
3877       Arm_address address)
3878   {
3879     gold_assert(group >= 0 && group < 3);
3880     typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3881     Valtype* wv = reinterpret_cast<Valtype*>(view);
3882     Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3883
3884     const int sign = (insn & 0x00800000) ? 1 : -1;
3885     int32_t addend = ((insn & 0xff) << 2) * sign;
3886     int32_t x = (psymval->value(object, addend) - address);
3887     // Calculate the relevant G(n-1) value to obtain this stage residual.
3888     Valtype residual =
3889       Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3890     if ((residual & 0x3) != 0 || residual >= 0x400)
3891       return This::STATUS_OVERFLOW;
3892
3893     // Mask out the value and U bit.
3894     insn &= 0xff7fff00;
3895     // Set the U bit for non-negative values.
3896     if (x >= 0)
3897       insn |= 0x00800000;
3898     insn |= (residual >> 2);
3899
3900     elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3901     return This::STATUS_OKAY;
3902   }
3903 };
3904
3905 // Relocate ARM long branches.  This handles relocation types
3906 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3907 // If IS_WEAK_UNDEFINED_WITH_PLT is true.  The target symbol is weakly
3908 // undefined and we do not use PLT in this relocation.  In such a case,
3909 // the branch is converted into an NOP.
3910
3911 template<bool big_endian>
3912 typename Arm_relocate_functions<big_endian>::Status
3913 Arm_relocate_functions<big_endian>::arm_branch_common(
3914     unsigned int r_type,
3915     const Relocate_info<32, big_endian>* relinfo,
3916     unsigned char* view,
3917     const Sized_symbol<32>* gsym,
3918     const Arm_relobj<big_endian>* object,
3919     unsigned int r_sym,
3920     const Symbol_value<32>* psymval,
3921     Arm_address address,
3922     Arm_address thumb_bit,
3923     bool is_weakly_undefined_without_plt)
3924 {
3925   typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3926   Valtype* wv = reinterpret_cast<Valtype*>(view);
3927   Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3928
3929   bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3930                     && ((val & 0x0f000000UL) == 0x0a000000UL);
3931   bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3932   bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3933                           && ((val & 0x0f000000UL) == 0x0b000000UL);
3934   bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3935   bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3936
3937   // Check that the instruction is valid.
3938   if (r_type == elfcpp::R_ARM_CALL)
3939     {
3940       if (!insn_is_uncond_bl && !insn_is_blx)
3941         return This::STATUS_BAD_RELOC;
3942     }
3943   else if (r_type == elfcpp::R_ARM_JUMP24)
3944     {
3945       if (!insn_is_b && !insn_is_cond_bl)
3946         return This::STATUS_BAD_RELOC;
3947     }
3948   else if (r_type == elfcpp::R_ARM_PLT32)
3949     {
3950       if (!insn_is_any_branch)
3951         return This::STATUS_BAD_RELOC;
3952     }
3953   else if (r_type == elfcpp::R_ARM_XPC25)
3954     {
3955       // FIXME: AAELF document IH0044C does not say much about it other
3956       // than it being obsolete.
3957       if (!insn_is_any_branch)
3958         return This::STATUS_BAD_RELOC;
3959     }
3960   else
3961     gold_unreachable();
3962
3963   // A branch to an undefined weak symbol is turned into a jump to
3964   // the next instruction unless a PLT entry will be created.
3965   // Do the same for local undefined symbols.
3966   // The jump to the next instruction is optimized as a NOP depending
3967   // on the architecture.
3968   const Target_arm<big_endian>* arm_target =
3969     Target_arm<big_endian>::default_target();
3970   if (is_weakly_undefined_without_plt)
3971     {
3972       gold_assert(!parameters->options().relocatable());
3973       Valtype cond = val & 0xf0000000U;
3974       if (arm_target->may_use_arm_nop())
3975         val = cond | 0x0320f000;
3976       else
3977         val = cond | 0x01a00000;        // Using pre-UAL nop: mov r0, r0.
3978       elfcpp::Swap<32, big_endian>::writeval(wv, val);
3979       return This::STATUS_OKAY;
3980     }
3981
3982   Valtype addend = Bits<26>::sign_extend32(val << 2);
3983   Valtype branch_target = psymval->value(object, addend);
3984   int32_t branch_offset = branch_target - address;
3985
3986   // We need a stub if the branch offset is too large or if we need
3987   // to switch mode.
3988   bool may_use_blx = arm_target->may_use_v5t_interworking();
3989   Reloc_stub* stub = NULL;
3990
3991   if (!parameters->options().relocatable()
3992       && (Bits<26>::has_overflow32(branch_offset)
3993           || ((thumb_bit != 0)
3994               && !(may_use_blx && r_type == elfcpp::R_ARM_CALL))))
3995     {
3996       Valtype unadjusted_branch_target = psymval->value(object, 0);
3997
3998       Stub_type stub_type =
3999         Reloc_stub::stub_type_for_reloc(r_type, address,
4000                                         unadjusted_branch_target,
4001                                         (thumb_bit != 0));
4002       if (stub_type != arm_stub_none)
4003         {
4004           Stub_table<big_endian>* stub_table =
4005             object->stub_table(relinfo->data_shndx);
4006           gold_assert(stub_table != NULL);
4007
4008           Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4009           stub = stub_table->find_reloc_stub(stub_key);
4010           gold_assert(stub != NULL);
4011           thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4012           branch_target = stub_table->address() + stub->offset() + addend;
4013           branch_offset = branch_target - address;
4014           gold_assert(!Bits<26>::has_overflow32(branch_offset));
4015         }
4016     }
4017
4018   // At this point, if we still need to switch mode, the instruction
4019   // must either be a BLX or a BL that can be converted to a BLX.
4020   if (thumb_bit != 0)
4021     {
4022       // Turn BL to BLX.
4023       gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
4024       val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
4025     }
4026
4027   val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL);
4028   elfcpp::Swap<32, big_endian>::writeval(wv, val);
4029   return (Bits<26>::has_overflow32(branch_offset)
4030           ? This::STATUS_OVERFLOW
4031           : This::STATUS_OKAY);
4032 }
4033
4034 // Relocate THUMB long branches.  This handles relocation types
4035 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4036 // If IS_WEAK_UNDEFINED_WITH_PLT is true.  The target symbol is weakly
4037 // undefined and we do not use PLT in this relocation.  In such a case,
4038 // the branch is converted into an NOP.
4039
4040 template<bool big_endian>
4041 typename Arm_relocate_functions<big_endian>::Status
4042 Arm_relocate_functions<big_endian>::thumb_branch_common(
4043     unsigned int r_type,
4044     const Relocate_info<32, big_endian>* relinfo,
4045     unsigned char* view,
4046     const Sized_symbol<32>* gsym,
4047     const Arm_relobj<big_endian>* object,
4048     unsigned int r_sym,
4049     const Symbol_value<32>* psymval,
4050     Arm_address address,
4051     Arm_address thumb_bit,
4052     bool is_weakly_undefined_without_plt)
4053 {
4054   typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4055   Valtype* wv = reinterpret_cast<Valtype*>(view);
4056   uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4057   uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4058
4059   // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4060   // into account.
4061   bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
4062   bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
4063
4064   // Check that the instruction is valid.
4065   if (r_type == elfcpp::R_ARM_THM_CALL)
4066     {
4067       if (!is_bl_insn && !is_blx_insn)
4068         return This::STATUS_BAD_RELOC;
4069     }
4070   else if (r_type == elfcpp::R_ARM_THM_JUMP24)
4071     {
4072       // This cannot be a BLX.
4073       if (!is_bl_insn)
4074         return This::STATUS_BAD_RELOC;
4075     }
4076   else if (r_type == elfcpp::R_ARM_THM_XPC22)
4077     {
4078       // Check for Thumb to Thumb call.
4079       if (!is_blx_insn)
4080         return This::STATUS_BAD_RELOC;
4081       if (thumb_bit != 0)
4082         {
4083           gold_warning(_("%s: Thumb BLX instruction targets "
4084                          "thumb function '%s'."),
4085                          object->name().c_str(),
4086                          (gsym ? gsym->name() : "(local)"));
4087           // Convert BLX to BL.
4088           lower_insn |= 0x1000U;
4089         }
4090     }
4091   else
4092     gold_unreachable();
4093
4094   // A branch to an undefined weak symbol is turned into a jump to
4095   // the next instruction unless a PLT entry will be created.
4096   // The jump to the next instruction is optimized as a NOP.W for
4097   // Thumb-2 enabled architectures.
4098   const Target_arm<big_endian>* arm_target =
4099     Target_arm<big_endian>::default_target();
4100   if (is_weakly_undefined_without_plt)
4101     {
4102       gold_assert(!parameters->options().relocatable());
4103       if (arm_target->may_use_thumb2_nop())
4104         {
4105           elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
4106           elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
4107         }
4108       else
4109         {
4110           elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
4111           elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
4112         }
4113       return This::STATUS_OKAY;
4114     }
4115
4116   int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
4117   Arm_address branch_target = psymval->value(object, addend);
4118
4119   // For BLX, bit 1 of target address comes from bit 1 of base address.
4120   bool may_use_blx = arm_target->may_use_v5t_interworking();
4121   if (thumb_bit == 0 && may_use_blx)
4122     branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4123
4124   int32_t branch_offset = branch_target - address;
4125
4126   // We need a stub if the branch offset is too large or if we need
4127   // to switch mode.
4128   bool thumb2 = arm_target->using_thumb2();
4129   if (!parameters->options().relocatable()
4130       && ((!thumb2 && Bits<23>::has_overflow32(branch_offset))
4131           || (thumb2 && Bits<25>::has_overflow32(branch_offset))
4132           || ((thumb_bit == 0)
4133               && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4134                   || r_type == elfcpp::R_ARM_THM_JUMP24))))
4135     {
4136       Arm_address unadjusted_branch_target = psymval->value(object, 0);
4137
4138       Stub_type stub_type =
4139         Reloc_stub::stub_type_for_reloc(r_type, address,
4140                                         unadjusted_branch_target,
4141                                         (thumb_bit != 0));
4142
4143       if (stub_type != arm_stub_none)
4144         {
4145           Stub_table<big_endian>* stub_table =
4146             object->stub_table(relinfo->data_shndx);
4147           gold_assert(stub_table != NULL);
4148
4149           Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4150           Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
4151           gold_assert(stub != NULL);
4152           thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4153           branch_target = stub_table->address() + stub->offset() + addend;
4154           if (thumb_bit == 0 && may_use_blx)
4155             branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4156           branch_offset = branch_target - address;
4157         }
4158     }
4159
4160   // At this point, if we still need to switch mode, the instruction
4161   // must either be a BLX or a BL that can be converted to a BLX.
4162   if (thumb_bit == 0)
4163     {
4164       gold_assert(may_use_blx
4165                   && (r_type == elfcpp::R_ARM_THM_CALL
4166                       || r_type == elfcpp::R_ARM_THM_XPC22));
4167       // Make sure this is a BLX.
4168       lower_insn &= ~0x1000U;
4169     }
4170   else
4171     {
4172       // Make sure this is a BL.
4173       lower_insn |= 0x1000U;
4174     }
4175
4176   // For a BLX instruction, make sure that the relocation is rounded up
4177   // to a word boundary.  This follows the semantics of the instruction
4178   // which specifies that bit 1 of the target address will come from bit
4179   // 1 of the base address.
4180   if ((lower_insn & 0x5000U) == 0x4000U)
4181     gold_assert((branch_offset & 3) == 0);
4182
4183   // Put BRANCH_OFFSET back into the insn.  Assumes two's complement.
4184   // We use the Thumb-2 encoding, which is safe even if dealing with
4185   // a Thumb-1 instruction by virtue of our overflow check above.  */
4186   upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
4187   lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
4188
4189   elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4190   elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4191
4192   gold_assert(!Bits<25>::has_overflow32(branch_offset));
4193
4194   return ((thumb2
4195            ? Bits<25>::has_overflow32(branch_offset)
4196            : Bits<23>::has_overflow32(branch_offset))
4197           ? This::STATUS_OVERFLOW
4198           : This::STATUS_OKAY);
4199 }
4200
4201 // Relocate THUMB-2 long conditional branches.
4202 // If IS_WEAK_UNDEFINED_WITH_PLT is true.  The target symbol is weakly
4203 // undefined and we do not use PLT in this relocation.  In such a case,
4204 // the branch is converted into an NOP.
4205
4206 template<bool big_endian>
4207 typename Arm_relocate_functions<big_endian>::Status
4208 Arm_relocate_functions<big_endian>::thm_jump19(
4209     unsigned char* view,
4210     const Arm_relobj<big_endian>* object,
4211     const Symbol_value<32>* psymval,
4212     Arm_address address,
4213     Arm_address thumb_bit)
4214 {
4215   typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4216   Valtype* wv = reinterpret_cast<Valtype*>(view);
4217   uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4218   uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4219   int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
4220
4221   Arm_address branch_target = psymval->value(object, addend);
4222   int32_t branch_offset = branch_target - address;
4223
4224   // ??? Should handle interworking?  GCC might someday try to
4225   // use this for tail calls.
4226   // FIXME: We do support thumb entry to PLT yet.
4227   if (thumb_bit == 0)
4228     {
4229       gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4230       return This::STATUS_BAD_RELOC;
4231     }
4232
4233   // Put RELOCATION back into the insn.
4234   upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
4235   lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
4236
4237   // Put the relocated value back in the object file:
4238   elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4239   elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4240
4241   return (Bits<21>::has_overflow32(branch_offset)
4242           ? This::STATUS_OVERFLOW
4243           : This::STATUS_OKAY);
4244 }
4245
4246 // Get the GOT section, creating it if necessary.
4247
4248 template<bool big_endian>
4249 Arm_output_data_got<big_endian>*
4250 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
4251 {
4252   if (this->got_ == NULL)
4253     {
4254       gold_assert(symtab != NULL && layout != NULL);
4255
4256       // When using -z now, we can treat .got as a relro section.
4257       // Without -z now, it is modified after program startup by lazy
4258       // PLT relocations.
4259       bool is_got_relro = parameters->options().now();
4260       Output_section_order got_order = (is_got_relro
4261                                         ? ORDER_RELRO_LAST
4262                                         : ORDER_DATA);
4263
4264       // Unlike some targets (.e.g x86), ARM does not use separate .got and
4265       // .got.plt sections in output.  The output .got section contains both
4266       // PLT and non-PLT GOT entries.
4267       this->got_ = new Arm_output_data_got<big_endian>(symtab, layout);
4268
4269       layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4270                                       (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4271                                       this->got_, got_order, is_got_relro);
4272
4273       // The old GNU linker creates a .got.plt section.  We just
4274       // create another set of data in the .got section.  Note that we
4275       // always create a PLT if we create a GOT, although the PLT
4276       // might be empty.
4277       this->got_plt_ = new Output_data_space(4, "** GOT PLT");
4278       layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4279                                       (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4280                                       this->got_plt_, got_order, is_got_relro);
4281
4282       // The first three entries are reserved.
4283       this->got_plt_->set_current_data_size(3 * 4);
4284
4285       // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4286       symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
4287                                     Symbol_table::PREDEFINED,
4288                                     this->got_plt_,
4289                                     0, 0, elfcpp::STT_OBJECT,
4290                                     elfcpp::STB_LOCAL,
4291                                     elfcpp::STV_HIDDEN, 0,
4292                                     false, false);
4293
4294       // If there are any IRELATIVE relocations, they get GOT entries
4295       // in .got.plt after the jump slot entries.
4296       this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT");
4297       layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4298                                       (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4299                                       this->got_irelative_,
4300                                       got_order, is_got_relro);
4301
4302     }
4303   return this->got_;
4304 }
4305
4306 // Get the dynamic reloc section, creating it if necessary.
4307
4308 template<bool big_endian>
4309 typename Target_arm<big_endian>::Reloc_section*
4310 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
4311 {
4312   if (this->rel_dyn_ == NULL)
4313     {
4314       gold_assert(layout != NULL);
4315       // Create both relocation sections in the same place, so as to ensure
4316       // their relative order in the output section.
4317       this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
4318       this->rel_irelative_ = new Reloc_section(false);
4319       layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4320                                       elfcpp::SHF_ALLOC, this->rel_dyn_,
4321                                       ORDER_DYNAMIC_RELOCS, false);
4322       layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4323                                       elfcpp::SHF_ALLOC, this->rel_irelative_,
4324                                       ORDER_DYNAMIC_RELOCS, false);
4325     }
4326   return this->rel_dyn_;
4327 }
4328
4329
4330 // Get the section to use for IRELATIVE relocs, creating it if necessary.  These
4331 // go in .rela.dyn, but only after all other dynamic relocations.  They need to
4332 // follow the other dynamic relocations so that they can refer to global
4333 // variables initialized by those relocs.
4334
4335 template<bool big_endian>
4336 typename Target_arm<big_endian>::Reloc_section*
4337 Target_arm<big_endian>::rel_irelative_section(Layout* layout)
4338 {
4339   if (this->rel_irelative_ == NULL)
4340     {
4341       // Delegate the creation to rel_dyn_section so as to ensure their order in
4342       // the output section.
4343       this->rel_dyn_section(layout);
4344       gold_assert(this->rel_irelative_ != NULL
4345                   && (this->rel_dyn_->output_section()
4346                       == this->rel_irelative_->output_section()));
4347     }
4348   return this->rel_irelative_;
4349 }
4350
4351
4352 // Insn_template methods.
4353
4354 // Return byte size of an instruction template.
4355
4356 size_t
4357 Insn_template::size() const
4358 {
4359   switch (this->type())
4360     {
4361     case THUMB16_TYPE:
4362     case THUMB16_SPECIAL_TYPE:
4363       return 2;
4364     case ARM_TYPE:
4365     case THUMB32_TYPE:
4366     case DATA_TYPE:
4367       return 4;
4368     default:
4369       gold_unreachable();
4370     }
4371 }
4372
4373 // Return alignment of an instruction template.
4374
4375 unsigned
4376 Insn_template::alignment() const
4377 {
4378   switch (this->type())
4379     {
4380     case THUMB16_TYPE:
4381     case THUMB16_SPECIAL_TYPE:
4382     case THUMB32_TYPE:
4383       return 2;
4384     case ARM_TYPE:
4385     case DATA_TYPE:
4386       return 4;
4387     default:
4388       gold_unreachable();
4389     }
4390 }
4391
4392 // Stub_template methods.
4393
4394 Stub_template::Stub_template(
4395     Stub_type type, const Insn_template* insns,
4396      size_t insn_count)
4397   : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
4398     entry_in_thumb_mode_(false), relocs_()
4399 {
4400   off_t offset = 0;
4401
4402   // Compute byte size and alignment of stub template.
4403   for (size_t i = 0; i < insn_count; i++)
4404     {
4405       unsigned insn_alignment = insns[i].alignment();
4406       size_t insn_size = insns[i].size();
4407       gold_assert((offset & (insn_alignment - 1)) == 0);
4408       this->alignment_ = std::max(this->alignment_, insn_alignment);
4409       switch (insns[i].type())
4410         {
4411         case Insn_template::THUMB16_TYPE:
4412         case Insn_template::THUMB16_SPECIAL_TYPE:
4413           if (i == 0)
4414             this->entry_in_thumb_mode_ = true;
4415           break;
4416
4417         case Insn_template::THUMB32_TYPE:
4418           if (insns[i].r_type() != elfcpp::R_ARM_NONE)
4419             this->relocs_.push_back(Reloc(i, offset));
4420           if (i == 0)
4421             this->entry_in_thumb_mode_ = true;
4422           break;
4423
4424         case Insn_template::ARM_TYPE:
4425           // Handle cases where the target is encoded within the
4426           // instruction.
4427           if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
4428             this->relocs_.push_back(Reloc(i, offset));
4429           break;
4430
4431         case Insn_template::DATA_TYPE:
4432           // Entry point cannot be data.
4433           gold_assert(i != 0);
4434           this->relocs_.push_back(Reloc(i, offset));
4435           break;
4436
4437         default:
4438           gold_unreachable();
4439         }
4440       offset += insn_size;
4441     }
4442   this->size_ = offset;
4443 }
4444
4445 // Stub methods.
4446
4447 // Template to implement do_write for a specific target endianness.
4448
4449 template<bool big_endian>
4450 void inline
4451 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4452 {
4453   const Stub_template* stub_template = this->stub_template();
4454   const Insn_template* insns = stub_template->insns();
4455
4456   // FIXME:  We do not handle BE8 encoding yet.
4457   unsigned char* pov = view;
4458   for (size_t i = 0; i < stub_template->insn_count(); i++)
4459     {
4460       switch (insns[i].type())
4461         {
4462         case Insn_template::THUMB16_TYPE:
4463           elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4464           break;
4465         case Insn_template::THUMB16_SPECIAL_TYPE:
4466           elfcpp::Swap<16, big_endian>::writeval(
4467               pov,
4468               this->thumb16_special(i));
4469           break;
4470         case Insn_template::THUMB32_TYPE:
4471           {
4472             uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4473             uint32_t lo = insns[i].data() & 0xffff;
4474             elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4475             elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4476           }
4477           break;
4478         case Insn_template::ARM_TYPE:
4479         case Insn_template::DATA_TYPE:
4480           elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4481           break;
4482         default:
4483           gold_unreachable();
4484         }
4485       pov += insns[i].size();
4486     }
4487   gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4488 }
4489
4490 // Reloc_stub::Key methods.
4491
4492 // Dump a Key as a string for debugging.
4493
4494 std::string
4495 Reloc_stub::Key::name() const
4496 {
4497   if (this->r_sym_ == invalid_index)
4498     {
4499       // Global symbol key name
4500       // <stub-type>:<symbol name>:<addend>.
4501       const std::string sym_name = this->u_.symbol->name();
4502       // We need to print two hex number and two colons.  So just add 100 bytes
4503       // to the symbol name size.
4504       size_t len = sym_name.size() + 100;
4505       char* buffer = new char[len];
4506       int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4507                        sym_name.c_str(), this->addend_);
4508       gold_assert(c > 0 && c < static_cast<int>(len));
4509       delete[] buffer;
4510       return std::string(buffer);
4511     }
4512   else
4513     {
4514       // local symbol key name
4515       // <stub-type>:<object>:<r_sym>:<addend>.
4516       const size_t len = 200;
4517       char buffer[len];
4518       int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4519                        this->u_.relobj, this->r_sym_, this->addend_);
4520       gold_assert(c > 0 && c < static_cast<int>(len));
4521       return std::string(buffer);
4522     }
4523 }
4524
4525 // Reloc_stub methods.
4526
4527 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4528 // LOCATION to DESTINATION.
4529 // This code is based on the arm_type_of_stub function in
4530 // bfd/elf32-arm.c.  We have changed the interface a little to keep the Stub
4531 // class simple.
4532
4533 Stub_type
4534 Reloc_stub::stub_type_for_reloc(
4535    unsigned int r_type,
4536    Arm_address location,
4537    Arm_address destination,
4538    bool target_is_thumb)
4539 {
4540   Stub_type stub_type = arm_stub_none;
4541
4542   // This is a bit ugly but we want to avoid using a templated class for
4543   // big and little endianities.
4544   bool may_use_blx;
4545   bool should_force_pic_veneer;
4546   bool thumb2;
4547   bool thumb_only;
4548   if (parameters->target().is_big_endian())
4549     {
4550       const Target_arm<true>* big_endian_target =
4551         Target_arm<true>::default_target();
4552       may_use_blx = big_endian_target->may_use_v5t_interworking();
4553       should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
4554       thumb2 = big_endian_target->using_thumb2();
4555       thumb_only = big_endian_target->using_thumb_only();
4556     }
4557   else
4558     {
4559       const Target_arm<false>* little_endian_target =
4560         Target_arm<false>::default_target();
4561       may_use_blx = little_endian_target->may_use_v5t_interworking();
4562       should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
4563       thumb2 = little_endian_target->using_thumb2();
4564       thumb_only = little_endian_target->using_thumb_only();
4565     }
4566
4567   int64_t branch_offset;
4568   bool output_is_position_independent =
4569       parameters->options().output_is_position_independent();
4570   if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4571     {
4572       // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4573       // base address (instruction address + 4).
4574       if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb)
4575         destination = Bits<32>::bit_select32(destination, location, 0x2);
4576       branch_offset = static_cast<int64_t>(destination) - location;
4577
4578       // Handle cases where:
4579       // - this call goes too far (different Thumb/Thumb2 max
4580       //   distance)
4581       // - it's a Thumb->Arm call and blx is not available, or it's a
4582       //   Thumb->Arm branch (not bl). A stub is needed in this case.
4583       if ((!thumb2
4584             && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4585                 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4586           || (thumb2
4587               && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4588                   || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4589           || ((!target_is_thumb)
4590               && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4591                   || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4592         {
4593           if (target_is_thumb)
4594             {
4595               // Thumb to thumb.
4596               if (!thumb_only)
4597                 {
4598                   stub_type = (output_is_position_independent
4599                                || should_force_pic_veneer)
4600                     // PIC stubs.
4601                     ? ((may_use_blx
4602                         && (r_type == elfcpp::R_ARM_THM_CALL))
4603                        // V5T and above. Stub starts with ARM code, so
4604                        // we must be able to switch mode before
4605                        // reaching it, which is only possible for 'bl'
4606                        // (ie R_ARM_THM_CALL relocation).
4607                        ? arm_stub_long_branch_any_thumb_pic
4608                        // On V4T, use Thumb code only.
4609                        : arm_stub_long_branch_v4t_thumb_thumb_pic)
4610
4611                     // non-PIC stubs.
4612                     : ((may_use_blx
4613                         && (r_type == elfcpp::R_ARM_THM_CALL))
4614                        ? arm_stub_long_branch_any_any // V5T and above.
4615                        : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4616                 }
4617               else
4618                 {
4619                   stub_type = (output_is_position_independent
4620                                || should_force_pic_veneer)
4621                     ? arm_stub_long_branch_thumb_only_pic       // PIC stub.
4622                     : arm_stub_long_branch_thumb_only;  // non-PIC stub.
4623                 }
4624             }
4625           else
4626             {
4627               // Thumb to arm.
4628
4629               // FIXME: We should check that the input section is from an
4630               // object that has interwork enabled.
4631
4632               stub_type = (output_is_position_independent
4633                            || should_force_pic_veneer)
4634                 // PIC stubs.
4635                 ? ((may_use_blx
4636                     && (r_type == elfcpp::R_ARM_THM_CALL))
4637                    ? arm_stub_long_branch_any_arm_pic   // V5T and above.
4638                    : arm_stub_long_branch_v4t_thumb_arm_pic)    // V4T.
4639
4640                 // non-PIC stubs.
4641                 : ((may_use_blx
4642                     && (r_type == elfcpp::R_ARM_THM_CALL))
4643                    ? arm_stub_long_branch_any_any       // V5T and above.
4644                    : arm_stub_long_branch_v4t_thumb_arm);       // V4T.
4645
4646               // Handle v4t short branches.
4647               if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4648                   && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4649                   && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4650                 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4651             }
4652         }
4653     }
4654   else if (r_type == elfcpp::R_ARM_CALL
4655            || r_type == elfcpp::R_ARM_JUMP24
4656            || r_type == elfcpp::R_ARM_PLT32)
4657     {
4658       branch_offset = static_cast<int64_t>(destination) - location;
4659       if (target_is_thumb)
4660         {
4661           // Arm to thumb.
4662
4663           // FIXME: We should check that the input section is from an
4664           // object that has interwork enabled.
4665
4666           // We have an extra 2-bytes reach because of
4667           // the mode change (bit 24 (H) of BLX encoding).
4668           if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4669               || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4670               || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4671               || (r_type == elfcpp::R_ARM_JUMP24)
4672               || (r_type == elfcpp::R_ARM_PLT32))
4673             {
4674               stub_type = (output_is_position_independent
4675                            || should_force_pic_veneer)
4676                 // PIC stubs.
4677                 ? (may_use_blx
4678                    ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4679                    : arm_stub_long_branch_v4t_arm_thumb_pic)    // V4T stub.
4680
4681                 // non-PIC stubs.
4682                 : (may_use_blx
4683                    ? arm_stub_long_branch_any_any       // V5T and above.
4684                    : arm_stub_long_branch_v4t_arm_thumb);       // V4T.
4685             }
4686         }
4687       else
4688         {
4689           // Arm to arm.
4690           if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4691               || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4692             {
4693               stub_type = (output_is_position_independent
4694                            || should_force_pic_veneer)
4695                 ? arm_stub_long_branch_any_arm_pic      // PIC stubs.
4696                 : arm_stub_long_branch_any_any;         /// non-PIC.
4697             }
4698         }
4699     }
4700
4701   return stub_type;
4702 }
4703
4704 // Cortex_a8_stub methods.
4705
4706 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4707 // I is the position of the instruction template in the stub template.
4708
4709 uint16_t
4710 Cortex_a8_stub::do_thumb16_special(size_t i)
4711 {
4712   // The only use of this is to copy condition code from a conditional
4713   // branch being worked around to the corresponding conditional branch in
4714   // to the stub.
4715   gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4716               && i == 0);
4717   uint16_t data = this->stub_template()->insns()[i].data();
4718   gold_assert((data & 0xff00U) == 0xd000U);
4719   data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4720   return data;
4721 }
4722
4723 // Stub_factory methods.
4724
4725 Stub_factory::Stub_factory()
4726 {
4727   // The instruction template sequences are declared as static
4728   // objects and initialized first time the constructor runs.
4729
4730   // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4731   // to reach the stub if necessary.
4732   static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4733     {
4734       Insn_template::arm_insn(0xe51ff004),      // ldr   pc, [pc, #-4]
4735       Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4736                                                 // dcd   R_ARM_ABS32(X)
4737     };
4738
4739   // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4740   // available.
4741   static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4742     {
4743       Insn_template::arm_insn(0xe59fc000),      // ldr   ip, [pc, #0]
4744       Insn_template::arm_insn(0xe12fff1c),      // bx    ip
4745       Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4746                                                 // dcd   R_ARM_ABS32(X)
4747     };
4748
4749   // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4750   static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4751     {
4752       Insn_template::thumb16_insn(0xb401),      // push {r0}
4753       Insn_template::thumb16_insn(0x4802),      // ldr  r0, [pc, #8]
4754       Insn_template::thumb16_insn(0x4684),      // mov  ip, r0
4755       Insn_template::thumb16_insn(0xbc01),      // pop  {r0}
4756       Insn_template::thumb16_insn(0x4760),      // bx   ip
4757       Insn_template::thumb16_insn(0xbf00),      // nop
4758       Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4759                                                 // dcd  R_ARM_ABS32(X)
4760     };
4761
4762   // V4T Thumb -> Thumb long branch stub. Using the stack is not
4763   // allowed.
4764   static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4765     {
4766       Insn_template::thumb16_insn(0x4778),      // bx   pc
4767       Insn_template::thumb16_insn(0x46c0),      // nop
4768       Insn_template::arm_insn(0xe59fc000),      // ldr  ip, [pc, #0]
4769       Insn_template::arm_insn(0xe12fff1c),      // bx   ip
4770       Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4771                                                 // dcd  R_ARM_ABS32(X)
4772     };
4773
4774   // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4775   // available.
4776   static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4777     {
4778       Insn_template::thumb16_insn(0x4778),      // bx   pc
4779       Insn_template::thumb16_insn(0x46c0),      // nop
4780       Insn_template::arm_insn(0xe51ff004),      // ldr   pc, [pc, #-4]
4781       Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4782                                                 // dcd   R_ARM_ABS32(X)
4783     };
4784
4785   // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4786   // one, when the destination is close enough.
4787   static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4788     {
4789       Insn_template::thumb16_insn(0x4778),              // bx   pc
4790       Insn_template::thumb16_insn(0x46c0),              // nop
4791       Insn_template::arm_rel_insn(0xea000000, -8),      // b    (X-8)
4792     };
4793
4794   // ARM/Thumb -> ARM long branch stub, PIC.  On V5T and above, use
4795   // blx to reach the stub if necessary.
4796   static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4797     {
4798       Insn_template::arm_insn(0xe59fc000),      // ldr   r12, [pc]
4799       Insn_template::arm_insn(0xe08ff00c),      // add   pc, pc, ip
4800       Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4801                                                 // dcd   R_ARM_REL32(X-4)
4802     };
4803
4804   // ARM/Thumb -> Thumb long branch stub, PIC.  On V5T and above, use
4805   // blx to reach the stub if necessary.  We can not add into pc;
4806   // it is not guaranteed to mode switch (different in ARMv6 and
4807   // ARMv7).
4808   static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4809     {
4810       Insn_template::arm_insn(0xe59fc004),      // ldr   r12, [pc, #4]
4811       Insn_template::arm_insn(0xe08fc00c),      // add   ip, pc, ip
4812       Insn_template::arm_insn(0xe12fff1c),      // bx    ip
4813       Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4814                                                 // dcd   R_ARM_REL32(X)
4815     };
4816
4817   // V4T ARM -> ARM long branch stub, PIC.
4818   static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4819     {
4820       Insn_template::arm_insn(0xe59fc004),      // ldr   ip, [pc, #4]
4821       Insn_template::arm_insn(0xe08fc00c),      // add   ip, pc, ip
4822       Insn_template::arm_insn(0xe12fff1c),      // bx    ip
4823       Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4824                                                 // dcd   R_ARM_REL32(X)
4825     };
4826
4827   // V4T Thumb -> ARM long branch stub, PIC.
4828   static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4829     {
4830       Insn_template::thumb16_insn(0x4778),      // bx   pc
4831       Insn_template::thumb16_insn(0x46c0),      // nop
4832       Insn_template::arm_insn(0xe59fc000),      // ldr  ip, [pc, #0]
4833       Insn_template::arm_insn(0xe08cf00f),      // add  pc, ip, pc
4834       Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4835                                                 // dcd  R_ARM_REL32(X)
4836     };
4837
4838   // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4839   // architectures.
4840   static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4841     {
4842       Insn_template::thumb16_insn(0xb401),      // push {r0}
4843       Insn_template::thumb16_insn(0x4802),      // ldr  r0, [pc, #8]
4844       Insn_template::thumb16_insn(0x46fc),      // mov  ip, pc
4845       Insn_template::thumb16_insn(0x4484),      // add  ip, r0
4846       Insn_template::thumb16_insn(0xbc01),      // pop  {r0}
4847       Insn_template::thumb16_insn(0x4760),      // bx   ip
4848       Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4849                                                 // dcd  R_ARM_REL32(X)
4850     };
4851
4852   // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4853   // allowed.
4854   static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4855     {
4856       Insn_template::thumb16_insn(0x4778),      // bx   pc
4857       Insn_template::thumb16_insn(0x46c0),      // nop
4858       Insn_template::arm_insn(0xe59fc004),      // ldr  ip, [pc, #4]
4859       Insn_template::arm_insn(0xe08fc00c),      // add   ip, pc, ip
4860       Insn_template::arm_insn(0xe12fff1c),      // bx   ip
4861       Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4862                                                 // dcd  R_ARM_REL32(X)
4863     };
4864
4865   // Cortex-A8 erratum-workaround stubs.
4866
4867   // Stub used for conditional branches (which may be beyond +/-1MB away,
4868   // so we can't use a conditional branch to reach this stub).
4869
4870   // original code:
4871   //
4872   //    b<cond> X
4873   // after:
4874   //
4875   static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4876     {
4877       Insn_template::thumb16_bcond_insn(0xd001),        //      b<cond>.n true
4878       Insn_template::thumb32_b_insn(0xf000b800, -4),    //      b.w after
4879       Insn_template::thumb32_b_insn(0xf000b800, -4)     // true:
4880                                                         //      b.w X
4881     };
4882
4883   // Stub used for b.w and bl.w instructions.
4884
4885   static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4886     {
4887       Insn_template::thumb32_b_insn(0xf000b800, -4)     // b.w dest
4888     };
4889
4890   static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4891     {
4892       Insn_template::thumb32_b_insn(0xf000b800, -4)     // b.w dest
4893     };
4894
4895   // Stub used for Thumb-2 blx.w instructions.  We modified the original blx.w
4896   // instruction (which switches to ARM mode) to point to this stub.  Jump to
4897   // the real destination using an ARM-mode branch.
4898   static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4899     {
4900       Insn_template::arm_rel_insn(0xea000000, -8)       // b dest
4901     };
4902
4903   // Stub used to provide an interworking for R_ARM_V4BX relocation
4904   // (bx r[n] instruction).
4905   static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4906     {
4907       Insn_template::arm_insn(0xe3100001),              // tst   r<n>, #1
4908       Insn_template::arm_insn(0x01a0f000),              // moveq pc, r<n>
4909       Insn_template::arm_insn(0xe12fff10)               // bx    r<n>
4910     };
4911
4912   // Fill in the stub template look-up table.  Stub templates are constructed
4913   // per instance of Stub_factory for fast look-up without locking
4914   // in a thread-enabled environment.
4915
4916   this->stub_templates_[arm_stub_none] =
4917     new Stub_template(arm_stub_none, NULL, 0);
4918
4919 #define DEF_STUB(x)     \
4920   do \
4921     { \
4922       size_t array_size \
4923         = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4924       Stub_type type = arm_stub_##x; \
4925       this->stub_templates_[type] = \
4926         new Stub_template(type, elf32_arm_stub_##x, array_size); \
4927     } \
4928   while (0);
4929
4930   DEF_STUBS
4931 #undef DEF_STUB
4932 }
4933
4934 // Stub_table methods.
4935
4936 // Remove all Cortex-A8 stub.
4937
4938 template<bool big_endian>
4939 void
4940 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4941 {
4942   for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4943        p != this->cortex_a8_stubs_.end();
4944        ++p)
4945     delete p->second;
4946   this->cortex_a8_stubs_.clear();
4947 }
4948
4949 // Relocate one stub.  This is a helper for Stub_table::relocate_stubs().
4950
4951 template<bool big_endian>
4952 void
4953 Stub_table<big_endian>::relocate_stub(
4954     Stub* stub,
4955     const Relocate_info<32, big_endian>* relinfo,
4956     Target_arm<big_endian>* arm_target,
4957     Output_section* output_section,
4958     unsigned char* view,
4959     Arm_address address,
4960     section_size_type view_size)
4961 {
4962   const Stub_template* stub_template = stub->stub_template();
4963   if (stub_template->reloc_count() != 0)
4964     {
4965       // Adjust view to cover the stub only.
4966       section_size_type offset = stub->offset();
4967       section_size_type stub_size = stub_template->size();
4968       gold_assert(offset + stub_size <= view_size);
4969
4970       arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4971                                 address + offset, stub_size);
4972     }
4973 }
4974
4975 // Relocate all stubs in this stub table.
4976
4977 template<bool big_endian>
4978 void
4979 Stub_table<big_endian>::relocate_stubs(
4980     const Relocate_info<32, big_endian>* relinfo,
4981     Target_arm<big_endian>* arm_target,
4982     Output_section* output_section,
4983     unsigned char* view,
4984     Arm_address address,
4985     section_size_type view_size)
4986 {
4987   // If we are passed a view bigger than the stub table's.  we need to
4988   // adjust the view.
4989   gold_assert(address == this->address()
4990               && (view_size
4991                   == static_cast<section_size_type>(this->data_size())));
4992
4993   // Relocate all relocation stubs.
4994   for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4995       p != this->reloc_stubs_.end();
4996       ++p)
4997     this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4998                         address, view_size);
4999
5000   // Relocate all Cortex-A8 stubs.
5001   for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
5002        p != this->cortex_a8_stubs_.end();
5003        ++p)
5004     this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
5005                         address, view_size);
5006
5007   // Relocate all ARM V4BX stubs.
5008   for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
5009        p != this->arm_v4bx_stubs_.end();
5010        ++p)
5011     {
5012       if (*p != NULL)
5013         this->relocate_stub(*p, relinfo, arm_target, output_section, view,
5014                             address, view_size);
5015     }
5016 }
5017
5018 // Write out the stubs to file.
5019
5020 template<bool big_endian>
5021 void
5022 Stub_table<big_endian>::do_write(Output_file* of)
5023 {
5024   off_t offset = this->offset();
5025   const section_size_type oview_size =
5026     convert_to_section_size_type(this->data_size());
5027   unsigned char* const oview = of->get_output_view(offset, oview_size);
5028
5029   // Write relocation stubs.
5030   for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
5031       p != this->reloc_stubs_.end();
5032       ++p)
5033     {
5034       Reloc_stub* stub = p->second;
5035       Arm_address address = this->address() + stub->offset();
5036       gold_assert(address
5037                   == align_address(address,
5038                                    stub->stub_template()->alignment()));
5039       stub->write(oview + stub->offset(), stub->stub_template()->size(),
5040                   big_endian);
5041     }
5042
5043   // Write Cortex-A8 stubs.
5044   for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5045        p != this->cortex_a8_stubs_.end();
5046        ++p)
5047     {
5048       Cortex_a8_stub* stub = p->second;
5049       Arm_address address = this->address() + stub->offset();
5050       gold_assert(address
5051                   == align_address(address,
5052                                    stub->stub_template()->alignment()));
5053       stub->write(oview + stub->offset(), stub->stub_template()->size(),
5054                   big_endian);
5055     }
5056
5057   // Write ARM V4BX relocation stubs.
5058   for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5059        p != this->arm_v4bx_stubs_.end();
5060        ++p)
5061     {
5062       if (*p == NULL)
5063         continue;
5064
5065       Arm_address address = this->address() + (*p)->offset();
5066       gold_assert(address
5067                   == align_address(address,
5068                                    (*p)->stub_template()->alignment()));
5069       (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
5070                   big_endian);
5071     }
5072
5073   of->write_output_view(this->offset(), oview_size, oview);
5074 }
5075
5076 // Update the data size and address alignment of the stub table at the end
5077 // of a relaxation pass.   Return true if either the data size or the
5078 // alignment changed in this relaxation pass.
5079
5080 template<bool big_endian>
5081 bool
5082 Stub_table<big_endian>::update_data_size_and_addralign()
5083 {
5084   // Go over all stubs in table to compute data size and address alignment.
5085   off_t size = this->reloc_stubs_size_;
5086   unsigned addralign = this->reloc_stubs_addralign_;
5087
5088   for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5089        p != this->cortex_a8_stubs_.end();
5090        ++p)
5091     {
5092       const Stub_template* stub_template = p->second->stub_template();
5093       addralign = std::max(addralign, stub_template->alignment());
5094       size = (align_address(size, stub_template->alignment())
5095               + stub_template->size());
5096     }
5097
5098   for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5099        p != this->arm_v4bx_stubs_.end();
5100        ++p)
5101     {
5102       if (*p == NULL)
5103         continue;
5104
5105       const Stub_template* stub_template = (*p)->stub_template();
5106       addralign = std::max(addralign, stub_template->alignment());
5107       size = (align_address(size, stub_template->alignment())
5108               + stub_template->size());
5109     }
5110
5111   // Check if either data size or alignment changed in this pass.
5112   // Update prev_data_size_ and prev_addralign_.  These will be used
5113   // as the current data size and address alignment for the next pass.
5114   bool changed = size != this->prev_data_size_;
5115   this->prev_data_size_ = size;
5116
5117   if (addralign != this->prev_addralign_)
5118     changed = true;
5119   this->prev_addralign_ = addralign;
5120
5121   return changed;
5122 }
5123
5124 // Finalize the stubs.  This sets the offsets of the stubs within the stub
5125 // table.  It also marks all input sections needing Cortex-A8 workaround.
5126
5127 template<bool big_endian>
5128 void
5129 Stub_table<big_endian>::finalize_stubs()
5130 {
5131   off_t off = this->reloc_stubs_size_;
5132   for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5133        p != this->cortex_a8_stubs_.end();
5134        ++p)
5135     {
5136       Cortex_a8_stub* stub = p->second;
5137       const Stub_template* stub_template = stub->stub_template();
5138       uint64_t stub_addralign = stub_template->alignment();
5139       off = align_address(off, stub_addralign);
5140       stub->set_offset(off);
5141       off += stub_template->size();
5142
5143       // Mark input section so that we can determine later if a code section
5144       // needs the Cortex-A8 workaround quickly.
5145       Arm_relobj<big_endian>* arm_relobj =
5146         Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
5147       arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
5148     }
5149
5150   for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5151       p != this->arm_v4bx_stubs_.end();
5152       ++p)
5153     {
5154       if (*p == NULL)
5155         continue;
5156
5157       const Stub_template* stub_template = (*p)->stub_template();
5158       uint64_t stub_addralign = stub_template->alignment();
5159       off = align_address(off, stub_addralign);
5160       (*p)->set_offset(off);
5161       off += stub_template->size();
5162     }
5163
5164   gold_assert(off <= this->prev_data_size_);
5165 }
5166
5167 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5168 // and VIEW_ADDRESS + VIEW_SIZE - 1.  VIEW points to the mapped address
5169 // of the address range seen by the linker.
5170
5171 template<bool big_endian>
5172 void
5173 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
5174     Target_arm<big_endian>* arm_target,
5175     unsigned char* view,
5176     Arm_address view_address,
5177     section_size_type view_size)
5178 {
5179   // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5180   for (Cortex_a8_stub_list::const_iterator p =
5181          this->cortex_a8_stubs_.lower_bound(view_address);
5182        ((p != this->cortex_a8_stubs_.end())
5183         && (p->first < (view_address + view_size)));
5184        ++p)
5185     {
5186       // We do not store the THUMB bit in the LSB of either the branch address
5187       // or the stub offset.  There is no need to strip the LSB.
5188       Arm_address branch_address = p->first;
5189       const Cortex_a8_stub* stub = p->second;
5190       Arm_address stub_address = this->address() + stub->offset();
5191
5192       // Offset of the branch instruction relative to this view.
5193       section_size_type offset =
5194         convert_to_section_size_type(branch_address - view_address);
5195       gold_assert((offset + 4) <= view_size);
5196
5197       arm_target->apply_cortex_a8_workaround(stub, stub_address,
5198                                              view + offset, branch_address);
5199     }
5200 }
5201
5202 // Arm_input_section methods.
5203
5204 // Initialize an Arm_input_section.
5205
5206 template<bool big_endian>
5207 void
5208 Arm_input_section<big_endian>::init()
5209 {
5210   Relobj* relobj = this->relobj();
5211   unsigned int shndx = this->shndx();
5212
5213   // We have to cache original size, alignment and contents to avoid locking
5214   // the original file.
5215   this->original_addralign_ =
5216     convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx));
5217
5218   // This is not efficient but we expect only a small number of relaxed
5219   // input sections for stubs.
5220   section_size_type section_size;
5221   const unsigned char* section_contents =
5222     relobj->section_contents(shndx, &section_size, false);
5223   this->original_size_ =
5224     convert_types<uint32_t, uint64_t>(relobj->section_size(shndx));
5225
5226   gold_assert(this->original_contents_ == NULL);
5227   this->original_contents_ = new unsigned char[section_size];
5228   memcpy(this->original_contents_, section_contents, section_size);
5229
5230   // We want to make this look like the original input section after
5231   // output sections are finalized.
5232   Output_section* os = relobj->output_section(shndx);
5233   off_t offset = relobj->output_section_offset(shndx);
5234   gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
5235   this->set_address(os->address() + offset);
5236   this->set_file_offset(os->offset() + offset);
5237
5238   this->set_current_data_size(this->original_size_);
5239   this->finalize_data_size();
5240 }
5241
5242 template<bool big_endian>
5243 void
5244 Arm_input_section<big_endian>::do_write(Output_file* of)
5245 {
5246   // We have to write out the original section content.
5247   gold_assert(this->original_contents_ != NULL);
5248   of->write(this->offset(), this->original_contents_,
5249             this->original_size_);
5250
5251   // If this owns a stub table and it is not empty, write it.
5252   if (this->is_stub_table_owner() && !this->stub_table_->empty())
5253     this->stub_table_->write(of);
5254 }
5255
5256 // Finalize data size.
5257
5258 template<bool big_endian>
5259 void
5260 Arm_input_section<big_endian>::set_final_data_size()
5261 {
5262   off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5263
5264   if (this->is_stub_table_owner())
5265     {
5266       this->stub_table_->finalize_data_size();
5267       off = align_address(off, this->stub_table_->addralign());
5268       off += this->stub_table_->data_size();
5269     }
5270   this->set_data_size(off);
5271 }
5272
5273 // Reset address and file offset.
5274
5275 template<bool big_endian>
5276 void
5277 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
5278 {
5279   // Size of the original input section contents.
5280   off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5281
5282   // If this is a stub table owner, account for the stub table size.
5283   if (this->is_stub_table_owner())
5284     {
5285       Stub_table<big_endian>* stub_table = this->stub_table_;
5286
5287       // Reset the stub table's address and file offset.  The
5288       // current data size for child will be updated after that.
5289       stub_table_->reset_address_and_file_offset();
5290       off = align_address(off, stub_table_->addralign());
5291       off += stub_table->current_data_size();
5292     }
5293
5294   this->set_current_data_size(off);
5295 }
5296
5297 // Arm_exidx_cantunwind methods.
5298
5299 // Write this to Output file OF for a fixed endianness.
5300
5301 template<bool big_endian>
5302 void
5303 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
5304 {
5305   off_t offset = this->offset();
5306   const section_size_type oview_size = 8;
5307   unsigned char* const oview = of->get_output_view(offset, oview_size);
5308
5309   Output_section* os = this->relobj_->output_section(this->shndx_);
5310   gold_assert(os != NULL);
5311
5312   Arm_relobj<big_endian>* arm_relobj =
5313     Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
5314   Arm_address output_offset =
5315     arm_relobj->get_output_section_offset(this->shndx_);
5316   Arm_address section_start;
5317   section_size_type section_size;
5318
5319   // Find out the end of the text section referred by this.
5320   if (output_offset != Arm_relobj<big_endian>::invalid_address)
5321     {
5322       section_start = os->address() + output_offset;
5323       const Arm_exidx_input_section* exidx_input_section =
5324         arm_relobj->exidx_input_section_by_link(this->shndx_);
5325       gold_assert(exidx_input_section != NULL);
5326       section_size =
5327         convert_to_section_size_type(exidx_input_section->text_size());
5328     }
5329   else
5330     {
5331       // Currently this only happens for a relaxed section.
5332       const Output_relaxed_input_section* poris =
5333         os->find_relaxed_input_section(this->relobj_, this->shndx_);
5334       gold_assert(poris != NULL);
5335       section_start = poris->address();
5336       section_size = convert_to_section_size_type(poris->data_size());
5337     }
5338
5339   // We always append this to the end of an EXIDX section.
5340   Arm_address output_address = section_start + section_size;
5341
5342   // Write out the entry.  The first word either points to the beginning
5343   // or after the end of a text section.  The second word is the special
5344   // EXIDX_CANTUNWIND value.
5345   uint32_t prel31_offset = output_address - this->address();
5346   if (Bits<31>::has_overflow32(offset))
5347     gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5348   elfcpp::Swap_unaligned<32, big_endian>::writeval(oview,
5349                                                    prel31_offset & 0x7fffffffU);
5350   elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4,
5351                                                    elfcpp::EXIDX_CANTUNWIND);
5352
5353   of->write_output_view(this->offset(), oview_size, oview);
5354 }
5355
5356 // Arm_exidx_merged_section methods.
5357
5358 // Constructor for Arm_exidx_merged_section.
5359 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5360 // SECTION_OFFSET_MAP points to a section offset map describing how
5361 // parts of the input section are mapped to output.  DELETED_BYTES is
5362 // the number of bytes deleted from the EXIDX input section.
5363
5364 Arm_exidx_merged_section::Arm_exidx_merged_section(
5365     const Arm_exidx_input_section& exidx_input_section,
5366     const Arm_exidx_section_offset_map& section_offset_map,
5367     uint32_t deleted_bytes)
5368   : Output_relaxed_input_section(exidx_input_section.relobj(),
5369                                  exidx_input_section.shndx(),
5370                                  exidx_input_section.addralign()),
5371     exidx_input_section_(exidx_input_section),
5372     section_offset_map_(section_offset_map)
5373 {
5374   // If we retain or discard the whole EXIDX input section,  we would
5375   // not be here.
5376   gold_assert(deleted_bytes != 0
5377               && deleted_bytes != this->exidx_input_section_.size());
5378
5379   // Fix size here so that we do not need to implement set_final_data_size.
5380   uint32_t size = exidx_input_section.size() - deleted_bytes;
5381   this->set_data_size(size);
5382   this->fix_data_size();
5383
5384   // Allocate buffer for section contents and build contents.
5385   this->section_contents_ = new unsigned char[size];
5386 }
5387
5388 // Build the contents of a merged EXIDX output section.
5389
5390 void
5391 Arm_exidx_merged_section::build_contents(
5392     const unsigned char* original_contents,
5393     section_size_type original_size)
5394 {
5395   // Go over spans of input offsets and write only those that are not
5396   // discarded.
5397   section_offset_type in_start = 0;
5398   section_offset_type out_start = 0;
5399   section_offset_type in_max =
5400     convert_types<section_offset_type>(original_size);
5401   section_offset_type out_max =
5402     convert_types<section_offset_type>(this->data_size());
5403   for (Arm_exidx_section_offset_map::const_iterator p =
5404         this->section_offset_map_.begin();
5405       p != this->section_offset_map_.end();
5406       ++p)
5407     {
5408       section_offset_type in_end = p->first;
5409       gold_assert(in_end >= in_start);
5410       section_offset_type out_end = p->second;
5411       size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5412       if (out_end != -1)
5413         {
5414           size_t out_chunk_size =
5415             convert_types<size_t>(out_end - out_start + 1);
5416
5417           gold_assert(out_chunk_size == in_chunk_size
5418                       && in_end < in_max && out_end < out_max);
5419
5420           memcpy(this->section_contents_ + out_start,
5421                  original_contents + in_start,
5422                  out_chunk_size);
5423           out_start += out_chunk_size;
5424         }
5425       in_start += in_chunk_size;
5426     }
5427 }
5428
5429 // Given an input OBJECT, an input section index SHNDX within that
5430 // object, and an OFFSET relative to the start of that input
5431 // section, return whether or not the corresponding offset within
5432 // the output section is known.  If this function returns true, it
5433 // sets *POUTPUT to the output offset.  The value -1 indicates that
5434 // this input offset is being discarded.
5435
5436 bool
5437 Arm_exidx_merged_section::do_output_offset(
5438     const Relobj* relobj,
5439     unsigned int shndx,
5440     section_offset_type offset,
5441     section_offset_type* poutput) const
5442 {
5443   // We only handle offsets for the original EXIDX input section.
5444   if (relobj != this->exidx_input_section_.relobj()
5445       || shndx != this->exidx_input_section_.shndx())
5446     return false;
5447
5448   section_offset_type section_size =
5449     convert_types<section_offset_type>(this->exidx_input_section_.size());
5450   if (offset < 0 || offset >= section_size)
5451     // Input offset is out of valid range.
5452     *poutput = -1;
5453   else
5454     {
5455       // We need to look up the section offset map to determine the output
5456       // offset.  Find the reference point in map that is first offset
5457       // bigger than or equal to this offset.
5458       Arm_exidx_section_offset_map::const_iterator p =
5459         this->section_offset_map_.lower_bound(offset);
5460
5461       // The section offset maps are build such that this should not happen if
5462       // input offset is in the valid range.
5463       gold_assert(p != this->section_offset_map_.end());
5464
5465       // We need to check if this is dropped.
5466      section_offset_type ref = p->first;
5467      section_offset_type mapped_ref = p->second;
5468
5469       if (mapped_ref != Arm_exidx_input_section::invalid_offset)
5470         // Offset is present in output.
5471         *poutput = mapped_ref + (offset - ref);
5472       else
5473         // Offset is discarded owing to EXIDX entry merging.
5474         *poutput = -1;
5475     }
5476
5477   return true;
5478 }
5479
5480 // Write this to output file OF.
5481
5482 void
5483 Arm_exidx_merged_section::do_write(Output_file* of)
5484 {
5485   off_t offset = this->offset();
5486   const section_size_type oview_size = this->data_size();
5487   unsigned char* const oview = of->get_output_view(offset, oview_size);
5488
5489   Output_section* os = this->relobj()->output_section(this->shndx());
5490   gold_assert(os != NULL);
5491
5492   memcpy(oview, this->section_contents_, oview_size);
5493   of->write_output_view(this->offset(), oview_size, oview);
5494 }
5495
5496 // Arm_exidx_fixup methods.
5497
5498 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5499 // is not an EXIDX_CANTUNWIND entry already.  The new EXIDX_CANTUNWIND entry
5500 // points to the end of the last seen EXIDX section.
5501
5502 void
5503 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5504 {
5505   if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5506       && this->last_input_section_ != NULL)
5507     {
5508       Relobj* relobj = this->last_input_section_->relobj();
5509       unsigned int text_shndx = this->last_input_section_->link();
5510       Arm_exidx_cantunwind* cantunwind =
5511         new Arm_exidx_cantunwind(relobj, text_shndx);
5512       this->exidx_output_section_->add_output_section_data(cantunwind);
5513       this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5514     }
5515 }
5516
5517 // Process an EXIDX section entry in input.  Return whether this entry
5518 // can be deleted in the output.  SECOND_WORD in the second word of the
5519 // EXIDX entry.
5520
5521 bool
5522 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5523 {
5524   bool delete_entry;
5525   if (second_word == elfcpp::EXIDX_CANTUNWIND)
5526     {
5527       // Merge if previous entry is also an EXIDX_CANTUNWIND.
5528       delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5529       this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5530     }
5531   else if ((second_word & 0x80000000) != 0)
5532     {
5533       // Inlined unwinding data.  Merge if equal to previous.
5534       delete_entry = (merge_exidx_entries_
5535                       && this->last_unwind_type_ == UT_INLINED_ENTRY
5536                       && this->last_inlined_entry_ == second_word);
5537       this->last_unwind_type_ = UT_INLINED_ENTRY;
5538       this->last_inlined_entry_ = second_word;
5539     }
5540   else
5541     {
5542       // Normal table entry.  In theory we could merge these too,
5543       // but duplicate entries are likely to be much less common.
5544       delete_entry = false;
5545       this->last_unwind_type_ = UT_NORMAL_ENTRY;
5546     }
5547   return delete_entry;
5548 }
5549
5550 // Update the current section offset map during EXIDX section fix-up.
5551 // If there is no map, create one.  INPUT_OFFSET is the offset of a
5552 // reference point, DELETED_BYTES is the number of deleted by in the
5553 // section so far.  If DELETE_ENTRY is true, the reference point and
5554 // all offsets after the previous reference point are discarded.
5555
5556 void
5557 Arm_exidx_fixup::update_offset_map(
5558     section_offset_type input_offset,
5559     section_size_type deleted_bytes,
5560     bool delete_entry)
5561 {
5562   if (this->section_offset_map_ == NULL)
5563     this->section_offset_map_ = new Arm_exidx_section_offset_map();
5564   section_offset_type output_offset;
5565   if (delete_entry)
5566     output_offset = Arm_exidx_input_section::invalid_offset;
5567   else
5568     output_offset = input_offset - deleted_bytes;
5569   (*this->section_offset_map_)[input_offset] = output_offset;
5570 }
5571
5572 // Process EXIDX_INPUT_SECTION for EXIDX entry merging.  Return the number of
5573 // bytes deleted.  SECTION_CONTENTS points to the contents of the EXIDX
5574 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5575 // If some entries are merged, also store a pointer to a newly created
5576 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP.  The caller
5577 // owns the map and is responsible for releasing it after use.
5578
5579 template<bool big_endian>
5580 uint32_t
5581 Arm_exidx_fixup::process_exidx_section(
5582     const Arm_exidx_input_section* exidx_input_section,
5583     const unsigned char* section_contents,
5584     section_size_type section_size,
5585     Arm_exidx_section_offset_map** psection_offset_map)
5586 {
5587   Relobj* relobj = exidx_input_section->relobj();
5588   unsigned shndx = exidx_input_section->shndx();
5589
5590   if ((section_size % 8) != 0)
5591     {
5592       // Something is wrong with this section.  Better not touch it.
5593       gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5594                  relobj->name().c_str(), shndx);
5595       this->last_input_section_ = exidx_input_section;
5596       this->last_unwind_type_ = UT_NONE;
5597       return 0;
5598     }
5599
5600   uint32_t deleted_bytes = 0;
5601   bool prev_delete_entry = false;
5602   gold_assert(this->section_offset_map_ == NULL);
5603
5604   for (section_size_type i = 0; i < section_size; i += 8)
5605     {
5606       typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5607       const Valtype* wv =
5608           reinterpret_cast<const Valtype*>(section_contents + i + 4);
5609       uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5610
5611       bool delete_entry = this->process_exidx_entry(second_word);
5612
5613       // Entry deletion causes changes in output offsets.  We use a std::map
5614       // to record these.  And entry (x, y) means input offset x
5615       // is mapped to output offset y.  If y is invalid_offset, then x is
5616       // dropped in the output.  Because of the way std::map::lower_bound
5617       // works, we record the last offset in a region w.r.t to keeping or
5618       // dropping.  If there is no entry (x0, y0) for an input offset x0,
5619       // the output offset y0 of it is determined by the output offset y1 of
5620       // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5621       // in the map.  If y1 is not -1, then y0 = y1 + x0 - x1.  Otherwise, y1
5622       // y0 is also -1.
5623       if (delete_entry != prev_delete_entry && i != 0)
5624         this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5625
5626       // Update total deleted bytes for this entry.
5627       if (delete_entry)
5628         deleted_bytes += 8;
5629
5630       prev_delete_entry = delete_entry;
5631     }
5632
5633   // If section offset map is not NULL, make an entry for the end of
5634   // section.
5635   if (this->section_offset_map_ != NULL)
5636     update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5637
5638   *psection_offset_map = this->section_offset_map_;
5639   this->section_offset_map_ = NULL;
5640   this->last_input_section_ = exidx_input_section;
5641
5642   // Set the first output text section so that we can link the EXIDX output
5643   // section to it.  Ignore any EXIDX input section that is completely merged.
5644   if (this->first_output_text_section_ == NULL
5645       && deleted_bytes != section_size)
5646     {
5647       unsigned int link = exidx_input_section->link();
5648       Output_section* os = relobj->output_section(link);
5649       gold_assert(os != NULL);
5650       this->first_output_text_section_ = os;
5651     }
5652
5653   return deleted_bytes;
5654 }
5655
5656 // Arm_output_section methods.
5657
5658 // Create a stub group for input sections from BEGIN to END.  OWNER
5659 // points to the input section to be the owner a new stub table.
5660
5661 template<bool big_endian>
5662 void
5663 Arm_output_section<big_endian>::create_stub_group(
5664   Input_section_list::const_iterator begin,
5665   Input_section_list::const_iterator end,
5666   Input_section_list::const_iterator owner,
5667   Target_arm<big_endian>* target,
5668   std::vector<Output_relaxed_input_section*>* new_relaxed_sections,
5669   const Task* task)
5670 {
5671   // We use a different kind of relaxed section in an EXIDX section.
5672   // The static casting from Output_relaxed_input_section to
5673   // Arm_input_section is invalid in an EXIDX section.  We are okay
5674   // because we should not be calling this for an EXIDX section.
5675   gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5676
5677   // Currently we convert ordinary input sections into relaxed sections only
5678   // at this point but we may want to support creating relaxed input section
5679   // very early.  So we check here to see if owner is already a relaxed
5680   // section.
5681
5682   Arm_input_section<big_endian>* arm_input_section;
5683   if (owner->is_relaxed_input_section())
5684     {
5685       arm_input_section =
5686         Arm_input_section<big_endian>::as_arm_input_section(
5687           owner->relaxed_input_section());
5688     }
5689   else
5690     {
5691       gold_assert(owner->is_input_section());
5692       // Create a new relaxed input section.  We need to lock the original
5693       // file.
5694       Task_lock_obj<Object> tl(task, owner->relobj());
5695       arm_input_section =
5696         target->new_arm_input_section(owner->relobj(), owner->shndx());
5697       new_relaxed_sections->push_back(arm_input_section);
5698     }
5699
5700   // Create a stub table.
5701   Stub_table<big_endian>* stub_table =
5702     target->new_stub_table(arm_input_section);
5703
5704   arm_input_section->set_stub_table(stub_table);
5705
5706   Input_section_list::const_iterator p = begin;
5707   Input_section_list::const_iterator prev_p;
5708
5709   // Look for input sections or relaxed input sections in [begin ... end].
5710   do
5711     {
5712       if (p->is_input_section() || p->is_relaxed_input_section())
5713         {
5714           // The stub table information for input sections live
5715           // in their objects.
5716           Arm_relobj<big_endian>* arm_relobj =
5717             Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5718           arm_relobj->set_stub_table(p->shndx(), stub_table);
5719         }
5720       prev_p = p++;
5721     }
5722   while (prev_p != end);
5723 }
5724
5725 // Group input sections for stub generation.  GROUP_SIZE is roughly the limit
5726 // of stub groups.  We grow a stub group by adding input section until the
5727 // size is just below GROUP_SIZE.  The last input section will be converted
5728 // into a stub table.  If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5729 // input section after the stub table, effectively double the group size.
5730 //
5731 // This is similar to the group_sections() function in elf32-arm.c but is
5732 // implemented differently.
5733
5734 template<bool big_endian>
5735 void
5736 Arm_output_section<big_endian>::group_sections(
5737     section_size_type group_size,
5738     bool stubs_always_after_branch,
5739     Target_arm<big_endian>* target,
5740     const Task* task)
5741 {
5742   // States for grouping.
5743   typedef enum
5744   {
5745     // No group is being built.
5746     NO_GROUP,
5747     // A group is being built but the stub table is not found yet.
5748     // We keep group a stub group until the size is just under GROUP_SIZE.
5749     // The last input section in the group will be used as the stub table.
5750     FINDING_STUB_SECTION,
5751     // A group is being built and we have already found a stub table.
5752     // We enter this state to grow a stub group by adding input section
5753     // after the stub table.  This effectively doubles the group size.
5754     HAS_STUB_SECTION
5755   } State;
5756
5757   // Any newly created relaxed sections are stored here.
5758   std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5759
5760   State state = NO_GROUP;
5761   section_size_type off = 0;
5762   section_size_type group_begin_offset = 0;
5763   section_size_type group_end_offset = 0;
5764   section_size_type stub_table_end_offset = 0;
5765   Input_section_list::const_iterator group_begin =
5766     this->input_sections().end();
5767   Input_section_list::const_iterator stub_table =
5768     this->input_sections().end();
5769   Input_section_list::const_iterator group_end = this->input_sections().end();
5770   for (Input_section_list::const_iterator p = this->input_sections().begin();
5771        p != this->input_sections().end();
5772        ++p)
5773     {
5774       section_size_type section_begin_offset =
5775         align_address(off, p->addralign());
5776       section_size_type section_end_offset =
5777         section_begin_offset + p->data_size();
5778
5779       // Check to see if we should group the previously seen sections.
5780       switch (state)
5781         {
5782         case NO_GROUP:
5783           break;
5784
5785         case FINDING_STUB_SECTION:
5786           // Adding this section makes the group larger than GROUP_SIZE.
5787           if (section_end_offset - group_begin_offset >= group_size)
5788             {
5789               if (stubs_always_after_branch)
5790                 {
5791                   gold_assert(group_end != this->input_sections().end());
5792                   this->create_stub_group(group_begin, group_end, group_end,
5793                                           target, &new_relaxed_sections,
5794                                           task);
5795                   state = NO_GROUP;
5796                 }
5797               else
5798                 {
5799                   // But wait, there's more!  Input sections up to
5800                   // stub_group_size bytes after the stub table can be
5801                   // handled by it too.
5802                   state = HAS_STUB_SECTION;
5803                   stub_table = group_end;
5804                   stub_table_end_offset = group_end_offset;
5805                 }
5806             }
5807             break;
5808
5809         case HAS_STUB_SECTION:
5810           // Adding this section makes the post stub-section group larger
5811           // than GROUP_SIZE.
5812           if (section_end_offset - stub_table_end_offset >= group_size)
5813            {
5814              gold_assert(group_end != this->input_sections().end());
5815              this->create_stub_group(group_begin, group_end, stub_table,
5816                                      target, &new_relaxed_sections, task);
5817              state = NO_GROUP;
5818            }
5819            break;
5820
5821           default:
5822             gold_unreachable();
5823         }
5824
5825       // If we see an input section and currently there is no group, start
5826       // a new one.  Skip any empty sections.  We look at the data size
5827       // instead of calling p->relobj()->section_size() to avoid locking.
5828       if ((p->is_input_section() || p->is_relaxed_input_section())
5829           && (p->data_size() != 0))
5830         {
5831           if (state == NO_GROUP)
5832             {
5833               state = FINDING_STUB_SECTION;
5834               group_begin = p;
5835               group_begin_offset = section_begin_offset;
5836             }
5837
5838           // Keep track of the last input section seen.
5839           group_end = p;
5840           group_end_offset = section_end_offset;
5841         }
5842
5843       off = section_end_offset;
5844     }
5845
5846   // Create a stub group for any ungrouped sections.
5847   if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5848     {
5849       gold_assert(group_end != this->input_sections().end());
5850       this->create_stub_group(group_begin, group_end,
5851                               (state == FINDING_STUB_SECTION
5852                                ? group_end
5853                                : stub_table),
5854                                target, &new_relaxed_sections, task);
5855     }
5856
5857   // Convert input section into relaxed input section in a batch.
5858   if (!new_relaxed_sections.empty())
5859     this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5860
5861   // Update the section offsets
5862   for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5863     {
5864       Arm_relobj<big_endian>* arm_relobj =
5865         Arm_relobj<big_endian>::as_arm_relobj(
5866           new_relaxed_sections[i]->relobj());
5867       unsigned int shndx = new_relaxed_sections[i]->shndx();
5868       // Tell Arm_relobj that this input section is converted.
5869       arm_relobj->convert_input_section_to_relaxed_section(shndx);
5870     }
5871 }
5872
5873 // Append non empty text sections in this to LIST in ascending
5874 // order of their position in this.
5875
5876 template<bool big_endian>
5877 void
5878 Arm_output_section<big_endian>::append_text_sections_to_list(
5879     Text_section_list* list)
5880 {
5881   gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5882
5883   for (Input_section_list::const_iterator p = this->input_sections().begin();
5884        p != this->input_sections().end();
5885        ++p)
5886     {
5887       // We only care about plain or relaxed input sections.  We also
5888       // ignore any merged sections.
5889       if (p->is_input_section() || p->is_relaxed_input_section())
5890         list->push_back(Text_section_list::value_type(p->relobj(),
5891                                                       p->shndx()));
5892     }
5893 }
5894
5895 template<bool big_endian>
5896 void
5897 Arm_output_section<big_endian>::fix_exidx_coverage(
5898     Layout* layout,
5899     const Text_section_list& sorted_text_sections,
5900     Symbol_table* symtab,
5901     bool merge_exidx_entries,
5902     const Task* task)
5903 {
5904   // We should only do this for the EXIDX output section.
5905   gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5906
5907   // We don't want the relaxation loop to undo these changes, so we discard
5908   // the current saved states and take another one after the fix-up.
5909   this->discard_states();
5910
5911   // Remove all input sections.
5912   uint64_t address = this->address();
5913   typedef std::list<Output_section::Input_section> Input_section_list;
5914   Input_section_list input_sections;
5915   this->reset_address_and_file_offset();
5916   this->get_input_sections(address, std::string(""), &input_sections);
5917
5918   if (!this->input_sections().empty())
5919     gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5920
5921   // Go through all the known input sections and record them.
5922   typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5923   typedef Unordered_map<Section_id, const Output_section::Input_section*,
5924                         Section_id_hash> Text_to_exidx_map;
5925   Text_to_exidx_map text_to_exidx_map;
5926   for (Input_section_list::const_iterator p = input_sections.begin();
5927        p != input_sections.end();
5928        ++p)
5929     {
5930       // This should never happen.  At this point, we should only see
5931       // plain EXIDX input sections.
5932       gold_assert(!p->is_relaxed_input_section());
5933       text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p);
5934     }
5935
5936   Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries);
5937
5938   // Go over the sorted text sections.
5939   typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5940   Section_id_set processed_input_sections;
5941   for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5942        p != sorted_text_sections.end();
5943        ++p)
5944     {
5945       Relobj* relobj = p->first;
5946       unsigned int shndx = p->second;
5947
5948       Arm_relobj<big_endian>* arm_relobj =
5949          Arm_relobj<big_endian>::as_arm_relobj(relobj);
5950       const Arm_exidx_input_section* exidx_input_section =
5951          arm_relobj->exidx_input_section_by_link(shndx);
5952
5953       // If this text section has no EXIDX section or if the EXIDX section
5954       // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5955       // of the last seen EXIDX section.
5956       if (exidx_input_section == NULL || exidx_input_section->has_errors())
5957         {
5958           exidx_fixup.add_exidx_cantunwind_as_needed();
5959           continue;
5960         }
5961
5962       Relobj* exidx_relobj = exidx_input_section->relobj();
5963       unsigned int exidx_shndx = exidx_input_section->shndx();
5964       Section_id sid(exidx_relobj, exidx_shndx);
5965       Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid);
5966       if (iter == text_to_exidx_map.end())
5967         {
5968           // This is odd.  We have not seen this EXIDX input section before.
5969           // We cannot do fix-up.  If we saw a SECTIONS clause in a script,
5970           // issue a warning instead.  We assume the user knows what he
5971           // or she is doing.  Otherwise, this is an error.
5972           if (layout->script_options()->saw_sections_clause())
5973             gold_warning(_("unwinding may not work because EXIDX input section"
5974                            " %u of %s is not in EXIDX output section"),
5975                          exidx_shndx, exidx_relobj->name().c_str());
5976           else
5977             gold_error(_("unwinding may not work because EXIDX input section"
5978                          " %u of %s is not in EXIDX output section"),
5979                        exidx_shndx, exidx_relobj->name().c_str());
5980
5981           exidx_fixup.add_exidx_cantunwind_as_needed();
5982           continue;
5983         }
5984
5985       // We need to access the contents of the EXIDX section, lock the
5986       // object here.
5987       Task_lock_obj<Object> tl(task, exidx_relobj);
5988       section_size_type exidx_size;
5989       const unsigned char* exidx_contents =
5990         exidx_relobj->section_contents(exidx_shndx, &exidx_size, false);
5991
5992       // Fix up coverage and append input section to output data list.
5993       Arm_exidx_section_offset_map* section_offset_map = NULL;
5994       uint32_t deleted_bytes =
5995         exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5996                                                       exidx_contents,
5997                                                       exidx_size,
5998                                                       &section_offset_map);
5999
6000       if (deleted_bytes == exidx_input_section->size())
6001         {
6002           // The whole EXIDX section got merged.  Remove it from output.
6003           gold_assert(section_offset_map == NULL);
6004           exidx_relobj->set_output_section(exidx_shndx, NULL);
6005
6006           // All local symbols defined in this input section will be dropped.
6007           // We need to adjust output local symbol count.
6008           arm_relobj->set_output_local_symbol_count_needs_update();
6009         }
6010       else if (deleted_bytes > 0)
6011         {
6012           // Some entries are merged.  We need to convert this EXIDX input
6013           // section into a relaxed section.
6014           gold_assert(section_offset_map != NULL);
6015
6016           Arm_exidx_merged_section* merged_section =
6017             new Arm_exidx_merged_section(*exidx_input_section,
6018                                          *section_offset_map, deleted_bytes);
6019           merged_section->build_contents(exidx_contents, exidx_size);
6020
6021           const std::string secname = exidx_relobj->section_name(exidx_shndx);
6022           this->add_relaxed_input_section(layout, merged_section, secname);
6023           arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
6024
6025           // All local symbols defined in discarded portions of this input
6026           // section will be dropped.  We need to adjust output local symbol
6027           // count.
6028           arm_relobj->set_output_local_symbol_count_needs_update();
6029         }
6030       else
6031         {
6032           // Just add back the EXIDX input section.
6033           gold_assert(section_offset_map == NULL);
6034           const Output_section::Input_section* pis = iter->second;
6035           gold_assert(pis->is_input_section());
6036           this->add_script_input_section(*pis);
6037         }
6038
6039       processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
6040     }
6041
6042   // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6043   exidx_fixup.add_exidx_cantunwind_as_needed();
6044
6045   // Remove any known EXIDX input sections that are not processed.
6046   for (Input_section_list::const_iterator p = input_sections.begin();
6047        p != input_sections.end();
6048        ++p)
6049     {
6050       if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
6051           == processed_input_sections.end())
6052         {
6053           // We discard a known EXIDX section because its linked
6054           // text section has been folded by ICF.  We also discard an
6055           // EXIDX section with error, the output does not matter in this
6056           // case.  We do this to avoid triggering asserts.
6057           Arm_relobj<big_endian>* arm_relobj =
6058             Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6059           const Arm_exidx_input_section* exidx_input_section =
6060             arm_relobj->exidx_input_section_by_shndx(p->shndx());
6061           gold_assert(exidx_input_section != NULL);
6062           if (!exidx_input_section->has_errors())
6063             {
6064               unsigned int text_shndx = exidx_input_section->link();
6065               gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
6066             }
6067
6068           // Remove this from link.  We also need to recount the
6069           // local symbols.
6070           p->relobj()->set_output_section(p->shndx(), NULL);
6071           arm_relobj->set_output_local_symbol_count_needs_update();
6072         }
6073     }
6074
6075   // Link exidx output section to the first seen output section and
6076   // set correct entry size.
6077   this->set_link_section(exidx_fixup.first_output_text_section());
6078   this->set_entsize(8);
6079
6080   // Make changes permanent.
6081   this->save_states();
6082   this->set_section_offsets_need_adjustment();
6083 }
6084
6085 // Link EXIDX output sections to text output sections.
6086
6087 template<bool big_endian>
6088 void
6089 Arm_output_section<big_endian>::set_exidx_section_link()
6090 {
6091   gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
6092   if (!this->input_sections().empty())
6093     {
6094       Input_section_list::const_iterator p = this->input_sections().begin();
6095       Arm_relobj<big_endian>* arm_relobj =
6096         Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6097       unsigned exidx_shndx = p->shndx();
6098       const Arm_exidx_input_section* exidx_input_section =
6099         arm_relobj->exidx_input_section_by_shndx(exidx_shndx);
6100       gold_assert(exidx_input_section != NULL);
6101       unsigned int text_shndx = exidx_input_section->link();
6102       Output_section* os = arm_relobj->output_section(text_shndx);
6103       this->set_link_section(os);
6104     }
6105 }
6106
6107 // Arm_relobj methods.
6108
6109 // Determine if an input section is scannable for stub processing.  SHDR is
6110 // the header of the section and SHNDX is the section index.  OS is the output
6111 // section for the input section and SYMTAB is the global symbol table used to
6112 // look up ICF information.
6113
6114 template<bool big_endian>
6115 bool
6116 Arm_relobj<big_endian>::section_is_scannable(
6117     const elfcpp::Shdr<32, big_endian>& shdr,
6118     unsigned int shndx,
6119     const Output_section* os,
6120     const Symbol_table* symtab)
6121 {
6122   // Skip any empty sections, unallocated sections or sections whose
6123   // type are not SHT_PROGBITS.
6124   if (shdr.get_sh_size() == 0
6125       || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
6126       || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
6127     return false;
6128
6129   // Skip any discarded or ICF'ed sections.
6130   if (os == NULL || symtab->is_section_folded(this, shndx))
6131     return false;
6132
6133   // If this requires special offset handling, check to see if it is
6134   // a relaxed section.  If this is not, then it is a merged section that
6135   // we cannot handle.
6136   if (this->is_output_section_offset_invalid(shndx))
6137     {
6138       const Output_relaxed_input_section* poris =
6139         os->find_relaxed_input_section(this, shndx);
6140       if (poris == NULL)
6141         return false;
6142     }
6143
6144   return true;
6145 }
6146
6147 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6148 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6149
6150 template<bool big_endian>
6151 bool
6152 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
6153     const elfcpp::Shdr<32, big_endian>& shdr,
6154     const Relobj::Output_sections& out_sections,
6155     const Symbol_table* symtab,
6156     const unsigned char* pshdrs)
6157 {
6158   unsigned int sh_type = shdr.get_sh_type();
6159   if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
6160     return false;
6161
6162   // Ignore empty section.
6163   off_t sh_size = shdr.get_sh_size();
6164   if (sh_size == 0)
6165     return false;
6166
6167   // Ignore reloc section with unexpected symbol table.  The
6168   // error will be reported in the final link.
6169   if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
6170     return false;
6171
6172   unsigned int reloc_size;
6173   if (sh_type == elfcpp::SHT_REL)
6174     reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6175   else
6176     reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6177
6178   // Ignore reloc section with unexpected entsize or uneven size.
6179   // The error will be reported in the final link.
6180   if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
6181     return false;
6182
6183   // Ignore reloc section with bad info.  This error will be
6184   // reported in the final link.
6185   unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6186   if (index >= this->shnum())
6187     return false;
6188
6189   const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6190   const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
6191   return this->section_is_scannable(text_shdr, index,
6192                                    out_sections[index], symtab);
6193 }
6194
6195 // Return the output address of either a plain input section or a relaxed
6196 // input section.  SHNDX is the section index.  We define and use this
6197 // instead of calling Output_section::output_address because that is slow
6198 // for large output.
6199
6200 template<bool big_endian>
6201 Arm_address
6202 Arm_relobj<big_endian>::simple_input_section_output_address(
6203     unsigned int shndx,
6204     Output_section* os)
6205 {
6206   if (this->is_output_section_offset_invalid(shndx))
6207     {
6208       const Output_relaxed_input_section* poris =
6209         os->find_relaxed_input_section(this, shndx);
6210       // We do not handle merged sections here.
6211       gold_assert(poris != NULL);
6212       return poris->address();
6213     }
6214   else
6215     return os->address() + this->get_output_section_offset(shndx);
6216 }
6217
6218 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6219 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6220
6221 template<bool big_endian>
6222 bool
6223 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
6224     const elfcpp::Shdr<32, big_endian>& shdr,
6225     unsigned int shndx,
6226     Output_section* os,
6227     const Symbol_table* symtab)
6228 {
6229   if (!this->section_is_scannable(shdr, shndx, os, symtab))
6230     return false;
6231
6232   // If the section does not cross any 4K-boundaries, it does not need to
6233   // be scanned.
6234   Arm_address address = this->simple_input_section_output_address(shndx, os);
6235   if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
6236     return false;
6237
6238   return true;
6239 }
6240
6241 // Scan a section for Cortex-A8 workaround.
6242
6243 template<bool big_endian>
6244 void
6245 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
6246     const elfcpp::Shdr<32, big_endian>& shdr,
6247     unsigned int shndx,
6248     Output_section* os,
6249     Target_arm<big_endian>* arm_target)
6250 {
6251   // Look for the first mapping symbol in this section.  It should be
6252   // at (shndx, 0).
6253   Mapping_symbol_position section_start(shndx, 0);
6254   typename Mapping_symbols_info::const_iterator p =
6255     this->mapping_symbols_info_.lower_bound(section_start);
6256
6257   // There are no mapping symbols for this section.  Treat it as a data-only
6258   // section.  Issue a warning if section is marked as containing
6259   // instructions.
6260   if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
6261     {
6262       if ((this->section_flags(shndx) & elfcpp::SHF_EXECINSTR) != 0)
6263         gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6264                        "erratum because it has no mapping symbols."),
6265                      shndx, this->name().c_str());
6266       return;
6267     }
6268
6269   Arm_address output_address =
6270     this->simple_input_section_output_address(shndx, os);
6271
6272   // Get the section contents.
6273   section_size_type input_view_size = 0;
6274   const unsigned char* input_view =
6275     this->section_contents(shndx, &input_view_size, false);
6276
6277   // We need to go through the mapping symbols to determine what to
6278   // scan.  There are two reasons.  First, we should look at THUMB code and
6279   // THUMB code only.  Second, we only want to look at the 4K-page boundary
6280   // to speed up the scanning.
6281
6282   while (p != this->mapping_symbols_info_.end()
6283         && p->first.first == shndx)
6284     {
6285       typename Mapping_symbols_info::const_iterator next =
6286         this->mapping_symbols_info_.upper_bound(p->first);
6287
6288       // Only scan part of a section with THUMB code.
6289       if (p->second == 't')
6290         {
6291           // Determine the end of this range.
6292           section_size_type span_start =
6293             convert_to_section_size_type(p->first.second);
6294           section_size_type span_end;
6295           if (next != this->mapping_symbols_info_.end()
6296               && next->first.first == shndx)
6297             span_end = convert_to_section_size_type(next->first.second);
6298           else
6299             span_end = convert_to_section_size_type(shdr.get_sh_size());
6300
6301           if (((span_start + output_address) & ~0xfffUL)
6302               != ((span_end + output_address - 1) & ~0xfffUL))
6303             {
6304               arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
6305                                                           span_start, span_end,
6306                                                           input_view,
6307                                                           output_address);
6308             }
6309         }
6310
6311       p = next;
6312     }
6313 }
6314
6315 // Scan relocations for stub generation.
6316
6317 template<bool big_endian>
6318 void
6319 Arm_relobj<big_endian>::scan_sections_for_stubs(
6320     Target_arm<big_endian>* arm_target,
6321     const Symbol_table* symtab,
6322     const Layout* layout)
6323 {
6324   unsigned int shnum = this->shnum();
6325   const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6326
6327   // Read the section headers.
6328   const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6329                                                shnum * shdr_size,
6330                                                true, true);
6331
6332   // To speed up processing, we set up hash tables for fast lookup of
6333   // input offsets to output addresses.
6334   this->initialize_input_to_output_maps();
6335
6336   const Relobj::Output_sections& out_sections(this->output_sections());
6337
6338   Relocate_info<32, big_endian> relinfo;
6339   relinfo.symtab = symtab;
6340   relinfo.layout = layout;
6341   relinfo.object = this;
6342
6343   // Do relocation stubs scanning.
6344   const unsigned char* p = pshdrs + shdr_size;
6345   for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6346     {
6347       const elfcpp::Shdr<32, big_endian> shdr(p);
6348       if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
6349                                                   pshdrs))
6350         {
6351           unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6352           Arm_address output_offset = this->get_output_section_offset(index);
6353           Arm_address output_address;
6354           if (output_offset != invalid_address)
6355             output_address = out_sections[index]->address() + output_offset;
6356           else
6357             {
6358               // Currently this only happens for a relaxed section.
6359               const Output_relaxed_input_section* poris =
6360               out_sections[index]->find_relaxed_input_section(this, index);
6361               gold_assert(poris != NULL);
6362               output_address = poris->address();
6363             }
6364
6365           // Get the relocations.
6366           const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
6367                                                         shdr.get_sh_size(),
6368                                                         true, false);
6369
6370           // Get the section contents.  This does work for the case in which
6371           // we modify the contents of an input section.  We need to pass the
6372           // output view under such circumstances.
6373           section_size_type input_view_size = 0;
6374           const unsigned char* input_view =
6375             this->section_contents(index, &input_view_size, false);
6376
6377           relinfo.reloc_shndx = i;
6378           relinfo.data_shndx = index;
6379           unsigned int sh_type = shdr.get_sh_type();
6380           unsigned int reloc_size;
6381           if (sh_type == elfcpp::SHT_REL)
6382             reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6383           else
6384             reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6385
6386           Output_section* os = out_sections[index];
6387           arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
6388                                              shdr.get_sh_size() / reloc_size,
6389                                              os,
6390                                              output_offset == invalid_address,
6391                                              input_view, output_address,
6392                                              input_view_size);
6393         }
6394     }
6395
6396   // Do Cortex-A8 erratum stubs scanning.  This has to be done for a section
6397   // after its relocation section, if there is one, is processed for
6398   // relocation stubs.  Merging this loop with the one above would have been
6399   // complicated since we would have had to make sure that relocation stub
6400   // scanning is done first.
6401   if (arm_target->fix_cortex_a8())
6402     {
6403       const unsigned char* p = pshdrs + shdr_size;
6404       for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6405         {
6406           const elfcpp::Shdr<32, big_endian> shdr(p);
6407           if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
6408                                                           out_sections[i],
6409                                                           symtab))
6410             this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
6411                                                      arm_target);
6412         }
6413     }
6414
6415   // After we've done the relocations, we release the hash tables,
6416   // since we no longer need them.
6417   this->free_input_to_output_maps();
6418 }
6419
6420 // Count the local symbols.  The ARM backend needs to know if a symbol
6421 // is a THUMB function or not.  For global symbols, it is easy because
6422 // the Symbol object keeps the ELF symbol type.  For local symbol it is
6423 // harder because we cannot access this information.   So we override the
6424 // do_count_local_symbol in parent and scan local symbols to mark
6425 // THUMB functions.  This is not the most efficient way but I do not want to
6426 // slow down other ports by calling a per symbol target hook inside
6427 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6428
6429 template<bool big_endian>
6430 void
6431 Arm_relobj<big_endian>::do_count_local_symbols(
6432     Stringpool_template<char>* pool,
6433     Stringpool_template<char>* dynpool)
6434 {
6435   // We need to fix-up the values of any local symbols whose type are
6436   // STT_ARM_TFUNC.
6437
6438   // Ask parent to count the local symbols.
6439   Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool);
6440   const unsigned int loccount = this->local_symbol_count();
6441   if (loccount == 0)
6442     return;
6443
6444   // Initialize the thumb function bit-vector.
6445   std::vector<bool> empty_vector(loccount, false);
6446   this->local_symbol_is_thumb_function_.swap(empty_vector);
6447
6448   // Read the symbol table section header.
6449   const unsigned int symtab_shndx = this->symtab_shndx();
6450   elfcpp::Shdr<32, big_endian>
6451       symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6452   gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6453
6454   // Read the local symbols.
6455   const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6456   gold_assert(loccount == symtabshdr.get_sh_info());
6457   off_t locsize = loccount * sym_size;
6458   const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6459                                               locsize, true, true);
6460
6461   // For mapping symbol processing, we need to read the symbol names.
6462   unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
6463   if (strtab_shndx >= this->shnum())
6464     {
6465       this->error(_("invalid symbol table name index: %u"), strtab_shndx);
6466       return;
6467     }
6468
6469   elfcpp::Shdr<32, big_endian>
6470     strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
6471   if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
6472     {
6473       this->error(_("symbol table name section has wrong type: %u"),
6474                   static_cast<unsigned int>(strtabshdr.get_sh_type()));
6475       return;
6476     }
6477   const char* pnames =
6478     reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
6479                                                  strtabshdr.get_sh_size(),
6480                                                  false, false));
6481
6482   // Loop over the local symbols and mark any local symbols pointing
6483   // to THUMB functions.
6484
6485   // Skip the first dummy symbol.
6486   psyms += sym_size;
6487   typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values =
6488     this->local_values();
6489   for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6490     {
6491       elfcpp::Sym<32, big_endian> sym(psyms);
6492       elfcpp::STT st_type = sym.get_st_type();
6493       Symbol_value<32>& lv((*plocal_values)[i]);
6494       Arm_address input_value = lv.input_value();
6495
6496       // Check to see if this is a mapping symbol.
6497       const char* sym_name = pnames + sym.get_st_name();
6498       if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
6499         {
6500           bool is_ordinary;
6501           unsigned int input_shndx =
6502             this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary);
6503           gold_assert(is_ordinary);
6504
6505           // Strip of LSB in case this is a THUMB symbol.
6506           Mapping_symbol_position msp(input_shndx, input_value & ~1U);
6507           this->mapping_symbols_info_[msp] = sym_name[1];
6508         }
6509
6510       if (st_type == elfcpp::STT_ARM_TFUNC
6511           || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
6512         {
6513           // This is a THUMB function.  Mark this and canonicalize the
6514           // symbol value by setting LSB.
6515           this->local_symbol_is_thumb_function_[i] = true;
6516           if ((input_value & 1) == 0)
6517             lv.set_input_value(input_value | 1);
6518         }
6519     }
6520 }
6521
6522 // Relocate sections.
6523 template<bool big_endian>
6524 void
6525 Arm_relobj<big_endian>::do_relocate_sections(
6526     const Symbol_table* symtab,
6527     const Layout* layout,
6528     const unsigned char* pshdrs,
6529     Output_file* of,
6530     typename Sized_relobj_file<32, big_endian>::Views* pviews)
6531 {
6532   // Call parent to relocate sections.
6533   Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout,
6534                                                           pshdrs, of, pviews);
6535
6536   // We do not generate stubs if doing a relocatable link.
6537   if (parameters->options().relocatable())
6538     return;
6539
6540   // Relocate stub tables.
6541   unsigned int shnum = this->shnum();
6542
6543   Target_arm<big_endian>* arm_target =
6544     Target_arm<big_endian>::default_target();
6545
6546   Relocate_info<32, big_endian> relinfo;
6547   relinfo.symtab = symtab;
6548   relinfo.layout = layout;
6549   relinfo.object = this;
6550
6551   for (unsigned int i = 1; i < shnum; ++i)
6552     {
6553       Arm_input_section<big_endian>* arm_input_section =
6554         arm_target->find_arm_input_section(this, i);
6555
6556       if (arm_input_section != NULL
6557           && arm_input_section->is_stub_table_owner()
6558           && !arm_input_section->stub_table()->empty())
6559         {
6560           // We cannot discard a section if it owns a stub table.
6561           Output_section* os = this->output_section(i);
6562           gold_assert(os != NULL);
6563
6564           relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
6565           relinfo.reloc_shdr = NULL;
6566           relinfo.data_shndx = i;
6567           relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
6568
6569           gold_assert((*pviews)[i].view != NULL);
6570
6571           // We are passed the output section view.  Adjust it to cover the
6572           // stub table only.
6573           Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6574           gold_assert((stub_table->address() >= (*pviews)[i].address)
6575                       && ((stub_table->address() + stub_table->data_size())
6576                           <= (*pviews)[i].address + (*pviews)[i].view_size));
6577
6578           off_t offset = stub_table->address() - (*pviews)[i].address;
6579           unsigned char* view = (*pviews)[i].view + offset;
6580           Arm_address address = stub_table->address();
6581           section_size_type view_size = stub_table->data_size();
6582
6583           stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6584                                      view_size);
6585         }
6586
6587       // Apply Cortex A8 workaround if applicable.
6588       if (this->section_has_cortex_a8_workaround(i))
6589         {
6590           unsigned char* view = (*pviews)[i].view;
6591           Arm_address view_address = (*pviews)[i].address;
6592           section_size_type view_size = (*pviews)[i].view_size;
6593           Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6594
6595           // Adjust view to cover section.
6596           Output_section* os = this->output_section(i);
6597           gold_assert(os != NULL);
6598           Arm_address section_address =
6599             this->simple_input_section_output_address(i, os);
6600           uint64_t section_size = this->section_size(i);
6601
6602           gold_assert(section_address >= view_address
6603                       && ((section_address + section_size)
6604                           <= (view_address + view_size)));
6605
6606           unsigned char* section_view = view + (section_address - view_address);
6607
6608           // Apply the Cortex-A8 workaround to the output address range
6609           // corresponding to this input section.
6610           stub_table->apply_cortex_a8_workaround_to_address_range(
6611               arm_target,
6612               section_view,
6613               section_address,
6614               section_size);
6615         }
6616     }
6617 }
6618
6619 // Find the linked text section of an EXIDX section by looking at the first
6620 // relocation.  4.4.1 of the EHABI specifications says that an EXIDX section
6621 // must be linked to its associated code section via the sh_link field of
6622 // its section header.  However, some tools are broken and the link is not
6623 // always set.  LD just drops such an EXIDX section silently, causing the
6624 // associated code not unwindabled.   Here we try a little bit harder to
6625 // discover the linked code section.
6626 //
6627 // PSHDR points to the section header of a relocation section of an EXIDX
6628 // section.  If we can find a linked text section, return true and
6629 // store the text section index in the location PSHNDX.  Otherwise
6630 // return false.
6631
6632 template<bool big_endian>
6633 bool
6634 Arm_relobj<big_endian>::find_linked_text_section(
6635     const unsigned char* pshdr,
6636     const unsigned char* psyms,
6637     unsigned int* pshndx)
6638 {
6639   elfcpp::Shdr<32, big_endian> shdr(pshdr);
6640
6641   // If there is no relocation, we cannot find the linked text section.
6642   size_t reloc_size;
6643   if (shdr.get_sh_type() == elfcpp::SHT_REL)
6644       reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6645   else
6646       reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6647   size_t reloc_count = shdr.get_sh_size() / reloc_size;
6648
6649   // Get the relocations.
6650   const unsigned char* prelocs =
6651       this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6652
6653   // Find the REL31 relocation for the first word of the first EXIDX entry.
6654   for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6655     {
6656       Arm_address r_offset;
6657       typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6658       if (shdr.get_sh_type() == elfcpp::SHT_REL)
6659         {
6660           typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6661           r_info = reloc.get_r_info();
6662           r_offset = reloc.get_r_offset();
6663         }
6664       else
6665         {
6666           typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6667           r_info = reloc.get_r_info();
6668           r_offset = reloc.get_r_offset();
6669         }
6670
6671       unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6672       if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6673         continue;
6674
6675       unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6676       if (r_sym == 0
6677           || r_sym >= this->local_symbol_count()
6678           || r_offset != 0)
6679         continue;
6680
6681       // This is the relocation for the first word of the first EXIDX entry.
6682       // We expect to see a local section symbol.
6683       const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6684       elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6685       if (sym.get_st_type() == elfcpp::STT_SECTION)
6686         {
6687           bool is_ordinary;
6688           *pshndx =
6689             this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary);
6690           gold_assert(is_ordinary);
6691           return true;
6692         }
6693       else
6694         return false;
6695     }
6696
6697   return false;
6698 }
6699
6700 // Make an EXIDX input section object for an EXIDX section whose index is
6701 // SHNDX.  SHDR is the section header of the EXIDX section and TEXT_SHNDX
6702 // is the section index of the linked text section.
6703
6704 template<bool big_endian>
6705 void
6706 Arm_relobj<big_endian>::make_exidx_input_section(
6707     unsigned int shndx,
6708     const elfcpp::Shdr<32, big_endian>& shdr,
6709     unsigned int text_shndx,
6710     const elfcpp::Shdr<32, big_endian>& text_shdr)
6711 {
6712   // Create an Arm_exidx_input_section object for this EXIDX section.
6713   Arm_exidx_input_section* exidx_input_section =
6714     new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6715                                 shdr.get_sh_addralign(),
6716                                 text_shdr.get_sh_size());
6717
6718   gold_assert(this->exidx_section_map_[shndx] == NULL);
6719   this->exidx_section_map_[shndx] = exidx_input_section;
6720
6721   if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum())
6722     {
6723       gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6724                  this->section_name(shndx).c_str(), shndx, text_shndx,
6725                  this->name().c_str());
6726       exidx_input_section->set_has_errors();
6727     }
6728   else if (this->exidx_section_map_[text_shndx] != NULL)
6729     {
6730       unsigned other_exidx_shndx =
6731         this->exidx_section_map_[text_shndx]->shndx();
6732       gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6733                    "%s(%u) in %s"),
6734                  this->section_name(shndx).c_str(), shndx,
6735                  this->section_name(other_exidx_shndx).c_str(),
6736                  other_exidx_shndx, this->section_name(text_shndx).c_str(),
6737                  text_shndx, this->name().c_str());
6738       exidx_input_section->set_has_errors();
6739     }
6740   else
6741      this->exidx_section_map_[text_shndx] = exidx_input_section;
6742
6743   // Check section flags of text section.
6744   if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0)
6745     {
6746       gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6747                    " in %s"),
6748                  this->section_name(shndx).c_str(), shndx,
6749                  this->section_name(text_shndx).c_str(), text_shndx,
6750                  this->name().c_str());
6751       exidx_input_section->set_has_errors();
6752     }
6753   else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0)
6754     // I would like to make this an error but currently ld just ignores
6755     // this.
6756     gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6757                    "%s(%u) in %s"),
6758                  this->section_name(shndx).c_str(), shndx,
6759                  this->section_name(text_shndx).c_str(), text_shndx,
6760                  this->name().c_str());
6761 }
6762
6763 // Read the symbol information.
6764
6765 template<bool big_endian>
6766 void
6767 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6768 {
6769   // Call parent class to read symbol information.
6770   this->base_read_symbols(sd);
6771
6772   // If this input file is a binary file, it has no processor
6773   // specific flags and attributes section.
6774   Input_file::Format format = this->input_file()->format();
6775   if (format != Input_file::FORMAT_ELF)
6776     {
6777       gold_assert(format == Input_file::FORMAT_BINARY);
6778       this->merge_flags_and_attributes_ = false;
6779       return;
6780     }
6781
6782   // Read processor-specific flags in ELF file header.
6783   const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6784                                               elfcpp::Elf_sizes<32>::ehdr_size,
6785                                               true, false);
6786   elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6787   this->processor_specific_flags_ = ehdr.get_e_flags();
6788
6789   // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6790   // sections.
6791   std::vector<unsigned int> deferred_exidx_sections;
6792   const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6793   const unsigned char* pshdrs = sd->section_headers->data();
6794   const unsigned char* ps = pshdrs + shdr_size;
6795   bool must_merge_flags_and_attributes = false;
6796   for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6797     {
6798       elfcpp::Shdr<32, big_endian> shdr(ps);
6799
6800       // Sometimes an object has no contents except the section name string
6801       // table and an empty symbol table with the undefined symbol.  We
6802       // don't want to merge processor-specific flags from such an object.
6803       if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB)
6804         {
6805           // Symbol table is not empty.
6806           const elfcpp::Elf_types<32>::Elf_WXword sym_size =
6807              elfcpp::Elf_sizes<32>::sym_size;
6808           if (shdr.get_sh_size() > sym_size)
6809             must_merge_flags_and_attributes = true;
6810         }
6811       else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB)
6812         // If this is neither an empty symbol table nor a string table,
6813         // be conservative.
6814         must_merge_flags_and_attributes = true;
6815
6816       if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6817         {
6818           gold_assert(this->attributes_section_data_ == NULL);
6819           section_offset_type section_offset = shdr.get_sh_offset();
6820           section_size_type section_size =
6821             convert_to_section_size_type(shdr.get_sh_size());
6822           const unsigned char* view =
6823              this->get_view(section_offset, section_size, true, false);
6824           this->attributes_section_data_ =
6825             new Attributes_section_data(view, section_size);
6826         }
6827       else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6828         {
6829           unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6830           if (text_shndx == elfcpp::SHN_UNDEF)
6831             deferred_exidx_sections.push_back(i);
6832           else
6833             {
6834               elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6835                                                      + text_shndx * shdr_size);
6836               this->make_exidx_input_section(i, shdr, text_shndx, text_shdr);
6837             }
6838           // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6839           if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0)
6840             gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6841                          this->section_name(i).c_str(), this->name().c_str());
6842         }
6843     }
6844
6845   // This is rare.
6846   if (!must_merge_flags_and_attributes)
6847     {
6848       gold_assert(deferred_exidx_sections.empty());
6849       this->merge_flags_and_attributes_ = false;
6850       return;
6851     }
6852
6853   // Some tools are broken and they do not set the link of EXIDX sections.
6854   // We look at the first relocation to figure out the linked sections.
6855   if (!deferred_exidx_sections.empty())
6856     {
6857       // We need to go over the section headers again to find the mapping
6858       // from sections being relocated to their relocation sections.  This is
6859       // a bit inefficient as we could do that in the loop above.  However,
6860       // we do not expect any deferred EXIDX sections normally.  So we do not
6861       // want to slow down the most common path.
6862       typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
6863       Reloc_map reloc_map;
6864       ps = pshdrs + shdr_size;
6865       for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6866         {
6867           elfcpp::Shdr<32, big_endian> shdr(ps);
6868           elfcpp::Elf_Word sh_type = shdr.get_sh_type();
6869           if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
6870             {
6871               unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
6872               if (info_shndx >= this->shnum())
6873                 gold_error(_("relocation section %u has invalid info %u"),
6874                            i, info_shndx);
6875               Reloc_map::value_type value(info_shndx, i);
6876               std::pair<Reloc_map::iterator, bool> result =
6877                 reloc_map.insert(value);
6878               if (!result.second)
6879                 gold_error(_("section %u has multiple relocation sections "
6880                              "%u and %u"),
6881                            info_shndx, i, reloc_map[info_shndx]);
6882             }
6883         }
6884
6885       // Read the symbol table section header.
6886       const unsigned int symtab_shndx = this->symtab_shndx();
6887       elfcpp::Shdr<32, big_endian>
6888           symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6889       gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6890
6891       // Read the local symbols.
6892       const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6893       const unsigned int loccount = this->local_symbol_count();
6894       gold_assert(loccount == symtabshdr.get_sh_info());
6895       off_t locsize = loccount * sym_size;
6896       const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6897                                                   locsize, true, true);
6898
6899       // Process the deferred EXIDX sections.
6900       for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
6901         {
6902           unsigned int shndx = deferred_exidx_sections[i];
6903           elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
6904           unsigned int text_shndx = elfcpp::SHN_UNDEF;
6905           Reloc_map::const_iterator it = reloc_map.find(shndx);
6906           if (it != reloc_map.end())
6907             find_linked_text_section(pshdrs + it->second * shdr_size,
6908                                      psyms, &text_shndx);
6909           elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6910                                                  + text_shndx * shdr_size);
6911           this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr);
6912         }
6913     }
6914 }
6915
6916 // Process relocations for garbage collection.  The ARM target uses .ARM.exidx
6917 // sections for unwinding.  These sections are referenced implicitly by
6918 // text sections linked in the section headers.  If we ignore these implicit
6919 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6920 // will be garbage-collected incorrectly.  Hence we override the same function
6921 // in the base class to handle these implicit references.
6922
6923 template<bool big_endian>
6924 void
6925 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6926                                              Layout* layout,
6927                                              Read_relocs_data* rd)
6928 {
6929   // First, call base class method to process relocations in this object.
6930   Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6931
6932   // If --gc-sections is not specified, there is nothing more to do.
6933   // This happens when --icf is used but --gc-sections is not.
6934   if (!parameters->options().gc_sections())
6935     return;
6936
6937   unsigned int shnum = this->shnum();
6938   const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6939   const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6940                                                shnum * shdr_size,
6941                                                true, true);
6942
6943   // Scan section headers for sections of type SHT_ARM_EXIDX.  Add references
6944   // to these from the linked text sections.
6945   const unsigned char* ps = pshdrs + shdr_size;
6946   for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6947     {
6948       elfcpp::Shdr<32, big_endian> shdr(ps);
6949       if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6950         {
6951           // Found an .ARM.exidx section, add it to the set of reachable
6952           // sections from its linked text section.
6953           unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6954           symtab->gc()->add_reference(this, text_shndx, this, i);
6955         }
6956     }
6957 }
6958
6959 // Update output local symbol count.  Owing to EXIDX entry merging, some local
6960 // symbols  will be removed in output.  Adjust output local symbol count
6961 // accordingly.  We can only changed the static output local symbol count.  It
6962 // is too late to change the dynamic symbols.
6963
6964 template<bool big_endian>
6965 void
6966 Arm_relobj<big_endian>::update_output_local_symbol_count()
6967 {
6968   // Caller should check that this needs updating.  We want caller checking
6969   // because output_local_symbol_count_needs_update() is most likely inlined.
6970   gold_assert(this->output_local_symbol_count_needs_update_);
6971
6972   gold_assert(this->symtab_shndx() != -1U);
6973   if (this->symtab_shndx() == 0)
6974     {
6975       // This object has no symbols.  Weird but legal.
6976       return;
6977     }
6978
6979   // Read the symbol table section header.
6980   const unsigned int symtab_shndx = this->symtab_shndx();
6981   elfcpp::Shdr<32, big_endian>
6982     symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6983   gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6984
6985   // Read the local symbols.
6986   const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6987   const unsigned int loccount = this->local_symbol_count();
6988   gold_assert(loccount == symtabshdr.get_sh_info());
6989   off_t locsize = loccount * sym_size;
6990   const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6991                                               locsize, true, true);
6992
6993   // Loop over the local symbols.
6994
6995   typedef typename Sized_relobj_file<32, big_endian>::Output_sections
6996      Output_sections;
6997   const Output_sections& out_sections(this->output_sections());
6998   unsigned int shnum = this->shnum();
6999   unsigned int count = 0;
7000   // Skip the first, dummy, symbol.
7001   psyms += sym_size;
7002   for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
7003     {
7004       elfcpp::Sym<32, big_endian> sym(psyms);
7005
7006       Symbol_value<32>& lv((*this->local_values())[i]);
7007
7008       // This local symbol was already discarded by do_count_local_symbols.
7009       if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry())
7010         continue;
7011
7012       bool is_ordinary;
7013       unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
7014                                                   &is_ordinary);
7015
7016       if (shndx < shnum)
7017         {
7018           Output_section* os = out_sections[shndx];
7019
7020           // This local symbol no longer has an output section.  Discard it.
7021           if (os == NULL)
7022             {
7023               lv.set_no_output_symtab_entry();
7024               continue;
7025             }
7026
7027           // Currently we only discard parts of EXIDX input sections.
7028           // We explicitly check for a merged EXIDX input section to avoid
7029           // calling Output_section_data::output_offset unless necessary.
7030           if ((this->get_output_section_offset(shndx) == invalid_address)
7031               && (this->exidx_input_section_by_shndx(shndx) != NULL))
7032             {
7033               section_offset_type output_offset =
7034                 os->output_offset(this, shndx, lv.input_value());
7035               if (output_offset == -1)
7036                 {
7037                   // This symbol is defined in a part of an EXIDX input section
7038                   // that is discarded due to entry merging.
7039                   lv.set_no_output_symtab_entry();
7040                   continue;
7041                 }
7042             }
7043         }
7044
7045       ++count;
7046     }
7047
7048   this->set_output_local_symbol_count(count);
7049   this->output_local_symbol_count_needs_update_ = false;
7050 }
7051
7052 // Arm_dynobj methods.
7053
7054 // Read the symbol information.
7055
7056 template<bool big_endian>
7057 void
7058 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
7059 {
7060   // Call parent class to read symbol information.
7061   this->base_read_symbols(sd);
7062
7063   // Read processor-specific flags in ELF file header.
7064   const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
7065                                               elfcpp::Elf_sizes<32>::ehdr_size,
7066                                               true, false);
7067   elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
7068   this->processor_specific_flags_ = ehdr.get_e_flags();
7069
7070   // Read the attributes section if there is one.
7071   // We read from the end because gas seems to put it near the end of
7072   // the section headers.
7073   const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
7074   const unsigned char* ps =
7075     sd->section_headers->data() + shdr_size * (this->shnum() - 1);
7076   for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
7077     {
7078       elfcpp::Shdr<32, big_endian> shdr(ps);
7079       if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
7080         {
7081           section_offset_type section_offset = shdr.get_sh_offset();
7082           section_size_type section_size =
7083             convert_to_section_size_type(shdr.get_sh_size());
7084           const unsigned char* view =
7085             this->get_view(section_offset, section_size, true, false);
7086           this->attributes_section_data_ =
7087             new Attributes_section_data(view, section_size);
7088           break;
7089         }
7090     }
7091 }
7092
7093 // Stub_addend_reader methods.
7094
7095 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7096
7097 template<bool big_endian>
7098 elfcpp::Elf_types<32>::Elf_Swxword
7099 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
7100     unsigned int r_type,
7101     const unsigned char* view,
7102     const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
7103 {
7104   typedef class Arm_relocate_functions<big_endian> RelocFuncs;
7105
7106   switch (r_type)
7107     {
7108     case elfcpp::R_ARM_CALL:
7109     case elfcpp::R_ARM_JUMP24:
7110     case elfcpp::R_ARM_PLT32:
7111       {
7112         typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7113         const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7114         Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
7115         return Bits<26>::sign_extend32(val << 2);
7116       }
7117
7118     case elfcpp::R_ARM_THM_CALL:
7119     case elfcpp::R_ARM_THM_JUMP24:
7120     case elfcpp::R_ARM_THM_XPC22:
7121       {
7122         typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7123         const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7124         Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7125         Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7126         return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
7127       }
7128
7129     case elfcpp::R_ARM_THM_JUMP19:
7130       {
7131         typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7132         const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7133         Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7134         Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7135         return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
7136       }
7137
7138     default:
7139       gold_unreachable();
7140     }
7141 }
7142
7143 // Arm_output_data_got methods.
7144
7145 // Add a GOT pair for R_ARM_TLS_GD32.  The creates a pair of GOT entries.
7146 // The first one is initialized to be 1, which is the module index for
7147 // the main executable and the second one 0.  A reloc of the type
7148 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7149 // be applied by gold.  GSYM is a global symbol.
7150 //
7151 template<bool big_endian>
7152 void
7153 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7154     unsigned int got_type,
7155     Symbol* gsym)
7156 {
7157   if (gsym->has_got_offset(got_type))
7158     return;
7159
7160   // We are doing a static link.  Just mark it as belong to module 1,
7161   // the executable.
7162   unsigned int got_offset = this->add_constant(1);
7163   gsym->set_got_offset(got_type, got_offset);
7164   got_offset = this->add_constant(0);
7165   this->static_relocs_.push_back(Static_reloc(got_offset,
7166                                               elfcpp::R_ARM_TLS_DTPOFF32,
7167                                               gsym));
7168 }
7169
7170 // Same as the above but for a local symbol.
7171
7172 template<bool big_endian>
7173 void
7174 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7175   unsigned int got_type,
7176   Sized_relobj_file<32, big_endian>* object,
7177   unsigned int index)
7178 {
7179   if (object->local_has_got_offset(index, got_type))
7180     return;
7181
7182   // We are doing a static link.  Just mark it as belong to module 1,
7183   // the executable.
7184   unsigned int got_offset = this->add_constant(1);
7185   object->set_local_got_offset(index, got_type, got_offset);
7186   got_offset = this->add_constant(0);
7187   this->static_relocs_.push_back(Static_reloc(got_offset,
7188                                               elfcpp::R_ARM_TLS_DTPOFF32,
7189                                               object, index));
7190 }
7191
7192 template<bool big_endian>
7193 void
7194 Arm_output_data_got<big_endian>::do_write(Output_file* of)
7195 {
7196   // Call parent to write out GOT.
7197   Output_data_got<32, big_endian>::do_write(of);
7198
7199   // We are done if there is no fix up.
7200   if (this->static_relocs_.empty())
7201     return;
7202
7203   gold_assert(parameters->doing_static_link());
7204
7205   const off_t offset = this->offset();
7206   const section_size_type oview_size =
7207     convert_to_section_size_type(this->data_size());
7208   unsigned char* const oview = of->get_output_view(offset, oview_size);
7209
7210   Output_segment* tls_segment = this->layout_->tls_segment();
7211   gold_assert(tls_segment != NULL);
7212
7213   // The thread pointer $tp points to the TCB, which is followed by the
7214   // TLS.  So we need to adjust $tp relative addressing by this amount.
7215   Arm_address aligned_tcb_size =
7216     align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
7217
7218   for (size_t i = 0; i < this->static_relocs_.size(); ++i)
7219     {
7220       Static_reloc& reloc(this->static_relocs_[i]);
7221
7222       Arm_address value;
7223       if (!reloc.symbol_is_global())
7224         {
7225           Sized_relobj_file<32, big_endian>* object = reloc.relobj();
7226           const Symbol_value<32>* psymval =
7227             reloc.relobj()->local_symbol(reloc.index());
7228
7229           // We are doing static linking.  Issue an error and skip this
7230           // relocation if the symbol is undefined or in a discarded_section.
7231           bool is_ordinary;
7232           unsigned int shndx = psymval->input_shndx(&is_ordinary);
7233           if ((shndx == elfcpp::SHN_UNDEF)
7234               || (is_ordinary
7235                   && shndx != elfcpp::SHN_UNDEF
7236                   && !object->is_section_included(shndx)
7237                   && !this->symbol_table_->is_section_folded(object, shndx)))
7238             {
7239               gold_error(_("undefined or discarded local symbol %u from "
7240                            " object %s in GOT"),
7241                          reloc.index(), reloc.relobj()->name().c_str());
7242               continue;
7243             }
7244
7245           value = psymval->value(object, 0);
7246         }
7247       else
7248         {
7249           const Symbol* gsym = reloc.symbol();
7250           gold_assert(gsym != NULL);
7251           if (gsym->is_forwarder())
7252             gsym = this->symbol_table_->resolve_forwards(gsym);
7253
7254           // We are doing static linking.  Issue an error and skip this
7255           // relocation if the symbol is undefined or in a discarded_section
7256           // unless it is a weakly_undefined symbol.
7257           if ((gsym->is_defined_in_discarded_section()
7258                || gsym->is_undefined())
7259               && !gsym->is_weak_undefined())
7260             {
7261               gold_error(_("undefined or discarded symbol %s in GOT"),
7262                          gsym->name());
7263               continue;
7264             }
7265
7266           if (!gsym->is_weak_undefined())
7267             {
7268               const Sized_symbol<32>* sym =
7269                 static_cast<const Sized_symbol<32>*>(gsym);
7270               value = sym->value();
7271             }
7272           else
7273               value = 0;
7274         }
7275
7276       unsigned got_offset = reloc.got_offset();
7277       gold_assert(got_offset < oview_size);
7278
7279       typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7280       Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset);
7281       Valtype x;
7282       switch (reloc.r_type())
7283         {
7284         case elfcpp::R_ARM_TLS_DTPOFF32:
7285           x = value;
7286           break;
7287         case elfcpp::R_ARM_TLS_TPOFF32:
7288           x = value + aligned_tcb_size;
7289           break;
7290         default:
7291           gold_unreachable();
7292         }
7293       elfcpp::Swap<32, big_endian>::writeval(wv, x);
7294     }
7295
7296   of->write_output_view(offset, oview_size, oview);
7297 }
7298
7299 // A class to handle the PLT data.
7300 // This is an abstract base class that handles most of the linker details
7301 // but does not know the actual contents of PLT entries.  The derived
7302 // classes below fill in those details.
7303
7304 template<bool big_endian>
7305 class Output_data_plt_arm : public Output_section_data
7306 {
7307  public:
7308   // Unlike aarch64, which records symbol value in "addend" field of relocations
7309   // and could be done at the same time an IRelative reloc is created for the
7310   // symbol, arm puts the symbol value into "GOT" table, which, however, is
7311   // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7312   // to keep necessary symbol information for later use in do_write. We usually
7313   // have only a very limited number of ifuncs, so the extra data required here
7314   // is also limited.
7315
7316   struct IRelative_data
7317   {
7318     IRelative_data(Sized_symbol<32>* sized_symbol)
7319       : symbol_is_global_(true)
7320     {
7321       u_.global = sized_symbol;
7322     }
7323
7324     IRelative_data(Sized_relobj_file<32, big_endian>* relobj,
7325                    unsigned int index)
7326       : symbol_is_global_(false)
7327     {
7328       u_.local.relobj = relobj;
7329       u_.local.index = index;
7330     }
7331
7332     union
7333     {
7334       Sized_symbol<32>* global;
7335
7336       struct
7337       {
7338         Sized_relobj_file<32, big_endian>* relobj;
7339         unsigned int index;
7340       } local;
7341     } u_;
7342
7343     bool symbol_is_global_;
7344   };
7345
7346   typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
7347     Reloc_section;
7348
7349   Output_data_plt_arm(Layout* layout, uint64_t addralign,
7350                       Arm_output_data_got<big_endian>* got,
7351                       Output_data_space* got_plt,
7352                       Output_data_space* got_irelative);
7353
7354   // Add an entry to the PLT.
7355   void
7356   add_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym);
7357
7358   // Add the relocation for a plt entry.
7359   void
7360   add_relocation(Symbol_table* symtab, Layout* layout,
7361                  Symbol* gsym, unsigned int got_offset);
7362
7363   // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7364   unsigned int
7365   add_local_ifunc_entry(Symbol_table* symtab, Layout*,
7366                         Sized_relobj_file<32, big_endian>* relobj,
7367                         unsigned int local_sym_index);
7368
7369   // Return the .rel.plt section data.
7370   const Reloc_section*
7371   rel_plt() const
7372   { return this->rel_; }
7373
7374   // Return the PLT relocation container for IRELATIVE.
7375   Reloc_section*
7376   rel_irelative(Symbol_table*, Layout*);
7377
7378   // Return the number of PLT entries.
7379   unsigned int
7380   entry_count() const
7381   { return this->count_ + this->irelative_count_; }
7382
7383   // Return the offset of the first non-reserved PLT entry.
7384   unsigned int
7385   first_plt_entry_offset() const
7386   { return this->do_first_plt_entry_offset(); }
7387
7388   // Return the size of a PLT entry.
7389   unsigned int
7390   get_plt_entry_size() const
7391   { return this->do_get_plt_entry_size(); }
7392
7393   // Return the PLT address for globals.
7394   uint32_t
7395   address_for_global(const Symbol*) const;
7396
7397   // Return the PLT address for locals.
7398   uint32_t
7399   address_for_local(const Relobj*, unsigned int symndx) const;
7400
7401  protected:
7402   // Fill in the first PLT entry.
7403   void
7404   fill_first_plt_entry(unsigned char* pov,
7405                        Arm_address got_address,
7406                        Arm_address plt_address)
7407   { this->do_fill_first_plt_entry(pov, got_address, plt_address); }
7408
7409   void
7410   fill_plt_entry(unsigned char* pov,
7411                  Arm_address got_address,
7412                  Arm_address plt_address,
7413                  unsigned int got_offset,
7414                  unsigned int plt_offset)
7415   { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); }
7416
7417   virtual unsigned int
7418   do_first_plt_entry_offset() const = 0;
7419
7420   virtual unsigned int
7421   do_get_plt_entry_size() const = 0;
7422
7423   virtual void
7424   do_fill_first_plt_entry(unsigned char* pov,
7425                           Arm_address got_address,
7426                           Arm_address plt_address) = 0;
7427
7428   virtual void
7429   do_fill_plt_entry(unsigned char* pov,
7430                     Arm_address got_address,
7431                     Arm_address plt_address,
7432                     unsigned int got_offset,
7433                     unsigned int plt_offset) = 0;
7434
7435   void
7436   do_adjust_output_section(Output_section* os);
7437
7438   // Write to a map file.
7439   void
7440   do_print_to_mapfile(Mapfile* mapfile) const
7441   { mapfile->print_output_data(this, _("** PLT")); }
7442
7443  private:
7444   // Set the final size.
7445   void
7446   set_final_data_size()
7447   {
7448     this->set_data_size(this->first_plt_entry_offset()
7449                         + ((this->count_ + this->irelative_count_)
7450                            * this->get_plt_entry_size()));
7451   }
7452
7453   // Write out the PLT data.
7454   void
7455   do_write(Output_file*);
7456
7457   // Record irelative symbol data.
7458   void insert_irelative_data(const IRelative_data& idata)
7459   { irelative_data_vec_.push_back(idata); }
7460
7461   // The reloc section.
7462   Reloc_section* rel_;
7463   // The IRELATIVE relocs, if necessary.  These must follow the
7464   // regular PLT relocations.
7465   Reloc_section* irelative_rel_;
7466   // The .got section.
7467   Arm_output_data_got<big_endian>* got_;
7468   // The .got.plt section.
7469   Output_data_space* got_plt_;
7470   // The part of the .got.plt section used for IRELATIVE relocs.
7471   Output_data_space* got_irelative_;
7472   // The number of PLT entries.
7473   unsigned int count_;
7474   // Number of PLT entries with R_ARM_IRELATIVE relocs.  These
7475   // follow the regular PLT entries.
7476   unsigned int irelative_count_;
7477   // Vector for irelative data.
7478   typedef std::vector<IRelative_data> IRelative_data_vec;
7479   IRelative_data_vec irelative_data_vec_;
7480 };
7481
7482 // Create the PLT section.  The ordinary .got section is an argument,
7483 // since we need to refer to the start.  We also create our own .got
7484 // section just for PLT entries.
7485
7486 template<bool big_endian>
7487 Output_data_plt_arm<big_endian>::Output_data_plt_arm(
7488     Layout* layout, uint64_t addralign,
7489     Arm_output_data_got<big_endian>* got,
7490     Output_data_space* got_plt,
7491     Output_data_space* got_irelative)
7492   : Output_section_data(addralign), irelative_rel_(NULL),
7493     got_(got), got_plt_(got_plt), got_irelative_(got_irelative),
7494     count_(0), irelative_count_(0)
7495 {
7496   this->rel_ = new Reloc_section(false);
7497   layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
7498                                   elfcpp::SHF_ALLOC, this->rel_,
7499                                   ORDER_DYNAMIC_PLT_RELOCS, false);
7500 }
7501
7502 template<bool big_endian>
7503 void
7504 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
7505 {
7506   os->set_entsize(0);
7507 }
7508
7509 // Add an entry to the PLT.
7510
7511 template<bool big_endian>
7512 void
7513 Output_data_plt_arm<big_endian>::add_entry(Symbol_table* symtab,
7514                                            Layout* layout,
7515                                            Symbol* gsym)
7516 {
7517   gold_assert(!gsym->has_plt_offset());
7518
7519   unsigned int* entry_count;
7520   Output_section_data_build* got;
7521
7522   // We have 2 different types of plt entry here, normal and ifunc.
7523
7524   // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7525   // 1st entry offset would be 20, the second 32, third 44 ... etc.
7526
7527   // For ifunc plt, the offset begins with 0. So the first offset would 0,
7528   // second 12, third 24 ... etc.
7529
7530   // IFunc plt entries *always* come after *normal* plt entries.
7531
7532   // Notice, when computing the plt address of a certain symbol, "plt_address +
7533   // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7534   // target->plt_address_for_local() instead.
7535
7536   int begin_offset = 0;
7537   if (gsym->type() == elfcpp::STT_GNU_IFUNC
7538       && gsym->can_use_relative_reloc(false))
7539     {
7540       entry_count = &this->irelative_count_;
7541       got = this->got_irelative_;
7542       // For irelative plt entries, offset is relative to the end of normal plt
7543       // entries, so it starts from 0.
7544       begin_offset = 0;
7545       // Record symbol information.
7546       this->insert_irelative_data(
7547           IRelative_data(symtab->get_sized_symbol<32>(gsym)));
7548     }
7549   else
7550     {
7551       entry_count = &this->count_;
7552       got = this->got_plt_;
7553       // Note that for normal plt entries, when setting the PLT offset we skip
7554       // the initial reserved PLT entry.
7555       begin_offset = this->first_plt_entry_offset();
7556     }
7557
7558   gsym->set_plt_offset(begin_offset
7559                        + (*entry_count) * this->get_plt_entry_size());
7560
7561   ++(*entry_count);
7562
7563   section_offset_type got_offset = got->current_data_size();
7564
7565   // Every PLT entry needs a GOT entry which points back to the PLT
7566   // entry (this will be changed by the dynamic linker, normally
7567   // lazily when the function is called).
7568   got->set_current_data_size(got_offset + 4);
7569
7570   // Every PLT entry needs a reloc.
7571   this->add_relocation(symtab, layout, gsym, got_offset);
7572
7573   // Note that we don't need to save the symbol.  The contents of the
7574   // PLT are independent of which symbols are used.  The symbols only
7575   // appear in the relocations.
7576 }
7577
7578 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.  Return
7579 // the PLT offset.
7580
7581 template<bool big_endian>
7582 unsigned int
7583 Output_data_plt_arm<big_endian>::add_local_ifunc_entry(
7584     Symbol_table* symtab,
7585     Layout* layout,
7586     Sized_relobj_file<32, big_endian>* relobj,
7587     unsigned int local_sym_index)
7588 {
7589   this->insert_irelative_data(IRelative_data(relobj, local_sym_index));
7590
7591   // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7592   // no longer correct. Use target->plt_address_for_local() instead.
7593   unsigned int plt_offset = this->irelative_count_ * this->get_plt_entry_size();
7594   ++this->irelative_count_;
7595
7596   section_offset_type got_offset = this->got_irelative_->current_data_size();
7597
7598   // Every PLT entry needs a GOT entry which points back to the PLT
7599   // entry.
7600   this->got_irelative_->set_current_data_size(got_offset + 4);
7601
7602
7603   // Every PLT entry needs a reloc.
7604   Reloc_section* rel = this->rel_irelative(symtab, layout);
7605   rel->add_symbolless_local_addend(relobj, local_sym_index,
7606                                    elfcpp::R_ARM_IRELATIVE,
7607                                    this->got_irelative_, got_offset);
7608   return plt_offset;
7609 }
7610
7611
7612 // Add the relocation for a PLT entry.
7613
7614 template<bool big_endian>
7615 void
7616 Output_data_plt_arm<big_endian>::add_relocation(
7617     Symbol_table* symtab, Layout* layout, Symbol* gsym, unsigned int got_offset)
7618 {
7619   if (gsym->type() == elfcpp::STT_GNU_IFUNC
7620       && gsym->can_use_relative_reloc(false))
7621     {
7622       Reloc_section* rel = this->rel_irelative(symtab, layout);
7623       rel->add_symbolless_global_addend(gsym, elfcpp::R_ARM_IRELATIVE,
7624                                         this->got_irelative_, got_offset);
7625     }
7626   else
7627     {
7628       gsym->set_needs_dynsym_entry();
7629       this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
7630                              got_offset);
7631     }
7632 }
7633
7634
7635 // Create the irelative relocation data.
7636
7637 template<bool big_endian>
7638 typename Output_data_plt_arm<big_endian>::Reloc_section*
7639 Output_data_plt_arm<big_endian>::rel_irelative(Symbol_table* symtab,
7640                                                 Layout* layout)
7641 {
7642   if (this->irelative_rel_ == NULL)
7643     {
7644       // Since irelative relocations goes into 'rel.dyn', we delegate the
7645       // creation of irelative_rel_ to where rel_dyn section gets created.
7646       Target_arm<big_endian>* arm_target =
7647           Target_arm<big_endian>::default_target();
7648       this->irelative_rel_ = arm_target->rel_irelative_section(layout);
7649
7650       // Make sure we have a place for the TLSDESC relocations, in
7651       // case we see any later on.
7652       // this->rel_tlsdesc(layout);
7653       if (parameters->doing_static_link())
7654         {
7655           // A statically linked executable will only have a .rel.plt section to
7656           // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols.  The library
7657           // will use these symbols to locate the IRELATIVE relocs at program
7658           // startup time.
7659           symtab->define_in_output_data("__rel_iplt_start", NULL,
7660                                         Symbol_table::PREDEFINED,
7661                                         this->irelative_rel_, 0, 0,
7662                                         elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7663                                         elfcpp::STV_HIDDEN, 0, false, true);
7664           symtab->define_in_output_data("__rel_iplt_end", NULL,
7665                                         Symbol_table::PREDEFINED,
7666                                         this->irelative_rel_, 0, 0,
7667                                         elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7668                                         elfcpp::STV_HIDDEN, 0, true, true);
7669         }
7670     }
7671   return this->irelative_rel_;
7672 }
7673
7674
7675 // Return the PLT address for a global symbol.
7676
7677 template<bool big_endian>
7678 uint32_t
7679 Output_data_plt_arm<big_endian>::address_for_global(const Symbol* gsym) const
7680 {
7681   uint64_t begin_offset = 0;
7682   if (gsym->type() == elfcpp::STT_GNU_IFUNC
7683       && gsym->can_use_relative_reloc(false))
7684     {
7685       begin_offset = (this->first_plt_entry_offset() +
7686                       this->count_ * this->get_plt_entry_size());
7687     }
7688   return this->address() + begin_offset + gsym->plt_offset();
7689 }
7690
7691
7692 // Return the PLT address for a local symbol.  These are always
7693 // IRELATIVE relocs.
7694
7695 template<bool big_endian>
7696 uint32_t
7697 Output_data_plt_arm<big_endian>::address_for_local(
7698     const Relobj* object,
7699     unsigned int r_sym) const
7700 {
7701   return (this->address()
7702           + this->first_plt_entry_offset()
7703           + this->count_ * this->get_plt_entry_size()
7704           + object->local_plt_offset(r_sym));
7705 }
7706
7707
7708 template<bool big_endian>
7709 class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian>
7710 {
7711  public:
7712   Output_data_plt_arm_standard(Layout* layout,
7713                                Arm_output_data_got<big_endian>* got,
7714                                Output_data_space* got_plt,
7715                                Output_data_space* got_irelative)
7716     : Output_data_plt_arm<big_endian>(layout, 4, got, got_plt, got_irelative)
7717   { }
7718
7719  protected:
7720   // Return the offset of the first non-reserved PLT entry.
7721   virtual unsigned int
7722   do_first_plt_entry_offset() const
7723   { return sizeof(first_plt_entry); }
7724
7725   // Return the size of a PLT entry.
7726   virtual unsigned int
7727   do_get_plt_entry_size() const
7728   { return sizeof(plt_entry); }
7729
7730   virtual void
7731   do_fill_first_plt_entry(unsigned char* pov,
7732                           Arm_address got_address,
7733                           Arm_address plt_address);
7734
7735   virtual void
7736   do_fill_plt_entry(unsigned char* pov,
7737                     Arm_address got_address,
7738                     Arm_address plt_address,
7739                     unsigned int got_offset,
7740                     unsigned int plt_offset);
7741
7742  private:
7743   // Template for the first PLT entry.
7744   static const uint32_t first_plt_entry[5];
7745
7746   // Template for subsequent PLT entries.
7747   static const uint32_t plt_entry[3];
7748 };
7749
7750 // ARM PLTs.
7751 // FIXME:  This is not very flexible.  Right now this has only been tested
7752 // on armv5te.  If we are to support additional architecture features like
7753 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7754
7755 // The first entry in the PLT.
7756 template<bool big_endian>
7757 const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] =
7758 {
7759   0xe52de004,   // str   lr, [sp, #-4]!
7760   0xe59fe004,   // ldr   lr, [pc, #4]
7761   0xe08fe00e,   // add   lr, pc, lr
7762   0xe5bef008,   // ldr   pc, [lr, #8]!
7763   0x00000000,   // &GOT[0] - .
7764 };
7765
7766 template<bool big_endian>
7767 void
7768 Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
7769     unsigned char* pov,
7770     Arm_address got_address,
7771     Arm_address plt_address)
7772 {
7773   // Write first PLT entry.  All but the last word are constants.
7774   const size_t num_first_plt_words = (sizeof(first_plt_entry)
7775                                       / sizeof(plt_entry[0]));
7776   for (size_t i = 0; i < num_first_plt_words - 1; i++)
7777     elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
7778   // Last word in first PLT entry is &GOT[0] - .
7779   elfcpp::Swap<32, big_endian>::writeval(pov + 16,
7780                                          got_address - (plt_address + 16));
7781 }
7782
7783 // Subsequent entries in the PLT.
7784
7785 template<bool big_endian>
7786 const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] =
7787 {
7788   0xe28fc600,   // add   ip, pc, #0xNN00000
7789   0xe28cca00,   // add   ip, ip, #0xNN000
7790   0xe5bcf000,   // ldr   pc, [ip, #0xNNN]!
7791 };
7792
7793 template<bool big_endian>
7794 void
7795 Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
7796     unsigned char* pov,
7797     Arm_address got_address,
7798     Arm_address plt_address,
7799     unsigned int got_offset,
7800     unsigned int plt_offset)
7801 {
7802   int32_t offset = ((got_address + got_offset)
7803                     - (plt_address + plt_offset + 8));
7804
7805   gold_assert(offset >= 0 && offset < 0x0fffffff);
7806   uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
7807   elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
7808   uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
7809   elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
7810   uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
7811   elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
7812 }
7813
7814 // Write out the PLT.  This uses the hand-coded instructions above,
7815 // and adjusts them as needed.  This is all specified by the arm ELF
7816 // Processor Supplement.
7817
7818 template<bool big_endian>
7819 void
7820 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
7821 {
7822   const off_t offset = this->offset();
7823   const section_size_type oview_size =
7824     convert_to_section_size_type(this->data_size());
7825   unsigned char* const oview = of->get_output_view(offset, oview_size);
7826
7827   const off_t got_file_offset = this->got_plt_->offset();
7828   gold_assert(got_file_offset + this->got_plt_->data_size()
7829               == this->got_irelative_->offset());
7830   const section_size_type got_size =
7831     convert_to_section_size_type(this->got_plt_->data_size()
7832                                  + this->got_irelative_->data_size());
7833   unsigned char* const got_view = of->get_output_view(got_file_offset,
7834                                                       got_size);
7835   unsigned char* pov = oview;
7836
7837   Arm_address plt_address = this->address();
7838   Arm_address got_address = this->got_plt_->address();
7839
7840   // Write first PLT entry.
7841   this->fill_first_plt_entry(pov, got_address, plt_address);
7842   pov += this->first_plt_entry_offset();
7843
7844   unsigned char* got_pov = got_view;
7845
7846   memset(got_pov, 0, 12);
7847   got_pov += 12;
7848
7849   unsigned int plt_offset = this->first_plt_entry_offset();
7850   unsigned int got_offset = 12;
7851   const unsigned int count = this->count_ + this->irelative_count_;
7852   gold_assert(this->irelative_count_ == this->irelative_data_vec_.size());
7853   for (unsigned int i = 0;
7854        i < count;
7855        ++i,
7856          pov += this->get_plt_entry_size(),
7857          got_pov += 4,
7858          plt_offset += this->get_plt_entry_size(),
7859          got_offset += 4)
7860     {
7861       // Set and adjust the PLT entry itself.
7862       this->fill_plt_entry(pov, got_address, plt_address,
7863                            got_offset, plt_offset);
7864
7865       Arm_address value;
7866       if (i < this->count_)
7867         {
7868           // For non-irelative got entries, the value is the beginning of plt.
7869           value = plt_address;
7870         }
7871       else
7872         {
7873           // For irelative got entries, the value is the (global/local) symbol
7874           // address.
7875           const IRelative_data& idata =
7876               this->irelative_data_vec_[i - this->count_];
7877           if (idata.symbol_is_global_)
7878             {
7879               // Set the entry in the GOT for irelative symbols.  The content is
7880               // the address of the ifunc, not the address of plt start.
7881               const Sized_symbol<32>* sized_symbol = idata.u_.global;
7882               gold_assert(sized_symbol->type() == elfcpp::STT_GNU_IFUNC);
7883               value = sized_symbol->value();
7884             }
7885           else
7886             {
7887               value = idata.u_.local.relobj->local_symbol_value(
7888                   idata.u_.local.index, 0);
7889             }
7890         }
7891       elfcpp::Swap<32, big_endian>::writeval(got_pov, value);
7892     }
7893
7894   gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
7895   gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
7896
7897   of->write_output_view(offset, oview_size, oview);
7898   of->write_output_view(got_file_offset, got_size, got_view);
7899 }
7900
7901
7902 // Create a PLT entry for a global symbol.
7903
7904 template<bool big_endian>
7905 void
7906 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
7907                                        Symbol* gsym)
7908 {
7909   if (gsym->has_plt_offset())
7910     return;
7911
7912   if (this->plt_ == NULL)
7913     this->make_plt_section(symtab, layout);
7914
7915   this->plt_->add_entry(symtab, layout, gsym);
7916 }
7917
7918
7919 // Create the PLT section.
7920 template<bool big_endian>
7921 void
7922 Target_arm<big_endian>::make_plt_section(
7923   Symbol_table* symtab, Layout* layout)
7924 {
7925   if (this->plt_ == NULL)
7926     {
7927       // Create the GOT section first.
7928       this->got_section(symtab, layout);
7929
7930       // GOT for irelatives is create along with got.plt.
7931       gold_assert(this->got_ != NULL
7932                   && this->got_plt_ != NULL
7933                   && this->got_irelative_ != NULL);
7934       this->plt_ = this->make_data_plt(layout, this->got_, this->got_plt_,
7935                                        this->got_irelative_);
7936
7937       layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
7938                                       (elfcpp::SHF_ALLOC
7939                                        | elfcpp::SHF_EXECINSTR),
7940                                       this->plt_, ORDER_PLT, false);
7941     }
7942 }
7943
7944
7945 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
7946
7947 template<bool big_endian>
7948 void
7949 Target_arm<big_endian>::make_local_ifunc_plt_entry(
7950     Symbol_table* symtab, Layout* layout,
7951     Sized_relobj_file<32, big_endian>* relobj,
7952     unsigned int local_sym_index)
7953 {
7954   if (relobj->local_has_plt_offset(local_sym_index))
7955     return;
7956   if (this->plt_ == NULL)
7957     this->make_plt_section(symtab, layout);
7958   unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout,
7959                                                               relobj,
7960                                                               local_sym_index);
7961   relobj->set_local_plt_offset(local_sym_index, plt_offset);
7962 }
7963
7964
7965 // Return the number of entries in the PLT.
7966
7967 template<bool big_endian>
7968 unsigned int
7969 Target_arm<big_endian>::plt_entry_count() const
7970 {
7971   if (this->plt_ == NULL)
7972     return 0;
7973   return this->plt_->entry_count();
7974 }
7975
7976 // Return the offset of the first non-reserved PLT entry.
7977
7978 template<bool big_endian>
7979 unsigned int
7980 Target_arm<big_endian>::first_plt_entry_offset() const
7981 {
7982   return this->plt_->first_plt_entry_offset();
7983 }
7984
7985 // Return the size of each PLT entry.
7986
7987 template<bool big_endian>
7988 unsigned int
7989 Target_arm<big_endian>::plt_entry_size() const
7990 {
7991   return this->plt_->get_plt_entry_size();
7992 }
7993
7994 // Get the section to use for TLS_DESC relocations.
7995
7996 template<bool big_endian>
7997 typename Target_arm<big_endian>::Reloc_section*
7998 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const
7999 {
8000   return this->plt_section()->rel_tls_desc(layout);
8001 }
8002
8003 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8004
8005 template<bool big_endian>
8006 void
8007 Target_arm<big_endian>::define_tls_base_symbol(
8008     Symbol_table* symtab,
8009     Layout* layout)
8010 {
8011   if (this->tls_base_symbol_defined_)
8012     return;
8013
8014   Output_segment* tls_segment = layout->tls_segment();
8015   if (tls_segment != NULL)
8016     {
8017       bool is_exec = parameters->options().output_is_executable();
8018       symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL,
8019                                        Symbol_table::PREDEFINED,
8020                                        tls_segment, 0, 0,
8021                                        elfcpp::STT_TLS,
8022                                        elfcpp::STB_LOCAL,
8023                                        elfcpp::STV_HIDDEN, 0,
8024                                        (is_exec
8025                                         ? Symbol::SEGMENT_END
8026                                         : Symbol::SEGMENT_START),
8027                                        true);
8028     }
8029   this->tls_base_symbol_defined_ = true;
8030 }
8031
8032 // Create a GOT entry for the TLS module index.
8033
8034 template<bool big_endian>
8035 unsigned int
8036 Target_arm<big_endian>::got_mod_index_entry(
8037     Symbol_table* symtab,
8038     Layout* layout,
8039     Sized_relobj_file<32, big_endian>* object)
8040 {
8041   if (this->got_mod_index_offset_ == -1U)
8042     {
8043       gold_assert(symtab != NULL && layout != NULL && object != NULL);
8044       Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout);
8045       unsigned int got_offset;
8046       if (!parameters->doing_static_link())
8047         {
8048           got_offset = got->add_constant(0);
8049           Reloc_section* rel_dyn = this->rel_dyn_section(layout);
8050           rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got,
8051                              got_offset);
8052         }
8053       else
8054         {
8055           // We are doing a static link.  Just mark it as belong to module 1,
8056           // the executable.
8057           got_offset = got->add_constant(1);
8058         }
8059
8060       got->add_constant(0);
8061       this->got_mod_index_offset_ = got_offset;
8062     }
8063   return this->got_mod_index_offset_;
8064 }
8065
8066 // Optimize the TLS relocation type based on what we know about the
8067 // symbol.  IS_FINAL is true if the final address of this symbol is
8068 // known at link time.
8069
8070 template<bool big_endian>
8071 tls::Tls_optimization
8072 Target_arm<big_endian>::optimize_tls_reloc(bool, int)
8073 {
8074   // FIXME: Currently we do not do any TLS optimization.
8075   return tls::TLSOPT_NONE;
8076 }
8077
8078 // Get the Reference_flags for a particular relocation.
8079
8080 template<bool big_endian>
8081 int
8082 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type)
8083 {
8084   switch (r_type)
8085     {
8086     case elfcpp::R_ARM_NONE:
8087     case elfcpp::R_ARM_V4BX:
8088     case elfcpp::R_ARM_GNU_VTENTRY:
8089     case elfcpp::R_ARM_GNU_VTINHERIT:
8090       // No symbol reference.
8091       return 0;
8092
8093     case elfcpp::R_ARM_ABS32:
8094     case elfcpp::R_ARM_ABS16:
8095     case elfcpp::R_ARM_ABS12:
8096     case elfcpp::R_ARM_THM_ABS5:
8097     case elfcpp::R_ARM_ABS8:
8098     case elfcpp::R_ARM_BASE_ABS:
8099     case elfcpp::R_ARM_MOVW_ABS_NC:
8100     case elfcpp::R_ARM_MOVT_ABS:
8101     case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8102     case elfcpp::R_ARM_THM_MOVT_ABS:
8103     case elfcpp::R_ARM_ABS32_NOI:
8104       return Symbol::ABSOLUTE_REF;
8105
8106     case elfcpp::R_ARM_REL32:
8107     case elfcpp::R_ARM_LDR_PC_G0:
8108     case elfcpp::R_ARM_SBREL32:
8109     case elfcpp::R_ARM_THM_PC8:
8110     case elfcpp::R_ARM_BASE_PREL:
8111     case elfcpp::R_ARM_MOVW_PREL_NC:
8112     case elfcpp::R_ARM_MOVT_PREL:
8113     case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8114     case elfcpp::R_ARM_THM_MOVT_PREL:
8115     case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8116     case elfcpp::R_ARM_THM_PC12:
8117     case elfcpp::R_ARM_REL32_NOI:
8118     case elfcpp::R_ARM_ALU_PC_G0_NC:
8119     case elfcpp::R_ARM_ALU_PC_G0:
8120     case elfcpp::R_ARM_ALU_PC_G1_NC:
8121     case elfcpp::R_ARM_ALU_PC_G1:
8122     case elfcpp::R_ARM_ALU_PC_G2:
8123     case elfcpp::R_ARM_LDR_PC_G1:
8124     case elfcpp::R_ARM_LDR_PC_G2:
8125     case elfcpp::R_ARM_LDRS_PC_G0:
8126     case elfcpp::R_ARM_LDRS_PC_G1:
8127     case elfcpp::R_ARM_LDRS_PC_G2:
8128     case elfcpp::R_ARM_LDC_PC_G0:
8129     case elfcpp::R_ARM_LDC_PC_G1:
8130     case elfcpp::R_ARM_LDC_PC_G2:
8131     case elfcpp::R_ARM_ALU_SB_G0_NC:
8132     case elfcpp::R_ARM_ALU_SB_G0:
8133     case elfcpp::R_ARM_ALU_SB_G1_NC:
8134     case elfcpp::R_ARM_ALU_SB_G1:
8135     case elfcpp::R_ARM_ALU_SB_G2:
8136     case elfcpp::R_ARM_LDR_SB_G0:
8137     case elfcpp::R_ARM_LDR_SB_G1:
8138     case elfcpp::R_ARM_LDR_SB_G2:
8139     case elfcpp::R_ARM_LDRS_SB_G0:
8140     case elfcpp::R_ARM_LDRS_SB_G1:
8141     case elfcpp::R_ARM_LDRS_SB_G2:
8142     case elfcpp::R_ARM_LDC_SB_G0:
8143     case elfcpp::R_ARM_LDC_SB_G1:
8144     case elfcpp::R_ARM_LDC_SB_G2:
8145     case elfcpp::R_ARM_MOVW_BREL_NC:
8146     case elfcpp::R_ARM_MOVT_BREL:
8147     case elfcpp::R_ARM_MOVW_BREL:
8148     case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8149     case elfcpp::R_ARM_THM_MOVT_BREL:
8150     case elfcpp::R_ARM_THM_MOVW_BREL:
8151     case elfcpp::R_ARM_GOTOFF32:
8152     case elfcpp::R_ARM_GOTOFF12:
8153     case elfcpp::R_ARM_SBREL31:
8154       return Symbol::RELATIVE_REF;
8155
8156     case elfcpp::R_ARM_PLT32:
8157     case elfcpp::R_ARM_CALL:
8158     case elfcpp::R_ARM_JUMP24:
8159     case elfcpp::R_ARM_THM_CALL:
8160     case elfcpp::R_ARM_THM_JUMP24:
8161     case elfcpp::R_ARM_THM_JUMP19:
8162     case elfcpp::R_ARM_THM_JUMP6:
8163     case elfcpp::R_ARM_THM_JUMP11:
8164     case elfcpp::R_ARM_THM_JUMP8:
8165     // R_ARM_PREL31 is not used to relocate call/jump instructions but
8166     // in unwind tables. It may point to functions via PLTs.
8167     // So we treat it like call/jump relocations above.
8168     case elfcpp::R_ARM_PREL31:
8169       return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
8170
8171     case elfcpp::R_ARM_GOT_BREL:
8172     case elfcpp::R_ARM_GOT_ABS:
8173     case elfcpp::R_ARM_GOT_PREL:
8174       // Absolute in GOT.
8175       return Symbol::ABSOLUTE_REF;
8176
8177     case elfcpp::R_ARM_TLS_GD32:        // Global-dynamic
8178     case elfcpp::R_ARM_TLS_LDM32:       // Local-dynamic
8179     case elfcpp::R_ARM_TLS_LDO32:       // Alternate local-dynamic
8180     case elfcpp::R_ARM_TLS_IE32:        // Initial-exec
8181     case elfcpp::R_ARM_TLS_LE32:        // Local-exec
8182       return Symbol::TLS_REF;
8183
8184     case elfcpp::R_ARM_TARGET1:
8185     case elfcpp::R_ARM_TARGET2:
8186     case elfcpp::R_ARM_COPY:
8187     case elfcpp::R_ARM_GLOB_DAT:
8188     case elfcpp::R_ARM_JUMP_SLOT:
8189     case elfcpp::R_ARM_RELATIVE:
8190     case elfcpp::R_ARM_PC24:
8191     case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8192     case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8193     case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8194     default:
8195       // Not expected.  We will give an error later.
8196       return 0;
8197     }
8198 }
8199
8200 // Report an unsupported relocation against a local symbol.
8201
8202 template<bool big_endian>
8203 void
8204 Target_arm<big_endian>::Scan::unsupported_reloc_local(
8205     Sized_relobj_file<32, big_endian>* object,
8206     unsigned int r_type)
8207 {
8208   gold_error(_("%s: unsupported reloc %u against local symbol"),
8209              object->name().c_str(), r_type);
8210 }
8211
8212 // We are about to emit a dynamic relocation of type R_TYPE.  If the
8213 // dynamic linker does not support it, issue an error.  The GNU linker
8214 // only issues a non-PIC error for an allocated read-only section.
8215 // Here we know the section is allocated, but we don't know that it is
8216 // read-only.  But we check for all the relocation types which the
8217 // glibc dynamic linker supports, so it seems appropriate to issue an
8218 // error even if the section is not read-only.
8219
8220 template<bool big_endian>
8221 void
8222 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
8223                                             unsigned int r_type)
8224 {
8225   switch (r_type)
8226     {
8227     // These are the relocation types supported by glibc for ARM.
8228     case elfcpp::R_ARM_RELATIVE:
8229     case elfcpp::R_ARM_COPY:
8230     case elfcpp::R_ARM_GLOB_DAT:
8231     case elfcpp::R_ARM_JUMP_SLOT:
8232     case elfcpp::R_ARM_ABS32:
8233     case elfcpp::R_ARM_ABS32_NOI:
8234     case elfcpp::R_ARM_IRELATIVE:
8235     case elfcpp::R_ARM_PC24:
8236     // FIXME: The following 3 types are not supported by Android's dynamic
8237     // linker.
8238     case elfcpp::R_ARM_TLS_DTPMOD32:
8239     case elfcpp::R_ARM_TLS_DTPOFF32:
8240     case elfcpp::R_ARM_TLS_TPOFF32:
8241       return;
8242
8243     default:
8244       {
8245         // This prevents us from issuing more than one error per reloc
8246         // section.  But we can still wind up issuing more than one
8247         // error per object file.
8248         if (this->issued_non_pic_error_)
8249           return;
8250         const Arm_reloc_property* reloc_property =
8251           arm_reloc_property_table->get_reloc_property(r_type);
8252         gold_assert(reloc_property != NULL);
8253         object->error(_("requires unsupported dynamic reloc %s; "
8254                       "recompile with -fPIC"),
8255                       reloc_property->name().c_str());
8256         this->issued_non_pic_error_ = true;
8257         return;
8258       }
8259
8260     case elfcpp::R_ARM_NONE:
8261       gold_unreachable();
8262     }
8263 }
8264
8265
8266 // Return whether we need to make a PLT entry for a relocation of the
8267 // given type against a STT_GNU_IFUNC symbol.
8268
8269 template<bool big_endian>
8270 bool
8271 Target_arm<big_endian>::Scan::reloc_needs_plt_for_ifunc(
8272     Sized_relobj_file<32, big_endian>* object,
8273     unsigned int r_type)
8274 {
8275   int flags = Scan::get_reference_flags(r_type);
8276   if (flags & Symbol::TLS_REF)
8277     {
8278       gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8279                  object->name().c_str(), r_type);
8280       return false;
8281     }
8282   return flags != 0;
8283 }
8284
8285
8286 // Scan a relocation for a local symbol.
8287 // FIXME: This only handles a subset of relocation types used by Android
8288 // on ARM v5te devices.
8289
8290 template<bool big_endian>
8291 inline void
8292 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
8293                                     Layout* layout,
8294                                     Target_arm* target,
8295                                     Sized_relobj_file<32, big_endian>* object,
8296                                     unsigned int data_shndx,
8297                                     Output_section* output_section,
8298                                     const elfcpp::Rel<32, big_endian>& reloc,
8299                                     unsigned int r_type,
8300                                     const elfcpp::Sym<32, big_endian>& lsym,
8301                                     bool is_discarded)
8302 {
8303   if (is_discarded)
8304     return;
8305
8306   r_type = get_real_reloc_type(r_type);
8307
8308   // A local STT_GNU_IFUNC symbol may require a PLT entry.
8309   bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC;
8310   if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type))
8311     {
8312       unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8313       target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym);
8314     }
8315
8316   switch (r_type)
8317     {
8318     case elfcpp::R_ARM_NONE:
8319     case elfcpp::R_ARM_V4BX:
8320     case elfcpp::R_ARM_GNU_VTENTRY:
8321     case elfcpp::R_ARM_GNU_VTINHERIT:
8322       break;
8323
8324     case elfcpp::R_ARM_ABS32:
8325     case elfcpp::R_ARM_ABS32_NOI:
8326       // If building a shared library (or a position-independent
8327       // executable), we need to create a dynamic relocation for
8328       // this location. The relocation applied at link time will
8329       // apply the link-time value, so we flag the location with
8330       // an R_ARM_RELATIVE relocation so the dynamic loader can
8331       // relocate it easily.
8332       if (parameters->options().output_is_position_independent())
8333         {
8334           Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8335           unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8336           // If we are to add more other reloc types than R_ARM_ABS32,
8337           // we need to add check_non_pic(object, r_type) here.
8338           rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
8339                                       output_section, data_shndx,
8340                                       reloc.get_r_offset(), is_ifunc);
8341         }
8342       break;
8343
8344     case elfcpp::R_ARM_ABS16:
8345     case elfcpp::R_ARM_ABS12:
8346     case elfcpp::R_ARM_THM_ABS5:
8347     case elfcpp::R_ARM_ABS8:
8348     case elfcpp::R_ARM_BASE_ABS:
8349     case elfcpp::R_ARM_MOVW_ABS_NC:
8350     case elfcpp::R_ARM_MOVT_ABS:
8351     case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8352     case elfcpp::R_ARM_THM_MOVT_ABS:
8353       // If building a shared library (or a position-independent
8354       // executable), we need to create a dynamic relocation for
8355       // this location. Because the addend needs to remain in the
8356       // data section, we need to be careful not to apply this
8357       // relocation statically.
8358       if (parameters->options().output_is_position_independent())
8359         {
8360           check_non_pic(object, r_type);
8361           Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8362           unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8363           if (lsym.get_st_type() != elfcpp::STT_SECTION)
8364             rel_dyn->add_local(object, r_sym, r_type, output_section,
8365                                data_shndx, reloc.get_r_offset());
8366           else
8367             {
8368               gold_assert(lsym.get_st_value() == 0);
8369               unsigned int shndx = lsym.get_st_shndx();
8370               bool is_ordinary;
8371               shndx = object->adjust_sym_shndx(r_sym, shndx,
8372                                                &is_ordinary);
8373               if (!is_ordinary)
8374                 object->error(_("section symbol %u has bad shndx %u"),
8375                               r_sym, shndx);
8376               else
8377                 rel_dyn->add_local_section(object, shndx,
8378                                            r_type, output_section,
8379                                            data_shndx, reloc.get_r_offset());
8380             }
8381         }
8382       break;
8383
8384     case elfcpp::R_ARM_REL32:
8385     case elfcpp::R_ARM_LDR_PC_G0:
8386     case elfcpp::R_ARM_SBREL32:
8387     case elfcpp::R_ARM_THM_CALL:
8388     case elfcpp::R_ARM_THM_PC8:
8389     case elfcpp::R_ARM_BASE_PREL:
8390     case elfcpp::R_ARM_PLT32:
8391     case elfcpp::R_ARM_CALL:
8392     case elfcpp::R_ARM_JUMP24:
8393     case elfcpp::R_ARM_THM_JUMP24:
8394     case elfcpp::R_ARM_SBREL31:
8395     case elfcpp::R_ARM_PREL31:
8396     case elfcpp::R_ARM_MOVW_PREL_NC:
8397     case elfcpp::R_ARM_MOVT_PREL:
8398     case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8399     case elfcpp::R_ARM_THM_MOVT_PREL:
8400     case elfcpp::R_ARM_THM_JUMP19:
8401     case elfcpp::R_ARM_THM_JUMP6:
8402     case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8403     case elfcpp::R_ARM_THM_PC12:
8404     case elfcpp::R_ARM_REL32_NOI:
8405     case elfcpp::R_ARM_ALU_PC_G0_NC:
8406     case elfcpp::R_ARM_ALU_PC_G0:
8407     case elfcpp::R_ARM_ALU_PC_G1_NC:
8408     case elfcpp::R_ARM_ALU_PC_G1:
8409     case elfcpp::R_ARM_ALU_PC_G2:
8410     case elfcpp::R_ARM_LDR_PC_G1:
8411     case elfcpp::R_ARM_LDR_PC_G2:
8412     case elfcpp::R_ARM_LDRS_PC_G0:
8413     case elfcpp::R_ARM_LDRS_PC_G1:
8414     case elfcpp::R_ARM_LDRS_PC_G2:
8415     case elfcpp::R_ARM_LDC_PC_G0:
8416     case elfcpp::R_ARM_LDC_PC_G1:
8417     case elfcpp::R_ARM_LDC_PC_G2:
8418     case elfcpp::R_ARM_ALU_SB_G0_NC:
8419     case elfcpp::R_ARM_ALU_SB_G0:
8420     case elfcpp::R_ARM_ALU_SB_G1_NC:
8421     case elfcpp::R_ARM_ALU_SB_G1:
8422     case elfcpp::R_ARM_ALU_SB_G2:
8423     case elfcpp::R_ARM_LDR_SB_G0:
8424     case elfcpp::R_ARM_LDR_SB_G1:
8425     case elfcpp::R_ARM_LDR_SB_G2:
8426     case elfcpp::R_ARM_LDRS_SB_G0:
8427     case elfcpp::R_ARM_LDRS_SB_G1:
8428     case elfcpp::R_ARM_LDRS_SB_G2:
8429     case elfcpp::R_ARM_LDC_SB_G0:
8430     case elfcpp::R_ARM_LDC_SB_G1:
8431     case elfcpp::R_ARM_LDC_SB_G2:
8432     case elfcpp::R_ARM_MOVW_BREL_NC:
8433     case elfcpp::R_ARM_MOVT_BREL:
8434     case elfcpp::R_ARM_MOVW_BREL:
8435     case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8436     case elfcpp::R_ARM_THM_MOVT_BREL:
8437     case elfcpp::R_ARM_THM_MOVW_BREL:
8438     case elfcpp::R_ARM_THM_JUMP11:
8439     case elfcpp::R_ARM_THM_JUMP8:
8440       // We don't need to do anything for a relative addressing relocation
8441       // against a local symbol if it does not reference the GOT.
8442       break;
8443
8444     case elfcpp::R_ARM_GOTOFF32:
8445     case elfcpp::R_ARM_GOTOFF12:
8446       // We need a GOT section:
8447       target->got_section(symtab, layout);
8448       break;
8449
8450     case elfcpp::R_ARM_GOT_BREL:
8451     case elfcpp::R_ARM_GOT_PREL:
8452       {
8453         // The symbol requires a GOT entry.
8454         Arm_output_data_got<big_endian>* got =
8455           target->got_section(symtab, layout);
8456         unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8457         if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
8458           {
8459             // If we are generating a shared object, we need to add a
8460             // dynamic RELATIVE relocation for this symbol's GOT entry.
8461             if (parameters->options().output_is_position_independent())
8462               {
8463                 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8464                 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8465                 rel_dyn->add_local_relative(
8466                     object, r_sym, elfcpp::R_ARM_RELATIVE, got,
8467                     object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
8468               }
8469           }
8470       }
8471       break;
8472
8473     case elfcpp::R_ARM_TARGET1:
8474     case elfcpp::R_ARM_TARGET2:
8475       // This should have been mapped to another type already.
8476       // Fall through.
8477     case elfcpp::R_ARM_COPY:
8478     case elfcpp::R_ARM_GLOB_DAT:
8479     case elfcpp::R_ARM_JUMP_SLOT:
8480     case elfcpp::R_ARM_RELATIVE:
8481       // These are relocations which should only be seen by the
8482       // dynamic linker, and should never be seen here.
8483       gold_error(_("%s: unexpected reloc %u in object file"),
8484                  object->name().c_str(), r_type);
8485       break;
8486
8487
8488       // These are initial TLS relocs, which are expected when
8489       // linking.
8490     case elfcpp::R_ARM_TLS_GD32:        // Global-dynamic
8491     case elfcpp::R_ARM_TLS_LDM32:       // Local-dynamic
8492     case elfcpp::R_ARM_TLS_LDO32:       // Alternate local-dynamic
8493     case elfcpp::R_ARM_TLS_IE32:        // Initial-exec
8494     case elfcpp::R_ARM_TLS_LE32:        // Local-exec
8495       {
8496         bool output_is_shared = parameters->options().shared();
8497         const tls::Tls_optimization optimized_type
8498             = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared,
8499                                                          r_type);
8500         switch (r_type)
8501           {
8502           case elfcpp::R_ARM_TLS_GD32:          // Global-dynamic
8503             if (optimized_type == tls::TLSOPT_NONE)
8504               {
8505                 // Create a pair of GOT entries for the module index and
8506                 // dtv-relative offset.
8507                 Arm_output_data_got<big_endian>* got
8508                     = target->got_section(symtab, layout);
8509                 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8510                 unsigned int shndx = lsym.get_st_shndx();
8511                 bool is_ordinary;
8512                 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
8513                 if (!is_ordinary)
8514                   {
8515                     object->error(_("local symbol %u has bad shndx %u"),
8516                                   r_sym, shndx);
8517                     break;
8518                   }
8519
8520                 if (!parameters->doing_static_link())
8521                   got->add_local_pair_with_rel(object, r_sym, shndx,
8522                                                GOT_TYPE_TLS_PAIR,
8523                                                target->rel_dyn_section(layout),
8524                                                elfcpp::R_ARM_TLS_DTPMOD32);
8525                 else
8526                   got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR,
8527                                                       object, r_sym);
8528               }
8529             else
8530               // FIXME: TLS optimization not supported yet.
8531               gold_unreachable();
8532             break;
8533
8534           case elfcpp::R_ARM_TLS_LDM32:         // Local-dynamic
8535             if (optimized_type == tls::TLSOPT_NONE)
8536               {
8537                 // Create a GOT entry for the module index.
8538                 target->got_mod_index_entry(symtab, layout, object);
8539               }
8540             else
8541               // FIXME: TLS optimization not supported yet.
8542               gold_unreachable();
8543             break;
8544
8545           case elfcpp::R_ARM_TLS_LDO32:         // Alternate local-dynamic
8546             break;
8547
8548           case elfcpp::R_ARM_TLS_IE32:          // Initial-exec
8549             layout->set_has_static_tls();
8550             if (optimized_type == tls::TLSOPT_NONE)
8551               {
8552                 // Create a GOT entry for the tp-relative offset.
8553                 Arm_output_data_got<big_endian>* got
8554                   = target->got_section(symtab, layout);
8555                 unsigned int r_sym =
8556                    elfcpp::elf_r_sym<32>(reloc.get_r_info());
8557                 if (!parameters->doing_static_link())
8558                     got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET,
8559                                             target->rel_dyn_section(layout),
8560                                             elfcpp::R_ARM_TLS_TPOFF32);
8561                 else if (!object->local_has_got_offset(r_sym,
8562                                                        GOT_TYPE_TLS_OFFSET))
8563                   {
8564                     got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET);
8565                     unsigned int got_offset =
8566                       object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET);
8567                     got->add_static_reloc(got_offset,
8568                                           elfcpp::R_ARM_TLS_TPOFF32, object,
8569                                           r_sym);
8570                   }
8571               }
8572             else
8573               // FIXME: TLS optimization not supported yet.
8574               gold_unreachable();
8575             break;
8576
8577           case elfcpp::R_ARM_TLS_LE32:          // Local-exec
8578             layout->set_has_static_tls();
8579             if (output_is_shared)
8580               {
8581                 // We need to create a dynamic relocation.
8582                 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION);
8583                 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8584                 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8585                 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32,
8586                                    output_section, data_shndx,
8587                                    reloc.get_r_offset());
8588               }
8589             break;
8590
8591           default:
8592             gold_unreachable();
8593           }
8594       }
8595       break;
8596
8597     case elfcpp::R_ARM_PC24:
8598     case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8599     case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8600     case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8601     default:
8602       unsupported_reloc_local(object, r_type);
8603       break;
8604     }
8605 }
8606
8607 // Report an unsupported relocation against a global symbol.
8608
8609 template<bool big_endian>
8610 void
8611 Target_arm<big_endian>::Scan::unsupported_reloc_global(
8612     Sized_relobj_file<32, big_endian>* object,
8613     unsigned int r_type,
8614     Symbol* gsym)
8615 {
8616   gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8617              object->name().c_str(), r_type, gsym->demangled_name().c_str());
8618 }
8619
8620 template<bool big_endian>
8621 inline bool
8622 Target_arm<big_endian>::Scan::possible_function_pointer_reloc(
8623     unsigned int r_type)
8624 {
8625   switch (r_type)
8626     {
8627     case elfcpp::R_ARM_PC24:
8628     case elfcpp::R_ARM_THM_CALL:
8629     case elfcpp::R_ARM_PLT32:
8630     case elfcpp::R_ARM_CALL:
8631     case elfcpp::R_ARM_JUMP24:
8632     case elfcpp::R_ARM_THM_JUMP24:
8633     case elfcpp::R_ARM_SBREL31:
8634     case elfcpp::R_ARM_PREL31:
8635     case elfcpp::R_ARM_THM_JUMP19:
8636     case elfcpp::R_ARM_THM_JUMP6:
8637     case elfcpp::R_ARM_THM_JUMP11:
8638     case elfcpp::R_ARM_THM_JUMP8:
8639       // All the relocations above are branches except SBREL31 and PREL31.
8640       return false;
8641
8642     default:
8643       // Be conservative and assume this is a function pointer.
8644       return true;
8645     }
8646 }
8647
8648 template<bool big_endian>
8649 inline bool
8650 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer(
8651   Symbol_table*,
8652   Layout*,
8653   Target_arm<big_endian>* target,
8654   Sized_relobj_file<32, big_endian>*,
8655   unsigned int,
8656   Output_section*,
8657   const elfcpp::Rel<32, big_endian>&,
8658   unsigned int r_type,
8659   const elfcpp::Sym<32, big_endian>&)
8660 {
8661   r_type = target->get_real_reloc_type(r_type);
8662   return possible_function_pointer_reloc(r_type);
8663 }
8664
8665 template<bool big_endian>
8666 inline bool
8667 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer(
8668   Symbol_table*,
8669   Layout*,
8670   Target_arm<big_endian>* target,
8671   Sized_relobj_file<32, big_endian>*,
8672   unsigned int,
8673   Output_section*,
8674   const elfcpp::Rel<32, big_endian>&,
8675   unsigned int r_type,
8676   Symbol* gsym)
8677 {
8678   // GOT is not a function.
8679   if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8680     return false;
8681
8682   r_type = target->get_real_reloc_type(r_type);
8683   return possible_function_pointer_reloc(r_type);
8684 }
8685
8686 // Scan a relocation for a global symbol.
8687
8688 template<bool big_endian>
8689 inline void
8690 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
8691                                      Layout* layout,
8692                                      Target_arm* target,
8693                                      Sized_relobj_file<32, big_endian>* object,
8694                                      unsigned int data_shndx,
8695                                      Output_section* output_section,
8696                                      const elfcpp::Rel<32, big_endian>& reloc,
8697                                      unsigned int r_type,
8698                                      Symbol* gsym)
8699 {
8700   // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8701   // section.  We check here to avoid creating a dynamic reloc against
8702   // _GLOBAL_OFFSET_TABLE_.
8703   if (!target->has_got_section()
8704       && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8705     target->got_section(symtab, layout);
8706
8707   // A STT_GNU_IFUNC symbol may require a PLT entry.
8708   if (gsym->type() == elfcpp::STT_GNU_IFUNC
8709       && this->reloc_needs_plt_for_ifunc(object, r_type))
8710     target->make_plt_entry(symtab, layout, gsym);
8711
8712   r_type = get_real_reloc_type(r_type);
8713   switch (r_type)
8714     {
8715     case elfcpp::R_ARM_NONE:
8716     case elfcpp::R_ARM_V4BX:
8717     case elfcpp::R_ARM_GNU_VTENTRY:
8718     case elfcpp::R_ARM_GNU_VTINHERIT:
8719       break;
8720
8721     case elfcpp::R_ARM_ABS32:
8722     case elfcpp::R_ARM_ABS16:
8723     case elfcpp::R_ARM_ABS12:
8724     case elfcpp::R_ARM_THM_ABS5:
8725     case elfcpp::R_ARM_ABS8:
8726     case elfcpp::R_ARM_BASE_ABS:
8727     case elfcpp::R_ARM_MOVW_ABS_NC:
8728     case elfcpp::R_ARM_MOVT_ABS:
8729     case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8730     case elfcpp::R_ARM_THM_MOVT_ABS:
8731     case elfcpp::R_ARM_ABS32_NOI:
8732       // Absolute addressing relocations.
8733       {
8734         // Make a PLT entry if necessary.
8735         if (this->symbol_needs_plt_entry(gsym))
8736           {
8737             target->make_plt_entry(symtab, layout, gsym);
8738             // Since this is not a PC-relative relocation, we may be
8739             // taking the address of a function. In that case we need to
8740             // set the entry in the dynamic symbol table to the address of
8741             // the PLT entry.
8742             if (gsym->is_from_dynobj() && !parameters->options().shared())
8743               gsym->set_needs_dynsym_value();
8744           }
8745         // Make a dynamic relocation if necessary.
8746         if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8747           {
8748             if (!parameters->options().output_is_position_independent()
8749                 && gsym->may_need_copy_reloc())
8750               {
8751                 target->copy_reloc(symtab, layout, object,
8752                                    data_shndx, output_section, gsym, reloc);
8753               }
8754             else if ((r_type == elfcpp::R_ARM_ABS32
8755                       || r_type == elfcpp::R_ARM_ABS32_NOI)
8756                      && gsym->type() == elfcpp::STT_GNU_IFUNC
8757                      && gsym->can_use_relative_reloc(false)
8758                      && !gsym->is_from_dynobj()
8759                      && !gsym->is_undefined()
8760                      && !gsym->is_preemptible())
8761               {
8762                 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
8763                 // symbol. This makes a function address in a PIE executable
8764                 // match the address in a shared library that it links against.
8765                 Reloc_section* rel_irelative =
8766                     target->rel_irelative_section(layout);
8767                 unsigned int r_type = elfcpp::R_ARM_IRELATIVE;
8768                 rel_irelative->add_symbolless_global_addend(
8769                     gsym, r_type, output_section, object,
8770                     data_shndx, reloc.get_r_offset());
8771               }
8772             else if ((r_type == elfcpp::R_ARM_ABS32
8773                       || r_type == elfcpp::R_ARM_ABS32_NOI)
8774                      && gsym->can_use_relative_reloc(false))
8775               {
8776                 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8777                 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
8778                                              output_section, object,
8779                                              data_shndx, reloc.get_r_offset());
8780               }
8781             else
8782               {
8783                 check_non_pic(object, r_type);
8784                 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8785                 rel_dyn->add_global(gsym, r_type, output_section, object,
8786                                     data_shndx, reloc.get_r_offset());
8787               }
8788           }
8789       }
8790       break;
8791
8792     case elfcpp::R_ARM_GOTOFF32:
8793     case elfcpp::R_ARM_GOTOFF12:
8794       // We need a GOT section.
8795       target->got_section(symtab, layout);
8796       break;
8797
8798     case elfcpp::R_ARM_REL32:
8799     case elfcpp::R_ARM_LDR_PC_G0:
8800     case elfcpp::R_ARM_SBREL32:
8801     case elfcpp::R_ARM_THM_PC8:
8802     case elfcpp::R_ARM_BASE_PREL:
8803     case elfcpp::R_ARM_MOVW_PREL_NC:
8804     case elfcpp::R_ARM_MOVT_PREL:
8805     case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8806     case elfcpp::R_ARM_THM_MOVT_PREL:
8807     case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8808     case elfcpp::R_ARM_THM_PC12:
8809     case elfcpp::R_ARM_REL32_NOI:
8810     case elfcpp::R_ARM_ALU_PC_G0_NC:
8811     case elfcpp::R_ARM_ALU_PC_G0:
8812     case elfcpp::R_ARM_ALU_PC_G1_NC:
8813     case elfcpp::R_ARM_ALU_PC_G1:
8814     case elfcpp::R_ARM_ALU_PC_G2:
8815     case elfcpp::R_ARM_LDR_PC_G1:
8816     case elfcpp::R_ARM_LDR_PC_G2:
8817     case elfcpp::R_ARM_LDRS_PC_G0:
8818     case elfcpp::R_ARM_LDRS_PC_G1:
8819     case elfcpp::R_ARM_LDRS_PC_G2:
8820     case elfcpp::R_ARM_LDC_PC_G0:
8821     case elfcpp::R_ARM_LDC_PC_G1:
8822     case elfcpp::R_ARM_LDC_PC_G2:
8823     case elfcpp::R_ARM_ALU_SB_G0_NC:
8824     case elfcpp::R_ARM_ALU_SB_G0:
8825     case elfcpp::R_ARM_ALU_SB_G1_NC:
8826     case elfcpp::R_ARM_ALU_SB_G1:
8827     case elfcpp::R_ARM_ALU_SB_G2:
8828     case elfcpp::R_ARM_LDR_SB_G0:
8829     case elfcpp::R_ARM_LDR_SB_G1:
8830     case elfcpp::R_ARM_LDR_SB_G2:
8831     case elfcpp::R_ARM_LDRS_SB_G0:
8832     case elfcpp::R_ARM_LDRS_SB_G1:
8833     case elfcpp::R_ARM_LDRS_SB_G2:
8834     case elfcpp::R_ARM_LDC_SB_G0:
8835     case elfcpp::R_ARM_LDC_SB_G1:
8836     case elfcpp::R_ARM_LDC_SB_G2:
8837     case elfcpp::R_ARM_MOVW_BREL_NC:
8838     case elfcpp::R_ARM_MOVT_BREL:
8839     case elfcpp::R_ARM_MOVW_BREL:
8840     case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8841     case elfcpp::R_ARM_THM_MOVT_BREL:
8842     case elfcpp::R_ARM_THM_MOVW_BREL:
8843       // Relative addressing relocations.
8844       {
8845         // Make a dynamic relocation if necessary.
8846         if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8847           {
8848             if (parameters->options().output_is_executable()
8849                 && target->may_need_copy_reloc(gsym))
8850               {
8851                 target->copy_reloc(symtab, layout, object,
8852                                    data_shndx, output_section, gsym, reloc);
8853               }
8854             else
8855               {
8856                 check_non_pic(object, r_type);
8857                 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8858                 rel_dyn->add_global(gsym, r_type, output_section, object,
8859                                     data_shndx, reloc.get_r_offset());
8860               }
8861           }
8862       }
8863       break;
8864
8865     case elfcpp::R_ARM_THM_CALL:
8866     case elfcpp::R_ARM_PLT32:
8867     case elfcpp::R_ARM_CALL:
8868     case elfcpp::R_ARM_JUMP24:
8869     case elfcpp::R_ARM_THM_JUMP24:
8870     case elfcpp::R_ARM_SBREL31:
8871     case elfcpp::R_ARM_PREL31:
8872     case elfcpp::R_ARM_THM_JUMP19:
8873     case elfcpp::R_ARM_THM_JUMP6:
8874     case elfcpp::R_ARM_THM_JUMP11:
8875     case elfcpp::R_ARM_THM_JUMP8:
8876       // All the relocation above are branches except for the PREL31 ones.
8877       // A PREL31 relocation can point to a personality function in a shared
8878       // library.  In that case we want to use a PLT because we want to
8879       // call the personality routine and the dynamic linkers we care about
8880       // do not support dynamic PREL31 relocations. An REL31 relocation may
8881       // point to a function whose unwinding behaviour is being described but
8882       // we will not mistakenly generate a PLT for that because we should use
8883       // a local section symbol.
8884
8885       // If the symbol is fully resolved, this is just a relative
8886       // local reloc.  Otherwise we need a PLT entry.
8887       if (gsym->final_value_is_known())
8888         break;
8889       // If building a shared library, we can also skip the PLT entry
8890       // if the symbol is defined in the output file and is protected
8891       // or hidden.
8892       if (gsym->is_defined()
8893           && !gsym->is_from_dynobj()
8894           && !gsym->is_preemptible())
8895         break;
8896       target->make_plt_entry(symtab, layout, gsym);
8897       break;
8898
8899     case elfcpp::R_ARM_GOT_BREL:
8900     case elfcpp::R_ARM_GOT_ABS:
8901     case elfcpp::R_ARM_GOT_PREL:
8902       {
8903         // The symbol requires a GOT entry.
8904         Arm_output_data_got<big_endian>* got =
8905           target->got_section(symtab, layout);
8906         if (gsym->final_value_is_known())
8907           {
8908             // For a STT_GNU_IFUNC symbol we want the PLT address.
8909             if (gsym->type() == elfcpp::STT_GNU_IFUNC)
8910               got->add_global_plt(gsym, GOT_TYPE_STANDARD);
8911             else
8912               got->add_global(gsym, GOT_TYPE_STANDARD);
8913           }
8914         else
8915           {
8916             // If this symbol is not fully resolved, we need to add a
8917             // GOT entry with a dynamic relocation.
8918             Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8919             if (gsym->is_from_dynobj()
8920                 || gsym->is_undefined()
8921                 || gsym->is_preemptible()
8922                 || (gsym->visibility() == elfcpp::STV_PROTECTED
8923                     && parameters->options().shared())
8924                 || (gsym->type() == elfcpp::STT_GNU_IFUNC
8925                     && parameters->options().output_is_position_independent()))
8926               got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
8927                                        rel_dyn, elfcpp::R_ARM_GLOB_DAT);
8928             else
8929               {
8930                 // For a STT_GNU_IFUNC symbol we want to write the PLT
8931                 // offset into the GOT, so that function pointer
8932                 // comparisons work correctly.
8933                 bool is_new;
8934                 if (gsym->type() != elfcpp::STT_GNU_IFUNC)
8935                   is_new = got->add_global(gsym, GOT_TYPE_STANDARD);
8936                 else
8937                   {
8938                     is_new = got->add_global_plt(gsym, GOT_TYPE_STANDARD);
8939                     // Tell the dynamic linker to use the PLT address
8940                     // when resolving relocations.
8941                     if (gsym->is_from_dynobj()
8942                         && !parameters->options().shared())
8943                       gsym->set_needs_dynsym_value();
8944                   }
8945                 if (is_new)
8946                   rel_dyn->add_global_relative(
8947                       gsym, elfcpp::R_ARM_RELATIVE, got,
8948                       gsym->got_offset(GOT_TYPE_STANDARD));
8949               }
8950           }
8951       }
8952       break;
8953
8954     case elfcpp::R_ARM_TARGET1:
8955     case elfcpp::R_ARM_TARGET2:
8956       // These should have been mapped to other types already.
8957       // Fall through.
8958     case elfcpp::R_ARM_COPY:
8959     case elfcpp::R_ARM_GLOB_DAT:
8960     case elfcpp::R_ARM_JUMP_SLOT:
8961     case elfcpp::R_ARM_RELATIVE:
8962       // These are relocations which should only be seen by the
8963       // dynamic linker, and should never be seen here.
8964       gold_error(_("%s: unexpected reloc %u in object file"),
8965                  object->name().c_str(), r_type);
8966       break;
8967
8968       // These are initial tls relocs, which are expected when
8969       // linking.
8970     case elfcpp::R_ARM_TLS_GD32:        // Global-dynamic
8971     case elfcpp::R_ARM_TLS_LDM32:       // Local-dynamic
8972     case elfcpp::R_ARM_TLS_LDO32:       // Alternate local-dynamic
8973     case elfcpp::R_ARM_TLS_IE32:        // Initial-exec
8974     case elfcpp::R_ARM_TLS_LE32:        // Local-exec
8975       {
8976         const bool is_final = gsym->final_value_is_known();
8977         const tls::Tls_optimization optimized_type
8978             = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
8979         switch (r_type)
8980           {
8981           case elfcpp::R_ARM_TLS_GD32:          // Global-dynamic
8982             if (optimized_type == tls::TLSOPT_NONE)
8983               {
8984                 // Create a pair of GOT entries for the module index and
8985                 // dtv-relative offset.
8986                 Arm_output_data_got<big_endian>* got
8987                     = target->got_section(symtab, layout);
8988                 if (!parameters->doing_static_link())
8989                   got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR,
8990                                                 target->rel_dyn_section(layout),
8991                                                 elfcpp::R_ARM_TLS_DTPMOD32,
8992                                                 elfcpp::R_ARM_TLS_DTPOFF32);
8993                 else
8994                   got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym);
8995               }
8996             else
8997               // FIXME: TLS optimization not supported yet.
8998               gold_unreachable();
8999             break;
9000
9001           case elfcpp::R_ARM_TLS_LDM32:         // Local-dynamic
9002             if (optimized_type == tls::TLSOPT_NONE)
9003               {
9004                 // Create a GOT entry for the module index.
9005                 target->got_mod_index_entry(symtab, layout, object);
9006               }
9007             else
9008               // FIXME: TLS optimization not supported yet.
9009               gold_unreachable();
9010             break;
9011
9012           case elfcpp::R_ARM_TLS_LDO32:         // Alternate local-dynamic
9013             break;
9014
9015           case elfcpp::R_ARM_TLS_IE32:          // Initial-exec
9016             layout->set_has_static_tls();
9017             if (optimized_type == tls::TLSOPT_NONE)
9018               {
9019                 // Create a GOT entry for the tp-relative offset.
9020                 Arm_output_data_got<big_endian>* got
9021                   = target->got_section(symtab, layout);
9022                 if (!parameters->doing_static_link())
9023                   got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET,
9024                                            target->rel_dyn_section(layout),
9025                                            elfcpp::R_ARM_TLS_TPOFF32);
9026                 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET))
9027                   {
9028                     got->add_global(gsym, GOT_TYPE_TLS_OFFSET);
9029                     unsigned int got_offset =
9030                        gsym->got_offset(GOT_TYPE_TLS_OFFSET);
9031                     got->add_static_reloc(got_offset,
9032                                           elfcpp::R_ARM_TLS_TPOFF32, gsym);
9033                   }
9034               }
9035             else
9036               // FIXME: TLS optimization not supported yet.
9037               gold_unreachable();
9038             break;
9039
9040           case elfcpp::R_ARM_TLS_LE32:  // Local-exec
9041             layout->set_has_static_tls();
9042             if (parameters->options().shared())
9043               {
9044                 // We need to create a dynamic relocation.
9045                 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
9046                 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32,
9047                                     output_section, object,
9048                                     data_shndx, reloc.get_r_offset());
9049               }
9050             break;
9051
9052           default:
9053             gold_unreachable();
9054           }
9055       }
9056       break;
9057
9058     case elfcpp::R_ARM_PC24:
9059     case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9060     case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9061     case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9062     default:
9063       unsupported_reloc_global(object, r_type, gsym);
9064       break;
9065     }
9066 }
9067
9068 // Process relocations for gc.
9069
9070 template<bool big_endian>
9071 void
9072 Target_arm<big_endian>::gc_process_relocs(
9073     Symbol_table* symtab,
9074     Layout* layout,
9075     Sized_relobj_file<32, big_endian>* object,
9076     unsigned int data_shndx,
9077     unsigned int,
9078     const unsigned char* prelocs,
9079     size_t reloc_count,
9080     Output_section* output_section,
9081     bool needs_special_offset_handling,
9082     size_t local_symbol_count,
9083     const unsigned char* plocal_symbols)
9084 {
9085   typedef Target_arm<big_endian> Arm;
9086   typedef typename Target_arm<big_endian>::Scan Scan;
9087
9088   gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan,
9089                           typename Target_arm::Relocatable_size_for_reloc>(
9090     symtab,
9091     layout,
9092     this,
9093     object,
9094     data_shndx,
9095     prelocs,
9096     reloc_count,
9097     output_section,
9098     needs_special_offset_handling,
9099     local_symbol_count,
9100     plocal_symbols);
9101 }
9102
9103 // Scan relocations for a section.
9104
9105 template<bool big_endian>
9106 void
9107 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
9108                                     Layout* layout,
9109                                     Sized_relobj_file<32, big_endian>* object,
9110                                     unsigned int data_shndx,
9111                                     unsigned int sh_type,
9112                                     const unsigned char* prelocs,
9113                                     size_t reloc_count,
9114                                     Output_section* output_section,
9115                                     bool needs_special_offset_handling,
9116                                     size_t local_symbol_count,
9117                                     const unsigned char* plocal_symbols)
9118 {
9119   typedef typename Target_arm<big_endian>::Scan Scan;
9120   if (sh_type == elfcpp::SHT_RELA)
9121     {
9122       gold_error(_("%s: unsupported RELA reloc section"),
9123                  object->name().c_str());
9124       return;
9125     }
9126
9127   gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
9128     symtab,
9129     layout,
9130     this,
9131     object,
9132     data_shndx,
9133     prelocs,
9134     reloc_count,
9135     output_section,
9136     needs_special_offset_handling,
9137     local_symbol_count,
9138     plocal_symbols);
9139 }
9140
9141 // Finalize the sections.
9142
9143 template<bool big_endian>
9144 void
9145 Target_arm<big_endian>::do_finalize_sections(
9146     Layout* layout,
9147     const Input_objects* input_objects,
9148     Symbol_table*)
9149 {
9150   bool merged_any_attributes = false;
9151   // Merge processor-specific flags.
9152   for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
9153        p != input_objects->relobj_end();
9154        ++p)
9155     {
9156       Arm_relobj<big_endian>* arm_relobj =
9157         Arm_relobj<big_endian>::as_arm_relobj(*p);
9158       if (arm_relobj->merge_flags_and_attributes())
9159         {
9160           this->merge_processor_specific_flags(
9161               arm_relobj->name(),
9162               arm_relobj->processor_specific_flags());
9163           this->merge_object_attributes(arm_relobj->name().c_str(),
9164                                         arm_relobj->attributes_section_data());
9165           merged_any_attributes = true;
9166         }
9167     }
9168
9169   for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
9170        p != input_objects->dynobj_end();
9171        ++p)
9172     {
9173       Arm_dynobj<big_endian>* arm_dynobj =
9174         Arm_dynobj<big_endian>::as_arm_dynobj(*p);
9175       this->merge_processor_specific_flags(
9176           arm_dynobj->name(),
9177           arm_dynobj->processor_specific_flags());
9178       this->merge_object_attributes(arm_dynobj->name().c_str(),
9179                                     arm_dynobj->attributes_section_data());
9180       merged_any_attributes = true;
9181     }
9182
9183   // Create an empty uninitialized attribute section if we still don't have it
9184   // at this moment.  This happens if there is no attributes sections in all
9185   // inputs.
9186   if (this->attributes_section_data_ == NULL)
9187     this->attributes_section_data_ = new Attributes_section_data(NULL, 0);
9188
9189   const Object_attribute* cpu_arch_attr =
9190     this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
9191   // Check if we need to use Cortex-A8 workaround.
9192   if (parameters->options().user_set_fix_cortex_a8())
9193     this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
9194   else
9195     {
9196       // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9197       // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9198       // profile.
9199       const Object_attribute* cpu_arch_profile_attr =
9200         this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
9201       this->fix_cortex_a8_ =
9202         (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
9203          && (cpu_arch_profile_attr->int_value() == 'A'
9204              || cpu_arch_profile_attr->int_value() == 0));
9205     }
9206
9207   // Check if we can use V4BX interworking.
9208   // The V4BX interworking stub contains BX instruction,
9209   // which is not specified for some profiles.
9210   if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9211       && !this->may_use_v4t_interworking())
9212     gold_error(_("unable to provide V4BX reloc interworking fix up; "
9213                  "the target profile does not support BX instruction"));
9214
9215   // Fill in some more dynamic tags.
9216   const Reloc_section* rel_plt = (this->plt_ == NULL
9217                                   ? NULL
9218                                   : this->plt_->rel_plt());
9219   layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
9220                                   this->rel_dyn_, true, false);
9221
9222   // Emit any relocs we saved in an attempt to avoid generating COPY
9223   // relocs.
9224   if (this->copy_relocs_.any_saved_relocs())
9225     this->copy_relocs_.emit(this->rel_dyn_section(layout));
9226
9227   // Handle the .ARM.exidx section.
9228   Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
9229
9230   if (!parameters->options().relocatable())
9231     {
9232       if (exidx_section != NULL
9233           && exidx_section->type() == elfcpp::SHT_ARM_EXIDX)
9234         {
9235           // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9236           // the .ARM.exidx section.
9237           if (!layout->script_options()->saw_phdrs_clause())
9238             {
9239               gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0,
9240                                                       0)
9241                           == NULL);
9242               Output_segment*  exidx_segment =
9243                 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
9244               exidx_segment->add_output_section_to_nonload(exidx_section,
9245                                                            elfcpp::PF_R);
9246             }
9247         }
9248     }
9249
9250   // Create an .ARM.attributes section if we have merged any attributes
9251   // from inputs.
9252   if (merged_any_attributes)
9253     {
9254       Output_attributes_section_data* attributes_section =
9255       new Output_attributes_section_data(*this->attributes_section_data_);
9256       layout->add_output_section_data(".ARM.attributes",
9257                                       elfcpp::SHT_ARM_ATTRIBUTES, 0,
9258                                       attributes_section, ORDER_INVALID,
9259                                       false);
9260     }
9261
9262   // Fix up links in section EXIDX headers.
9263   for (Layout::Section_list::const_iterator p = layout->section_list().begin();
9264        p != layout->section_list().end();
9265        ++p)
9266     if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
9267       {
9268         Arm_output_section<big_endian>* os =
9269           Arm_output_section<big_endian>::as_arm_output_section(*p);
9270         os->set_exidx_section_link();
9271       }
9272 }
9273
9274 // Return whether a direct absolute static relocation needs to be applied.
9275 // In cases where Scan::local() or Scan::global() has created
9276 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9277 // of the relocation is carried in the data, and we must not
9278 // apply the static relocation.
9279
9280 template<bool big_endian>
9281 inline bool
9282 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
9283     const Sized_symbol<32>* gsym,
9284     unsigned int r_type,
9285     bool is_32bit,
9286     Output_section* output_section)
9287 {
9288   // If the output section is not allocated, then we didn't call
9289   // scan_relocs, we didn't create a dynamic reloc, and we must apply
9290   // the reloc here.
9291   if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
9292       return true;
9293
9294   int ref_flags = Scan::get_reference_flags(r_type);
9295
9296   // For local symbols, we will have created a non-RELATIVE dynamic
9297   // relocation only if (a) the output is position independent,
9298   // (b) the relocation is absolute (not pc- or segment-relative), and
9299   // (c) the relocation is not 32 bits wide.
9300   if (gsym == NULL)
9301     return !(parameters->options().output_is_position_independent()
9302              && (ref_flags & Symbol::ABSOLUTE_REF)
9303              && !is_32bit);
9304
9305   // For global symbols, we use the same helper routines used in the
9306   // scan pass.  If we did not create a dynamic relocation, or if we
9307   // created a RELATIVE dynamic relocation, we should apply the static
9308   // relocation.
9309   bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
9310   bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
9311                  && gsym->can_use_relative_reloc(ref_flags
9312                                                  & Symbol::FUNCTION_CALL);
9313   return !has_dyn || is_rel;
9314 }
9315
9316 // Perform a relocation.
9317
9318 template<bool big_endian>
9319 inline bool
9320 Target_arm<big_endian>::Relocate::relocate(
9321     const Relocate_info<32, big_endian>* relinfo,
9322     Target_arm* target,
9323     Output_section* output_section,
9324     size_t relnum,
9325     const elfcpp::Rel<32, big_endian>& rel,
9326     unsigned int r_type,
9327     const Sized_symbol<32>* gsym,
9328     const Symbol_value<32>* psymval,
9329     unsigned char* view,
9330     Arm_address address,
9331     section_size_type view_size)
9332 {
9333   if (view == NULL)
9334     return true;
9335
9336   typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
9337
9338   r_type = get_real_reloc_type(r_type);
9339   const Arm_reloc_property* reloc_property =
9340     arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9341   if (reloc_property == NULL)
9342     {
9343       std::string reloc_name =
9344         arm_reloc_property_table->reloc_name_in_error_message(r_type);
9345       gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9346                              _("cannot relocate %s in object file"),
9347                              reloc_name.c_str());
9348       return true;
9349     }
9350
9351   const Arm_relobj<big_endian>* object =
9352     Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9353
9354   // If the final branch target of a relocation is THUMB instruction, this
9355   // is 1.  Otherwise it is 0.
9356   Arm_address thumb_bit = 0;
9357   Symbol_value<32> symval;
9358   bool is_weakly_undefined_without_plt = false;
9359   bool have_got_offset = false;
9360   unsigned int got_offset = 0;
9361
9362   // If the relocation uses the GOT entry of a symbol instead of the symbol
9363   // itself, we don't care about whether the symbol is defined or what kind
9364   // of symbol it is.
9365   if (reloc_property->uses_got_entry())
9366     {
9367       // Get the GOT offset.
9368       // The GOT pointer points to the end of the GOT section.
9369       // We need to subtract the size of the GOT section to get
9370       // the actual offset to use in the relocation.
9371       // TODO: We should move GOT offset computing code in TLS relocations
9372       // to here.
9373       switch (r_type)
9374         {
9375         case elfcpp::R_ARM_GOT_BREL:
9376         case elfcpp::R_ARM_GOT_PREL:
9377           if (gsym != NULL)
9378             {
9379               gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
9380               got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
9381                             - target->got_size());
9382             }
9383           else
9384             {
9385               unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9386               gold_assert(object->local_has_got_offset(r_sym,
9387                                                        GOT_TYPE_STANDARD));
9388               got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
9389                             - target->got_size());
9390             }
9391           have_got_offset = true;
9392           break;
9393
9394         default:
9395           break;
9396         }
9397     }
9398   else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
9399     {
9400       if (gsym != NULL)
9401         {
9402           // This is a global symbol.  Determine if we use PLT and if the
9403           // final target is THUMB.
9404           if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
9405             {
9406               // This uses a PLT, change the symbol value.
9407               symval.set_output_value(target->plt_address_for_global(gsym));
9408               psymval = &symval;
9409             }
9410           else if (gsym->is_weak_undefined())
9411             {
9412               // This is a weakly undefined symbol and we do not use PLT
9413               // for this relocation.  A branch targeting this symbol will
9414               // be converted into an NOP.
9415               is_weakly_undefined_without_plt = true;
9416             }
9417           else if (gsym->is_undefined() && reloc_property->uses_symbol())
9418             {
9419               // This relocation uses the symbol value but the symbol is
9420               // undefined.  Exit early and have the caller reporting an
9421               // error.
9422               return true;
9423             }
9424           else
9425             {
9426               // Set thumb bit if symbol:
9427               // -Has type STT_ARM_TFUNC or
9428               // -Has type STT_FUNC, is defined and with LSB in value set.
9429               thumb_bit =
9430                 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
9431                  || (gsym->type() == elfcpp::STT_FUNC
9432                      && !gsym->is_undefined()
9433                      && ((psymval->value(object, 0) & 1) != 0)))
9434                 ? 1
9435                 : 0);
9436             }
9437         }
9438       else
9439         {
9440           // This is a local symbol.  Determine if the final target is THUMB.
9441           // We saved this information when all the local symbols were read.
9442           elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
9443           unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9444           thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
9445
9446           if (psymval->is_ifunc_symbol() && object->local_has_plt_offset(r_sym))
9447             {
9448               symval.set_output_value(
9449                   target->plt_address_for_local(object, r_sym));
9450               psymval = &symval;
9451             }
9452         }
9453     }
9454   else
9455     {
9456       // This is a fake relocation synthesized for a stub.  It does not have
9457       // a real symbol.  We just look at the LSB of the symbol value to
9458       // determine if the target is THUMB or not.
9459       thumb_bit = ((psymval->value(object, 0) & 1) != 0);
9460     }
9461
9462   // Strip LSB if this points to a THUMB target.
9463   if (thumb_bit != 0
9464       && reloc_property->uses_thumb_bit()
9465       && ((psymval->value(object, 0) & 1) != 0))
9466     {
9467       Arm_address stripped_value =
9468         psymval->value(object, 0) & ~static_cast<Arm_address>(1);
9469       symval.set_output_value(stripped_value);
9470       psymval = &symval;
9471     }
9472
9473   // To look up relocation stubs, we need to pass the symbol table index of
9474   // a local symbol.
9475   unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9476
9477   // Get the addressing origin of the output segment defining the
9478   // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9479   Arm_address sym_origin = 0;
9480   if (reloc_property->uses_symbol_base())
9481     {
9482       if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
9483         // R_ARM_BASE_ABS with the NULL symbol will give the
9484         // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9485         // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9486         sym_origin = target->got_plt_section()->address();
9487       else if (gsym == NULL)
9488         sym_origin = 0;
9489       else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
9490         sym_origin = gsym->output_segment()->vaddr();
9491       else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
9492         sym_origin = gsym->output_data()->address();
9493
9494       // TODO: Assumes the segment base to be zero for the global symbols
9495       // till the proper support for the segment-base-relative addressing
9496       // will be implemented.  This is consistent with GNU ld.
9497     }
9498
9499   // For relative addressing relocation, find out the relative address base.
9500   Arm_address relative_address_base = 0;
9501   switch(reloc_property->relative_address_base())
9502     {
9503     case Arm_reloc_property::RAB_NONE:
9504     // Relocations with relative address bases RAB_TLS and RAB_tp are
9505     // handled by relocate_tls.  So we do not need to do anything here.
9506     case Arm_reloc_property::RAB_TLS:
9507     case Arm_reloc_property::RAB_tp:
9508       break;
9509     case Arm_reloc_property::RAB_B_S:
9510       relative_address_base = sym_origin;
9511       break;
9512     case Arm_reloc_property::RAB_GOT_ORG:
9513       relative_address_base = target->got_plt_section()->address();
9514       break;
9515     case Arm_reloc_property::RAB_P:
9516       relative_address_base = address;
9517       break;
9518     case Arm_reloc_property::RAB_Pa:
9519       relative_address_base = address & 0xfffffffcU;
9520       break;
9521     default:
9522       gold_unreachable();
9523     }
9524
9525   typename Arm_relocate_functions::Status reloc_status =
9526         Arm_relocate_functions::STATUS_OKAY;
9527   bool check_overflow = reloc_property->checks_overflow();
9528   switch (r_type)
9529     {
9530     case elfcpp::R_ARM_NONE:
9531       break;
9532
9533     case elfcpp::R_ARM_ABS8:
9534       if (should_apply_static_reloc(gsym, r_type, false, output_section))
9535         reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
9536       break;
9537
9538     case elfcpp::R_ARM_ABS12:
9539       if (should_apply_static_reloc(gsym, r_type, false, output_section))
9540         reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
9541       break;
9542
9543     case elfcpp::R_ARM_ABS16:
9544       if (should_apply_static_reloc(gsym, r_type, false, output_section))
9545         reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
9546       break;
9547
9548     case elfcpp::R_ARM_ABS32:
9549       if (should_apply_static_reloc(gsym, r_type, true, output_section))
9550         reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9551                                                      thumb_bit);
9552       break;
9553
9554     case elfcpp::R_ARM_ABS32_NOI:
9555       if (should_apply_static_reloc(gsym, r_type, true, output_section))
9556         // No thumb bit for this relocation: (S + A)
9557         reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9558                                                      0);
9559       break;
9560
9561     case elfcpp::R_ARM_MOVW_ABS_NC:
9562       if (should_apply_static_reloc(gsym, r_type, false, output_section))
9563         reloc_status = Arm_relocate_functions::movw(view, object, psymval,
9564                                                     0, thumb_bit,
9565                                                     check_overflow);
9566       break;
9567
9568     case elfcpp::R_ARM_MOVT_ABS:
9569       if (should_apply_static_reloc(gsym, r_type, false, output_section))
9570         reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
9571       break;
9572
9573     case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9574       if (should_apply_static_reloc(gsym, r_type, false, output_section))
9575         reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
9576                                                         0, thumb_bit, false);
9577       break;
9578
9579     case elfcpp::R_ARM_THM_MOVT_ABS:
9580       if (should_apply_static_reloc(gsym, r_type, false, output_section))
9581         reloc_status = Arm_relocate_functions::thm_movt(view, object,
9582                                                         psymval, 0);
9583       break;
9584
9585     case elfcpp::R_ARM_MOVW_PREL_NC:
9586     case elfcpp::R_ARM_MOVW_BREL_NC:
9587     case elfcpp::R_ARM_MOVW_BREL:
9588       reloc_status =
9589         Arm_relocate_functions::movw(view, object, psymval,
9590                                      relative_address_base, thumb_bit,
9591                                      check_overflow);
9592       break;
9593
9594     case elfcpp::R_ARM_MOVT_PREL:
9595     case elfcpp::R_ARM_MOVT_BREL:
9596       reloc_status =
9597         Arm_relocate_functions::movt(view, object, psymval,
9598                                      relative_address_base);
9599       break;
9600
9601     case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9602     case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9603     case elfcpp::R_ARM_THM_MOVW_BREL:
9604       reloc_status =
9605         Arm_relocate_functions::thm_movw(view, object, psymval,
9606                                          relative_address_base,
9607                                          thumb_bit, check_overflow);
9608       break;
9609
9610     case elfcpp::R_ARM_THM_MOVT_PREL:
9611     case elfcpp::R_ARM_THM_MOVT_BREL:
9612       reloc_status =
9613         Arm_relocate_functions::thm_movt(view, object, psymval,
9614                                          relative_address_base);
9615       break;
9616
9617     case elfcpp::R_ARM_REL32:
9618       reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9619                                                    address, thumb_bit);
9620       break;
9621
9622     case elfcpp::R_ARM_THM_ABS5:
9623       if (should_apply_static_reloc(gsym, r_type, false, output_section))
9624         reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
9625       break;
9626
9627     // Thumb long branches.
9628     case elfcpp::R_ARM_THM_CALL:
9629     case elfcpp::R_ARM_THM_XPC22:
9630     case elfcpp::R_ARM_THM_JUMP24:
9631       reloc_status =
9632         Arm_relocate_functions::thumb_branch_common(
9633             r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9634             thumb_bit, is_weakly_undefined_without_plt);
9635       break;
9636
9637     case elfcpp::R_ARM_GOTOFF32:
9638       {
9639         Arm_address got_origin;
9640         got_origin = target->got_plt_section()->address();
9641         reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9642                                                      got_origin, thumb_bit);
9643       }
9644       break;
9645
9646     case elfcpp::R_ARM_BASE_PREL:
9647       gold_assert(gsym != NULL);
9648       reloc_status =
9649           Arm_relocate_functions::base_prel(view, sym_origin, address);
9650       break;
9651
9652     case elfcpp::R_ARM_BASE_ABS:
9653       if (should_apply_static_reloc(gsym, r_type, false, output_section))
9654         reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
9655       break;
9656
9657     case elfcpp::R_ARM_GOT_BREL:
9658       gold_assert(have_got_offset);
9659       reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
9660       break;
9661
9662     case elfcpp::R_ARM_GOT_PREL:
9663       gold_assert(have_got_offset);
9664       // Get the address origin for GOT PLT, which is allocated right
9665       // after the GOT section, to calculate an absolute address of
9666       // the symbol GOT entry (got_origin + got_offset).
9667       Arm_address got_origin;
9668       got_origin = target->got_plt_section()->address();
9669       reloc_status = Arm_relocate_functions::got_prel(view,
9670                                                       got_origin + got_offset,
9671                                                       address);
9672       break;
9673
9674     case elfcpp::R_ARM_PLT32:
9675     case elfcpp::R_ARM_CALL:
9676     case elfcpp::R_ARM_JUMP24:
9677     case elfcpp::R_ARM_XPC25:
9678       gold_assert(gsym == NULL
9679                   || gsym->has_plt_offset()
9680                   || gsym->final_value_is_known()
9681                   || (gsym->is_defined()
9682                       && !gsym->is_from_dynobj()
9683                       && !gsym->is_preemptible()));
9684       reloc_status =
9685         Arm_relocate_functions::arm_branch_common(
9686             r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9687             thumb_bit, is_weakly_undefined_without_plt);
9688       break;
9689
9690     case elfcpp::R_ARM_THM_JUMP19:
9691       reloc_status =
9692         Arm_relocate_functions::thm_jump19(view, object, psymval, address,
9693                                            thumb_bit);
9694       break;
9695
9696     case elfcpp::R_ARM_THM_JUMP6:
9697       reloc_status =
9698         Arm_relocate_functions::thm_jump6(view, object, psymval, address);
9699       break;
9700
9701     case elfcpp::R_ARM_THM_JUMP8:
9702       reloc_status =
9703         Arm_relocate_functions::thm_jump8(view, object, psymval, address);
9704       break;
9705
9706     case elfcpp::R_ARM_THM_JUMP11:
9707       reloc_status =
9708         Arm_relocate_functions::thm_jump11(view, object, psymval, address);
9709       break;
9710
9711     case elfcpp::R_ARM_PREL31:
9712       reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
9713                                                     address, thumb_bit);
9714       break;
9715
9716     case elfcpp::R_ARM_V4BX:
9717       if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
9718         {
9719           const bool is_v4bx_interworking =
9720               (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
9721           reloc_status =
9722             Arm_relocate_functions::v4bx(relinfo, view, object, address,
9723                                          is_v4bx_interworking);
9724         }
9725       break;
9726
9727     case elfcpp::R_ARM_THM_PC8:
9728       reloc_status =
9729         Arm_relocate_functions::thm_pc8(view, object, psymval, address);
9730       break;
9731
9732     case elfcpp::R_ARM_THM_PC12:
9733       reloc_status =
9734         Arm_relocate_functions::thm_pc12(view, object, psymval, address);
9735       break;
9736
9737     case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9738       reloc_status =
9739         Arm_relocate_functions::thm_alu11(view, object, psymval, address,
9740                                           thumb_bit);
9741       break;
9742
9743     case elfcpp::R_ARM_ALU_PC_G0_NC:
9744     case elfcpp::R_ARM_ALU_PC_G0:
9745     case elfcpp::R_ARM_ALU_PC_G1_NC:
9746     case elfcpp::R_ARM_ALU_PC_G1:
9747     case elfcpp::R_ARM_ALU_PC_G2:
9748     case elfcpp::R_ARM_ALU_SB_G0_NC:
9749     case elfcpp::R_ARM_ALU_SB_G0:
9750     case elfcpp::R_ARM_ALU_SB_G1_NC:
9751     case elfcpp::R_ARM_ALU_SB_G1:
9752     case elfcpp::R_ARM_ALU_SB_G2:
9753       reloc_status =
9754         Arm_relocate_functions::arm_grp_alu(view, object, psymval,
9755                                             reloc_property->group_index(),
9756                                             relative_address_base,
9757                                             thumb_bit, check_overflow);
9758       break;
9759
9760     case elfcpp::R_ARM_LDR_PC_G0:
9761     case elfcpp::R_ARM_LDR_PC_G1:
9762     case elfcpp::R_ARM_LDR_PC_G2:
9763     case elfcpp::R_ARM_LDR_SB_G0:
9764     case elfcpp::R_ARM_LDR_SB_G1:
9765     case elfcpp::R_ARM_LDR_SB_G2:
9766       reloc_status =
9767           Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
9768                                               reloc_property->group_index(),
9769                                               relative_address_base);
9770       break;
9771
9772     case elfcpp::R_ARM_LDRS_PC_G0:
9773     case elfcpp::R_ARM_LDRS_PC_G1:
9774     case elfcpp::R_ARM_LDRS_PC_G2:
9775     case elfcpp::R_ARM_LDRS_SB_G0:
9776     case elfcpp::R_ARM_LDRS_SB_G1:
9777     case elfcpp::R_ARM_LDRS_SB_G2:
9778       reloc_status =
9779           Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
9780                                                reloc_property->group_index(),
9781                                                relative_address_base);
9782       break;
9783
9784     case elfcpp::R_ARM_LDC_PC_G0:
9785     case elfcpp::R_ARM_LDC_PC_G1:
9786     case elfcpp::R_ARM_LDC_PC_G2:
9787     case elfcpp::R_ARM_LDC_SB_G0:
9788     case elfcpp::R_ARM_LDC_SB_G1:
9789     case elfcpp::R_ARM_LDC_SB_G2:
9790       reloc_status =
9791           Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
9792                                               reloc_property->group_index(),
9793                                               relative_address_base);
9794       break;
9795
9796       // These are initial tls relocs, which are expected when
9797       // linking.
9798     case elfcpp::R_ARM_TLS_GD32:        // Global-dynamic
9799     case elfcpp::R_ARM_TLS_LDM32:       // Local-dynamic
9800     case elfcpp::R_ARM_TLS_LDO32:       // Alternate local-dynamic
9801     case elfcpp::R_ARM_TLS_IE32:        // Initial-exec
9802     case elfcpp::R_ARM_TLS_LE32:        // Local-exec
9803       reloc_status =
9804         this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval,
9805                            view, address, view_size);
9806       break;
9807
9808     // The known and unknown unsupported and/or deprecated relocations.
9809     case elfcpp::R_ARM_PC24:
9810     case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9811     case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9812     case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9813     default:
9814       // Just silently leave the method. We should get an appropriate error
9815       // message in the scan methods.
9816       break;
9817     }
9818
9819   // Report any errors.
9820   switch (reloc_status)
9821     {
9822     case Arm_relocate_functions::STATUS_OKAY:
9823       break;
9824     case Arm_relocate_functions::STATUS_OVERFLOW:
9825       gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9826                              _("relocation overflow in %s"),
9827                              reloc_property->name().c_str());
9828       break;
9829     case Arm_relocate_functions::STATUS_BAD_RELOC:
9830       gold_error_at_location(
9831         relinfo,
9832         relnum,
9833         rel.get_r_offset(),
9834         _("unexpected opcode while processing relocation %s"),
9835         reloc_property->name().c_str());
9836       break;
9837     default:
9838       gold_unreachable();
9839     }
9840
9841   return true;
9842 }
9843
9844 // Perform a TLS relocation.
9845
9846 template<bool big_endian>
9847 inline typename Arm_relocate_functions<big_endian>::Status
9848 Target_arm<big_endian>::Relocate::relocate_tls(
9849     const Relocate_info<32, big_endian>* relinfo,
9850     Target_arm<big_endian>* target,
9851     size_t relnum,
9852     const elfcpp::Rel<32, big_endian>& rel,
9853     unsigned int r_type,
9854     const Sized_symbol<32>* gsym,
9855     const Symbol_value<32>* psymval,
9856     unsigned char* view,
9857     elfcpp::Elf_types<32>::Elf_Addr address,
9858     section_size_type /*view_size*/ )
9859 {
9860   typedef Arm_relocate_functions<big_endian> ArmRelocFuncs;
9861   typedef Relocate_functions<32, big_endian> RelocFuncs;
9862   Output_segment* tls_segment = relinfo->layout->tls_segment();
9863
9864   const Sized_relobj_file<32, big_endian>* object = relinfo->object;
9865
9866   elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0);
9867
9868   const bool is_final = (gsym == NULL
9869                          ? !parameters->options().shared()
9870                          : gsym->final_value_is_known());
9871   const tls::Tls_optimization optimized_type
9872       = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
9873   switch (r_type)
9874     {
9875     case elfcpp::R_ARM_TLS_GD32:        // Global-dynamic
9876         {
9877           unsigned int got_type = GOT_TYPE_TLS_PAIR;
9878           unsigned int got_offset;
9879           if (gsym != NULL)
9880             {
9881               gold_assert(gsym->has_got_offset(got_type));
9882               got_offset = gsym->got_offset(got_type) - target->got_size();
9883             }
9884           else
9885             {
9886               unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9887               gold_assert(object->local_has_got_offset(r_sym, got_type));
9888               got_offset = (object->local_got_offset(r_sym, got_type)
9889                             - target->got_size());
9890             }
9891           if (optimized_type == tls::TLSOPT_NONE)
9892             {
9893               Arm_address got_entry =
9894                 target->got_plt_section()->address() + got_offset;
9895
9896               // Relocate the field with the PC relative offset of the pair of
9897               // GOT entries.
9898               RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9899               return ArmRelocFuncs::STATUS_OKAY;
9900             }
9901         }
9902       break;
9903
9904     case elfcpp::R_ARM_TLS_LDM32:       // Local-dynamic
9905       if (optimized_type == tls::TLSOPT_NONE)
9906         {
9907           // Relocate the field with the offset of the GOT entry for
9908           // the module index.
9909           unsigned int got_offset;
9910           got_offset = (target->got_mod_index_entry(NULL, NULL, NULL)
9911                         - target->got_size());
9912           Arm_address got_entry =
9913             target->got_plt_section()->address() + got_offset;
9914
9915           // Relocate the field with the PC relative offset of the pair of
9916           // GOT entries.
9917           RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9918           return ArmRelocFuncs::STATUS_OKAY;
9919         }
9920       break;
9921
9922     case elfcpp::R_ARM_TLS_LDO32:       // Alternate local-dynamic
9923       RelocFuncs::rel32_unaligned(view, value);
9924       return ArmRelocFuncs::STATUS_OKAY;
9925
9926     case elfcpp::R_ARM_TLS_IE32:        // Initial-exec
9927       if (optimized_type == tls::TLSOPT_NONE)
9928         {
9929           // Relocate the field with the offset of the GOT entry for
9930           // the tp-relative offset of the symbol.
9931           unsigned int got_type = GOT_TYPE_TLS_OFFSET;
9932           unsigned int got_offset;
9933           if (gsym != NULL)
9934             {
9935               gold_assert(gsym->has_got_offset(got_type));
9936               got_offset = gsym->got_offset(got_type);
9937             }
9938           else
9939             {
9940               unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9941               gold_assert(object->local_has_got_offset(r_sym, got_type));
9942               got_offset = object->local_got_offset(r_sym, got_type);
9943             }
9944
9945           // All GOT offsets are relative to the end of the GOT.
9946           got_offset -= target->got_size();
9947
9948           Arm_address got_entry =
9949             target->got_plt_section()->address() + got_offset;
9950
9951           // Relocate the field with the PC relative offset of the GOT entry.
9952           RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9953           return ArmRelocFuncs::STATUS_OKAY;
9954         }
9955       break;
9956
9957     case elfcpp::R_ARM_TLS_LE32:        // Local-exec
9958       // If we're creating a shared library, a dynamic relocation will
9959       // have been created for this location, so do not apply it now.
9960       if (!parameters->options().shared())
9961         {
9962           gold_assert(tls_segment != NULL);
9963
9964           // $tp points to the TCB, which is followed by the TLS, so we
9965           // need to add TCB size to the offset.
9966           Arm_address aligned_tcb_size =
9967             align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
9968           RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size);
9969
9970         }
9971       return ArmRelocFuncs::STATUS_OKAY;
9972
9973     default:
9974       gold_unreachable();
9975     }
9976
9977   gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9978                          _("unsupported reloc %u"),
9979                          r_type);
9980   return ArmRelocFuncs::STATUS_BAD_RELOC;
9981 }
9982
9983 // Relocate section data.
9984
9985 template<bool big_endian>
9986 void
9987 Target_arm<big_endian>::relocate_section(
9988     const Relocate_info<32, big_endian>* relinfo,
9989     unsigned int sh_type,
9990     const unsigned char* prelocs,
9991     size_t reloc_count,
9992     Output_section* output_section,
9993     bool needs_special_offset_handling,
9994     unsigned char* view,
9995     Arm_address address,
9996     section_size_type view_size,
9997     const Reloc_symbol_changes* reloc_symbol_changes)
9998 {
9999   typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
10000   gold_assert(sh_type == elfcpp::SHT_REL);
10001
10002   // See if we are relocating a relaxed input section.  If so, the view
10003   // covers the whole output section and we need to adjust accordingly.
10004   if (needs_special_offset_handling)
10005     {
10006       const Output_relaxed_input_section* poris =
10007         output_section->find_relaxed_input_section(relinfo->object,
10008                                                    relinfo->data_shndx);
10009       if (poris != NULL)
10010         {
10011           Arm_address section_address = poris->address();
10012           section_size_type section_size = poris->data_size();
10013
10014           gold_assert((section_address >= address)
10015                       && ((section_address + section_size)
10016                           <= (address + view_size)));
10017
10018           off_t offset = section_address - address;
10019           view += offset;
10020           address += offset;
10021           view_size = section_size;
10022         }
10023     }
10024
10025   gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
10026                          Arm_relocate, gold::Default_comdat_behavior>(
10027     relinfo,
10028     this,
10029     prelocs,
10030     reloc_count,
10031     output_section,
10032     needs_special_offset_handling,
10033     view,
10034     address,
10035     view_size,
10036     reloc_symbol_changes);
10037 }
10038
10039 // Return the size of a relocation while scanning during a relocatable
10040 // link.
10041
10042 template<bool big_endian>
10043 unsigned int
10044 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
10045     unsigned int r_type,
10046     Relobj* object)
10047 {
10048   r_type = get_real_reloc_type(r_type);
10049   const Arm_reloc_property* arp =
10050       arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10051   if (arp != NULL)
10052     return arp->size();
10053   else
10054     {
10055       std::string reloc_name =
10056         arm_reloc_property_table->reloc_name_in_error_message(r_type);
10057       gold_error(_("%s: unexpected %s in object file"),
10058                  object->name().c_str(), reloc_name.c_str());
10059       return 0;
10060     }
10061 }
10062
10063 // Scan the relocs during a relocatable link.
10064
10065 template<bool big_endian>
10066 void
10067 Target_arm<big_endian>::scan_relocatable_relocs(
10068     Symbol_table* symtab,
10069     Layout* layout,
10070     Sized_relobj_file<32, big_endian>* object,
10071     unsigned int data_shndx,
10072     unsigned int sh_type,
10073     const unsigned char* prelocs,
10074     size_t reloc_count,
10075     Output_section* output_section,
10076     bool needs_special_offset_handling,
10077     size_t local_symbol_count,
10078     const unsigned char* plocal_symbols,
10079     Relocatable_relocs* rr)
10080 {
10081   gold_assert(sh_type == elfcpp::SHT_REL);
10082
10083   typedef Arm_scan_relocatable_relocs<big_endian, elfcpp::SHT_REL,
10084     Relocatable_size_for_reloc> Scan_relocatable_relocs;
10085
10086   gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
10087       Scan_relocatable_relocs>(
10088     symtab,
10089     layout,
10090     object,
10091     data_shndx,
10092     prelocs,
10093     reloc_count,
10094     output_section,
10095     needs_special_offset_handling,
10096     local_symbol_count,
10097     plocal_symbols,
10098     rr);
10099 }
10100
10101 // Emit relocations for a section.
10102
10103 template<bool big_endian>
10104 void
10105 Target_arm<big_endian>::relocate_relocs(
10106     const Relocate_info<32, big_endian>* relinfo,
10107     unsigned int sh_type,
10108     const unsigned char* prelocs,
10109     size_t reloc_count,
10110     Output_section* output_section,
10111     typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10112     const Relocatable_relocs* rr,
10113     unsigned char* view,
10114     Arm_address view_address,
10115     section_size_type view_size,
10116     unsigned char* reloc_view,
10117     section_size_type reloc_view_size)
10118 {
10119   gold_assert(sh_type == elfcpp::SHT_REL);
10120
10121   gold::relocate_relocs<32, big_endian, elfcpp::SHT_REL>(
10122     relinfo,
10123     prelocs,
10124     reloc_count,
10125     output_section,
10126     offset_in_output_section,
10127     rr,
10128     view,
10129     view_address,
10130     view_size,
10131     reloc_view,
10132     reloc_view_size);
10133 }
10134
10135 // Perform target-specific processing in a relocatable link.  This is
10136 // only used if we use the relocation strategy RELOC_SPECIAL.
10137
10138 template<bool big_endian>
10139 void
10140 Target_arm<big_endian>::relocate_special_relocatable(
10141     const Relocate_info<32, big_endian>* relinfo,
10142     unsigned int sh_type,
10143     const unsigned char* preloc_in,
10144     size_t relnum,
10145     Output_section* output_section,
10146     typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10147     unsigned char* view,
10148     elfcpp::Elf_types<32>::Elf_Addr view_address,
10149     section_size_type,
10150     unsigned char* preloc_out)
10151 {
10152   // We can only handle REL type relocation sections.
10153   gold_assert(sh_type == elfcpp::SHT_REL);
10154
10155   typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype;
10156   typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write
10157     Reltype_write;
10158   const Arm_address invalid_address = static_cast<Arm_address>(0) - 1;
10159
10160   const Arm_relobj<big_endian>* object =
10161     Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
10162   const unsigned int local_count = object->local_symbol_count();
10163
10164   Reltype reloc(preloc_in);
10165   Reltype_write reloc_write(preloc_out);
10166
10167   elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
10168   const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
10169   const unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
10170
10171   const Arm_reloc_property* arp =
10172     arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10173   gold_assert(arp != NULL);
10174
10175   // Get the new symbol index.
10176   // We only use RELOC_SPECIAL strategy in local relocations.
10177   gold_assert(r_sym < local_count);
10178
10179   // We are adjusting a section symbol.  We need to find
10180   // the symbol table index of the section symbol for
10181   // the output section corresponding to input section
10182   // in which this symbol is defined.
10183   bool is_ordinary;
10184   unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary);
10185   gold_assert(is_ordinary);
10186   Output_section* os = object->output_section(shndx);
10187   gold_assert(os != NULL);
10188   gold_assert(os->needs_symtab_index());
10189   unsigned int new_symndx = os->symtab_index();
10190
10191   // Get the new offset--the location in the output section where
10192   // this relocation should be applied.
10193
10194   Arm_address offset = reloc.get_r_offset();
10195   Arm_address new_offset;
10196   if (offset_in_output_section != invalid_address)
10197     new_offset = offset + offset_in_output_section;
10198   else
10199     {
10200       section_offset_type sot_offset =
10201           convert_types<section_offset_type, Arm_address>(offset);
10202       section_offset_type new_sot_offset =
10203           output_section->output_offset(object, relinfo->data_shndx,
10204                                         sot_offset);
10205       gold_assert(new_sot_offset != -1);
10206       new_offset = new_sot_offset;
10207     }
10208
10209   // In an object file, r_offset is an offset within the section.
10210   // In an executable or dynamic object, generated by
10211   // --emit-relocs, r_offset is an absolute address.
10212   if (!parameters->options().relocatable())
10213     {
10214       new_offset += view_address;
10215       if (offset_in_output_section != invalid_address)
10216         new_offset -= offset_in_output_section;
10217     }
10218
10219   reloc_write.put_r_offset(new_offset);
10220   reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type));
10221
10222   // Handle the reloc addend.
10223   // The relocation uses a section symbol in the input file.
10224   // We are adjusting it to use a section symbol in the output
10225   // file.  The input section symbol refers to some address in
10226   // the input section.  We need the relocation in the output
10227   // file to refer to that same address.  This adjustment to
10228   // the addend is the same calculation we use for a simple
10229   // absolute relocation for the input section symbol.
10230
10231   const Symbol_value<32>* psymval = object->local_symbol(r_sym);
10232
10233   // Handle THUMB bit.
10234   Symbol_value<32> symval;
10235   Arm_address thumb_bit =
10236      object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
10237   if (thumb_bit != 0
10238       && arp->uses_thumb_bit()
10239       && ((psymval->value(object, 0) & 1) != 0))
10240     {
10241       Arm_address stripped_value =
10242         psymval->value(object, 0) & ~static_cast<Arm_address>(1);
10243       symval.set_output_value(stripped_value);
10244       psymval = &symval;
10245     }
10246
10247   unsigned char* paddend = view + offset;
10248   typename Arm_relocate_functions<big_endian>::Status reloc_status =
10249         Arm_relocate_functions<big_endian>::STATUS_OKAY;
10250   switch (r_type)
10251     {
10252     case elfcpp::R_ARM_ABS8:
10253       reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object,
10254                                                               psymval);
10255       break;
10256
10257     case elfcpp::R_ARM_ABS12:
10258       reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object,
10259                                                                psymval);
10260       break;
10261
10262     case elfcpp::R_ARM_ABS16:
10263       reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object,
10264                                                                psymval);
10265       break;
10266
10267     case elfcpp::R_ARM_THM_ABS5:
10268       reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend,
10269                                                                   object,
10270                                                                   psymval);
10271       break;
10272
10273     case elfcpp::R_ARM_MOVW_ABS_NC:
10274     case elfcpp::R_ARM_MOVW_PREL_NC:
10275     case elfcpp::R_ARM_MOVW_BREL_NC:
10276     case elfcpp::R_ARM_MOVW_BREL:
10277       reloc_status = Arm_relocate_functions<big_endian>::movw(
10278           paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10279       break;
10280
10281     case elfcpp::R_ARM_THM_MOVW_ABS_NC:
10282     case elfcpp::R_ARM_THM_MOVW_PREL_NC:
10283     case elfcpp::R_ARM_THM_MOVW_BREL_NC:
10284     case elfcpp::R_ARM_THM_MOVW_BREL:
10285       reloc_status = Arm_relocate_functions<big_endian>::thm_movw(
10286           paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10287       break;
10288
10289     case elfcpp::R_ARM_THM_CALL:
10290     case elfcpp::R_ARM_THM_XPC22:
10291     case elfcpp::R_ARM_THM_JUMP24:
10292       reloc_status =
10293         Arm_relocate_functions<big_endian>::thumb_branch_common(
10294             r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10295             false);
10296       break;
10297
10298     case elfcpp::R_ARM_PLT32:
10299     case elfcpp::R_ARM_CALL:
10300     case elfcpp::R_ARM_JUMP24:
10301     case elfcpp::R_ARM_XPC25:
10302       reloc_status =
10303         Arm_relocate_functions<big_endian>::arm_branch_common(
10304             r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10305             false);
10306       break;
10307
10308     case elfcpp::R_ARM_THM_JUMP19:
10309       reloc_status =
10310         Arm_relocate_functions<big_endian>::thm_jump19(paddend, object,
10311                                                        psymval, 0, thumb_bit);
10312       break;
10313
10314     case elfcpp::R_ARM_THM_JUMP6:
10315       reloc_status =
10316         Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval,
10317                                                       0);
10318       break;
10319
10320     case elfcpp::R_ARM_THM_JUMP8:
10321       reloc_status =
10322         Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval,
10323                                                       0);
10324       break;
10325
10326     case elfcpp::R_ARM_THM_JUMP11:
10327       reloc_status =
10328         Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval,
10329                                                        0);
10330       break;
10331
10332     case elfcpp::R_ARM_PREL31:
10333       reloc_status =
10334         Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0,
10335                                                    thumb_bit);
10336       break;
10337
10338     case elfcpp::R_ARM_THM_PC8:
10339       reloc_status =
10340         Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval,
10341                                                     0);
10342       break;
10343
10344     case elfcpp::R_ARM_THM_PC12:
10345       reloc_status =
10346         Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval,
10347                                                      0);
10348       break;
10349
10350     case elfcpp::R_ARM_THM_ALU_PREL_11_0:
10351       reloc_status =
10352         Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval,
10353                                                       0, thumb_bit);
10354       break;
10355
10356     // These relocation truncate relocation results so we cannot handle them
10357     // in a relocatable link.
10358     case elfcpp::R_ARM_MOVT_ABS:
10359     case elfcpp::R_ARM_THM_MOVT_ABS:
10360     case elfcpp::R_ARM_MOVT_PREL:
10361     case elfcpp::R_ARM_MOVT_BREL:
10362     case elfcpp::R_ARM_THM_MOVT_PREL:
10363     case elfcpp::R_ARM_THM_MOVT_BREL:
10364     case elfcpp::R_ARM_ALU_PC_G0_NC:
10365     case elfcpp::R_ARM_ALU_PC_G0:
10366     case elfcpp::R_ARM_ALU_PC_G1_NC:
10367     case elfcpp::R_ARM_ALU_PC_G1:
10368     case elfcpp::R_ARM_ALU_PC_G2:
10369     case elfcpp::R_ARM_ALU_SB_G0_NC:
10370     case elfcpp::R_ARM_ALU_SB_G0:
10371     case elfcpp::R_ARM_ALU_SB_G1_NC:
10372     case elfcpp::R_ARM_ALU_SB_G1:
10373     case elfcpp::R_ARM_ALU_SB_G2:
10374     case elfcpp::R_ARM_LDR_PC_G0:
10375     case elfcpp::R_ARM_LDR_PC_G1:
10376     case elfcpp::R_ARM_LDR_PC_G2:
10377     case elfcpp::R_ARM_LDR_SB_G0:
10378     case elfcpp::R_ARM_LDR_SB_G1:
10379     case elfcpp::R_ARM_LDR_SB_G2:
10380     case elfcpp::R_ARM_LDRS_PC_G0:
10381     case elfcpp::R_ARM_LDRS_PC_G1:
10382     case elfcpp::R_ARM_LDRS_PC_G2:
10383     case elfcpp::R_ARM_LDRS_SB_G0:
10384     case elfcpp::R_ARM_LDRS_SB_G1:
10385     case elfcpp::R_ARM_LDRS_SB_G2:
10386     case elfcpp::R_ARM_LDC_PC_G0:
10387     case elfcpp::R_ARM_LDC_PC_G1:
10388     case elfcpp::R_ARM_LDC_PC_G2:
10389     case elfcpp::R_ARM_LDC_SB_G0:
10390     case elfcpp::R_ARM_LDC_SB_G1:
10391     case elfcpp::R_ARM_LDC_SB_G2:
10392       gold_error(_("cannot handle %s in a relocatable link"),
10393                  arp->name().c_str());
10394       break;
10395
10396     default:
10397       gold_unreachable();
10398     }
10399
10400   // Report any errors.
10401   switch (reloc_status)
10402     {
10403     case Arm_relocate_functions<big_endian>::STATUS_OKAY:
10404       break;
10405     case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW:
10406       gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10407                              _("relocation overflow in %s"),
10408                              arp->name().c_str());
10409       break;
10410     case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC:
10411       gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10412         _("unexpected opcode while processing relocation %s"),
10413         arp->name().c_str());
10414       break;
10415     default:
10416       gold_unreachable();
10417     }
10418 }
10419
10420 // Return the value to use for a dynamic symbol which requires special
10421 // treatment.  This is how we support equality comparisons of function
10422 // pointers across shared library boundaries, as described in the
10423 // processor specific ABI supplement.
10424
10425 template<bool big_endian>
10426 uint64_t
10427 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
10428 {
10429   gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
10430   return this->plt_address_for_global(gsym);
10431 }
10432
10433 // Map platform-specific relocs to real relocs
10434 //
10435 template<bool big_endian>
10436 unsigned int
10437 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type)
10438 {
10439   switch (r_type)
10440     {
10441     case elfcpp::R_ARM_TARGET1:
10442       // This is either R_ARM_ABS32 or R_ARM_REL32;
10443       return elfcpp::R_ARM_ABS32;
10444
10445     case elfcpp::R_ARM_TARGET2:
10446       // This can be any reloc type but usually is R_ARM_GOT_PREL
10447       return elfcpp::R_ARM_GOT_PREL;
10448
10449     default:
10450       return r_type;
10451     }
10452 }
10453
10454 // Whether if two EABI versions V1 and V2 are compatible.
10455
10456 template<bool big_endian>
10457 bool
10458 Target_arm<big_endian>::are_eabi_versions_compatible(
10459     elfcpp::Elf_Word v1,
10460     elfcpp::Elf_Word v2)
10461 {
10462   // v4 and v5 are the same spec before and after it was released,
10463   // so allow mixing them.
10464   if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN)
10465       || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
10466       || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
10467     return true;
10468
10469   return v1 == v2;
10470 }
10471
10472 // Combine FLAGS from an input object called NAME and the processor-specific
10473 // flags in the ELF header of the output.  Much of this is adapted from the
10474 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10475 // in bfd/elf32-arm.c.
10476
10477 template<bool big_endian>
10478 void
10479 Target_arm<big_endian>::merge_processor_specific_flags(
10480     const std::string& name,
10481     elfcpp::Elf_Word flags)
10482 {
10483   if (this->are_processor_specific_flags_set())
10484     {
10485       elfcpp::Elf_Word out_flags = this->processor_specific_flags();
10486
10487       // Nothing to merge if flags equal to those in output.
10488       if (flags == out_flags)
10489         return;
10490
10491       // Complain about various flag mismatches.
10492       elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
10493       elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
10494       if (!this->are_eabi_versions_compatible(version1, version2)
10495           && parameters->options().warn_mismatch())
10496         gold_error(_("Source object %s has EABI version %d but output has "
10497                      "EABI version %d."),
10498                    name.c_str(),
10499                    (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
10500                    (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
10501     }
10502   else
10503     {
10504       // If the input is the default architecture and had the default
10505       // flags then do not bother setting the flags for the output
10506       // architecture, instead allow future merges to do this.  If no
10507       // future merges ever set these flags then they will retain their
10508       // uninitialised values, which surprise surprise, correspond
10509       // to the default values.
10510       if (flags == 0)
10511         return;
10512
10513       // This is the first time, just copy the flags.
10514       // We only copy the EABI version for now.
10515       this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
10516     }
10517 }
10518
10519 // Adjust ELF file header.
10520 template<bool big_endian>
10521 void
10522 Target_arm<big_endian>::do_adjust_elf_header(
10523     unsigned char* view,
10524     int len)
10525 {
10526   gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
10527
10528   elfcpp::Ehdr<32, big_endian> ehdr(view);
10529   elfcpp::Elf_Word flags = this->processor_specific_flags();
10530   unsigned char e_ident[elfcpp::EI_NIDENT];
10531   memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
10532
10533   if (elfcpp::arm_eabi_version(flags)
10534       == elfcpp::EF_ARM_EABI_UNKNOWN)
10535     e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
10536   else
10537     e_ident[elfcpp::EI_OSABI] = 0;
10538   e_ident[elfcpp::EI_ABIVERSION] = 0;
10539
10540   // FIXME: Do EF_ARM_BE8 adjustment.
10541
10542   // If we're working in EABI_VER5, set the hard/soft float ABI flags
10543   // as appropriate.
10544   if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5)
10545   {
10546     elfcpp::Elf_Half type = ehdr.get_e_type();
10547     if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN)
10548       {
10549         Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args);
10550         if (attr->int_value() == elfcpp::AEABI_VFP_args_vfp)
10551           flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD;
10552         else
10553           flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT;
10554         this->set_processor_specific_flags(flags);
10555       }
10556   }
10557   elfcpp::Ehdr_write<32, big_endian> oehdr(view);
10558   oehdr.put_e_ident(e_ident);
10559 }
10560
10561 // do_make_elf_object to override the same function in the base class.
10562 // We need to use a target-specific sub-class of
10563 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10564 // Hence we need to have our own ELF object creation.
10565
10566 template<bool big_endian>
10567 Object*
10568 Target_arm<big_endian>::do_make_elf_object(
10569     const std::string& name,
10570     Input_file* input_file,
10571     off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
10572 {
10573   int et = ehdr.get_e_type();
10574   // ET_EXEC files are valid input for --just-symbols/-R,
10575   // and we treat them as relocatable objects.
10576   if (et == elfcpp::ET_REL
10577       || (et == elfcpp::ET_EXEC && input_file->just_symbols()))
10578     {
10579       Arm_relobj<big_endian>* obj =
10580         new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
10581       obj->setup();
10582       return obj;
10583     }
10584   else if (et == elfcpp::ET_DYN)
10585     {
10586       Sized_dynobj<32, big_endian>* obj =
10587         new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
10588       obj->setup();
10589       return obj;
10590     }
10591   else
10592     {
10593       gold_error(_("%s: unsupported ELF file type %d"),
10594                  name.c_str(), et);
10595       return NULL;
10596     }
10597 }
10598
10599 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10600 // Returns -1 if no architecture could be read.
10601 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10602
10603 template<bool big_endian>
10604 int
10605 Target_arm<big_endian>::get_secondary_compatible_arch(
10606     const Attributes_section_data* pasd)
10607 {
10608   const Object_attribute* known_attributes =
10609     pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10610
10611   // Note: the tag and its argument below are uleb128 values, though
10612   // currently-defined values fit in one byte for each.
10613   const std::string& sv =
10614     known_attributes[elfcpp::Tag_also_compatible_with].string_value();
10615   if (sv.size() == 2
10616       && sv.data()[0] == elfcpp::Tag_CPU_arch
10617       && (sv.data()[1] & 128) != 128)
10618    return sv.data()[1];
10619
10620   // This tag is "safely ignorable", so don't complain if it looks funny.
10621   return -1;
10622 }
10623
10624 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10625 // The tag is removed if ARCH is -1.
10626 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10627
10628 template<bool big_endian>
10629 void
10630 Target_arm<big_endian>::set_secondary_compatible_arch(
10631     Attributes_section_data* pasd,
10632     int arch)
10633 {
10634   Object_attribute* known_attributes =
10635     pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10636
10637   if (arch == -1)
10638     {
10639       known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
10640       return;
10641     }
10642
10643   // Note: the tag and its argument below are uleb128 values, though
10644   // currently-defined values fit in one byte for each.
10645   char sv[3];
10646   sv[0] = elfcpp::Tag_CPU_arch;
10647   gold_assert(arch != 0);
10648   sv[1] = arch;
10649   sv[2] = '\0';
10650
10651   known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
10652 }
10653
10654 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10655 // into account.
10656 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10657
10658 template<bool big_endian>
10659 int
10660 Target_arm<big_endian>::tag_cpu_arch_combine(
10661     const char* name,
10662     int oldtag,
10663     int* secondary_compat_out,
10664     int newtag,
10665     int secondary_compat)
10666 {
10667 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10668   static const int v6t2[] =
10669     {
10670       T(V6T2),   // PRE_V4.
10671       T(V6T2),   // V4.
10672       T(V6T2),   // V4T.
10673       T(V6T2),   // V5T.
10674       T(V6T2),   // V5TE.
10675       T(V6T2),   // V5TEJ.
10676       T(V6T2),   // V6.
10677       T(V7),     // V6KZ.
10678       T(V6T2)    // V6T2.
10679     };
10680   static const int v6k[] =
10681     {
10682       T(V6K),    // PRE_V4.
10683       T(V6K),    // V4.
10684       T(V6K),    // V4T.
10685       T(V6K),    // V5T.
10686       T(V6K),    // V5TE.
10687       T(V6K),    // V5TEJ.
10688       T(V6K),    // V6.
10689       T(V6KZ),   // V6KZ.
10690       T(V7),     // V6T2.
10691       T(V6K)     // V6K.
10692     };
10693   static const int v7[] =
10694     {
10695       T(V7),     // PRE_V4.
10696       T(V7),     // V4.
10697       T(V7),     // V4T.
10698       T(V7),     // V5T.
10699       T(V7),     // V5TE.
10700       T(V7),     // V5TEJ.
10701       T(V7),     // V6.
10702       T(V7),     // V6KZ.
10703       T(V7),     // V6T2.
10704       T(V7),     // V6K.
10705       T(V7)      // V7.
10706     };
10707   static const int v6_m[] =
10708     {
10709       -1,        // PRE_V4.
10710       -1,        // V4.
10711       T(V6K),    // V4T.
10712       T(V6K),    // V5T.
10713       T(V6K),    // V5TE.
10714       T(V6K),    // V5TEJ.
10715       T(V6K),    // V6.
10716       T(V6KZ),   // V6KZ.
10717       T(V7),     // V6T2.
10718       T(V6K),    // V6K.
10719       T(V7),     // V7.
10720       T(V6_M)    // V6_M.
10721     };
10722   static const int v6s_m[] =
10723     {
10724       -1,        // PRE_V4.
10725       -1,        // V4.
10726       T(V6K),    // V4T.
10727       T(V6K),    // V5T.
10728       T(V6K),    // V5TE.
10729       T(V6K),    // V5TEJ.
10730       T(V6K),    // V6.
10731       T(V6KZ),   // V6KZ.
10732       T(V7),     // V6T2.
10733       T(V6K),    // V6K.
10734       T(V7),     // V7.
10735       T(V6S_M),  // V6_M.
10736       T(V6S_M)   // V6S_M.
10737     };
10738   static const int v7e_m[] =
10739     {
10740       -1,       // PRE_V4.
10741       -1,       // V4.
10742       T(V7E_M), // V4T.
10743       T(V7E_M), // V5T.
10744       T(V7E_M), // V5TE.
10745       T(V7E_M), // V5TEJ.
10746       T(V7E_M), // V6.
10747       T(V7E_M), // V6KZ.
10748       T(V7E_M), // V6T2.
10749       T(V7E_M), // V6K.
10750       T(V7E_M), // V7.
10751       T(V7E_M), // V6_M.
10752       T(V7E_M), // V6S_M.
10753       T(V7E_M)  // V7E_M.
10754     };
10755   static const int v4t_plus_v6_m[] =
10756     {
10757       -1,               // PRE_V4.
10758       -1,               // V4.
10759       T(V4T),           // V4T.
10760       T(V5T),           // V5T.
10761       T(V5TE),          // V5TE.
10762       T(V5TEJ),         // V5TEJ.
10763       T(V6),            // V6.
10764       T(V6KZ),          // V6KZ.
10765       T(V6T2),          // V6T2.
10766       T(V6K),           // V6K.
10767       T(V7),            // V7.
10768       T(V6_M),          // V6_M.
10769       T(V6S_M),         // V6S_M.
10770       T(V7E_M),         // V7E_M.
10771       T(V4T_PLUS_V6_M)  // V4T plus V6_M.
10772     };
10773   static const int* comb[] =
10774     {
10775       v6t2,
10776       v6k,
10777       v7,
10778       v6_m,
10779       v6s_m,
10780       v7e_m,
10781       // Pseudo-architecture.
10782       v4t_plus_v6_m
10783     };
10784
10785   // Check we've not got a higher architecture than we know about.
10786
10787   if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH)
10788     {
10789       gold_error(_("%s: unknown CPU architecture"), name);
10790       return -1;
10791     }
10792
10793   // Override old tag if we have a Tag_also_compatible_with on the output.
10794
10795   if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10796       || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10797     oldtag = T(V4T_PLUS_V6_M);
10798
10799   // And override the new tag if we have a Tag_also_compatible_with on the
10800   // input.
10801
10802   if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10803       || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10804     newtag = T(V4T_PLUS_V6_M);
10805
10806   // Architectures before V6KZ add features monotonically.
10807   int tagh = std::max(oldtag, newtag);
10808   if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
10809     return tagh;
10810
10811   int tagl = std::min(oldtag, newtag);
10812   int result = comb[tagh - T(V6T2)][tagl];
10813
10814   // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10815   // as the canonical version.
10816   if (result == T(V4T_PLUS_V6_M))
10817     {
10818       result = T(V4T);
10819       *secondary_compat_out = T(V6_M);
10820     }
10821   else
10822     *secondary_compat_out = -1;
10823
10824   if (result == -1)
10825     {
10826       gold_error(_("%s: conflicting CPU architectures %d/%d"),
10827                  name, oldtag, newtag);
10828       return -1;
10829     }
10830
10831   return result;
10832 #undef T
10833 }
10834
10835 // Helper to print AEABI enum tag value.
10836
10837 template<bool big_endian>
10838 std::string
10839 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
10840 {
10841   static const char* aeabi_enum_names[] =
10842     { "", "variable-size", "32-bit", "" };
10843   const size_t aeabi_enum_names_size =
10844     sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
10845
10846   if (value < aeabi_enum_names_size)
10847     return std::string(aeabi_enum_names[value]);
10848   else
10849     {
10850       char buffer[100];
10851       sprintf(buffer, "<unknown value %u>", value);
10852       return std::string(buffer);
10853     }
10854 }
10855
10856 // Return the string value to store in TAG_CPU_name.
10857
10858 template<bool big_endian>
10859 std::string
10860 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
10861 {
10862   static const char* name_table[] = {
10863     // These aren't real CPU names, but we can't guess
10864     // that from the architecture version alone.
10865    "Pre v4",
10866    "ARM v4",
10867    "ARM v4T",
10868    "ARM v5T",
10869    "ARM v5TE",
10870    "ARM v5TEJ",
10871    "ARM v6",
10872    "ARM v6KZ",
10873    "ARM v6T2",
10874    "ARM v6K",
10875    "ARM v7",
10876    "ARM v6-M",
10877    "ARM v6S-M",
10878    "ARM v7E-M"
10879  };
10880  const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
10881
10882   if (value < name_table_size)
10883     return std::string(name_table[value]);
10884   else
10885     {
10886       char buffer[100];
10887       sprintf(buffer, "<unknown CPU value %u>", value);
10888       return std::string(buffer);
10889     }
10890 }
10891
10892 // Query attributes object to see if integer divide instructions may be
10893 // present in an object.
10894
10895 template<bool big_endian>
10896 bool
10897 Target_arm<big_endian>::attributes_accept_div(int arch, int profile,
10898     const Object_attribute* div_attr)
10899 {
10900   switch (div_attr->int_value())
10901     {
10902     case 0:
10903       // Integer divide allowed if instruction contained in
10904       // archetecture.
10905       if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
10906         return true;
10907       else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M)
10908         return true;
10909       else
10910         return false;
10911
10912     case 1:
10913       // Integer divide explicitly prohibited.
10914       return false;
10915
10916     default:
10917       // Unrecognised case - treat as allowing divide everywhere.
10918     case 2:
10919       // Integer divide allowed in ARM state.
10920       return true;
10921     }
10922 }
10923
10924 // Query attributes object to see if integer divide instructions are
10925 // forbidden to be in the object.  This is not the inverse of
10926 // attributes_accept_div.
10927
10928 template<bool big_endian>
10929 bool
10930 Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr)
10931 {
10932   return div_attr->int_value() == 1;
10933 }
10934
10935 // Merge object attributes from input file called NAME with those of the
10936 // output.  The input object attributes are in the object pointed by PASD.
10937
10938 template<bool big_endian>
10939 void
10940 Target_arm<big_endian>::merge_object_attributes(
10941     const char* name,
10942     const Attributes_section_data* pasd)
10943 {
10944   // Return if there is no attributes section data.
10945   if (pasd == NULL)
10946     return;
10947
10948   // If output has no object attributes, just copy.
10949   const int vendor = Object_attribute::OBJ_ATTR_PROC;
10950   if (this->attributes_section_data_ == NULL)
10951     {
10952       this->attributes_section_data_ = new Attributes_section_data(*pasd);
10953       Object_attribute* out_attr =
10954         this->attributes_section_data_->known_attributes(vendor);
10955
10956       // We do not output objects with Tag_MPextension_use_legacy - we move
10957       //  the attribute's value to Tag_MPextension_use.  */
10958       if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0)
10959         {
10960           if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0
10961               && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value()
10962                 != out_attr[elfcpp::Tag_MPextension_use].int_value())
10963             {
10964               gold_error(_("%s has both the current and legacy "
10965                            "Tag_MPextension_use attributes"),
10966                          name);
10967             }
10968
10969           out_attr[elfcpp::Tag_MPextension_use] =
10970             out_attr[elfcpp::Tag_MPextension_use_legacy];
10971           out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0);
10972           out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0);
10973         }
10974
10975       return;
10976     }
10977
10978   const Object_attribute* in_attr = pasd->known_attributes(vendor);
10979   Object_attribute* out_attr =
10980     this->attributes_section_data_->known_attributes(vendor);
10981
10982   // This needs to happen before Tag_ABI_FP_number_model is merged.  */
10983   if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
10984       != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
10985     {
10986       // Ignore mismatches if the object doesn't use floating point.  */
10987       if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
10988           == elfcpp::AEABI_FP_number_model_none
10989           || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
10990               != elfcpp::AEABI_FP_number_model_none
10991               && out_attr[elfcpp::Tag_ABI_VFP_args].int_value()
10992                  == elfcpp::AEABI_VFP_args_compatible))
10993         out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
10994             in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
10995       else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
10996                != elfcpp::AEABI_FP_number_model_none
10997                && in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
10998                   != elfcpp::AEABI_VFP_args_compatible
10999                && parameters->options().warn_mismatch())
11000         gold_error(_("%s uses VFP register arguments, output does not"),
11001                    name);
11002     }
11003
11004   for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
11005     {
11006       // Merge this attribute with existing attributes.
11007       switch (i)
11008         {
11009         case elfcpp::Tag_CPU_raw_name:
11010         case elfcpp::Tag_CPU_name:
11011           // These are merged after Tag_CPU_arch.
11012           break;
11013
11014         case elfcpp::Tag_ABI_optimization_goals:
11015         case elfcpp::Tag_ABI_FP_optimization_goals:
11016           // Use the first value seen.
11017           break;
11018
11019         case elfcpp::Tag_CPU_arch:
11020           {
11021             unsigned int saved_out_attr = out_attr->int_value();
11022             // Merge Tag_CPU_arch and Tag_also_compatible_with.
11023             int secondary_compat =
11024               this->get_secondary_compatible_arch(pasd);
11025             int secondary_compat_out =
11026               this->get_secondary_compatible_arch(
11027                   this->attributes_section_data_);
11028             out_attr[i].set_int_value(
11029                 tag_cpu_arch_combine(name, out_attr[i].int_value(),
11030                                      &secondary_compat_out,
11031                                      in_attr[i].int_value(),
11032                                      secondary_compat));
11033             this->set_secondary_compatible_arch(this->attributes_section_data_,
11034                                                 secondary_compat_out);
11035
11036             // Merge Tag_CPU_name and Tag_CPU_raw_name.
11037             if (out_attr[i].int_value() == saved_out_attr)
11038               ; // Leave the names alone.
11039             else if (out_attr[i].int_value() == in_attr[i].int_value())
11040               {
11041                 // The output architecture has been changed to match the
11042                 // input architecture.  Use the input names.
11043                 out_attr[elfcpp::Tag_CPU_name].set_string_value(
11044                     in_attr[elfcpp::Tag_CPU_name].string_value());
11045                 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
11046                     in_attr[elfcpp::Tag_CPU_raw_name].string_value());
11047               }
11048             else
11049               {
11050                 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
11051                 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
11052               }
11053
11054             // If we still don't have a value for Tag_CPU_name,
11055             // make one up now.  Tag_CPU_raw_name remains blank.
11056             if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
11057               {
11058                 const std::string cpu_name =
11059                   this->tag_cpu_name_value(out_attr[i].int_value());
11060                 // FIXME:  If we see an unknown CPU, this will be set
11061                 // to "<unknown CPU n>", where n is the attribute value.
11062                 // This is different from BFD, which leaves the name alone.
11063                 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
11064               }
11065           }
11066           break;
11067
11068         case elfcpp::Tag_ARM_ISA_use:
11069         case elfcpp::Tag_THUMB_ISA_use:
11070         case elfcpp::Tag_WMMX_arch:
11071         case elfcpp::Tag_Advanced_SIMD_arch:
11072           // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11073         case elfcpp::Tag_ABI_FP_rounding:
11074         case elfcpp::Tag_ABI_FP_exceptions:
11075         case elfcpp::Tag_ABI_FP_user_exceptions:
11076         case elfcpp::Tag_ABI_FP_number_model:
11077         case elfcpp::Tag_VFP_HP_extension:
11078         case elfcpp::Tag_CPU_unaligned_access:
11079         case elfcpp::Tag_T2EE_use:
11080         case elfcpp::Tag_Virtualization_use:
11081         case elfcpp::Tag_MPextension_use:
11082           // Use the largest value specified.
11083           if (in_attr[i].int_value() > out_attr[i].int_value())
11084             out_attr[i].set_int_value(in_attr[i].int_value());
11085           break;
11086
11087         case elfcpp::Tag_ABI_align8_preserved:
11088         case elfcpp::Tag_ABI_PCS_RO_data:
11089           // Use the smallest value specified.
11090           if (in_attr[i].int_value() < out_attr[i].int_value())
11091             out_attr[i].set_int_value(in_attr[i].int_value());
11092           break;
11093
11094         case elfcpp::Tag_ABI_align8_needed:
11095           if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
11096               && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
11097                   || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
11098                       == 0)))
11099             {
11100               // This error message should be enabled once all non-conforming
11101               // binaries in the toolchain have had the attributes set
11102               // properly.
11103               // gold_error(_("output 8-byte data alignment conflicts with %s"),
11104               //            name);
11105             }
11106           // Fall through.
11107         case elfcpp::Tag_ABI_FP_denormal:
11108         case elfcpp::Tag_ABI_PCS_GOT_use:
11109           {
11110             // These tags have 0 = don't care, 1 = strong requirement,
11111             // 2 = weak requirement.
11112             static const int order_021[3] = {0, 2, 1};
11113
11114             // Use the "greatest" from the sequence 0, 2, 1, or the largest
11115             // value if greater than 2 (for future-proofing).
11116             if ((in_attr[i].int_value() > 2
11117                  && in_attr[i].int_value() > out_attr[i].int_value())
11118                 || (in_attr[i].int_value() <= 2
11119                     && out_attr[i].int_value() <= 2
11120                     && (order_021[in_attr[i].int_value()]
11121                         > order_021[out_attr[i].int_value()])))
11122               out_attr[i].set_int_value(in_attr[i].int_value());
11123           }
11124           break;
11125
11126         case elfcpp::Tag_CPU_arch_profile:
11127           if (out_attr[i].int_value() != in_attr[i].int_value())
11128             {
11129               // 0 will merge with anything.
11130               // 'A' and 'S' merge to 'A'.
11131               // 'R' and 'S' merge to 'R'.
11132               // 'M' and 'A|R|S' is an error.
11133               if (out_attr[i].int_value() == 0
11134                   || (out_attr[i].int_value() == 'S'
11135                       && (in_attr[i].int_value() == 'A'
11136                           || in_attr[i].int_value() == 'R')))
11137                 out_attr[i].set_int_value(in_attr[i].int_value());
11138               else if (in_attr[i].int_value() == 0
11139                        || (in_attr[i].int_value() == 'S'
11140                            && (out_attr[i].int_value() == 'A'
11141                                || out_attr[i].int_value() == 'R')))
11142                 ; // Do nothing.
11143               else if (parameters->options().warn_mismatch())
11144                 {
11145                   gold_error
11146                     (_("conflicting architecture profiles %c/%c"),
11147                      in_attr[i].int_value() ? in_attr[i].int_value() : '0',
11148                      out_attr[i].int_value() ? out_attr[i].int_value() : '0');
11149                 }
11150             }
11151           break;
11152         case elfcpp::Tag_VFP_arch:
11153             {
11154               static const struct
11155               {
11156                   int ver;
11157                   int regs;
11158               } vfp_versions[7] =
11159                 {
11160                   {0, 0},
11161                   {1, 16},
11162                   {2, 16},
11163                   {3, 32},
11164                   {3, 16},
11165                   {4, 32},
11166                   {4, 16}
11167                 };
11168
11169               // Values greater than 6 aren't defined, so just pick the
11170               // biggest.
11171               if (in_attr[i].int_value() > 6
11172                   && in_attr[i].int_value() > out_attr[i].int_value())
11173                 {
11174                   *out_attr = *in_attr;
11175                   break;
11176                 }
11177               // The output uses the superset of input features
11178               // (ISA version) and registers.
11179               int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
11180                                  vfp_versions[out_attr[i].int_value()].ver);
11181               int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
11182                                   vfp_versions[out_attr[i].int_value()].regs);
11183               // This assumes all possible supersets are also a valid
11184               // options.
11185               int newval;
11186               for (newval = 6; newval > 0; newval--)
11187                 {
11188                   if (regs == vfp_versions[newval].regs
11189                       && ver == vfp_versions[newval].ver)
11190                     break;
11191                 }
11192               out_attr[i].set_int_value(newval);
11193             }
11194           break;
11195         case elfcpp::Tag_PCS_config:
11196           if (out_attr[i].int_value() == 0)
11197             out_attr[i].set_int_value(in_attr[i].int_value());
11198           else if (in_attr[i].int_value() != 0
11199                    && out_attr[i].int_value() != 0
11200                    && parameters->options().warn_mismatch())
11201             {
11202               // It's sometimes ok to mix different configs, so this is only
11203               // a warning.
11204               gold_warning(_("%s: conflicting platform configuration"), name);
11205             }
11206           break;
11207         case elfcpp::Tag_ABI_PCS_R9_use:
11208           if (in_attr[i].int_value() != out_attr[i].int_value()
11209               && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
11210               && in_attr[i].int_value() != elfcpp::AEABI_R9_unused
11211               && parameters->options().warn_mismatch())
11212             {
11213               gold_error(_("%s: conflicting use of R9"), name);
11214             }
11215           if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
11216             out_attr[i].set_int_value(in_attr[i].int_value());
11217           break;
11218         case elfcpp::Tag_ABI_PCS_RW_data:
11219           if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11220               && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11221                   != elfcpp::AEABI_R9_SB)
11222               && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11223                   != elfcpp::AEABI_R9_unused)
11224               && parameters->options().warn_mismatch())
11225             {
11226               gold_error(_("%s: SB relative addressing conflicts with use "
11227                            "of R9"),
11228                            name);
11229             }
11230           // Use the smallest value specified.
11231           if (in_attr[i].int_value() < out_attr[i].int_value())
11232             out_attr[i].set_int_value(in_attr[i].int_value());
11233           break;
11234         case elfcpp::Tag_ABI_PCS_wchar_t:
11235           if (out_attr[i].int_value()
11236               && in_attr[i].int_value()
11237               && out_attr[i].int_value() != in_attr[i].int_value()
11238               && parameters->options().warn_mismatch()
11239               && parameters->options().wchar_size_warning())
11240             {
11241               gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11242                              "use %u-byte wchar_t; use of wchar_t values "
11243                              "across objects may fail"),
11244                            name, in_attr[i].int_value(),
11245                            out_attr[i].int_value());
11246             }
11247           else if (in_attr[i].int_value() && !out_attr[i].int_value())
11248             out_attr[i].set_int_value(in_attr[i].int_value());
11249           break;
11250         case elfcpp::Tag_ABI_enum_size:
11251           if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
11252             {
11253               if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
11254                   || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
11255                 {
11256                   // The existing object is compatible with anything.
11257                   // Use whatever requirements the new object has.
11258                   out_attr[i].set_int_value(in_attr[i].int_value());
11259                 }
11260               else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
11261                        && out_attr[i].int_value() != in_attr[i].int_value()
11262                        && parameters->options().warn_mismatch()
11263                        && parameters->options().enum_size_warning())
11264                 {
11265                   unsigned int in_value = in_attr[i].int_value();
11266                   unsigned int out_value = out_attr[i].int_value();
11267                   gold_warning(_("%s uses %s enums yet the output is to use "
11268                                  "%s enums; use of enum values across objects "
11269                                  "may fail"),
11270                                name,
11271                                this->aeabi_enum_name(in_value).c_str(),
11272                                this->aeabi_enum_name(out_value).c_str());
11273                 }
11274             }
11275           break;
11276         case elfcpp::Tag_ABI_VFP_args:
11277           // Already done.
11278           break;
11279         case elfcpp::Tag_ABI_WMMX_args:
11280           if (in_attr[i].int_value() != out_attr[i].int_value()
11281               && parameters->options().warn_mismatch())
11282             {
11283               gold_error(_("%s uses iWMMXt register arguments, output does "
11284                            "not"),
11285                          name);
11286             }
11287           break;
11288         case Object_attribute::Tag_compatibility:
11289           // Merged in target-independent code.
11290           break;
11291         case elfcpp::Tag_ABI_HardFP_use:
11292           // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11293           if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
11294               || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
11295             out_attr[i].set_int_value(3);
11296           else if (in_attr[i].int_value() > out_attr[i].int_value())
11297             out_attr[i].set_int_value(in_attr[i].int_value());
11298           break;
11299         case elfcpp::Tag_ABI_FP_16bit_format:
11300           if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
11301             {
11302               if (in_attr[i].int_value() != out_attr[i].int_value()
11303                   && parameters->options().warn_mismatch())
11304                 gold_error(_("fp16 format mismatch between %s and output"),
11305                            name);
11306             }
11307           if (in_attr[i].int_value() != 0)
11308             out_attr[i].set_int_value(in_attr[i].int_value());
11309           break;
11310
11311         case elfcpp::Tag_DIV_use:
11312           {
11313             // A value of zero on input means that the divide
11314             // instruction may be used if available in the base
11315             // architecture as specified via Tag_CPU_arch and
11316             // Tag_CPU_arch_profile.  A value of 1 means that the user
11317             // did not want divide instructions.  A value of 2
11318             // explicitly means that divide instructions were allowed
11319             // in ARM and Thumb state.
11320             int arch = this->
11321               get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)->
11322               int_value();
11323             int profile = this->
11324               get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)->
11325               int_value();
11326             if (in_attr[i].int_value() == out_attr[i].int_value())
11327               {
11328                 // Do nothing.
11329               }
11330             else if (attributes_forbid_div(&in_attr[i])
11331                      && !attributes_accept_div(arch, profile, &out_attr[i]))
11332               out_attr[i].set_int_value(1);
11333             else if (attributes_forbid_div(&out_attr[i])
11334                      && attributes_accept_div(arch, profile, &in_attr[i]))
11335               out_attr[i].set_int_value(in_attr[i].int_value());
11336             else if (in_attr[i].int_value() == 2)
11337               out_attr[i].set_int_value(in_attr[i].int_value());
11338           }
11339           break;
11340
11341         case elfcpp::Tag_MPextension_use_legacy:
11342           // We don't output objects with Tag_MPextension_use_legacy - we
11343           // move the value to Tag_MPextension_use.
11344           if (in_attr[i].int_value() != 0
11345               && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0)
11346             {
11347               if (in_attr[elfcpp::Tag_MPextension_use].int_value()
11348                   != in_attr[i].int_value())
11349                 {
11350                   gold_error(_("%s has has both the current and legacy "
11351                                "Tag_MPextension_use attributes"),
11352                              name);
11353                 }
11354             }
11355
11356           if (in_attr[i].int_value()
11357               > out_attr[elfcpp::Tag_MPextension_use].int_value())
11358             out_attr[elfcpp::Tag_MPextension_use] = in_attr[i];
11359
11360           break;
11361
11362         case elfcpp::Tag_nodefaults:
11363           // This tag is set if it exists, but the value is unused (and is
11364           // typically zero).  We don't actually need to do anything here -
11365           // the merge happens automatically when the type flags are merged
11366           // below.
11367           break;
11368         case elfcpp::Tag_also_compatible_with:
11369           // Already done in Tag_CPU_arch.
11370           break;
11371         case elfcpp::Tag_conformance:
11372           // Keep the attribute if it matches.  Throw it away otherwise.
11373           // No attribute means no claim to conform.
11374           if (in_attr[i].string_value() != out_attr[i].string_value())
11375             out_attr[i].set_string_value("");
11376           break;
11377
11378         default:
11379           {
11380             const char* err_object = NULL;
11381
11382             // The "known_obj_attributes" table does contain some undefined
11383             // attributes.  Ensure that there are unused.
11384             if (out_attr[i].int_value() != 0
11385                 || out_attr[i].string_value() != "")
11386               err_object = "output";
11387             else if (in_attr[i].int_value() != 0
11388                      || in_attr[i].string_value() != "")
11389               err_object = name;
11390
11391             if (err_object != NULL
11392                 && parameters->options().warn_mismatch())
11393               {
11394                 // Attribute numbers >=64 (mod 128) can be safely ignored.
11395                 if ((i & 127) < 64)
11396                   gold_error(_("%s: unknown mandatory EABI object attribute "
11397                                "%d"),
11398                              err_object, i);
11399                 else
11400                   gold_warning(_("%s: unknown EABI object attribute %d"),
11401                                err_object, i);
11402               }
11403
11404             // Only pass on attributes that match in both inputs.
11405             if (!in_attr[i].matches(out_attr[i]))
11406               {
11407                 out_attr[i].set_int_value(0);
11408                 out_attr[i].set_string_value("");
11409               }
11410           }
11411         }
11412
11413       // If out_attr was copied from in_attr then it won't have a type yet.
11414       if (in_attr[i].type() && !out_attr[i].type())
11415         out_attr[i].set_type(in_attr[i].type());
11416     }
11417
11418   // Merge Tag_compatibility attributes and any common GNU ones.
11419   this->attributes_section_data_->merge(name, pasd);
11420
11421   // Check for any attributes not known on ARM.
11422   typedef Vendor_object_attributes::Other_attributes Other_attributes;
11423   const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
11424   Other_attributes::const_iterator in_iter = in_other_attributes->begin();
11425   Other_attributes* out_other_attributes =
11426     this->attributes_section_data_->other_attributes(vendor);
11427   Other_attributes::iterator out_iter = out_other_attributes->begin();
11428
11429   while (in_iter != in_other_attributes->end()
11430          || out_iter != out_other_attributes->end())
11431     {
11432       const char* err_object = NULL;
11433       int err_tag = 0;
11434
11435       // The tags for each list are in numerical order.
11436       // If the tags are equal, then merge.
11437       if (out_iter != out_other_attributes->end()
11438           && (in_iter == in_other_attributes->end()
11439               || in_iter->first > out_iter->first))
11440         {
11441           // This attribute only exists in output.  We can't merge, and we
11442           // don't know what the tag means, so delete it.
11443           err_object = "output";
11444           err_tag = out_iter->first;
11445           int saved_tag = out_iter->first;
11446           delete out_iter->second;
11447           out_other_attributes->erase(out_iter);
11448           out_iter = out_other_attributes->upper_bound(saved_tag);
11449         }
11450       else if (in_iter != in_other_attributes->end()
11451                && (out_iter != out_other_attributes->end()
11452                    || in_iter->first < out_iter->first))
11453         {
11454           // This attribute only exists in input. We can't merge, and we
11455           // don't know what the tag means, so ignore it.
11456           err_object = name;
11457           err_tag = in_iter->first;
11458           ++in_iter;
11459         }
11460       else // The tags are equal.
11461         {
11462           // As present, all attributes in the list are unknown, and
11463           // therefore can't be merged meaningfully.
11464           err_object = "output";
11465           err_tag = out_iter->first;
11466
11467           //  Only pass on attributes that match in both inputs.
11468           if (!in_iter->second->matches(*(out_iter->second)))
11469             {
11470               // No match.  Delete the attribute.
11471               int saved_tag = out_iter->first;
11472               delete out_iter->second;
11473               out_other_attributes->erase(out_iter);
11474               out_iter = out_other_attributes->upper_bound(saved_tag);
11475             }
11476           else
11477             {
11478               // Matched.  Keep the attribute and move to the next.
11479               ++out_iter;
11480               ++in_iter;
11481             }
11482         }
11483
11484       if (err_object && parameters->options().warn_mismatch())
11485         {
11486           // Attribute numbers >=64 (mod 128) can be safely ignored.  */
11487           if ((err_tag & 127) < 64)
11488             {
11489               gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11490                          err_object, err_tag);
11491             }
11492           else
11493             {
11494               gold_warning(_("%s: unknown EABI object attribute %d"),
11495                            err_object, err_tag);
11496             }
11497         }
11498     }
11499 }
11500
11501 // Stub-generation methods for Target_arm.
11502
11503 // Make a new Arm_input_section object.
11504
11505 template<bool big_endian>
11506 Arm_input_section<big_endian>*
11507 Target_arm<big_endian>::new_arm_input_section(
11508     Relobj* relobj,
11509     unsigned int shndx)
11510 {
11511   Section_id sid(relobj, shndx);
11512
11513   Arm_input_section<big_endian>* arm_input_section =
11514     new Arm_input_section<big_endian>(relobj, shndx);
11515   arm_input_section->init();
11516
11517   // Register new Arm_input_section in map for look-up.
11518   std::pair<typename Arm_input_section_map::iterator, bool> ins =
11519     this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
11520
11521   // Make sure that it we have not created another Arm_input_section
11522   // for this input section already.
11523   gold_assert(ins.second);
11524
11525   return arm_input_section;
11526 }
11527
11528 // Find the Arm_input_section object corresponding to the SHNDX-th input
11529 // section of RELOBJ.
11530
11531 template<bool big_endian>
11532 Arm_input_section<big_endian>*
11533 Target_arm<big_endian>::find_arm_input_section(
11534     Relobj* relobj,
11535     unsigned int shndx) const
11536 {
11537   Section_id sid(relobj, shndx);
11538   typename Arm_input_section_map::const_iterator p =
11539     this->arm_input_section_map_.find(sid);
11540   return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
11541 }
11542
11543 // Make a new stub table.
11544
11545 template<bool big_endian>
11546 Stub_table<big_endian>*
11547 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
11548 {
11549   Stub_table<big_endian>* stub_table =
11550     new Stub_table<big_endian>(owner);
11551   this->stub_tables_.push_back(stub_table);
11552
11553   stub_table->set_address(owner->address() + owner->data_size());
11554   stub_table->set_file_offset(owner->offset() + owner->data_size());
11555   stub_table->finalize_data_size();
11556
11557   return stub_table;
11558 }
11559
11560 // Scan a relocation for stub generation.
11561
11562 template<bool big_endian>
11563 void
11564 Target_arm<big_endian>::scan_reloc_for_stub(
11565     const Relocate_info<32, big_endian>* relinfo,
11566     unsigned int r_type,
11567     const Sized_symbol<32>* gsym,
11568     unsigned int r_sym,
11569     const Symbol_value<32>* psymval,
11570     elfcpp::Elf_types<32>::Elf_Swxword addend,
11571     Arm_address address)
11572 {
11573   const Arm_relobj<big_endian>* arm_relobj =
11574     Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11575
11576   bool target_is_thumb;
11577   Symbol_value<32> symval;
11578   if (gsym != NULL)
11579     {
11580       // This is a global symbol.  Determine if we use PLT and if the
11581       // final target is THUMB.
11582       if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
11583         {
11584           // This uses a PLT, change the symbol value.
11585           symval.set_output_value(this->plt_address_for_global(gsym));
11586           psymval = &symval;
11587           target_is_thumb = false;
11588         }
11589       else if (gsym->is_undefined())
11590         // There is no need to generate a stub symbol is undefined.
11591         return;
11592       else
11593         {
11594           target_is_thumb =
11595             ((gsym->type() == elfcpp::STT_ARM_TFUNC)
11596              || (gsym->type() == elfcpp::STT_FUNC
11597                  && !gsym->is_undefined()
11598                  && ((psymval->value(arm_relobj, 0) & 1) != 0)));
11599         }
11600     }
11601   else
11602     {
11603       // This is a local symbol.  Determine if the final target is THUMB.
11604       target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
11605     }
11606
11607   // Strip LSB if this points to a THUMB target.
11608   const Arm_reloc_property* reloc_property =
11609     arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
11610   gold_assert(reloc_property != NULL);
11611   if (target_is_thumb
11612       && reloc_property->uses_thumb_bit()
11613       && ((psymval->value(arm_relobj, 0) & 1) != 0))
11614     {
11615       Arm_address stripped_value =
11616         psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
11617       symval.set_output_value(stripped_value);
11618       psymval = &symval;
11619     }
11620
11621   // Get the symbol value.
11622   Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
11623
11624   // Owing to pipelining, the PC relative branches below actually skip
11625   // two instructions when the branch offset is 0.
11626   Arm_address destination;
11627   switch (r_type)
11628     {
11629     case elfcpp::R_ARM_CALL:
11630     case elfcpp::R_ARM_JUMP24:
11631     case elfcpp::R_ARM_PLT32:
11632       // ARM branches.
11633       destination = value + addend + 8;
11634       break;
11635     case elfcpp::R_ARM_THM_CALL:
11636     case elfcpp::R_ARM_THM_XPC22:
11637     case elfcpp::R_ARM_THM_JUMP24:
11638     case elfcpp::R_ARM_THM_JUMP19:
11639       // THUMB branches.
11640       destination = value + addend + 4;
11641       break;
11642     default:
11643       gold_unreachable();
11644     }
11645
11646   Reloc_stub* stub = NULL;
11647   Stub_type stub_type =
11648     Reloc_stub::stub_type_for_reloc(r_type, address, destination,
11649                                     target_is_thumb);
11650   if (stub_type != arm_stub_none)
11651     {
11652       // Try looking up an existing stub from a stub table.
11653       Stub_table<big_endian>* stub_table =
11654         arm_relobj->stub_table(relinfo->data_shndx);
11655       gold_assert(stub_table != NULL);
11656
11657       // Locate stub by destination.
11658       Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
11659
11660       // Create a stub if there is not one already
11661       stub = stub_table->find_reloc_stub(stub_key);
11662       if (stub == NULL)
11663         {
11664           // create a new stub and add it to stub table.
11665           stub = this->stub_factory().make_reloc_stub(stub_type);
11666           stub_table->add_reloc_stub(stub, stub_key);
11667         }
11668
11669       // Record the destination address.
11670       stub->set_destination_address(destination
11671                                     | (target_is_thumb ? 1 : 0));
11672     }
11673
11674   // For Cortex-A8, we need to record a relocation at 4K page boundary.
11675   if (this->fix_cortex_a8_
11676       && (r_type == elfcpp::R_ARM_THM_JUMP24
11677           || r_type == elfcpp::R_ARM_THM_JUMP19
11678           || r_type == elfcpp::R_ARM_THM_CALL
11679           || r_type == elfcpp::R_ARM_THM_XPC22)
11680       && (address & 0xfffU) == 0xffeU)
11681     {
11682       // Found a candidate.  Note we haven't checked the destination is
11683       // within 4K here: if we do so (and don't create a record) we can't
11684       // tell that a branch should have been relocated when scanning later.
11685       this->cortex_a8_relocs_info_[address] =
11686         new Cortex_a8_reloc(stub, r_type,
11687                             destination | (target_is_thumb ? 1 : 0));
11688     }
11689 }
11690
11691 // This function scans a relocation sections for stub generation.
11692 // The template parameter Relocate must be a class type which provides
11693 // a single function, relocate(), which implements the machine
11694 // specific part of a relocation.
11695
11696 // BIG_ENDIAN is the endianness of the data.  SH_TYPE is the section type:
11697 // SHT_REL or SHT_RELA.
11698
11699 // PRELOCS points to the relocation data.  RELOC_COUNT is the number
11700 // of relocs.  OUTPUT_SECTION is the output section.
11701 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11702 // mapped to output offsets.
11703
11704 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11705 // VIEW_SIZE is the size.  These refer to the input section, unless
11706 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11707 // the output section.
11708
11709 template<bool big_endian>
11710 template<int sh_type>
11711 void inline
11712 Target_arm<big_endian>::scan_reloc_section_for_stubs(
11713     const Relocate_info<32, big_endian>* relinfo,
11714     const unsigned char* prelocs,
11715     size_t reloc_count,
11716     Output_section* output_section,
11717     bool needs_special_offset_handling,
11718     const unsigned char* view,
11719     elfcpp::Elf_types<32>::Elf_Addr view_address,
11720     section_size_type)
11721 {
11722   typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
11723   const int reloc_size =
11724     Reloc_types<sh_type, 32, big_endian>::reloc_size;
11725
11726   Arm_relobj<big_endian>* arm_object =
11727     Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11728   unsigned int local_count = arm_object->local_symbol_count();
11729
11730   gold::Default_comdat_behavior default_comdat_behavior;
11731   Comdat_behavior comdat_behavior = CB_UNDETERMINED;
11732
11733   for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
11734     {
11735       Reltype reloc(prelocs);
11736
11737       typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
11738       unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
11739       unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
11740
11741       r_type = this->get_real_reloc_type(r_type);
11742
11743       // Only a few relocation types need stubs.
11744       if ((r_type != elfcpp::R_ARM_CALL)
11745          && (r_type != elfcpp::R_ARM_JUMP24)
11746          && (r_type != elfcpp::R_ARM_PLT32)
11747          && (r_type != elfcpp::R_ARM_THM_CALL)
11748          && (r_type != elfcpp::R_ARM_THM_XPC22)
11749          && (r_type != elfcpp::R_ARM_THM_JUMP24)
11750          && (r_type != elfcpp::R_ARM_THM_JUMP19)
11751          && (r_type != elfcpp::R_ARM_V4BX))
11752         continue;
11753
11754       section_offset_type offset =
11755         convert_to_section_size_type(reloc.get_r_offset());
11756
11757       if (needs_special_offset_handling)
11758         {
11759           offset = output_section->output_offset(relinfo->object,
11760                                                  relinfo->data_shndx,
11761                                                  offset);
11762           if (offset == -1)
11763             continue;
11764         }
11765
11766       // Create a v4bx stub if --fix-v4bx-interworking is used.
11767       if (r_type == elfcpp::R_ARM_V4BX)
11768         {
11769           if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING)
11770             {
11771               // Get the BX instruction.
11772               typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
11773               const Valtype* wv =
11774                 reinterpret_cast<const Valtype*>(view + offset);
11775               elfcpp::Elf_types<32>::Elf_Swxword insn =
11776                 elfcpp::Swap<32, big_endian>::readval(wv);
11777               const uint32_t reg = (insn & 0xf);
11778
11779               if (reg < 0xf)
11780                 {
11781                   // Try looking up an existing stub from a stub table.
11782                   Stub_table<big_endian>* stub_table =
11783                     arm_object->stub_table(relinfo->data_shndx);
11784                   gold_assert(stub_table != NULL);
11785
11786                   if (stub_table->find_arm_v4bx_stub(reg) == NULL)
11787                     {
11788                       // create a new stub and add it to stub table.
11789                       Arm_v4bx_stub* stub =
11790                         this->stub_factory().make_arm_v4bx_stub(reg);
11791                       gold_assert(stub != NULL);
11792                       stub_table->add_arm_v4bx_stub(stub);
11793                     }
11794                 }
11795             }
11796           continue;
11797         }
11798
11799       // Get the addend.
11800       Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
11801       elfcpp::Elf_types<32>::Elf_Swxword addend =
11802         stub_addend_reader(r_type, view + offset, reloc);
11803
11804       const Sized_symbol<32>* sym;
11805
11806       Symbol_value<32> symval;
11807       const Symbol_value<32> *psymval;
11808       bool is_defined_in_discarded_section;
11809       unsigned int shndx;
11810       if (r_sym < local_count)
11811         {
11812           sym = NULL;
11813           psymval = arm_object->local_symbol(r_sym);
11814
11815           // If the local symbol belongs to a section we are discarding,
11816           // and that section is a debug section, try to find the
11817           // corresponding kept section and map this symbol to its
11818           // counterpart in the kept section.  The symbol must not
11819           // correspond to a section we are folding.
11820           bool is_ordinary;
11821           shndx = psymval->input_shndx(&is_ordinary);
11822           is_defined_in_discarded_section =
11823             (is_ordinary
11824              && shndx != elfcpp::SHN_UNDEF
11825              && !arm_object->is_section_included(shndx)
11826              && !relinfo->symtab->is_section_folded(arm_object, shndx));
11827
11828           // We need to compute the would-be final value of this local
11829           // symbol.
11830           if (!is_defined_in_discarded_section)
11831             {
11832               typedef Sized_relobj_file<32, big_endian> ObjType;
11833               typename ObjType::Compute_final_local_value_status status =
11834                 arm_object->compute_final_local_value(r_sym, psymval, &symval,
11835                                                       relinfo->symtab);
11836               if (status == ObjType::CFLV_OK)
11837                 {
11838                   // Currently we cannot handle a branch to a target in
11839                   // a merged section.  If this is the case, issue an error
11840                   // and also free the merge symbol value.
11841                   if (!symval.has_output_value())
11842                     {
11843                       const std::string& section_name =
11844                         arm_object->section_name(shndx);
11845                       arm_object->error(_("cannot handle branch to local %u "
11846                                           "in a merged section %s"),
11847                                         r_sym, section_name.c_str());
11848                     }
11849                   psymval = &symval;
11850                 }
11851               else
11852                 {
11853                   // We cannot determine the final value.
11854                   continue;
11855                 }
11856             }
11857         }
11858       else
11859         {
11860           const Symbol* gsym;
11861           gsym = arm_object->global_symbol(r_sym);
11862           gold_assert(gsym != NULL);
11863           if (gsym->is_forwarder())
11864             gsym = relinfo->symtab->resolve_forwards(gsym);
11865
11866           sym = static_cast<const Sized_symbol<32>*>(gsym);
11867           if (sym->has_symtab_index() && sym->symtab_index() != -1U)
11868             symval.set_output_symtab_index(sym->symtab_index());
11869           else
11870             symval.set_no_output_symtab_entry();
11871
11872           // We need to compute the would-be final value of this global
11873           // symbol.
11874           const Symbol_table* symtab = relinfo->symtab;
11875           const Sized_symbol<32>* sized_symbol =
11876             symtab->get_sized_symbol<32>(gsym);
11877           Symbol_table::Compute_final_value_status status;
11878           Arm_address value =
11879             symtab->compute_final_value<32>(sized_symbol, &status);
11880
11881           // Skip this if the symbol has not output section.
11882           if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
11883             continue;
11884           symval.set_output_value(value);
11885
11886           if (gsym->type() == elfcpp::STT_TLS)
11887             symval.set_is_tls_symbol();
11888           else if (gsym->type() == elfcpp::STT_GNU_IFUNC)
11889             symval.set_is_ifunc_symbol();
11890           psymval = &symval;
11891
11892           is_defined_in_discarded_section =
11893             (gsym->is_defined_in_discarded_section()
11894              && gsym->is_undefined());
11895           shndx = 0;
11896         }
11897
11898       Symbol_value<32> symval2;
11899       if (is_defined_in_discarded_section)
11900         {
11901           if (comdat_behavior == CB_UNDETERMINED)
11902             {
11903               std::string name = arm_object->section_name(relinfo->data_shndx);
11904               comdat_behavior = default_comdat_behavior.get(name.c_str());
11905             }
11906           if (comdat_behavior == CB_PRETEND)
11907             {
11908               // FIXME: This case does not work for global symbols.
11909               // We have no place to store the original section index.
11910               // Fortunately this does not matter for comdat sections,
11911               // only for sections explicitly discarded by a linker
11912               // script.
11913               bool found;
11914               typename elfcpp::Elf_types<32>::Elf_Addr value =
11915                 arm_object->map_to_kept_section(shndx, &found);
11916               if (found)
11917                 symval2.set_output_value(value + psymval->input_value());
11918               else
11919                 symval2.set_output_value(0);
11920             }
11921           else
11922             {
11923               if (comdat_behavior == CB_WARNING)
11924                 gold_warning_at_location(relinfo, i, offset,
11925                                          _("relocation refers to discarded "
11926                                            "section"));
11927               symval2.set_output_value(0);
11928             }
11929           symval2.set_no_output_symtab_entry();
11930           psymval = &symval2;
11931         }
11932
11933       // If symbol is a section symbol, we don't know the actual type of
11934       // destination.  Give up.
11935       if (psymval->is_section_symbol())
11936         continue;
11937
11938       this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
11939                                 addend, view_address + offset);
11940     }
11941 }
11942
11943 // Scan an input section for stub generation.
11944
11945 template<bool big_endian>
11946 void
11947 Target_arm<big_endian>::scan_section_for_stubs(
11948     const Relocate_info<32, big_endian>* relinfo,
11949     unsigned int sh_type,
11950     const unsigned char* prelocs,
11951     size_t reloc_count,
11952     Output_section* output_section,
11953     bool needs_special_offset_handling,
11954     const unsigned char* view,
11955     Arm_address view_address,
11956     section_size_type view_size)
11957 {
11958   if (sh_type == elfcpp::SHT_REL)
11959     this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
11960         relinfo,
11961         prelocs,
11962         reloc_count,
11963         output_section,
11964         needs_special_offset_handling,
11965         view,
11966         view_address,
11967         view_size);
11968   else if (sh_type == elfcpp::SHT_RELA)
11969     // We do not support RELA type relocations yet.  This is provided for
11970     // completeness.
11971     this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
11972         relinfo,
11973         prelocs,
11974         reloc_count,
11975         output_section,
11976         needs_special_offset_handling,
11977         view,
11978         view_address,
11979         view_size);
11980   else
11981     gold_unreachable();
11982 }
11983
11984 // Group input sections for stub generation.
11985 //
11986 // We group input sections in an output section so that the total size,
11987 // including any padding space due to alignment is smaller than GROUP_SIZE
11988 // unless the only input section in group is bigger than GROUP_SIZE already.
11989 // Then an ARM stub table is created to follow the last input section
11990 // in group.  For each group an ARM stub table is created an is placed
11991 // after the last group.  If STUB_ALWAYS_AFTER_BRANCH is false, we further
11992 // extend the group after the stub table.
11993
11994 template<bool big_endian>
11995 void
11996 Target_arm<big_endian>::group_sections(
11997     Layout* layout,
11998     section_size_type group_size,
11999     bool stubs_always_after_branch,
12000     const Task* task)
12001 {
12002   // Group input sections and insert stub table
12003   Layout::Section_list section_list;
12004   layout->get_executable_sections(&section_list);
12005   for (Layout::Section_list::const_iterator p = section_list.begin();
12006        p != section_list.end();
12007        ++p)
12008     {
12009       Arm_output_section<big_endian>* output_section =
12010         Arm_output_section<big_endian>::as_arm_output_section(*p);
12011       output_section->group_sections(group_size, stubs_always_after_branch,
12012                                      this, task);
12013     }
12014 }
12015
12016 // Relaxation hook.  This is where we do stub generation.
12017
12018 template<bool big_endian>
12019 bool
12020 Target_arm<big_endian>::do_relax(
12021     int pass,
12022     const Input_objects* input_objects,
12023     Symbol_table* symtab,
12024     Layout* layout,
12025     const Task* task)
12026 {
12027   // No need to generate stubs if this is a relocatable link.
12028   gold_assert(!parameters->options().relocatable());
12029
12030   // If this is the first pass, we need to group input sections into
12031   // stub groups.
12032   bool done_exidx_fixup = false;
12033   typedef typename Stub_table_list::iterator Stub_table_iterator;
12034   if (pass == 1)
12035     {
12036       // Determine the stub group size.  The group size is the absolute
12037       // value of the parameter --stub-group-size.  If --stub-group-size
12038       // is passed a negative value, we restrict stubs to be always after
12039       // the stubbed branches.
12040       int32_t stub_group_size_param =
12041         parameters->options().stub_group_size();
12042       bool stubs_always_after_branch = stub_group_size_param < 0;
12043       section_size_type stub_group_size = abs(stub_group_size_param);
12044
12045       if (stub_group_size == 1)
12046         {
12047           // Default value.
12048           // Thumb branch range is +-4MB has to be used as the default
12049           // maximum size (a given section can contain both ARM and Thumb
12050           // code, so the worst case has to be taken into account).  If we are
12051           // fixing cortex-a8 errata, the branch range has to be even smaller,
12052           // since wide conditional branch has a range of +-1MB only.
12053           //
12054           // This value is 48K less than that, which allows for 4096
12055           // 12-byte stubs.  If we exceed that, then we will fail to link.
12056           // The user will have to relink with an explicit group size
12057           // option.
12058             stub_group_size = 4145152;
12059         }
12060
12061       // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12062       // page as the first half of a 32-bit branch straddling two 4K pages.
12063       // This is a crude way of enforcing that.  In addition, long conditional
12064       // branches of THUMB-2 have a range of +-1M.  If we are fixing cortex-A8
12065       // erratum, limit the group size to  (1M - 12k) to avoid unreachable
12066       // cortex-A8 stubs from long conditional branches.
12067       if (this->fix_cortex_a8_)
12068         {
12069           stubs_always_after_branch = true;
12070           const section_size_type cortex_a8_group_size = 1024 * (1024 - 12);
12071           stub_group_size = std::max(stub_group_size, cortex_a8_group_size);
12072         }
12073
12074       group_sections(layout, stub_group_size, stubs_always_after_branch, task);
12075
12076       // Also fix .ARM.exidx section coverage.
12077       Arm_output_section<big_endian>* exidx_output_section = NULL;
12078       for (Layout::Section_list::const_iterator p =
12079              layout->section_list().begin();
12080            p != layout->section_list().end();
12081            ++p)
12082         if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
12083           {
12084             if (exidx_output_section == NULL)
12085               exidx_output_section =
12086                 Arm_output_section<big_endian>::as_arm_output_section(*p);
12087             else
12088               // We cannot handle this now.
12089               gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12090                            "non-relocatable link"),
12091                           exidx_output_section->name(),
12092                           (*p)->name());
12093           }
12094
12095       if (exidx_output_section != NULL)
12096         {
12097           this->fix_exidx_coverage(layout, input_objects, exidx_output_section,
12098                                    symtab, task);
12099           done_exidx_fixup = true;
12100         }
12101     }
12102   else
12103     {
12104       // If this is not the first pass, addresses and file offsets have
12105       // been reset at this point, set them here.
12106       for (Stub_table_iterator sp = this->stub_tables_.begin();
12107            sp != this->stub_tables_.end();
12108            ++sp)
12109         {
12110           Arm_input_section<big_endian>* owner = (*sp)->owner();
12111           off_t off = align_address(owner->original_size(),
12112                                     (*sp)->addralign());
12113           (*sp)->set_address_and_file_offset(owner->address() + off,
12114                                              owner->offset() + off);
12115         }
12116     }
12117
12118   // The Cortex-A8 stubs are sensitive to layout of code sections.  At the
12119   // beginning of each relaxation pass, just blow away all the stubs.
12120   // Alternatively, we could selectively remove only the stubs and reloc
12121   // information for code sections that have moved since the last pass.
12122   // That would require more book-keeping.
12123   if (this->fix_cortex_a8_)
12124     {
12125       // Clear all Cortex-A8 reloc information.
12126       for (typename Cortex_a8_relocs_info::const_iterator p =
12127              this->cortex_a8_relocs_info_.begin();
12128            p != this->cortex_a8_relocs_info_.end();
12129            ++p)
12130         delete p->second;
12131       this->cortex_a8_relocs_info_.clear();
12132
12133       // Remove all Cortex-A8 stubs.
12134       for (Stub_table_iterator sp = this->stub_tables_.begin();
12135            sp != this->stub_tables_.end();
12136            ++sp)
12137         (*sp)->remove_all_cortex_a8_stubs();
12138     }
12139
12140   // Scan relocs for relocation stubs
12141   for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12142        op != input_objects->relobj_end();
12143        ++op)
12144     {
12145       Arm_relobj<big_endian>* arm_relobj =
12146         Arm_relobj<big_endian>::as_arm_relobj(*op);
12147       // Lock the object so we can read from it.  This is only called
12148       // single-threaded from Layout::finalize, so it is OK to lock.
12149       Task_lock_obj<Object> tl(task, arm_relobj);
12150       arm_relobj->scan_sections_for_stubs(this, symtab, layout);
12151     }
12152
12153   // Check all stub tables to see if any of them have their data sizes
12154   // or addresses alignments changed.  These are the only things that
12155   // matter.
12156   bool any_stub_table_changed = false;
12157   Unordered_set<const Output_section*> sections_needing_adjustment;
12158   for (Stub_table_iterator sp = this->stub_tables_.begin();
12159        (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12160        ++sp)
12161     {
12162       if ((*sp)->update_data_size_and_addralign())
12163         {
12164           // Update data size of stub table owner.
12165           Arm_input_section<big_endian>* owner = (*sp)->owner();
12166           uint64_t address = owner->address();
12167           off_t offset = owner->offset();
12168           owner->reset_address_and_file_offset();
12169           owner->set_address_and_file_offset(address, offset);
12170
12171           sections_needing_adjustment.insert(owner->output_section());
12172           any_stub_table_changed = true;
12173         }
12174     }
12175
12176   // Output_section_data::output_section() returns a const pointer but we
12177   // need to update output sections, so we record all output sections needing
12178   // update above and scan the sections here to find out what sections need
12179   // to be updated.
12180   for (Layout::Section_list::const_iterator p = layout->section_list().begin();
12181       p != layout->section_list().end();
12182       ++p)
12183     {
12184       if (sections_needing_adjustment.find(*p)
12185           != sections_needing_adjustment.end())
12186         (*p)->set_section_offsets_need_adjustment();
12187     }
12188
12189   // Stop relaxation if no EXIDX fix-up and no stub table change.
12190   bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
12191
12192   // Finalize the stubs in the last relaxation pass.
12193   if (!continue_relaxation)
12194     {
12195       for (Stub_table_iterator sp = this->stub_tables_.begin();
12196            (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12197             ++sp)
12198         (*sp)->finalize_stubs();
12199
12200       // Update output local symbol counts of objects if necessary.
12201       for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12202            op != input_objects->relobj_end();
12203            ++op)
12204         {
12205           Arm_relobj<big_endian>* arm_relobj =
12206             Arm_relobj<big_endian>::as_arm_relobj(*op);
12207
12208           // Update output local symbol counts.  We need to discard local
12209           // symbols defined in parts of input sections that are discarded by
12210           // relaxation.
12211           if (arm_relobj->output_local_symbol_count_needs_update())
12212             {
12213               // We need to lock the object's file to update it.
12214               Task_lock_obj<Object> tl(task, arm_relobj);
12215               arm_relobj->update_output_local_symbol_count();
12216             }
12217         }
12218     }
12219
12220   return continue_relaxation;
12221 }
12222
12223 // Relocate a stub.
12224
12225 template<bool big_endian>
12226 void
12227 Target_arm<big_endian>::relocate_stub(
12228     Stub* stub,
12229     const Relocate_info<32, big_endian>* relinfo,
12230     Output_section* output_section,
12231     unsigned char* view,
12232     Arm_address address,
12233     section_size_type view_size)
12234 {
12235   Relocate relocate;
12236   const Stub_template* stub_template = stub->stub_template();
12237   for (size_t i = 0; i < stub_template->reloc_count(); i++)
12238     {
12239       size_t reloc_insn_index = stub_template->reloc_insn_index(i);
12240       const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
12241
12242       unsigned int r_type = insn->r_type();
12243       section_size_type reloc_offset = stub_template->reloc_offset(i);
12244       section_size_type reloc_size = insn->size();
12245       gold_assert(reloc_offset + reloc_size <= view_size);
12246
12247       // This is the address of the stub destination.
12248       Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
12249       Symbol_value<32> symval;
12250       symval.set_output_value(target);
12251
12252       // Synthesize a fake reloc just in case.  We don't have a symbol so
12253       // we use 0.
12254       unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
12255       memset(reloc_buffer, 0, sizeof(reloc_buffer));
12256       elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
12257       reloc_write.put_r_offset(reloc_offset);
12258       reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
12259       elfcpp::Rel<32, big_endian> rel(reloc_buffer);
12260
12261       relocate.relocate(relinfo, this, output_section,
12262                         this->fake_relnum_for_stubs, rel, r_type,
12263                         NULL, &symval, view + reloc_offset,
12264                         address + reloc_offset, reloc_size);
12265     }
12266 }
12267
12268 // Determine whether an object attribute tag takes an integer, a
12269 // string or both.
12270
12271 template<bool big_endian>
12272 int
12273 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
12274 {
12275   if (tag == Object_attribute::Tag_compatibility)
12276     return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12277             | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
12278   else if (tag == elfcpp::Tag_nodefaults)
12279     return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12280             | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
12281   else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
12282     return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
12283   else if (tag < 32)
12284     return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
12285   else
12286     return ((tag & 1) != 0
12287             ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12288             : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
12289 }
12290
12291 // Reorder attributes.
12292 //
12293 // The ABI defines that Tag_conformance should be emitted first, and that
12294 // Tag_nodefaults should be second (if either is defined).  This sets those
12295 // two positions, and bumps up the position of all the remaining tags to
12296 // compensate.
12297
12298 template<bool big_endian>
12299 int
12300 Target_arm<big_endian>::do_attributes_order(int num) const
12301 {
12302   // Reorder the known object attributes in output.  We want to move
12303   // Tag_conformance to position 4 and Tag_conformance to position 5
12304   // and shift everything between 4 .. Tag_conformance - 1 to make room.
12305   if (num == 4)
12306     return elfcpp::Tag_conformance;
12307   if (num == 5)
12308     return elfcpp::Tag_nodefaults;
12309   if ((num - 2) < elfcpp::Tag_nodefaults)
12310     return num - 2;
12311   if ((num - 1) < elfcpp::Tag_conformance)
12312     return num - 1;
12313   return num;
12314 }
12315
12316 // Scan a span of THUMB code for Cortex-A8 erratum.
12317
12318 template<bool big_endian>
12319 void
12320 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
12321     Arm_relobj<big_endian>* arm_relobj,
12322     unsigned int shndx,
12323     section_size_type span_start,
12324     section_size_type span_end,
12325     const unsigned char* view,
12326     Arm_address address)
12327 {
12328   // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12329   //
12330   // The opcode is BLX.W, BL.W, B.W, Bcc.W
12331   // The branch target is in the same 4KB region as the
12332   // first half of the branch.
12333   // The instruction before the branch is a 32-bit
12334   // length non-branch instruction.
12335   section_size_type i = span_start;
12336   bool last_was_32bit = false;
12337   bool last_was_branch = false;
12338   while (i < span_end)
12339     {
12340       typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12341       const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
12342       uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
12343       bool is_blx = false, is_b = false;
12344       bool is_bl = false, is_bcc = false;
12345
12346       bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
12347       if (insn_32bit)
12348         {
12349           // Load the rest of the insn (in manual-friendly order).
12350           insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
12351
12352           // Encoding T4: B<c>.W.
12353           is_b = (insn & 0xf800d000U) == 0xf0009000U;
12354           // Encoding T1: BL<c>.W.
12355           is_bl = (insn & 0xf800d000U) == 0xf000d000U;
12356           // Encoding T2: BLX<c>.W.
12357           is_blx = (insn & 0xf800d000U) == 0xf000c000U;
12358           // Encoding T3: B<c>.W (not permitted in IT block).
12359           is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
12360                     && (insn & 0x07f00000U) != 0x03800000U);
12361         }
12362
12363       bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
12364
12365       // If this instruction is a 32-bit THUMB branch that crosses a 4K
12366       // page boundary and it follows 32-bit non-branch instruction,
12367       // we need to work around.
12368       if (is_32bit_branch
12369           && ((address + i) & 0xfffU) == 0xffeU
12370           && last_was_32bit
12371           && !last_was_branch)
12372         {
12373           // Check to see if there is a relocation stub for this branch.
12374           bool force_target_arm = false;
12375           bool force_target_thumb = false;
12376           const Cortex_a8_reloc* cortex_a8_reloc = NULL;
12377           Cortex_a8_relocs_info::const_iterator p =
12378             this->cortex_a8_relocs_info_.find(address + i);
12379
12380           if (p != this->cortex_a8_relocs_info_.end())
12381             {
12382               cortex_a8_reloc = p->second;
12383               bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
12384
12385               if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12386                   && !target_is_thumb)
12387                 force_target_arm = true;
12388               else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12389                        && target_is_thumb)
12390                 force_target_thumb = true;
12391             }
12392
12393           off_t offset;
12394           Stub_type stub_type = arm_stub_none;
12395
12396           // Check if we have an offending branch instruction.
12397           uint16_t upper_insn = (insn >> 16) & 0xffffU;
12398           uint16_t lower_insn = insn & 0xffffU;
12399           typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12400
12401           if (cortex_a8_reloc != NULL
12402               && cortex_a8_reloc->reloc_stub() != NULL)
12403             // We've already made a stub for this instruction, e.g.
12404             // it's a long branch or a Thumb->ARM stub.  Assume that
12405             // stub will suffice to work around the A8 erratum (see
12406             // setting of always_after_branch above).
12407             ;
12408           else if (is_bcc)
12409             {
12410               offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
12411                                                               lower_insn);
12412               stub_type = arm_stub_a8_veneer_b_cond;
12413             }
12414           else if (is_b || is_bl || is_blx)
12415             {
12416               offset = RelocFuncs::thumb32_branch_offset(upper_insn,
12417                                                          lower_insn);
12418               if (is_blx)
12419                 offset &= ~3;
12420
12421               stub_type = (is_blx
12422                            ? arm_stub_a8_veneer_blx
12423                            : (is_bl
12424                               ? arm_stub_a8_veneer_bl
12425                               : arm_stub_a8_veneer_b));
12426             }
12427
12428           if (stub_type != arm_stub_none)
12429             {
12430               Arm_address pc_for_insn = address + i + 4;
12431
12432               // The original instruction is a BL, but the target is
12433               // an ARM instruction.  If we were not making a stub,
12434               // the BL would have been converted to a BLX.  Use the
12435               // BLX stub instead in that case.
12436               if (this->may_use_v5t_interworking() && force_target_arm
12437                   && stub_type == arm_stub_a8_veneer_bl)
12438                 {
12439                   stub_type = arm_stub_a8_veneer_blx;
12440                   is_blx = true;
12441                   is_bl = false;
12442                 }
12443               // Conversely, if the original instruction was
12444               // BLX but the target is Thumb mode, use the BL stub.
12445               else if (force_target_thumb
12446                        && stub_type == arm_stub_a8_veneer_blx)
12447                 {
12448                   stub_type = arm_stub_a8_veneer_bl;
12449                   is_blx = false;
12450                   is_bl = true;
12451                 }
12452
12453               if (is_blx)
12454                 pc_for_insn &= ~3;
12455
12456               // If we found a relocation, use the proper destination,
12457               // not the offset in the (unrelocated) instruction.
12458               // Note this is always done if we switched the stub type above.
12459               if (cortex_a8_reloc != NULL)
12460                 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
12461
12462               Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
12463
12464               // Add a new stub if destination address in in the same page.
12465               if (((address + i) & ~0xfffU) == (target & ~0xfffU))
12466                 {
12467                   Cortex_a8_stub* stub =
12468                     this->stub_factory_.make_cortex_a8_stub(stub_type,
12469                                                             arm_relobj, shndx,
12470                                                             address + i,
12471                                                             target, insn);
12472                   Stub_table<big_endian>* stub_table =
12473                     arm_relobj->stub_table(shndx);
12474                   gold_assert(stub_table != NULL);
12475                   stub_table->add_cortex_a8_stub(address + i, stub);
12476                 }
12477             }
12478         }
12479
12480       i += insn_32bit ? 4 : 2;
12481       last_was_32bit = insn_32bit;
12482       last_was_branch = is_32bit_branch;
12483     }
12484 }
12485
12486 // Apply the Cortex-A8 workaround.
12487
12488 template<bool big_endian>
12489 void
12490 Target_arm<big_endian>::apply_cortex_a8_workaround(
12491     const Cortex_a8_stub* stub,
12492     Arm_address stub_address,
12493     unsigned char* insn_view,
12494     Arm_address insn_address)
12495 {
12496   typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12497   Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
12498   Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
12499   Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
12500   off_t branch_offset = stub_address - (insn_address + 4);
12501
12502   typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12503   switch (stub->stub_template()->type())
12504     {
12505     case arm_stub_a8_veneer_b_cond:
12506       // For a conditional branch, we re-write it to be an unconditional
12507       // branch to the stub.  We use the THUMB-2 encoding here.
12508       upper_insn = 0xf000U;
12509       lower_insn = 0xb800U;
12510       // Fall through
12511     case arm_stub_a8_veneer_b:
12512     case arm_stub_a8_veneer_bl:
12513     case arm_stub_a8_veneer_blx:
12514       if ((lower_insn & 0x5000U) == 0x4000U)
12515         // For a BLX instruction, make sure that the relocation is
12516         // rounded up to a word boundary.  This follows the semantics of
12517         // the instruction which specifies that bit 1 of the target
12518         // address will come from bit 1 of the base address.
12519         branch_offset = (branch_offset + 2) & ~3;
12520
12521       // Put BRANCH_OFFSET back into the insn.
12522       gold_assert(!Bits<25>::has_overflow32(branch_offset));
12523       upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
12524       lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
12525       break;
12526
12527     default:
12528       gold_unreachable();
12529     }
12530
12531   // Put the relocated value back in the object file:
12532   elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
12533   elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
12534 }
12535
12536 // Target selector for ARM.  Note this is never instantiated directly.
12537 // It's only used in Target_selector_arm_nacl, below.
12538
12539 template<bool big_endian>
12540 class Target_selector_arm : public Target_selector
12541 {
12542  public:
12543   Target_selector_arm()
12544     : Target_selector(elfcpp::EM_ARM, 32, big_endian,
12545                       (big_endian ? "elf32-bigarm" : "elf32-littlearm"),
12546                       (big_endian ? "armelfb" : "armelf"))
12547   { }
12548
12549   Target*
12550   do_instantiate_target()
12551   { return new Target_arm<big_endian>(); }
12552 };
12553
12554 // Fix .ARM.exidx section coverage.
12555
12556 template<bool big_endian>
12557 void
12558 Target_arm<big_endian>::fix_exidx_coverage(
12559     Layout* layout,
12560     const Input_objects* input_objects,
12561     Arm_output_section<big_endian>* exidx_section,
12562     Symbol_table* symtab,
12563     const Task* task)
12564 {
12565   // We need to look at all the input sections in output in ascending
12566   // order of of output address.  We do that by building a sorted list
12567   // of output sections by addresses.  Then we looks at the output sections
12568   // in order.  The input sections in an output section are already sorted
12569   // by addresses within the output section.
12570
12571   typedef std::set<Output_section*, output_section_address_less_than>
12572       Sorted_output_section_list;
12573   Sorted_output_section_list sorted_output_sections;
12574
12575   // Find out all the output sections of input sections pointed by
12576   // EXIDX input sections.
12577   for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
12578        p != input_objects->relobj_end();
12579        ++p)
12580     {
12581       Arm_relobj<big_endian>* arm_relobj =
12582         Arm_relobj<big_endian>::as_arm_relobj(*p);
12583       std::vector<unsigned int> shndx_list;
12584       arm_relobj->get_exidx_shndx_list(&shndx_list);
12585       for (size_t i = 0; i < shndx_list.size(); ++i)
12586         {
12587           const Arm_exidx_input_section* exidx_input_section =
12588             arm_relobj->exidx_input_section_by_shndx(shndx_list[i]);
12589           gold_assert(exidx_input_section != NULL);
12590           if (!exidx_input_section->has_errors())
12591             {
12592               unsigned int text_shndx = exidx_input_section->link();
12593               Output_section* os = arm_relobj->output_section(text_shndx);
12594               if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0)
12595                 sorted_output_sections.insert(os);
12596             }
12597         }
12598     }
12599
12600   // Go over the output sections in ascending order of output addresses.
12601   typedef typename Arm_output_section<big_endian>::Text_section_list
12602       Text_section_list;
12603   Text_section_list sorted_text_sections;
12604   for (typename Sorted_output_section_list::iterator p =
12605         sorted_output_sections.begin();
12606       p != sorted_output_sections.end();
12607       ++p)
12608     {
12609       Arm_output_section<big_endian>* arm_output_section =
12610         Arm_output_section<big_endian>::as_arm_output_section(*p);
12611       arm_output_section->append_text_sections_to_list(&sorted_text_sections);
12612     }
12613
12614   exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab,
12615                                     merge_exidx_entries(), task);
12616 }
12617
12618 template<bool big_endian>
12619 void
12620 Target_arm<big_endian>::do_define_standard_symbols(
12621     Symbol_table* symtab,
12622     Layout* layout)
12623 {
12624   // Handle the .ARM.exidx section.
12625   Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
12626
12627   if (exidx_section != NULL)
12628     {
12629       // Create __exidx_start and __exidx_end symbols.
12630       symtab->define_in_output_data("__exidx_start",
12631                                     NULL, // version
12632                                     Symbol_table::PREDEFINED,
12633                                     exidx_section,
12634                                     0, // value
12635                                     0, // symsize
12636                                     elfcpp::STT_NOTYPE,
12637                                     elfcpp::STB_GLOBAL,
12638                                     elfcpp::STV_HIDDEN,
12639                                     0, // nonvis
12640                                     false, // offset_is_from_end
12641                                     true); // only_if_ref
12642
12643       symtab->define_in_output_data("__exidx_end",
12644                                     NULL, // version
12645                                     Symbol_table::PREDEFINED,
12646                                     exidx_section,
12647                                     0, // value
12648                                     0, // symsize
12649                                     elfcpp::STT_NOTYPE,
12650                                     elfcpp::STB_GLOBAL,
12651                                     elfcpp::STV_HIDDEN,
12652                                     0, // nonvis
12653                                     true, // offset_is_from_end
12654                                     true); // only_if_ref
12655     }
12656   else
12657     {
12658       // Define __exidx_start and __exidx_end even when .ARM.exidx
12659       // section is missing to match ld's behaviour.
12660       symtab->define_as_constant("__exidx_start", NULL,
12661                                  Symbol_table::PREDEFINED,
12662                                  0, 0, elfcpp::STT_OBJECT,
12663                                  elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12664                                  true, false);
12665       symtab->define_as_constant("__exidx_end", NULL,
12666                                  Symbol_table::PREDEFINED,
12667                                  0, 0, elfcpp::STT_OBJECT,
12668                                  elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12669                                  true, false);
12670     }
12671 }
12672
12673 // NaCl variant.  It uses different PLT contents.
12674
12675 template<bool big_endian>
12676 class Output_data_plt_arm_nacl;
12677
12678 template<bool big_endian>
12679 class Target_arm_nacl : public Target_arm<big_endian>
12680 {
12681  public:
12682   Target_arm_nacl()
12683     : Target_arm<big_endian>(&arm_nacl_info)
12684   { }
12685
12686  protected:
12687   virtual Output_data_plt_arm<big_endian>*
12688   do_make_data_plt(
12689                    Layout* layout,
12690                    Arm_output_data_got<big_endian>* got,
12691                    Output_data_space* got_plt,
12692                    Output_data_space* got_irelative)
12693   { return new Output_data_plt_arm_nacl<big_endian>(
12694       layout, got, got_plt, got_irelative); }
12695
12696  private:
12697   static const Target::Target_info arm_nacl_info;
12698 };
12699
12700 template<bool big_endian>
12701 const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info =
12702 {
12703   32,                   // size
12704   big_endian,           // is_big_endian
12705   elfcpp::EM_ARM,       // machine_code
12706   false,                // has_make_symbol
12707   false,                // has_resolve
12708   false,                // has_code_fill
12709   true,                 // is_default_stack_executable
12710   false,                // can_icf_inline_merge_sections
12711   '\0',                 // wrap_char
12712   "/lib/ld-nacl-arm.so.1", // dynamic_linker
12713   0x20000,              // default_text_segment_address
12714   0x10000,              // abi_pagesize (overridable by -z max-page-size)
12715   0x10000,              // common_pagesize (overridable by -z common-page-size)
12716   true,                 // isolate_execinstr
12717   0x10000000,           // rosegment_gap
12718   elfcpp::SHN_UNDEF,    // small_common_shndx
12719   elfcpp::SHN_UNDEF,    // large_common_shndx
12720   0,                    // small_common_section_flags
12721   0,                    // large_common_section_flags
12722   ".ARM.attributes",    // attributes_section
12723   "aeabi",              // attributes_vendor
12724   "_start"              // entry_symbol_name
12725 };
12726
12727 template<bool big_endian>
12728 class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian>
12729 {
12730  public:
12731   Output_data_plt_arm_nacl(
12732       Layout* layout,
12733       Arm_output_data_got<big_endian>* got,
12734       Output_data_space* got_plt,
12735       Output_data_space* got_irelative)
12736     : Output_data_plt_arm<big_endian>(layout, 16, got, got_plt, got_irelative)
12737   { }
12738
12739  protected:
12740   // Return the offset of the first non-reserved PLT entry.
12741   virtual unsigned int
12742   do_first_plt_entry_offset() const
12743   { return sizeof(first_plt_entry); }
12744
12745   // Return the size of a PLT entry.
12746   virtual unsigned int
12747   do_get_plt_entry_size() const
12748   { return sizeof(plt_entry); }
12749
12750   virtual void
12751   do_fill_first_plt_entry(unsigned char* pov,
12752                           Arm_address got_address,
12753                           Arm_address plt_address);
12754
12755   virtual void
12756   do_fill_plt_entry(unsigned char* pov,
12757                     Arm_address got_address,
12758                     Arm_address plt_address,
12759                     unsigned int got_offset,
12760                     unsigned int plt_offset);
12761
12762  private:
12763   inline uint32_t arm_movw_immediate(uint32_t value)
12764   {
12765     return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
12766   }
12767
12768   inline uint32_t arm_movt_immediate(uint32_t value)
12769   {
12770     return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
12771   }
12772
12773   // Template for the first PLT entry.
12774   static const uint32_t first_plt_entry[16];
12775
12776   // Template for subsequent PLT entries.
12777   static const uint32_t plt_entry[4];
12778 };
12779
12780 // The first entry in the PLT.
12781 template<bool big_endian>
12782 const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] =
12783 {
12784   // First bundle:
12785   0xe300c000,                           // movw ip, #:lower16:&GOT[2]-.+8
12786   0xe340c000,                           // movt ip, #:upper16:&GOT[2]-.+8
12787   0xe08cc00f,                           // add  ip, ip, pc
12788   0xe52dc008,                           // str  ip, [sp, #-8]!
12789   // Second bundle:
12790   0xe3ccc103,                           // bic  ip, ip, #0xc0000000
12791   0xe59cc000,                           // ldr  ip, [ip]
12792   0xe3ccc13f,                           // bic  ip, ip, #0xc000000f
12793   0xe12fff1c,                           // bx   ip
12794   // Third bundle:
12795   0xe320f000,                           // nop
12796   0xe320f000,                           // nop
12797   0xe320f000,                           // nop
12798   // .Lplt_tail:
12799   0xe50dc004,                           // str  ip, [sp, #-4]
12800   // Fourth bundle:
12801   0xe3ccc103,                           // bic  ip, ip, #0xc0000000
12802   0xe59cc000,                           // ldr  ip, [ip]
12803   0xe3ccc13f,                           // bic  ip, ip, #0xc000000f
12804   0xe12fff1c,                           // bx   ip
12805 };
12806
12807 template<bool big_endian>
12808 void
12809 Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry(
12810     unsigned char* pov,
12811     Arm_address got_address,
12812     Arm_address plt_address)
12813 {
12814   // Write first PLT entry.  All but first two words are constants.
12815   const size_t num_first_plt_words = (sizeof(first_plt_entry)
12816                                       / sizeof(first_plt_entry[0]));
12817
12818   int32_t got_displacement = got_address + 8 - (plt_address + 16);
12819
12820   elfcpp::Swap<32, big_endian>::writeval
12821     (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement));
12822   elfcpp::Swap<32, big_endian>::writeval
12823     (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement));
12824
12825   for (size_t i = 2; i < num_first_plt_words; ++i)
12826     elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
12827 }
12828
12829 // Subsequent entries in the PLT.
12830
12831 template<bool big_endian>
12832 const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] =
12833 {
12834   0xe300c000,                           // movw ip, #:lower16:&GOT[n]-.+8
12835   0xe340c000,                           // movt ip, #:upper16:&GOT[n]-.+8
12836   0xe08cc00f,                           // add  ip, ip, pc
12837   0xea000000,                           // b    .Lplt_tail
12838 };
12839
12840 template<bool big_endian>
12841 void
12842 Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry(
12843     unsigned char* pov,
12844     Arm_address got_address,
12845     Arm_address plt_address,
12846     unsigned int got_offset,
12847     unsigned int plt_offset)
12848 {
12849   // Calculate the displacement between the PLT slot and the
12850   // common tail that's part of the special initial PLT slot.
12851   int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t))
12852                                - (plt_address + plt_offset
12853                                   + sizeof(plt_entry) + sizeof(uint32_t)));
12854   gold_assert((tail_displacement & 3) == 0);
12855   tail_displacement >>= 2;
12856
12857   gold_assert ((tail_displacement & 0xff000000) == 0
12858                || (-tail_displacement & 0xff000000) == 0);
12859
12860   // Calculate the displacement between the PLT slot and the entry
12861   // in the GOT.  The offset accounts for the value produced by
12862   // adding to pc in the penultimate instruction of the PLT stub.
12863   const int32_t got_displacement = (got_address + got_offset
12864                                     - (plt_address + sizeof(plt_entry)));
12865
12866   elfcpp::Swap<32, big_endian>::writeval
12867     (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement));
12868   elfcpp::Swap<32, big_endian>::writeval
12869     (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement));
12870   elfcpp::Swap<32, big_endian>::writeval
12871     (pov + 8, plt_entry[2]);
12872   elfcpp::Swap<32, big_endian>::writeval
12873     (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff));
12874 }
12875
12876 // Target selectors.
12877
12878 template<bool big_endian>
12879 class Target_selector_arm_nacl
12880   : public Target_selector_nacl<Target_selector_arm<big_endian>,
12881                                 Target_arm_nacl<big_endian> >
12882 {
12883  public:
12884   Target_selector_arm_nacl()
12885     : Target_selector_nacl<Target_selector_arm<big_endian>,
12886                            Target_arm_nacl<big_endian> >(
12887           "arm",
12888           big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12889           big_endian ? "armelfb_nacl" : "armelf_nacl")
12890   { }
12891 };
12892
12893 Target_selector_arm_nacl<false> target_selector_arm;
12894 Target_selector_arm_nacl<true> target_selector_armbe;
12895
12896 } // End anonymous namespace.