1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian>
61 class Output_data_plt_arm;
63 template<bool big_endian>
66 template<bool big_endian>
67 class Arm_input_section;
69 class Arm_exidx_cantunwind;
71 class Arm_exidx_merged_section;
73 class Arm_exidx_fixup;
75 template<bool big_endian>
76 class Arm_output_section;
78 class Arm_exidx_input_section;
80 template<bool big_endian>
83 template<bool big_endian>
87 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
89 // Maximum branch offsets for ARM, THUMB and THUMB2.
90 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
91 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
92 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
93 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
94 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
95 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
97 // The arm target class.
99 // This is a very simple port of gold for ARM-EABI. It is intended for
100 // supporting Android only for the time being.
103 // - Implement all static relocation types documented in arm-reloc.def.
104 // - Make PLTs more flexible for different architecture features like
106 // There are probably a lot more.
108 // Ideally we would like to avoid using global variables but this is used
109 // very in many places and sometimes in loops. If we use a function
110 // returning a static instance of Arm_reloc_property_table, it will very
111 // slow in an threaded environment since the static instance needs to be
112 // locked. The pointer is below initialized in the
113 // Target::do_select_as_default_target() hook so that we do not spend time
114 // building the table if we are not linking ARM objects.
116 // An alternative is to to process the information in arm-reloc.def in
117 // compilation time and generate a representation of it in PODs only. That
118 // way we can avoid initialization when the linker starts.
120 Arm_reloc_property_table *arm_reloc_property_table = NULL;
122 // Instruction template class. This class is similar to the insn_sequence
123 // struct in bfd/elf32-arm.c.
128 // Types of instruction templates.
132 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
133 // templates with class-specific semantics. Currently this is used
134 // only by the Cortex_a8_stub class for handling condition codes in
135 // conditional branches.
136 THUMB16_SPECIAL_TYPE,
142 // Factory methods to create instruction templates in different formats.
144 static const Insn_template
145 thumb16_insn(uint32_t data)
146 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
148 // A Thumb conditional branch, in which the proper condition is inserted
149 // when we build the stub.
150 static const Insn_template
151 thumb16_bcond_insn(uint32_t data)
152 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
154 static const Insn_template
155 thumb32_insn(uint32_t data)
156 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
158 static const Insn_template
159 thumb32_b_insn(uint32_t data, int reloc_addend)
161 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
165 static const Insn_template
166 arm_insn(uint32_t data)
167 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
169 static const Insn_template
170 arm_rel_insn(unsigned data, int reloc_addend)
171 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
173 static const Insn_template
174 data_word(unsigned data, unsigned int r_type, int reloc_addend)
175 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
177 // Accessors. This class is used for read-only objects so no modifiers
182 { return this->data_; }
184 // Return the instruction sequence type of this.
187 { return this->type_; }
189 // Return the ARM relocation type of this.
192 { return this->r_type_; }
196 { return this->reloc_addend_; }
198 // Return size of instruction template in bytes.
202 // Return byte-alignment of instruction template.
207 // We make the constructor private to ensure that only the factory
210 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
211 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
214 // Instruction specific data. This is used to store information like
215 // some of the instruction bits.
217 // Instruction template type.
219 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
220 unsigned int r_type_;
221 // Relocation addend.
222 int32_t reloc_addend_;
225 // Macro for generating code to stub types. One entry per long/short
229 DEF_STUB(long_branch_any_any) \
230 DEF_STUB(long_branch_v4t_arm_thumb) \
231 DEF_STUB(long_branch_thumb_only) \
232 DEF_STUB(long_branch_v4t_thumb_thumb) \
233 DEF_STUB(long_branch_v4t_thumb_arm) \
234 DEF_STUB(short_branch_v4t_thumb_arm) \
235 DEF_STUB(long_branch_any_arm_pic) \
236 DEF_STUB(long_branch_any_thumb_pic) \
237 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
238 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
239 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
240 DEF_STUB(long_branch_thumb_only_pic) \
241 DEF_STUB(a8_veneer_b_cond) \
242 DEF_STUB(a8_veneer_b) \
243 DEF_STUB(a8_veneer_bl) \
244 DEF_STUB(a8_veneer_blx) \
245 DEF_STUB(v4_veneer_bx)
249 #define DEF_STUB(x) arm_stub_##x,
255 // First reloc stub type.
256 arm_stub_reloc_first = arm_stub_long_branch_any_any,
257 // Last reloc stub type.
258 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
260 // First Cortex-A8 stub type.
261 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
262 // Last Cortex-A8 stub type.
263 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
266 arm_stub_type_last = arm_stub_v4_veneer_bx
270 // Stub template class. Templates are meant to be read-only objects.
271 // A stub template for a stub type contains all read-only attributes
272 // common to all stubs of the same type.
277 Stub_template(Stub_type, const Insn_template*, size_t);
285 { return this->type_; }
287 // Return an array of instruction templates.
290 { return this->insns_; }
292 // Return size of template in number of instructions.
295 { return this->insn_count_; }
297 // Return size of template in bytes.
300 { return this->size_; }
302 // Return alignment of the stub template.
305 { return this->alignment_; }
307 // Return whether entry point is in thumb mode.
309 entry_in_thumb_mode() const
310 { return this->entry_in_thumb_mode_; }
312 // Return number of relocations in this template.
315 { return this->relocs_.size(); }
317 // Return index of the I-th instruction with relocation.
319 reloc_insn_index(size_t i) const
321 gold_assert(i < this->relocs_.size());
322 return this->relocs_[i].first;
325 // Return the offset of the I-th instruction with relocation from the
326 // beginning of the stub.
328 reloc_offset(size_t i) const
330 gold_assert(i < this->relocs_.size());
331 return this->relocs_[i].second;
335 // This contains information about an instruction template with a relocation
336 // and its offset from start of stub.
337 typedef std::pair<size_t, section_size_type> Reloc;
339 // A Stub_template may not be copied. We want to share templates as much
341 Stub_template(const Stub_template&);
342 Stub_template& operator=(const Stub_template&);
346 // Points to an array of Insn_templates.
347 const Insn_template* insns_;
348 // Number of Insn_templates in insns_[].
350 // Size of templated instructions in bytes.
352 // Alignment of templated instructions.
354 // Flag to indicate if entry is in thumb mode.
355 bool entry_in_thumb_mode_;
356 // A table of reloc instruction indices and offsets. We can find these by
357 // looking at the instruction templates but we pre-compute and then stash
358 // them here for speed.
359 std::vector<Reloc> relocs_;
363 // A class for code stubs. This is a base class for different type of
364 // stubs used in the ARM target.
370 static const section_offset_type invalid_offset =
371 static_cast<section_offset_type>(-1);
374 Stub(const Stub_template* stub_template)
375 : stub_template_(stub_template), offset_(invalid_offset)
382 // Return the stub template.
384 stub_template() const
385 { return this->stub_template_; }
387 // Return offset of code stub from beginning of its containing stub table.
391 gold_assert(this->offset_ != invalid_offset);
392 return this->offset_;
395 // Set offset of code stub from beginning of its containing stub table.
397 set_offset(section_offset_type offset)
398 { this->offset_ = offset; }
400 // Return the relocation target address of the i-th relocation in the
401 // stub. This must be defined in a child class.
403 reloc_target(size_t i)
404 { return this->do_reloc_target(i); }
406 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
408 write(unsigned char* view, section_size_type view_size, bool big_endian)
409 { this->do_write(view, view_size, big_endian); }
411 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
412 // for the i-th instruction.
414 thumb16_special(size_t i)
415 { return this->do_thumb16_special(i); }
418 // This must be defined in the child class.
420 do_reloc_target(size_t) = 0;
422 // This may be overridden in the child class.
424 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
427 this->do_fixed_endian_write<true>(view, view_size);
429 this->do_fixed_endian_write<false>(view, view_size);
432 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
433 // instruction template.
435 do_thumb16_special(size_t)
436 { gold_unreachable(); }
439 // A template to implement do_write.
440 template<bool big_endian>
442 do_fixed_endian_write(unsigned char*, section_size_type);
445 const Stub_template* stub_template_;
446 // Offset within the section of containing this stub.
447 section_offset_type offset_;
450 // Reloc stub class. These are stubs we use to fix up relocation because
451 // of limited branch ranges.
453 class Reloc_stub : public Stub
456 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
457 // We assume we never jump to this address.
458 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
460 // Return destination address.
462 destination_address() const
464 gold_assert(this->destination_address_ != this->invalid_address);
465 return this->destination_address_;
468 // Set destination address.
470 set_destination_address(Arm_address address)
472 gold_assert(address != this->invalid_address);
473 this->destination_address_ = address;
476 // Reset destination address.
478 reset_destination_address()
479 { this->destination_address_ = this->invalid_address; }
481 // Determine stub type for a branch of a relocation of R_TYPE going
482 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
483 // the branch target is a thumb instruction. TARGET is used for look
484 // up ARM-specific linker settings.
486 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
487 Arm_address branch_target, bool target_is_thumb);
489 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
490 // and an addend. Since we treat global and local symbol differently, we
491 // use a Symbol object for a global symbol and a object-index pair for
496 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
497 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
498 // and R_SYM must not be invalid_index.
499 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
500 unsigned int r_sym, int32_t addend)
501 : stub_type_(stub_type), addend_(addend)
505 this->r_sym_ = Reloc_stub::invalid_index;
506 this->u_.symbol = symbol;
510 gold_assert(relobj != NULL && r_sym != invalid_index);
511 this->r_sym_ = r_sym;
512 this->u_.relobj = relobj;
519 // Accessors: Keys are meant to be read-only object so no modifiers are
525 { return this->stub_type_; }
527 // Return the local symbol index or invalid_index.
530 { return this->r_sym_; }
532 // Return the symbol if there is one.
535 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
537 // Return the relobj if there is one.
540 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
542 // Whether this equals to another key k.
544 eq(const Key& k) const
546 return ((this->stub_type_ == k.stub_type_)
547 && (this->r_sym_ == k.r_sym_)
548 && ((this->r_sym_ != Reloc_stub::invalid_index)
549 ? (this->u_.relobj == k.u_.relobj)
550 : (this->u_.symbol == k.u_.symbol))
551 && (this->addend_ == k.addend_));
554 // Return a hash value.
558 return (this->stub_type_
560 ^ gold::string_hash<char>(
561 (this->r_sym_ != Reloc_stub::invalid_index)
562 ? this->u_.relobj->name().c_str()
563 : this->u_.symbol->name())
567 // Functors for STL associative containers.
571 operator()(const Key& k) const
572 { return k.hash_value(); }
578 operator()(const Key& k1, const Key& k2) const
579 { return k1.eq(k2); }
582 // Name of key. This is mainly for debugging.
588 Stub_type stub_type_;
589 // If this is a local symbol, this is the index in the defining object.
590 // Otherwise, it is invalid_index for a global symbol.
592 // If r_sym_ is invalid index. This points to a global symbol.
593 // Otherwise, this points a relobj. We used the unsized and target
594 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
595 // Arm_relobj. This is done to avoid making the stub class a template
596 // as most of the stub machinery is endianity-neutral. However, it
597 // may require a bit of casting done by users of this class.
600 const Symbol* symbol;
601 const Relobj* relobj;
603 // Addend associated with a reloc.
608 // Reloc_stubs are created via a stub factory. So these are protected.
609 Reloc_stub(const Stub_template* stub_template)
610 : Stub(stub_template), destination_address_(invalid_address)
616 friend class Stub_factory;
618 // Return the relocation target address of the i-th relocation in the
621 do_reloc_target(size_t i)
623 // All reloc stub have only one relocation.
625 return this->destination_address_;
629 // Address of destination.
630 Arm_address destination_address_;
633 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
634 // THUMB branch that meets the following conditions:
636 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
637 // branch address is 0xffe.
638 // 2. The branch target address is in the same page as the first word of the
640 // 3. The branch follows a 32-bit instruction which is not a branch.
642 // To do the fix up, we need to store the address of the branch instruction
643 // and its target at least. We also need to store the original branch
644 // instruction bits for the condition code in a conditional branch. The
645 // condition code is used in a special instruction template. We also want
646 // to identify input sections needing Cortex-A8 workaround quickly. We store
647 // extra information about object and section index of the code section
648 // containing a branch being fixed up. The information is used to mark
649 // the code section when we finalize the Cortex-A8 stubs.
652 class Cortex_a8_stub : public Stub
658 // Return the object of the code section containing the branch being fixed
662 { return this->relobj_; }
664 // Return the section index of the code section containing the branch being
668 { return this->shndx_; }
670 // Return the source address of stub. This is the address of the original
671 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
674 source_address() const
675 { return this->source_address_; }
677 // Return the destination address of the stub. This is the branch taken
678 // address of the original branch instruction. LSB is 1 if it is a THUMB
679 // instruction address.
681 destination_address() const
682 { return this->destination_address_; }
684 // Return the instruction being fixed up.
686 original_insn() const
687 { return this->original_insn_; }
690 // Cortex_a8_stubs are created via a stub factory. So these are protected.
691 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
692 unsigned int shndx, Arm_address source_address,
693 Arm_address destination_address, uint32_t original_insn)
694 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
695 source_address_(source_address | 1U),
696 destination_address_(destination_address),
697 original_insn_(original_insn)
700 friend class Stub_factory;
702 // Return the relocation target address of the i-th relocation in the
705 do_reloc_target(size_t i)
707 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
709 // The conditional branch veneer has two relocations.
711 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
715 // All other Cortex-A8 stubs have only one relocation.
717 return this->destination_address_;
721 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
723 do_thumb16_special(size_t);
726 // Object of the code section containing the branch being fixed up.
728 // Section index of the code section containing the branch begin fixed up.
730 // Source address of original branch.
731 Arm_address source_address_;
732 // Destination address of the original branch.
733 Arm_address destination_address_;
734 // Original branch instruction. This is needed for copying the condition
735 // code from a condition branch to its stub.
736 uint32_t original_insn_;
739 // ARMv4 BX Rx branch relocation stub class.
740 class Arm_v4bx_stub : public Stub
746 // Return the associated register.
749 { return this->reg_; }
752 // Arm V4BX stubs are created via a stub factory. So these are protected.
753 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
754 : Stub(stub_template), reg_(reg)
757 friend class Stub_factory;
759 // Return the relocation target address of the i-th relocation in the
762 do_reloc_target(size_t)
763 { gold_unreachable(); }
765 // This may be overridden in the child class.
767 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
770 this->do_fixed_endian_v4bx_write<true>(view, view_size);
772 this->do_fixed_endian_v4bx_write<false>(view, view_size);
776 // A template to implement do_write.
777 template<bool big_endian>
779 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
781 const Insn_template* insns = this->stub_template()->insns();
782 elfcpp::Swap<32, big_endian>::writeval(view,
784 + (this->reg_ << 16)));
785 view += insns[0].size();
786 elfcpp::Swap<32, big_endian>::writeval(view,
787 (insns[1].data() + this->reg_));
788 view += insns[1].size();
789 elfcpp::Swap<32, big_endian>::writeval(view,
790 (insns[2].data() + this->reg_));
793 // A register index (r0-r14), which is associated with the stub.
797 // Stub factory class.
802 // Return the unique instance of this class.
803 static const Stub_factory&
806 static Stub_factory singleton;
810 // Make a relocation stub.
812 make_reloc_stub(Stub_type stub_type) const
814 gold_assert(stub_type >= arm_stub_reloc_first
815 && stub_type <= arm_stub_reloc_last);
816 return new Reloc_stub(this->stub_templates_[stub_type]);
819 // Make a Cortex-A8 stub.
821 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
822 Arm_address source, Arm_address destination,
823 uint32_t original_insn) const
825 gold_assert(stub_type >= arm_stub_cortex_a8_first
826 && stub_type <= arm_stub_cortex_a8_last);
827 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
828 source, destination, original_insn);
831 // Make an ARM V4BX relocation stub.
832 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
834 make_arm_v4bx_stub(uint32_t reg) const
836 gold_assert(reg < 0xf);
837 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
842 // Constructor and destructor are protected since we only return a single
843 // instance created in Stub_factory::get_instance().
847 // A Stub_factory may not be copied since it is a singleton.
848 Stub_factory(const Stub_factory&);
849 Stub_factory& operator=(Stub_factory&);
851 // Stub templates. These are initialized in the constructor.
852 const Stub_template* stub_templates_[arm_stub_type_last+1];
855 // A class to hold stubs for the ARM target.
857 template<bool big_endian>
858 class Stub_table : public Output_data
861 Stub_table(Arm_input_section<big_endian>* owner)
862 : Output_data(), owner_(owner), reloc_stubs_(), cortex_a8_stubs_(),
863 arm_v4bx_stubs_(0xf), prev_data_size_(0), prev_addralign_(1)
869 // Owner of this stub table.
870 Arm_input_section<big_endian>*
872 { return this->owner_; }
874 // Whether this stub table is empty.
878 return (this->reloc_stubs_.empty()
879 && this->cortex_a8_stubs_.empty()
880 && this->arm_v4bx_stubs_.empty());
883 // Return the current data size.
885 current_data_size() const
886 { return this->current_data_size_for_child(); }
888 // Add a STUB with using KEY. Caller is reponsible for avoid adding
889 // if already a STUB with the same key has been added.
891 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
893 const Stub_template* stub_template = stub->stub_template();
894 gold_assert(stub_template->type() == key.stub_type());
895 this->reloc_stubs_[key] = stub;
898 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
899 // Caller is reponsible for avoid adding if already a STUB with the same
900 // address has been added.
902 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
904 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
905 this->cortex_a8_stubs_.insert(value);
908 // Add an ARM V4BX relocation stub. A register index will be retrieved
911 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
913 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
914 this->arm_v4bx_stubs_[stub->reg()] = stub;
917 // Remove all Cortex-A8 stubs.
919 remove_all_cortex_a8_stubs();
921 // Look up a relocation stub using KEY. Return NULL if there is none.
923 find_reloc_stub(const Reloc_stub::Key& key) const
925 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
926 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
929 // Look up an arm v4bx relocation stub using the register index.
930 // Return NULL if there is none.
932 find_arm_v4bx_stub(const uint32_t reg) const
934 gold_assert(reg < 0xf);
935 return this->arm_v4bx_stubs_[reg];
938 // Relocate stubs in this stub table.
940 relocate_stubs(const Relocate_info<32, big_endian>*,
941 Target_arm<big_endian>*, Output_section*,
942 unsigned char*, Arm_address, section_size_type);
944 // Update data size and alignment at the end of a relaxation pass. Return
945 // true if either data size or alignment is different from that of the
946 // previous relaxation pass.
948 update_data_size_and_addralign();
950 // Finalize stubs. Set the offsets of all stubs and mark input sections
951 // needing the Cortex-A8 workaround.
955 // Apply Cortex-A8 workaround to an address range.
957 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
958 unsigned char*, Arm_address,
962 // Write out section contents.
964 do_write(Output_file*);
966 // Return the required alignment.
969 { return this->prev_addralign_; }
971 // Reset address and file offset.
973 do_reset_address_and_file_offset()
974 { this->set_current_data_size_for_child(this->prev_data_size_); }
976 // Set final data size.
978 set_final_data_size()
979 { this->set_data_size(this->current_data_size()); }
982 // Relocate one stub.
984 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
985 Target_arm<big_endian>*, Output_section*,
986 unsigned char*, Arm_address, section_size_type);
988 // Unordered map of relocation stubs.
990 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
991 Reloc_stub::Key::equal_to>
994 // List of Cortex-A8 stubs ordered by addresses of branches being
995 // fixed up in output.
996 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
997 // List of Arm V4BX relocation stubs ordered by associated registers.
998 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1000 // Owner of this stub table.
1001 Arm_input_section<big_endian>* owner_;
1002 // The relocation stubs.
1003 Reloc_stub_map reloc_stubs_;
1004 // The cortex_a8_stubs.
1005 Cortex_a8_stub_list cortex_a8_stubs_;
1006 // The Arm V4BX relocation stubs.
1007 Arm_v4bx_stub_list arm_v4bx_stubs_;
1008 // data size of this in the previous pass.
1009 off_t prev_data_size_;
1010 // address alignment of this in the previous pass.
1011 uint64_t prev_addralign_;
1014 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1015 // we add to the end of an EXIDX input section that goes into the output.
1017 class Arm_exidx_cantunwind : public Output_section_data
1020 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1021 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1024 // Return the object containing the section pointed by this.
1027 { return this->relobj_; }
1029 // Return the section index of the section pointed by this.
1032 { return this->shndx_; }
1036 do_write(Output_file* of)
1038 if (parameters->target().is_big_endian())
1039 this->do_fixed_endian_write<true>(of);
1041 this->do_fixed_endian_write<false>(of);
1045 // Implement do_write for a given endianity.
1046 template<bool big_endian>
1048 do_fixed_endian_write(Output_file*);
1050 // The object containing the section pointed by this.
1052 // The section index of the section pointed by this.
1053 unsigned int shndx_;
1056 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1057 // Offset map is used to map input section offset within the EXIDX section
1058 // to the output offset from the start of this EXIDX section.
1060 typedef std::map<section_offset_type, section_offset_type>
1061 Arm_exidx_section_offset_map;
1063 // Arm_exidx_merged_section class. This represents an EXIDX input section
1064 // with some of its entries merged.
1066 class Arm_exidx_merged_section : public Output_relaxed_input_section
1069 // Constructor for Arm_exidx_merged_section.
1070 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1071 // SECTION_OFFSET_MAP points to a section offset map describing how
1072 // parts of the input section are mapped to output. DELETED_BYTES is
1073 // the number of bytes deleted from the EXIDX input section.
1074 Arm_exidx_merged_section(
1075 const Arm_exidx_input_section& exidx_input_section,
1076 const Arm_exidx_section_offset_map& section_offset_map,
1077 uint32_t deleted_bytes);
1079 // Return the original EXIDX input section.
1080 const Arm_exidx_input_section&
1081 exidx_input_section() const
1082 { return this->exidx_input_section_; }
1084 // Return the section offset map.
1085 const Arm_exidx_section_offset_map&
1086 section_offset_map() const
1087 { return this->section_offset_map_; }
1090 // Write merged section into file OF.
1092 do_write(Output_file* of);
1095 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1096 section_offset_type*) const;
1099 // Original EXIDX input section.
1100 const Arm_exidx_input_section& exidx_input_section_;
1101 // Section offset map.
1102 const Arm_exidx_section_offset_map& section_offset_map_;
1105 // A class to wrap an ordinary input section containing executable code.
1107 template<bool big_endian>
1108 class Arm_input_section : public Output_relaxed_input_section
1111 Arm_input_section(Relobj* relobj, unsigned int shndx)
1112 : Output_relaxed_input_section(relobj, shndx, 1),
1113 original_addralign_(1), original_size_(0), stub_table_(NULL)
1116 ~Arm_input_section()
1123 // Whether this is a stub table owner.
1125 is_stub_table_owner() const
1126 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1128 // Return the stub table.
1129 Stub_table<big_endian>*
1131 { return this->stub_table_; }
1133 // Set the stub_table.
1135 set_stub_table(Stub_table<big_endian>* stub_table)
1136 { this->stub_table_ = stub_table; }
1138 // Downcast a base pointer to an Arm_input_section pointer. This is
1139 // not type-safe but we only use Arm_input_section not the base class.
1140 static Arm_input_section<big_endian>*
1141 as_arm_input_section(Output_relaxed_input_section* poris)
1142 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1145 // Write data to output file.
1147 do_write(Output_file*);
1149 // Return required alignment of this.
1151 do_addralign() const
1153 if (this->is_stub_table_owner())
1154 return std::max(this->stub_table_->addralign(),
1155 this->original_addralign_);
1157 return this->original_addralign_;
1160 // Finalize data size.
1162 set_final_data_size();
1164 // Reset address and file offset.
1166 do_reset_address_and_file_offset();
1170 do_output_offset(const Relobj* object, unsigned int shndx,
1171 section_offset_type offset,
1172 section_offset_type* poutput) const
1174 if ((object == this->relobj())
1175 && (shndx == this->shndx())
1177 && (convert_types<uint64_t, section_offset_type>(offset)
1178 <= this->original_size_))
1188 // Copying is not allowed.
1189 Arm_input_section(const Arm_input_section&);
1190 Arm_input_section& operator=(const Arm_input_section&);
1192 // Address alignment of the original input section.
1193 uint64_t original_addralign_;
1194 // Section size of the original input section.
1195 uint64_t original_size_;
1197 Stub_table<big_endian>* stub_table_;
1200 // Arm_exidx_fixup class. This is used to define a number of methods
1201 // and keep states for fixing up EXIDX coverage.
1203 class Arm_exidx_fixup
1206 Arm_exidx_fixup(Output_section* exidx_output_section)
1207 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1208 last_inlined_entry_(0), last_input_section_(NULL),
1209 section_offset_map_(NULL), first_output_text_section_(NULL)
1213 { delete this->section_offset_map_; }
1215 // Process an EXIDX section for entry merging. Return number of bytes to
1216 // be deleted in output. If parts of the input EXIDX section are merged
1217 // a heap allocated Arm_exidx_section_offset_map is store in the located
1218 // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for
1220 template<bool big_endian>
1222 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1223 Arm_exidx_section_offset_map** psection_offset_map);
1225 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1226 // input section, if there is not one already.
1228 add_exidx_cantunwind_as_needed();
1230 // Return the output section for the text section which is linked to the
1231 // first exidx input in output.
1233 first_output_text_section() const
1234 { return this->first_output_text_section_; }
1237 // Copying is not allowed.
1238 Arm_exidx_fixup(const Arm_exidx_fixup&);
1239 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1241 // Type of EXIDX unwind entry.
1246 // EXIDX_CANTUNWIND.
1247 UT_EXIDX_CANTUNWIND,
1254 // Process an EXIDX entry. We only care about the second word of the
1255 // entry. Return true if the entry can be deleted.
1257 process_exidx_entry(uint32_t second_word);
1259 // Update the current section offset map during EXIDX section fix-up.
1260 // If there is no map, create one. INPUT_OFFSET is the offset of a
1261 // reference point, DELETED_BYTES is the number of deleted by in the
1262 // section so far. If DELETE_ENTRY is true, the reference point and
1263 // all offsets after the previous reference point are discarded.
1265 update_offset_map(section_offset_type input_offset,
1266 section_size_type deleted_bytes, bool delete_entry);
1268 // EXIDX output section.
1269 Output_section* exidx_output_section_;
1270 // Unwind type of the last EXIDX entry processed.
1271 Unwind_type last_unwind_type_;
1272 // Last seen inlined EXIDX entry.
1273 uint32_t last_inlined_entry_;
1274 // Last processed EXIDX input section.
1275 const Arm_exidx_input_section* last_input_section_;
1276 // Section offset map created in process_exidx_section.
1277 Arm_exidx_section_offset_map* section_offset_map_;
1278 // Output section for the text section which is linked to the first exidx
1280 Output_section* first_output_text_section_;
1283 // Arm output section class. This is defined mainly to add a number of
1284 // stub generation methods.
1286 template<bool big_endian>
1287 class Arm_output_section : public Output_section
1290 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1292 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1293 elfcpp::Elf_Xword flags)
1294 : Output_section(name, type, flags)
1297 ~Arm_output_section()
1300 // Group input sections for stub generation.
1302 group_sections(section_size_type, bool, Target_arm<big_endian>*);
1304 // Downcast a base pointer to an Arm_output_section pointer. This is
1305 // not type-safe but we only use Arm_output_section not the base class.
1306 static Arm_output_section<big_endian>*
1307 as_arm_output_section(Output_section* os)
1308 { return static_cast<Arm_output_section<big_endian>*>(os); }
1310 // Append all input text sections in this into LIST.
1312 append_text_sections_to_list(Text_section_list* list);
1314 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1315 // is a list of text input sections sorted in ascending order of their
1316 // output addresses.
1318 fix_exidx_coverage(const Text_section_list& sorted_text_section,
1319 Symbol_table* symtab);
1323 typedef Output_section::Input_section Input_section;
1324 typedef Output_section::Input_section_list Input_section_list;
1326 // Create a stub group.
1327 void create_stub_group(Input_section_list::const_iterator,
1328 Input_section_list::const_iterator,
1329 Input_section_list::const_iterator,
1330 Target_arm<big_endian>*,
1331 std::vector<Output_relaxed_input_section*>*);
1334 // Arm_exidx_input_section class. This represents an EXIDX input section.
1336 class Arm_exidx_input_section
1339 static const section_offset_type invalid_offset =
1340 static_cast<section_offset_type>(-1);
1342 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1343 unsigned int link, uint32_t size, uint32_t addralign)
1344 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1345 addralign_(addralign)
1348 ~Arm_exidx_input_section()
1351 // Accessors: This is a read-only class.
1353 // Return the object containing this EXIDX input section.
1356 { return this->relobj_; }
1358 // Return the section index of this EXIDX input section.
1361 { return this->shndx_; }
1363 // Return the section index of linked text section in the same object.
1366 { return this->link_; }
1368 // Return size of the EXIDX input section.
1371 { return this->size_; }
1373 // Reutnr address alignment of EXIDX input section.
1376 { return this->addralign_; }
1379 // Object containing this.
1381 // Section index of this.
1382 unsigned int shndx_;
1383 // text section linked to this in the same object.
1385 // Size of this. For ARM 32-bit is sufficient.
1387 // Address alignment of this. For ARM 32-bit is sufficient.
1388 uint32_t addralign_;
1391 // Arm_relobj class.
1393 template<bool big_endian>
1394 class Arm_relobj : public Sized_relobj<32, big_endian>
1397 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1399 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1400 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1401 : Sized_relobj<32, big_endian>(name, input_file, offset, ehdr),
1402 stub_tables_(), local_symbol_is_thumb_function_(),
1403 attributes_section_data_(NULL), mapping_symbols_info_(),
1404 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1405 output_local_symbol_count_needs_update_(false)
1409 { delete this->attributes_section_data_; }
1411 // Return the stub table of the SHNDX-th section if there is one.
1412 Stub_table<big_endian>*
1413 stub_table(unsigned int shndx) const
1415 gold_assert(shndx < this->stub_tables_.size());
1416 return this->stub_tables_[shndx];
1419 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1421 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1423 gold_assert(shndx < this->stub_tables_.size());
1424 this->stub_tables_[shndx] = stub_table;
1427 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1428 // index. This is only valid after do_count_local_symbol is called.
1430 local_symbol_is_thumb_function(unsigned int r_sym) const
1432 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1433 return this->local_symbol_is_thumb_function_[r_sym];
1436 // Scan all relocation sections for stub generation.
1438 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1441 // Convert regular input section with index SHNDX to a relaxed section.
1443 convert_input_section_to_relaxed_section(unsigned shndx)
1445 // The stubs have relocations and we need to process them after writing
1446 // out the stubs. So relocation now must follow section write.
1447 this->set_section_offset(shndx, -1ULL);
1448 this->set_relocs_must_follow_section_writes();
1451 // Downcast a base pointer to an Arm_relobj pointer. This is
1452 // not type-safe but we only use Arm_relobj not the base class.
1453 static Arm_relobj<big_endian>*
1454 as_arm_relobj(Relobj* relobj)
1455 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1457 // Processor-specific flags in ELF file header. This is valid only after
1460 processor_specific_flags() const
1461 { return this->processor_specific_flags_; }
1463 // Attribute section data This is the contents of the .ARM.attribute section
1465 const Attributes_section_data*
1466 attributes_section_data() const
1467 { return this->attributes_section_data_; }
1469 // Mapping symbol location.
1470 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1472 // Functor for STL container.
1473 struct Mapping_symbol_position_less
1476 operator()(const Mapping_symbol_position& p1,
1477 const Mapping_symbol_position& p2) const
1479 return (p1.first < p2.first
1480 || (p1.first == p2.first && p1.second < p2.second));
1484 // We only care about the first character of a mapping symbol, so
1485 // we only store that instead of the whole symbol name.
1486 typedef std::map<Mapping_symbol_position, char,
1487 Mapping_symbol_position_less> Mapping_symbols_info;
1489 // Whether a section contains any Cortex-A8 workaround.
1491 section_has_cortex_a8_workaround(unsigned int shndx) const
1493 return (this->section_has_cortex_a8_workaround_ != NULL
1494 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1497 // Mark a section that has Cortex-A8 workaround.
1499 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1501 if (this->section_has_cortex_a8_workaround_ == NULL)
1502 this->section_has_cortex_a8_workaround_ =
1503 new std::vector<bool>(this->shnum(), false);
1504 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1507 // Return the EXIDX section of an text section with index SHNDX or NULL
1508 // if the text section has no associated EXIDX section.
1509 const Arm_exidx_input_section*
1510 exidx_input_section_by_link(unsigned int shndx) const
1512 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1513 return ((p != this->exidx_section_map_.end()
1514 && p->second->link() == shndx)
1519 // Return the EXIDX section with index SHNDX or NULL if there is none.
1520 const Arm_exidx_input_section*
1521 exidx_input_section_by_shndx(unsigned shndx) const
1523 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1524 return ((p != this->exidx_section_map_.end()
1525 && p->second->shndx() == shndx)
1530 // Whether output local symbol count needs updating.
1532 output_local_symbol_count_needs_update() const
1533 { return this->output_local_symbol_count_needs_update_; }
1535 // Set output_local_symbol_count_needs_update flag to be true.
1537 set_output_local_symbol_count_needs_update()
1538 { this->output_local_symbol_count_needs_update_ = true; }
1540 // Update output local symbol count at the end of relaxation.
1542 update_output_local_symbol_count();
1545 // Post constructor setup.
1549 // Call parent's setup method.
1550 Sized_relobj<32, big_endian>::do_setup();
1552 // Initialize look-up tables.
1553 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1554 this->stub_tables_.swap(empty_stub_table_list);
1557 // Count the local symbols.
1559 do_count_local_symbols(Stringpool_template<char>*,
1560 Stringpool_template<char>*);
1563 do_relocate_sections(const Symbol_table* symtab, const Layout* layout,
1564 const unsigned char* pshdrs,
1565 typename Sized_relobj<32, big_endian>::Views* pivews);
1567 // Read the symbol information.
1569 do_read_symbols(Read_symbols_data* sd);
1571 // Process relocs for garbage collection.
1573 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1577 // Whether a section needs to be scanned for relocation stubs.
1579 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1580 const Relobj::Output_sections&,
1581 const Symbol_table *, const unsigned char*);
1583 // Whether a section is a scannable text section.
1585 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1586 const Output_section*, const Symbol_table *);
1588 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1590 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1591 unsigned int, Output_section*,
1592 const Symbol_table *);
1594 // Scan a section for the Cortex-A8 erratum.
1596 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1597 unsigned int, Output_section*,
1598 Target_arm<big_endian>*);
1600 // Make a new Arm_exidx_input_section object for EXIDX section with
1601 // index SHNDX and section header SHDR.
1603 make_exidx_input_section(unsigned int shndx,
1604 const elfcpp::Shdr<32, big_endian>& shdr);
1606 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1607 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1610 // List of stub tables.
1611 Stub_table_list stub_tables_;
1612 // Bit vector to tell if a local symbol is a thumb function or not.
1613 // This is only valid after do_count_local_symbol is called.
1614 std::vector<bool> local_symbol_is_thumb_function_;
1615 // processor-specific flags in ELF file header.
1616 elfcpp::Elf_Word processor_specific_flags_;
1617 // Object attributes if there is an .ARM.attributes section or NULL.
1618 Attributes_section_data* attributes_section_data_;
1619 // Mapping symbols information.
1620 Mapping_symbols_info mapping_symbols_info_;
1621 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1622 std::vector<bool>* section_has_cortex_a8_workaround_;
1623 // Map a text section to its associated .ARM.exidx section, if there is one.
1624 Exidx_section_map exidx_section_map_;
1625 // Whether output local symbol count needs updating.
1626 bool output_local_symbol_count_needs_update_;
1629 // Arm_dynobj class.
1631 template<bool big_endian>
1632 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1635 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1636 const elfcpp::Ehdr<32, big_endian>& ehdr)
1637 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1638 processor_specific_flags_(0), attributes_section_data_(NULL)
1642 { delete this->attributes_section_data_; }
1644 // Downcast a base pointer to an Arm_relobj pointer. This is
1645 // not type-safe but we only use Arm_relobj not the base class.
1646 static Arm_dynobj<big_endian>*
1647 as_arm_dynobj(Dynobj* dynobj)
1648 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1650 // Processor-specific flags in ELF file header. This is valid only after
1653 processor_specific_flags() const
1654 { return this->processor_specific_flags_; }
1656 // Attributes section data.
1657 const Attributes_section_data*
1658 attributes_section_data() const
1659 { return this->attributes_section_data_; }
1662 // Read the symbol information.
1664 do_read_symbols(Read_symbols_data* sd);
1667 // processor-specific flags in ELF file header.
1668 elfcpp::Elf_Word processor_specific_flags_;
1669 // Object attributes if there is an .ARM.attributes section or NULL.
1670 Attributes_section_data* attributes_section_data_;
1673 // Functor to read reloc addends during stub generation.
1675 template<int sh_type, bool big_endian>
1676 struct Stub_addend_reader
1678 // Return the addend for a relocation of a particular type. Depending
1679 // on whether this is a REL or RELA relocation, read the addend from a
1680 // view or from a Reloc object.
1681 elfcpp::Elf_types<32>::Elf_Swxword
1683 unsigned int /* r_type */,
1684 const unsigned char* /* view */,
1685 const typename Reloc_types<sh_type,
1686 32, big_endian>::Reloc& /* reloc */) const;
1689 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1691 template<bool big_endian>
1692 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1694 elfcpp::Elf_types<32>::Elf_Swxword
1697 const unsigned char*,
1698 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1701 // Specialized Stub_addend_reader for RELA type relocation sections.
1702 // We currently do not handle RELA type relocation sections but it is trivial
1703 // to implement the addend reader. This is provided for completeness and to
1704 // make it easier to add support for RELA relocation sections in the future.
1706 template<bool big_endian>
1707 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1709 elfcpp::Elf_types<32>::Elf_Swxword
1712 const unsigned char*,
1713 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1714 big_endian>::Reloc& reloc) const
1715 { return reloc.get_r_addend(); }
1718 // Cortex_a8_reloc class. We keep record of relocation that may need
1719 // the Cortex-A8 erratum workaround.
1721 class Cortex_a8_reloc
1724 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1725 Arm_address destination)
1726 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1732 // Accessors: This is a read-only class.
1734 // Return the relocation stub associated with this relocation if there is
1738 { return this->reloc_stub_; }
1740 // Return the relocation type.
1743 { return this->r_type_; }
1745 // Return the destination address of the relocation. LSB stores the THUMB
1749 { return this->destination_; }
1752 // Associated relocation stub if there is one, or NULL.
1753 const Reloc_stub* reloc_stub_;
1755 unsigned int r_type_;
1756 // Destination address of this relocation. LSB is used to distinguish
1758 Arm_address destination_;
1761 // Utilities for manipulating integers of up to 32-bits
1765 // Sign extend an n-bit unsigned integer stored in an uint32_t into
1766 // an int32_t. NO_BITS must be between 1 to 32.
1767 template<int no_bits>
1768 static inline int32_t
1769 sign_extend(uint32_t bits)
1771 gold_assert(no_bits >= 0 && no_bits <= 32);
1773 return static_cast<int32_t>(bits);
1774 uint32_t mask = (~((uint32_t) 0)) >> (32 - no_bits);
1776 uint32_t top_bit = 1U << (no_bits - 1);
1777 int32_t as_signed = static_cast<int32_t>(bits);
1778 return (bits & top_bit) ? as_signed + (-top_bit * 2) : as_signed;
1781 // Detects overflow of an NO_BITS integer stored in a uint32_t.
1782 template<int no_bits>
1784 has_overflow(uint32_t bits)
1786 gold_assert(no_bits >= 0 && no_bits <= 32);
1789 int32_t max = (1 << (no_bits - 1)) - 1;
1790 int32_t min = -(1 << (no_bits - 1));
1791 int32_t as_signed = static_cast<int32_t>(bits);
1792 return as_signed > max || as_signed < min;
1795 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
1796 // fits in the given number of bits as either a signed or unsigned value.
1797 // For example, has_signed_unsigned_overflow<8> would check
1798 // -128 <= bits <= 255
1799 template<int no_bits>
1801 has_signed_unsigned_overflow(uint32_t bits)
1803 gold_assert(no_bits >= 2 && no_bits <= 32);
1806 int32_t max = static_cast<int32_t>((1U << no_bits) - 1);
1807 int32_t min = -(1 << (no_bits - 1));
1808 int32_t as_signed = static_cast<int32_t>(bits);
1809 return as_signed > max || as_signed < min;
1812 // Select bits from A and B using bits in MASK. For each n in [0..31],
1813 // the n-th bit in the result is chosen from the n-th bits of A and B.
1814 // A zero selects A and a one selects B.
1815 static inline uint32_t
1816 bit_select(uint32_t a, uint32_t b, uint32_t mask)
1817 { return (a & ~mask) | (b & mask); }
1820 template<bool big_endian>
1821 class Target_arm : public Sized_target<32, big_endian>
1824 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
1827 // When were are relocating a stub, we pass this as the relocation number.
1828 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
1831 : Sized_target<32, big_endian>(&arm_info),
1832 got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL),
1833 copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL), stub_tables_(),
1834 stub_factory_(Stub_factory::get_instance()), may_use_blx_(false),
1835 should_force_pic_veneer_(false), arm_input_section_map_(),
1836 attributes_section_data_(NULL), fix_cortex_a8_(false),
1837 cortex_a8_relocs_info_()
1840 // Whether we can use BLX.
1843 { return this->may_use_blx_; }
1845 // Set use-BLX flag.
1847 set_may_use_blx(bool value)
1848 { this->may_use_blx_ = value; }
1850 // Whether we force PCI branch veneers.
1852 should_force_pic_veneer() const
1853 { return this->should_force_pic_veneer_; }
1855 // Set PIC veneer flag.
1857 set_should_force_pic_veneer(bool value)
1858 { this->should_force_pic_veneer_ = value; }
1860 // Whether we use THUMB-2 instructions.
1862 using_thumb2() const
1864 Object_attribute* attr =
1865 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1866 int arch = attr->int_value();
1867 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
1870 // Whether we use THUMB/THUMB-2 instructions only.
1872 using_thumb_only() const
1874 Object_attribute* attr =
1875 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1876 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
1877 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
1879 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
1880 return attr->int_value() == 'M';
1883 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
1885 may_use_arm_nop() const
1887 Object_attribute* attr =
1888 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1889 int arch = attr->int_value();
1890 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1891 || arch == elfcpp::TAG_CPU_ARCH_V6K
1892 || arch == elfcpp::TAG_CPU_ARCH_V7
1893 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1896 // Whether we have THUMB-2 NOP.W instruction.
1898 may_use_thumb2_nop() const
1900 Object_attribute* attr =
1901 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1902 int arch = attr->int_value();
1903 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1904 || arch == elfcpp::TAG_CPU_ARCH_V7
1905 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1908 // Process the relocations to determine unreferenced sections for
1909 // garbage collection.
1911 gc_process_relocs(Symbol_table* symtab,
1913 Sized_relobj<32, big_endian>* object,
1914 unsigned int data_shndx,
1915 unsigned int sh_type,
1916 const unsigned char* prelocs,
1918 Output_section* output_section,
1919 bool needs_special_offset_handling,
1920 size_t local_symbol_count,
1921 const unsigned char* plocal_symbols);
1923 // Scan the relocations to look for symbol adjustments.
1925 scan_relocs(Symbol_table* symtab,
1927 Sized_relobj<32, big_endian>* object,
1928 unsigned int data_shndx,
1929 unsigned int sh_type,
1930 const unsigned char* prelocs,
1932 Output_section* output_section,
1933 bool needs_special_offset_handling,
1934 size_t local_symbol_count,
1935 const unsigned char* plocal_symbols);
1937 // Finalize the sections.
1939 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
1941 // Return the value to use for a dynamic symbol which requires special
1944 do_dynsym_value(const Symbol*) const;
1946 // Relocate a section.
1948 relocate_section(const Relocate_info<32, big_endian>*,
1949 unsigned int sh_type,
1950 const unsigned char* prelocs,
1952 Output_section* output_section,
1953 bool needs_special_offset_handling,
1954 unsigned char* view,
1955 Arm_address view_address,
1956 section_size_type view_size,
1957 const Reloc_symbol_changes*);
1959 // Scan the relocs during a relocatable link.
1961 scan_relocatable_relocs(Symbol_table* symtab,
1963 Sized_relobj<32, big_endian>* object,
1964 unsigned int data_shndx,
1965 unsigned int sh_type,
1966 const unsigned char* prelocs,
1968 Output_section* output_section,
1969 bool needs_special_offset_handling,
1970 size_t local_symbol_count,
1971 const unsigned char* plocal_symbols,
1972 Relocatable_relocs*);
1974 // Relocate a section during a relocatable link.
1976 relocate_for_relocatable(const Relocate_info<32, big_endian>*,
1977 unsigned int sh_type,
1978 const unsigned char* prelocs,
1980 Output_section* output_section,
1981 off_t offset_in_output_section,
1982 const Relocatable_relocs*,
1983 unsigned char* view,
1984 Arm_address view_address,
1985 section_size_type view_size,
1986 unsigned char* reloc_view,
1987 section_size_type reloc_view_size);
1989 // Return whether SYM is defined by the ABI.
1991 do_is_defined_by_abi(Symbol* sym) const
1992 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
1994 // Return the size of the GOT section.
1998 gold_assert(this->got_ != NULL);
1999 return this->got_->data_size();
2002 // Map platform-specific reloc types
2004 get_real_reloc_type (unsigned int r_type);
2007 // Methods to support stub-generations.
2010 // Return the stub factory
2012 stub_factory() const
2013 { return this->stub_factory_; }
2015 // Make a new Arm_input_section object.
2016 Arm_input_section<big_endian>*
2017 new_arm_input_section(Relobj*, unsigned int);
2019 // Find the Arm_input_section object corresponding to the SHNDX-th input
2020 // section of RELOBJ.
2021 Arm_input_section<big_endian>*
2022 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2024 // Make a new Stub_table
2025 Stub_table<big_endian>*
2026 new_stub_table(Arm_input_section<big_endian>*);
2028 // Scan a section for stub generation.
2030 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2031 const unsigned char*, size_t, Output_section*,
2032 bool, const unsigned char*, Arm_address,
2037 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2038 Output_section*, unsigned char*, Arm_address,
2041 // Get the default ARM target.
2042 static Target_arm<big_endian>*
2045 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2046 && parameters->target().is_big_endian() == big_endian);
2047 return static_cast<Target_arm<big_endian>*>(
2048 parameters->sized_target<32, big_endian>());
2051 // Whether NAME belongs to a mapping symbol.
2053 is_mapping_symbol_name(const char* name)
2057 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2058 && (name[2] == '\0' || name[2] == '.'));
2061 // Whether we work around the Cortex-A8 erratum.
2063 fix_cortex_a8() const
2064 { return this->fix_cortex_a8_; }
2066 // Whether we fix R_ARM_V4BX relocation.
2068 // 1 - replace with MOV instruction (armv4 target)
2069 // 2 - make interworking veneer (>= armv4t targets only)
2070 General_options::Fix_v4bx
2072 { return parameters->options().fix_v4bx(); }
2074 // Scan a span of THUMB code section for Cortex-A8 erratum.
2076 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2077 section_size_type, section_size_type,
2078 const unsigned char*, Arm_address);
2080 // Apply Cortex-A8 workaround to a branch.
2082 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2083 unsigned char*, Arm_address);
2086 // Make an ELF object.
2088 do_make_elf_object(const std::string&, Input_file*, off_t,
2089 const elfcpp::Ehdr<32, big_endian>& ehdr);
2092 do_make_elf_object(const std::string&, Input_file*, off_t,
2093 const elfcpp::Ehdr<32, !big_endian>&)
2094 { gold_unreachable(); }
2097 do_make_elf_object(const std::string&, Input_file*, off_t,
2098 const elfcpp::Ehdr<64, false>&)
2099 { gold_unreachable(); }
2102 do_make_elf_object(const std::string&, Input_file*, off_t,
2103 const elfcpp::Ehdr<64, true>&)
2104 { gold_unreachable(); }
2106 // Make an output section.
2108 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2109 elfcpp::Elf_Xword flags)
2110 { return new Arm_output_section<big_endian>(name, type, flags); }
2113 do_adjust_elf_header(unsigned char* view, int len) const;
2115 // We only need to generate stubs, and hence perform relaxation if we are
2116 // not doing relocatable linking.
2118 do_may_relax() const
2119 { return !parameters->options().relocatable(); }
2122 do_relax(int, const Input_objects*, Symbol_table*, Layout*);
2124 // Determine whether an object attribute tag takes an integer, a
2127 do_attribute_arg_type(int tag) const;
2129 // Reorder tags during output.
2131 do_attributes_order(int num) const;
2133 // This is called when the target is selected as the default.
2135 do_select_as_default_target()
2137 // No locking is required since there should only be one default target.
2138 // We cannot have both the big-endian and little-endian ARM targets
2140 gold_assert(arm_reloc_property_table == NULL);
2141 arm_reloc_property_table = new Arm_reloc_property_table();
2145 // The class which scans relocations.
2150 : issued_non_pic_error_(false)
2154 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2155 Sized_relobj<32, big_endian>* object,
2156 unsigned int data_shndx,
2157 Output_section* output_section,
2158 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2159 const elfcpp::Sym<32, big_endian>& lsym);
2162 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2163 Sized_relobj<32, big_endian>* object,
2164 unsigned int data_shndx,
2165 Output_section* output_section,
2166 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2171 unsupported_reloc_local(Sized_relobj<32, big_endian>*,
2172 unsigned int r_type);
2175 unsupported_reloc_global(Sized_relobj<32, big_endian>*,
2176 unsigned int r_type, Symbol*);
2179 check_non_pic(Relobj*, unsigned int r_type);
2181 // Almost identical to Symbol::needs_plt_entry except that it also
2182 // handles STT_ARM_TFUNC.
2184 symbol_needs_plt_entry(const Symbol* sym)
2186 // An undefined symbol from an executable does not need a PLT entry.
2187 if (sym->is_undefined() && !parameters->options().shared())
2190 return (!parameters->doing_static_link()
2191 && (sym->type() == elfcpp::STT_FUNC
2192 || sym->type() == elfcpp::STT_ARM_TFUNC)
2193 && (sym->is_from_dynobj()
2194 || sym->is_undefined()
2195 || sym->is_preemptible()));
2198 // Whether we have issued an error about a non-PIC compilation.
2199 bool issued_non_pic_error_;
2202 // The class which implements relocation.
2212 // Return whether the static relocation needs to be applied.
2214 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2217 Output_section* output_section);
2219 // Do a relocation. Return false if the caller should not issue
2220 // any warnings about this relocation.
2222 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2223 Output_section*, size_t relnum,
2224 const elfcpp::Rel<32, big_endian>&,
2225 unsigned int r_type, const Sized_symbol<32>*,
2226 const Symbol_value<32>*,
2227 unsigned char*, Arm_address,
2230 // Return whether we want to pass flag NON_PIC_REF for this
2231 // reloc. This means the relocation type accesses a symbol not via
2234 reloc_is_non_pic (unsigned int r_type)
2238 // These relocation types reference GOT or PLT entries explicitly.
2239 case elfcpp::R_ARM_GOT_BREL:
2240 case elfcpp::R_ARM_GOT_ABS:
2241 case elfcpp::R_ARM_GOT_PREL:
2242 case elfcpp::R_ARM_GOT_BREL12:
2243 case elfcpp::R_ARM_PLT32_ABS:
2244 case elfcpp::R_ARM_TLS_GD32:
2245 case elfcpp::R_ARM_TLS_LDM32:
2246 case elfcpp::R_ARM_TLS_IE32:
2247 case elfcpp::R_ARM_TLS_IE12GP:
2249 // These relocate types may use PLT entries.
2250 case elfcpp::R_ARM_CALL:
2251 case elfcpp::R_ARM_THM_CALL:
2252 case elfcpp::R_ARM_JUMP24:
2253 case elfcpp::R_ARM_THM_JUMP24:
2254 case elfcpp::R_ARM_THM_JUMP19:
2255 case elfcpp::R_ARM_PLT32:
2256 case elfcpp::R_ARM_THM_XPC22:
2265 // A class which returns the size required for a relocation type,
2266 // used while scanning relocs during a relocatable link.
2267 class Relocatable_size_for_reloc
2271 get_size_for_reloc(unsigned int, Relobj*);
2274 // Get the GOT section, creating it if necessary.
2275 Output_data_got<32, big_endian>*
2276 got_section(Symbol_table*, Layout*);
2278 // Get the GOT PLT section.
2280 got_plt_section() const
2282 gold_assert(this->got_plt_ != NULL);
2283 return this->got_plt_;
2286 // Create a PLT entry for a global symbol.
2288 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2290 // Get the PLT section.
2291 const Output_data_plt_arm<big_endian>*
2294 gold_assert(this->plt_ != NULL);
2298 // Get the dynamic reloc section, creating it if necessary.
2300 rel_dyn_section(Layout*);
2302 // Return true if the symbol may need a COPY relocation.
2303 // References from an executable object to non-function symbols
2304 // defined in a dynamic object may need a COPY relocation.
2306 may_need_copy_reloc(Symbol* gsym)
2308 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2309 && gsym->may_need_copy_reloc());
2312 // Add a potential copy relocation.
2314 copy_reloc(Symbol_table* symtab, Layout* layout,
2315 Sized_relobj<32, big_endian>* object,
2316 unsigned int shndx, Output_section* output_section,
2317 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2319 this->copy_relocs_.copy_reloc(symtab, layout,
2320 symtab->get_sized_symbol<32>(sym),
2321 object, shndx, output_section, reloc,
2322 this->rel_dyn_section(layout));
2325 // Whether two EABI versions are compatible.
2327 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2329 // Merge processor-specific flags from input object and those in the ELF
2330 // header of the output.
2332 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2334 // Get the secondary compatible architecture.
2336 get_secondary_compatible_arch(const Attributes_section_data*);
2338 // Set the secondary compatible architecture.
2340 set_secondary_compatible_arch(Attributes_section_data*, int);
2343 tag_cpu_arch_combine(const char*, int, int*, int, int);
2345 // Helper to print AEABI enum tag value.
2347 aeabi_enum_name(unsigned int);
2349 // Return string value for TAG_CPU_name.
2351 tag_cpu_name_value(unsigned int);
2353 // Merge object attributes from input object and those in the output.
2355 merge_object_attributes(const char*, const Attributes_section_data*);
2357 // Helper to get an AEABI object attribute
2359 get_aeabi_object_attribute(int tag) const
2361 Attributes_section_data* pasd = this->attributes_section_data_;
2362 gold_assert(pasd != NULL);
2363 Object_attribute* attr =
2364 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2365 gold_assert(attr != NULL);
2370 // Methods to support stub-generations.
2373 // Group input sections for stub generation.
2375 group_sections(Layout*, section_size_type, bool);
2377 // Scan a relocation for stub generation.
2379 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2380 const Sized_symbol<32>*, unsigned int,
2381 const Symbol_value<32>*,
2382 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2384 // Scan a relocation section for stub.
2385 template<int sh_type>
2387 scan_reloc_section_for_stubs(
2388 const Relocate_info<32, big_endian>* relinfo,
2389 const unsigned char* prelocs,
2391 Output_section* output_section,
2392 bool needs_special_offset_handling,
2393 const unsigned char* view,
2394 elfcpp::Elf_types<32>::Elf_Addr view_address,
2397 // Fix .ARM.exidx section coverage.
2399 fix_exidx_coverage(Layout*, Arm_output_section<big_endian>*, Symbol_table*);
2401 // Functors for STL set.
2402 struct output_section_address_less_than
2405 operator()(const Output_section* s1, const Output_section* s2) const
2406 { return s1->address() < s2->address(); }
2409 // Information about this specific target which we pass to the
2410 // general Target structure.
2411 static const Target::Target_info arm_info;
2413 // The types of GOT entries needed for this platform.
2416 GOT_TYPE_STANDARD = 0 // GOT entry for a regular symbol
2419 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2421 // Map input section to Arm_input_section.
2422 typedef Unordered_map<Section_id,
2423 Arm_input_section<big_endian>*,
2425 Arm_input_section_map;
2427 // Map output addresses to relocs for Cortex-A8 erratum.
2428 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2429 Cortex_a8_relocs_info;
2432 Output_data_got<32, big_endian>* got_;
2434 Output_data_plt_arm<big_endian>* plt_;
2435 // The GOT PLT section.
2436 Output_data_space* got_plt_;
2437 // The dynamic reloc section.
2438 Reloc_section* rel_dyn_;
2439 // Relocs saved to avoid a COPY reloc.
2440 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2441 // Space for variables copied with a COPY reloc.
2442 Output_data_space* dynbss_;
2443 // Vector of Stub_tables created.
2444 Stub_table_list stub_tables_;
2446 const Stub_factory &stub_factory_;
2447 // Whether we can use BLX.
2449 // Whether we force PIC branch veneers.
2450 bool should_force_pic_veneer_;
2451 // Map for locating Arm_input_sections.
2452 Arm_input_section_map arm_input_section_map_;
2453 // Attributes section data in output.
2454 Attributes_section_data* attributes_section_data_;
2455 // Whether we want to fix code for Cortex-A8 erratum.
2456 bool fix_cortex_a8_;
2457 // Map addresses to relocs for Cortex-A8 erratum.
2458 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2461 template<bool big_endian>
2462 const Target::Target_info Target_arm<big_endian>::arm_info =
2465 big_endian, // is_big_endian
2466 elfcpp::EM_ARM, // machine_code
2467 false, // has_make_symbol
2468 false, // has_resolve
2469 false, // has_code_fill
2470 true, // is_default_stack_executable
2472 "/usr/lib/libc.so.1", // dynamic_linker
2473 0x8000, // default_text_segment_address
2474 0x1000, // abi_pagesize (overridable by -z max-page-size)
2475 0x1000, // common_pagesize (overridable by -z common-page-size)
2476 elfcpp::SHN_UNDEF, // small_common_shndx
2477 elfcpp::SHN_UNDEF, // large_common_shndx
2478 0, // small_common_section_flags
2479 0, // large_common_section_flags
2480 ".ARM.attributes", // attributes_section
2481 "aeabi" // attributes_vendor
2484 // Arm relocate functions class
2487 template<bool big_endian>
2488 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
2493 STATUS_OKAY, // No error during relocation.
2494 STATUS_OVERFLOW, // Relocation oveflow.
2495 STATUS_BAD_RELOC // Relocation cannot be applied.
2499 typedef Relocate_functions<32, big_endian> Base;
2500 typedef Arm_relocate_functions<big_endian> This;
2502 // Encoding of imm16 argument for movt and movw ARM instructions
2505 // imm16 := imm4 | imm12
2507 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2508 // +-------+---------------+-------+-------+-----------------------+
2509 // | | |imm4 | |imm12 |
2510 // +-------+---------------+-------+-------+-----------------------+
2512 // Extract the relocation addend from VAL based on the ARM
2513 // instruction encoding described above.
2514 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2515 extract_arm_movw_movt_addend(
2516 typename elfcpp::Swap<32, big_endian>::Valtype val)
2518 // According to the Elf ABI for ARM Architecture the immediate
2519 // field is sign-extended to form the addend.
2520 return utils::sign_extend<16>(((val >> 4) & 0xf000) | (val & 0xfff));
2523 // Insert X into VAL based on the ARM instruction encoding described
2525 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2526 insert_val_arm_movw_movt(
2527 typename elfcpp::Swap<32, big_endian>::Valtype val,
2528 typename elfcpp::Swap<32, big_endian>::Valtype x)
2532 val |= (x & 0xf000) << 4;
2536 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2539 // imm16 := imm4 | i | imm3 | imm8
2541 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2542 // +---------+-+-----------+-------++-+-----+-------+---------------+
2543 // | |i| |imm4 || |imm3 | |imm8 |
2544 // +---------+-+-----------+-------++-+-----+-------+---------------+
2546 // Extract the relocation addend from VAL based on the Thumb2
2547 // instruction encoding described above.
2548 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2549 extract_thumb_movw_movt_addend(
2550 typename elfcpp::Swap<32, big_endian>::Valtype val)
2552 // According to the Elf ABI for ARM Architecture the immediate
2553 // field is sign-extended to form the addend.
2554 return utils::sign_extend<16>(((val >> 4) & 0xf000)
2555 | ((val >> 15) & 0x0800)
2556 | ((val >> 4) & 0x0700)
2560 // Insert X into VAL based on the Thumb2 instruction encoding
2562 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2563 insert_val_thumb_movw_movt(
2564 typename elfcpp::Swap<32, big_endian>::Valtype val,
2565 typename elfcpp::Swap<32, big_endian>::Valtype x)
2568 val |= (x & 0xf000) << 4;
2569 val |= (x & 0x0800) << 15;
2570 val |= (x & 0x0700) << 4;
2571 val |= (x & 0x00ff);
2575 // Calculate the smallest constant Kn for the specified residual.
2576 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2578 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
2584 // Determine the most significant bit in the residual and
2585 // align the resulting value to a 2-bit boundary.
2586 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
2588 // The desired shift is now (msb - 6), or zero, whichever
2590 return (((msb - 6) < 0) ? 0 : (msb - 6));
2593 // Calculate the final residual for the specified group index.
2594 // If the passed group index is less than zero, the method will return
2595 // the value of the specified residual without any change.
2596 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2597 static typename elfcpp::Swap<32, big_endian>::Valtype
2598 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2601 for (int n = 0; n <= group; n++)
2603 // Calculate which part of the value to mask.
2604 uint32_t shift = calc_grp_kn(residual);
2605 // Calculate the residual for the next time around.
2606 residual &= ~(residual & (0xff << shift));
2612 // Calculate the value of Gn for the specified group index.
2613 // We return it in the form of an encoded constant-and-rotation.
2614 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2615 static typename elfcpp::Swap<32, big_endian>::Valtype
2616 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2619 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
2622 for (int n = 0; n <= group; n++)
2624 // Calculate which part of the value to mask.
2625 shift = calc_grp_kn(residual);
2626 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
2627 gn = residual & (0xff << shift);
2628 // Calculate the residual for the next time around.
2631 // Return Gn in the form of an encoded constant-and-rotation.
2632 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
2636 // Handle ARM long branches.
2637 static typename This::Status
2638 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2639 unsigned char *, const Sized_symbol<32>*,
2640 const Arm_relobj<big_endian>*, unsigned int,
2641 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2643 // Handle THUMB long branches.
2644 static typename This::Status
2645 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2646 unsigned char *, const Sized_symbol<32>*,
2647 const Arm_relobj<big_endian>*, unsigned int,
2648 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2651 // Return the branch offset of a 32-bit THUMB branch.
2652 static inline int32_t
2653 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2655 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
2656 // involving the J1 and J2 bits.
2657 uint32_t s = (upper_insn & (1U << 10)) >> 10;
2658 uint32_t upper = upper_insn & 0x3ffU;
2659 uint32_t lower = lower_insn & 0x7ffU;
2660 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
2661 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
2662 uint32_t i1 = j1 ^ s ? 0 : 1;
2663 uint32_t i2 = j2 ^ s ? 0 : 1;
2665 return utils::sign_extend<25>((s << 24) | (i1 << 23) | (i2 << 22)
2666 | (upper << 12) | (lower << 1));
2669 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
2670 // UPPER_INSN is the original upper instruction of the branch. Caller is
2671 // responsible for overflow checking and BLX offset adjustment.
2672 static inline uint16_t
2673 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
2675 uint32_t s = offset < 0 ? 1 : 0;
2676 uint32_t bits = static_cast<uint32_t>(offset);
2677 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
2680 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
2681 // LOWER_INSN is the original lower instruction of the branch. Caller is
2682 // responsible for overflow checking and BLX offset adjustment.
2683 static inline uint16_t
2684 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
2686 uint32_t s = offset < 0 ? 1 : 0;
2687 uint32_t bits = static_cast<uint32_t>(offset);
2688 return ((lower_insn & ~0x2fffU)
2689 | ((((bits >> 23) & 1) ^ !s) << 13)
2690 | ((((bits >> 22) & 1) ^ !s) << 11)
2691 | ((bits >> 1) & 0x7ffU));
2694 // Return the branch offset of a 32-bit THUMB conditional branch.
2695 static inline int32_t
2696 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2698 uint32_t s = (upper_insn & 0x0400U) >> 10;
2699 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
2700 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
2701 uint32_t lower = (lower_insn & 0x07ffU);
2702 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
2704 return utils::sign_extend<21>((upper << 12) | (lower << 1));
2707 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
2708 // instruction. UPPER_INSN is the original upper instruction of the branch.
2709 // Caller is responsible for overflow checking.
2710 static inline uint16_t
2711 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
2713 uint32_t s = offset < 0 ? 1 : 0;
2714 uint32_t bits = static_cast<uint32_t>(offset);
2715 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
2718 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
2719 // instruction. LOWER_INSN is the original lower instruction of the branch.
2720 // Caller is reponsible for overflow checking.
2721 static inline uint16_t
2722 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
2724 uint32_t bits = static_cast<uint32_t>(offset);
2725 uint32_t j2 = (bits & 0x00080000U) >> 19;
2726 uint32_t j1 = (bits & 0x00040000U) >> 18;
2727 uint32_t lo = (bits & 0x00000ffeU) >> 1;
2729 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
2732 // R_ARM_ABS8: S + A
2733 static inline typename This::Status
2734 abs8(unsigned char *view,
2735 const Sized_relobj<32, big_endian>* object,
2736 const Symbol_value<32>* psymval)
2738 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
2739 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2740 Valtype* wv = reinterpret_cast<Valtype*>(view);
2741 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
2742 Reltype addend = utils::sign_extend<8>(val);
2743 Reltype x = psymval->value(object, addend);
2744 val = utils::bit_select(val, x, 0xffU);
2745 elfcpp::Swap<8, big_endian>::writeval(wv, val);
2746 return (utils::has_signed_unsigned_overflow<8>(x)
2747 ? This::STATUS_OVERFLOW
2748 : This::STATUS_OKAY);
2751 // R_ARM_THM_ABS5: S + A
2752 static inline typename This::Status
2753 thm_abs5(unsigned char *view,
2754 const Sized_relobj<32, big_endian>* object,
2755 const Symbol_value<32>* psymval)
2757 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2758 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2759 Valtype* wv = reinterpret_cast<Valtype*>(view);
2760 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2761 Reltype addend = (val & 0x7e0U) >> 6;
2762 Reltype x = psymval->value(object, addend);
2763 val = utils::bit_select(val, x << 6, 0x7e0U);
2764 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2765 return (utils::has_overflow<5>(x)
2766 ? This::STATUS_OVERFLOW
2767 : This::STATUS_OKAY);
2770 // R_ARM_ABS12: S + A
2771 static inline typename This::Status
2772 abs12(unsigned char *view,
2773 const Sized_relobj<32, big_endian>* object,
2774 const Symbol_value<32>* psymval)
2776 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2777 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2778 Valtype* wv = reinterpret_cast<Valtype*>(view);
2779 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2780 Reltype addend = val & 0x0fffU;
2781 Reltype x = psymval->value(object, addend);
2782 val = utils::bit_select(val, x, 0x0fffU);
2783 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2784 return (utils::has_overflow<12>(x)
2785 ? This::STATUS_OVERFLOW
2786 : This::STATUS_OKAY);
2789 // R_ARM_ABS16: S + A
2790 static inline typename This::Status
2791 abs16(unsigned char *view,
2792 const Sized_relobj<32, big_endian>* object,
2793 const Symbol_value<32>* psymval)
2795 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2796 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2797 Valtype* wv = reinterpret_cast<Valtype*>(view);
2798 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2799 Reltype addend = utils::sign_extend<16>(val);
2800 Reltype x = psymval->value(object, addend);
2801 val = utils::bit_select(val, x, 0xffffU);
2802 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2803 return (utils::has_signed_unsigned_overflow<16>(x)
2804 ? This::STATUS_OVERFLOW
2805 : This::STATUS_OKAY);
2808 // R_ARM_ABS32: (S + A) | T
2809 static inline typename This::Status
2810 abs32(unsigned char *view,
2811 const Sized_relobj<32, big_endian>* object,
2812 const Symbol_value<32>* psymval,
2813 Arm_address thumb_bit)
2815 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2816 Valtype* wv = reinterpret_cast<Valtype*>(view);
2817 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2818 Valtype x = psymval->value(object, addend) | thumb_bit;
2819 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2820 return This::STATUS_OKAY;
2823 // R_ARM_REL32: (S + A) | T - P
2824 static inline typename This::Status
2825 rel32(unsigned char *view,
2826 const Sized_relobj<32, big_endian>* object,
2827 const Symbol_value<32>* psymval,
2828 Arm_address address,
2829 Arm_address thumb_bit)
2831 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2832 Valtype* wv = reinterpret_cast<Valtype*>(view);
2833 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2834 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2835 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2836 return This::STATUS_OKAY;
2839 // R_ARM_THM_JUMP24: (S + A) | T - P
2840 static typename This::Status
2841 thm_jump19(unsigned char *view, const Arm_relobj<big_endian>* object,
2842 const Symbol_value<32>* psymval, Arm_address address,
2843 Arm_address thumb_bit);
2845 // R_ARM_THM_JUMP6: S + A – P
2846 static inline typename This::Status
2847 thm_jump6(unsigned char *view,
2848 const Sized_relobj<32, big_endian>* object,
2849 const Symbol_value<32>* psymval,
2850 Arm_address address)
2852 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2853 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2854 Valtype* wv = reinterpret_cast<Valtype*>(view);
2855 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2856 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
2857 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
2858 Reltype x = (psymval->value(object, addend) - address);
2859 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
2860 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2861 // CZB does only forward jumps.
2862 return ((x > 0x007e)
2863 ? This::STATUS_OVERFLOW
2864 : This::STATUS_OKAY);
2867 // R_ARM_THM_JUMP8: S + A – P
2868 static inline typename This::Status
2869 thm_jump8(unsigned char *view,
2870 const Sized_relobj<32, big_endian>* object,
2871 const Symbol_value<32>* psymval,
2872 Arm_address address)
2874 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2875 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2876 Valtype* wv = reinterpret_cast<Valtype*>(view);
2877 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2878 Reltype addend = utils::sign_extend<8>((val & 0x00ff) << 1);
2879 Reltype x = (psymval->value(object, addend) - address);
2880 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xff00) | ((x & 0x01fe) >> 1));
2881 return (utils::has_overflow<8>(x)
2882 ? This::STATUS_OVERFLOW
2883 : This::STATUS_OKAY);
2886 // R_ARM_THM_JUMP11: S + A – P
2887 static inline typename This::Status
2888 thm_jump11(unsigned char *view,
2889 const Sized_relobj<32, big_endian>* object,
2890 const Symbol_value<32>* psymval,
2891 Arm_address address)
2893 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2894 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2895 Valtype* wv = reinterpret_cast<Valtype*>(view);
2896 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2897 Reltype addend = utils::sign_extend<11>((val & 0x07ff) << 1);
2898 Reltype x = (psymval->value(object, addend) - address);
2899 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xf800) | ((x & 0x0ffe) >> 1));
2900 return (utils::has_overflow<11>(x)
2901 ? This::STATUS_OVERFLOW
2902 : This::STATUS_OKAY);
2905 // R_ARM_BASE_PREL: B(S) + A - P
2906 static inline typename This::Status
2907 base_prel(unsigned char* view,
2909 Arm_address address)
2911 Base::rel32(view, origin - address);
2915 // R_ARM_BASE_ABS: B(S) + A
2916 static inline typename This::Status
2917 base_abs(unsigned char* view,
2920 Base::rel32(view, origin);
2924 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
2925 static inline typename This::Status
2926 got_brel(unsigned char* view,
2927 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
2929 Base::rel32(view, got_offset);
2930 return This::STATUS_OKAY;
2933 // R_ARM_GOT_PREL: GOT(S) + A - P
2934 static inline typename This::Status
2935 got_prel(unsigned char *view,
2936 Arm_address got_entry,
2937 Arm_address address)
2939 Base::rel32(view, got_entry - address);
2940 return This::STATUS_OKAY;
2943 // R_ARM_PREL: (S + A) | T - P
2944 static inline typename This::Status
2945 prel31(unsigned char *view,
2946 const Sized_relobj<32, big_endian>* object,
2947 const Symbol_value<32>* psymval,
2948 Arm_address address,
2949 Arm_address thumb_bit)
2951 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2952 Valtype* wv = reinterpret_cast<Valtype*>(view);
2953 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2954 Valtype addend = utils::sign_extend<31>(val);
2955 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2956 val = utils::bit_select(val, x, 0x7fffffffU);
2957 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2958 return (utils::has_overflow<31>(x) ?
2959 This::STATUS_OVERFLOW : This::STATUS_OKAY);
2962 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
2963 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
2964 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
2965 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
2966 static inline typename This::Status
2967 movw(unsigned char* view,
2968 const Sized_relobj<32, big_endian>* object,
2969 const Symbol_value<32>* psymval,
2970 Arm_address relative_address_base,
2971 Arm_address thumb_bit,
2972 bool check_overflow)
2974 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2975 Valtype* wv = reinterpret_cast<Valtype*>(view);
2976 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2977 Valtype addend = This::extract_arm_movw_movt_addend(val);
2978 Valtype x = ((psymval->value(object, addend) | thumb_bit)
2979 - relative_address_base);
2980 val = This::insert_val_arm_movw_movt(val, x);
2981 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2982 return ((check_overflow && utils::has_overflow<16>(x))
2983 ? This::STATUS_OVERFLOW
2984 : This::STATUS_OKAY);
2987 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
2988 // R_ARM_MOVT_PREL: S + A - P
2989 // R_ARM_MOVT_BREL: S + A - B(S)
2990 static inline typename This::Status
2991 movt(unsigned char* view,
2992 const Sized_relobj<32, big_endian>* object,
2993 const Symbol_value<32>* psymval,
2994 Arm_address relative_address_base)
2996 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2997 Valtype* wv = reinterpret_cast<Valtype*>(view);
2998 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2999 Valtype addend = This::extract_arm_movw_movt_addend(val);
3000 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3001 val = This::insert_val_arm_movw_movt(val, x);
3002 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3003 // FIXME: IHI0044D says that we should check for overflow.
3004 return This::STATUS_OKAY;
3007 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3008 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3009 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3010 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3011 static inline typename This::Status
3012 thm_movw(unsigned char *view,
3013 const Sized_relobj<32, big_endian>* object,
3014 const Symbol_value<32>* psymval,
3015 Arm_address relative_address_base,
3016 Arm_address thumb_bit,
3017 bool check_overflow)
3019 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3020 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3021 Valtype* wv = reinterpret_cast<Valtype*>(view);
3022 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3023 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3024 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3026 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3027 val = This::insert_val_thumb_movw_movt(val, x);
3028 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3029 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3030 return ((check_overflow && utils::has_overflow<16>(x))
3031 ? This::STATUS_OVERFLOW
3032 : This::STATUS_OKAY);
3035 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3036 // R_ARM_THM_MOVT_PREL: S + A - P
3037 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3038 static inline typename This::Status
3039 thm_movt(unsigned char* view,
3040 const Sized_relobj<32, big_endian>* object,
3041 const Symbol_value<32>* psymval,
3042 Arm_address relative_address_base)
3044 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3045 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3046 Valtype* wv = reinterpret_cast<Valtype*>(view);
3047 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3048 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3049 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3050 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3051 val = This::insert_val_thumb_movw_movt(val, x);
3052 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3053 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3054 return This::STATUS_OKAY;
3057 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3058 static inline typename This::Status
3059 thm_alu11(unsigned char* view,
3060 const Sized_relobj<32, big_endian>* object,
3061 const Symbol_value<32>* psymval,
3062 Arm_address address,
3063 Arm_address thumb_bit)
3065 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3066 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3067 Valtype* wv = reinterpret_cast<Valtype*>(view);
3068 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3069 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3071 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3072 // -----------------------------------------------------------------------
3073 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3074 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3075 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3076 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3077 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3078 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3080 // Determine a sign for the addend.
3081 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3082 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3083 // Thumb2 addend encoding:
3084 // imm12 := i | imm3 | imm8
3085 int32_t addend = (insn & 0xff)
3086 | ((insn & 0x00007000) >> 4)
3087 | ((insn & 0x04000000) >> 15);
3088 // Apply a sign to the added.
3091 int32_t x = (psymval->value(object, addend) | thumb_bit)
3092 - (address & 0xfffffffc);
3093 Reltype val = abs(x);
3094 // Mask out the value and a distinct part of the ADD/SUB opcode
3095 // (bits 7:5 of opword).
3096 insn = (insn & 0xfb0f8f00)
3098 | ((val & 0x700) << 4)
3099 | ((val & 0x800) << 15);
3100 // Set the opcode according to whether the value to go in the
3101 // place is negative.
3105 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3106 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3107 return ((val > 0xfff) ?
3108 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3111 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3112 static inline typename This::Status
3113 thm_pc8(unsigned char* view,
3114 const Sized_relobj<32, big_endian>* object,
3115 const Symbol_value<32>* psymval,
3116 Arm_address address)
3118 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3119 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3120 Valtype* wv = reinterpret_cast<Valtype*>(view);
3121 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3122 Reltype addend = ((insn & 0x00ff) << 2);
3123 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3124 Reltype val = abs(x);
3125 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3127 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3128 return ((val > 0x03fc)
3129 ? This::STATUS_OVERFLOW
3130 : This::STATUS_OKAY);
3133 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3134 static inline typename This::Status
3135 thm_pc12(unsigned char* view,
3136 const Sized_relobj<32, big_endian>* object,
3137 const Symbol_value<32>* psymval,
3138 Arm_address address)
3140 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3141 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3142 Valtype* wv = reinterpret_cast<Valtype*>(view);
3143 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3144 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3145 // Determine a sign for the addend (positive if the U bit is 1).
3146 const int sign = (insn & 0x00800000) ? 1 : -1;
3147 int32_t addend = (insn & 0xfff);
3148 // Apply a sign to the added.
3151 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3152 Reltype val = abs(x);
3153 // Mask out and apply the value and the U bit.
3154 insn = (insn & 0xff7ff000) | (val & 0xfff);
3155 // Set the U bit according to whether the value to go in the
3156 // place is positive.
3160 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3161 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3162 return ((val > 0xfff) ?
3163 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3167 static inline typename This::Status
3168 v4bx(const Relocate_info<32, big_endian>* relinfo,
3169 unsigned char *view,
3170 const Arm_relobj<big_endian>* object,
3171 const Arm_address address,
3172 const bool is_interworking)
3175 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3176 Valtype* wv = reinterpret_cast<Valtype*>(view);
3177 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3179 // Ensure that we have a BX instruction.
3180 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3181 const uint32_t reg = (val & 0xf);
3182 if (is_interworking && reg != 0xf)
3184 Stub_table<big_endian>* stub_table =
3185 object->stub_table(relinfo->data_shndx);
3186 gold_assert(stub_table != NULL);
3188 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3189 gold_assert(stub != NULL);
3191 int32_t veneer_address =
3192 stub_table->address() + stub->offset() - 8 - address;
3193 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3194 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3195 // Replace with a branch to veneer (B <addr>)
3196 val = (val & 0xf0000000) | 0x0a000000
3197 | ((veneer_address >> 2) & 0x00ffffff);
3201 // Preserve Rm (lowest four bits) and the condition code
3202 // (highest four bits). Other bits encode MOV PC,Rm.
3203 val = (val & 0xf000000f) | 0x01a0f000;
3205 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3206 return This::STATUS_OKAY;
3209 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3210 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3211 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3212 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3213 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3214 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3215 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3216 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3217 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3218 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3219 static inline typename This::Status
3220 arm_grp_alu(unsigned char* view,
3221 const Sized_relobj<32, big_endian>* object,
3222 const Symbol_value<32>* psymval,
3224 Arm_address address,
3225 Arm_address thumb_bit,
3226 bool check_overflow)
3228 gold_assert(group >= 0 && group < 3);
3229 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3230 Valtype* wv = reinterpret_cast<Valtype*>(view);
3231 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3233 // ALU group relocations are allowed only for the ADD/SUB instructions.
3234 // (0x00800000 - ADD, 0x00400000 - SUB)
3235 const Valtype opcode = insn & 0x01e00000;
3236 if (opcode != 0x00800000 && opcode != 0x00400000)
3237 return This::STATUS_BAD_RELOC;
3239 // Determine a sign for the addend.
3240 const int sign = (opcode == 0x00800000) ? 1 : -1;
3241 // shifter = rotate_imm * 2
3242 const uint32_t shifter = (insn & 0xf00) >> 7;
3243 // Initial addend value.
3244 int32_t addend = insn & 0xff;
3245 // Rotate addend right by shifter.
3246 addend = (addend >> shifter) | (addend << (32 - shifter));
3247 // Apply a sign to the added.
3250 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3251 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3252 // Check for overflow if required
3254 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3255 return This::STATUS_OVERFLOW;
3257 // Mask out the value and the ADD/SUB part of the opcode; take care
3258 // not to destroy the S bit.
3260 // Set the opcode according to whether the value to go in the
3261 // place is negative.
3262 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3263 // Encode the offset (encoded Gn).
3266 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3267 return This::STATUS_OKAY;
3270 // R_ARM_LDR_PC_G0: S + A - P
3271 // R_ARM_LDR_PC_G1: S + A - P
3272 // R_ARM_LDR_PC_G2: S + A - P
3273 // R_ARM_LDR_SB_G0: S + A - B(S)
3274 // R_ARM_LDR_SB_G1: S + A - B(S)
3275 // R_ARM_LDR_SB_G2: S + A - B(S)
3276 static inline typename This::Status
3277 arm_grp_ldr(unsigned char* view,
3278 const Sized_relobj<32, big_endian>* object,
3279 const Symbol_value<32>* psymval,
3281 Arm_address address)
3283 gold_assert(group >= 0 && group < 3);
3284 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3285 Valtype* wv = reinterpret_cast<Valtype*>(view);
3286 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3288 const int sign = (insn & 0x00800000) ? 1 : -1;
3289 int32_t addend = (insn & 0xfff) * sign;
3290 int32_t x = (psymval->value(object, addend) - address);
3291 // Calculate the relevant G(n-1) value to obtain this stage residual.
3293 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3294 if (residual >= 0x1000)
3295 return This::STATUS_OVERFLOW;
3297 // Mask out the value and U bit.
3299 // Set the U bit for non-negative values.
3304 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3305 return This::STATUS_OKAY;
3308 // R_ARM_LDRS_PC_G0: S + A - P
3309 // R_ARM_LDRS_PC_G1: S + A - P
3310 // R_ARM_LDRS_PC_G2: S + A - P
3311 // R_ARM_LDRS_SB_G0: S + A - B(S)
3312 // R_ARM_LDRS_SB_G1: S + A - B(S)
3313 // R_ARM_LDRS_SB_G2: S + A - B(S)
3314 static inline typename This::Status
3315 arm_grp_ldrs(unsigned char* view,
3316 const Sized_relobj<32, big_endian>* object,
3317 const Symbol_value<32>* psymval,
3319 Arm_address address)
3321 gold_assert(group >= 0 && group < 3);
3322 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3323 Valtype* wv = reinterpret_cast<Valtype*>(view);
3324 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3326 const int sign = (insn & 0x00800000) ? 1 : -1;
3327 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3328 int32_t x = (psymval->value(object, addend) - address);
3329 // Calculate the relevant G(n-1) value to obtain this stage residual.
3331 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3332 if (residual >= 0x100)
3333 return This::STATUS_OVERFLOW;
3335 // Mask out the value and U bit.
3337 // Set the U bit for non-negative values.
3340 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3342 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3343 return This::STATUS_OKAY;
3346 // R_ARM_LDC_PC_G0: S + A - P
3347 // R_ARM_LDC_PC_G1: S + A - P
3348 // R_ARM_LDC_PC_G2: S + A - P
3349 // R_ARM_LDC_SB_G0: S + A - B(S)
3350 // R_ARM_LDC_SB_G1: S + A - B(S)
3351 // R_ARM_LDC_SB_G2: S + A - B(S)
3352 static inline typename This::Status
3353 arm_grp_ldc(unsigned char* view,
3354 const Sized_relobj<32, big_endian>* object,
3355 const Symbol_value<32>* psymval,
3357 Arm_address address)
3359 gold_assert(group >= 0 && group < 3);
3360 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3361 Valtype* wv = reinterpret_cast<Valtype*>(view);
3362 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3364 const int sign = (insn & 0x00800000) ? 1 : -1;
3365 int32_t addend = ((insn & 0xff) << 2) * sign;
3366 int32_t x = (psymval->value(object, addend) - address);
3367 // Calculate the relevant G(n-1) value to obtain this stage residual.
3369 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3370 if ((residual & 0x3) != 0 || residual >= 0x400)
3371 return This::STATUS_OVERFLOW;
3373 // Mask out the value and U bit.
3375 // Set the U bit for non-negative values.
3378 insn |= (residual >> 2);
3380 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3381 return This::STATUS_OKAY;
3385 // Relocate ARM long branches. This handles relocation types
3386 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3387 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3388 // undefined and we do not use PLT in this relocation. In such a case,
3389 // the branch is converted into an NOP.
3391 template<bool big_endian>
3392 typename Arm_relocate_functions<big_endian>::Status
3393 Arm_relocate_functions<big_endian>::arm_branch_common(
3394 unsigned int r_type,
3395 const Relocate_info<32, big_endian>* relinfo,
3396 unsigned char *view,
3397 const Sized_symbol<32>* gsym,
3398 const Arm_relobj<big_endian>* object,
3400 const Symbol_value<32>* psymval,
3401 Arm_address address,
3402 Arm_address thumb_bit,
3403 bool is_weakly_undefined_without_plt)
3405 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3406 Valtype* wv = reinterpret_cast<Valtype*>(view);
3407 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3409 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3410 && ((val & 0x0f000000UL) == 0x0a000000UL);
3411 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3412 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3413 && ((val & 0x0f000000UL) == 0x0b000000UL);
3414 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3415 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3417 // Check that the instruction is valid.
3418 if (r_type == elfcpp::R_ARM_CALL)
3420 if (!insn_is_uncond_bl && !insn_is_blx)
3421 return This::STATUS_BAD_RELOC;
3423 else if (r_type == elfcpp::R_ARM_JUMP24)
3425 if (!insn_is_b && !insn_is_cond_bl)
3426 return This::STATUS_BAD_RELOC;
3428 else if (r_type == elfcpp::R_ARM_PLT32)
3430 if (!insn_is_any_branch)
3431 return This::STATUS_BAD_RELOC;
3433 else if (r_type == elfcpp::R_ARM_XPC25)
3435 // FIXME: AAELF document IH0044C does not say much about it other
3436 // than it being obsolete.
3437 if (!insn_is_any_branch)
3438 return This::STATUS_BAD_RELOC;
3443 // A branch to an undefined weak symbol is turned into a jump to
3444 // the next instruction unless a PLT entry will be created.
3445 // Do the same for local undefined symbols.
3446 // The jump to the next instruction is optimized as a NOP depending
3447 // on the architecture.
3448 const Target_arm<big_endian>* arm_target =
3449 Target_arm<big_endian>::default_target();
3450 if (is_weakly_undefined_without_plt)
3452 Valtype cond = val & 0xf0000000U;
3453 if (arm_target->may_use_arm_nop())
3454 val = cond | 0x0320f000;
3456 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3457 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3458 return This::STATUS_OKAY;
3461 Valtype addend = utils::sign_extend<26>(val << 2);
3462 Valtype branch_target = psymval->value(object, addend);
3463 int32_t branch_offset = branch_target - address;
3465 // We need a stub if the branch offset is too large or if we need
3467 bool may_use_blx = arm_target->may_use_blx();
3468 Reloc_stub* stub = NULL;
3469 if ((branch_offset > ARM_MAX_FWD_BRANCH_OFFSET)
3470 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3471 || ((thumb_bit != 0) && !(may_use_blx && r_type == elfcpp::R_ARM_CALL)))
3473 Stub_type stub_type =
3474 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3476 if (stub_type != arm_stub_none)
3478 Stub_table<big_endian>* stub_table =
3479 object->stub_table(relinfo->data_shndx);
3480 gold_assert(stub_table != NULL);
3482 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3483 stub = stub_table->find_reloc_stub(stub_key);
3484 gold_assert(stub != NULL);
3485 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3486 branch_target = stub_table->address() + stub->offset() + addend;
3487 branch_offset = branch_target - address;
3488 gold_assert((branch_offset <= ARM_MAX_FWD_BRANCH_OFFSET)
3489 && (branch_offset >= ARM_MAX_BWD_BRANCH_OFFSET));
3493 // At this point, if we still need to switch mode, the instruction
3494 // must either be a BLX or a BL that can be converted to a BLX.
3498 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
3499 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
3502 val = utils::bit_select(val, (branch_offset >> 2), 0xffffffUL);
3503 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3504 return (utils::has_overflow<26>(branch_offset)
3505 ? This::STATUS_OVERFLOW : This::STATUS_OKAY);
3508 // Relocate THUMB long branches. This handles relocation types
3509 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3510 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3511 // undefined and we do not use PLT in this relocation. In such a case,
3512 // the branch is converted into an NOP.
3514 template<bool big_endian>
3515 typename Arm_relocate_functions<big_endian>::Status
3516 Arm_relocate_functions<big_endian>::thumb_branch_common(
3517 unsigned int r_type,
3518 const Relocate_info<32, big_endian>* relinfo,
3519 unsigned char *view,
3520 const Sized_symbol<32>* gsym,
3521 const Arm_relobj<big_endian>* object,
3523 const Symbol_value<32>* psymval,
3524 Arm_address address,
3525 Arm_address thumb_bit,
3526 bool is_weakly_undefined_without_plt)
3528 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3529 Valtype* wv = reinterpret_cast<Valtype*>(view);
3530 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3531 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3533 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3535 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
3536 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
3538 // Check that the instruction is valid.
3539 if (r_type == elfcpp::R_ARM_THM_CALL)
3541 if (!is_bl_insn && !is_blx_insn)
3542 return This::STATUS_BAD_RELOC;
3544 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
3546 // This cannot be a BLX.
3548 return This::STATUS_BAD_RELOC;
3550 else if (r_type == elfcpp::R_ARM_THM_XPC22)
3552 // Check for Thumb to Thumb call.
3554 return This::STATUS_BAD_RELOC;
3557 gold_warning(_("%s: Thumb BLX instruction targets "
3558 "thumb function '%s'."),
3559 object->name().c_str(),
3560 (gsym ? gsym->name() : "(local)"));
3561 // Convert BLX to BL.
3562 lower_insn |= 0x1000U;
3568 // A branch to an undefined weak symbol is turned into a jump to
3569 // the next instruction unless a PLT entry will be created.
3570 // The jump to the next instruction is optimized as a NOP.W for
3571 // Thumb-2 enabled architectures.
3572 const Target_arm<big_endian>* arm_target =
3573 Target_arm<big_endian>::default_target();
3574 if (is_weakly_undefined_without_plt)
3576 if (arm_target->may_use_thumb2_nop())
3578 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
3579 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
3583 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
3584 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
3586 return This::STATUS_OKAY;
3589 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
3590 Arm_address branch_target = psymval->value(object, addend);
3591 int32_t branch_offset = branch_target - address;
3593 // We need a stub if the branch offset is too large or if we need
3595 bool may_use_blx = arm_target->may_use_blx();
3596 bool thumb2 = arm_target->using_thumb2();
3598 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3599 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3601 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3602 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3603 || ((thumb_bit == 0)
3604 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
3605 || r_type == elfcpp::R_ARM_THM_JUMP24)))
3607 Stub_type stub_type =
3608 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3610 if (stub_type != arm_stub_none)
3612 Stub_table<big_endian>* stub_table =
3613 object->stub_table(relinfo->data_shndx);
3614 gold_assert(stub_table != NULL);
3616 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3617 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
3618 gold_assert(stub != NULL);
3619 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3620 branch_target = stub_table->address() + stub->offset() + addend;
3621 branch_offset = branch_target - address;
3625 // At this point, if we still need to switch mode, the instruction
3626 // must either be a BLX or a BL that can be converted to a BLX.
3629 gold_assert(may_use_blx
3630 && (r_type == elfcpp::R_ARM_THM_CALL
3631 || r_type == elfcpp::R_ARM_THM_XPC22));
3632 // Make sure this is a BLX.
3633 lower_insn &= ~0x1000U;
3637 // Make sure this is a BL.
3638 lower_insn |= 0x1000U;
3641 if ((lower_insn & 0x5000U) == 0x4000U)
3642 // For a BLX instruction, make sure that the relocation is rounded up
3643 // to a word boundary. This follows the semantics of the instruction
3644 // which specifies that bit 1 of the target address will come from bit
3645 // 1 of the base address.
3646 branch_offset = (branch_offset + 2) & ~3;
3648 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
3649 // We use the Thumb-2 encoding, which is safe even if dealing with
3650 // a Thumb-1 instruction by virtue of our overflow check above. */
3651 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
3652 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
3654 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3655 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3658 ? utils::has_overflow<25>(branch_offset)
3659 : utils::has_overflow<23>(branch_offset))
3660 ? This::STATUS_OVERFLOW
3661 : This::STATUS_OKAY);
3664 // Relocate THUMB-2 long conditional branches.
3665 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3666 // undefined and we do not use PLT in this relocation. In such a case,
3667 // the branch is converted into an NOP.
3669 template<bool big_endian>
3670 typename Arm_relocate_functions<big_endian>::Status
3671 Arm_relocate_functions<big_endian>::thm_jump19(
3672 unsigned char *view,
3673 const Arm_relobj<big_endian>* object,
3674 const Symbol_value<32>* psymval,
3675 Arm_address address,
3676 Arm_address thumb_bit)
3678 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3679 Valtype* wv = reinterpret_cast<Valtype*>(view);
3680 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3681 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3682 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
3684 Arm_address branch_target = psymval->value(object, addend);
3685 int32_t branch_offset = branch_target - address;
3687 // ??? Should handle interworking? GCC might someday try to
3688 // use this for tail calls.
3689 // FIXME: We do support thumb entry to PLT yet.
3692 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
3693 return This::STATUS_BAD_RELOC;
3696 // Put RELOCATION back into the insn.
3697 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
3698 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
3700 // Put the relocated value back in the object file:
3701 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3702 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3704 return (utils::has_overflow<21>(branch_offset)
3705 ? This::STATUS_OVERFLOW
3706 : This::STATUS_OKAY);
3709 // Get the GOT section, creating it if necessary.
3711 template<bool big_endian>
3712 Output_data_got<32, big_endian>*
3713 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
3715 if (this->got_ == NULL)
3717 gold_assert(symtab != NULL && layout != NULL);
3719 this->got_ = new Output_data_got<32, big_endian>();
3722 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3724 | elfcpp::SHF_WRITE),
3725 this->got_, false, true, true,
3728 // The old GNU linker creates a .got.plt section. We just
3729 // create another set of data in the .got section. Note that we
3730 // always create a PLT if we create a GOT, although the PLT
3732 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
3733 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3735 | elfcpp::SHF_WRITE),
3736 this->got_plt_, false, false,
3739 // The first three entries are reserved.
3740 this->got_plt_->set_current_data_size(3 * 4);
3742 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
3743 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
3744 Symbol_table::PREDEFINED,
3746 0, 0, elfcpp::STT_OBJECT,
3748 elfcpp::STV_HIDDEN, 0,
3754 // Get the dynamic reloc section, creating it if necessary.
3756 template<bool big_endian>
3757 typename Target_arm<big_endian>::Reloc_section*
3758 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
3760 if (this->rel_dyn_ == NULL)
3762 gold_assert(layout != NULL);
3763 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
3764 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
3765 elfcpp::SHF_ALLOC, this->rel_dyn_, true,
3766 false, false, false);
3768 return this->rel_dyn_;
3771 // Insn_template methods.
3773 // Return byte size of an instruction template.
3776 Insn_template::size() const
3778 switch (this->type())
3781 case THUMB16_SPECIAL_TYPE:
3792 // Return alignment of an instruction template.
3795 Insn_template::alignment() const
3797 switch (this->type())
3800 case THUMB16_SPECIAL_TYPE:
3811 // Stub_template methods.
3813 Stub_template::Stub_template(
3814 Stub_type type, const Insn_template* insns,
3816 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
3817 entry_in_thumb_mode_(false), relocs_()
3821 // Compute byte size and alignment of stub template.
3822 for (size_t i = 0; i < insn_count; i++)
3824 unsigned insn_alignment = insns[i].alignment();
3825 size_t insn_size = insns[i].size();
3826 gold_assert((offset & (insn_alignment - 1)) == 0);
3827 this->alignment_ = std::max(this->alignment_, insn_alignment);
3828 switch (insns[i].type())
3830 case Insn_template::THUMB16_TYPE:
3831 case Insn_template::THUMB16_SPECIAL_TYPE:
3833 this->entry_in_thumb_mode_ = true;
3836 case Insn_template::THUMB32_TYPE:
3837 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
3838 this->relocs_.push_back(Reloc(i, offset));
3840 this->entry_in_thumb_mode_ = true;
3843 case Insn_template::ARM_TYPE:
3844 // Handle cases where the target is encoded within the
3846 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
3847 this->relocs_.push_back(Reloc(i, offset));
3850 case Insn_template::DATA_TYPE:
3851 // Entry point cannot be data.
3852 gold_assert(i != 0);
3853 this->relocs_.push_back(Reloc(i, offset));
3859 offset += insn_size;
3861 this->size_ = offset;
3866 // Template to implement do_write for a specific target endianity.
3868 template<bool big_endian>
3870 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
3872 const Stub_template* stub_template = this->stub_template();
3873 const Insn_template* insns = stub_template->insns();
3875 // FIXME: We do not handle BE8 encoding yet.
3876 unsigned char* pov = view;
3877 for (size_t i = 0; i < stub_template->insn_count(); i++)
3879 switch (insns[i].type())
3881 case Insn_template::THUMB16_TYPE:
3882 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
3884 case Insn_template::THUMB16_SPECIAL_TYPE:
3885 elfcpp::Swap<16, big_endian>::writeval(
3887 this->thumb16_special(i));
3889 case Insn_template::THUMB32_TYPE:
3891 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
3892 uint32_t lo = insns[i].data() & 0xffff;
3893 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
3894 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
3897 case Insn_template::ARM_TYPE:
3898 case Insn_template::DATA_TYPE:
3899 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
3904 pov += insns[i].size();
3906 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
3909 // Reloc_stub::Key methods.
3911 // Dump a Key as a string for debugging.
3914 Reloc_stub::Key::name() const
3916 if (this->r_sym_ == invalid_index)
3918 // Global symbol key name
3919 // <stub-type>:<symbol name>:<addend>.
3920 const std::string sym_name = this->u_.symbol->name();
3921 // We need to print two hex number and two colons. So just add 100 bytes
3922 // to the symbol name size.
3923 size_t len = sym_name.size() + 100;
3924 char* buffer = new char[len];
3925 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
3926 sym_name.c_str(), this->addend_);
3927 gold_assert(c > 0 && c < static_cast<int>(len));
3929 return std::string(buffer);
3933 // local symbol key name
3934 // <stub-type>:<object>:<r_sym>:<addend>.
3935 const size_t len = 200;
3937 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
3938 this->u_.relobj, this->r_sym_, this->addend_);
3939 gold_assert(c > 0 && c < static_cast<int>(len));
3940 return std::string(buffer);
3944 // Reloc_stub methods.
3946 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
3947 // LOCATION to DESTINATION.
3948 // This code is based on the arm_type_of_stub function in
3949 // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub
3953 Reloc_stub::stub_type_for_reloc(
3954 unsigned int r_type,
3955 Arm_address location,
3956 Arm_address destination,
3957 bool target_is_thumb)
3959 Stub_type stub_type = arm_stub_none;
3961 // This is a bit ugly but we want to avoid using a templated class for
3962 // big and little endianities.
3964 bool should_force_pic_veneer;
3967 if (parameters->target().is_big_endian())
3969 const Target_arm<true>* big_endian_target =
3970 Target_arm<true>::default_target();
3971 may_use_blx = big_endian_target->may_use_blx();
3972 should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
3973 thumb2 = big_endian_target->using_thumb2();
3974 thumb_only = big_endian_target->using_thumb_only();
3978 const Target_arm<false>* little_endian_target =
3979 Target_arm<false>::default_target();
3980 may_use_blx = little_endian_target->may_use_blx();
3981 should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
3982 thumb2 = little_endian_target->using_thumb2();
3983 thumb_only = little_endian_target->using_thumb_only();
3986 int64_t branch_offset = (int64_t)destination - location;
3988 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
3990 // Handle cases where:
3991 // - this call goes too far (different Thumb/Thumb2 max
3993 // - it's a Thumb->Arm call and blx is not available, or it's a
3994 // Thumb->Arm branch (not bl). A stub is needed in this case.
3996 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3997 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3999 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4000 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4001 || ((!target_is_thumb)
4002 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4003 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4005 if (target_is_thumb)
4010 stub_type = (parameters->options().shared()
4011 || should_force_pic_veneer)
4014 && (r_type == elfcpp::R_ARM_THM_CALL))
4015 // V5T and above. Stub starts with ARM code, so
4016 // we must be able to switch mode before
4017 // reaching it, which is only possible for 'bl'
4018 // (ie R_ARM_THM_CALL relocation).
4019 ? arm_stub_long_branch_any_thumb_pic
4020 // On V4T, use Thumb code only.
4021 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4025 && (r_type == elfcpp::R_ARM_THM_CALL))
4026 ? arm_stub_long_branch_any_any // V5T and above.
4027 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4031 stub_type = (parameters->options().shared()
4032 || should_force_pic_veneer)
4033 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4034 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4041 // FIXME: We should check that the input section is from an
4042 // object that has interwork enabled.
4044 stub_type = (parameters->options().shared()
4045 || should_force_pic_veneer)
4048 && (r_type == elfcpp::R_ARM_THM_CALL))
4049 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4050 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4054 && (r_type == elfcpp::R_ARM_THM_CALL))
4055 ? arm_stub_long_branch_any_any // V5T and above.
4056 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4058 // Handle v4t short branches.
4059 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4060 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4061 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4062 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4066 else if (r_type == elfcpp::R_ARM_CALL
4067 || r_type == elfcpp::R_ARM_JUMP24
4068 || r_type == elfcpp::R_ARM_PLT32)
4070 if (target_is_thumb)
4074 // FIXME: We should check that the input section is from an
4075 // object that has interwork enabled.
4077 // We have an extra 2-bytes reach because of
4078 // the mode change (bit 24 (H) of BLX encoding).
4079 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4080 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4081 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4082 || (r_type == elfcpp::R_ARM_JUMP24)
4083 || (r_type == elfcpp::R_ARM_PLT32))
4085 stub_type = (parameters->options().shared()
4086 || should_force_pic_veneer)
4089 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4090 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4094 ? arm_stub_long_branch_any_any // V5T and above.
4095 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4101 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4102 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4104 stub_type = (parameters->options().shared()
4105 || should_force_pic_veneer)
4106 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4107 : arm_stub_long_branch_any_any; /// non-PIC.
4115 // Cortex_a8_stub methods.
4117 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4118 // I is the position of the instruction template in the stub template.
4121 Cortex_a8_stub::do_thumb16_special(size_t i)
4123 // The only use of this is to copy condition code from a conditional
4124 // branch being worked around to the corresponding conditional branch in
4126 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4128 uint16_t data = this->stub_template()->insns()[i].data();
4129 gold_assert((data & 0xff00U) == 0xd000U);
4130 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4134 // Stub_factory methods.
4136 Stub_factory::Stub_factory()
4138 // The instruction template sequences are declared as static
4139 // objects and initialized first time the constructor runs.
4141 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4142 // to reach the stub if necessary.
4143 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4145 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4146 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4147 // dcd R_ARM_ABS32(X)
4150 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4152 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4154 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4155 Insn_template::arm_insn(0xe12fff1c), // bx ip
4156 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4157 // dcd R_ARM_ABS32(X)
4160 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4161 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4163 Insn_template::thumb16_insn(0xb401), // push {r0}
4164 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4165 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4166 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4167 Insn_template::thumb16_insn(0x4760), // bx ip
4168 Insn_template::thumb16_insn(0xbf00), // nop
4169 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4170 // dcd R_ARM_ABS32(X)
4173 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4175 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4177 Insn_template::thumb16_insn(0x4778), // bx pc
4178 Insn_template::thumb16_insn(0x46c0), // nop
4179 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4180 Insn_template::arm_insn(0xe12fff1c), // bx ip
4181 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4182 // dcd R_ARM_ABS32(X)
4185 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4187 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4189 Insn_template::thumb16_insn(0x4778), // bx pc
4190 Insn_template::thumb16_insn(0x46c0), // nop
4191 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4192 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4193 // dcd R_ARM_ABS32(X)
4196 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4197 // one, when the destination is close enough.
4198 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4200 Insn_template::thumb16_insn(0x4778), // bx pc
4201 Insn_template::thumb16_insn(0x46c0), // nop
4202 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4205 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4206 // blx to reach the stub if necessary.
4207 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4209 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4210 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4211 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4212 // dcd R_ARM_REL32(X-4)
4215 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4216 // blx to reach the stub if necessary. We can not add into pc;
4217 // it is not guaranteed to mode switch (different in ARMv6 and
4219 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4221 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4222 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4223 Insn_template::arm_insn(0xe12fff1c), // bx ip
4224 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4225 // dcd R_ARM_REL32(X)
4228 // V4T ARM -> ARM long branch stub, PIC.
4229 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4231 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4232 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4233 Insn_template::arm_insn(0xe12fff1c), // bx ip
4234 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4235 // dcd R_ARM_REL32(X)
4238 // V4T Thumb -> ARM long branch stub, PIC.
4239 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4241 Insn_template::thumb16_insn(0x4778), // bx pc
4242 Insn_template::thumb16_insn(0x46c0), // nop
4243 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4244 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4245 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4246 // dcd R_ARM_REL32(X)
4249 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4251 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4253 Insn_template::thumb16_insn(0xb401), // push {r0}
4254 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4255 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4256 Insn_template::thumb16_insn(0x4484), // add ip, r0
4257 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4258 Insn_template::thumb16_insn(0x4760), // bx ip
4259 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4260 // dcd R_ARM_REL32(X)
4263 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4265 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4267 Insn_template::thumb16_insn(0x4778), // bx pc
4268 Insn_template::thumb16_insn(0x46c0), // nop
4269 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4270 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4271 Insn_template::arm_insn(0xe12fff1c), // bx ip
4272 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4273 // dcd R_ARM_REL32(X)
4276 // Cortex-A8 erratum-workaround stubs.
4278 // Stub used for conditional branches (which may be beyond +/-1MB away,
4279 // so we can't use a conditional branch to reach this stub).
4286 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4288 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4289 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4290 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4294 // Stub used for b.w and bl.w instructions.
4296 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4298 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4301 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4303 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4306 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4307 // instruction (which switches to ARM mode) to point to this stub. Jump to
4308 // the real destination using an ARM-mode branch.
4309 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4311 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4314 // Stub used to provide an interworking for R_ARM_V4BX relocation
4315 // (bx r[n] instruction).
4316 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4318 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4319 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4320 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4323 // Fill in the stub template look-up table. Stub templates are constructed
4324 // per instance of Stub_factory for fast look-up without locking
4325 // in a thread-enabled environment.
4327 this->stub_templates_[arm_stub_none] =
4328 new Stub_template(arm_stub_none, NULL, 0);
4330 #define DEF_STUB(x) \
4334 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4335 Stub_type type = arm_stub_##x; \
4336 this->stub_templates_[type] = \
4337 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4345 // Stub_table methods.
4347 // Removel all Cortex-A8 stub.
4349 template<bool big_endian>
4351 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4353 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4354 p != this->cortex_a8_stubs_.end();
4357 this->cortex_a8_stubs_.clear();
4360 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4362 template<bool big_endian>
4364 Stub_table<big_endian>::relocate_stub(
4366 const Relocate_info<32, big_endian>* relinfo,
4367 Target_arm<big_endian>* arm_target,
4368 Output_section* output_section,
4369 unsigned char* view,
4370 Arm_address address,
4371 section_size_type view_size)
4373 const Stub_template* stub_template = stub->stub_template();
4374 if (stub_template->reloc_count() != 0)
4376 // Adjust view to cover the stub only.
4377 section_size_type offset = stub->offset();
4378 section_size_type stub_size = stub_template->size();
4379 gold_assert(offset + stub_size <= view_size);
4381 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4382 address + offset, stub_size);
4386 // Relocate all stubs in this stub table.
4388 template<bool big_endian>
4390 Stub_table<big_endian>::relocate_stubs(
4391 const Relocate_info<32, big_endian>* relinfo,
4392 Target_arm<big_endian>* arm_target,
4393 Output_section* output_section,
4394 unsigned char* view,
4395 Arm_address address,
4396 section_size_type view_size)
4398 // If we are passed a view bigger than the stub table's. we need to
4400 gold_assert(address == this->address()
4402 == static_cast<section_size_type>(this->data_size())));
4404 // Relocate all relocation stubs.
4405 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4406 p != this->reloc_stubs_.end();
4408 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4409 address, view_size);
4411 // Relocate all Cortex-A8 stubs.
4412 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4413 p != this->cortex_a8_stubs_.end();
4415 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4416 address, view_size);
4418 // Relocate all ARM V4BX stubs.
4419 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
4420 p != this->arm_v4bx_stubs_.end();
4424 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
4425 address, view_size);
4429 // Write out the stubs to file.
4431 template<bool big_endian>
4433 Stub_table<big_endian>::do_write(Output_file* of)
4435 off_t offset = this->offset();
4436 const section_size_type oview_size =
4437 convert_to_section_size_type(this->data_size());
4438 unsigned char* const oview = of->get_output_view(offset, oview_size);
4440 // Write relocation stubs.
4441 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4442 p != this->reloc_stubs_.end();
4445 Reloc_stub* stub = p->second;
4446 Arm_address address = this->address() + stub->offset();
4448 == align_address(address,
4449 stub->stub_template()->alignment()));
4450 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4454 // Write Cortex-A8 stubs.
4455 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4456 p != this->cortex_a8_stubs_.end();
4459 Cortex_a8_stub* stub = p->second;
4460 Arm_address address = this->address() + stub->offset();
4462 == align_address(address,
4463 stub->stub_template()->alignment()));
4464 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4468 // Write ARM V4BX relocation stubs.
4469 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4470 p != this->arm_v4bx_stubs_.end();
4476 Arm_address address = this->address() + (*p)->offset();
4478 == align_address(address,
4479 (*p)->stub_template()->alignment()));
4480 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
4484 of->write_output_view(this->offset(), oview_size, oview);
4487 // Update the data size and address alignment of the stub table at the end
4488 // of a relaxation pass. Return true if either the data size or the
4489 // alignment changed in this relaxation pass.
4491 template<bool big_endian>
4493 Stub_table<big_endian>::update_data_size_and_addralign()
4496 unsigned addralign = 1;
4498 // Go over all stubs in table to compute data size and address alignment.
4500 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4501 p != this->reloc_stubs_.end();
4504 const Stub_template* stub_template = p->second->stub_template();
4505 addralign = std::max(addralign, stub_template->alignment());
4506 size = (align_address(size, stub_template->alignment())
4507 + stub_template->size());
4510 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4511 p != this->cortex_a8_stubs_.end();
4514 const Stub_template* stub_template = p->second->stub_template();
4515 addralign = std::max(addralign, stub_template->alignment());
4516 size = (align_address(size, stub_template->alignment())
4517 + stub_template->size());
4520 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4521 p != this->arm_v4bx_stubs_.end();
4527 const Stub_template* stub_template = (*p)->stub_template();
4528 addralign = std::max(addralign, stub_template->alignment());
4529 size = (align_address(size, stub_template->alignment())
4530 + stub_template->size());
4533 // Check if either data size or alignment changed in this pass.
4534 // Update prev_data_size_ and prev_addralign_. These will be used
4535 // as the current data size and address alignment for the next pass.
4536 bool changed = size != this->prev_data_size_;
4537 this->prev_data_size_ = size;
4539 if (addralign != this->prev_addralign_)
4541 this->prev_addralign_ = addralign;
4546 // Finalize the stubs. This sets the offsets of the stubs within the stub
4547 // table. It also marks all input sections needing Cortex-A8 workaround.
4549 template<bool big_endian>
4551 Stub_table<big_endian>::finalize_stubs()
4554 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4555 p != this->reloc_stubs_.end();
4558 Reloc_stub* stub = p->second;
4559 const Stub_template* stub_template = stub->stub_template();
4560 uint64_t stub_addralign = stub_template->alignment();
4561 off = align_address(off, stub_addralign);
4562 stub->set_offset(off);
4563 off += stub_template->size();
4566 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4567 p != this->cortex_a8_stubs_.end();
4570 Cortex_a8_stub* stub = p->second;
4571 const Stub_template* stub_template = stub->stub_template();
4572 uint64_t stub_addralign = stub_template->alignment();
4573 off = align_address(off, stub_addralign);
4574 stub->set_offset(off);
4575 off += stub_template->size();
4577 // Mark input section so that we can determine later if a code section
4578 // needs the Cortex-A8 workaround quickly.
4579 Arm_relobj<big_endian>* arm_relobj =
4580 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
4581 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
4584 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4585 p != this->arm_v4bx_stubs_.end();
4591 const Stub_template* stub_template = (*p)->stub_template();
4592 uint64_t stub_addralign = stub_template->alignment();
4593 off = align_address(off, stub_addralign);
4594 (*p)->set_offset(off);
4595 off += stub_template->size();
4598 gold_assert(off <= this->prev_data_size_);
4601 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
4602 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
4603 // of the address range seen by the linker.
4605 template<bool big_endian>
4607 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
4608 Target_arm<big_endian>* arm_target,
4609 unsigned char* view,
4610 Arm_address view_address,
4611 section_size_type view_size)
4613 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
4614 for (Cortex_a8_stub_list::const_iterator p =
4615 this->cortex_a8_stubs_.lower_bound(view_address);
4616 ((p != this->cortex_a8_stubs_.end())
4617 && (p->first < (view_address + view_size)));
4620 // We do not store the THUMB bit in the LSB of either the branch address
4621 // or the stub offset. There is no need to strip the LSB.
4622 Arm_address branch_address = p->first;
4623 const Cortex_a8_stub* stub = p->second;
4624 Arm_address stub_address = this->address() + stub->offset();
4626 // Offset of the branch instruction relative to this view.
4627 section_size_type offset =
4628 convert_to_section_size_type(branch_address - view_address);
4629 gold_assert((offset + 4) <= view_size);
4631 arm_target->apply_cortex_a8_workaround(stub, stub_address,
4632 view + offset, branch_address);
4636 // Arm_input_section methods.
4638 // Initialize an Arm_input_section.
4640 template<bool big_endian>
4642 Arm_input_section<big_endian>::init()
4644 Relobj* relobj = this->relobj();
4645 unsigned int shndx = this->shndx();
4647 // Cache these to speed up size and alignment queries. It is too slow
4648 // to call section_addraglin and section_size every time.
4649 this->original_addralign_ = relobj->section_addralign(shndx);
4650 this->original_size_ = relobj->section_size(shndx);
4652 // We want to make this look like the original input section after
4653 // output sections are finalized.
4654 Output_section* os = relobj->output_section(shndx);
4655 off_t offset = relobj->output_section_offset(shndx);
4656 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
4657 this->set_address(os->address() + offset);
4658 this->set_file_offset(os->offset() + offset);
4660 this->set_current_data_size(this->original_size_);
4661 this->finalize_data_size();
4664 template<bool big_endian>
4666 Arm_input_section<big_endian>::do_write(Output_file* of)
4668 // We have to write out the original section content.
4669 section_size_type section_size;
4670 const unsigned char* section_contents =
4671 this->relobj()->section_contents(this->shndx(), §ion_size, false);
4672 of->write(this->offset(), section_contents, section_size);
4674 // If this owns a stub table and it is not empty, write it.
4675 if (this->is_stub_table_owner() && !this->stub_table_->empty())
4676 this->stub_table_->write(of);
4679 // Finalize data size.
4681 template<bool big_endian>
4683 Arm_input_section<big_endian>::set_final_data_size()
4685 // If this owns a stub table, finalize its data size as well.
4686 if (this->is_stub_table_owner())
4688 uint64_t address = this->address();
4690 // The stub table comes after the original section contents.
4691 address += this->original_size_;
4692 address = align_address(address, this->stub_table_->addralign());
4693 off_t offset = this->offset() + (address - this->address());
4694 this->stub_table_->set_address_and_file_offset(address, offset);
4695 address += this->stub_table_->data_size();
4696 gold_assert(address == this->address() + this->current_data_size());
4699 this->set_data_size(this->current_data_size());
4702 // Reset address and file offset.
4704 template<bool big_endian>
4706 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
4708 // Size of the original input section contents.
4709 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
4711 // If this is a stub table owner, account for the stub table size.
4712 if (this->is_stub_table_owner())
4714 Stub_table<big_endian>* stub_table = this->stub_table_;
4716 // Reset the stub table's address and file offset. The
4717 // current data size for child will be updated after that.
4718 stub_table_->reset_address_and_file_offset();
4719 off = align_address(off, stub_table_->addralign());
4720 off += stub_table->current_data_size();
4723 this->set_current_data_size(off);
4726 // Arm_exidx_cantunwind methods.
4728 // Write this to Output file OF for a fixed endianity.
4730 template<bool big_endian>
4732 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
4734 off_t offset = this->offset();
4735 const section_size_type oview_size = 8;
4736 unsigned char* const oview = of->get_output_view(offset, oview_size);
4738 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
4739 Valtype* wv = reinterpret_cast<Valtype*>(oview);
4741 Output_section* os = this->relobj_->output_section(this->shndx_);
4742 gold_assert(os != NULL);
4744 Arm_relobj<big_endian>* arm_relobj =
4745 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
4746 Arm_address output_offset =
4747 arm_relobj->get_output_section_offset(this->shndx_);
4748 Arm_address section_start;
4749 if(output_offset != Arm_relobj<big_endian>::invalid_address)
4750 section_start = os->address() + output_offset;
4753 // Currently this only happens for a relaxed section.
4754 const Output_relaxed_input_section* poris =
4755 os->find_relaxed_input_section(this->relobj_, this->shndx_);
4756 gold_assert(poris != NULL);
4757 section_start = poris->address();
4760 // We always append this to the end of an EXIDX section.
4761 Arm_address output_address =
4762 section_start + this->relobj_->section_size(this->shndx_);
4764 // Write out the entry. The first word either points to the beginning
4765 // or after the end of a text section. The second word is the special
4766 // EXIDX_CANTUNWIND value.
4767 uint32_t prel31_offset = output_address - this->address();
4768 if (utils::has_overflow<31>(offset))
4769 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
4770 elfcpp::Swap<32, big_endian>::writeval(wv, prel31_offset & 0x7fffffffU);
4771 elfcpp::Swap<32, big_endian>::writeval(wv + 1, elfcpp::EXIDX_CANTUNWIND);
4773 of->write_output_view(this->offset(), oview_size, oview);
4776 // Arm_exidx_merged_section methods.
4778 // Constructor for Arm_exidx_merged_section.
4779 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
4780 // SECTION_OFFSET_MAP points to a section offset map describing how
4781 // parts of the input section are mapped to output. DELETED_BYTES is
4782 // the number of bytes deleted from the EXIDX input section.
4784 Arm_exidx_merged_section::Arm_exidx_merged_section(
4785 const Arm_exidx_input_section& exidx_input_section,
4786 const Arm_exidx_section_offset_map& section_offset_map,
4787 uint32_t deleted_bytes)
4788 : Output_relaxed_input_section(exidx_input_section.relobj(),
4789 exidx_input_section.shndx(),
4790 exidx_input_section.addralign()),
4791 exidx_input_section_(exidx_input_section),
4792 section_offset_map_(section_offset_map)
4794 // Fix size here so that we do not need to implement set_final_data_size.
4795 this->set_data_size(exidx_input_section.size() - deleted_bytes);
4796 this->fix_data_size();
4799 // Given an input OBJECT, an input section index SHNDX within that
4800 // object, and an OFFSET relative to the start of that input
4801 // section, return whether or not the corresponding offset within
4802 // the output section is known. If this function returns true, it
4803 // sets *POUTPUT to the output offset. The value -1 indicates that
4804 // this input offset is being discarded.
4807 Arm_exidx_merged_section::do_output_offset(
4808 const Relobj* relobj,
4810 section_offset_type offset,
4811 section_offset_type* poutput) const
4813 // We only handle offsets for the original EXIDX input section.
4814 if (relobj != this->exidx_input_section_.relobj()
4815 || shndx != this->exidx_input_section_.shndx())
4818 section_offset_type section_size =
4819 convert_types<section_offset_type>(this->exidx_input_section_.size());
4820 if (offset < 0 || offset >= section_size)
4821 // Input offset is out of valid range.
4825 // We need to look up the section offset map to determine the output
4826 // offset. Find the reference point in map that is first offset
4827 // bigger than or equal to this offset.
4828 Arm_exidx_section_offset_map::const_iterator p =
4829 this->section_offset_map_.lower_bound(offset);
4831 // The section offset maps are build such that this should not happen if
4832 // input offset is in the valid range.
4833 gold_assert(p != this->section_offset_map_.end());
4835 // We need to check if this is dropped.
4836 section_offset_type ref = p->first;
4837 section_offset_type mapped_ref = p->second;
4839 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
4840 // Offset is present in output.
4841 *poutput = mapped_ref + (offset - ref);
4843 // Offset is discarded owing to EXIDX entry merging.
4850 // Write this to output file OF.
4853 Arm_exidx_merged_section::do_write(Output_file* of)
4855 // If we retain or discard the whole EXIDX input section, we would
4857 gold_assert(this->data_size() != this->exidx_input_section_.size()
4858 && this->data_size() != 0);
4860 off_t offset = this->offset();
4861 const section_size_type oview_size = this->data_size();
4862 unsigned char* const oview = of->get_output_view(offset, oview_size);
4864 Output_section* os = this->relobj()->output_section(this->shndx());
4865 gold_assert(os != NULL);
4867 // Get contents of EXIDX input section.
4868 section_size_type section_size;
4869 const unsigned char* section_contents =
4870 this->relobj()->section_contents(this->shndx(), §ion_size, false);
4871 gold_assert(section_size == this->exidx_input_section_.size());
4873 // Go over spans of input offsets and write only those that are not
4875 section_offset_type in_start = 0;
4876 section_offset_type out_start = 0;
4877 for(Arm_exidx_section_offset_map::const_iterator p =
4878 this->section_offset_map_.begin();
4879 p != this->section_offset_map_.end();
4882 section_offset_type in_end = p->first;
4883 gold_assert(in_end >= in_start);
4884 section_offset_type out_end = p->second;
4885 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
4888 size_t out_chunk_size =
4889 convert_types<size_t>(out_end - out_start + 1);
4890 gold_assert(out_chunk_size == in_chunk_size);
4891 memcpy(oview + out_start, section_contents + in_start,
4893 out_start += out_chunk_size;
4895 in_start += in_chunk_size;
4898 gold_assert(convert_to_section_size_type(out_start) == oview_size);
4899 of->write_output_view(this->offset(), oview_size, oview);
4902 // Arm_exidx_fixup methods.
4904 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
4905 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
4906 // points to the end of the last seen EXIDX section.
4909 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
4911 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
4912 && this->last_input_section_ != NULL)
4914 Relobj* relobj = this->last_input_section_->relobj();
4915 unsigned int text_shndx = this->last_input_section_->link();
4916 Arm_exidx_cantunwind* cantunwind =
4917 new Arm_exidx_cantunwind(relobj, text_shndx);
4918 this->exidx_output_section_->add_output_section_data(cantunwind);
4919 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
4923 // Process an EXIDX section entry in input. Return whether this entry
4924 // can be deleted in the output. SECOND_WORD in the second word of the
4928 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
4931 if (second_word == elfcpp::EXIDX_CANTUNWIND)
4933 // Merge if previous entry is also an EXIDX_CANTUNWIND.
4934 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
4935 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
4937 else if ((second_word & 0x80000000) != 0)
4939 // Inlined unwinding data. Merge if equal to previous.
4940 delete_entry = (this->last_unwind_type_ == UT_INLINED_ENTRY
4941 && this->last_inlined_entry_ == second_word);
4942 this->last_unwind_type_ = UT_INLINED_ENTRY;
4943 this->last_inlined_entry_ = second_word;
4947 // Normal table entry. In theory we could merge these too,
4948 // but duplicate entries are likely to be much less common.
4949 delete_entry = false;
4950 this->last_unwind_type_ = UT_NORMAL_ENTRY;
4952 return delete_entry;
4955 // Update the current section offset map during EXIDX section fix-up.
4956 // If there is no map, create one. INPUT_OFFSET is the offset of a
4957 // reference point, DELETED_BYTES is the number of deleted by in the
4958 // section so far. If DELETE_ENTRY is true, the reference point and
4959 // all offsets after the previous reference point are discarded.
4962 Arm_exidx_fixup::update_offset_map(
4963 section_offset_type input_offset,
4964 section_size_type deleted_bytes,
4967 if (this->section_offset_map_ == NULL)
4968 this->section_offset_map_ = new Arm_exidx_section_offset_map();
4969 section_offset_type output_offset = (delete_entry
4971 : input_offset - deleted_bytes);
4972 (*this->section_offset_map_)[input_offset] = output_offset;
4975 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
4976 // bytes deleted. If some entries are merged, also store a pointer to a newly
4977 // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The
4978 // caller owns the map and is responsible for releasing it after use.
4980 template<bool big_endian>
4982 Arm_exidx_fixup::process_exidx_section(
4983 const Arm_exidx_input_section* exidx_input_section,
4984 Arm_exidx_section_offset_map** psection_offset_map)
4986 Relobj* relobj = exidx_input_section->relobj();
4987 unsigned shndx = exidx_input_section->shndx();
4988 section_size_type section_size;
4989 const unsigned char* section_contents =
4990 relobj->section_contents(shndx, §ion_size, false);
4992 if ((section_size % 8) != 0)
4994 // Something is wrong with this section. Better not touch it.
4995 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
4996 relobj->name().c_str(), shndx);
4997 this->last_input_section_ = exidx_input_section;
4998 this->last_unwind_type_ = UT_NONE;
5002 uint32_t deleted_bytes = 0;
5003 bool prev_delete_entry = false;
5004 gold_assert(this->section_offset_map_ == NULL);
5006 for (section_size_type i = 0; i < section_size; i += 8)
5008 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5010 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5011 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5013 bool delete_entry = this->process_exidx_entry(second_word);
5015 // Entry deletion causes changes in output offsets. We use a std::map
5016 // to record these. And entry (x, y) means input offset x
5017 // is mapped to output offset y. If y is invalid_offset, then x is
5018 // dropped in the output. Because of the way std::map::lower_bound
5019 // works, we record the last offset in a region w.r.t to keeping or
5020 // dropping. If there is no entry (x0, y0) for an input offset x0,
5021 // the output offset y0 of it is determined by the output offset y1 of
5022 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5023 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1
5025 if (delete_entry != prev_delete_entry && i != 0)
5026 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5028 // Update total deleted bytes for this entry.
5032 prev_delete_entry = delete_entry;
5035 // If section offset map is not NULL, make an entry for the end of
5037 if (this->section_offset_map_ != NULL)
5038 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5040 *psection_offset_map = this->section_offset_map_;
5041 this->section_offset_map_ = NULL;
5042 this->last_input_section_ = exidx_input_section;
5044 // Set the first output text section so that we can link the EXIDX output
5045 // section to it. Ignore any EXIDX input section that is completely merged.
5046 if (this->first_output_text_section_ == NULL
5047 && deleted_bytes != section_size)
5049 unsigned int link = exidx_input_section->link();
5050 Output_section* os = relobj->output_section(link);
5051 gold_assert(os != NULL);
5052 this->first_output_text_section_ = os;
5055 return deleted_bytes;
5058 // Arm_output_section methods.
5060 // Create a stub group for input sections from BEGIN to END. OWNER
5061 // points to the input section to be the owner a new stub table.
5063 template<bool big_endian>
5065 Arm_output_section<big_endian>::create_stub_group(
5066 Input_section_list::const_iterator begin,
5067 Input_section_list::const_iterator end,
5068 Input_section_list::const_iterator owner,
5069 Target_arm<big_endian>* target,
5070 std::vector<Output_relaxed_input_section*>* new_relaxed_sections)
5072 // We use a different kind of relaxed section in an EXIDX section.
5073 // The static casting from Output_relaxed_input_section to
5074 // Arm_input_section is invalid in an EXIDX section. We are okay
5075 // because we should not be calling this for an EXIDX section.
5076 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5078 // Currently we convert ordinary input sections into relaxed sections only
5079 // at this point but we may want to support creating relaxed input section
5080 // very early. So we check here to see if owner is already a relaxed
5083 Arm_input_section<big_endian>* arm_input_section;
5084 if (owner->is_relaxed_input_section())
5087 Arm_input_section<big_endian>::as_arm_input_section(
5088 owner->relaxed_input_section());
5092 gold_assert(owner->is_input_section());
5093 // Create a new relaxed input section.
5095 target->new_arm_input_section(owner->relobj(), owner->shndx());
5096 new_relaxed_sections->push_back(arm_input_section);
5099 // Create a stub table.
5100 Stub_table<big_endian>* stub_table =
5101 target->new_stub_table(arm_input_section);
5103 arm_input_section->set_stub_table(stub_table);
5105 Input_section_list::const_iterator p = begin;
5106 Input_section_list::const_iterator prev_p;
5108 // Look for input sections or relaxed input sections in [begin ... end].
5111 if (p->is_input_section() || p->is_relaxed_input_section())
5113 // The stub table information for input sections live
5114 // in their objects.
5115 Arm_relobj<big_endian>* arm_relobj =
5116 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5117 arm_relobj->set_stub_table(p->shndx(), stub_table);
5121 while (prev_p != end);
5124 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5125 // of stub groups. We grow a stub group by adding input section until the
5126 // size is just below GROUP_SIZE. The last input section will be converted
5127 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5128 // input section after the stub table, effectively double the group size.
5130 // This is similar to the group_sections() function in elf32-arm.c but is
5131 // implemented differently.
5133 template<bool big_endian>
5135 Arm_output_section<big_endian>::group_sections(
5136 section_size_type group_size,
5137 bool stubs_always_after_branch,
5138 Target_arm<big_endian>* target)
5140 // We only care about sections containing code.
5141 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5144 // States for grouping.
5147 // No group is being built.
5149 // A group is being built but the stub table is not found yet.
5150 // We keep group a stub group until the size is just under GROUP_SIZE.
5151 // The last input section in the group will be used as the stub table.
5152 FINDING_STUB_SECTION,
5153 // A group is being built and we have already found a stub table.
5154 // We enter this state to grow a stub group by adding input section
5155 // after the stub table. This effectively doubles the group size.
5159 // Any newly created relaxed sections are stored here.
5160 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5162 State state = NO_GROUP;
5163 section_size_type off = 0;
5164 section_size_type group_begin_offset = 0;
5165 section_size_type group_end_offset = 0;
5166 section_size_type stub_table_end_offset = 0;
5167 Input_section_list::const_iterator group_begin =
5168 this->input_sections().end();
5169 Input_section_list::const_iterator stub_table =
5170 this->input_sections().end();
5171 Input_section_list::const_iterator group_end = this->input_sections().end();
5172 for (Input_section_list::const_iterator p = this->input_sections().begin();
5173 p != this->input_sections().end();
5176 section_size_type section_begin_offset =
5177 align_address(off, p->addralign());
5178 section_size_type section_end_offset =
5179 section_begin_offset + p->data_size();
5181 // Check to see if we should group the previously seens sections.
5187 case FINDING_STUB_SECTION:
5188 // Adding this section makes the group larger than GROUP_SIZE.
5189 if (section_end_offset - group_begin_offset >= group_size)
5191 if (stubs_always_after_branch)
5193 gold_assert(group_end != this->input_sections().end());
5194 this->create_stub_group(group_begin, group_end, group_end,
5195 target, &new_relaxed_sections);
5200 // But wait, there's more! Input sections up to
5201 // stub_group_size bytes after the stub table can be
5202 // handled by it too.
5203 state = HAS_STUB_SECTION;
5204 stub_table = group_end;
5205 stub_table_end_offset = group_end_offset;
5210 case HAS_STUB_SECTION:
5211 // Adding this section makes the post stub-section group larger
5213 if (section_end_offset - stub_table_end_offset >= group_size)
5215 gold_assert(group_end != this->input_sections().end());
5216 this->create_stub_group(group_begin, group_end, stub_table,
5217 target, &new_relaxed_sections);
5226 // If we see an input section and currently there is no group, start
5227 // a new one. Skip any empty sections.
5228 if ((p->is_input_section() || p->is_relaxed_input_section())
5229 && (p->relobj()->section_size(p->shndx()) != 0))
5231 if (state == NO_GROUP)
5233 state = FINDING_STUB_SECTION;
5235 group_begin_offset = section_begin_offset;
5238 // Keep track of the last input section seen.
5240 group_end_offset = section_end_offset;
5243 off = section_end_offset;
5246 // Create a stub group for any ungrouped sections.
5247 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5249 gold_assert(group_end != this->input_sections().end());
5250 this->create_stub_group(group_begin, group_end,
5251 (state == FINDING_STUB_SECTION
5254 target, &new_relaxed_sections);
5257 // Convert input section into relaxed input section in a batch.
5258 if (!new_relaxed_sections.empty())
5259 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5261 // Update the section offsets
5262 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5264 Arm_relobj<big_endian>* arm_relobj =
5265 Arm_relobj<big_endian>::as_arm_relobj(
5266 new_relaxed_sections[i]->relobj());
5267 unsigned int shndx = new_relaxed_sections[i]->shndx();
5268 // Tell Arm_relobj that this input section is converted.
5269 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5273 // Append non empty text sections in this to LIST in ascending
5274 // order of their position in this.
5276 template<bool big_endian>
5278 Arm_output_section<big_endian>::append_text_sections_to_list(
5279 Text_section_list* list)
5281 // We only care about text sections.
5282 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5285 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5287 for (Input_section_list::const_iterator p = this->input_sections().begin();
5288 p != this->input_sections().end();
5291 // We only care about plain or relaxed input sections. We also
5292 // ignore any merged sections.
5293 if ((p->is_input_section() || p->is_relaxed_input_section())
5294 && p->data_size() != 0)
5295 list->push_back(Text_section_list::value_type(p->relobj(),
5300 template<bool big_endian>
5302 Arm_output_section<big_endian>::fix_exidx_coverage(
5303 const Text_section_list& sorted_text_sections,
5304 Symbol_table* symtab)
5306 // We should only do this for the EXIDX output section.
5307 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5309 // We don't want the relaxation loop to undo these changes, so we discard
5310 // the current saved states and take another one after the fix-up.
5311 this->discard_states();
5313 // Remove all input sections.
5314 uint64_t address = this->address();
5315 typedef std::list<Simple_input_section> Simple_input_section_list;
5316 Simple_input_section_list input_sections;
5317 this->reset_address_and_file_offset();
5318 this->get_input_sections(address, std::string(""), &input_sections);
5320 if (!this->input_sections().empty())
5321 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5323 // Go through all the known input sections and record them.
5324 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5325 Section_id_set known_input_sections;
5326 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5327 p != input_sections.end();
5330 // This should never happen. At this point, we should only see
5331 // plain EXIDX input sections.
5332 gold_assert(!p->is_relaxed_input_section());
5333 known_input_sections.insert(Section_id(p->relobj(), p->shndx()));
5336 Arm_exidx_fixup exidx_fixup(this);
5338 // Go over the sorted text sections.
5339 Section_id_set processed_input_sections;
5340 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5341 p != sorted_text_sections.end();
5344 Relobj* relobj = p->first;
5345 unsigned int shndx = p->second;
5347 Arm_relobj<big_endian>* arm_relobj =
5348 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5349 const Arm_exidx_input_section* exidx_input_section =
5350 arm_relobj->exidx_input_section_by_link(shndx);
5352 // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND
5353 // entry pointing to the end of the last seen EXIDX section.
5354 if (exidx_input_section == NULL)
5356 exidx_fixup.add_exidx_cantunwind_as_needed();
5360 Relobj* exidx_relobj = exidx_input_section->relobj();
5361 unsigned int exidx_shndx = exidx_input_section->shndx();
5362 Section_id sid(exidx_relobj, exidx_shndx);
5363 if (known_input_sections.find(sid) == known_input_sections.end())
5365 // This is odd. We have not seen this EXIDX input section before.
5366 // We cannot do fix-up.
5367 gold_error(_("EXIDX section %u of %s is not in EXIDX output section"),
5368 exidx_shndx, exidx_relobj->name().c_str());
5369 exidx_fixup.add_exidx_cantunwind_as_needed();
5373 // Fix up coverage and append input section to output data list.
5374 Arm_exidx_section_offset_map* section_offset_map = NULL;
5375 uint32_t deleted_bytes =
5376 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5377 §ion_offset_map);
5379 if (deleted_bytes == exidx_input_section->size())
5381 // The whole EXIDX section got merged. Remove it from output.
5382 gold_assert(section_offset_map == NULL);
5383 exidx_relobj->set_output_section(exidx_shndx, NULL);
5385 // All local symbols defined in this input section will be dropped.
5386 // We need to adjust output local symbol count.
5387 arm_relobj->set_output_local_symbol_count_needs_update();
5389 else if (deleted_bytes > 0)
5391 // Some entries are merged. We need to convert this EXIDX input
5392 // section into a relaxed section.
5393 gold_assert(section_offset_map != NULL);
5394 Arm_exidx_merged_section* merged_section =
5395 new Arm_exidx_merged_section(*exidx_input_section,
5396 *section_offset_map, deleted_bytes);
5397 this->add_relaxed_input_section(merged_section);
5398 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
5400 // All local symbols defined in discarded portions of this input
5401 // section will be dropped. We need to adjust output local symbol
5403 arm_relobj->set_output_local_symbol_count_needs_update();
5407 // Just add back the EXIDX input section.
5408 gold_assert(section_offset_map == NULL);
5409 Output_section::Simple_input_section sis(exidx_relobj, exidx_shndx);
5410 this->add_simple_input_section(sis, exidx_input_section->size(),
5411 exidx_input_section->addralign());
5414 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
5417 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5418 exidx_fixup.add_exidx_cantunwind_as_needed();
5420 // Remove any known EXIDX input sections that are not processed.
5421 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5422 p != input_sections.end();
5425 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
5426 == processed_input_sections.end())
5428 // We only discard a known EXIDX section because its linked
5429 // text section has been folded by ICF.
5430 Arm_relobj<big_endian>* arm_relobj =
5431 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5432 const Arm_exidx_input_section* exidx_input_section =
5433 arm_relobj->exidx_input_section_by_shndx(p->shndx());
5434 gold_assert(exidx_input_section != NULL);
5435 unsigned int text_shndx = exidx_input_section->link();
5436 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
5438 // Remove this from link.
5439 p->relobj()->set_output_section(p->shndx(), NULL);
5443 // Link exidx output section to the first seen output section and
5444 // set correct entry size.
5445 this->set_link_section(exidx_fixup.first_output_text_section());
5446 this->set_entsize(8);
5448 // Make changes permanent.
5449 this->save_states();
5450 this->set_section_offsets_need_adjustment();
5453 // Arm_relobj methods.
5455 // Determine if an input section is scannable for stub processing. SHDR is
5456 // the header of the section and SHNDX is the section index. OS is the output
5457 // section for the input section and SYMTAB is the global symbol table used to
5458 // look up ICF information.
5460 template<bool big_endian>
5462 Arm_relobj<big_endian>::section_is_scannable(
5463 const elfcpp::Shdr<32, big_endian>& shdr,
5465 const Output_section* os,
5466 const Symbol_table *symtab)
5468 // Skip any empty sections, unallocated sections or sections whose
5469 // type are not SHT_PROGBITS.
5470 if (shdr.get_sh_size() == 0
5471 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
5472 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
5475 // Skip any discarded or ICF'ed sections.
5476 if (os == NULL || symtab->is_section_folded(this, shndx))
5479 // If this requires special offset handling, check to see if it is
5480 // a relaxed section. If this is not, then it is a merged section that
5481 // we cannot handle.
5482 if (this->is_output_section_offset_invalid(shndx))
5484 const Output_relaxed_input_section* poris =
5485 os->find_relaxed_input_section(this, shndx);
5493 // Determine if we want to scan the SHNDX-th section for relocation stubs.
5494 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5496 template<bool big_endian>
5498 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
5499 const elfcpp::Shdr<32, big_endian>& shdr,
5500 const Relobj::Output_sections& out_sections,
5501 const Symbol_table *symtab,
5502 const unsigned char* pshdrs)
5504 unsigned int sh_type = shdr.get_sh_type();
5505 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
5508 // Ignore empty section.
5509 off_t sh_size = shdr.get_sh_size();
5513 // Ignore reloc section with unexpected symbol table. The
5514 // error will be reported in the final link.
5515 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
5518 unsigned int reloc_size;
5519 if (sh_type == elfcpp::SHT_REL)
5520 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5522 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5524 // Ignore reloc section with unexpected entsize or uneven size.
5525 // The error will be reported in the final link.
5526 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
5529 // Ignore reloc section with bad info. This error will be
5530 // reported in the final link.
5531 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5532 if (index >= this->shnum())
5535 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5536 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
5537 return this->section_is_scannable(text_shdr, index,
5538 out_sections[index], symtab);
5541 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
5542 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5544 template<bool big_endian>
5546 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
5547 const elfcpp::Shdr<32, big_endian>& shdr,
5550 const Symbol_table* symtab)
5552 if (!this->section_is_scannable(shdr, shndx, os, symtab))
5555 // Find output address of section.
5556 Arm_address address = os->output_address(this, shndx, 0);
5558 // If the section does not cross any 4K-boundaries, it does not need to
5560 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
5566 // Scan a section for Cortex-A8 workaround.
5568 template<bool big_endian>
5570 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
5571 const elfcpp::Shdr<32, big_endian>& shdr,
5574 Target_arm<big_endian>* arm_target)
5576 Arm_address output_address = os->output_address(this, shndx, 0);
5578 // Get the section contents.
5579 section_size_type input_view_size = 0;
5580 const unsigned char* input_view =
5581 this->section_contents(shndx, &input_view_size, false);
5583 // We need to go through the mapping symbols to determine what to
5584 // scan. There are two reasons. First, we should look at THUMB code and
5585 // THUMB code only. Second, we only want to look at the 4K-page boundary
5586 // to speed up the scanning.
5588 // Look for the first mapping symbol in this section. It should be
5590 Mapping_symbol_position section_start(shndx, 0);
5591 typename Mapping_symbols_info::const_iterator p =
5592 this->mapping_symbols_info_.lower_bound(section_start);
5594 if (p == this->mapping_symbols_info_.end()
5595 || p->first != section_start)
5597 gold_warning(_("Cortex-A8 erratum scanning failed because there "
5598 "is no mapping symbols for section %u of %s"),
5599 shndx, this->name().c_str());
5603 while (p != this->mapping_symbols_info_.end()
5604 && p->first.first == shndx)
5606 typename Mapping_symbols_info::const_iterator next =
5607 this->mapping_symbols_info_.upper_bound(p->first);
5609 // Only scan part of a section with THUMB code.
5610 if (p->second == 't')
5612 // Determine the end of this range.
5613 section_size_type span_start =
5614 convert_to_section_size_type(p->first.second);
5615 section_size_type span_end;
5616 if (next != this->mapping_symbols_info_.end()
5617 && next->first.first == shndx)
5618 span_end = convert_to_section_size_type(next->first.second);
5620 span_end = convert_to_section_size_type(shdr.get_sh_size());
5622 if (((span_start + output_address) & ~0xfffUL)
5623 != ((span_end + output_address - 1) & ~0xfffUL))
5625 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
5626 span_start, span_end,
5636 // Scan relocations for stub generation.
5638 template<bool big_endian>
5640 Arm_relobj<big_endian>::scan_sections_for_stubs(
5641 Target_arm<big_endian>* arm_target,
5642 const Symbol_table* symtab,
5643 const Layout* layout)
5645 unsigned int shnum = this->shnum();
5646 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5648 // Read the section headers.
5649 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
5653 // To speed up processing, we set up hash tables for fast lookup of
5654 // input offsets to output addresses.
5655 this->initialize_input_to_output_maps();
5657 const Relobj::Output_sections& out_sections(this->output_sections());
5659 Relocate_info<32, big_endian> relinfo;
5660 relinfo.symtab = symtab;
5661 relinfo.layout = layout;
5662 relinfo.object = this;
5664 // Do relocation stubs scanning.
5665 const unsigned char* p = pshdrs + shdr_size;
5666 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5668 const elfcpp::Shdr<32, big_endian> shdr(p);
5669 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
5672 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5673 Arm_address output_offset = this->get_output_section_offset(index);
5674 Arm_address output_address;
5675 if(output_offset != invalid_address)
5676 output_address = out_sections[index]->address() + output_offset;
5679 // Currently this only happens for a relaxed section.
5680 const Output_relaxed_input_section* poris =
5681 out_sections[index]->find_relaxed_input_section(this, index);
5682 gold_assert(poris != NULL);
5683 output_address = poris->address();
5686 // Get the relocations.
5687 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
5691 // Get the section contents. This does work for the case in which
5692 // we modify the contents of an input section. We need to pass the
5693 // output view under such circumstances.
5694 section_size_type input_view_size = 0;
5695 const unsigned char* input_view =
5696 this->section_contents(index, &input_view_size, false);
5698 relinfo.reloc_shndx = i;
5699 relinfo.data_shndx = index;
5700 unsigned int sh_type = shdr.get_sh_type();
5701 unsigned int reloc_size;
5702 if (sh_type == elfcpp::SHT_REL)
5703 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5705 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5707 Output_section* os = out_sections[index];
5708 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
5709 shdr.get_sh_size() / reloc_size,
5711 output_offset == invalid_address,
5712 input_view, output_address,
5717 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
5718 // after its relocation section, if there is one, is processed for
5719 // relocation stubs. Merging this loop with the one above would have been
5720 // complicated since we would have had to make sure that relocation stub
5721 // scanning is done first.
5722 if (arm_target->fix_cortex_a8())
5724 const unsigned char* p = pshdrs + shdr_size;
5725 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5727 const elfcpp::Shdr<32, big_endian> shdr(p);
5728 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
5731 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
5736 // After we've done the relocations, we release the hash tables,
5737 // since we no longer need them.
5738 this->free_input_to_output_maps();
5741 // Count the local symbols. The ARM backend needs to know if a symbol
5742 // is a THUMB function or not. For global symbols, it is easy because
5743 // the Symbol object keeps the ELF symbol type. For local symbol it is
5744 // harder because we cannot access this information. So we override the
5745 // do_count_local_symbol in parent and scan local symbols to mark
5746 // THUMB functions. This is not the most efficient way but I do not want to
5747 // slow down other ports by calling a per symbol targer hook inside
5748 // Sized_relobj<size, big_endian>::do_count_local_symbols.
5750 template<bool big_endian>
5752 Arm_relobj<big_endian>::do_count_local_symbols(
5753 Stringpool_template<char>* pool,
5754 Stringpool_template<char>* dynpool)
5756 // We need to fix-up the values of any local symbols whose type are
5759 // Ask parent to count the local symbols.
5760 Sized_relobj<32, big_endian>::do_count_local_symbols(pool, dynpool);
5761 const unsigned int loccount = this->local_symbol_count();
5765 // Intialize the thumb function bit-vector.
5766 std::vector<bool> empty_vector(loccount, false);
5767 this->local_symbol_is_thumb_function_.swap(empty_vector);
5769 // Read the symbol table section header.
5770 const unsigned int symtab_shndx = this->symtab_shndx();
5771 elfcpp::Shdr<32, big_endian>
5772 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
5773 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
5775 // Read the local symbols.
5776 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
5777 gold_assert(loccount == symtabshdr.get_sh_info());
5778 off_t locsize = loccount * sym_size;
5779 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
5780 locsize, true, true);
5782 // For mapping symbol processing, we need to read the symbol names.
5783 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
5784 if (strtab_shndx >= this->shnum())
5786 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
5790 elfcpp::Shdr<32, big_endian>
5791 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
5792 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
5794 this->error(_("symbol table name section has wrong type: %u"),
5795 static_cast<unsigned int>(strtabshdr.get_sh_type()));
5798 const char* pnames =
5799 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
5800 strtabshdr.get_sh_size(),
5803 // Loop over the local symbols and mark any local symbols pointing
5804 // to THUMB functions.
5806 // Skip the first dummy symbol.
5808 typename Sized_relobj<32, big_endian>::Local_values* plocal_values =
5809 this->local_values();
5810 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
5812 elfcpp::Sym<32, big_endian> sym(psyms);
5813 elfcpp::STT st_type = sym.get_st_type();
5814 Symbol_value<32>& lv((*plocal_values)[i]);
5815 Arm_address input_value = lv.input_value();
5817 // Check to see if this is a mapping symbol.
5818 const char* sym_name = pnames + sym.get_st_name();
5819 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
5821 unsigned int input_shndx = sym.get_st_shndx();
5823 // Strip of LSB in case this is a THUMB symbol.
5824 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
5825 this->mapping_symbols_info_[msp] = sym_name[1];
5828 if (st_type == elfcpp::STT_ARM_TFUNC
5829 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
5831 // This is a THUMB function. Mark this and canonicalize the
5832 // symbol value by setting LSB.
5833 this->local_symbol_is_thumb_function_[i] = true;
5834 if ((input_value & 1) == 0)
5835 lv.set_input_value(input_value | 1);
5840 // Relocate sections.
5841 template<bool big_endian>
5843 Arm_relobj<big_endian>::do_relocate_sections(
5844 const Symbol_table* symtab,
5845 const Layout* layout,
5846 const unsigned char* pshdrs,
5847 typename Sized_relobj<32, big_endian>::Views* pviews)
5849 // Call parent to relocate sections.
5850 Sized_relobj<32, big_endian>::do_relocate_sections(symtab, layout, pshdrs,
5853 // We do not generate stubs if doing a relocatable link.
5854 if (parameters->options().relocatable())
5857 // Relocate stub tables.
5858 unsigned int shnum = this->shnum();
5860 Target_arm<big_endian>* arm_target =
5861 Target_arm<big_endian>::default_target();
5863 Relocate_info<32, big_endian> relinfo;
5864 relinfo.symtab = symtab;
5865 relinfo.layout = layout;
5866 relinfo.object = this;
5868 for (unsigned int i = 1; i < shnum; ++i)
5870 Arm_input_section<big_endian>* arm_input_section =
5871 arm_target->find_arm_input_section(this, i);
5873 if (arm_input_section != NULL
5874 && arm_input_section->is_stub_table_owner()
5875 && !arm_input_section->stub_table()->empty())
5877 // We cannot discard a section if it owns a stub table.
5878 Output_section* os = this->output_section(i);
5879 gold_assert(os != NULL);
5881 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
5882 relinfo.reloc_shdr = NULL;
5883 relinfo.data_shndx = i;
5884 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
5886 gold_assert((*pviews)[i].view != NULL);
5888 // We are passed the output section view. Adjust it to cover the
5890 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
5891 gold_assert((stub_table->address() >= (*pviews)[i].address)
5892 && ((stub_table->address() + stub_table->data_size())
5893 <= (*pviews)[i].address + (*pviews)[i].view_size));
5895 off_t offset = stub_table->address() - (*pviews)[i].address;
5896 unsigned char* view = (*pviews)[i].view + offset;
5897 Arm_address address = stub_table->address();
5898 section_size_type view_size = stub_table->data_size();
5900 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
5904 // Apply Cortex A8 workaround if applicable.
5905 if (this->section_has_cortex_a8_workaround(i))
5907 unsigned char* view = (*pviews)[i].view;
5908 Arm_address view_address = (*pviews)[i].address;
5909 section_size_type view_size = (*pviews)[i].view_size;
5910 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
5912 // Adjust view to cover section.
5913 Output_section* os = this->output_section(i);
5914 gold_assert(os != NULL);
5915 Arm_address section_address = os->output_address(this, i, 0);
5916 uint64_t section_size = this->section_size(i);
5918 gold_assert(section_address >= view_address
5919 && ((section_address + section_size)
5920 <= (view_address + view_size)));
5922 unsigned char* section_view = view + (section_address - view_address);
5924 // Apply the Cortex-A8 workaround to the output address range
5925 // corresponding to this input section.
5926 stub_table->apply_cortex_a8_workaround_to_address_range(
5935 // Create a new EXIDX input section object for EXIDX section SHNDX with
5938 template<bool big_endian>
5940 Arm_relobj<big_endian>::make_exidx_input_section(
5942 const elfcpp::Shdr<32, big_endian>& shdr)
5944 // Link .text section to its .ARM.exidx section in the same object.
5945 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
5947 // Issue an error and ignore this EXIDX section if it does not point
5948 // to any text section.
5949 if (text_shndx == elfcpp::SHN_UNDEF)
5951 gold_error(_("EXIDX section %u in %s has no linked text section"),
5952 shndx, this->name().c_str());
5956 // Issue an error and ignore this EXIDX section if it points to a text
5957 // section already has an EXIDX section.
5958 if (this->exidx_section_map_[text_shndx] != NULL)
5960 gold_error(_("EXIDX sections %u and %u both link to text section %u "
5962 shndx, this->exidx_section_map_[text_shndx]->shndx(),
5963 text_shndx, this->name().c_str());
5967 // Create an Arm_exidx_input_section object for this EXIDX section.
5968 Arm_exidx_input_section* exidx_input_section =
5969 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
5970 shdr.get_sh_addralign());
5971 this->exidx_section_map_[text_shndx] = exidx_input_section;
5973 // Also map the EXIDX section index to this.
5974 gold_assert(this->exidx_section_map_[shndx] == NULL);
5975 this->exidx_section_map_[shndx] = exidx_input_section;
5978 // Read the symbol information.
5980 template<bool big_endian>
5982 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
5984 // Call parent class to read symbol information.
5985 Sized_relobj<32, big_endian>::do_read_symbols(sd);
5987 // Read processor-specific flags in ELF file header.
5988 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
5989 elfcpp::Elf_sizes<32>::ehdr_size,
5991 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
5992 this->processor_specific_flags_ = ehdr.get_e_flags();
5994 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
5996 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5997 const unsigned char *ps =
5998 sd->section_headers->data() + shdr_size;
5999 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6001 elfcpp::Shdr<32, big_endian> shdr(ps);
6002 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6004 gold_assert(this->attributes_section_data_ == NULL);
6005 section_offset_type section_offset = shdr.get_sh_offset();
6006 section_size_type section_size =
6007 convert_to_section_size_type(shdr.get_sh_size());
6008 File_view* view = this->get_lasting_view(section_offset,
6009 section_size, true, false);
6010 this->attributes_section_data_ =
6011 new Attributes_section_data(view->data(), section_size);
6013 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6014 this->make_exidx_input_section(i, shdr);
6018 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6019 // sections for unwinding. These sections are referenced implicitly by
6020 // text sections linked in the section headers. If we ignore these implict
6021 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6022 // will be garbage-collected incorrectly. Hence we override the same function
6023 // in the base class to handle these implicit references.
6025 template<bool big_endian>
6027 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6029 Read_relocs_data* rd)
6031 // First, call base class method to process relocations in this object.
6032 Sized_relobj<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6034 unsigned int shnum = this->shnum();
6035 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6036 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6040 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6041 // to these from the linked text sections.
6042 const unsigned char* ps = pshdrs + shdr_size;
6043 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6045 elfcpp::Shdr<32, big_endian> shdr(ps);
6046 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6048 // Found an .ARM.exidx section, add it to the set of reachable
6049 // sections from its linked text section.
6050 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6051 symtab->gc()->add_reference(this, text_shndx, this, i);
6056 // Update output local symbol count. Owing to EXIDX entry merging, some local
6057 // symbols will be removed in output. Adjust output local symbol count
6058 // accordingly. We can only changed the static output local symbol count. It
6059 // is too late to change the dynamic symbols.
6061 template<bool big_endian>
6063 Arm_relobj<big_endian>::update_output_local_symbol_count()
6065 // Caller should check that this needs updating. We want caller checking
6066 // because output_local_symbol_count_needs_update() is most likely inlined.
6067 gold_assert(this->output_local_symbol_count_needs_update_);
6069 gold_assert(this->symtab_shndx() != -1U);
6070 if (this->symtab_shndx() == 0)
6072 // This object has no symbols. Weird but legal.
6076 // Read the symbol table section header.
6077 const unsigned int symtab_shndx = this->symtab_shndx();
6078 elfcpp::Shdr<32, big_endian>
6079 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6080 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6082 // Read the local symbols.
6083 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6084 const unsigned int loccount = this->local_symbol_count();
6085 gold_assert(loccount == symtabshdr.get_sh_info());
6086 off_t locsize = loccount * sym_size;
6087 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6088 locsize, true, true);
6090 // Loop over the local symbols.
6092 typedef typename Sized_relobj<32, big_endian>::Output_sections
6094 const Output_sections& out_sections(this->output_sections());
6095 unsigned int shnum = this->shnum();
6096 unsigned int count = 0;
6097 // Skip the first, dummy, symbol.
6099 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6101 elfcpp::Sym<32, big_endian> sym(psyms);
6103 Symbol_value<32>& lv((*this->local_values())[i]);
6105 // This local symbol was already discarded by do_count_local_symbols.
6106 if (!lv.needs_output_symtab_entry())
6110 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
6115 Output_section* os = out_sections[shndx];
6117 // This local symbol no longer has an output section. Discard it.
6120 lv.set_no_output_symtab_entry();
6124 // Currently we only discard parts of EXIDX input sections.
6125 // We explicitly check for a merged EXIDX input section to avoid
6126 // calling Output_section_data::output_offset unless necessary.
6127 if ((this->get_output_section_offset(shndx) == invalid_address)
6128 && (this->exidx_input_section_by_shndx(shndx) != NULL))
6130 section_offset_type output_offset =
6131 os->output_offset(this, shndx, lv.input_value());
6132 if (output_offset == -1)
6134 // This symbol is defined in a part of an EXIDX input section
6135 // that is discarded due to entry merging.
6136 lv.set_no_output_symtab_entry();
6145 this->set_output_local_symbol_count(count);
6146 this->output_local_symbol_count_needs_update_ = false;
6149 // Arm_dynobj methods.
6151 // Read the symbol information.
6153 template<bool big_endian>
6155 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6157 // Call parent class to read symbol information.
6158 Sized_dynobj<32, big_endian>::do_read_symbols(sd);
6160 // Read processor-specific flags in ELF file header.
6161 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6162 elfcpp::Elf_sizes<32>::ehdr_size,
6164 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6165 this->processor_specific_flags_ = ehdr.get_e_flags();
6167 // Read the attributes section if there is one.
6168 // We read from the end because gas seems to put it near the end of
6169 // the section headers.
6170 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6171 const unsigned char *ps =
6172 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
6173 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
6175 elfcpp::Shdr<32, big_endian> shdr(ps);
6176 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6178 section_offset_type section_offset = shdr.get_sh_offset();
6179 section_size_type section_size =
6180 convert_to_section_size_type(shdr.get_sh_size());
6181 File_view* view = this->get_lasting_view(section_offset,
6182 section_size, true, false);
6183 this->attributes_section_data_ =
6184 new Attributes_section_data(view->data(), section_size);
6190 // Stub_addend_reader methods.
6192 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6194 template<bool big_endian>
6195 elfcpp::Elf_types<32>::Elf_Swxword
6196 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
6197 unsigned int r_type,
6198 const unsigned char* view,
6199 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
6201 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
6205 case elfcpp::R_ARM_CALL:
6206 case elfcpp::R_ARM_JUMP24:
6207 case elfcpp::R_ARM_PLT32:
6209 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
6210 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6211 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
6212 return utils::sign_extend<26>(val << 2);
6215 case elfcpp::R_ARM_THM_CALL:
6216 case elfcpp::R_ARM_THM_JUMP24:
6217 case elfcpp::R_ARM_THM_XPC22:
6219 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6220 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6221 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6222 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6223 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
6226 case elfcpp::R_ARM_THM_JUMP19:
6228 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6229 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6230 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6231 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6232 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
6240 // A class to handle the PLT data.
6242 template<bool big_endian>
6243 class Output_data_plt_arm : public Output_section_data
6246 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
6249 Output_data_plt_arm(Layout*, Output_data_space*);
6251 // Add an entry to the PLT.
6253 add_entry(Symbol* gsym);
6255 // Return the .rel.plt section data.
6256 const Reloc_section*
6258 { return this->rel_; }
6262 do_adjust_output_section(Output_section* os);
6264 // Write to a map file.
6266 do_print_to_mapfile(Mapfile* mapfile) const
6267 { mapfile->print_output_data(this, _("** PLT")); }
6270 // Template for the first PLT entry.
6271 static const uint32_t first_plt_entry[5];
6273 // Template for subsequent PLT entries.
6274 static const uint32_t plt_entry[3];
6276 // Set the final size.
6278 set_final_data_size()
6280 this->set_data_size(sizeof(first_plt_entry)
6281 + this->count_ * sizeof(plt_entry));
6284 // Write out the PLT data.
6286 do_write(Output_file*);
6288 // The reloc section.
6289 Reloc_section* rel_;
6290 // The .got.plt section.
6291 Output_data_space* got_plt_;
6292 // The number of PLT entries.
6293 unsigned int count_;
6296 // Create the PLT section. The ordinary .got section is an argument,
6297 // since we need to refer to the start. We also create our own .got
6298 // section just for PLT entries.
6300 template<bool big_endian>
6301 Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout,
6302 Output_data_space* got_plt)
6303 : Output_section_data(4), got_plt_(got_plt), count_(0)
6305 this->rel_ = new Reloc_section(false);
6306 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
6307 elfcpp::SHF_ALLOC, this->rel_, true, false,
6311 template<bool big_endian>
6313 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
6318 // Add an entry to the PLT.
6320 template<bool big_endian>
6322 Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym)
6324 gold_assert(!gsym->has_plt_offset());
6326 // Note that when setting the PLT offset we skip the initial
6327 // reserved PLT entry.
6328 gsym->set_plt_offset((this->count_) * sizeof(plt_entry)
6329 + sizeof(first_plt_entry));
6333 section_offset_type got_offset = this->got_plt_->current_data_size();
6335 // Every PLT entry needs a GOT entry which points back to the PLT
6336 // entry (this will be changed by the dynamic linker, normally
6337 // lazily when the function is called).
6338 this->got_plt_->set_current_data_size(got_offset + 4);
6340 // Every PLT entry needs a reloc.
6341 gsym->set_needs_dynsym_entry();
6342 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
6345 // Note that we don't need to save the symbol. The contents of the
6346 // PLT are independent of which symbols are used. The symbols only
6347 // appear in the relocations.
6351 // FIXME: This is not very flexible. Right now this has only been tested
6352 // on armv5te. If we are to support additional architecture features like
6353 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
6355 // The first entry in the PLT.
6356 template<bool big_endian>
6357 const uint32_t Output_data_plt_arm<big_endian>::first_plt_entry[5] =
6359 0xe52de004, // str lr, [sp, #-4]!
6360 0xe59fe004, // ldr lr, [pc, #4]
6361 0xe08fe00e, // add lr, pc, lr
6362 0xe5bef008, // ldr pc, [lr, #8]!
6363 0x00000000, // &GOT[0] - .
6366 // Subsequent entries in the PLT.
6368 template<bool big_endian>
6369 const uint32_t Output_data_plt_arm<big_endian>::plt_entry[3] =
6371 0xe28fc600, // add ip, pc, #0xNN00000
6372 0xe28cca00, // add ip, ip, #0xNN000
6373 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
6376 // Write out the PLT. This uses the hand-coded instructions above,
6377 // and adjusts them as needed. This is all specified by the arm ELF
6378 // Processor Supplement.
6380 template<bool big_endian>
6382 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
6384 const off_t offset = this->offset();
6385 const section_size_type oview_size =
6386 convert_to_section_size_type(this->data_size());
6387 unsigned char* const oview = of->get_output_view(offset, oview_size);
6389 const off_t got_file_offset = this->got_plt_->offset();
6390 const section_size_type got_size =
6391 convert_to_section_size_type(this->got_plt_->data_size());
6392 unsigned char* const got_view = of->get_output_view(got_file_offset,
6394 unsigned char* pov = oview;
6396 Arm_address plt_address = this->address();
6397 Arm_address got_address = this->got_plt_->address();
6399 // Write first PLT entry. All but the last word are constants.
6400 const size_t num_first_plt_words = (sizeof(first_plt_entry)
6401 / sizeof(plt_entry[0]));
6402 for (size_t i = 0; i < num_first_plt_words - 1; i++)
6403 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
6404 // Last word in first PLT entry is &GOT[0] - .
6405 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
6406 got_address - (plt_address + 16));
6407 pov += sizeof(first_plt_entry);
6409 unsigned char* got_pov = got_view;
6411 memset(got_pov, 0, 12);
6414 const int rel_size = elfcpp::Elf_sizes<32>::rel_size;
6415 unsigned int plt_offset = sizeof(first_plt_entry);
6416 unsigned int plt_rel_offset = 0;
6417 unsigned int got_offset = 12;
6418 const unsigned int count = this->count_;
6419 for (unsigned int i = 0;
6422 pov += sizeof(plt_entry),
6424 plt_offset += sizeof(plt_entry),
6425 plt_rel_offset += rel_size,
6428 // Set and adjust the PLT entry itself.
6429 int32_t offset = ((got_address + got_offset)
6430 - (plt_address + plt_offset + 8));
6432 gold_assert(offset >= 0 && offset < 0x0fffffff);
6433 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
6434 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
6435 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
6436 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
6437 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
6438 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
6440 // Set the entry in the GOT.
6441 elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address);
6444 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
6445 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
6447 of->write_output_view(offset, oview_size, oview);
6448 of->write_output_view(got_file_offset, got_size, got_view);
6451 // Create a PLT entry for a global symbol.
6453 template<bool big_endian>
6455 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
6458 if (gsym->has_plt_offset())
6461 if (this->plt_ == NULL)
6463 // Create the GOT sections first.
6464 this->got_section(symtab, layout);
6466 this->plt_ = new Output_data_plt_arm<big_endian>(layout, this->got_plt_);
6467 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
6469 | elfcpp::SHF_EXECINSTR),
6470 this->plt_, false, false, false, false);
6472 this->plt_->add_entry(gsym);
6475 // Report an unsupported relocation against a local symbol.
6477 template<bool big_endian>
6479 Target_arm<big_endian>::Scan::unsupported_reloc_local(
6480 Sized_relobj<32, big_endian>* object,
6481 unsigned int r_type)
6483 gold_error(_("%s: unsupported reloc %u against local symbol"),
6484 object->name().c_str(), r_type);
6487 // We are about to emit a dynamic relocation of type R_TYPE. If the
6488 // dynamic linker does not support it, issue an error. The GNU linker
6489 // only issues a non-PIC error for an allocated read-only section.
6490 // Here we know the section is allocated, but we don't know that it is
6491 // read-only. But we check for all the relocation types which the
6492 // glibc dynamic linker supports, so it seems appropriate to issue an
6493 // error even if the section is not read-only.
6495 template<bool big_endian>
6497 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
6498 unsigned int r_type)
6502 // These are the relocation types supported by glibc for ARM.
6503 case elfcpp::R_ARM_RELATIVE:
6504 case elfcpp::R_ARM_COPY:
6505 case elfcpp::R_ARM_GLOB_DAT:
6506 case elfcpp::R_ARM_JUMP_SLOT:
6507 case elfcpp::R_ARM_ABS32:
6508 case elfcpp::R_ARM_ABS32_NOI:
6509 case elfcpp::R_ARM_PC24:
6510 // FIXME: The following 3 types are not supported by Android's dynamic
6512 case elfcpp::R_ARM_TLS_DTPMOD32:
6513 case elfcpp::R_ARM_TLS_DTPOFF32:
6514 case elfcpp::R_ARM_TLS_TPOFF32:
6518 // This prevents us from issuing more than one error per reloc
6519 // section. But we can still wind up issuing more than one
6520 // error per object file.
6521 if (this->issued_non_pic_error_)
6523 object->error(_("requires unsupported dynamic reloc; "
6524 "recompile with -fPIC"));
6525 this->issued_non_pic_error_ = true;
6528 case elfcpp::R_ARM_NONE:
6533 // Scan a relocation for a local symbol.
6534 // FIXME: This only handles a subset of relocation types used by Android
6535 // on ARM v5te devices.
6537 template<bool big_endian>
6539 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
6542 Sized_relobj<32, big_endian>* object,
6543 unsigned int data_shndx,
6544 Output_section* output_section,
6545 const elfcpp::Rel<32, big_endian>& reloc,
6546 unsigned int r_type,
6547 const elfcpp::Sym<32, big_endian>&)
6549 r_type = get_real_reloc_type(r_type);
6552 case elfcpp::R_ARM_NONE:
6555 case elfcpp::R_ARM_ABS32:
6556 case elfcpp::R_ARM_ABS32_NOI:
6557 // If building a shared library (or a position-independent
6558 // executable), we need to create a dynamic relocation for
6559 // this location. The relocation applied at link time will
6560 // apply the link-time value, so we flag the location with
6561 // an R_ARM_RELATIVE relocation so the dynamic loader can
6562 // relocate it easily.
6563 if (parameters->options().output_is_position_independent())
6565 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6566 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6567 // If we are to add more other reloc types than R_ARM_ABS32,
6568 // we need to add check_non_pic(object, r_type) here.
6569 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
6570 output_section, data_shndx,
6571 reloc.get_r_offset());
6575 case elfcpp::R_ARM_REL32:
6576 case elfcpp::R_ARM_THM_CALL:
6577 case elfcpp::R_ARM_CALL:
6578 case elfcpp::R_ARM_PREL31:
6579 case elfcpp::R_ARM_JUMP24:
6580 case elfcpp::R_ARM_THM_JUMP24:
6581 case elfcpp::R_ARM_THM_JUMP19:
6582 case elfcpp::R_ARM_PLT32:
6583 case elfcpp::R_ARM_THM_ABS5:
6584 case elfcpp::R_ARM_ABS8:
6585 case elfcpp::R_ARM_ABS12:
6586 case elfcpp::R_ARM_ABS16:
6587 case elfcpp::R_ARM_BASE_ABS:
6588 case elfcpp::R_ARM_MOVW_ABS_NC:
6589 case elfcpp::R_ARM_MOVT_ABS:
6590 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6591 case elfcpp::R_ARM_THM_MOVT_ABS:
6592 case elfcpp::R_ARM_MOVW_PREL_NC:
6593 case elfcpp::R_ARM_MOVT_PREL:
6594 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
6595 case elfcpp::R_ARM_THM_MOVT_PREL:
6596 case elfcpp::R_ARM_MOVW_BREL_NC:
6597 case elfcpp::R_ARM_MOVT_BREL:
6598 case elfcpp::R_ARM_MOVW_BREL:
6599 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
6600 case elfcpp::R_ARM_THM_MOVT_BREL:
6601 case elfcpp::R_ARM_THM_MOVW_BREL:
6602 case elfcpp::R_ARM_THM_JUMP6:
6603 case elfcpp::R_ARM_THM_JUMP8:
6604 case elfcpp::R_ARM_THM_JUMP11:
6605 case elfcpp::R_ARM_V4BX:
6606 case elfcpp::R_ARM_THM_PC8:
6607 case elfcpp::R_ARM_THM_PC12:
6608 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
6609 case elfcpp::R_ARM_ALU_PC_G0_NC:
6610 case elfcpp::R_ARM_ALU_PC_G0:
6611 case elfcpp::R_ARM_ALU_PC_G1_NC:
6612 case elfcpp::R_ARM_ALU_PC_G1:
6613 case elfcpp::R_ARM_ALU_PC_G2:
6614 case elfcpp::R_ARM_ALU_SB_G0_NC:
6615 case elfcpp::R_ARM_ALU_SB_G0:
6616 case elfcpp::R_ARM_ALU_SB_G1_NC:
6617 case elfcpp::R_ARM_ALU_SB_G1:
6618 case elfcpp::R_ARM_ALU_SB_G2:
6619 case elfcpp::R_ARM_LDR_PC_G0:
6620 case elfcpp::R_ARM_LDR_PC_G1:
6621 case elfcpp::R_ARM_LDR_PC_G2:
6622 case elfcpp::R_ARM_LDR_SB_G0:
6623 case elfcpp::R_ARM_LDR_SB_G1:
6624 case elfcpp::R_ARM_LDR_SB_G2:
6625 case elfcpp::R_ARM_LDRS_PC_G0:
6626 case elfcpp::R_ARM_LDRS_PC_G1:
6627 case elfcpp::R_ARM_LDRS_PC_G2:
6628 case elfcpp::R_ARM_LDRS_SB_G0:
6629 case elfcpp::R_ARM_LDRS_SB_G1:
6630 case elfcpp::R_ARM_LDRS_SB_G2:
6631 case elfcpp::R_ARM_LDC_PC_G0:
6632 case elfcpp::R_ARM_LDC_PC_G1:
6633 case elfcpp::R_ARM_LDC_PC_G2:
6634 case elfcpp::R_ARM_LDC_SB_G0:
6635 case elfcpp::R_ARM_LDC_SB_G1:
6636 case elfcpp::R_ARM_LDC_SB_G2:
6639 case elfcpp::R_ARM_GOTOFF32:
6640 // We need a GOT section:
6641 target->got_section(symtab, layout);
6644 case elfcpp::R_ARM_BASE_PREL:
6645 // FIXME: What about this?
6648 case elfcpp::R_ARM_GOT_BREL:
6649 case elfcpp::R_ARM_GOT_PREL:
6651 // The symbol requires a GOT entry.
6652 Output_data_got<32, big_endian>* got =
6653 target->got_section(symtab, layout);
6654 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6655 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
6657 // If we are generating a shared object, we need to add a
6658 // dynamic RELATIVE relocation for this symbol's GOT entry.
6659 if (parameters->options().output_is_position_independent())
6661 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6662 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6663 rel_dyn->add_local_relative(
6664 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
6665 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
6671 case elfcpp::R_ARM_TARGET1:
6672 // This should have been mapped to another type already.
6674 case elfcpp::R_ARM_COPY:
6675 case elfcpp::R_ARM_GLOB_DAT:
6676 case elfcpp::R_ARM_JUMP_SLOT:
6677 case elfcpp::R_ARM_RELATIVE:
6678 // These are relocations which should only be seen by the
6679 // dynamic linker, and should never be seen here.
6680 gold_error(_("%s: unexpected reloc %u in object file"),
6681 object->name().c_str(), r_type);
6685 unsupported_reloc_local(object, r_type);
6690 // Report an unsupported relocation against a global symbol.
6692 template<bool big_endian>
6694 Target_arm<big_endian>::Scan::unsupported_reloc_global(
6695 Sized_relobj<32, big_endian>* object,
6696 unsigned int r_type,
6699 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
6700 object->name().c_str(), r_type, gsym->demangled_name().c_str());
6703 // Scan a relocation for a global symbol.
6704 // FIXME: This only handles a subset of relocation types used by Android
6705 // on ARM v5te devices.
6707 template<bool big_endian>
6709 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
6712 Sized_relobj<32, big_endian>* object,
6713 unsigned int data_shndx,
6714 Output_section* output_section,
6715 const elfcpp::Rel<32, big_endian>& reloc,
6716 unsigned int r_type,
6719 r_type = get_real_reloc_type(r_type);
6722 case elfcpp::R_ARM_NONE:
6725 case elfcpp::R_ARM_ABS32:
6726 case elfcpp::R_ARM_ABS32_NOI:
6728 // Make a dynamic relocation if necessary.
6729 if (gsym->needs_dynamic_reloc(Symbol::ABSOLUTE_REF))
6731 if (target->may_need_copy_reloc(gsym))
6733 target->copy_reloc(symtab, layout, object,
6734 data_shndx, output_section, gsym, reloc);
6736 else if (gsym->can_use_relative_reloc(false))
6738 // If we are to add more other reloc types than R_ARM_ABS32,
6739 // we need to add check_non_pic(object, r_type) here.
6740 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6741 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
6742 output_section, object,
6743 data_shndx, reloc.get_r_offset());
6747 // If we are to add more other reloc types than R_ARM_ABS32,
6748 // we need to add check_non_pic(object, r_type) here.
6749 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6750 rel_dyn->add_global(gsym, r_type, output_section, object,
6751 data_shndx, reloc.get_r_offset());
6757 case elfcpp::R_ARM_MOVW_ABS_NC:
6758 case elfcpp::R_ARM_MOVT_ABS:
6759 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6760 case elfcpp::R_ARM_THM_MOVT_ABS:
6761 case elfcpp::R_ARM_MOVW_PREL_NC:
6762 case elfcpp::R_ARM_MOVT_PREL:
6763 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
6764 case elfcpp::R_ARM_THM_MOVT_PREL:
6765 case elfcpp::R_ARM_MOVW_BREL_NC:
6766 case elfcpp::R_ARM_MOVT_BREL:
6767 case elfcpp::R_ARM_MOVW_BREL:
6768 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
6769 case elfcpp::R_ARM_THM_MOVT_BREL:
6770 case elfcpp::R_ARM_THM_MOVW_BREL:
6771 case elfcpp::R_ARM_THM_JUMP6:
6772 case elfcpp::R_ARM_THM_JUMP8:
6773 case elfcpp::R_ARM_THM_JUMP11:
6774 case elfcpp::R_ARM_V4BX:
6775 case elfcpp::R_ARM_THM_PC8:
6776 case elfcpp::R_ARM_THM_PC12:
6777 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
6778 case elfcpp::R_ARM_ALU_PC_G0_NC:
6779 case elfcpp::R_ARM_ALU_PC_G0:
6780 case elfcpp::R_ARM_ALU_PC_G1_NC:
6781 case elfcpp::R_ARM_ALU_PC_G1:
6782 case elfcpp::R_ARM_ALU_PC_G2:
6783 case elfcpp::R_ARM_ALU_SB_G0_NC:
6784 case elfcpp::R_ARM_ALU_SB_G0:
6785 case elfcpp::R_ARM_ALU_SB_G1_NC:
6786 case elfcpp::R_ARM_ALU_SB_G1:
6787 case elfcpp::R_ARM_ALU_SB_G2:
6788 case elfcpp::R_ARM_LDR_PC_G0:
6789 case elfcpp::R_ARM_LDR_PC_G1:
6790 case elfcpp::R_ARM_LDR_PC_G2:
6791 case elfcpp::R_ARM_LDR_SB_G0:
6792 case elfcpp::R_ARM_LDR_SB_G1:
6793 case elfcpp::R_ARM_LDR_SB_G2:
6794 case elfcpp::R_ARM_LDRS_PC_G0:
6795 case elfcpp::R_ARM_LDRS_PC_G1:
6796 case elfcpp::R_ARM_LDRS_PC_G2:
6797 case elfcpp::R_ARM_LDRS_SB_G0:
6798 case elfcpp::R_ARM_LDRS_SB_G1:
6799 case elfcpp::R_ARM_LDRS_SB_G2:
6800 case elfcpp::R_ARM_LDC_PC_G0:
6801 case elfcpp::R_ARM_LDC_PC_G1:
6802 case elfcpp::R_ARM_LDC_PC_G2:
6803 case elfcpp::R_ARM_LDC_SB_G0:
6804 case elfcpp::R_ARM_LDC_SB_G1:
6805 case elfcpp::R_ARM_LDC_SB_G2:
6808 case elfcpp::R_ARM_THM_ABS5:
6809 case elfcpp::R_ARM_ABS8:
6810 case elfcpp::R_ARM_ABS12:
6811 case elfcpp::R_ARM_ABS16:
6812 case elfcpp::R_ARM_BASE_ABS:
6814 // No dynamic relocs of this kinds.
6815 // Report the error in case of PIC.
6816 int flags = Symbol::NON_PIC_REF;
6817 if (gsym->type() == elfcpp::STT_FUNC
6818 || gsym->type() == elfcpp::STT_ARM_TFUNC)
6819 flags |= Symbol::FUNCTION_CALL;
6820 if (gsym->needs_dynamic_reloc(flags))
6821 check_non_pic(object, r_type);
6825 case elfcpp::R_ARM_REL32:
6827 // Make a dynamic relocation if necessary.
6828 int flags = Symbol::NON_PIC_REF;
6829 if (gsym->needs_dynamic_reloc(flags))
6831 if (target->may_need_copy_reloc(gsym))
6833 target->copy_reloc(symtab, layout, object,
6834 data_shndx, output_section, gsym, reloc);
6838 check_non_pic(object, r_type);
6839 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6840 rel_dyn->add_global(gsym, r_type, output_section, object,
6841 data_shndx, reloc.get_r_offset());
6847 case elfcpp::R_ARM_JUMP24:
6848 case elfcpp::R_ARM_THM_JUMP24:
6849 case elfcpp::R_ARM_THM_JUMP19:
6850 case elfcpp::R_ARM_CALL:
6851 case elfcpp::R_ARM_THM_CALL:
6852 case elfcpp::R_ARM_PLT32:
6853 case elfcpp::R_ARM_PREL31:
6854 case elfcpp::R_ARM_PC24:
6855 // If the symbol is fully resolved, this is just a relative
6856 // local reloc. Otherwise we need a PLT entry.
6857 if (gsym->final_value_is_known())
6859 // If building a shared library, we can also skip the PLT entry
6860 // if the symbol is defined in the output file and is protected
6862 if (gsym->is_defined()
6863 && !gsym->is_from_dynobj()
6864 && !gsym->is_preemptible())
6866 target->make_plt_entry(symtab, layout, gsym);
6869 case elfcpp::R_ARM_GOTOFF32:
6870 // We need a GOT section.
6871 target->got_section(symtab, layout);
6874 case elfcpp::R_ARM_BASE_PREL:
6875 // FIXME: What about this?
6878 case elfcpp::R_ARM_GOT_BREL:
6879 case elfcpp::R_ARM_GOT_PREL:
6881 // The symbol requires a GOT entry.
6882 Output_data_got<32, big_endian>* got =
6883 target->got_section(symtab, layout);
6884 if (gsym->final_value_is_known())
6885 got->add_global(gsym, GOT_TYPE_STANDARD);
6888 // If this symbol is not fully resolved, we need to add a
6889 // GOT entry with a dynamic relocation.
6890 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6891 if (gsym->is_from_dynobj()
6892 || gsym->is_undefined()
6893 || gsym->is_preemptible())
6894 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
6895 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
6898 if (got->add_global(gsym, GOT_TYPE_STANDARD))
6899 rel_dyn->add_global_relative(
6900 gsym, elfcpp::R_ARM_RELATIVE, got,
6901 gsym->got_offset(GOT_TYPE_STANDARD));
6907 case elfcpp::R_ARM_TARGET1:
6908 // This should have been mapped to another type already.
6910 case elfcpp::R_ARM_COPY:
6911 case elfcpp::R_ARM_GLOB_DAT:
6912 case elfcpp::R_ARM_JUMP_SLOT:
6913 case elfcpp::R_ARM_RELATIVE:
6914 // These are relocations which should only be seen by the
6915 // dynamic linker, and should never be seen here.
6916 gold_error(_("%s: unexpected reloc %u in object file"),
6917 object->name().c_str(), r_type);
6921 unsupported_reloc_global(object, r_type, gsym);
6926 // Process relocations for gc.
6928 template<bool big_endian>
6930 Target_arm<big_endian>::gc_process_relocs(Symbol_table* symtab,
6932 Sized_relobj<32, big_endian>* object,
6933 unsigned int data_shndx,
6935 const unsigned char* prelocs,
6937 Output_section* output_section,
6938 bool needs_special_offset_handling,
6939 size_t local_symbol_count,
6940 const unsigned char* plocal_symbols)
6942 typedef Target_arm<big_endian> Arm;
6943 typedef typename Target_arm<big_endian>::Scan Scan;
6945 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan>(
6954 needs_special_offset_handling,
6959 // Scan relocations for a section.
6961 template<bool big_endian>
6963 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
6965 Sized_relobj<32, big_endian>* object,
6966 unsigned int data_shndx,
6967 unsigned int sh_type,
6968 const unsigned char* prelocs,
6970 Output_section* output_section,
6971 bool needs_special_offset_handling,
6972 size_t local_symbol_count,
6973 const unsigned char* plocal_symbols)
6975 typedef typename Target_arm<big_endian>::Scan Scan;
6976 if (sh_type == elfcpp::SHT_RELA)
6978 gold_error(_("%s: unsupported RELA reloc section"),
6979 object->name().c_str());
6983 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
6992 needs_special_offset_handling,
6997 // Finalize the sections.
6999 template<bool big_endian>
7001 Target_arm<big_endian>::do_finalize_sections(
7003 const Input_objects* input_objects,
7004 Symbol_table* symtab)
7006 // Merge processor-specific flags.
7007 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
7008 p != input_objects->relobj_end();
7011 Arm_relobj<big_endian>* arm_relobj =
7012 Arm_relobj<big_endian>::as_arm_relobj(*p);
7013 this->merge_processor_specific_flags(
7015 arm_relobj->processor_specific_flags());
7016 this->merge_object_attributes(arm_relobj->name().c_str(),
7017 arm_relobj->attributes_section_data());
7021 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
7022 p != input_objects->dynobj_end();
7025 Arm_dynobj<big_endian>* arm_dynobj =
7026 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
7027 this->merge_processor_specific_flags(
7029 arm_dynobj->processor_specific_flags());
7030 this->merge_object_attributes(arm_dynobj->name().c_str(),
7031 arm_dynobj->attributes_section_data());
7035 const Object_attribute* cpu_arch_attr =
7036 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
7037 if (cpu_arch_attr->int_value() > elfcpp::TAG_CPU_ARCH_V4)
7038 this->set_may_use_blx(true);
7040 // Check if we need to use Cortex-A8 workaround.
7041 if (parameters->options().user_set_fix_cortex_a8())
7042 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
7045 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
7046 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
7048 const Object_attribute* cpu_arch_profile_attr =
7049 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
7050 this->fix_cortex_a8_ =
7051 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
7052 && (cpu_arch_profile_attr->int_value() == 'A'
7053 || cpu_arch_profile_attr->int_value() == 0));
7056 // Check if we can use V4BX interworking.
7057 // The V4BX interworking stub contains BX instruction,
7058 // which is not specified for some profiles.
7059 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
7060 && !this->may_use_blx())
7061 gold_error(_("unable to provide V4BX reloc interworking fix up; "
7062 "the target profile does not support BX instruction"));
7064 // Fill in some more dynamic tags.
7065 const Reloc_section* rel_plt = (this->plt_ == NULL
7067 : this->plt_->rel_plt());
7068 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
7069 this->rel_dyn_, true);
7071 // Emit any relocs we saved in an attempt to avoid generating COPY
7073 if (this->copy_relocs_.any_saved_relocs())
7074 this->copy_relocs_.emit(this->rel_dyn_section(layout));
7076 // Handle the .ARM.exidx section.
7077 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
7078 if (exidx_section != NULL
7079 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX
7080 && !parameters->options().relocatable())
7082 // Create __exidx_start and __exdix_end symbols.
7083 symtab->define_in_output_data("__exidx_start", NULL,
7084 Symbol_table::PREDEFINED,
7085 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7086 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7088 symtab->define_in_output_data("__exidx_end", NULL,
7089 Symbol_table::PREDEFINED,
7090 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7091 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7094 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
7095 // the .ARM.exidx section.
7096 if (!layout->script_options()->saw_phdrs_clause())
7098 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, 0)
7100 Output_segment* exidx_segment =
7101 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
7102 exidx_segment->add_output_section(exidx_section, elfcpp::PF_R,
7107 // Create an .ARM.attributes section if there is not one already.
7108 Output_attributes_section_data* attributes_section =
7109 new Output_attributes_section_data(*this->attributes_section_data_);
7110 layout->add_output_section_data(".ARM.attributes",
7111 elfcpp::SHT_ARM_ATTRIBUTES, 0,
7112 attributes_section, false, false, false,
7116 // Return whether a direct absolute static relocation needs to be applied.
7117 // In cases where Scan::local() or Scan::global() has created
7118 // a dynamic relocation other than R_ARM_RELATIVE, the addend
7119 // of the relocation is carried in the data, and we must not
7120 // apply the static relocation.
7122 template<bool big_endian>
7124 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
7125 const Sized_symbol<32>* gsym,
7128 Output_section* output_section)
7130 // If the output section is not allocated, then we didn't call
7131 // scan_relocs, we didn't create a dynamic reloc, and we must apply
7133 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
7136 // For local symbols, we will have created a non-RELATIVE dynamic
7137 // relocation only if (a) the output is position independent,
7138 // (b) the relocation is absolute (not pc- or segment-relative), and
7139 // (c) the relocation is not 32 bits wide.
7141 return !(parameters->options().output_is_position_independent()
7142 && (ref_flags & Symbol::ABSOLUTE_REF)
7145 // For global symbols, we use the same helper routines used in the
7146 // scan pass. If we did not create a dynamic relocation, or if we
7147 // created a RELATIVE dynamic relocation, we should apply the static
7149 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
7150 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
7151 && gsym->can_use_relative_reloc(ref_flags
7152 & Symbol::FUNCTION_CALL);
7153 return !has_dyn || is_rel;
7156 // Perform a relocation.
7158 template<bool big_endian>
7160 Target_arm<big_endian>::Relocate::relocate(
7161 const Relocate_info<32, big_endian>* relinfo,
7163 Output_section *output_section,
7165 const elfcpp::Rel<32, big_endian>& rel,
7166 unsigned int r_type,
7167 const Sized_symbol<32>* gsym,
7168 const Symbol_value<32>* psymval,
7169 unsigned char* view,
7170 Arm_address address,
7171 section_size_type /* view_size */ )
7173 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
7175 r_type = get_real_reloc_type(r_type);
7176 const Arm_reloc_property* reloc_property =
7177 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
7178 if (reloc_property == NULL)
7180 std::string reloc_name =
7181 arm_reloc_property_table->reloc_name_in_error_message(r_type);
7182 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7183 _("cannot relocate %s in object file"),
7184 reloc_name.c_str());
7188 const Arm_relobj<big_endian>* object =
7189 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
7191 // If the final branch target of a relocation is THUMB instruction, this
7192 // is 1. Otherwise it is 0.
7193 Arm_address thumb_bit = 0;
7194 Symbol_value<32> symval;
7195 bool is_weakly_undefined_without_plt = false;
7196 if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
7200 // This is a global symbol. Determine if we use PLT and if the
7201 // final target is THUMB.
7202 if (gsym->use_plt_offset(reloc_is_non_pic(r_type)))
7204 // This uses a PLT, change the symbol value.
7205 symval.set_output_value(target->plt_section()->address()
7206 + gsym->plt_offset());
7209 else if (gsym->is_weak_undefined())
7211 // This is a weakly undefined symbol and we do not use PLT
7212 // for this relocation. A branch targeting this symbol will
7213 // be converted into an NOP.
7214 is_weakly_undefined_without_plt = true;
7218 // Set thumb bit if symbol:
7219 // -Has type STT_ARM_TFUNC or
7220 // -Has type STT_FUNC, is defined and with LSB in value set.
7222 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
7223 || (gsym->type() == elfcpp::STT_FUNC
7224 && !gsym->is_undefined()
7225 && ((psymval->value(object, 0) & 1) != 0)))
7232 // This is a local symbol. Determine if the final target is THUMB.
7233 // We saved this information when all the local symbols were read.
7234 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
7235 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
7236 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
7241 // This is a fake relocation synthesized for a stub. It does not have
7242 // a real symbol. We just look at the LSB of the symbol value to
7243 // determine if the target is THUMB or not.
7244 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
7247 // Strip LSB if this points to a THUMB target.
7249 && reloc_property->uses_thumb_bit()
7250 && ((psymval->value(object, 0) & 1) != 0))
7252 Arm_address stripped_value =
7253 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
7254 symval.set_output_value(stripped_value);
7258 // Get the GOT offset if needed.
7259 // The GOT pointer points to the end of the GOT section.
7260 // We need to subtract the size of the GOT section to get
7261 // the actual offset to use in the relocation.
7262 bool have_got_offset = false;
7263 unsigned int got_offset = 0;
7266 case elfcpp::R_ARM_GOT_BREL:
7267 case elfcpp::R_ARM_GOT_PREL:
7270 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
7271 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
7272 - target->got_size());
7276 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7277 gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_STANDARD));
7278 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
7279 - target->got_size());
7281 have_got_offset = true;
7288 // To look up relocation stubs, we need to pass the symbol table index of
7290 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7292 // Get the addressing origin of the output segment defining the
7293 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
7294 Arm_address sym_origin = 0;
7295 if (reloc_property->uses_symbol_base())
7297 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
7298 // R_ARM_BASE_ABS with the NULL symbol will give the
7299 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
7300 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
7301 sym_origin = target->got_plt_section()->address();
7302 else if (gsym == NULL)
7304 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
7305 sym_origin = gsym->output_segment()->vaddr();
7306 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
7307 sym_origin = gsym->output_data()->address();
7309 // TODO: Assumes the segment base to be zero for the global symbols
7310 // till the proper support for the segment-base-relative addressing
7311 // will be implemented. This is consistent with GNU ld.
7314 // For relative addressing relocation, find out the relative address base.
7315 Arm_address relative_address_base = 0;
7316 switch(reloc_property->relative_address_base())
7318 case Arm_reloc_property::RAB_NONE:
7320 case Arm_reloc_property::RAB_B_S:
7321 relative_address_base = sym_origin;
7323 case Arm_reloc_property::RAB_GOT_ORG:
7324 relative_address_base = target->got_plt_section()->address();
7326 case Arm_reloc_property::RAB_P:
7327 relative_address_base = address;
7329 case Arm_reloc_property::RAB_Pa:
7330 relative_address_base = address & 0xfffffffcU;
7336 typename Arm_relocate_functions::Status reloc_status =
7337 Arm_relocate_functions::STATUS_OKAY;
7338 bool check_overflow = reloc_property->checks_overflow();
7341 case elfcpp::R_ARM_NONE:
7344 case elfcpp::R_ARM_ABS8:
7345 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7347 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
7350 case elfcpp::R_ARM_ABS12:
7351 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7353 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
7356 case elfcpp::R_ARM_ABS16:
7357 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7359 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
7362 case elfcpp::R_ARM_ABS32:
7363 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7365 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7369 case elfcpp::R_ARM_ABS32_NOI:
7370 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7372 // No thumb bit for this relocation: (S + A)
7373 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7377 case elfcpp::R_ARM_MOVW_ABS_NC:
7378 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7380 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
7384 gold_error(_("relocation R_ARM_MOVW_ABS_NC cannot be used when making"
7385 "a shared object; recompile with -fPIC"));
7388 case elfcpp::R_ARM_MOVT_ABS:
7389 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7391 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
7393 gold_error(_("relocation R_ARM_MOVT_ABS cannot be used when making"
7394 "a shared object; recompile with -fPIC"));
7397 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7398 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7400 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
7401 0, thumb_bit, false);
7403 gold_error(_("relocation R_ARM_THM_MOVW_ABS_NC cannot be used when"
7404 "making a shared object; recompile with -fPIC"));
7407 case elfcpp::R_ARM_THM_MOVT_ABS:
7408 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7410 reloc_status = Arm_relocate_functions::thm_movt(view, object,
7413 gold_error(_("relocation R_ARM_THM_MOVT_ABS cannot be used when"
7414 "making a shared object; recompile with -fPIC"));
7417 case elfcpp::R_ARM_MOVW_PREL_NC:
7418 case elfcpp::R_ARM_MOVW_BREL_NC:
7419 case elfcpp::R_ARM_MOVW_BREL:
7421 Arm_relocate_functions::movw(view, object, psymval,
7422 relative_address_base, thumb_bit,
7426 case elfcpp::R_ARM_MOVT_PREL:
7427 case elfcpp::R_ARM_MOVT_BREL:
7429 Arm_relocate_functions::movt(view, object, psymval,
7430 relative_address_base);
7433 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7434 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7435 case elfcpp::R_ARM_THM_MOVW_BREL:
7437 Arm_relocate_functions::thm_movw(view, object, psymval,
7438 relative_address_base,
7439 thumb_bit, check_overflow);
7442 case elfcpp::R_ARM_THM_MOVT_PREL:
7443 case elfcpp::R_ARM_THM_MOVT_BREL:
7445 Arm_relocate_functions::thm_movt(view, object, psymval,
7446 relative_address_base);
7449 case elfcpp::R_ARM_REL32:
7450 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7451 address, thumb_bit);
7454 case elfcpp::R_ARM_THM_ABS5:
7455 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7457 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
7460 // Thumb long branches.
7461 case elfcpp::R_ARM_THM_CALL:
7462 case elfcpp::R_ARM_THM_XPC22:
7463 case elfcpp::R_ARM_THM_JUMP24:
7465 Arm_relocate_functions::thumb_branch_common(
7466 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7467 thumb_bit, is_weakly_undefined_without_plt);
7470 case elfcpp::R_ARM_GOTOFF32:
7472 Arm_address got_origin;
7473 got_origin = target->got_plt_section()->address();
7474 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7475 got_origin, thumb_bit);
7479 case elfcpp::R_ARM_BASE_PREL:
7480 gold_assert(gsym != NULL);
7482 Arm_relocate_functions::base_prel(view, sym_origin, address);
7485 case elfcpp::R_ARM_BASE_ABS:
7487 if (!should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7491 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
7495 case elfcpp::R_ARM_GOT_BREL:
7496 gold_assert(have_got_offset);
7497 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
7500 case elfcpp::R_ARM_GOT_PREL:
7501 gold_assert(have_got_offset);
7502 // Get the address origin for GOT PLT, which is allocated right
7503 // after the GOT section, to calculate an absolute address of
7504 // the symbol GOT entry (got_origin + got_offset).
7505 Arm_address got_origin;
7506 got_origin = target->got_plt_section()->address();
7507 reloc_status = Arm_relocate_functions::got_prel(view,
7508 got_origin + got_offset,
7512 case elfcpp::R_ARM_PLT32:
7513 case elfcpp::R_ARM_CALL:
7514 case elfcpp::R_ARM_JUMP24:
7515 case elfcpp::R_ARM_XPC25:
7516 gold_assert(gsym == NULL
7517 || gsym->has_plt_offset()
7518 || gsym->final_value_is_known()
7519 || (gsym->is_defined()
7520 && !gsym->is_from_dynobj()
7521 && !gsym->is_preemptible()));
7523 Arm_relocate_functions::arm_branch_common(
7524 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7525 thumb_bit, is_weakly_undefined_without_plt);
7528 case elfcpp::R_ARM_THM_JUMP19:
7530 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
7534 case elfcpp::R_ARM_THM_JUMP6:
7536 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
7539 case elfcpp::R_ARM_THM_JUMP8:
7541 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
7544 case elfcpp::R_ARM_THM_JUMP11:
7546 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
7549 case elfcpp::R_ARM_PREL31:
7550 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
7551 address, thumb_bit);
7554 case elfcpp::R_ARM_V4BX:
7555 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
7557 const bool is_v4bx_interworking =
7558 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
7560 Arm_relocate_functions::v4bx(relinfo, view, object, address,
7561 is_v4bx_interworking);
7565 case elfcpp::R_ARM_THM_PC8:
7567 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
7570 case elfcpp::R_ARM_THM_PC12:
7572 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
7575 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7577 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
7581 case elfcpp::R_ARM_ALU_PC_G0_NC:
7582 case elfcpp::R_ARM_ALU_PC_G0:
7583 case elfcpp::R_ARM_ALU_PC_G1_NC:
7584 case elfcpp::R_ARM_ALU_PC_G1:
7585 case elfcpp::R_ARM_ALU_PC_G2:
7586 case elfcpp::R_ARM_ALU_SB_G0_NC:
7587 case elfcpp::R_ARM_ALU_SB_G0:
7588 case elfcpp::R_ARM_ALU_SB_G1_NC:
7589 case elfcpp::R_ARM_ALU_SB_G1:
7590 case elfcpp::R_ARM_ALU_SB_G2:
7592 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
7593 reloc_property->group_index(),
7594 relative_address_base,
7595 thumb_bit, check_overflow);
7598 case elfcpp::R_ARM_LDR_PC_G0:
7599 case elfcpp::R_ARM_LDR_PC_G1:
7600 case elfcpp::R_ARM_LDR_PC_G2:
7601 case elfcpp::R_ARM_LDR_SB_G0:
7602 case elfcpp::R_ARM_LDR_SB_G1:
7603 case elfcpp::R_ARM_LDR_SB_G2:
7605 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
7606 reloc_property->group_index(),
7607 relative_address_base);
7610 case elfcpp::R_ARM_LDRS_PC_G0:
7611 case elfcpp::R_ARM_LDRS_PC_G1:
7612 case elfcpp::R_ARM_LDRS_PC_G2:
7613 case elfcpp::R_ARM_LDRS_SB_G0:
7614 case elfcpp::R_ARM_LDRS_SB_G1:
7615 case elfcpp::R_ARM_LDRS_SB_G2:
7617 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
7618 reloc_property->group_index(),
7619 relative_address_base);
7622 case elfcpp::R_ARM_LDC_PC_G0:
7623 case elfcpp::R_ARM_LDC_PC_G1:
7624 case elfcpp::R_ARM_LDC_PC_G2:
7625 case elfcpp::R_ARM_LDC_SB_G0:
7626 case elfcpp::R_ARM_LDC_SB_G1:
7627 case elfcpp::R_ARM_LDC_SB_G2:
7629 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
7630 reloc_property->group_index(),
7631 relative_address_base);
7638 // Report any errors.
7639 switch (reloc_status)
7641 case Arm_relocate_functions::STATUS_OKAY:
7643 case Arm_relocate_functions::STATUS_OVERFLOW:
7644 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7645 _("relocation overflow in relocation %u"),
7648 case Arm_relocate_functions::STATUS_BAD_RELOC:
7649 gold_error_at_location(
7653 _("unexpected opcode while processing relocation %u"),
7663 // Relocate section data.
7665 template<bool big_endian>
7667 Target_arm<big_endian>::relocate_section(
7668 const Relocate_info<32, big_endian>* relinfo,
7669 unsigned int sh_type,
7670 const unsigned char* prelocs,
7672 Output_section* output_section,
7673 bool needs_special_offset_handling,
7674 unsigned char* view,
7675 Arm_address address,
7676 section_size_type view_size,
7677 const Reloc_symbol_changes* reloc_symbol_changes)
7679 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
7680 gold_assert(sh_type == elfcpp::SHT_REL);
7682 // See if we are relocating a relaxed input section. If so, the view
7683 // covers the whole output section and we need to adjust accordingly.
7684 if (needs_special_offset_handling)
7686 const Output_relaxed_input_section* poris =
7687 output_section->find_relaxed_input_section(relinfo->object,
7688 relinfo->data_shndx);
7691 Arm_address section_address = poris->address();
7692 section_size_type section_size = poris->data_size();
7694 gold_assert((section_address >= address)
7695 && ((section_address + section_size)
7696 <= (address + view_size)));
7698 off_t offset = section_address - address;
7701 view_size = section_size;
7705 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
7712 needs_special_offset_handling,
7716 reloc_symbol_changes);
7719 // Return the size of a relocation while scanning during a relocatable
7722 template<bool big_endian>
7724 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
7725 unsigned int r_type,
7728 r_type = get_real_reloc_type(r_type);
7729 const Arm_reloc_property* arp =
7730 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
7735 std::string reloc_name =
7736 arm_reloc_property_table->reloc_name_in_error_message(r_type);
7737 gold_error(_("%s: unexpected %s in object file"),
7738 object->name().c_str(), reloc_name.c_str());
7743 // Scan the relocs during a relocatable link.
7745 template<bool big_endian>
7747 Target_arm<big_endian>::scan_relocatable_relocs(
7748 Symbol_table* symtab,
7750 Sized_relobj<32, big_endian>* object,
7751 unsigned int data_shndx,
7752 unsigned int sh_type,
7753 const unsigned char* prelocs,
7755 Output_section* output_section,
7756 bool needs_special_offset_handling,
7757 size_t local_symbol_count,
7758 const unsigned char* plocal_symbols,
7759 Relocatable_relocs* rr)
7761 gold_assert(sh_type == elfcpp::SHT_REL);
7763 typedef gold::Default_scan_relocatable_relocs<elfcpp::SHT_REL,
7764 Relocatable_size_for_reloc> Scan_relocatable_relocs;
7766 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
7767 Scan_relocatable_relocs>(
7775 needs_special_offset_handling,
7781 // Relocate a section during a relocatable link.
7783 template<bool big_endian>
7785 Target_arm<big_endian>::relocate_for_relocatable(
7786 const Relocate_info<32, big_endian>* relinfo,
7787 unsigned int sh_type,
7788 const unsigned char* prelocs,
7790 Output_section* output_section,
7791 off_t offset_in_output_section,
7792 const Relocatable_relocs* rr,
7793 unsigned char* view,
7794 Arm_address view_address,
7795 section_size_type view_size,
7796 unsigned char* reloc_view,
7797 section_size_type reloc_view_size)
7799 gold_assert(sh_type == elfcpp::SHT_REL);
7801 gold::relocate_for_relocatable<32, big_endian, elfcpp::SHT_REL>(
7806 offset_in_output_section,
7815 // Return the value to use for a dynamic symbol which requires special
7816 // treatment. This is how we support equality comparisons of function
7817 // pointers across shared library boundaries, as described in the
7818 // processor specific ABI supplement.
7820 template<bool big_endian>
7822 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
7824 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
7825 return this->plt_section()->address() + gsym->plt_offset();
7828 // Map platform-specific relocs to real relocs
7830 template<bool big_endian>
7832 Target_arm<big_endian>::get_real_reloc_type (unsigned int r_type)
7836 case elfcpp::R_ARM_TARGET1:
7837 // This is either R_ARM_ABS32 or R_ARM_REL32;
7838 return elfcpp::R_ARM_ABS32;
7840 case elfcpp::R_ARM_TARGET2:
7841 // This can be any reloc type but ususally is R_ARM_GOT_PREL
7842 return elfcpp::R_ARM_GOT_PREL;
7849 // Whether if two EABI versions V1 and V2 are compatible.
7851 template<bool big_endian>
7853 Target_arm<big_endian>::are_eabi_versions_compatible(
7854 elfcpp::Elf_Word v1,
7855 elfcpp::Elf_Word v2)
7857 // v4 and v5 are the same spec before and after it was released,
7858 // so allow mixing them.
7859 if ((v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
7860 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
7866 // Combine FLAGS from an input object called NAME and the processor-specific
7867 // flags in the ELF header of the output. Much of this is adapted from the
7868 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
7869 // in bfd/elf32-arm.c.
7871 template<bool big_endian>
7873 Target_arm<big_endian>::merge_processor_specific_flags(
7874 const std::string& name,
7875 elfcpp::Elf_Word flags)
7877 if (this->are_processor_specific_flags_set())
7879 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
7881 // Nothing to merge if flags equal to those in output.
7882 if (flags == out_flags)
7885 // Complain about various flag mismatches.
7886 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
7887 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
7888 if (!this->are_eabi_versions_compatible(version1, version2))
7889 gold_error(_("Source object %s has EABI version %d but output has "
7890 "EABI version %d."),
7892 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
7893 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
7897 // If the input is the default architecture and had the default
7898 // flags then do not bother setting the flags for the output
7899 // architecture, instead allow future merges to do this. If no
7900 // future merges ever set these flags then they will retain their
7901 // uninitialised values, which surprise surprise, correspond
7902 // to the default values.
7906 // This is the first time, just copy the flags.
7907 // We only copy the EABI version for now.
7908 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
7912 // Adjust ELF file header.
7913 template<bool big_endian>
7915 Target_arm<big_endian>::do_adjust_elf_header(
7916 unsigned char* view,
7919 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
7921 elfcpp::Ehdr<32, big_endian> ehdr(view);
7922 unsigned char e_ident[elfcpp::EI_NIDENT];
7923 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
7925 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
7926 == elfcpp::EF_ARM_EABI_UNKNOWN)
7927 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
7929 e_ident[elfcpp::EI_OSABI] = 0;
7930 e_ident[elfcpp::EI_ABIVERSION] = 0;
7932 // FIXME: Do EF_ARM_BE8 adjustment.
7934 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
7935 oehdr.put_e_ident(e_ident);
7938 // do_make_elf_object to override the same function in the base class.
7939 // We need to use a target-specific sub-class of Sized_relobj<32, big_endian>
7940 // to store ARM specific information. Hence we need to have our own
7941 // ELF object creation.
7943 template<bool big_endian>
7945 Target_arm<big_endian>::do_make_elf_object(
7946 const std::string& name,
7947 Input_file* input_file,
7948 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
7950 int et = ehdr.get_e_type();
7951 if (et == elfcpp::ET_REL)
7953 Arm_relobj<big_endian>* obj =
7954 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
7958 else if (et == elfcpp::ET_DYN)
7960 Sized_dynobj<32, big_endian>* obj =
7961 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
7967 gold_error(_("%s: unsupported ELF file type %d"),
7973 // Read the architecture from the Tag_also_compatible_with attribute, if any.
7974 // Returns -1 if no architecture could be read.
7975 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
7977 template<bool big_endian>
7979 Target_arm<big_endian>::get_secondary_compatible_arch(
7980 const Attributes_section_data* pasd)
7982 const Object_attribute *known_attributes =
7983 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
7985 // Note: the tag and its argument below are uleb128 values, though
7986 // currently-defined values fit in one byte for each.
7987 const std::string& sv =
7988 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
7990 && sv.data()[0] == elfcpp::Tag_CPU_arch
7991 && (sv.data()[1] & 128) != 128)
7992 return sv.data()[1];
7994 // This tag is "safely ignorable", so don't complain if it looks funny.
7998 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
7999 // The tag is removed if ARCH is -1.
8000 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
8002 template<bool big_endian>
8004 Target_arm<big_endian>::set_secondary_compatible_arch(
8005 Attributes_section_data* pasd,
8008 Object_attribute *known_attributes =
8009 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
8013 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
8017 // Note: the tag and its argument below are uleb128 values, though
8018 // currently-defined values fit in one byte for each.
8020 sv[0] = elfcpp::Tag_CPU_arch;
8021 gold_assert(arch != 0);
8025 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
8028 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8030 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
8032 template<bool big_endian>
8034 Target_arm<big_endian>::tag_cpu_arch_combine(
8037 int* secondary_compat_out,
8039 int secondary_compat)
8041 #define T(X) elfcpp::TAG_CPU_ARCH_##X
8042 static const int v6t2[] =
8054 static const int v6k[] =
8067 static const int v7[] =
8081 static const int v6_m[] =
8096 static const int v6s_m[] =
8112 static const int v7e_m[] =
8129 static const int v4t_plus_v6_m[] =
8145 T(V4T_PLUS_V6_M) // V4T plus V6_M.
8147 static const int *comb[] =
8155 // Pseudo-architecture.
8159 // Check we've not got a higher architecture than we know about.
8161 if (oldtag >= elfcpp::MAX_TAG_CPU_ARCH || newtag >= elfcpp::MAX_TAG_CPU_ARCH)
8163 gold_error(_("%s: unknown CPU architecture"), name);
8167 // Override old tag if we have a Tag_also_compatible_with on the output.
8169 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
8170 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
8171 oldtag = T(V4T_PLUS_V6_M);
8173 // And override the new tag if we have a Tag_also_compatible_with on the
8176 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
8177 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
8178 newtag = T(V4T_PLUS_V6_M);
8180 // Architectures before V6KZ add features monotonically.
8181 int tagh = std::max(oldtag, newtag);
8182 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
8185 int tagl = std::min(oldtag, newtag);
8186 int result = comb[tagh - T(V6T2)][tagl];
8188 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8189 // as the canonical version.
8190 if (result == T(V4T_PLUS_V6_M))
8193 *secondary_compat_out = T(V6_M);
8196 *secondary_compat_out = -1;
8200 gold_error(_("%s: conflicting CPU architectures %d/%d"),
8201 name, oldtag, newtag);
8209 // Helper to print AEABI enum tag value.
8211 template<bool big_endian>
8213 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
8215 static const char *aeabi_enum_names[] =
8216 { "", "variable-size", "32-bit", "" };
8217 const size_t aeabi_enum_names_size =
8218 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
8220 if (value < aeabi_enum_names_size)
8221 return std::string(aeabi_enum_names[value]);
8225 sprintf(buffer, "<unknown value %u>", value);
8226 return std::string(buffer);
8230 // Return the string value to store in TAG_CPU_name.
8232 template<bool big_endian>
8234 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
8236 static const char *name_table[] = {
8237 // These aren't real CPU names, but we can't guess
8238 // that from the architecture version alone.
8254 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
8256 if (value < name_table_size)
8257 return std::string(name_table[value]);
8261 sprintf(buffer, "<unknown CPU value %u>", value);
8262 return std::string(buffer);
8266 // Merge object attributes from input file called NAME with those of the
8267 // output. The input object attributes are in the object pointed by PASD.
8269 template<bool big_endian>
8271 Target_arm<big_endian>::merge_object_attributes(
8273 const Attributes_section_data* pasd)
8275 // Return if there is no attributes section data.
8279 // If output has no object attributes, just copy.
8280 if (this->attributes_section_data_ == NULL)
8282 this->attributes_section_data_ = new Attributes_section_data(*pasd);
8286 const int vendor = Object_attribute::OBJ_ATTR_PROC;
8287 const Object_attribute* in_attr = pasd->known_attributes(vendor);
8288 Object_attribute* out_attr =
8289 this->attributes_section_data_->known_attributes(vendor);
8291 // This needs to happen before Tag_ABI_FP_number_model is merged. */
8292 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
8293 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
8295 // Ignore mismatches if the object doesn't use floating point. */
8296 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0)
8297 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
8298 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
8299 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0)
8300 gold_error(_("%s uses VFP register arguments, output does not"),
8304 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
8306 // Merge this attribute with existing attributes.
8309 case elfcpp::Tag_CPU_raw_name:
8310 case elfcpp::Tag_CPU_name:
8311 // These are merged after Tag_CPU_arch.
8314 case elfcpp::Tag_ABI_optimization_goals:
8315 case elfcpp::Tag_ABI_FP_optimization_goals:
8316 // Use the first value seen.
8319 case elfcpp::Tag_CPU_arch:
8321 unsigned int saved_out_attr = out_attr->int_value();
8322 // Merge Tag_CPU_arch and Tag_also_compatible_with.
8323 int secondary_compat =
8324 this->get_secondary_compatible_arch(pasd);
8325 int secondary_compat_out =
8326 this->get_secondary_compatible_arch(
8327 this->attributes_section_data_);
8328 out_attr[i].set_int_value(
8329 tag_cpu_arch_combine(name, out_attr[i].int_value(),
8330 &secondary_compat_out,
8331 in_attr[i].int_value(),
8333 this->set_secondary_compatible_arch(this->attributes_section_data_,
8334 secondary_compat_out);
8336 // Merge Tag_CPU_name and Tag_CPU_raw_name.
8337 if (out_attr[i].int_value() == saved_out_attr)
8338 ; // Leave the names alone.
8339 else if (out_attr[i].int_value() == in_attr[i].int_value())
8341 // The output architecture has been changed to match the
8342 // input architecture. Use the input names.
8343 out_attr[elfcpp::Tag_CPU_name].set_string_value(
8344 in_attr[elfcpp::Tag_CPU_name].string_value());
8345 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
8346 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
8350 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
8351 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
8354 // If we still don't have a value for Tag_CPU_name,
8355 // make one up now. Tag_CPU_raw_name remains blank.
8356 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
8358 const std::string cpu_name =
8359 this->tag_cpu_name_value(out_attr[i].int_value());
8360 // FIXME: If we see an unknown CPU, this will be set
8361 // to "<unknown CPU n>", where n is the attribute value.
8362 // This is different from BFD, which leaves the name alone.
8363 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
8368 case elfcpp::Tag_ARM_ISA_use:
8369 case elfcpp::Tag_THUMB_ISA_use:
8370 case elfcpp::Tag_WMMX_arch:
8371 case elfcpp::Tag_Advanced_SIMD_arch:
8372 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
8373 case elfcpp::Tag_ABI_FP_rounding:
8374 case elfcpp::Tag_ABI_FP_exceptions:
8375 case elfcpp::Tag_ABI_FP_user_exceptions:
8376 case elfcpp::Tag_ABI_FP_number_model:
8377 case elfcpp::Tag_VFP_HP_extension:
8378 case elfcpp::Tag_CPU_unaligned_access:
8379 case elfcpp::Tag_T2EE_use:
8380 case elfcpp::Tag_Virtualization_use:
8381 case elfcpp::Tag_MPextension_use:
8382 // Use the largest value specified.
8383 if (in_attr[i].int_value() > out_attr[i].int_value())
8384 out_attr[i].set_int_value(in_attr[i].int_value());
8387 case elfcpp::Tag_ABI_align8_preserved:
8388 case elfcpp::Tag_ABI_PCS_RO_data:
8389 // Use the smallest value specified.
8390 if (in_attr[i].int_value() < out_attr[i].int_value())
8391 out_attr[i].set_int_value(in_attr[i].int_value());
8394 case elfcpp::Tag_ABI_align8_needed:
8395 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
8396 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
8397 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
8400 // This error message should be enabled once all non-conformant
8401 // binaries in the toolchain have had the attributes set
8403 // gold_error(_("output 8-byte data alignment conflicts with %s"),
8407 case elfcpp::Tag_ABI_FP_denormal:
8408 case elfcpp::Tag_ABI_PCS_GOT_use:
8410 // These tags have 0 = don't care, 1 = strong requirement,
8411 // 2 = weak requirement.
8412 static const int order_021[3] = {0, 2, 1};
8414 // Use the "greatest" from the sequence 0, 2, 1, or the largest
8415 // value if greater than 2 (for future-proofing).
8416 if ((in_attr[i].int_value() > 2
8417 && in_attr[i].int_value() > out_attr[i].int_value())
8418 || (in_attr[i].int_value() <= 2
8419 && out_attr[i].int_value() <= 2
8420 && (order_021[in_attr[i].int_value()]
8421 > order_021[out_attr[i].int_value()])))
8422 out_attr[i].set_int_value(in_attr[i].int_value());
8426 case elfcpp::Tag_CPU_arch_profile:
8427 if (out_attr[i].int_value() != in_attr[i].int_value())
8429 // 0 will merge with anything.
8430 // 'A' and 'S' merge to 'A'.
8431 // 'R' and 'S' merge to 'R'.
8432 // 'M' and 'A|R|S' is an error.
8433 if (out_attr[i].int_value() == 0
8434 || (out_attr[i].int_value() == 'S'
8435 && (in_attr[i].int_value() == 'A'
8436 || in_attr[i].int_value() == 'R')))
8437 out_attr[i].set_int_value(in_attr[i].int_value());
8438 else if (in_attr[i].int_value() == 0
8439 || (in_attr[i].int_value() == 'S'
8440 && (out_attr[i].int_value() == 'A'
8441 || out_attr[i].int_value() == 'R')))
8446 (_("conflicting architecture profiles %c/%c"),
8447 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
8448 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
8452 case elfcpp::Tag_VFP_arch:
8469 // Values greater than 6 aren't defined, so just pick the
8471 if (in_attr[i].int_value() > 6
8472 && in_attr[i].int_value() > out_attr[i].int_value())
8474 *out_attr = *in_attr;
8477 // The output uses the superset of input features
8478 // (ISA version) and registers.
8479 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
8480 vfp_versions[out_attr[i].int_value()].ver);
8481 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
8482 vfp_versions[out_attr[i].int_value()].regs);
8483 // This assumes all possible supersets are also a valid
8486 for (newval = 6; newval > 0; newval--)
8488 if (regs == vfp_versions[newval].regs
8489 && ver == vfp_versions[newval].ver)
8492 out_attr[i].set_int_value(newval);
8495 case elfcpp::Tag_PCS_config:
8496 if (out_attr[i].int_value() == 0)
8497 out_attr[i].set_int_value(in_attr[i].int_value());
8498 else if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8500 // It's sometimes ok to mix different configs, so this is only
8502 gold_warning(_("%s: conflicting platform configuration"), name);
8505 case elfcpp::Tag_ABI_PCS_R9_use:
8506 if (in_attr[i].int_value() != out_attr[i].int_value()
8507 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
8508 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused)
8510 gold_error(_("%s: conflicting use of R9"), name);
8512 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
8513 out_attr[i].set_int_value(in_attr[i].int_value());
8515 case elfcpp::Tag_ABI_PCS_RW_data:
8516 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
8517 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8518 != elfcpp::AEABI_R9_SB)
8519 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8520 != elfcpp::AEABI_R9_unused))
8522 gold_error(_("%s: SB relative addressing conflicts with use "
8526 // Use the smallest value specified.
8527 if (in_attr[i].int_value() < out_attr[i].int_value())
8528 out_attr[i].set_int_value(in_attr[i].int_value());
8530 case elfcpp::Tag_ABI_PCS_wchar_t:
8531 // FIXME: Make it possible to turn off this warning.
8532 if (out_attr[i].int_value()
8533 && in_attr[i].int_value()
8534 && out_attr[i].int_value() != in_attr[i].int_value())
8536 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
8537 "use %u-byte wchar_t; use of wchar_t values "
8538 "across objects may fail"),
8539 name, in_attr[i].int_value(),
8540 out_attr[i].int_value());
8542 else if (in_attr[i].int_value() && !out_attr[i].int_value())
8543 out_attr[i].set_int_value(in_attr[i].int_value());
8545 case elfcpp::Tag_ABI_enum_size:
8546 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
8548 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
8549 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
8551 // The existing object is compatible with anything.
8552 // Use whatever requirements the new object has.
8553 out_attr[i].set_int_value(in_attr[i].int_value());
8555 // FIXME: Make it possible to turn off this warning.
8556 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
8557 && out_attr[i].int_value() != in_attr[i].int_value())
8559 unsigned int in_value = in_attr[i].int_value();
8560 unsigned int out_value = out_attr[i].int_value();
8561 gold_warning(_("%s uses %s enums yet the output is to use "
8562 "%s enums; use of enum values across objects "
8565 this->aeabi_enum_name(in_value).c_str(),
8566 this->aeabi_enum_name(out_value).c_str());
8570 case elfcpp::Tag_ABI_VFP_args:
8573 case elfcpp::Tag_ABI_WMMX_args:
8574 if (in_attr[i].int_value() != out_attr[i].int_value())
8576 gold_error(_("%s uses iWMMXt register arguments, output does "
8581 case Object_attribute::Tag_compatibility:
8582 // Merged in target-independent code.
8584 case elfcpp::Tag_ABI_HardFP_use:
8585 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
8586 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
8587 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
8588 out_attr[i].set_int_value(3);
8589 else if (in_attr[i].int_value() > out_attr[i].int_value())
8590 out_attr[i].set_int_value(in_attr[i].int_value());
8592 case elfcpp::Tag_ABI_FP_16bit_format:
8593 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8595 if (in_attr[i].int_value() != out_attr[i].int_value())
8596 gold_error(_("fp16 format mismatch between %s and output"),
8599 if (in_attr[i].int_value() != 0)
8600 out_attr[i].set_int_value(in_attr[i].int_value());
8603 case elfcpp::Tag_nodefaults:
8604 // This tag is set if it exists, but the value is unused (and is
8605 // typically zero). We don't actually need to do anything here -
8606 // the merge happens automatically when the type flags are merged
8609 case elfcpp::Tag_also_compatible_with:
8610 // Already done in Tag_CPU_arch.
8612 case elfcpp::Tag_conformance:
8613 // Keep the attribute if it matches. Throw it away otherwise.
8614 // No attribute means no claim to conform.
8615 if (in_attr[i].string_value() != out_attr[i].string_value())
8616 out_attr[i].set_string_value("");
8621 const char* err_object = NULL;
8623 // The "known_obj_attributes" table does contain some undefined
8624 // attributes. Ensure that there are unused.
8625 if (out_attr[i].int_value() != 0
8626 || out_attr[i].string_value() != "")
8627 err_object = "output";
8628 else if (in_attr[i].int_value() != 0
8629 || in_attr[i].string_value() != "")
8632 if (err_object != NULL)
8634 // Attribute numbers >=64 (mod 128) can be safely ignored.
8636 gold_error(_("%s: unknown mandatory EABI object attribute "
8640 gold_warning(_("%s: unknown EABI object attribute %d"),
8644 // Only pass on attributes that match in both inputs.
8645 if (!in_attr[i].matches(out_attr[i]))
8647 out_attr[i].set_int_value(0);
8648 out_attr[i].set_string_value("");
8653 // If out_attr was copied from in_attr then it won't have a type yet.
8654 if (in_attr[i].type() && !out_attr[i].type())
8655 out_attr[i].set_type(in_attr[i].type());
8658 // Merge Tag_compatibility attributes and any common GNU ones.
8659 this->attributes_section_data_->merge(name, pasd);
8661 // Check for any attributes not known on ARM.
8662 typedef Vendor_object_attributes::Other_attributes Other_attributes;
8663 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
8664 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
8665 Other_attributes* out_other_attributes =
8666 this->attributes_section_data_->other_attributes(vendor);
8667 Other_attributes::iterator out_iter = out_other_attributes->begin();
8669 while (in_iter != in_other_attributes->end()
8670 || out_iter != out_other_attributes->end())
8672 const char* err_object = NULL;
8675 // The tags for each list are in numerical order.
8676 // If the tags are equal, then merge.
8677 if (out_iter != out_other_attributes->end()
8678 && (in_iter == in_other_attributes->end()
8679 || in_iter->first > out_iter->first))
8681 // This attribute only exists in output. We can't merge, and we
8682 // don't know what the tag means, so delete it.
8683 err_object = "output";
8684 err_tag = out_iter->first;
8685 int saved_tag = out_iter->first;
8686 delete out_iter->second;
8687 out_other_attributes->erase(out_iter);
8688 out_iter = out_other_attributes->upper_bound(saved_tag);
8690 else if (in_iter != in_other_attributes->end()
8691 && (out_iter != out_other_attributes->end()
8692 || in_iter->first < out_iter->first))
8694 // This attribute only exists in input. We can't merge, and we
8695 // don't know what the tag means, so ignore it.
8697 err_tag = in_iter->first;
8700 else // The tags are equal.
8702 // As present, all attributes in the list are unknown, and
8703 // therefore can't be merged meaningfully.
8704 err_object = "output";
8705 err_tag = out_iter->first;
8707 // Only pass on attributes that match in both inputs.
8708 if (!in_iter->second->matches(*(out_iter->second)))
8710 // No match. Delete the attribute.
8711 int saved_tag = out_iter->first;
8712 delete out_iter->second;
8713 out_other_attributes->erase(out_iter);
8714 out_iter = out_other_attributes->upper_bound(saved_tag);
8718 // Matched. Keep the attribute and move to the next.
8726 // Attribute numbers >=64 (mod 128) can be safely ignored. */
8727 if ((err_tag & 127) < 64)
8729 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
8730 err_object, err_tag);
8734 gold_warning(_("%s: unknown EABI object attribute %d"),
8735 err_object, err_tag);
8741 // Stub-generation methods for Target_arm.
8743 // Make a new Arm_input_section object.
8745 template<bool big_endian>
8746 Arm_input_section<big_endian>*
8747 Target_arm<big_endian>::new_arm_input_section(
8751 Section_id sid(relobj, shndx);
8753 Arm_input_section<big_endian>* arm_input_section =
8754 new Arm_input_section<big_endian>(relobj, shndx);
8755 arm_input_section->init();
8757 // Register new Arm_input_section in map for look-up.
8758 std::pair<typename Arm_input_section_map::iterator, bool> ins =
8759 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
8761 // Make sure that it we have not created another Arm_input_section
8762 // for this input section already.
8763 gold_assert(ins.second);
8765 return arm_input_section;
8768 // Find the Arm_input_section object corresponding to the SHNDX-th input
8769 // section of RELOBJ.
8771 template<bool big_endian>
8772 Arm_input_section<big_endian>*
8773 Target_arm<big_endian>::find_arm_input_section(
8775 unsigned int shndx) const
8777 Section_id sid(relobj, shndx);
8778 typename Arm_input_section_map::const_iterator p =
8779 this->arm_input_section_map_.find(sid);
8780 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
8783 // Make a new stub table.
8785 template<bool big_endian>
8786 Stub_table<big_endian>*
8787 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
8789 Stub_table<big_endian>* stub_table =
8790 new Stub_table<big_endian>(owner);
8791 this->stub_tables_.push_back(stub_table);
8793 stub_table->set_address(owner->address() + owner->data_size());
8794 stub_table->set_file_offset(owner->offset() + owner->data_size());
8795 stub_table->finalize_data_size();
8800 // Scan a relocation for stub generation.
8802 template<bool big_endian>
8804 Target_arm<big_endian>::scan_reloc_for_stub(
8805 const Relocate_info<32, big_endian>* relinfo,
8806 unsigned int r_type,
8807 const Sized_symbol<32>* gsym,
8809 const Symbol_value<32>* psymval,
8810 elfcpp::Elf_types<32>::Elf_Swxword addend,
8811 Arm_address address)
8813 typedef typename Target_arm<big_endian>::Relocate Relocate;
8815 const Arm_relobj<big_endian>* arm_relobj =
8816 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
8818 if (r_type == elfcpp::R_ARM_V4BX)
8820 const uint32_t reg = (addend & 0xf);
8821 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8824 // Try looking up an existing stub from a stub table.
8825 Stub_table<big_endian>* stub_table =
8826 arm_relobj->stub_table(relinfo->data_shndx);
8827 gold_assert(stub_table != NULL);
8829 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
8831 // create a new stub and add it to stub table.
8832 Arm_v4bx_stub* stub =
8833 this->stub_factory().make_arm_v4bx_stub(reg);
8834 gold_assert(stub != NULL);
8835 stub_table->add_arm_v4bx_stub(stub);
8842 bool target_is_thumb;
8843 Symbol_value<32> symval;
8846 // This is a global symbol. Determine if we use PLT and if the
8847 // final target is THUMB.
8848 if (gsym->use_plt_offset(Relocate::reloc_is_non_pic(r_type)))
8850 // This uses a PLT, change the symbol value.
8851 symval.set_output_value(this->plt_section()->address()
8852 + gsym->plt_offset());
8854 target_is_thumb = false;
8856 else if (gsym->is_undefined())
8857 // There is no need to generate a stub symbol is undefined.
8862 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
8863 || (gsym->type() == elfcpp::STT_FUNC
8864 && !gsym->is_undefined()
8865 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
8870 // This is a local symbol. Determine if the final target is THUMB.
8871 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
8874 // Strip LSB if this points to a THUMB target.
8875 const Arm_reloc_property* reloc_property =
8876 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
8877 gold_assert(reloc_property != NULL);
8879 && reloc_property->uses_thumb_bit()
8880 && ((psymval->value(arm_relobj, 0) & 1) != 0))
8882 Arm_address stripped_value =
8883 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
8884 symval.set_output_value(stripped_value);
8888 // Get the symbol value.
8889 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
8891 // Owing to pipelining, the PC relative branches below actually skip
8892 // two instructions when the branch offset is 0.
8893 Arm_address destination;
8896 case elfcpp::R_ARM_CALL:
8897 case elfcpp::R_ARM_JUMP24:
8898 case elfcpp::R_ARM_PLT32:
8900 destination = value + addend + 8;
8902 case elfcpp::R_ARM_THM_CALL:
8903 case elfcpp::R_ARM_THM_XPC22:
8904 case elfcpp::R_ARM_THM_JUMP24:
8905 case elfcpp::R_ARM_THM_JUMP19:
8907 destination = value + addend + 4;
8913 Reloc_stub* stub = NULL;
8914 Stub_type stub_type =
8915 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
8917 if (stub_type != arm_stub_none)
8919 // Try looking up an existing stub from a stub table.
8920 Stub_table<big_endian>* stub_table =
8921 arm_relobj->stub_table(relinfo->data_shndx);
8922 gold_assert(stub_table != NULL);
8924 // Locate stub by destination.
8925 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
8927 // Create a stub if there is not one already
8928 stub = stub_table->find_reloc_stub(stub_key);
8931 // create a new stub and add it to stub table.
8932 stub = this->stub_factory().make_reloc_stub(stub_type);
8933 stub_table->add_reloc_stub(stub, stub_key);
8936 // Record the destination address.
8937 stub->set_destination_address(destination
8938 | (target_is_thumb ? 1 : 0));
8941 // For Cortex-A8, we need to record a relocation at 4K page boundary.
8942 if (this->fix_cortex_a8_
8943 && (r_type == elfcpp::R_ARM_THM_JUMP24
8944 || r_type == elfcpp::R_ARM_THM_JUMP19
8945 || r_type == elfcpp::R_ARM_THM_CALL
8946 || r_type == elfcpp::R_ARM_THM_XPC22)
8947 && (address & 0xfffU) == 0xffeU)
8949 // Found a candidate. Note we haven't checked the destination is
8950 // within 4K here: if we do so (and don't create a record) we can't
8951 // tell that a branch should have been relocated when scanning later.
8952 this->cortex_a8_relocs_info_[address] =
8953 new Cortex_a8_reloc(stub, r_type,
8954 destination | (target_is_thumb ? 1 : 0));
8958 // This function scans a relocation sections for stub generation.
8959 // The template parameter Relocate must be a class type which provides
8960 // a single function, relocate(), which implements the machine
8961 // specific part of a relocation.
8963 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
8964 // SHT_REL or SHT_RELA.
8966 // PRELOCS points to the relocation data. RELOC_COUNT is the number
8967 // of relocs. OUTPUT_SECTION is the output section.
8968 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
8969 // mapped to output offsets.
8971 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
8972 // VIEW_SIZE is the size. These refer to the input section, unless
8973 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
8974 // the output section.
8976 template<bool big_endian>
8977 template<int sh_type>
8979 Target_arm<big_endian>::scan_reloc_section_for_stubs(
8980 const Relocate_info<32, big_endian>* relinfo,
8981 const unsigned char* prelocs,
8983 Output_section* output_section,
8984 bool needs_special_offset_handling,
8985 const unsigned char* view,
8986 elfcpp::Elf_types<32>::Elf_Addr view_address,
8989 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
8990 const int reloc_size =
8991 Reloc_types<sh_type, 32, big_endian>::reloc_size;
8993 Arm_relobj<big_endian>* arm_object =
8994 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
8995 unsigned int local_count = arm_object->local_symbol_count();
8997 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
8999 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
9001 Reltype reloc(prelocs);
9003 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
9004 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9005 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
9007 r_type = this->get_real_reloc_type(r_type);
9009 // Only a few relocation types need stubs.
9010 if ((r_type != elfcpp::R_ARM_CALL)
9011 && (r_type != elfcpp::R_ARM_JUMP24)
9012 && (r_type != elfcpp::R_ARM_PLT32)
9013 && (r_type != elfcpp::R_ARM_THM_CALL)
9014 && (r_type != elfcpp::R_ARM_THM_XPC22)
9015 && (r_type != elfcpp::R_ARM_THM_JUMP24)
9016 && (r_type != elfcpp::R_ARM_THM_JUMP19)
9017 && (r_type != elfcpp::R_ARM_V4BX))
9020 section_offset_type offset =
9021 convert_to_section_size_type(reloc.get_r_offset());
9023 if (needs_special_offset_handling)
9025 offset = output_section->output_offset(relinfo->object,
9026 relinfo->data_shndx,
9032 if (r_type == elfcpp::R_ARM_V4BX)
9034 // Get the BX instruction.
9035 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
9036 const Valtype* wv = reinterpret_cast<const Valtype*>(view + offset);
9037 elfcpp::Elf_types<32>::Elf_Swxword insn =
9038 elfcpp::Swap<32, big_endian>::readval(wv);
9039 this->scan_reloc_for_stub(relinfo, r_type, NULL, 0, NULL,
9045 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
9046 elfcpp::Elf_types<32>::Elf_Swxword addend =
9047 stub_addend_reader(r_type, view + offset, reloc);
9049 const Sized_symbol<32>* sym;
9051 Symbol_value<32> symval;
9052 const Symbol_value<32> *psymval;
9053 if (r_sym < local_count)
9056 psymval = arm_object->local_symbol(r_sym);
9058 // If the local symbol belongs to a section we are discarding,
9059 // and that section is a debug section, try to find the
9060 // corresponding kept section and map this symbol to its
9061 // counterpart in the kept section. The symbol must not
9062 // correspond to a section we are folding.
9064 unsigned int shndx = psymval->input_shndx(&is_ordinary);
9066 && shndx != elfcpp::SHN_UNDEF
9067 && !arm_object->is_section_included(shndx)
9068 && !(relinfo->symtab->is_section_folded(arm_object, shndx)))
9070 if (comdat_behavior == CB_UNDETERMINED)
9073 arm_object->section_name(relinfo->data_shndx);
9074 comdat_behavior = get_comdat_behavior(name.c_str());
9076 if (comdat_behavior == CB_PRETEND)
9079 typename elfcpp::Elf_types<32>::Elf_Addr value =
9080 arm_object->map_to_kept_section(shndx, &found);
9082 symval.set_output_value(value + psymval->input_value());
9084 symval.set_output_value(0);
9088 symval.set_output_value(0);
9090 symval.set_no_output_symtab_entry();
9096 const Symbol* gsym = arm_object->global_symbol(r_sym);
9097 gold_assert(gsym != NULL);
9098 if (gsym->is_forwarder())
9099 gsym = relinfo->symtab->resolve_forwards(gsym);
9101 sym = static_cast<const Sized_symbol<32>*>(gsym);
9102 if (sym->has_symtab_index())
9103 symval.set_output_symtab_index(sym->symtab_index());
9105 symval.set_no_output_symtab_entry();
9107 // We need to compute the would-be final value of this global
9109 const Symbol_table* symtab = relinfo->symtab;
9110 const Sized_symbol<32>* sized_symbol =
9111 symtab->get_sized_symbol<32>(gsym);
9112 Symbol_table::Compute_final_value_status status;
9114 symtab->compute_final_value<32>(sized_symbol, &status);
9116 // Skip this if the symbol has not output section.
9117 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
9120 symval.set_output_value(value);
9124 // If symbol is a section symbol, we don't know the actual type of
9125 // destination. Give up.
9126 if (psymval->is_section_symbol())
9129 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
9130 addend, view_address + offset);
9134 // Scan an input section for stub generation.
9136 template<bool big_endian>
9138 Target_arm<big_endian>::scan_section_for_stubs(
9139 const Relocate_info<32, big_endian>* relinfo,
9140 unsigned int sh_type,
9141 const unsigned char* prelocs,
9143 Output_section* output_section,
9144 bool needs_special_offset_handling,
9145 const unsigned char* view,
9146 Arm_address view_address,
9147 section_size_type view_size)
9149 if (sh_type == elfcpp::SHT_REL)
9150 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
9155 needs_special_offset_handling,
9159 else if (sh_type == elfcpp::SHT_RELA)
9160 // We do not support RELA type relocations yet. This is provided for
9162 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
9167 needs_special_offset_handling,
9175 // Group input sections for stub generation.
9177 // We goup input sections in an output sections so that the total size,
9178 // including any padding space due to alignment is smaller than GROUP_SIZE
9179 // unless the only input section in group is bigger than GROUP_SIZE already.
9180 // Then an ARM stub table is created to follow the last input section
9181 // in group. For each group an ARM stub table is created an is placed
9182 // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further
9183 // extend the group after the stub table.
9185 template<bool big_endian>
9187 Target_arm<big_endian>::group_sections(
9189 section_size_type group_size,
9190 bool stubs_always_after_branch)
9192 // Group input sections and insert stub table
9193 Layout::Section_list section_list;
9194 layout->get_allocated_sections(§ion_list);
9195 for (Layout::Section_list::const_iterator p = section_list.begin();
9196 p != section_list.end();
9199 Arm_output_section<big_endian>* output_section =
9200 Arm_output_section<big_endian>::as_arm_output_section(*p);
9201 output_section->group_sections(group_size, stubs_always_after_branch,
9206 // Relaxation hook. This is where we do stub generation.
9208 template<bool big_endian>
9210 Target_arm<big_endian>::do_relax(
9212 const Input_objects* input_objects,
9213 Symbol_table* symtab,
9216 // No need to generate stubs if this is a relocatable link.
9217 gold_assert(!parameters->options().relocatable());
9219 // If this is the first pass, we need to group input sections into
9221 bool done_exidx_fixup = false;
9224 // Determine the stub group size. The group size is the absolute
9225 // value of the parameter --stub-group-size. If --stub-group-size
9226 // is passed a negative value, we restict stubs to be always after
9227 // the stubbed branches.
9228 int32_t stub_group_size_param =
9229 parameters->options().stub_group_size();
9230 bool stubs_always_after_branch = stub_group_size_param < 0;
9231 section_size_type stub_group_size = abs(stub_group_size_param);
9233 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
9234 // page as the first half of a 32-bit branch straddling two 4K pages.
9235 // This is a crude way of enforcing that.
9236 if (this->fix_cortex_a8_)
9237 stubs_always_after_branch = true;
9239 if (stub_group_size == 1)
9242 // Thumb branch range is +-4MB has to be used as the default
9243 // maximum size (a given section can contain both ARM and Thumb
9244 // code, so the worst case has to be taken into account).
9246 // This value is 24K less than that, which allows for 2025
9247 // 12-byte stubs. If we exceed that, then we will fail to link.
9248 // The user will have to relink with an explicit group size
9250 stub_group_size = 4170000;
9253 group_sections(layout, stub_group_size, stubs_always_after_branch);
9255 // Also fix .ARM.exidx section coverage.
9256 Output_section* os = layout->find_output_section(".ARM.exidx");
9257 if (os != NULL && os->type() == elfcpp::SHT_ARM_EXIDX)
9259 Arm_output_section<big_endian>* exidx_output_section =
9260 Arm_output_section<big_endian>::as_arm_output_section(os);
9261 this->fix_exidx_coverage(layout, exidx_output_section, symtab);
9262 done_exidx_fixup = true;
9266 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
9267 // beginning of each relaxation pass, just blow away all the stubs.
9268 // Alternatively, we could selectively remove only the stubs and reloc
9269 // information for code sections that have moved since the last pass.
9270 // That would require more book-keeping.
9271 typedef typename Stub_table_list::iterator Stub_table_iterator;
9272 if (this->fix_cortex_a8_)
9274 // Clear all Cortex-A8 reloc information.
9275 for (typename Cortex_a8_relocs_info::const_iterator p =
9276 this->cortex_a8_relocs_info_.begin();
9277 p != this->cortex_a8_relocs_info_.end();
9280 this->cortex_a8_relocs_info_.clear();
9282 // Remove all Cortex-A8 stubs.
9283 for (Stub_table_iterator sp = this->stub_tables_.begin();
9284 sp != this->stub_tables_.end();
9286 (*sp)->remove_all_cortex_a8_stubs();
9289 // Scan relocs for relocation stubs
9290 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9291 op != input_objects->relobj_end();
9294 Arm_relobj<big_endian>* arm_relobj =
9295 Arm_relobj<big_endian>::as_arm_relobj(*op);
9296 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
9299 // Check all stub tables to see if any of them have their data sizes
9300 // or addresses alignments changed. These are the only things that
9302 bool any_stub_table_changed = false;
9303 Unordered_set<const Output_section*> sections_needing_adjustment;
9304 for (Stub_table_iterator sp = this->stub_tables_.begin();
9305 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9308 if ((*sp)->update_data_size_and_addralign())
9310 // Update data size of stub table owner.
9311 Arm_input_section<big_endian>* owner = (*sp)->owner();
9312 uint64_t address = owner->address();
9313 off_t offset = owner->offset();
9314 owner->reset_address_and_file_offset();
9315 owner->set_address_and_file_offset(address, offset);
9317 sections_needing_adjustment.insert(owner->output_section());
9318 any_stub_table_changed = true;
9322 // Output_section_data::output_section() returns a const pointer but we
9323 // need to update output sections, so we record all output sections needing
9324 // update above and scan the sections here to find out what sections need
9326 for(Layout::Section_list::const_iterator p = layout->section_list().begin();
9327 p != layout->section_list().end();
9330 if (sections_needing_adjustment.find(*p)
9331 != sections_needing_adjustment.end())
9332 (*p)->set_section_offsets_need_adjustment();
9335 // Stop relaxation if no EXIDX fix-up and no stub table change.
9336 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
9338 // Finalize the stubs in the last relaxation pass.
9339 if (!continue_relaxation)
9341 for (Stub_table_iterator sp = this->stub_tables_.begin();
9342 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9344 (*sp)->finalize_stubs();
9346 // Update output local symbol counts of objects if necessary.
9347 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9348 op != input_objects->relobj_end();
9351 Arm_relobj<big_endian>* arm_relobj =
9352 Arm_relobj<big_endian>::as_arm_relobj(*op);
9354 // Update output local symbol counts. We need to discard local
9355 // symbols defined in parts of input sections that are discarded by
9357 if (arm_relobj->output_local_symbol_count_needs_update())
9358 arm_relobj->update_output_local_symbol_count();
9362 return continue_relaxation;
9367 template<bool big_endian>
9369 Target_arm<big_endian>::relocate_stub(
9371 const Relocate_info<32, big_endian>* relinfo,
9372 Output_section* output_section,
9373 unsigned char* view,
9374 Arm_address address,
9375 section_size_type view_size)
9378 const Stub_template* stub_template = stub->stub_template();
9379 for (size_t i = 0; i < stub_template->reloc_count(); i++)
9381 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
9382 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
9384 unsigned int r_type = insn->r_type();
9385 section_size_type reloc_offset = stub_template->reloc_offset(i);
9386 section_size_type reloc_size = insn->size();
9387 gold_assert(reloc_offset + reloc_size <= view_size);
9389 // This is the address of the stub destination.
9390 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
9391 Symbol_value<32> symval;
9392 symval.set_output_value(target);
9394 // Synthesize a fake reloc just in case. We don't have a symbol so
9396 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
9397 memset(reloc_buffer, 0, sizeof(reloc_buffer));
9398 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
9399 reloc_write.put_r_offset(reloc_offset);
9400 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
9401 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
9403 relocate.relocate(relinfo, this, output_section,
9404 this->fake_relnum_for_stubs, rel, r_type,
9405 NULL, &symval, view + reloc_offset,
9406 address + reloc_offset, reloc_size);
9410 // Determine whether an object attribute tag takes an integer, a
9413 template<bool big_endian>
9415 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
9417 if (tag == Object_attribute::Tag_compatibility)
9418 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9419 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
9420 else if (tag == elfcpp::Tag_nodefaults)
9421 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9422 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
9423 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
9424 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
9426 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
9428 return ((tag & 1) != 0
9429 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
9430 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
9433 // Reorder attributes.
9435 // The ABI defines that Tag_conformance should be emitted first, and that
9436 // Tag_nodefaults should be second (if either is defined). This sets those
9437 // two positions, and bumps up the position of all the remaining tags to
9440 template<bool big_endian>
9442 Target_arm<big_endian>::do_attributes_order(int num) const
9444 // Reorder the known object attributes in output. We want to move
9445 // Tag_conformance to position 4 and Tag_conformance to position 5
9446 // and shift eveything between 4 .. Tag_conformance - 1 to make room.
9448 return elfcpp::Tag_conformance;
9450 return elfcpp::Tag_nodefaults;
9451 if ((num - 2) < elfcpp::Tag_nodefaults)
9453 if ((num - 1) < elfcpp::Tag_conformance)
9458 // Scan a span of THUMB code for Cortex-A8 erratum.
9460 template<bool big_endian>
9462 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
9463 Arm_relobj<big_endian>* arm_relobj,
9465 section_size_type span_start,
9466 section_size_type span_end,
9467 const unsigned char* view,
9468 Arm_address address)
9470 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
9472 // The opcode is BLX.W, BL.W, B.W, Bcc.W
9473 // The branch target is in the same 4KB region as the
9474 // first half of the branch.
9475 // The instruction before the branch is a 32-bit
9476 // length non-branch instruction.
9477 section_size_type i = span_start;
9478 bool last_was_32bit = false;
9479 bool last_was_branch = false;
9480 while (i < span_end)
9482 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
9483 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
9484 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
9485 bool is_blx = false, is_b = false;
9486 bool is_bl = false, is_bcc = false;
9488 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
9491 // Load the rest of the insn (in manual-friendly order).
9492 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
9494 // Encoding T4: B<c>.W.
9495 is_b = (insn & 0xf800d000U) == 0xf0009000U;
9496 // Encoding T1: BL<c>.W.
9497 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
9498 // Encoding T2: BLX<c>.W.
9499 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
9500 // Encoding T3: B<c>.W (not permitted in IT block).
9501 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
9502 && (insn & 0x07f00000U) != 0x03800000U);
9505 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
9507 // If this instruction is a 32-bit THUMB branch that crosses a 4K
9508 // page boundary and it follows 32-bit non-branch instruction,
9509 // we need to work around.
9511 && ((address + i) & 0xfffU) == 0xffeU
9513 && !last_was_branch)
9515 // Check to see if there is a relocation stub for this branch.
9516 bool force_target_arm = false;
9517 bool force_target_thumb = false;
9518 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
9519 Cortex_a8_relocs_info::const_iterator p =
9520 this->cortex_a8_relocs_info_.find(address + i);
9522 if (p != this->cortex_a8_relocs_info_.end())
9524 cortex_a8_reloc = p->second;
9525 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
9527 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9528 && !target_is_thumb)
9529 force_target_arm = true;
9530 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9532 force_target_thumb = true;
9536 Stub_type stub_type = arm_stub_none;
9538 // Check if we have an offending branch instruction.
9539 uint16_t upper_insn = (insn >> 16) & 0xffffU;
9540 uint16_t lower_insn = insn & 0xffffU;
9541 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
9543 if (cortex_a8_reloc != NULL
9544 && cortex_a8_reloc->reloc_stub() != NULL)
9545 // We've already made a stub for this instruction, e.g.
9546 // it's a long branch or a Thumb->ARM stub. Assume that
9547 // stub will suffice to work around the A8 erratum (see
9548 // setting of always_after_branch above).
9552 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
9554 stub_type = arm_stub_a8_veneer_b_cond;
9556 else if (is_b || is_bl || is_blx)
9558 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
9564 ? arm_stub_a8_veneer_blx
9566 ? arm_stub_a8_veneer_bl
9567 : arm_stub_a8_veneer_b));
9570 if (stub_type != arm_stub_none)
9572 Arm_address pc_for_insn = address + i + 4;
9574 // The original instruction is a BL, but the target is
9575 // an ARM instruction. If we were not making a stub,
9576 // the BL would have been converted to a BLX. Use the
9577 // BLX stub instead in that case.
9578 if (this->may_use_blx() && force_target_arm
9579 && stub_type == arm_stub_a8_veneer_bl)
9581 stub_type = arm_stub_a8_veneer_blx;
9585 // Conversely, if the original instruction was
9586 // BLX but the target is Thumb mode, use the BL stub.
9587 else if (force_target_thumb
9588 && stub_type == arm_stub_a8_veneer_blx)
9590 stub_type = arm_stub_a8_veneer_bl;
9598 // If we found a relocation, use the proper destination,
9599 // not the offset in the (unrelocated) instruction.
9600 // Note this is always done if we switched the stub type above.
9601 if (cortex_a8_reloc != NULL)
9602 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
9604 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
9606 // Add a new stub if destination address in in the same page.
9607 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
9609 Cortex_a8_stub* stub =
9610 this->stub_factory_.make_cortex_a8_stub(stub_type,
9614 Stub_table<big_endian>* stub_table =
9615 arm_relobj->stub_table(shndx);
9616 gold_assert(stub_table != NULL);
9617 stub_table->add_cortex_a8_stub(address + i, stub);
9622 i += insn_32bit ? 4 : 2;
9623 last_was_32bit = insn_32bit;
9624 last_was_branch = is_32bit_branch;
9628 // Apply the Cortex-A8 workaround.
9630 template<bool big_endian>
9632 Target_arm<big_endian>::apply_cortex_a8_workaround(
9633 const Cortex_a8_stub* stub,
9634 Arm_address stub_address,
9635 unsigned char* insn_view,
9636 Arm_address insn_address)
9638 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
9639 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
9640 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
9641 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
9642 off_t branch_offset = stub_address - (insn_address + 4);
9644 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
9645 switch (stub->stub_template()->type())
9647 case arm_stub_a8_veneer_b_cond:
9648 gold_assert(!utils::has_overflow<21>(branch_offset));
9649 upper_insn = RelocFuncs::thumb32_cond_branch_upper(upper_insn,
9651 lower_insn = RelocFuncs::thumb32_cond_branch_lower(lower_insn,
9655 case arm_stub_a8_veneer_b:
9656 case arm_stub_a8_veneer_bl:
9657 case arm_stub_a8_veneer_blx:
9658 if ((lower_insn & 0x5000U) == 0x4000U)
9659 // For a BLX instruction, make sure that the relocation is
9660 // rounded up to a word boundary. This follows the semantics of
9661 // the instruction which specifies that bit 1 of the target
9662 // address will come from bit 1 of the base address.
9663 branch_offset = (branch_offset + 2) & ~3;
9665 // Put BRANCH_OFFSET back into the insn.
9666 gold_assert(!utils::has_overflow<25>(branch_offset));
9667 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
9668 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
9675 // Put the relocated value back in the object file:
9676 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
9677 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
9680 template<bool big_endian>
9681 class Target_selector_arm : public Target_selector
9684 Target_selector_arm()
9685 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
9686 (big_endian ? "elf32-bigarm" : "elf32-littlearm"))
9690 do_instantiate_target()
9691 { return new Target_arm<big_endian>(); }
9694 // Fix .ARM.exidx section coverage.
9696 template<bool big_endian>
9698 Target_arm<big_endian>::fix_exidx_coverage(
9700 Arm_output_section<big_endian>* exidx_section,
9701 Symbol_table* symtab)
9703 // We need to look at all the input sections in output in ascending
9704 // order of of output address. We do that by building a sorted list
9705 // of output sections by addresses. Then we looks at the output sections
9706 // in order. The input sections in an output section are already sorted
9707 // by addresses within the output section.
9709 typedef std::set<Output_section*, output_section_address_less_than>
9710 Sorted_output_section_list;
9711 Sorted_output_section_list sorted_output_sections;
9712 Layout::Section_list section_list;
9713 layout->get_allocated_sections(§ion_list);
9714 for (Layout::Section_list::const_iterator p = section_list.begin();
9715 p != section_list.end();
9718 // We only care about output sections that contain executable code.
9719 if (((*p)->flags() & elfcpp::SHF_EXECINSTR) != 0)
9720 sorted_output_sections.insert(*p);
9723 // Go over the output sections in ascending order of output addresses.
9724 typedef typename Arm_output_section<big_endian>::Text_section_list
9726 Text_section_list sorted_text_sections;
9727 for(typename Sorted_output_section_list::iterator p =
9728 sorted_output_sections.begin();
9729 p != sorted_output_sections.end();
9732 Arm_output_section<big_endian>* arm_output_section =
9733 Arm_output_section<big_endian>::as_arm_output_section(*p);
9734 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
9737 exidx_section->fix_exidx_coverage(sorted_text_sections, symtab);
9740 Target_selector_arm<false> target_selector_arm;
9741 Target_selector_arm<true> target_selector_armbe;
9743 } // End anonymous namespace.