1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2015 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian>
62 class Output_data_plt_arm;
64 template<bool big_endian>
65 class Output_data_plt_arm_standard;
67 template<bool big_endian>
70 template<bool big_endian>
71 class Arm_input_section;
73 class Arm_exidx_cantunwind;
75 class Arm_exidx_merged_section;
77 class Arm_exidx_fixup;
79 template<bool big_endian>
80 class Arm_output_section;
82 class Arm_exidx_input_section;
84 template<bool big_endian>
87 template<bool big_endian>
88 class Arm_relocate_functions;
90 template<bool big_endian>
91 class Arm_output_data_got;
93 template<bool big_endian>
97 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
99 // Maximum branch offsets for ARM, THUMB and THUMB2.
100 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
101 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
102 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
103 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
104 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
105 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
107 // Thread Control Block size.
108 const size_t ARM_TCB_SIZE = 8;
110 // The arm target class.
112 // This is a very simple port of gold for ARM-EABI. It is intended for
113 // supporting Android only for the time being.
116 // - Implement all static relocation types documented in arm-reloc.def.
117 // - Make PLTs more flexible for different architecture features like
119 // There are probably a lot more.
121 // Ideally we would like to avoid using global variables but this is used
122 // very in many places and sometimes in loops. If we use a function
123 // returning a static instance of Arm_reloc_property_table, it will be very
124 // slow in an threaded environment since the static instance needs to be
125 // locked. The pointer is below initialized in the
126 // Target::do_select_as_default_target() hook so that we do not spend time
127 // building the table if we are not linking ARM objects.
129 // An alternative is to to process the information in arm-reloc.def in
130 // compilation time and generate a representation of it in PODs only. That
131 // way we can avoid initialization when the linker starts.
133 Arm_reloc_property_table* arm_reloc_property_table = NULL;
135 // Instruction template class. This class is similar to the insn_sequence
136 // struct in bfd/elf32-arm.c.
141 // Types of instruction templates.
145 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
146 // templates with class-specific semantics. Currently this is used
147 // only by the Cortex_a8_stub class for handling condition codes in
148 // conditional branches.
149 THUMB16_SPECIAL_TYPE,
155 // Factory methods to create instruction templates in different formats.
157 static const Insn_template
158 thumb16_insn(uint32_t data)
159 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
161 // A Thumb conditional branch, in which the proper condition is inserted
162 // when we build the stub.
163 static const Insn_template
164 thumb16_bcond_insn(uint32_t data)
165 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
167 static const Insn_template
168 thumb32_insn(uint32_t data)
169 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
171 static const Insn_template
172 thumb32_b_insn(uint32_t data, int reloc_addend)
174 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
178 static const Insn_template
179 arm_insn(uint32_t data)
180 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
182 static const Insn_template
183 arm_rel_insn(unsigned data, int reloc_addend)
184 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
186 static const Insn_template
187 data_word(unsigned data, unsigned int r_type, int reloc_addend)
188 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
190 // Accessors. This class is used for read-only objects so no modifiers
195 { return this->data_; }
197 // Return the instruction sequence type of this.
200 { return this->type_; }
202 // Return the ARM relocation type of this.
205 { return this->r_type_; }
209 { return this->reloc_addend_; }
211 // Return size of instruction template in bytes.
215 // Return byte-alignment of instruction template.
220 // We make the constructor private to ensure that only the factory
223 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
224 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
227 // Instruction specific data. This is used to store information like
228 // some of the instruction bits.
230 // Instruction template type.
232 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
233 unsigned int r_type_;
234 // Relocation addend.
235 int32_t reloc_addend_;
238 // Macro for generating code to stub types. One entry per long/short
242 DEF_STUB(long_branch_any_any) \
243 DEF_STUB(long_branch_v4t_arm_thumb) \
244 DEF_STUB(long_branch_thumb_only) \
245 DEF_STUB(long_branch_v4t_thumb_thumb) \
246 DEF_STUB(long_branch_v4t_thumb_arm) \
247 DEF_STUB(short_branch_v4t_thumb_arm) \
248 DEF_STUB(long_branch_any_arm_pic) \
249 DEF_STUB(long_branch_any_thumb_pic) \
250 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
251 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
252 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
253 DEF_STUB(long_branch_thumb_only_pic) \
254 DEF_STUB(a8_veneer_b_cond) \
255 DEF_STUB(a8_veneer_b) \
256 DEF_STUB(a8_veneer_bl) \
257 DEF_STUB(a8_veneer_blx) \
258 DEF_STUB(v4_veneer_bx)
262 #define DEF_STUB(x) arm_stub_##x,
268 // First reloc stub type.
269 arm_stub_reloc_first = arm_stub_long_branch_any_any,
270 // Last reloc stub type.
271 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
273 // First Cortex-A8 stub type.
274 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
275 // Last Cortex-A8 stub type.
276 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
279 arm_stub_type_last = arm_stub_v4_veneer_bx
283 // Stub template class. Templates are meant to be read-only objects.
284 // A stub template for a stub type contains all read-only attributes
285 // common to all stubs of the same type.
290 Stub_template(Stub_type, const Insn_template*, size_t);
298 { return this->type_; }
300 // Return an array of instruction templates.
303 { return this->insns_; }
305 // Return size of template in number of instructions.
308 { return this->insn_count_; }
310 // Return size of template in bytes.
313 { return this->size_; }
315 // Return alignment of the stub template.
318 { return this->alignment_; }
320 // Return whether entry point is in thumb mode.
322 entry_in_thumb_mode() const
323 { return this->entry_in_thumb_mode_; }
325 // Return number of relocations in this template.
328 { return this->relocs_.size(); }
330 // Return index of the I-th instruction with relocation.
332 reloc_insn_index(size_t i) const
334 gold_assert(i < this->relocs_.size());
335 return this->relocs_[i].first;
338 // Return the offset of the I-th instruction with relocation from the
339 // beginning of the stub.
341 reloc_offset(size_t i) const
343 gold_assert(i < this->relocs_.size());
344 return this->relocs_[i].second;
348 // This contains information about an instruction template with a relocation
349 // and its offset from start of stub.
350 typedef std::pair<size_t, section_size_type> Reloc;
352 // A Stub_template may not be copied. We want to share templates as much
354 Stub_template(const Stub_template&);
355 Stub_template& operator=(const Stub_template&);
359 // Points to an array of Insn_templates.
360 const Insn_template* insns_;
361 // Number of Insn_templates in insns_[].
363 // Size of templated instructions in bytes.
365 // Alignment of templated instructions.
367 // Flag to indicate if entry is in thumb mode.
368 bool entry_in_thumb_mode_;
369 // A table of reloc instruction indices and offsets. We can find these by
370 // looking at the instruction templates but we pre-compute and then stash
371 // them here for speed.
372 std::vector<Reloc> relocs_;
376 // A class for code stubs. This is a base class for different type of
377 // stubs used in the ARM target.
383 static const section_offset_type invalid_offset =
384 static_cast<section_offset_type>(-1);
387 Stub(const Stub_template* stub_template)
388 : stub_template_(stub_template), offset_(invalid_offset)
395 // Return the stub template.
397 stub_template() const
398 { return this->stub_template_; }
400 // Return offset of code stub from beginning of its containing stub table.
404 gold_assert(this->offset_ != invalid_offset);
405 return this->offset_;
408 // Set offset of code stub from beginning of its containing stub table.
410 set_offset(section_offset_type offset)
411 { this->offset_ = offset; }
413 // Return the relocation target address of the i-th relocation in the
414 // stub. This must be defined in a child class.
416 reloc_target(size_t i)
417 { return this->do_reloc_target(i); }
419 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
421 write(unsigned char* view, section_size_type view_size, bool big_endian)
422 { this->do_write(view, view_size, big_endian); }
424 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
425 // for the i-th instruction.
427 thumb16_special(size_t i)
428 { return this->do_thumb16_special(i); }
431 // This must be defined in the child class.
433 do_reloc_target(size_t) = 0;
435 // This may be overridden in the child class.
437 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
440 this->do_fixed_endian_write<true>(view, view_size);
442 this->do_fixed_endian_write<false>(view, view_size);
445 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
446 // instruction template.
448 do_thumb16_special(size_t)
449 { gold_unreachable(); }
452 // A template to implement do_write.
453 template<bool big_endian>
455 do_fixed_endian_write(unsigned char*, section_size_type);
458 const Stub_template* stub_template_;
459 // Offset within the section of containing this stub.
460 section_offset_type offset_;
463 // Reloc stub class. These are stubs we use to fix up relocation because
464 // of limited branch ranges.
466 class Reloc_stub : public Stub
469 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
470 // We assume we never jump to this address.
471 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
473 // Return destination address.
475 destination_address() const
477 gold_assert(this->destination_address_ != this->invalid_address);
478 return this->destination_address_;
481 // Set destination address.
483 set_destination_address(Arm_address address)
485 gold_assert(address != this->invalid_address);
486 this->destination_address_ = address;
489 // Reset destination address.
491 reset_destination_address()
492 { this->destination_address_ = this->invalid_address; }
494 // Determine stub type for a branch of a relocation of R_TYPE going
495 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
496 // the branch target is a thumb instruction. TARGET is used for look
497 // up ARM-specific linker settings.
499 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
500 Arm_address branch_target, bool target_is_thumb);
502 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
503 // and an addend. Since we treat global and local symbol differently, we
504 // use a Symbol object for a global symbol and a object-index pair for
509 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
510 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
511 // and R_SYM must not be invalid_index.
512 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
513 unsigned int r_sym, int32_t addend)
514 : stub_type_(stub_type), addend_(addend)
518 this->r_sym_ = Reloc_stub::invalid_index;
519 this->u_.symbol = symbol;
523 gold_assert(relobj != NULL && r_sym != invalid_index);
524 this->r_sym_ = r_sym;
525 this->u_.relobj = relobj;
532 // Accessors: Keys are meant to be read-only object so no modifiers are
538 { return this->stub_type_; }
540 // Return the local symbol index or invalid_index.
543 { return this->r_sym_; }
545 // Return the symbol if there is one.
548 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
550 // Return the relobj if there is one.
553 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
555 // Whether this equals to another key k.
557 eq(const Key& k) const
559 return ((this->stub_type_ == k.stub_type_)
560 && (this->r_sym_ == k.r_sym_)
561 && ((this->r_sym_ != Reloc_stub::invalid_index)
562 ? (this->u_.relobj == k.u_.relobj)
563 : (this->u_.symbol == k.u_.symbol))
564 && (this->addend_ == k.addend_));
567 // Return a hash value.
571 return (this->stub_type_
573 ^ gold::string_hash<char>(
574 (this->r_sym_ != Reloc_stub::invalid_index)
575 ? this->u_.relobj->name().c_str()
576 : this->u_.symbol->name())
580 // Functors for STL associative containers.
584 operator()(const Key& k) const
585 { return k.hash_value(); }
591 operator()(const Key& k1, const Key& k2) const
592 { return k1.eq(k2); }
595 // Name of key. This is mainly for debugging.
601 Stub_type stub_type_;
602 // If this is a local symbol, this is the index in the defining object.
603 // Otherwise, it is invalid_index for a global symbol.
605 // If r_sym_ is an invalid index, this points to a global symbol.
606 // Otherwise, it points to a relobj. We used the unsized and target
607 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
608 // Arm_relobj, in order to avoid making the stub class a template
609 // as most of the stub machinery is endianness-neutral. However, it
610 // may require a bit of casting done by users of this class.
613 const Symbol* symbol;
614 const Relobj* relobj;
616 // Addend associated with a reloc.
621 // Reloc_stubs are created via a stub factory. So these are protected.
622 Reloc_stub(const Stub_template* stub_template)
623 : Stub(stub_template), destination_address_(invalid_address)
629 friend class Stub_factory;
631 // Return the relocation target address of the i-th relocation in the
634 do_reloc_target(size_t i)
636 // All reloc stub have only one relocation.
638 return this->destination_address_;
642 // Address of destination.
643 Arm_address destination_address_;
646 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
647 // THUMB branch that meets the following conditions:
649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
650 // branch address is 0xffe.
651 // 2. The branch target address is in the same page as the first word of the
653 // 3. The branch follows a 32-bit instruction which is not a branch.
655 // To do the fix up, we need to store the address of the branch instruction
656 // and its target at least. We also need to store the original branch
657 // instruction bits for the condition code in a conditional branch. The
658 // condition code is used in a special instruction template. We also want
659 // to identify input sections needing Cortex-A8 workaround quickly. We store
660 // extra information about object and section index of the code section
661 // containing a branch being fixed up. The information is used to mark
662 // the code section when we finalize the Cortex-A8 stubs.
665 class Cortex_a8_stub : public Stub
671 // Return the object of the code section containing the branch being fixed
675 { return this->relobj_; }
677 // Return the section index of the code section containing the branch being
681 { return this->shndx_; }
683 // Return the source address of stub. This is the address of the original
684 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
687 source_address() const
688 { return this->source_address_; }
690 // Return the destination address of the stub. This is the branch taken
691 // address of the original branch instruction. LSB is 1 if it is a THUMB
692 // instruction address.
694 destination_address() const
695 { return this->destination_address_; }
697 // Return the instruction being fixed up.
699 original_insn() const
700 { return this->original_insn_; }
703 // Cortex_a8_stubs are created via a stub factory. So these are protected.
704 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
705 unsigned int shndx, Arm_address source_address,
706 Arm_address destination_address, uint32_t original_insn)
707 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
708 source_address_(source_address | 1U),
709 destination_address_(destination_address),
710 original_insn_(original_insn)
713 friend class Stub_factory;
715 // Return the relocation target address of the i-th relocation in the
718 do_reloc_target(size_t i)
720 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
722 // The conditional branch veneer has two relocations.
724 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
728 // All other Cortex-A8 stubs have only one relocation.
730 return this->destination_address_;
734 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
736 do_thumb16_special(size_t);
739 // Object of the code section containing the branch being fixed up.
741 // Section index of the code section containing the branch begin fixed up.
743 // Source address of original branch.
744 Arm_address source_address_;
745 // Destination address of the original branch.
746 Arm_address destination_address_;
747 // Original branch instruction. This is needed for copying the condition
748 // code from a condition branch to its stub.
749 uint32_t original_insn_;
752 // ARMv4 BX Rx branch relocation stub class.
753 class Arm_v4bx_stub : public Stub
759 // Return the associated register.
762 { return this->reg_; }
765 // Arm V4BX stubs are created via a stub factory. So these are protected.
766 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
767 : Stub(stub_template), reg_(reg)
770 friend class Stub_factory;
772 // Return the relocation target address of the i-th relocation in the
775 do_reloc_target(size_t)
776 { gold_unreachable(); }
778 // This may be overridden in the child class.
780 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
783 this->do_fixed_endian_v4bx_write<true>(view, view_size);
785 this->do_fixed_endian_v4bx_write<false>(view, view_size);
789 // A template to implement do_write.
790 template<bool big_endian>
792 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
794 const Insn_template* insns = this->stub_template()->insns();
795 elfcpp::Swap<32, big_endian>::writeval(view,
797 + (this->reg_ << 16)));
798 view += insns[0].size();
799 elfcpp::Swap<32, big_endian>::writeval(view,
800 (insns[1].data() + this->reg_));
801 view += insns[1].size();
802 elfcpp::Swap<32, big_endian>::writeval(view,
803 (insns[2].data() + this->reg_));
806 // A register index (r0-r14), which is associated with the stub.
810 // Stub factory class.
815 // Return the unique instance of this class.
816 static const Stub_factory&
819 static Stub_factory singleton;
823 // Make a relocation stub.
825 make_reloc_stub(Stub_type stub_type) const
827 gold_assert(stub_type >= arm_stub_reloc_first
828 && stub_type <= arm_stub_reloc_last);
829 return new Reloc_stub(this->stub_templates_[stub_type]);
832 // Make a Cortex-A8 stub.
834 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
835 Arm_address source, Arm_address destination,
836 uint32_t original_insn) const
838 gold_assert(stub_type >= arm_stub_cortex_a8_first
839 && stub_type <= arm_stub_cortex_a8_last);
840 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
841 source, destination, original_insn);
844 // Make an ARM V4BX relocation stub.
845 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
847 make_arm_v4bx_stub(uint32_t reg) const
849 gold_assert(reg < 0xf);
850 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
855 // Constructor and destructor are protected since we only return a single
856 // instance created in Stub_factory::get_instance().
860 // A Stub_factory may not be copied since it is a singleton.
861 Stub_factory(const Stub_factory&);
862 Stub_factory& operator=(Stub_factory&);
864 // Stub templates. These are initialized in the constructor.
865 const Stub_template* stub_templates_[arm_stub_type_last+1];
868 // A class to hold stubs for the ARM target.
870 template<bool big_endian>
871 class Stub_table : public Output_data
874 Stub_table(Arm_input_section<big_endian>* owner)
875 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0),
876 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
877 prev_data_size_(0), prev_addralign_(1)
883 // Owner of this stub table.
884 Arm_input_section<big_endian>*
886 { return this->owner_; }
888 // Whether this stub table is empty.
892 return (this->reloc_stubs_.empty()
893 && this->cortex_a8_stubs_.empty()
894 && this->arm_v4bx_stubs_.empty());
897 // Return the current data size.
899 current_data_size() const
900 { return this->current_data_size_for_child(); }
902 // Add a STUB using KEY. The caller is responsible for avoiding addition
903 // if a STUB with the same key has already been added.
905 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
907 const Stub_template* stub_template = stub->stub_template();
908 gold_assert(stub_template->type() == key.stub_type());
909 this->reloc_stubs_[key] = stub;
911 // Assign stub offset early. We can do this because we never remove
912 // reloc stubs and they are in the beginning of the stub table.
913 uint64_t align = stub_template->alignment();
914 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align);
915 stub->set_offset(this->reloc_stubs_size_);
916 this->reloc_stubs_size_ += stub_template->size();
917 this->reloc_stubs_addralign_ =
918 std::max(this->reloc_stubs_addralign_, align);
921 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
922 // The caller is responsible for avoiding addition if a STUB with the same
923 // address has already been added.
925 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
927 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
928 this->cortex_a8_stubs_.insert(value);
931 // Add an ARM V4BX relocation stub. A register index will be retrieved
934 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
936 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
937 this->arm_v4bx_stubs_[stub->reg()] = stub;
940 // Remove all Cortex-A8 stubs.
942 remove_all_cortex_a8_stubs();
944 // Look up a relocation stub using KEY. Return NULL if there is none.
946 find_reloc_stub(const Reloc_stub::Key& key) const
948 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
949 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
952 // Look up an arm v4bx relocation stub using the register index.
953 // Return NULL if there is none.
955 find_arm_v4bx_stub(const uint32_t reg) const
957 gold_assert(reg < 0xf);
958 return this->arm_v4bx_stubs_[reg];
961 // Relocate stubs in this stub table.
963 relocate_stubs(const Relocate_info<32, big_endian>*,
964 Target_arm<big_endian>*, Output_section*,
965 unsigned char*, Arm_address, section_size_type);
967 // Update data size and alignment at the end of a relaxation pass. Return
968 // true if either data size or alignment is different from that of the
969 // previous relaxation pass.
971 update_data_size_and_addralign();
973 // Finalize stubs. Set the offsets of all stubs and mark input sections
974 // needing the Cortex-A8 workaround.
978 // Apply Cortex-A8 workaround to an address range.
980 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
981 unsigned char*, Arm_address,
985 // Write out section contents.
987 do_write(Output_file*);
989 // Return the required alignment.
992 { return this->prev_addralign_; }
994 // Reset address and file offset.
996 do_reset_address_and_file_offset()
997 { this->set_current_data_size_for_child(this->prev_data_size_); }
999 // Set final data size.
1001 set_final_data_size()
1002 { this->set_data_size(this->current_data_size()); }
1005 // Relocate one stub.
1007 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
1008 Target_arm<big_endian>*, Output_section*,
1009 unsigned char*, Arm_address, section_size_type);
1011 // Unordered map of relocation stubs.
1013 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
1014 Reloc_stub::Key::equal_to>
1017 // List of Cortex-A8 stubs ordered by addresses of branches being
1018 // fixed up in output.
1019 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1020 // List of Arm V4BX relocation stubs ordered by associated registers.
1021 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1023 // Owner of this stub table.
1024 Arm_input_section<big_endian>* owner_;
1025 // The relocation stubs.
1026 Reloc_stub_map reloc_stubs_;
1027 // Size of reloc stubs.
1028 off_t reloc_stubs_size_;
1029 // Maximum address alignment of reloc stubs.
1030 uint64_t reloc_stubs_addralign_;
1031 // The cortex_a8_stubs.
1032 Cortex_a8_stub_list cortex_a8_stubs_;
1033 // The Arm V4BX relocation stubs.
1034 Arm_v4bx_stub_list arm_v4bx_stubs_;
1035 // data size of this in the previous pass.
1036 off_t prev_data_size_;
1037 // address alignment of this in the previous pass.
1038 uint64_t prev_addralign_;
1041 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1042 // we add to the end of an EXIDX input section that goes into the output.
1044 class Arm_exidx_cantunwind : public Output_section_data
1047 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1048 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1051 // Return the object containing the section pointed by this.
1054 { return this->relobj_; }
1056 // Return the section index of the section pointed by this.
1059 { return this->shndx_; }
1063 do_write(Output_file* of)
1065 if (parameters->target().is_big_endian())
1066 this->do_fixed_endian_write<true>(of);
1068 this->do_fixed_endian_write<false>(of);
1071 // Write to a map file.
1073 do_print_to_mapfile(Mapfile* mapfile) const
1074 { mapfile->print_output_data(this, _("** ARM cantunwind")); }
1077 // Implement do_write for a given endianness.
1078 template<bool big_endian>
1080 do_fixed_endian_write(Output_file*);
1082 // The object containing the section pointed by this.
1084 // The section index of the section pointed by this.
1085 unsigned int shndx_;
1088 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1089 // Offset map is used to map input section offset within the EXIDX section
1090 // to the output offset from the start of this EXIDX section.
1092 typedef std::map<section_offset_type, section_offset_type>
1093 Arm_exidx_section_offset_map;
1095 // Arm_exidx_merged_section class. This represents an EXIDX input section
1096 // with some of its entries merged.
1098 class Arm_exidx_merged_section : public Output_relaxed_input_section
1101 // Constructor for Arm_exidx_merged_section.
1102 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1103 // SECTION_OFFSET_MAP points to a section offset map describing how
1104 // parts of the input section are mapped to output. DELETED_BYTES is
1105 // the number of bytes deleted from the EXIDX input section.
1106 Arm_exidx_merged_section(
1107 const Arm_exidx_input_section& exidx_input_section,
1108 const Arm_exidx_section_offset_map& section_offset_map,
1109 uint32_t deleted_bytes);
1111 // Build output contents.
1113 build_contents(const unsigned char*, section_size_type);
1115 // Return the original EXIDX input section.
1116 const Arm_exidx_input_section&
1117 exidx_input_section() const
1118 { return this->exidx_input_section_; }
1120 // Return the section offset map.
1121 const Arm_exidx_section_offset_map&
1122 section_offset_map() const
1123 { return this->section_offset_map_; }
1126 // Write merged section into file OF.
1128 do_write(Output_file* of);
1131 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1132 section_offset_type*) const;
1135 // Original EXIDX input section.
1136 const Arm_exidx_input_section& exidx_input_section_;
1137 // Section offset map.
1138 const Arm_exidx_section_offset_map& section_offset_map_;
1139 // Merged section contents. We need to keep build the merged section
1140 // and save it here to avoid accessing the original EXIDX section when
1141 // we cannot lock the sections' object.
1142 unsigned char* section_contents_;
1145 // A class to wrap an ordinary input section containing executable code.
1147 template<bool big_endian>
1148 class Arm_input_section : public Output_relaxed_input_section
1151 Arm_input_section(Relobj* relobj, unsigned int shndx)
1152 : Output_relaxed_input_section(relobj, shndx, 1),
1153 original_addralign_(1), original_size_(0), stub_table_(NULL),
1154 original_contents_(NULL)
1157 ~Arm_input_section()
1158 { delete[] this->original_contents_; }
1164 // Whether this is a stub table owner.
1166 is_stub_table_owner() const
1167 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1169 // Return the stub table.
1170 Stub_table<big_endian>*
1172 { return this->stub_table_; }
1174 // Set the stub_table.
1176 set_stub_table(Stub_table<big_endian>* stub_table)
1177 { this->stub_table_ = stub_table; }
1179 // Downcast a base pointer to an Arm_input_section pointer. This is
1180 // not type-safe but we only use Arm_input_section not the base class.
1181 static Arm_input_section<big_endian>*
1182 as_arm_input_section(Output_relaxed_input_section* poris)
1183 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1185 // Return the original size of the section.
1187 original_size() const
1188 { return this->original_size_; }
1191 // Write data to output file.
1193 do_write(Output_file*);
1195 // Return required alignment of this.
1197 do_addralign() const
1199 if (this->is_stub_table_owner())
1200 return std::max(this->stub_table_->addralign(),
1201 static_cast<uint64_t>(this->original_addralign_));
1203 return this->original_addralign_;
1206 // Finalize data size.
1208 set_final_data_size();
1210 // Reset address and file offset.
1212 do_reset_address_and_file_offset();
1216 do_output_offset(const Relobj* object, unsigned int shndx,
1217 section_offset_type offset,
1218 section_offset_type* poutput) const
1220 if ((object == this->relobj())
1221 && (shndx == this->shndx())
1224 convert_types<section_offset_type, uint32_t>(this->original_size_)))
1234 // Copying is not allowed.
1235 Arm_input_section(const Arm_input_section&);
1236 Arm_input_section& operator=(const Arm_input_section&);
1238 // Address alignment of the original input section.
1239 uint32_t original_addralign_;
1240 // Section size of the original input section.
1241 uint32_t original_size_;
1243 Stub_table<big_endian>* stub_table_;
1244 // Original section contents. We have to make a copy here since the file
1245 // containing the original section may not be locked when we need to access
1247 unsigned char* original_contents_;
1250 // Arm_exidx_fixup class. This is used to define a number of methods
1251 // and keep states for fixing up EXIDX coverage.
1253 class Arm_exidx_fixup
1256 Arm_exidx_fixup(Output_section* exidx_output_section,
1257 bool merge_exidx_entries = true)
1258 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1259 last_inlined_entry_(0), last_input_section_(NULL),
1260 section_offset_map_(NULL), first_output_text_section_(NULL),
1261 merge_exidx_entries_(merge_exidx_entries)
1265 { delete this->section_offset_map_; }
1267 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1268 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1269 // number of bytes to be deleted in output. If parts of the input EXIDX
1270 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1271 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1272 // responsible for releasing it.
1273 template<bool big_endian>
1275 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1276 const unsigned char* section_contents,
1277 section_size_type section_size,
1278 Arm_exidx_section_offset_map** psection_offset_map);
1280 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1281 // input section, if there is not one already.
1283 add_exidx_cantunwind_as_needed();
1285 // Return the output section for the text section which is linked to the
1286 // first exidx input in output.
1288 first_output_text_section() const
1289 { return this->first_output_text_section_; }
1292 // Copying is not allowed.
1293 Arm_exidx_fixup(const Arm_exidx_fixup&);
1294 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1296 // Type of EXIDX unwind entry.
1301 // EXIDX_CANTUNWIND.
1302 UT_EXIDX_CANTUNWIND,
1309 // Process an EXIDX entry. We only care about the second word of the
1310 // entry. Return true if the entry can be deleted.
1312 process_exidx_entry(uint32_t second_word);
1314 // Update the current section offset map during EXIDX section fix-up.
1315 // If there is no map, create one. INPUT_OFFSET is the offset of a
1316 // reference point, DELETED_BYTES is the number of deleted by in the
1317 // section so far. If DELETE_ENTRY is true, the reference point and
1318 // all offsets after the previous reference point are discarded.
1320 update_offset_map(section_offset_type input_offset,
1321 section_size_type deleted_bytes, bool delete_entry);
1323 // EXIDX output section.
1324 Output_section* exidx_output_section_;
1325 // Unwind type of the last EXIDX entry processed.
1326 Unwind_type last_unwind_type_;
1327 // Last seen inlined EXIDX entry.
1328 uint32_t last_inlined_entry_;
1329 // Last processed EXIDX input section.
1330 const Arm_exidx_input_section* last_input_section_;
1331 // Section offset map created in process_exidx_section.
1332 Arm_exidx_section_offset_map* section_offset_map_;
1333 // Output section for the text section which is linked to the first exidx
1335 Output_section* first_output_text_section_;
1337 bool merge_exidx_entries_;
1340 // Arm output section class. This is defined mainly to add a number of
1341 // stub generation methods.
1343 template<bool big_endian>
1344 class Arm_output_section : public Output_section
1347 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1349 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1350 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1351 elfcpp::Elf_Xword flags)
1352 : Output_section(name, type,
1353 (type == elfcpp::SHT_ARM_EXIDX
1354 ? flags | elfcpp::SHF_LINK_ORDER
1357 if (type == elfcpp::SHT_ARM_EXIDX)
1358 this->set_always_keeps_input_sections();
1361 ~Arm_output_section()
1364 // Group input sections for stub generation.
1366 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*);
1368 // Downcast a base pointer to an Arm_output_section pointer. This is
1369 // not type-safe but we only use Arm_output_section not the base class.
1370 static Arm_output_section<big_endian>*
1371 as_arm_output_section(Output_section* os)
1372 { return static_cast<Arm_output_section<big_endian>*>(os); }
1374 // Append all input text sections in this into LIST.
1376 append_text_sections_to_list(Text_section_list* list);
1378 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1379 // is a list of text input sections sorted in ascending order of their
1380 // output addresses.
1382 fix_exidx_coverage(Layout* layout,
1383 const Text_section_list& sorted_text_section,
1384 Symbol_table* symtab,
1385 bool merge_exidx_entries,
1388 // Link an EXIDX section into its corresponding text section.
1390 set_exidx_section_link();
1394 typedef Output_section::Input_section Input_section;
1395 typedef Output_section::Input_section_list Input_section_list;
1397 // Create a stub group.
1398 void create_stub_group(Input_section_list::const_iterator,
1399 Input_section_list::const_iterator,
1400 Input_section_list::const_iterator,
1401 Target_arm<big_endian>*,
1402 std::vector<Output_relaxed_input_section*>*,
1406 // Arm_exidx_input_section class. This represents an EXIDX input section.
1408 class Arm_exidx_input_section
1411 static const section_offset_type invalid_offset =
1412 static_cast<section_offset_type>(-1);
1414 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1415 unsigned int link, uint32_t size,
1416 uint32_t addralign, uint32_t text_size)
1417 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1418 addralign_(addralign), text_size_(text_size), has_errors_(false)
1421 ~Arm_exidx_input_section()
1424 // Accessors: This is a read-only class.
1426 // Return the object containing this EXIDX input section.
1429 { return this->relobj_; }
1431 // Return the section index of this EXIDX input section.
1434 { return this->shndx_; }
1436 // Return the section index of linked text section in the same object.
1439 { return this->link_; }
1441 // Return size of the EXIDX input section.
1444 { return this->size_; }
1446 // Return address alignment of EXIDX input section.
1449 { return this->addralign_; }
1451 // Return size of the associated text input section.
1454 { return this->text_size_; }
1456 // Whether there are any errors in the EXIDX input section.
1459 { return this->has_errors_; }
1461 // Set has-errors flag.
1464 { this->has_errors_ = true; }
1467 // Object containing this.
1469 // Section index of this.
1470 unsigned int shndx_;
1471 // text section linked to this in the same object.
1473 // Size of this. For ARM 32-bit is sufficient.
1475 // Address alignment of this. For ARM 32-bit is sufficient.
1476 uint32_t addralign_;
1477 // Size of associated text section.
1478 uint32_t text_size_;
1479 // Whether this has any errors.
1483 // Arm_relobj class.
1485 template<bool big_endian>
1486 class Arm_relobj : public Sized_relobj_file<32, big_endian>
1489 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1491 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1492 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1493 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr),
1494 stub_tables_(), local_symbol_is_thumb_function_(),
1495 attributes_section_data_(NULL), mapping_symbols_info_(),
1496 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1497 output_local_symbol_count_needs_update_(false),
1498 merge_flags_and_attributes_(true)
1502 { delete this->attributes_section_data_; }
1504 // Return the stub table of the SHNDX-th section if there is one.
1505 Stub_table<big_endian>*
1506 stub_table(unsigned int shndx) const
1508 gold_assert(shndx < this->stub_tables_.size());
1509 return this->stub_tables_[shndx];
1512 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1514 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1516 gold_assert(shndx < this->stub_tables_.size());
1517 this->stub_tables_[shndx] = stub_table;
1520 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1521 // index. This is only valid after do_count_local_symbol is called.
1523 local_symbol_is_thumb_function(unsigned int r_sym) const
1525 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1526 return this->local_symbol_is_thumb_function_[r_sym];
1529 // Scan all relocation sections for stub generation.
1531 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1534 // Convert regular input section with index SHNDX to a relaxed section.
1536 convert_input_section_to_relaxed_section(unsigned shndx)
1538 // The stubs have relocations and we need to process them after writing
1539 // out the stubs. So relocation now must follow section write.
1540 this->set_section_offset(shndx, -1ULL);
1541 this->set_relocs_must_follow_section_writes();
1544 // Downcast a base pointer to an Arm_relobj pointer. This is
1545 // not type-safe but we only use Arm_relobj not the base class.
1546 static Arm_relobj<big_endian>*
1547 as_arm_relobj(Relobj* relobj)
1548 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1550 // Processor-specific flags in ELF file header. This is valid only after
1553 processor_specific_flags() const
1554 { return this->processor_specific_flags_; }
1556 // Attribute section data This is the contents of the .ARM.attribute section
1558 const Attributes_section_data*
1559 attributes_section_data() const
1560 { return this->attributes_section_data_; }
1562 // Mapping symbol location.
1563 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1565 // Functor for STL container.
1566 struct Mapping_symbol_position_less
1569 operator()(const Mapping_symbol_position& p1,
1570 const Mapping_symbol_position& p2) const
1572 return (p1.first < p2.first
1573 || (p1.first == p2.first && p1.second < p2.second));
1577 // We only care about the first character of a mapping symbol, so
1578 // we only store that instead of the whole symbol name.
1579 typedef std::map<Mapping_symbol_position, char,
1580 Mapping_symbol_position_less> Mapping_symbols_info;
1582 // Whether a section contains any Cortex-A8 workaround.
1584 section_has_cortex_a8_workaround(unsigned int shndx) const
1586 return (this->section_has_cortex_a8_workaround_ != NULL
1587 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1590 // Mark a section that has Cortex-A8 workaround.
1592 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1594 if (this->section_has_cortex_a8_workaround_ == NULL)
1595 this->section_has_cortex_a8_workaround_ =
1596 new std::vector<bool>(this->shnum(), false);
1597 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1600 // Return the EXIDX section of an text section with index SHNDX or NULL
1601 // if the text section has no associated EXIDX section.
1602 const Arm_exidx_input_section*
1603 exidx_input_section_by_link(unsigned int shndx) const
1605 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1606 return ((p != this->exidx_section_map_.end()
1607 && p->second->link() == shndx)
1612 // Return the EXIDX section with index SHNDX or NULL if there is none.
1613 const Arm_exidx_input_section*
1614 exidx_input_section_by_shndx(unsigned shndx) const
1616 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1617 return ((p != this->exidx_section_map_.end()
1618 && p->second->shndx() == shndx)
1623 // Whether output local symbol count needs updating.
1625 output_local_symbol_count_needs_update() const
1626 { return this->output_local_symbol_count_needs_update_; }
1628 // Set output_local_symbol_count_needs_update flag to be true.
1630 set_output_local_symbol_count_needs_update()
1631 { this->output_local_symbol_count_needs_update_ = true; }
1633 // Update output local symbol count at the end of relaxation.
1635 update_output_local_symbol_count();
1637 // Whether we want to merge processor-specific flags and attributes.
1639 merge_flags_and_attributes() const
1640 { return this->merge_flags_and_attributes_; }
1642 // Export list of EXIDX section indices.
1644 get_exidx_shndx_list(std::vector<unsigned int>* list) const
1647 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin();
1648 p != this->exidx_section_map_.end();
1651 if (p->second->shndx() == p->first)
1652 list->push_back(p->first);
1654 // Sort list to make result independent of implementation of map.
1655 std::sort(list->begin(), list->end());
1659 // Post constructor setup.
1663 // Call parent's setup method.
1664 Sized_relobj_file<32, big_endian>::do_setup();
1666 // Initialize look-up tables.
1667 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1668 this->stub_tables_.swap(empty_stub_table_list);
1671 // Count the local symbols.
1673 do_count_local_symbols(Stringpool_template<char>*,
1674 Stringpool_template<char>*);
1677 do_relocate_sections(
1678 const Symbol_table* symtab, const Layout* layout,
1679 const unsigned char* pshdrs, Output_file* of,
1680 typename Sized_relobj_file<32, big_endian>::Views* pivews);
1682 // Read the symbol information.
1684 do_read_symbols(Read_symbols_data* sd);
1686 // Process relocs for garbage collection.
1688 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1692 // Whether a section needs to be scanned for relocation stubs.
1694 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1695 const Relobj::Output_sections&,
1696 const Symbol_table*, const unsigned char*);
1698 // Whether a section is a scannable text section.
1700 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1701 const Output_section*, const Symbol_table*);
1703 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1705 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1706 unsigned int, Output_section*,
1707 const Symbol_table*);
1709 // Scan a section for the Cortex-A8 erratum.
1711 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1712 unsigned int, Output_section*,
1713 Target_arm<big_endian>*);
1715 // Find the linked text section of an EXIDX section by looking at the
1716 // first relocation of the EXIDX section. PSHDR points to the section
1717 // headers of a relocation section and PSYMS points to the local symbols.
1718 // PSHNDX points to a location storing the text section index if found.
1719 // Return whether we can find the linked section.
1721 find_linked_text_section(const unsigned char* pshdr,
1722 const unsigned char* psyms, unsigned int* pshndx);
1725 // Make a new Arm_exidx_input_section object for EXIDX section with
1726 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1727 // index of the linked text section.
1729 make_exidx_input_section(unsigned int shndx,
1730 const elfcpp::Shdr<32, big_endian>& shdr,
1731 unsigned int text_shndx,
1732 const elfcpp::Shdr<32, big_endian>& text_shdr);
1734 // Return the output address of either a plain input section or a
1735 // relaxed input section. SHNDX is the section index.
1737 simple_input_section_output_address(unsigned int, Output_section*);
1739 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1740 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1743 // List of stub tables.
1744 Stub_table_list stub_tables_;
1745 // Bit vector to tell if a local symbol is a thumb function or not.
1746 // This is only valid after do_count_local_symbol is called.
1747 std::vector<bool> local_symbol_is_thumb_function_;
1748 // processor-specific flags in ELF file header.
1749 elfcpp::Elf_Word processor_specific_flags_;
1750 // Object attributes if there is an .ARM.attributes section or NULL.
1751 Attributes_section_data* attributes_section_data_;
1752 // Mapping symbols information.
1753 Mapping_symbols_info mapping_symbols_info_;
1754 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1755 std::vector<bool>* section_has_cortex_a8_workaround_;
1756 // Map a text section to its associated .ARM.exidx section, if there is one.
1757 Exidx_section_map exidx_section_map_;
1758 // Whether output local symbol count needs updating.
1759 bool output_local_symbol_count_needs_update_;
1760 // Whether we merge processor flags and attributes of this object to
1762 bool merge_flags_and_attributes_;
1765 // Arm_dynobj class.
1767 template<bool big_endian>
1768 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1771 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1772 const elfcpp::Ehdr<32, big_endian>& ehdr)
1773 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1774 processor_specific_flags_(0), attributes_section_data_(NULL)
1778 { delete this->attributes_section_data_; }
1780 // Downcast a base pointer to an Arm_relobj pointer. This is
1781 // not type-safe but we only use Arm_relobj not the base class.
1782 static Arm_dynobj<big_endian>*
1783 as_arm_dynobj(Dynobj* dynobj)
1784 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1786 // Processor-specific flags in ELF file header. This is valid only after
1789 processor_specific_flags() const
1790 { return this->processor_specific_flags_; }
1792 // Attributes section data.
1793 const Attributes_section_data*
1794 attributes_section_data() const
1795 { return this->attributes_section_data_; }
1798 // Read the symbol information.
1800 do_read_symbols(Read_symbols_data* sd);
1803 // processor-specific flags in ELF file header.
1804 elfcpp::Elf_Word processor_specific_flags_;
1805 // Object attributes if there is an .ARM.attributes section or NULL.
1806 Attributes_section_data* attributes_section_data_;
1809 // Functor to read reloc addends during stub generation.
1811 template<int sh_type, bool big_endian>
1812 struct Stub_addend_reader
1814 // Return the addend for a relocation of a particular type. Depending
1815 // on whether this is a REL or RELA relocation, read the addend from a
1816 // view or from a Reloc object.
1817 elfcpp::Elf_types<32>::Elf_Swxword
1819 unsigned int /* r_type */,
1820 const unsigned char* /* view */,
1821 const typename Reloc_types<sh_type,
1822 32, big_endian>::Reloc& /* reloc */) const;
1825 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1827 template<bool big_endian>
1828 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1830 elfcpp::Elf_types<32>::Elf_Swxword
1833 const unsigned char*,
1834 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1837 // Specialized Stub_addend_reader for RELA type relocation sections.
1838 // We currently do not handle RELA type relocation sections but it is trivial
1839 // to implement the addend reader. This is provided for completeness and to
1840 // make it easier to add support for RELA relocation sections in the future.
1842 template<bool big_endian>
1843 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1845 elfcpp::Elf_types<32>::Elf_Swxword
1848 const unsigned char*,
1849 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1850 big_endian>::Reloc& reloc) const
1851 { return reloc.get_r_addend(); }
1854 // Cortex_a8_reloc class. We keep record of relocation that may need
1855 // the Cortex-A8 erratum workaround.
1857 class Cortex_a8_reloc
1860 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1861 Arm_address destination)
1862 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1868 // Accessors: This is a read-only class.
1870 // Return the relocation stub associated with this relocation if there is
1874 { return this->reloc_stub_; }
1876 // Return the relocation type.
1879 { return this->r_type_; }
1881 // Return the destination address of the relocation. LSB stores the THUMB
1885 { return this->destination_; }
1888 // Associated relocation stub if there is one, or NULL.
1889 const Reloc_stub* reloc_stub_;
1891 unsigned int r_type_;
1892 // Destination address of this relocation. LSB is used to distinguish
1894 Arm_address destination_;
1897 // Arm_output_data_got class. We derive this from Output_data_got to add
1898 // extra methods to handle TLS relocations in a static link.
1900 template<bool big_endian>
1901 class Arm_output_data_got : public Output_data_got<32, big_endian>
1904 Arm_output_data_got(Symbol_table* symtab, Layout* layout)
1905 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout)
1908 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1909 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1910 // applied in a static link.
1912 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1913 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); }
1915 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1916 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1917 // relocation that needs to be applied in a static link.
1919 add_static_reloc(unsigned int got_offset, unsigned int r_type,
1920 Sized_relobj_file<32, big_endian>* relobj,
1923 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj,
1927 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1928 // The first one is initialized to be 1, which is the module index for
1929 // the main executable and the second one 0. A reloc of the type
1930 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1931 // be applied by gold. GSYM is a global symbol.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym);
1935 // Same as the above but for a local symbol in OBJECT with INDEX.
1937 add_tls_gd32_with_static_reloc(unsigned int got_type,
1938 Sized_relobj_file<32, big_endian>* object,
1939 unsigned int index);
1942 // Write out the GOT table.
1944 do_write(Output_file*);
1947 // This class represent dynamic relocations that need to be applied by
1948 // gold because we are using TLS relocations in a static link.
1952 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1953 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true)
1954 { this->u_.global.symbol = gsym; }
1956 Static_reloc(unsigned int got_offset, unsigned int r_type,
1957 Sized_relobj_file<32, big_endian>* relobj, unsigned int index)
1958 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false)
1960 this->u_.local.relobj = relobj;
1961 this->u_.local.index = index;
1964 // Return the GOT offset.
1967 { return this->got_offset_; }
1972 { return this->r_type_; }
1974 // Whether the symbol is global or not.
1976 symbol_is_global() const
1977 { return this->symbol_is_global_; }
1979 // For a relocation against a global symbol, the global symbol.
1983 gold_assert(this->symbol_is_global_);
1984 return this->u_.global.symbol;
1987 // For a relocation against a local symbol, the defining object.
1988 Sized_relobj_file<32, big_endian>*
1991 gold_assert(!this->symbol_is_global_);
1992 return this->u_.local.relobj;
1995 // For a relocation against a local symbol, the local symbol index.
1999 gold_assert(!this->symbol_is_global_);
2000 return this->u_.local.index;
2004 // GOT offset of the entry to which this relocation is applied.
2005 unsigned int got_offset_;
2006 // Type of relocation.
2007 unsigned int r_type_;
2008 // Whether this relocation is against a global symbol.
2009 bool symbol_is_global_;
2010 // A global or local symbol.
2015 // For a global symbol, the symbol itself.
2020 // For a local symbol, the object defining object.
2021 Sized_relobj_file<32, big_endian>* relobj;
2022 // For a local symbol, the symbol index.
2028 // Symbol table of the output object.
2029 Symbol_table* symbol_table_;
2030 // Layout of the output object.
2032 // Static relocs to be applied to the GOT.
2033 std::vector<Static_reloc> static_relocs_;
2036 // The ARM target has many relocation types with odd-sizes or noncontiguous
2037 // bits. The default handling of relocatable relocation cannot process these
2038 // relocations. So we have to extend the default code.
2040 template<bool big_endian, int sh_type, typename Classify_reloc>
2041 class Arm_scan_relocatable_relocs :
2042 public Default_scan_relocatable_relocs<sh_type, Classify_reloc>
2045 // Return the strategy to use for a local symbol which is a section
2046 // symbol, given the relocation type.
2047 inline Relocatable_relocs::Reloc_strategy
2048 local_section_strategy(unsigned int r_type, Relobj*)
2050 if (sh_type == elfcpp::SHT_RELA)
2051 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA;
2054 if (r_type == elfcpp::R_ARM_TARGET1
2055 || r_type == elfcpp::R_ARM_TARGET2)
2057 const Target_arm<big_endian>* arm_target =
2058 Target_arm<big_endian>::default_target();
2059 r_type = arm_target->get_real_reloc_type(r_type);
2064 // Relocations that write nothing. These exclude R_ARM_TARGET1
2065 // and R_ARM_TARGET2.
2066 case elfcpp::R_ARM_NONE:
2067 case elfcpp::R_ARM_V4BX:
2068 case elfcpp::R_ARM_TLS_GOTDESC:
2069 case elfcpp::R_ARM_TLS_CALL:
2070 case elfcpp::R_ARM_TLS_DESCSEQ:
2071 case elfcpp::R_ARM_THM_TLS_CALL:
2072 case elfcpp::R_ARM_GOTRELAX:
2073 case elfcpp::R_ARM_GNU_VTENTRY:
2074 case elfcpp::R_ARM_GNU_VTINHERIT:
2075 case elfcpp::R_ARM_THM_TLS_DESCSEQ16:
2076 case elfcpp::R_ARM_THM_TLS_DESCSEQ32:
2077 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0;
2078 // These should have been converted to something else above.
2079 case elfcpp::R_ARM_TARGET1:
2080 case elfcpp::R_ARM_TARGET2:
2082 // Relocations that write full 32 bits and
2083 // have alignment of 1.
2084 case elfcpp::R_ARM_ABS32:
2085 case elfcpp::R_ARM_REL32:
2086 case elfcpp::R_ARM_SBREL32:
2087 case elfcpp::R_ARM_GOTOFF32:
2088 case elfcpp::R_ARM_BASE_PREL:
2089 case elfcpp::R_ARM_GOT_BREL:
2090 case elfcpp::R_ARM_BASE_ABS:
2091 case elfcpp::R_ARM_ABS32_NOI:
2092 case elfcpp::R_ARM_REL32_NOI:
2093 case elfcpp::R_ARM_PLT32_ABS:
2094 case elfcpp::R_ARM_GOT_ABS:
2095 case elfcpp::R_ARM_GOT_PREL:
2096 case elfcpp::R_ARM_TLS_GD32:
2097 case elfcpp::R_ARM_TLS_LDM32:
2098 case elfcpp::R_ARM_TLS_LDO32:
2099 case elfcpp::R_ARM_TLS_IE32:
2100 case elfcpp::R_ARM_TLS_LE32:
2101 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED;
2103 // For all other static relocations, return RELOC_SPECIAL.
2104 return Relocatable_relocs::RELOC_SPECIAL;
2110 template<bool big_endian>
2111 class Target_arm : public Sized_target<32, big_endian>
2114 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
2117 // When were are relocating a stub, we pass this as the relocation number.
2118 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
2120 Target_arm(const Target::Target_info* info = &arm_info)
2121 : Sized_target<32, big_endian>(info),
2122 got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL),
2123 rel_dyn_(NULL), rel_irelative_(NULL), copy_relocs_(elfcpp::R_ARM_COPY),
2124 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2125 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2126 should_force_pic_veneer_(false),
2127 arm_input_section_map_(), attributes_section_data_(NULL),
2128 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2131 // Whether we force PCI branch veneers.
2133 should_force_pic_veneer() const
2134 { return this->should_force_pic_veneer_; }
2136 // Set PIC veneer flag.
2138 set_should_force_pic_veneer(bool value)
2139 { this->should_force_pic_veneer_ = value; }
2141 // Whether we use THUMB-2 instructions.
2143 using_thumb2() const
2145 Object_attribute* attr =
2146 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2147 int arch = attr->int_value();
2148 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
2151 // Whether we use THUMB/THUMB-2 instructions only.
2153 using_thumb_only() const
2155 Object_attribute* attr =
2156 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2158 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2159 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M)
2161 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
2162 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
2164 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
2165 return attr->int_value() == 'M';
2168 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2170 may_use_arm_nop() const
2172 Object_attribute* attr =
2173 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2174 int arch = attr->int_value();
2175 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2176 || arch == elfcpp::TAG_CPU_ARCH_V6K
2177 || arch == elfcpp::TAG_CPU_ARCH_V7
2178 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2181 // Whether we have THUMB-2 NOP.W instruction.
2183 may_use_thumb2_nop() const
2185 Object_attribute* attr =
2186 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2187 int arch = attr->int_value();
2188 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2189 || arch == elfcpp::TAG_CPU_ARCH_V7
2190 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2193 // Whether we have v4T interworking instructions available.
2195 may_use_v4t_interworking() const
2197 Object_attribute* attr =
2198 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2199 int arch = attr->int_value();
2200 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2201 && arch != elfcpp::TAG_CPU_ARCH_V4);
2204 // Whether we have v5T interworking instructions available.
2206 may_use_v5t_interworking() const
2208 Object_attribute* attr =
2209 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2210 int arch = attr->int_value();
2211 if (parameters->options().fix_arm1176())
2212 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2213 || arch == elfcpp::TAG_CPU_ARCH_V7
2214 || arch == elfcpp::TAG_CPU_ARCH_V6_M
2215 || arch == elfcpp::TAG_CPU_ARCH_V6S_M
2216 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2218 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2219 && arch != elfcpp::TAG_CPU_ARCH_V4
2220 && arch != elfcpp::TAG_CPU_ARCH_V4T);
2223 // Process the relocations to determine unreferenced sections for
2224 // garbage collection.
2226 gc_process_relocs(Symbol_table* symtab,
2228 Sized_relobj_file<32, big_endian>* object,
2229 unsigned int data_shndx,
2230 unsigned int sh_type,
2231 const unsigned char* prelocs,
2233 Output_section* output_section,
2234 bool needs_special_offset_handling,
2235 size_t local_symbol_count,
2236 const unsigned char* plocal_symbols);
2238 // Scan the relocations to look for symbol adjustments.
2240 scan_relocs(Symbol_table* symtab,
2242 Sized_relobj_file<32, big_endian>* object,
2243 unsigned int data_shndx,
2244 unsigned int sh_type,
2245 const unsigned char* prelocs,
2247 Output_section* output_section,
2248 bool needs_special_offset_handling,
2249 size_t local_symbol_count,
2250 const unsigned char* plocal_symbols);
2252 // Finalize the sections.
2254 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
2256 // Return the value to use for a dynamic symbol which requires special
2259 do_dynsym_value(const Symbol*) const;
2261 // Return the plt address for globals. Since we have irelative plt entries,
2262 // address calculation is not as straightforward as plt_address + plt_offset.
2264 do_plt_address_for_global(const Symbol* gsym) const
2265 { return this->plt_section()->address_for_global(gsym); }
2267 // Return the plt address for locals. Since we have irelative plt entries,
2268 // address calculation is not as straightforward as plt_address + plt_offset.
2270 do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const
2271 { return this->plt_section()->address_for_local(relobj, symndx); }
2273 // Relocate a section.
2275 relocate_section(const Relocate_info<32, big_endian>*,
2276 unsigned int sh_type,
2277 const unsigned char* prelocs,
2279 Output_section* output_section,
2280 bool needs_special_offset_handling,
2281 unsigned char* view,
2282 Arm_address view_address,
2283 section_size_type view_size,
2284 const Reloc_symbol_changes*);
2286 // Scan the relocs during a relocatable link.
2288 scan_relocatable_relocs(Symbol_table* symtab,
2290 Sized_relobj_file<32, big_endian>* object,
2291 unsigned int data_shndx,
2292 unsigned int sh_type,
2293 const unsigned char* prelocs,
2295 Output_section* output_section,
2296 bool needs_special_offset_handling,
2297 size_t local_symbol_count,
2298 const unsigned char* plocal_symbols,
2299 Relocatable_relocs*);
2301 // Emit relocations for a section.
2303 relocate_relocs(const Relocate_info<32, big_endian>*,
2304 unsigned int sh_type,
2305 const unsigned char* prelocs,
2307 Output_section* output_section,
2308 typename elfcpp::Elf_types<32>::Elf_Off
2309 offset_in_output_section,
2310 const Relocatable_relocs*,
2311 unsigned char* view,
2312 Arm_address view_address,
2313 section_size_type view_size,
2314 unsigned char* reloc_view,
2315 section_size_type reloc_view_size);
2317 // Perform target-specific processing in a relocatable link. This is
2318 // only used if we use the relocation strategy RELOC_SPECIAL.
2320 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo,
2321 unsigned int sh_type,
2322 const unsigned char* preloc_in,
2324 Output_section* output_section,
2325 typename elfcpp::Elf_types<32>::Elf_Off
2326 offset_in_output_section,
2327 unsigned char* view,
2328 typename elfcpp::Elf_types<32>::Elf_Addr
2330 section_size_type view_size,
2331 unsigned char* preloc_out);
2333 // Return whether SYM is defined by the ABI.
2335 do_is_defined_by_abi(const Symbol* sym) const
2336 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
2338 // Return whether there is a GOT section.
2340 has_got_section() const
2341 { return this->got_ != NULL; }
2343 // Return the size of the GOT section.
2347 gold_assert(this->got_ != NULL);
2348 return this->got_->data_size();
2351 // Return the number of entries in the GOT.
2353 got_entry_count() const
2355 if (!this->has_got_section())
2357 return this->got_size() / 4;
2360 // Return the number of entries in the PLT.
2362 plt_entry_count() const;
2364 // Return the offset of the first non-reserved PLT entry.
2366 first_plt_entry_offset() const;
2368 // Return the size of each PLT entry.
2370 plt_entry_size() const;
2372 // Get the section to use for IRELATIVE relocations, create it if necessary.
2374 rel_irelative_section(Layout*);
2376 // Map platform-specific reloc types
2378 get_real_reloc_type(unsigned int r_type);
2381 // Methods to support stub-generations.
2384 // Return the stub factory
2386 stub_factory() const
2387 { return this->stub_factory_; }
2389 // Make a new Arm_input_section object.
2390 Arm_input_section<big_endian>*
2391 new_arm_input_section(Relobj*, unsigned int);
2393 // Find the Arm_input_section object corresponding to the SHNDX-th input
2394 // section of RELOBJ.
2395 Arm_input_section<big_endian>*
2396 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2398 // Make a new Stub_table
2399 Stub_table<big_endian>*
2400 new_stub_table(Arm_input_section<big_endian>*);
2402 // Scan a section for stub generation.
2404 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2405 const unsigned char*, size_t, Output_section*,
2406 bool, const unsigned char*, Arm_address,
2411 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2412 Output_section*, unsigned char*, Arm_address,
2415 // Get the default ARM target.
2416 static Target_arm<big_endian>*
2419 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2420 && parameters->target().is_big_endian() == big_endian);
2421 return static_cast<Target_arm<big_endian>*>(
2422 parameters->sized_target<32, big_endian>());
2425 // Whether NAME belongs to a mapping symbol.
2427 is_mapping_symbol_name(const char* name)
2431 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2432 && (name[2] == '\0' || name[2] == '.'));
2435 // Whether we work around the Cortex-A8 erratum.
2437 fix_cortex_a8() const
2438 { return this->fix_cortex_a8_; }
2440 // Whether we merge exidx entries in debuginfo.
2442 merge_exidx_entries() const
2443 { return parameters->options().merge_exidx_entries(); }
2445 // Whether we fix R_ARM_V4BX relocation.
2447 // 1 - replace with MOV instruction (armv4 target)
2448 // 2 - make interworking veneer (>= armv4t targets only)
2449 General_options::Fix_v4bx
2451 { return parameters->options().fix_v4bx(); }
2453 // Scan a span of THUMB code section for Cortex-A8 erratum.
2455 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2456 section_size_type, section_size_type,
2457 const unsigned char*, Arm_address);
2459 // Apply Cortex-A8 workaround to a branch.
2461 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2462 unsigned char*, Arm_address);
2465 // Make the PLT-generator object.
2466 Output_data_plt_arm<big_endian>*
2467 make_data_plt(Layout* layout,
2468 Arm_output_data_got<big_endian>* got,
2469 Output_data_space* got_plt,
2470 Output_data_space* got_irelative)
2471 { return this->do_make_data_plt(layout, got, got_plt, got_irelative); }
2473 // Make an ELF object.
2475 do_make_elf_object(const std::string&, Input_file*, off_t,
2476 const elfcpp::Ehdr<32, big_endian>& ehdr);
2479 do_make_elf_object(const std::string&, Input_file*, off_t,
2480 const elfcpp::Ehdr<32, !big_endian>&)
2481 { gold_unreachable(); }
2484 do_make_elf_object(const std::string&, Input_file*, off_t,
2485 const elfcpp::Ehdr<64, false>&)
2486 { gold_unreachable(); }
2489 do_make_elf_object(const std::string&, Input_file*, off_t,
2490 const elfcpp::Ehdr<64, true>&)
2491 { gold_unreachable(); }
2493 // Make an output section.
2495 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2496 elfcpp::Elf_Xword flags)
2497 { return new Arm_output_section<big_endian>(name, type, flags); }
2500 do_adjust_elf_header(unsigned char* view, int len);
2502 // We only need to generate stubs, and hence perform relaxation if we are
2503 // not doing relocatable linking.
2505 do_may_relax() const
2506 { return !parameters->options().relocatable(); }
2509 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*);
2511 // Determine whether an object attribute tag takes an integer, a
2514 do_attribute_arg_type(int tag) const;
2516 // Reorder tags during output.
2518 do_attributes_order(int num) const;
2520 // This is called when the target is selected as the default.
2522 do_select_as_default_target()
2524 // No locking is required since there should only be one default target.
2525 // We cannot have both the big-endian and little-endian ARM targets
2527 gold_assert(arm_reloc_property_table == NULL);
2528 arm_reloc_property_table = new Arm_reloc_property_table();
2531 // Virtual function which is set to return true by a target if
2532 // it can use relocation types to determine if a function's
2533 // pointer is taken.
2535 do_can_check_for_function_pointers() const
2538 // Whether a section called SECTION_NAME may have function pointers to
2539 // sections not eligible for safe ICF folding.
2541 do_section_may_have_icf_unsafe_pointers(const char* section_name) const
2543 return (!is_prefix_of(".ARM.exidx", section_name)
2544 && !is_prefix_of(".ARM.extab", section_name)
2545 && Target::do_section_may_have_icf_unsafe_pointers(section_name));
2549 do_define_standard_symbols(Symbol_table*, Layout*);
2551 virtual Output_data_plt_arm<big_endian>*
2552 do_make_data_plt(Layout* layout,
2553 Arm_output_data_got<big_endian>* got,
2554 Output_data_space* got_plt,
2555 Output_data_space* got_irelative)
2557 gold_assert(got_plt != NULL && got_irelative != NULL);
2558 return new Output_data_plt_arm_standard<big_endian>(
2559 layout, got, got_plt, got_irelative);
2563 // The class which scans relocations.
2568 : issued_non_pic_error_(false)
2572 get_reference_flags(unsigned int r_type);
2575 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2576 Sized_relobj_file<32, big_endian>* object,
2577 unsigned int data_shndx,
2578 Output_section* output_section,
2579 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2580 const elfcpp::Sym<32, big_endian>& lsym,
2584 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2585 Sized_relobj_file<32, big_endian>* object,
2586 unsigned int data_shndx,
2587 Output_section* output_section,
2588 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2592 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2593 Sized_relobj_file<32, big_endian>* ,
2596 const elfcpp::Rel<32, big_endian>& ,
2598 const elfcpp::Sym<32, big_endian>&);
2601 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2602 Sized_relobj_file<32, big_endian>* ,
2605 const elfcpp::Rel<32, big_endian>& ,
2606 unsigned int , Symbol*);
2610 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*,
2611 unsigned int r_type);
2614 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*,
2615 unsigned int r_type, Symbol*);
2618 check_non_pic(Relobj*, unsigned int r_type);
2620 // Almost identical to Symbol::needs_plt_entry except that it also
2621 // handles STT_ARM_TFUNC.
2623 symbol_needs_plt_entry(const Symbol* sym)
2625 // An undefined symbol from an executable does not need a PLT entry.
2626 if (sym->is_undefined() && !parameters->options().shared())
2629 if (sym->type() == elfcpp::STT_GNU_IFUNC)
2632 return (!parameters->doing_static_link()
2633 && (sym->type() == elfcpp::STT_FUNC
2634 || sym->type() == elfcpp::STT_ARM_TFUNC)
2635 && (sym->is_from_dynobj()
2636 || sym->is_undefined()
2637 || sym->is_preemptible()));
2641 possible_function_pointer_reloc(unsigned int r_type);
2643 // Whether a plt entry is needed for ifunc.
2645 reloc_needs_plt_for_ifunc(Sized_relobj_file<32, big_endian>*,
2646 unsigned int r_type);
2648 // Whether we have issued an error about a non-PIC compilation.
2649 bool issued_non_pic_error_;
2652 // The class which implements relocation.
2662 // Return whether the static relocation needs to be applied.
2664 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2665 unsigned int r_type,
2667 Output_section* output_section);
2669 // Do a relocation. Return false if the caller should not issue
2670 // any warnings about this relocation.
2672 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2673 Output_section*, size_t relnum,
2674 const elfcpp::Rel<32, big_endian>&,
2675 unsigned int r_type, const Sized_symbol<32>*,
2676 const Symbol_value<32>*,
2677 unsigned char*, Arm_address,
2680 // Return whether we want to pass flag NON_PIC_REF for this
2681 // reloc. This means the relocation type accesses a symbol not via
2684 reloc_is_non_pic(unsigned int r_type)
2688 // These relocation types reference GOT or PLT entries explicitly.
2689 case elfcpp::R_ARM_GOT_BREL:
2690 case elfcpp::R_ARM_GOT_ABS:
2691 case elfcpp::R_ARM_GOT_PREL:
2692 case elfcpp::R_ARM_GOT_BREL12:
2693 case elfcpp::R_ARM_PLT32_ABS:
2694 case elfcpp::R_ARM_TLS_GD32:
2695 case elfcpp::R_ARM_TLS_LDM32:
2696 case elfcpp::R_ARM_TLS_IE32:
2697 case elfcpp::R_ARM_TLS_IE12GP:
2699 // These relocate types may use PLT entries.
2700 case elfcpp::R_ARM_CALL:
2701 case elfcpp::R_ARM_THM_CALL:
2702 case elfcpp::R_ARM_JUMP24:
2703 case elfcpp::R_ARM_THM_JUMP24:
2704 case elfcpp::R_ARM_THM_JUMP19:
2705 case elfcpp::R_ARM_PLT32:
2706 case elfcpp::R_ARM_THM_XPC22:
2707 case elfcpp::R_ARM_PREL31:
2708 case elfcpp::R_ARM_SBREL31:
2717 // Do a TLS relocation.
2718 inline typename Arm_relocate_functions<big_endian>::Status
2719 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*,
2720 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int,
2721 const Sized_symbol<32>*, const Symbol_value<32>*,
2722 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr,
2727 // A class which returns the size required for a relocation type,
2728 // used while scanning relocs during a relocatable link.
2729 class Relocatable_size_for_reloc
2733 get_size_for_reloc(unsigned int, Relobj*);
2736 // Adjust TLS relocation type based on the options and whether this
2737 // is a local symbol.
2738 static tls::Tls_optimization
2739 optimize_tls_reloc(bool is_final, int r_type);
2741 // Get the GOT section, creating it if necessary.
2742 Arm_output_data_got<big_endian>*
2743 got_section(Symbol_table*, Layout*);
2745 // Get the GOT PLT section.
2747 got_plt_section() const
2749 gold_assert(this->got_plt_ != NULL);
2750 return this->got_plt_;
2753 // Create the PLT section.
2755 make_plt_section(Symbol_table* symtab, Layout* layout);
2757 // Create a PLT entry for a global symbol.
2759 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2761 // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2763 make_local_ifunc_plt_entry(Symbol_table*, Layout*,
2764 Sized_relobj_file<32, big_endian>* relobj,
2765 unsigned int local_sym_index);
2767 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2769 define_tls_base_symbol(Symbol_table*, Layout*);
2771 // Create a GOT entry for the TLS module index.
2773 got_mod_index_entry(Symbol_table* symtab, Layout* layout,
2774 Sized_relobj_file<32, big_endian>* object);
2776 // Get the PLT section.
2777 const Output_data_plt_arm<big_endian>*
2780 gold_assert(this->plt_ != NULL);
2784 // Get the dynamic reloc section, creating it if necessary.
2786 rel_dyn_section(Layout*);
2788 // Get the section to use for TLS_DESC relocations.
2790 rel_tls_desc_section(Layout*) const;
2792 // Return true if the symbol may need a COPY relocation.
2793 // References from an executable object to non-function symbols
2794 // defined in a dynamic object may need a COPY relocation.
2796 may_need_copy_reloc(Symbol* gsym)
2798 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2799 && gsym->may_need_copy_reloc());
2802 // Add a potential copy relocation.
2804 copy_reloc(Symbol_table* symtab, Layout* layout,
2805 Sized_relobj_file<32, big_endian>* object,
2806 unsigned int shndx, Output_section* output_section,
2807 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2809 this->copy_relocs_.copy_reloc(symtab, layout,
2810 symtab->get_sized_symbol<32>(sym),
2811 object, shndx, output_section, reloc,
2812 this->rel_dyn_section(layout));
2815 // Whether two EABI versions are compatible.
2817 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2819 // Merge processor-specific flags from input object and those in the ELF
2820 // header of the output.
2822 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2824 // Get the secondary compatible architecture.
2826 get_secondary_compatible_arch(const Attributes_section_data*);
2828 // Set the secondary compatible architecture.
2830 set_secondary_compatible_arch(Attributes_section_data*, int);
2833 tag_cpu_arch_combine(const char*, int, int*, int, int);
2835 // Helper to print AEABI enum tag value.
2837 aeabi_enum_name(unsigned int);
2839 // Return string value for TAG_CPU_name.
2841 tag_cpu_name_value(unsigned int);
2843 // Query attributes object to see if integer divide instructions may be
2844 // present in an object.
2846 attributes_accept_div(int arch, int profile,
2847 const Object_attribute* div_attr);
2849 // Query attributes object to see if integer divide instructions are
2850 // forbidden to be in the object. This is not the inverse of
2851 // attributes_accept_div.
2853 attributes_forbid_div(const Object_attribute* div_attr);
2855 // Merge object attributes from input object and those in the output.
2857 merge_object_attributes(const char*, const Attributes_section_data*);
2859 // Helper to get an AEABI object attribute
2861 get_aeabi_object_attribute(int tag) const
2863 Attributes_section_data* pasd = this->attributes_section_data_;
2864 gold_assert(pasd != NULL);
2865 Object_attribute* attr =
2866 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2867 gold_assert(attr != NULL);
2872 // Methods to support stub-generations.
2875 // Group input sections for stub generation.
2877 group_sections(Layout*, section_size_type, bool, const Task*);
2879 // Scan a relocation for stub generation.
2881 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2882 const Sized_symbol<32>*, unsigned int,
2883 const Symbol_value<32>*,
2884 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2886 // Scan a relocation section for stub.
2887 template<int sh_type>
2889 scan_reloc_section_for_stubs(
2890 const Relocate_info<32, big_endian>* relinfo,
2891 const unsigned char* prelocs,
2893 Output_section* output_section,
2894 bool needs_special_offset_handling,
2895 const unsigned char* view,
2896 elfcpp::Elf_types<32>::Elf_Addr view_address,
2899 // Fix .ARM.exidx section coverage.
2901 fix_exidx_coverage(Layout*, const Input_objects*,
2902 Arm_output_section<big_endian>*, Symbol_table*,
2905 // Functors for STL set.
2906 struct output_section_address_less_than
2909 operator()(const Output_section* s1, const Output_section* s2) const
2910 { return s1->address() < s2->address(); }
2913 // Information about this specific target which we pass to the
2914 // general Target structure.
2915 static const Target::Target_info arm_info;
2917 // The types of GOT entries needed for this platform.
2918 // These values are exposed to the ABI in an incremental link.
2919 // Do not renumber existing values without changing the version
2920 // number of the .gnu_incremental_inputs section.
2923 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol
2924 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset
2925 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset
2926 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair
2927 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair
2930 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2932 // Map input section to Arm_input_section.
2933 typedef Unordered_map<Section_id,
2934 Arm_input_section<big_endian>*,
2936 Arm_input_section_map;
2938 // Map output addresses to relocs for Cortex-A8 erratum.
2939 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2940 Cortex_a8_relocs_info;
2943 Arm_output_data_got<big_endian>* got_;
2945 Output_data_plt_arm<big_endian>* plt_;
2946 // The GOT PLT section.
2947 Output_data_space* got_plt_;
2948 // The GOT section for IRELATIVE relocations.
2949 Output_data_space* got_irelative_;
2950 // The dynamic reloc section.
2951 Reloc_section* rel_dyn_;
2952 // The section to use for IRELATIVE relocs.
2953 Reloc_section* rel_irelative_;
2954 // Relocs saved to avoid a COPY reloc.
2955 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2956 // Offset of the GOT entry for the TLS module index.
2957 unsigned int got_mod_index_offset_;
2958 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2959 bool tls_base_symbol_defined_;
2960 // Vector of Stub_tables created.
2961 Stub_table_list stub_tables_;
2963 const Stub_factory &stub_factory_;
2964 // Whether we force PIC branch veneers.
2965 bool should_force_pic_veneer_;
2966 // Map for locating Arm_input_sections.
2967 Arm_input_section_map arm_input_section_map_;
2968 // Attributes section data in output.
2969 Attributes_section_data* attributes_section_data_;
2970 // Whether we want to fix code for Cortex-A8 erratum.
2971 bool fix_cortex_a8_;
2972 // Map addresses to relocs for Cortex-A8 erratum.
2973 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2976 template<bool big_endian>
2977 const Target::Target_info Target_arm<big_endian>::arm_info =
2980 big_endian, // is_big_endian
2981 elfcpp::EM_ARM, // machine_code
2982 false, // has_make_symbol
2983 false, // has_resolve
2984 false, // has_code_fill
2985 true, // is_default_stack_executable
2986 false, // can_icf_inline_merge_sections
2988 "/usr/lib/libc.so.1", // dynamic_linker
2989 0x8000, // default_text_segment_address
2990 0x1000, // abi_pagesize (overridable by -z max-page-size)
2991 0x1000, // common_pagesize (overridable by -z common-page-size)
2992 false, // isolate_execinstr
2994 elfcpp::SHN_UNDEF, // small_common_shndx
2995 elfcpp::SHN_UNDEF, // large_common_shndx
2996 0, // small_common_section_flags
2997 0, // large_common_section_flags
2998 ".ARM.attributes", // attributes_section
2999 "aeabi", // attributes_vendor
3000 "_start" // entry_symbol_name
3003 // Arm relocate functions class
3006 template<bool big_endian>
3007 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
3012 STATUS_OKAY, // No error during relocation.
3013 STATUS_OVERFLOW, // Relocation overflow.
3014 STATUS_BAD_RELOC // Relocation cannot be applied.
3018 typedef Relocate_functions<32, big_endian> Base;
3019 typedef Arm_relocate_functions<big_endian> This;
3021 // Encoding of imm16 argument for movt and movw ARM instructions
3024 // imm16 := imm4 | imm12
3026 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3027 // +-------+---------------+-------+-------+-----------------------+
3028 // | | |imm4 | |imm12 |
3029 // +-------+---------------+-------+-------+-----------------------+
3031 // Extract the relocation addend from VAL based on the ARM
3032 // instruction encoding described above.
3033 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3034 extract_arm_movw_movt_addend(
3035 typename elfcpp::Swap<32, big_endian>::Valtype val)
3037 // According to the Elf ABI for ARM Architecture the immediate
3038 // field is sign-extended to form the addend.
3039 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff));
3042 // Insert X into VAL based on the ARM instruction encoding described
3044 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3045 insert_val_arm_movw_movt(
3046 typename elfcpp::Swap<32, big_endian>::Valtype val,
3047 typename elfcpp::Swap<32, big_endian>::Valtype x)
3051 val |= (x & 0xf000) << 4;
3055 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3058 // imm16 := imm4 | i | imm3 | imm8
3060 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3061 // +---------+-+-----------+-------++-+-----+-------+---------------+
3062 // | |i| |imm4 || |imm3 | |imm8 |
3063 // +---------+-+-----------+-------++-+-----+-------+---------------+
3065 // Extract the relocation addend from VAL based on the Thumb2
3066 // instruction encoding described above.
3067 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3068 extract_thumb_movw_movt_addend(
3069 typename elfcpp::Swap<32, big_endian>::Valtype val)
3071 // According to the Elf ABI for ARM Architecture the immediate
3072 // field is sign-extended to form the addend.
3073 return Bits<16>::sign_extend32(((val >> 4) & 0xf000)
3074 | ((val >> 15) & 0x0800)
3075 | ((val >> 4) & 0x0700)
3079 // Insert X into VAL based on the Thumb2 instruction encoding
3081 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3082 insert_val_thumb_movw_movt(
3083 typename elfcpp::Swap<32, big_endian>::Valtype val,
3084 typename elfcpp::Swap<32, big_endian>::Valtype x)
3087 val |= (x & 0xf000) << 4;
3088 val |= (x & 0x0800) << 15;
3089 val |= (x & 0x0700) << 4;
3090 val |= (x & 0x00ff);
3094 // Calculate the smallest constant Kn for the specified residual.
3095 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3097 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
3103 // Determine the most significant bit in the residual and
3104 // align the resulting value to a 2-bit boundary.
3105 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
3107 // The desired shift is now (msb - 6), or zero, whichever
3109 return (((msb - 6) < 0) ? 0 : (msb - 6));
3112 // Calculate the final residual for the specified group index.
3113 // If the passed group index is less than zero, the method will return
3114 // the value of the specified residual without any change.
3115 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3116 static typename elfcpp::Swap<32, big_endian>::Valtype
3117 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3120 for (int n = 0; n <= group; n++)
3122 // Calculate which part of the value to mask.
3123 uint32_t shift = calc_grp_kn(residual);
3124 // Calculate the residual for the next time around.
3125 residual &= ~(residual & (0xff << shift));
3131 // Calculate the value of Gn for the specified group index.
3132 // We return it in the form of an encoded constant-and-rotation.
3133 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3134 static typename elfcpp::Swap<32, big_endian>::Valtype
3135 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3138 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
3141 for (int n = 0; n <= group; n++)
3143 // Calculate which part of the value to mask.
3144 shift = calc_grp_kn(residual);
3145 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3146 gn = residual & (0xff << shift);
3147 // Calculate the residual for the next time around.
3150 // Return Gn in the form of an encoded constant-and-rotation.
3151 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
3155 // Handle ARM long branches.
3156 static typename This::Status
3157 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3158 unsigned char*, const Sized_symbol<32>*,
3159 const Arm_relobj<big_endian>*, unsigned int,
3160 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3162 // Handle THUMB long branches.
3163 static typename This::Status
3164 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3165 unsigned char*, const Sized_symbol<32>*,
3166 const Arm_relobj<big_endian>*, unsigned int,
3167 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3170 // Return the branch offset of a 32-bit THUMB branch.
3171 static inline int32_t
3172 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3174 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3175 // involving the J1 and J2 bits.
3176 uint32_t s = (upper_insn & (1U << 10)) >> 10;
3177 uint32_t upper = upper_insn & 0x3ffU;
3178 uint32_t lower = lower_insn & 0x7ffU;
3179 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
3180 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
3181 uint32_t i1 = j1 ^ s ? 0 : 1;
3182 uint32_t i2 = j2 ^ s ? 0 : 1;
3184 return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22)
3185 | (upper << 12) | (lower << 1));
3188 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3189 // UPPER_INSN is the original upper instruction of the branch. Caller is
3190 // responsible for overflow checking and BLX offset adjustment.
3191 static inline uint16_t
3192 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
3194 uint32_t s = offset < 0 ? 1 : 0;
3195 uint32_t bits = static_cast<uint32_t>(offset);
3196 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
3199 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3200 // LOWER_INSN is the original lower instruction of the branch. Caller is
3201 // responsible for overflow checking and BLX offset adjustment.
3202 static inline uint16_t
3203 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
3205 uint32_t s = offset < 0 ? 1 : 0;
3206 uint32_t bits = static_cast<uint32_t>(offset);
3207 return ((lower_insn & ~0x2fffU)
3208 | ((((bits >> 23) & 1) ^ !s) << 13)
3209 | ((((bits >> 22) & 1) ^ !s) << 11)
3210 | ((bits >> 1) & 0x7ffU));
3213 // Return the branch offset of a 32-bit THUMB conditional branch.
3214 static inline int32_t
3215 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3217 uint32_t s = (upper_insn & 0x0400U) >> 10;
3218 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
3219 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
3220 uint32_t lower = (lower_insn & 0x07ffU);
3221 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
3223 return Bits<21>::sign_extend32((upper << 12) | (lower << 1));
3226 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3227 // instruction. UPPER_INSN is the original upper instruction of the branch.
3228 // Caller is responsible for overflow checking.
3229 static inline uint16_t
3230 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
3232 uint32_t s = offset < 0 ? 1 : 0;
3233 uint32_t bits = static_cast<uint32_t>(offset);
3234 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
3237 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3238 // instruction. LOWER_INSN is the original lower instruction of the branch.
3239 // The caller is responsible for overflow checking.
3240 static inline uint16_t
3241 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
3243 uint32_t bits = static_cast<uint32_t>(offset);
3244 uint32_t j2 = (bits & 0x00080000U) >> 19;
3245 uint32_t j1 = (bits & 0x00040000U) >> 18;
3246 uint32_t lo = (bits & 0x00000ffeU) >> 1;
3248 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
3251 // R_ARM_ABS8: S + A
3252 static inline typename This::Status
3253 abs8(unsigned char* view,
3254 const Sized_relobj_file<32, big_endian>* object,
3255 const Symbol_value<32>* psymval)
3257 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
3258 Valtype* wv = reinterpret_cast<Valtype*>(view);
3259 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
3260 int32_t addend = Bits<8>::sign_extend32(val);
3261 Arm_address x = psymval->value(object, addend);
3262 val = Bits<32>::bit_select32(val, x, 0xffU);
3263 elfcpp::Swap<8, big_endian>::writeval(wv, val);
3265 // R_ARM_ABS8 permits signed or unsigned results.
3266 return (Bits<8>::has_signed_unsigned_overflow32(x)
3267 ? This::STATUS_OVERFLOW
3268 : This::STATUS_OKAY);
3271 // R_ARM_THM_ABS5: S + A
3272 static inline typename This::Status
3273 thm_abs5(unsigned char* view,
3274 const Sized_relobj_file<32, big_endian>* object,
3275 const Symbol_value<32>* psymval)
3277 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3278 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3279 Valtype* wv = reinterpret_cast<Valtype*>(view);
3280 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3281 Reltype addend = (val & 0x7e0U) >> 6;
3282 Reltype x = psymval->value(object, addend);
3283 val = Bits<32>::bit_select32(val, x << 6, 0x7e0U);
3284 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3285 return (Bits<5>::has_overflow32(x)
3286 ? This::STATUS_OVERFLOW
3287 : This::STATUS_OKAY);
3290 // R_ARM_ABS12: S + A
3291 static inline typename This::Status
3292 abs12(unsigned char* view,
3293 const Sized_relobj_file<32, big_endian>* object,
3294 const Symbol_value<32>* psymval)
3296 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3297 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3298 Valtype* wv = reinterpret_cast<Valtype*>(view);
3299 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3300 Reltype addend = val & 0x0fffU;
3301 Reltype x = psymval->value(object, addend);
3302 val = Bits<32>::bit_select32(val, x, 0x0fffU);
3303 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3304 return (Bits<12>::has_overflow32(x)
3305 ? This::STATUS_OVERFLOW
3306 : This::STATUS_OKAY);
3309 // R_ARM_ABS16: S + A
3310 static inline typename This::Status
3311 abs16(unsigned char* view,
3312 const Sized_relobj_file<32, big_endian>* object,
3313 const Symbol_value<32>* psymval)
3315 typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype;
3316 Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view);
3317 int32_t addend = Bits<16>::sign_extend32(val);
3318 Arm_address x = psymval->value(object, addend);
3319 val = Bits<32>::bit_select32(val, x, 0xffffU);
3320 elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val);
3322 // R_ARM_ABS16 permits signed or unsigned results.
3323 return (Bits<16>::has_signed_unsigned_overflow32(x)
3324 ? This::STATUS_OVERFLOW
3325 : This::STATUS_OKAY);
3328 // R_ARM_ABS32: (S + A) | T
3329 static inline typename This::Status
3330 abs32(unsigned char* view,
3331 const Sized_relobj_file<32, big_endian>* object,
3332 const Symbol_value<32>* psymval,
3333 Arm_address thumb_bit)
3335 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3336 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3337 Valtype x = psymval->value(object, addend) | thumb_bit;
3338 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3339 return This::STATUS_OKAY;
3342 // R_ARM_REL32: (S + A) | T - P
3343 static inline typename This::Status
3344 rel32(unsigned char* view,
3345 const Sized_relobj_file<32, big_endian>* object,
3346 const Symbol_value<32>* psymval,
3347 Arm_address address,
3348 Arm_address thumb_bit)
3350 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3351 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3352 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3353 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3354 return This::STATUS_OKAY;
3357 // R_ARM_THM_JUMP24: (S + A) | T - P
3358 static typename This::Status
3359 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object,
3360 const Symbol_value<32>* psymval, Arm_address address,
3361 Arm_address thumb_bit);
3363 // R_ARM_THM_JUMP6: S + A – P
3364 static inline typename This::Status
3365 thm_jump6(unsigned char* view,
3366 const Sized_relobj_file<32, big_endian>* object,
3367 const Symbol_value<32>* psymval,
3368 Arm_address address)
3370 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3371 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3372 Valtype* wv = reinterpret_cast<Valtype*>(view);
3373 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3374 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3375 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
3376 Reltype x = (psymval->value(object, addend) - address);
3377 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
3378 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3379 // CZB does only forward jumps.
3380 return ((x > 0x007e)
3381 ? This::STATUS_OVERFLOW
3382 : This::STATUS_OKAY);
3385 // R_ARM_THM_JUMP8: S + A – P
3386 static inline typename This::Status
3387 thm_jump8(unsigned char* view,
3388 const Sized_relobj_file<32, big_endian>* object,
3389 const Symbol_value<32>* psymval,
3390 Arm_address address)
3392 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3393 Valtype* wv = reinterpret_cast<Valtype*>(view);
3394 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3395 int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1);
3396 int32_t x = (psymval->value(object, addend) - address);
3397 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00)
3398 | ((x & 0x01fe) >> 1)));
3399 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3400 return (Bits<9>::has_overflow32(x)
3401 ? This::STATUS_OVERFLOW
3402 : This::STATUS_OKAY);
3405 // R_ARM_THM_JUMP11: S + A – P
3406 static inline typename This::Status
3407 thm_jump11(unsigned char* view,
3408 const Sized_relobj_file<32, big_endian>* object,
3409 const Symbol_value<32>* psymval,
3410 Arm_address address)
3412 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3413 Valtype* wv = reinterpret_cast<Valtype*>(view);
3414 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3415 int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1);
3416 int32_t x = (psymval->value(object, addend) - address);
3417 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800)
3418 | ((x & 0x0ffe) >> 1)));
3419 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3420 return (Bits<12>::has_overflow32(x)
3421 ? This::STATUS_OVERFLOW
3422 : This::STATUS_OKAY);
3425 // R_ARM_BASE_PREL: B(S) + A - P
3426 static inline typename This::Status
3427 base_prel(unsigned char* view,
3429 Arm_address address)
3431 Base::rel32(view, origin - address);
3435 // R_ARM_BASE_ABS: B(S) + A
3436 static inline typename This::Status
3437 base_abs(unsigned char* view,
3440 Base::rel32(view, origin);
3444 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3445 static inline typename This::Status
3446 got_brel(unsigned char* view,
3447 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
3449 Base::rel32(view, got_offset);
3450 return This::STATUS_OKAY;
3453 // R_ARM_GOT_PREL: GOT(S) + A - P
3454 static inline typename This::Status
3455 got_prel(unsigned char* view,
3456 Arm_address got_entry,
3457 Arm_address address)
3459 Base::rel32(view, got_entry - address);
3460 return This::STATUS_OKAY;
3463 // R_ARM_PREL: (S + A) | T - P
3464 static inline typename This::Status
3465 prel31(unsigned char* view,
3466 const Sized_relobj_file<32, big_endian>* object,
3467 const Symbol_value<32>* psymval,
3468 Arm_address address,
3469 Arm_address thumb_bit)
3471 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3472 Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3473 Valtype addend = Bits<31>::sign_extend32(val);
3474 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3475 val = Bits<32>::bit_select32(val, x, 0x7fffffffU);
3476 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val);
3477 return (Bits<31>::has_overflow32(x)
3478 ? This::STATUS_OVERFLOW
3479 : This::STATUS_OKAY);
3482 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3483 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3484 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3485 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3486 static inline typename This::Status
3487 movw(unsigned char* view,
3488 const Sized_relobj_file<32, big_endian>* object,
3489 const Symbol_value<32>* psymval,
3490 Arm_address relative_address_base,
3491 Arm_address thumb_bit,
3492 bool check_overflow)
3494 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3495 Valtype* wv = reinterpret_cast<Valtype*>(view);
3496 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3497 Valtype addend = This::extract_arm_movw_movt_addend(val);
3498 Valtype x = ((psymval->value(object, addend) | thumb_bit)
3499 - relative_address_base);
3500 val = This::insert_val_arm_movw_movt(val, x);
3501 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3502 return ((check_overflow && Bits<16>::has_overflow32(x))
3503 ? This::STATUS_OVERFLOW
3504 : This::STATUS_OKAY);
3507 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3508 // R_ARM_MOVT_PREL: S + A - P
3509 // R_ARM_MOVT_BREL: S + A - B(S)
3510 static inline typename This::Status
3511 movt(unsigned char* view,
3512 const Sized_relobj_file<32, big_endian>* object,
3513 const Symbol_value<32>* psymval,
3514 Arm_address relative_address_base)
3516 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3517 Valtype* wv = reinterpret_cast<Valtype*>(view);
3518 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3519 Valtype addend = This::extract_arm_movw_movt_addend(val);
3520 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3521 val = This::insert_val_arm_movw_movt(val, x);
3522 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3523 // FIXME: IHI0044D says that we should check for overflow.
3524 return This::STATUS_OKAY;
3527 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3528 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3529 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3530 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3531 static inline typename This::Status
3532 thm_movw(unsigned char* view,
3533 const Sized_relobj_file<32, big_endian>* object,
3534 const Symbol_value<32>* psymval,
3535 Arm_address relative_address_base,
3536 Arm_address thumb_bit,
3537 bool check_overflow)
3539 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3540 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3541 Valtype* wv = reinterpret_cast<Valtype*>(view);
3542 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3543 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3544 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3546 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3547 val = This::insert_val_thumb_movw_movt(val, x);
3548 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3549 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3550 return ((check_overflow && Bits<16>::has_overflow32(x))
3551 ? This::STATUS_OVERFLOW
3552 : This::STATUS_OKAY);
3555 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3556 // R_ARM_THM_MOVT_PREL: S + A - P
3557 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3558 static inline typename This::Status
3559 thm_movt(unsigned char* view,
3560 const Sized_relobj_file<32, big_endian>* object,
3561 const Symbol_value<32>* psymval,
3562 Arm_address relative_address_base)
3564 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3565 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3566 Valtype* wv = reinterpret_cast<Valtype*>(view);
3567 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3568 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3569 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3570 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3571 val = This::insert_val_thumb_movw_movt(val, x);
3572 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3573 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3574 return This::STATUS_OKAY;
3577 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3578 static inline typename This::Status
3579 thm_alu11(unsigned char* view,
3580 const Sized_relobj_file<32, big_endian>* object,
3581 const Symbol_value<32>* psymval,
3582 Arm_address address,
3583 Arm_address thumb_bit)
3585 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3586 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3587 Valtype* wv = reinterpret_cast<Valtype*>(view);
3588 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3589 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3591 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3592 // -----------------------------------------------------------------------
3593 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3594 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3595 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3596 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3597 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3598 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3600 // Determine a sign for the addend.
3601 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3602 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3603 // Thumb2 addend encoding:
3604 // imm12 := i | imm3 | imm8
3605 int32_t addend = (insn & 0xff)
3606 | ((insn & 0x00007000) >> 4)
3607 | ((insn & 0x04000000) >> 15);
3608 // Apply a sign to the added.
3611 int32_t x = (psymval->value(object, addend) | thumb_bit)
3612 - (address & 0xfffffffc);
3613 Reltype val = abs(x);
3614 // Mask out the value and a distinct part of the ADD/SUB opcode
3615 // (bits 7:5 of opword).
3616 insn = (insn & 0xfb0f8f00)
3618 | ((val & 0x700) << 4)
3619 | ((val & 0x800) << 15);
3620 // Set the opcode according to whether the value to go in the
3621 // place is negative.
3625 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3626 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3627 return ((val > 0xfff) ?
3628 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3631 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3632 static inline typename This::Status
3633 thm_pc8(unsigned char* view,
3634 const Sized_relobj_file<32, big_endian>* object,
3635 const Symbol_value<32>* psymval,
3636 Arm_address address)
3638 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3639 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3640 Valtype* wv = reinterpret_cast<Valtype*>(view);
3641 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3642 Reltype addend = ((insn & 0x00ff) << 2);
3643 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3644 Reltype val = abs(x);
3645 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3647 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3648 return ((val > 0x03fc)
3649 ? This::STATUS_OVERFLOW
3650 : This::STATUS_OKAY);
3653 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3654 static inline typename This::Status
3655 thm_pc12(unsigned char* view,
3656 const Sized_relobj_file<32, big_endian>* object,
3657 const Symbol_value<32>* psymval,
3658 Arm_address address)
3660 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3661 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3662 Valtype* wv = reinterpret_cast<Valtype*>(view);
3663 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3664 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3665 // Determine a sign for the addend (positive if the U bit is 1).
3666 const int sign = (insn & 0x00800000) ? 1 : -1;
3667 int32_t addend = (insn & 0xfff);
3668 // Apply a sign to the added.
3671 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3672 Reltype val = abs(x);
3673 // Mask out and apply the value and the U bit.
3674 insn = (insn & 0xff7ff000) | (val & 0xfff);
3675 // Set the U bit according to whether the value to go in the
3676 // place is positive.
3680 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3681 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3682 return ((val > 0xfff) ?
3683 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3687 static inline typename This::Status
3688 v4bx(const Relocate_info<32, big_endian>* relinfo,
3689 unsigned char* view,
3690 const Arm_relobj<big_endian>* object,
3691 const Arm_address address,
3692 const bool is_interworking)
3695 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3696 Valtype* wv = reinterpret_cast<Valtype*>(view);
3697 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3699 // Ensure that we have a BX instruction.
3700 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3701 const uint32_t reg = (val & 0xf);
3702 if (is_interworking && reg != 0xf)
3704 Stub_table<big_endian>* stub_table =
3705 object->stub_table(relinfo->data_shndx);
3706 gold_assert(stub_table != NULL);
3708 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3709 gold_assert(stub != NULL);
3711 int32_t veneer_address =
3712 stub_table->address() + stub->offset() - 8 - address;
3713 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3714 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3715 // Replace with a branch to veneer (B <addr>)
3716 val = (val & 0xf0000000) | 0x0a000000
3717 | ((veneer_address >> 2) & 0x00ffffff);
3721 // Preserve Rm (lowest four bits) and the condition code
3722 // (highest four bits). Other bits encode MOV PC,Rm.
3723 val = (val & 0xf000000f) | 0x01a0f000;
3725 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3726 return This::STATUS_OKAY;
3729 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3730 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3731 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3732 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3733 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3734 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3735 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3736 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3737 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3738 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3739 static inline typename This::Status
3740 arm_grp_alu(unsigned char* view,
3741 const Sized_relobj_file<32, big_endian>* object,
3742 const Symbol_value<32>* psymval,
3744 Arm_address address,
3745 Arm_address thumb_bit,
3746 bool check_overflow)
3748 gold_assert(group >= 0 && group < 3);
3749 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3750 Valtype* wv = reinterpret_cast<Valtype*>(view);
3751 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3753 // ALU group relocations are allowed only for the ADD/SUB instructions.
3754 // (0x00800000 - ADD, 0x00400000 - SUB)
3755 const Valtype opcode = insn & 0x01e00000;
3756 if (opcode != 0x00800000 && opcode != 0x00400000)
3757 return This::STATUS_BAD_RELOC;
3759 // Determine a sign for the addend.
3760 const int sign = (opcode == 0x00800000) ? 1 : -1;
3761 // shifter = rotate_imm * 2
3762 const uint32_t shifter = (insn & 0xf00) >> 7;
3763 // Initial addend value.
3764 int32_t addend = insn & 0xff;
3765 // Rotate addend right by shifter.
3766 addend = (addend >> shifter) | (addend << (32 - shifter));
3767 // Apply a sign to the added.
3770 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3771 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3772 // Check for overflow if required
3774 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3775 return This::STATUS_OVERFLOW;
3777 // Mask out the value and the ADD/SUB part of the opcode; take care
3778 // not to destroy the S bit.
3780 // Set the opcode according to whether the value to go in the
3781 // place is negative.
3782 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3783 // Encode the offset (encoded Gn).
3786 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3787 return This::STATUS_OKAY;
3790 // R_ARM_LDR_PC_G0: S + A - P
3791 // R_ARM_LDR_PC_G1: S + A - P
3792 // R_ARM_LDR_PC_G2: S + A - P
3793 // R_ARM_LDR_SB_G0: S + A - B(S)
3794 // R_ARM_LDR_SB_G1: S + A - B(S)
3795 // R_ARM_LDR_SB_G2: S + A - B(S)
3796 static inline typename This::Status
3797 arm_grp_ldr(unsigned char* view,
3798 const Sized_relobj_file<32, big_endian>* object,
3799 const Symbol_value<32>* psymval,
3801 Arm_address address)
3803 gold_assert(group >= 0 && group < 3);
3804 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3805 Valtype* wv = reinterpret_cast<Valtype*>(view);
3806 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3808 const int sign = (insn & 0x00800000) ? 1 : -1;
3809 int32_t addend = (insn & 0xfff) * sign;
3810 int32_t x = (psymval->value(object, addend) - address);
3811 // Calculate the relevant G(n-1) value to obtain this stage residual.
3813 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3814 if (residual >= 0x1000)
3815 return This::STATUS_OVERFLOW;
3817 // Mask out the value and U bit.
3819 // Set the U bit for non-negative values.
3824 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3825 return This::STATUS_OKAY;
3828 // R_ARM_LDRS_PC_G0: S + A - P
3829 // R_ARM_LDRS_PC_G1: S + A - P
3830 // R_ARM_LDRS_PC_G2: S + A - P
3831 // R_ARM_LDRS_SB_G0: S + A - B(S)
3832 // R_ARM_LDRS_SB_G1: S + A - B(S)
3833 // R_ARM_LDRS_SB_G2: S + A - B(S)
3834 static inline typename This::Status
3835 arm_grp_ldrs(unsigned char* view,
3836 const Sized_relobj_file<32, big_endian>* object,
3837 const Symbol_value<32>* psymval,
3839 Arm_address address)
3841 gold_assert(group >= 0 && group < 3);
3842 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3843 Valtype* wv = reinterpret_cast<Valtype*>(view);
3844 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3846 const int sign = (insn & 0x00800000) ? 1 : -1;
3847 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3848 int32_t x = (psymval->value(object, addend) - address);
3849 // Calculate the relevant G(n-1) value to obtain this stage residual.
3851 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3852 if (residual >= 0x100)
3853 return This::STATUS_OVERFLOW;
3855 // Mask out the value and U bit.
3857 // Set the U bit for non-negative values.
3860 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3862 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3863 return This::STATUS_OKAY;
3866 // R_ARM_LDC_PC_G0: S + A - P
3867 // R_ARM_LDC_PC_G1: S + A - P
3868 // R_ARM_LDC_PC_G2: S + A - P
3869 // R_ARM_LDC_SB_G0: S + A - B(S)
3870 // R_ARM_LDC_SB_G1: S + A - B(S)
3871 // R_ARM_LDC_SB_G2: S + A - B(S)
3872 static inline typename This::Status
3873 arm_grp_ldc(unsigned char* view,
3874 const Sized_relobj_file<32, big_endian>* object,
3875 const Symbol_value<32>* psymval,
3877 Arm_address address)
3879 gold_assert(group >= 0 && group < 3);
3880 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3881 Valtype* wv = reinterpret_cast<Valtype*>(view);
3882 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3884 const int sign = (insn & 0x00800000) ? 1 : -1;
3885 int32_t addend = ((insn & 0xff) << 2) * sign;
3886 int32_t x = (psymval->value(object, addend) - address);
3887 // Calculate the relevant G(n-1) value to obtain this stage residual.
3889 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3890 if ((residual & 0x3) != 0 || residual >= 0x400)
3891 return This::STATUS_OVERFLOW;
3893 // Mask out the value and U bit.
3895 // Set the U bit for non-negative values.
3898 insn |= (residual >> 2);
3900 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3901 return This::STATUS_OKAY;
3905 // Relocate ARM long branches. This handles relocation types
3906 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3907 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3908 // undefined and we do not use PLT in this relocation. In such a case,
3909 // the branch is converted into an NOP.
3911 template<bool big_endian>
3912 typename Arm_relocate_functions<big_endian>::Status
3913 Arm_relocate_functions<big_endian>::arm_branch_common(
3914 unsigned int r_type,
3915 const Relocate_info<32, big_endian>* relinfo,
3916 unsigned char* view,
3917 const Sized_symbol<32>* gsym,
3918 const Arm_relobj<big_endian>* object,
3920 const Symbol_value<32>* psymval,
3921 Arm_address address,
3922 Arm_address thumb_bit,
3923 bool is_weakly_undefined_without_plt)
3925 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3926 Valtype* wv = reinterpret_cast<Valtype*>(view);
3927 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3929 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3930 && ((val & 0x0f000000UL) == 0x0a000000UL);
3931 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3932 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3933 && ((val & 0x0f000000UL) == 0x0b000000UL);
3934 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3935 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3937 // Check that the instruction is valid.
3938 if (r_type == elfcpp::R_ARM_CALL)
3940 if (!insn_is_uncond_bl && !insn_is_blx)
3941 return This::STATUS_BAD_RELOC;
3943 else if (r_type == elfcpp::R_ARM_JUMP24)
3945 if (!insn_is_b && !insn_is_cond_bl)
3946 return This::STATUS_BAD_RELOC;
3948 else if (r_type == elfcpp::R_ARM_PLT32)
3950 if (!insn_is_any_branch)
3951 return This::STATUS_BAD_RELOC;
3953 else if (r_type == elfcpp::R_ARM_XPC25)
3955 // FIXME: AAELF document IH0044C does not say much about it other
3956 // than it being obsolete.
3957 if (!insn_is_any_branch)
3958 return This::STATUS_BAD_RELOC;
3963 // A branch to an undefined weak symbol is turned into a jump to
3964 // the next instruction unless a PLT entry will be created.
3965 // Do the same for local undefined symbols.
3966 // The jump to the next instruction is optimized as a NOP depending
3967 // on the architecture.
3968 const Target_arm<big_endian>* arm_target =
3969 Target_arm<big_endian>::default_target();
3970 if (is_weakly_undefined_without_plt)
3972 gold_assert(!parameters->options().relocatable());
3973 Valtype cond = val & 0xf0000000U;
3974 if (arm_target->may_use_arm_nop())
3975 val = cond | 0x0320f000;
3977 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3978 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3979 return This::STATUS_OKAY;
3982 Valtype addend = Bits<26>::sign_extend32(val << 2);
3983 Valtype branch_target = psymval->value(object, addend);
3984 int32_t branch_offset = branch_target - address;
3986 // We need a stub if the branch offset is too large or if we need
3988 bool may_use_blx = arm_target->may_use_v5t_interworking();
3989 Reloc_stub* stub = NULL;
3991 if (!parameters->options().relocatable()
3992 && (Bits<26>::has_overflow32(branch_offset)
3993 || ((thumb_bit != 0)
3994 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL))))
3996 Valtype unadjusted_branch_target = psymval->value(object, 0);
3998 Stub_type stub_type =
3999 Reloc_stub::stub_type_for_reloc(r_type, address,
4000 unadjusted_branch_target,
4002 if (stub_type != arm_stub_none)
4004 Stub_table<big_endian>* stub_table =
4005 object->stub_table(relinfo->data_shndx);
4006 gold_assert(stub_table != NULL);
4008 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4009 stub = stub_table->find_reloc_stub(stub_key);
4010 gold_assert(stub != NULL);
4011 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4012 branch_target = stub_table->address() + stub->offset() + addend;
4013 branch_offset = branch_target - address;
4014 gold_assert(!Bits<26>::has_overflow32(branch_offset));
4018 // At this point, if we still need to switch mode, the instruction
4019 // must either be a BLX or a BL that can be converted to a BLX.
4023 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
4024 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
4027 val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL);
4028 elfcpp::Swap<32, big_endian>::writeval(wv, val);
4029 return (Bits<26>::has_overflow32(branch_offset)
4030 ? This::STATUS_OVERFLOW
4031 : This::STATUS_OKAY);
4034 // Relocate THUMB long branches. This handles relocation types
4035 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4036 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4037 // undefined and we do not use PLT in this relocation. In such a case,
4038 // the branch is converted into an NOP.
4040 template<bool big_endian>
4041 typename Arm_relocate_functions<big_endian>::Status
4042 Arm_relocate_functions<big_endian>::thumb_branch_common(
4043 unsigned int r_type,
4044 const Relocate_info<32, big_endian>* relinfo,
4045 unsigned char* view,
4046 const Sized_symbol<32>* gsym,
4047 const Arm_relobj<big_endian>* object,
4049 const Symbol_value<32>* psymval,
4050 Arm_address address,
4051 Arm_address thumb_bit,
4052 bool is_weakly_undefined_without_plt)
4054 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4055 Valtype* wv = reinterpret_cast<Valtype*>(view);
4056 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4057 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4059 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4061 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
4062 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
4064 // Check that the instruction is valid.
4065 if (r_type == elfcpp::R_ARM_THM_CALL)
4067 if (!is_bl_insn && !is_blx_insn)
4068 return This::STATUS_BAD_RELOC;
4070 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
4072 // This cannot be a BLX.
4074 return This::STATUS_BAD_RELOC;
4076 else if (r_type == elfcpp::R_ARM_THM_XPC22)
4078 // Check for Thumb to Thumb call.
4080 return This::STATUS_BAD_RELOC;
4083 gold_warning(_("%s: Thumb BLX instruction targets "
4084 "thumb function '%s'."),
4085 object->name().c_str(),
4086 (gsym ? gsym->name() : "(local)"));
4087 // Convert BLX to BL.
4088 lower_insn |= 0x1000U;
4094 // A branch to an undefined weak symbol is turned into a jump to
4095 // the next instruction unless a PLT entry will be created.
4096 // The jump to the next instruction is optimized as a NOP.W for
4097 // Thumb-2 enabled architectures.
4098 const Target_arm<big_endian>* arm_target =
4099 Target_arm<big_endian>::default_target();
4100 if (is_weakly_undefined_without_plt)
4102 gold_assert(!parameters->options().relocatable());
4103 if (arm_target->may_use_thumb2_nop())
4105 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
4106 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
4110 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
4111 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
4113 return This::STATUS_OKAY;
4116 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
4117 Arm_address branch_target = psymval->value(object, addend);
4119 // For BLX, bit 1 of target address comes from bit 1 of base address.
4120 bool may_use_blx = arm_target->may_use_v5t_interworking();
4121 if (thumb_bit == 0 && may_use_blx)
4122 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4124 int32_t branch_offset = branch_target - address;
4126 // We need a stub if the branch offset is too large or if we need
4128 bool thumb2 = arm_target->using_thumb2();
4129 if (!parameters->options().relocatable()
4130 && ((!thumb2 && Bits<23>::has_overflow32(branch_offset))
4131 || (thumb2 && Bits<25>::has_overflow32(branch_offset))
4132 || ((thumb_bit == 0)
4133 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4134 || r_type == elfcpp::R_ARM_THM_JUMP24))))
4136 Arm_address unadjusted_branch_target = psymval->value(object, 0);
4138 Stub_type stub_type =
4139 Reloc_stub::stub_type_for_reloc(r_type, address,
4140 unadjusted_branch_target,
4143 if (stub_type != arm_stub_none)
4145 Stub_table<big_endian>* stub_table =
4146 object->stub_table(relinfo->data_shndx);
4147 gold_assert(stub_table != NULL);
4149 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4150 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
4151 gold_assert(stub != NULL);
4152 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4153 branch_target = stub_table->address() + stub->offset() + addend;
4154 if (thumb_bit == 0 && may_use_blx)
4155 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4156 branch_offset = branch_target - address;
4160 // At this point, if we still need to switch mode, the instruction
4161 // must either be a BLX or a BL that can be converted to a BLX.
4164 gold_assert(may_use_blx
4165 && (r_type == elfcpp::R_ARM_THM_CALL
4166 || r_type == elfcpp::R_ARM_THM_XPC22));
4167 // Make sure this is a BLX.
4168 lower_insn &= ~0x1000U;
4172 // Make sure this is a BL.
4173 lower_insn |= 0x1000U;
4176 // For a BLX instruction, make sure that the relocation is rounded up
4177 // to a word boundary. This follows the semantics of the instruction
4178 // which specifies that bit 1 of the target address will come from bit
4179 // 1 of the base address.
4180 if ((lower_insn & 0x5000U) == 0x4000U)
4181 gold_assert((branch_offset & 3) == 0);
4183 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4184 // We use the Thumb-2 encoding, which is safe even if dealing with
4185 // a Thumb-1 instruction by virtue of our overflow check above. */
4186 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
4187 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
4189 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4190 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4192 gold_assert(!Bits<25>::has_overflow32(branch_offset));
4195 ? Bits<25>::has_overflow32(branch_offset)
4196 : Bits<23>::has_overflow32(branch_offset))
4197 ? This::STATUS_OVERFLOW
4198 : This::STATUS_OKAY);
4201 // Relocate THUMB-2 long conditional branches.
4202 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4203 // undefined and we do not use PLT in this relocation. In such a case,
4204 // the branch is converted into an NOP.
4206 template<bool big_endian>
4207 typename Arm_relocate_functions<big_endian>::Status
4208 Arm_relocate_functions<big_endian>::thm_jump19(
4209 unsigned char* view,
4210 const Arm_relobj<big_endian>* object,
4211 const Symbol_value<32>* psymval,
4212 Arm_address address,
4213 Arm_address thumb_bit)
4215 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4216 Valtype* wv = reinterpret_cast<Valtype*>(view);
4217 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4218 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4219 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
4221 Arm_address branch_target = psymval->value(object, addend);
4222 int32_t branch_offset = branch_target - address;
4224 // ??? Should handle interworking? GCC might someday try to
4225 // use this for tail calls.
4226 // FIXME: We do support thumb entry to PLT yet.
4229 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4230 return This::STATUS_BAD_RELOC;
4233 // Put RELOCATION back into the insn.
4234 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
4235 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
4237 // Put the relocated value back in the object file:
4238 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4239 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4241 return (Bits<21>::has_overflow32(branch_offset)
4242 ? This::STATUS_OVERFLOW
4243 : This::STATUS_OKAY);
4246 // Get the GOT section, creating it if necessary.
4248 template<bool big_endian>
4249 Arm_output_data_got<big_endian>*
4250 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
4252 if (this->got_ == NULL)
4254 gold_assert(symtab != NULL && layout != NULL);
4256 // When using -z now, we can treat .got as a relro section.
4257 // Without -z now, it is modified after program startup by lazy
4259 bool is_got_relro = parameters->options().now();
4260 Output_section_order got_order = (is_got_relro
4264 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4265 // .got.plt sections in output. The output .got section contains both
4266 // PLT and non-PLT GOT entries.
4267 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout);
4269 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4270 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4271 this->got_, got_order, is_got_relro);
4273 // The old GNU linker creates a .got.plt section. We just
4274 // create another set of data in the .got section. Note that we
4275 // always create a PLT if we create a GOT, although the PLT
4277 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
4278 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4279 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4280 this->got_plt_, got_order, is_got_relro);
4282 // The first three entries are reserved.
4283 this->got_plt_->set_current_data_size(3 * 4);
4285 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4286 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
4287 Symbol_table::PREDEFINED,
4289 0, 0, elfcpp::STT_OBJECT,
4291 elfcpp::STV_HIDDEN, 0,
4294 // If there are any IRELATIVE relocations, they get GOT entries
4295 // in .got.plt after the jump slot entries.
4296 this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT");
4297 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4298 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4299 this->got_irelative_,
4300 got_order, is_got_relro);
4306 // Get the dynamic reloc section, creating it if necessary.
4308 template<bool big_endian>
4309 typename Target_arm<big_endian>::Reloc_section*
4310 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
4312 if (this->rel_dyn_ == NULL)
4314 gold_assert(layout != NULL);
4315 // Create both relocation sections in the same place, so as to ensure
4316 // their relative order in the output section.
4317 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
4318 this->rel_irelative_ = new Reloc_section(false);
4319 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4320 elfcpp::SHF_ALLOC, this->rel_dyn_,
4321 ORDER_DYNAMIC_RELOCS, false);
4322 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4323 elfcpp::SHF_ALLOC, this->rel_irelative_,
4324 ORDER_DYNAMIC_RELOCS, false);
4326 return this->rel_dyn_;
4330 // Get the section to use for IRELATIVE relocs, creating it if necessary. These
4331 // go in .rela.dyn, but only after all other dynamic relocations. They need to
4332 // follow the other dynamic relocations so that they can refer to global
4333 // variables initialized by those relocs.
4335 template<bool big_endian>
4336 typename Target_arm<big_endian>::Reloc_section*
4337 Target_arm<big_endian>::rel_irelative_section(Layout* layout)
4339 if (this->rel_irelative_ == NULL)
4341 // Delegate the creation to rel_dyn_section so as to ensure their order in
4342 // the output section.
4343 this->rel_dyn_section(layout);
4344 gold_assert(this->rel_irelative_ != NULL
4345 && (this->rel_dyn_->output_section()
4346 == this->rel_irelative_->output_section()));
4348 return this->rel_irelative_;
4352 // Insn_template methods.
4354 // Return byte size of an instruction template.
4357 Insn_template::size() const
4359 switch (this->type())
4362 case THUMB16_SPECIAL_TYPE:
4373 // Return alignment of an instruction template.
4376 Insn_template::alignment() const
4378 switch (this->type())
4381 case THUMB16_SPECIAL_TYPE:
4392 // Stub_template methods.
4394 Stub_template::Stub_template(
4395 Stub_type type, const Insn_template* insns,
4397 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
4398 entry_in_thumb_mode_(false), relocs_()
4402 // Compute byte size and alignment of stub template.
4403 for (size_t i = 0; i < insn_count; i++)
4405 unsigned insn_alignment = insns[i].alignment();
4406 size_t insn_size = insns[i].size();
4407 gold_assert((offset & (insn_alignment - 1)) == 0);
4408 this->alignment_ = std::max(this->alignment_, insn_alignment);
4409 switch (insns[i].type())
4411 case Insn_template::THUMB16_TYPE:
4412 case Insn_template::THUMB16_SPECIAL_TYPE:
4414 this->entry_in_thumb_mode_ = true;
4417 case Insn_template::THUMB32_TYPE:
4418 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
4419 this->relocs_.push_back(Reloc(i, offset));
4421 this->entry_in_thumb_mode_ = true;
4424 case Insn_template::ARM_TYPE:
4425 // Handle cases where the target is encoded within the
4427 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
4428 this->relocs_.push_back(Reloc(i, offset));
4431 case Insn_template::DATA_TYPE:
4432 // Entry point cannot be data.
4433 gold_assert(i != 0);
4434 this->relocs_.push_back(Reloc(i, offset));
4440 offset += insn_size;
4442 this->size_ = offset;
4447 // Template to implement do_write for a specific target endianness.
4449 template<bool big_endian>
4451 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4453 const Stub_template* stub_template = this->stub_template();
4454 const Insn_template* insns = stub_template->insns();
4456 // FIXME: We do not handle BE8 encoding yet.
4457 unsigned char* pov = view;
4458 for (size_t i = 0; i < stub_template->insn_count(); i++)
4460 switch (insns[i].type())
4462 case Insn_template::THUMB16_TYPE:
4463 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4465 case Insn_template::THUMB16_SPECIAL_TYPE:
4466 elfcpp::Swap<16, big_endian>::writeval(
4468 this->thumb16_special(i));
4470 case Insn_template::THUMB32_TYPE:
4472 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4473 uint32_t lo = insns[i].data() & 0xffff;
4474 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4475 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4478 case Insn_template::ARM_TYPE:
4479 case Insn_template::DATA_TYPE:
4480 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4485 pov += insns[i].size();
4487 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4490 // Reloc_stub::Key methods.
4492 // Dump a Key as a string for debugging.
4495 Reloc_stub::Key::name() const
4497 if (this->r_sym_ == invalid_index)
4499 // Global symbol key name
4500 // <stub-type>:<symbol name>:<addend>.
4501 const std::string sym_name = this->u_.symbol->name();
4502 // We need to print two hex number and two colons. So just add 100 bytes
4503 // to the symbol name size.
4504 size_t len = sym_name.size() + 100;
4505 char* buffer = new char[len];
4506 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4507 sym_name.c_str(), this->addend_);
4508 gold_assert(c > 0 && c < static_cast<int>(len));
4510 return std::string(buffer);
4514 // local symbol key name
4515 // <stub-type>:<object>:<r_sym>:<addend>.
4516 const size_t len = 200;
4518 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4519 this->u_.relobj, this->r_sym_, this->addend_);
4520 gold_assert(c > 0 && c < static_cast<int>(len));
4521 return std::string(buffer);
4525 // Reloc_stub methods.
4527 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4528 // LOCATION to DESTINATION.
4529 // This code is based on the arm_type_of_stub function in
4530 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4534 Reloc_stub::stub_type_for_reloc(
4535 unsigned int r_type,
4536 Arm_address location,
4537 Arm_address destination,
4538 bool target_is_thumb)
4540 Stub_type stub_type = arm_stub_none;
4542 // This is a bit ugly but we want to avoid using a templated class for
4543 // big and little endianities.
4545 bool should_force_pic_veneer = parameters->options().pic_veneer();
4548 if (parameters->target().is_big_endian())
4550 const Target_arm<true>* big_endian_target =
4551 Target_arm<true>::default_target();
4552 may_use_blx = big_endian_target->may_use_v5t_interworking();
4553 should_force_pic_veneer |= big_endian_target->should_force_pic_veneer();
4554 thumb2 = big_endian_target->using_thumb2();
4555 thumb_only = big_endian_target->using_thumb_only();
4559 const Target_arm<false>* little_endian_target =
4560 Target_arm<false>::default_target();
4561 may_use_blx = little_endian_target->may_use_v5t_interworking();
4562 should_force_pic_veneer |=
4563 little_endian_target->should_force_pic_veneer();
4564 thumb2 = little_endian_target->using_thumb2();
4565 thumb_only = little_endian_target->using_thumb_only();
4568 int64_t branch_offset;
4569 bool output_is_position_independent =
4570 parameters->options().output_is_position_independent();
4571 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4573 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4574 // base address (instruction address + 4).
4575 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb)
4576 destination = Bits<32>::bit_select32(destination, location, 0x2);
4577 branch_offset = static_cast<int64_t>(destination) - location;
4579 // Handle cases where:
4580 // - this call goes too far (different Thumb/Thumb2 max
4582 // - it's a Thumb->Arm call and blx is not available, or it's a
4583 // Thumb->Arm branch (not bl). A stub is needed in this case.
4585 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4586 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4588 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4589 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4590 || ((!target_is_thumb)
4591 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4592 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4594 if (target_is_thumb)
4599 stub_type = (output_is_position_independent
4600 || should_force_pic_veneer)
4603 && (r_type == elfcpp::R_ARM_THM_CALL))
4604 // V5T and above. Stub starts with ARM code, so
4605 // we must be able to switch mode before
4606 // reaching it, which is only possible for 'bl'
4607 // (ie R_ARM_THM_CALL relocation).
4608 ? arm_stub_long_branch_any_thumb_pic
4609 // On V4T, use Thumb code only.
4610 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4614 && (r_type == elfcpp::R_ARM_THM_CALL))
4615 ? arm_stub_long_branch_any_any // V5T and above.
4616 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4620 stub_type = (output_is_position_independent
4621 || should_force_pic_veneer)
4622 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4623 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4630 // FIXME: We should check that the input section is from an
4631 // object that has interwork enabled.
4633 stub_type = (output_is_position_independent
4634 || should_force_pic_veneer)
4637 && (r_type == elfcpp::R_ARM_THM_CALL))
4638 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4639 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4643 && (r_type == elfcpp::R_ARM_THM_CALL))
4644 ? arm_stub_long_branch_any_any // V5T and above.
4645 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4647 // Handle v4t short branches.
4648 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4649 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4650 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4651 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4655 else if (r_type == elfcpp::R_ARM_CALL
4656 || r_type == elfcpp::R_ARM_JUMP24
4657 || r_type == elfcpp::R_ARM_PLT32)
4659 branch_offset = static_cast<int64_t>(destination) - location;
4660 if (target_is_thumb)
4664 // FIXME: We should check that the input section is from an
4665 // object that has interwork enabled.
4667 // We have an extra 2-bytes reach because of
4668 // the mode change (bit 24 (H) of BLX encoding).
4669 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4670 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4671 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4672 || (r_type == elfcpp::R_ARM_JUMP24)
4673 || (r_type == elfcpp::R_ARM_PLT32))
4675 stub_type = (output_is_position_independent
4676 || should_force_pic_veneer)
4679 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4680 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4684 ? arm_stub_long_branch_any_any // V5T and above.
4685 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4691 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4692 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4694 stub_type = (output_is_position_independent
4695 || should_force_pic_veneer)
4696 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4697 : arm_stub_long_branch_any_any; /// non-PIC.
4705 // Cortex_a8_stub methods.
4707 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4708 // I is the position of the instruction template in the stub template.
4711 Cortex_a8_stub::do_thumb16_special(size_t i)
4713 // The only use of this is to copy condition code from a conditional
4714 // branch being worked around to the corresponding conditional branch in
4716 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4718 uint16_t data = this->stub_template()->insns()[i].data();
4719 gold_assert((data & 0xff00U) == 0xd000U);
4720 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4724 // Stub_factory methods.
4726 Stub_factory::Stub_factory()
4728 // The instruction template sequences are declared as static
4729 // objects and initialized first time the constructor runs.
4731 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4732 // to reach the stub if necessary.
4733 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4735 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4736 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4737 // dcd R_ARM_ABS32(X)
4740 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4742 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4744 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4745 Insn_template::arm_insn(0xe12fff1c), // bx ip
4746 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4747 // dcd R_ARM_ABS32(X)
4750 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4751 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4753 Insn_template::thumb16_insn(0xb401), // push {r0}
4754 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4755 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4756 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4757 Insn_template::thumb16_insn(0x4760), // bx ip
4758 Insn_template::thumb16_insn(0xbf00), // nop
4759 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4760 // dcd R_ARM_ABS32(X)
4763 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4765 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4767 Insn_template::thumb16_insn(0x4778), // bx pc
4768 Insn_template::thumb16_insn(0x46c0), // nop
4769 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4770 Insn_template::arm_insn(0xe12fff1c), // bx ip
4771 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4772 // dcd R_ARM_ABS32(X)
4775 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4777 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4779 Insn_template::thumb16_insn(0x4778), // bx pc
4780 Insn_template::thumb16_insn(0x46c0), // nop
4781 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4782 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4783 // dcd R_ARM_ABS32(X)
4786 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4787 // one, when the destination is close enough.
4788 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4790 Insn_template::thumb16_insn(0x4778), // bx pc
4791 Insn_template::thumb16_insn(0x46c0), // nop
4792 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4795 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4796 // blx to reach the stub if necessary.
4797 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4799 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4800 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4801 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4802 // dcd R_ARM_REL32(X-4)
4805 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4806 // blx to reach the stub if necessary. We can not add into pc;
4807 // it is not guaranteed to mode switch (different in ARMv6 and
4809 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4811 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4812 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4813 Insn_template::arm_insn(0xe12fff1c), // bx ip
4814 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4815 // dcd R_ARM_REL32(X)
4818 // V4T ARM -> ARM long branch stub, PIC.
4819 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4821 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4822 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4823 Insn_template::arm_insn(0xe12fff1c), // bx ip
4824 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4825 // dcd R_ARM_REL32(X)
4828 // V4T Thumb -> ARM long branch stub, PIC.
4829 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4831 Insn_template::thumb16_insn(0x4778), // bx pc
4832 Insn_template::thumb16_insn(0x46c0), // nop
4833 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4834 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4835 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4836 // dcd R_ARM_REL32(X)
4839 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4841 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4843 Insn_template::thumb16_insn(0xb401), // push {r0}
4844 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4845 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4846 Insn_template::thumb16_insn(0x4484), // add ip, r0
4847 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4848 Insn_template::thumb16_insn(0x4760), // bx ip
4849 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4850 // dcd R_ARM_REL32(X)
4853 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4855 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4857 Insn_template::thumb16_insn(0x4778), // bx pc
4858 Insn_template::thumb16_insn(0x46c0), // nop
4859 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4860 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4861 Insn_template::arm_insn(0xe12fff1c), // bx ip
4862 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4863 // dcd R_ARM_REL32(X)
4866 // Cortex-A8 erratum-workaround stubs.
4868 // Stub used for conditional branches (which may be beyond +/-1MB away,
4869 // so we can't use a conditional branch to reach this stub).
4876 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4878 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4879 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4880 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4884 // Stub used for b.w and bl.w instructions.
4886 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4888 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4891 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4893 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4896 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4897 // instruction (which switches to ARM mode) to point to this stub. Jump to
4898 // the real destination using an ARM-mode branch.
4899 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4901 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4904 // Stub used to provide an interworking for R_ARM_V4BX relocation
4905 // (bx r[n] instruction).
4906 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4908 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4909 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4910 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4913 // Fill in the stub template look-up table. Stub templates are constructed
4914 // per instance of Stub_factory for fast look-up without locking
4915 // in a thread-enabled environment.
4917 this->stub_templates_[arm_stub_none] =
4918 new Stub_template(arm_stub_none, NULL, 0);
4920 #define DEF_STUB(x) \
4924 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4925 Stub_type type = arm_stub_##x; \
4926 this->stub_templates_[type] = \
4927 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4935 // Stub_table methods.
4937 // Remove all Cortex-A8 stub.
4939 template<bool big_endian>
4941 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4943 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4944 p != this->cortex_a8_stubs_.end();
4947 this->cortex_a8_stubs_.clear();
4950 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4952 template<bool big_endian>
4954 Stub_table<big_endian>::relocate_stub(
4956 const Relocate_info<32, big_endian>* relinfo,
4957 Target_arm<big_endian>* arm_target,
4958 Output_section* output_section,
4959 unsigned char* view,
4960 Arm_address address,
4961 section_size_type view_size)
4963 const Stub_template* stub_template = stub->stub_template();
4964 if (stub_template->reloc_count() != 0)
4966 // Adjust view to cover the stub only.
4967 section_size_type offset = stub->offset();
4968 section_size_type stub_size = stub_template->size();
4969 gold_assert(offset + stub_size <= view_size);
4971 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4972 address + offset, stub_size);
4976 // Relocate all stubs in this stub table.
4978 template<bool big_endian>
4980 Stub_table<big_endian>::relocate_stubs(
4981 const Relocate_info<32, big_endian>* relinfo,
4982 Target_arm<big_endian>* arm_target,
4983 Output_section* output_section,
4984 unsigned char* view,
4985 Arm_address address,
4986 section_size_type view_size)
4988 // If we are passed a view bigger than the stub table's. we need to
4990 gold_assert(address == this->address()
4992 == static_cast<section_size_type>(this->data_size())));
4994 // Relocate all relocation stubs.
4995 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4996 p != this->reloc_stubs_.end();
4998 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4999 address, view_size);
5001 // Relocate all Cortex-A8 stubs.
5002 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
5003 p != this->cortex_a8_stubs_.end();
5005 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
5006 address, view_size);
5008 // Relocate all ARM V4BX stubs.
5009 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
5010 p != this->arm_v4bx_stubs_.end();
5014 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
5015 address, view_size);
5019 // Write out the stubs to file.
5021 template<bool big_endian>
5023 Stub_table<big_endian>::do_write(Output_file* of)
5025 off_t offset = this->offset();
5026 const section_size_type oview_size =
5027 convert_to_section_size_type(this->data_size());
5028 unsigned char* const oview = of->get_output_view(offset, oview_size);
5030 // Write relocation stubs.
5031 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
5032 p != this->reloc_stubs_.end();
5035 Reloc_stub* stub = p->second;
5036 Arm_address address = this->address() + stub->offset();
5038 == align_address(address,
5039 stub->stub_template()->alignment()));
5040 stub->write(oview + stub->offset(), stub->stub_template()->size(),
5044 // Write Cortex-A8 stubs.
5045 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5046 p != this->cortex_a8_stubs_.end();
5049 Cortex_a8_stub* stub = p->second;
5050 Arm_address address = this->address() + stub->offset();
5052 == align_address(address,
5053 stub->stub_template()->alignment()));
5054 stub->write(oview + stub->offset(), stub->stub_template()->size(),
5058 // Write ARM V4BX relocation stubs.
5059 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5060 p != this->arm_v4bx_stubs_.end();
5066 Arm_address address = this->address() + (*p)->offset();
5068 == align_address(address,
5069 (*p)->stub_template()->alignment()));
5070 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
5074 of->write_output_view(this->offset(), oview_size, oview);
5077 // Update the data size and address alignment of the stub table at the end
5078 // of a relaxation pass. Return true if either the data size or the
5079 // alignment changed in this relaxation pass.
5081 template<bool big_endian>
5083 Stub_table<big_endian>::update_data_size_and_addralign()
5085 // Go over all stubs in table to compute data size and address alignment.
5086 off_t size = this->reloc_stubs_size_;
5087 unsigned addralign = this->reloc_stubs_addralign_;
5089 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5090 p != this->cortex_a8_stubs_.end();
5093 const Stub_template* stub_template = p->second->stub_template();
5094 addralign = std::max(addralign, stub_template->alignment());
5095 size = (align_address(size, stub_template->alignment())
5096 + stub_template->size());
5099 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5100 p != this->arm_v4bx_stubs_.end();
5106 const Stub_template* stub_template = (*p)->stub_template();
5107 addralign = std::max(addralign, stub_template->alignment());
5108 size = (align_address(size, stub_template->alignment())
5109 + stub_template->size());
5112 // Check if either data size or alignment changed in this pass.
5113 // Update prev_data_size_ and prev_addralign_. These will be used
5114 // as the current data size and address alignment for the next pass.
5115 bool changed = size != this->prev_data_size_;
5116 this->prev_data_size_ = size;
5118 if (addralign != this->prev_addralign_)
5120 this->prev_addralign_ = addralign;
5125 // Finalize the stubs. This sets the offsets of the stubs within the stub
5126 // table. It also marks all input sections needing Cortex-A8 workaround.
5128 template<bool big_endian>
5130 Stub_table<big_endian>::finalize_stubs()
5132 off_t off = this->reloc_stubs_size_;
5133 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5134 p != this->cortex_a8_stubs_.end();
5137 Cortex_a8_stub* stub = p->second;
5138 const Stub_template* stub_template = stub->stub_template();
5139 uint64_t stub_addralign = stub_template->alignment();
5140 off = align_address(off, stub_addralign);
5141 stub->set_offset(off);
5142 off += stub_template->size();
5144 // Mark input section so that we can determine later if a code section
5145 // needs the Cortex-A8 workaround quickly.
5146 Arm_relobj<big_endian>* arm_relobj =
5147 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
5148 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
5151 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5152 p != this->arm_v4bx_stubs_.end();
5158 const Stub_template* stub_template = (*p)->stub_template();
5159 uint64_t stub_addralign = stub_template->alignment();
5160 off = align_address(off, stub_addralign);
5161 (*p)->set_offset(off);
5162 off += stub_template->size();
5165 gold_assert(off <= this->prev_data_size_);
5168 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5169 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5170 // of the address range seen by the linker.
5172 template<bool big_endian>
5174 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
5175 Target_arm<big_endian>* arm_target,
5176 unsigned char* view,
5177 Arm_address view_address,
5178 section_size_type view_size)
5180 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5181 for (Cortex_a8_stub_list::const_iterator p =
5182 this->cortex_a8_stubs_.lower_bound(view_address);
5183 ((p != this->cortex_a8_stubs_.end())
5184 && (p->first < (view_address + view_size)));
5187 // We do not store the THUMB bit in the LSB of either the branch address
5188 // or the stub offset. There is no need to strip the LSB.
5189 Arm_address branch_address = p->first;
5190 const Cortex_a8_stub* stub = p->second;
5191 Arm_address stub_address = this->address() + stub->offset();
5193 // Offset of the branch instruction relative to this view.
5194 section_size_type offset =
5195 convert_to_section_size_type(branch_address - view_address);
5196 gold_assert((offset + 4) <= view_size);
5198 arm_target->apply_cortex_a8_workaround(stub, stub_address,
5199 view + offset, branch_address);
5203 // Arm_input_section methods.
5205 // Initialize an Arm_input_section.
5207 template<bool big_endian>
5209 Arm_input_section<big_endian>::init()
5211 Relobj* relobj = this->relobj();
5212 unsigned int shndx = this->shndx();
5214 // We have to cache original size, alignment and contents to avoid locking
5215 // the original file.
5216 this->original_addralign_ =
5217 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx));
5219 // This is not efficient but we expect only a small number of relaxed
5220 // input sections for stubs.
5221 section_size_type section_size;
5222 const unsigned char* section_contents =
5223 relobj->section_contents(shndx, §ion_size, false);
5224 this->original_size_ =
5225 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx));
5227 gold_assert(this->original_contents_ == NULL);
5228 this->original_contents_ = new unsigned char[section_size];
5229 memcpy(this->original_contents_, section_contents, section_size);
5231 // We want to make this look like the original input section after
5232 // output sections are finalized.
5233 Output_section* os = relobj->output_section(shndx);
5234 off_t offset = relobj->output_section_offset(shndx);
5235 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
5236 this->set_address(os->address() + offset);
5237 this->set_file_offset(os->offset() + offset);
5239 this->set_current_data_size(this->original_size_);
5240 this->finalize_data_size();
5243 template<bool big_endian>
5245 Arm_input_section<big_endian>::do_write(Output_file* of)
5247 // We have to write out the original section content.
5248 gold_assert(this->original_contents_ != NULL);
5249 of->write(this->offset(), this->original_contents_,
5250 this->original_size_);
5252 // If this owns a stub table and it is not empty, write it.
5253 if (this->is_stub_table_owner() && !this->stub_table_->empty())
5254 this->stub_table_->write(of);
5257 // Finalize data size.
5259 template<bool big_endian>
5261 Arm_input_section<big_endian>::set_final_data_size()
5263 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5265 if (this->is_stub_table_owner())
5267 this->stub_table_->finalize_data_size();
5268 off = align_address(off, this->stub_table_->addralign());
5269 off += this->stub_table_->data_size();
5271 this->set_data_size(off);
5274 // Reset address and file offset.
5276 template<bool big_endian>
5278 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
5280 // Size of the original input section contents.
5281 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5283 // If this is a stub table owner, account for the stub table size.
5284 if (this->is_stub_table_owner())
5286 Stub_table<big_endian>* stub_table = this->stub_table_;
5288 // Reset the stub table's address and file offset. The
5289 // current data size for child will be updated after that.
5290 stub_table_->reset_address_and_file_offset();
5291 off = align_address(off, stub_table_->addralign());
5292 off += stub_table->current_data_size();
5295 this->set_current_data_size(off);
5298 // Arm_exidx_cantunwind methods.
5300 // Write this to Output file OF for a fixed endianness.
5302 template<bool big_endian>
5304 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
5306 off_t offset = this->offset();
5307 const section_size_type oview_size = 8;
5308 unsigned char* const oview = of->get_output_view(offset, oview_size);
5310 Output_section* os = this->relobj_->output_section(this->shndx_);
5311 gold_assert(os != NULL);
5313 Arm_relobj<big_endian>* arm_relobj =
5314 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
5315 Arm_address output_offset =
5316 arm_relobj->get_output_section_offset(this->shndx_);
5317 Arm_address section_start;
5318 section_size_type section_size;
5320 // Find out the end of the text section referred by this.
5321 if (output_offset != Arm_relobj<big_endian>::invalid_address)
5323 section_start = os->address() + output_offset;
5324 const Arm_exidx_input_section* exidx_input_section =
5325 arm_relobj->exidx_input_section_by_link(this->shndx_);
5326 gold_assert(exidx_input_section != NULL);
5328 convert_to_section_size_type(exidx_input_section->text_size());
5332 // Currently this only happens for a relaxed section.
5333 const Output_relaxed_input_section* poris =
5334 os->find_relaxed_input_section(this->relobj_, this->shndx_);
5335 gold_assert(poris != NULL);
5336 section_start = poris->address();
5337 section_size = convert_to_section_size_type(poris->data_size());
5340 // We always append this to the end of an EXIDX section.
5341 Arm_address output_address = section_start + section_size;
5343 // Write out the entry. The first word either points to the beginning
5344 // or after the end of a text section. The second word is the special
5345 // EXIDX_CANTUNWIND value.
5346 uint32_t prel31_offset = output_address - this->address();
5347 if (Bits<31>::has_overflow32(offset))
5348 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5349 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview,
5350 prel31_offset & 0x7fffffffU);
5351 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4,
5352 elfcpp::EXIDX_CANTUNWIND);
5354 of->write_output_view(this->offset(), oview_size, oview);
5357 // Arm_exidx_merged_section methods.
5359 // Constructor for Arm_exidx_merged_section.
5360 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5361 // SECTION_OFFSET_MAP points to a section offset map describing how
5362 // parts of the input section are mapped to output. DELETED_BYTES is
5363 // the number of bytes deleted from the EXIDX input section.
5365 Arm_exidx_merged_section::Arm_exidx_merged_section(
5366 const Arm_exidx_input_section& exidx_input_section,
5367 const Arm_exidx_section_offset_map& section_offset_map,
5368 uint32_t deleted_bytes)
5369 : Output_relaxed_input_section(exidx_input_section.relobj(),
5370 exidx_input_section.shndx(),
5371 exidx_input_section.addralign()),
5372 exidx_input_section_(exidx_input_section),
5373 section_offset_map_(section_offset_map)
5375 // If we retain or discard the whole EXIDX input section, we would
5377 gold_assert(deleted_bytes != 0
5378 && deleted_bytes != this->exidx_input_section_.size());
5380 // Fix size here so that we do not need to implement set_final_data_size.
5381 uint32_t size = exidx_input_section.size() - deleted_bytes;
5382 this->set_data_size(size);
5383 this->fix_data_size();
5385 // Allocate buffer for section contents and build contents.
5386 this->section_contents_ = new unsigned char[size];
5389 // Build the contents of a merged EXIDX output section.
5392 Arm_exidx_merged_section::build_contents(
5393 const unsigned char* original_contents,
5394 section_size_type original_size)
5396 // Go over spans of input offsets and write only those that are not
5398 section_offset_type in_start = 0;
5399 section_offset_type out_start = 0;
5400 section_offset_type in_max =
5401 convert_types<section_offset_type>(original_size);
5402 section_offset_type out_max =
5403 convert_types<section_offset_type>(this->data_size());
5404 for (Arm_exidx_section_offset_map::const_iterator p =
5405 this->section_offset_map_.begin();
5406 p != this->section_offset_map_.end();
5409 section_offset_type in_end = p->first;
5410 gold_assert(in_end >= in_start);
5411 section_offset_type out_end = p->second;
5412 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5415 size_t out_chunk_size =
5416 convert_types<size_t>(out_end - out_start + 1);
5418 gold_assert(out_chunk_size == in_chunk_size
5419 && in_end < in_max && out_end < out_max);
5421 memcpy(this->section_contents_ + out_start,
5422 original_contents + in_start,
5424 out_start += out_chunk_size;
5426 in_start += in_chunk_size;
5430 // Given an input OBJECT, an input section index SHNDX within that
5431 // object, and an OFFSET relative to the start of that input
5432 // section, return whether or not the corresponding offset within
5433 // the output section is known. If this function returns true, it
5434 // sets *POUTPUT to the output offset. The value -1 indicates that
5435 // this input offset is being discarded.
5438 Arm_exidx_merged_section::do_output_offset(
5439 const Relobj* relobj,
5441 section_offset_type offset,
5442 section_offset_type* poutput) const
5444 // We only handle offsets for the original EXIDX input section.
5445 if (relobj != this->exidx_input_section_.relobj()
5446 || shndx != this->exidx_input_section_.shndx())
5449 section_offset_type section_size =
5450 convert_types<section_offset_type>(this->exidx_input_section_.size());
5451 if (offset < 0 || offset >= section_size)
5452 // Input offset is out of valid range.
5456 // We need to look up the section offset map to determine the output
5457 // offset. Find the reference point in map that is first offset
5458 // bigger than or equal to this offset.
5459 Arm_exidx_section_offset_map::const_iterator p =
5460 this->section_offset_map_.lower_bound(offset);
5462 // The section offset maps are build such that this should not happen if
5463 // input offset is in the valid range.
5464 gold_assert(p != this->section_offset_map_.end());
5466 // We need to check if this is dropped.
5467 section_offset_type ref = p->first;
5468 section_offset_type mapped_ref = p->second;
5470 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
5471 // Offset is present in output.
5472 *poutput = mapped_ref + (offset - ref);
5474 // Offset is discarded owing to EXIDX entry merging.
5481 // Write this to output file OF.
5484 Arm_exidx_merged_section::do_write(Output_file* of)
5486 off_t offset = this->offset();
5487 const section_size_type oview_size = this->data_size();
5488 unsigned char* const oview = of->get_output_view(offset, oview_size);
5490 Output_section* os = this->relobj()->output_section(this->shndx());
5491 gold_assert(os != NULL);
5493 memcpy(oview, this->section_contents_, oview_size);
5494 of->write_output_view(this->offset(), oview_size, oview);
5497 // Arm_exidx_fixup methods.
5499 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5500 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5501 // points to the end of the last seen EXIDX section.
5504 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5506 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5507 && this->last_input_section_ != NULL)
5509 Relobj* relobj = this->last_input_section_->relobj();
5510 unsigned int text_shndx = this->last_input_section_->link();
5511 Arm_exidx_cantunwind* cantunwind =
5512 new Arm_exidx_cantunwind(relobj, text_shndx);
5513 this->exidx_output_section_->add_output_section_data(cantunwind);
5514 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5518 // Process an EXIDX section entry in input. Return whether this entry
5519 // can be deleted in the output. SECOND_WORD in the second word of the
5523 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5526 if (second_word == elfcpp::EXIDX_CANTUNWIND)
5528 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5529 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5530 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5532 else if ((second_word & 0x80000000) != 0)
5534 // Inlined unwinding data. Merge if equal to previous.
5535 delete_entry = (merge_exidx_entries_
5536 && this->last_unwind_type_ == UT_INLINED_ENTRY
5537 && this->last_inlined_entry_ == second_word);
5538 this->last_unwind_type_ = UT_INLINED_ENTRY;
5539 this->last_inlined_entry_ = second_word;
5543 // Normal table entry. In theory we could merge these too,
5544 // but duplicate entries are likely to be much less common.
5545 delete_entry = false;
5546 this->last_unwind_type_ = UT_NORMAL_ENTRY;
5548 return delete_entry;
5551 // Update the current section offset map during EXIDX section fix-up.
5552 // If there is no map, create one. INPUT_OFFSET is the offset of a
5553 // reference point, DELETED_BYTES is the number of deleted by in the
5554 // section so far. If DELETE_ENTRY is true, the reference point and
5555 // all offsets after the previous reference point are discarded.
5558 Arm_exidx_fixup::update_offset_map(
5559 section_offset_type input_offset,
5560 section_size_type deleted_bytes,
5563 if (this->section_offset_map_ == NULL)
5564 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5565 section_offset_type output_offset;
5567 output_offset = Arm_exidx_input_section::invalid_offset;
5569 output_offset = input_offset - deleted_bytes;
5570 (*this->section_offset_map_)[input_offset] = output_offset;
5573 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5574 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5575 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5576 // If some entries are merged, also store a pointer to a newly created
5577 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5578 // owns the map and is responsible for releasing it after use.
5580 template<bool big_endian>
5582 Arm_exidx_fixup::process_exidx_section(
5583 const Arm_exidx_input_section* exidx_input_section,
5584 const unsigned char* section_contents,
5585 section_size_type section_size,
5586 Arm_exidx_section_offset_map** psection_offset_map)
5588 Relobj* relobj = exidx_input_section->relobj();
5589 unsigned shndx = exidx_input_section->shndx();
5591 if ((section_size % 8) != 0)
5593 // Something is wrong with this section. Better not touch it.
5594 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5595 relobj->name().c_str(), shndx);
5596 this->last_input_section_ = exidx_input_section;
5597 this->last_unwind_type_ = UT_NONE;
5601 uint32_t deleted_bytes = 0;
5602 bool prev_delete_entry = false;
5603 gold_assert(this->section_offset_map_ == NULL);
5605 for (section_size_type i = 0; i < section_size; i += 8)
5607 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5609 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5610 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5612 bool delete_entry = this->process_exidx_entry(second_word);
5614 // Entry deletion causes changes in output offsets. We use a std::map
5615 // to record these. And entry (x, y) means input offset x
5616 // is mapped to output offset y. If y is invalid_offset, then x is
5617 // dropped in the output. Because of the way std::map::lower_bound
5618 // works, we record the last offset in a region w.r.t to keeping or
5619 // dropping. If there is no entry (x0, y0) for an input offset x0,
5620 // the output offset y0 of it is determined by the output offset y1 of
5621 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5622 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5624 if (delete_entry != prev_delete_entry && i != 0)
5625 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5627 // Update total deleted bytes for this entry.
5631 prev_delete_entry = delete_entry;
5634 // If section offset map is not NULL, make an entry for the end of
5636 if (this->section_offset_map_ != NULL)
5637 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5639 *psection_offset_map = this->section_offset_map_;
5640 this->section_offset_map_ = NULL;
5641 this->last_input_section_ = exidx_input_section;
5643 // Set the first output text section so that we can link the EXIDX output
5644 // section to it. Ignore any EXIDX input section that is completely merged.
5645 if (this->first_output_text_section_ == NULL
5646 && deleted_bytes != section_size)
5648 unsigned int link = exidx_input_section->link();
5649 Output_section* os = relobj->output_section(link);
5650 gold_assert(os != NULL);
5651 this->first_output_text_section_ = os;
5654 return deleted_bytes;
5657 // Arm_output_section methods.
5659 // Create a stub group for input sections from BEGIN to END. OWNER
5660 // points to the input section to be the owner a new stub table.
5662 template<bool big_endian>
5664 Arm_output_section<big_endian>::create_stub_group(
5665 Input_section_list::const_iterator begin,
5666 Input_section_list::const_iterator end,
5667 Input_section_list::const_iterator owner,
5668 Target_arm<big_endian>* target,
5669 std::vector<Output_relaxed_input_section*>* new_relaxed_sections,
5672 // We use a different kind of relaxed section in an EXIDX section.
5673 // The static casting from Output_relaxed_input_section to
5674 // Arm_input_section is invalid in an EXIDX section. We are okay
5675 // because we should not be calling this for an EXIDX section.
5676 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5678 // Currently we convert ordinary input sections into relaxed sections only
5679 // at this point but we may want to support creating relaxed input section
5680 // very early. So we check here to see if owner is already a relaxed
5683 Arm_input_section<big_endian>* arm_input_section;
5684 if (owner->is_relaxed_input_section())
5687 Arm_input_section<big_endian>::as_arm_input_section(
5688 owner->relaxed_input_section());
5692 gold_assert(owner->is_input_section());
5693 // Create a new relaxed input section. We need to lock the original
5695 Task_lock_obj<Object> tl(task, owner->relobj());
5697 target->new_arm_input_section(owner->relobj(), owner->shndx());
5698 new_relaxed_sections->push_back(arm_input_section);
5701 // Create a stub table.
5702 Stub_table<big_endian>* stub_table =
5703 target->new_stub_table(arm_input_section);
5705 arm_input_section->set_stub_table(stub_table);
5707 Input_section_list::const_iterator p = begin;
5708 Input_section_list::const_iterator prev_p;
5710 // Look for input sections or relaxed input sections in [begin ... end].
5713 if (p->is_input_section() || p->is_relaxed_input_section())
5715 // The stub table information for input sections live
5716 // in their objects.
5717 Arm_relobj<big_endian>* arm_relobj =
5718 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5719 arm_relobj->set_stub_table(p->shndx(), stub_table);
5723 while (prev_p != end);
5726 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5727 // of stub groups. We grow a stub group by adding input section until the
5728 // size is just below GROUP_SIZE. The last input section will be converted
5729 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5730 // input section after the stub table, effectively double the group size.
5732 // This is similar to the group_sections() function in elf32-arm.c but is
5733 // implemented differently.
5735 template<bool big_endian>
5737 Arm_output_section<big_endian>::group_sections(
5738 section_size_type group_size,
5739 bool stubs_always_after_branch,
5740 Target_arm<big_endian>* target,
5743 // States for grouping.
5746 // No group is being built.
5748 // A group is being built but the stub table is not found yet.
5749 // We keep group a stub group until the size is just under GROUP_SIZE.
5750 // The last input section in the group will be used as the stub table.
5751 FINDING_STUB_SECTION,
5752 // A group is being built and we have already found a stub table.
5753 // We enter this state to grow a stub group by adding input section
5754 // after the stub table. This effectively doubles the group size.
5758 // Any newly created relaxed sections are stored here.
5759 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5761 State state = NO_GROUP;
5762 section_size_type off = 0;
5763 section_size_type group_begin_offset = 0;
5764 section_size_type group_end_offset = 0;
5765 section_size_type stub_table_end_offset = 0;
5766 Input_section_list::const_iterator group_begin =
5767 this->input_sections().end();
5768 Input_section_list::const_iterator stub_table =
5769 this->input_sections().end();
5770 Input_section_list::const_iterator group_end = this->input_sections().end();
5771 for (Input_section_list::const_iterator p = this->input_sections().begin();
5772 p != this->input_sections().end();
5775 section_size_type section_begin_offset =
5776 align_address(off, p->addralign());
5777 section_size_type section_end_offset =
5778 section_begin_offset + p->data_size();
5780 // Check to see if we should group the previously seen sections.
5786 case FINDING_STUB_SECTION:
5787 // Adding this section makes the group larger than GROUP_SIZE.
5788 if (section_end_offset - group_begin_offset >= group_size)
5790 if (stubs_always_after_branch)
5792 gold_assert(group_end != this->input_sections().end());
5793 this->create_stub_group(group_begin, group_end, group_end,
5794 target, &new_relaxed_sections,
5800 // But wait, there's more! Input sections up to
5801 // stub_group_size bytes after the stub table can be
5802 // handled by it too.
5803 state = HAS_STUB_SECTION;
5804 stub_table = group_end;
5805 stub_table_end_offset = group_end_offset;
5810 case HAS_STUB_SECTION:
5811 // Adding this section makes the post stub-section group larger
5813 if (section_end_offset - stub_table_end_offset >= group_size)
5815 gold_assert(group_end != this->input_sections().end());
5816 this->create_stub_group(group_begin, group_end, stub_table,
5817 target, &new_relaxed_sections, task);
5826 // If we see an input section and currently there is no group, start
5827 // a new one. Skip any empty sections. We look at the data size
5828 // instead of calling p->relobj()->section_size() to avoid locking.
5829 if ((p->is_input_section() || p->is_relaxed_input_section())
5830 && (p->data_size() != 0))
5832 if (state == NO_GROUP)
5834 state = FINDING_STUB_SECTION;
5836 group_begin_offset = section_begin_offset;
5839 // Keep track of the last input section seen.
5841 group_end_offset = section_end_offset;
5844 off = section_end_offset;
5847 // Create a stub group for any ungrouped sections.
5848 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5850 gold_assert(group_end != this->input_sections().end());
5851 this->create_stub_group(group_begin, group_end,
5852 (state == FINDING_STUB_SECTION
5855 target, &new_relaxed_sections, task);
5858 // Convert input section into relaxed input section in a batch.
5859 if (!new_relaxed_sections.empty())
5860 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5862 // Update the section offsets
5863 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5865 Arm_relobj<big_endian>* arm_relobj =
5866 Arm_relobj<big_endian>::as_arm_relobj(
5867 new_relaxed_sections[i]->relobj());
5868 unsigned int shndx = new_relaxed_sections[i]->shndx();
5869 // Tell Arm_relobj that this input section is converted.
5870 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5874 // Append non empty text sections in this to LIST in ascending
5875 // order of their position in this.
5877 template<bool big_endian>
5879 Arm_output_section<big_endian>::append_text_sections_to_list(
5880 Text_section_list* list)
5882 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5884 for (Input_section_list::const_iterator p = this->input_sections().begin();
5885 p != this->input_sections().end();
5888 // We only care about plain or relaxed input sections. We also
5889 // ignore any merged sections.
5890 if (p->is_input_section() || p->is_relaxed_input_section())
5891 list->push_back(Text_section_list::value_type(p->relobj(),
5896 template<bool big_endian>
5898 Arm_output_section<big_endian>::fix_exidx_coverage(
5900 const Text_section_list& sorted_text_sections,
5901 Symbol_table* symtab,
5902 bool merge_exidx_entries,
5905 // We should only do this for the EXIDX output section.
5906 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5908 // We don't want the relaxation loop to undo these changes, so we discard
5909 // the current saved states and take another one after the fix-up.
5910 this->discard_states();
5912 // Remove all input sections.
5913 uint64_t address = this->address();
5914 typedef std::list<Output_section::Input_section> Input_section_list;
5915 Input_section_list input_sections;
5916 this->reset_address_and_file_offset();
5917 this->get_input_sections(address, std::string(""), &input_sections);
5919 if (!this->input_sections().empty())
5920 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5922 // Go through all the known input sections and record them.
5923 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5924 typedef Unordered_map<Section_id, const Output_section::Input_section*,
5925 Section_id_hash> Text_to_exidx_map;
5926 Text_to_exidx_map text_to_exidx_map;
5927 for (Input_section_list::const_iterator p = input_sections.begin();
5928 p != input_sections.end();
5931 // This should never happen. At this point, we should only see
5932 // plain EXIDX input sections.
5933 gold_assert(!p->is_relaxed_input_section());
5934 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p);
5937 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries);
5939 // Go over the sorted text sections.
5940 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5941 Section_id_set processed_input_sections;
5942 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5943 p != sorted_text_sections.end();
5946 Relobj* relobj = p->first;
5947 unsigned int shndx = p->second;
5949 Arm_relobj<big_endian>* arm_relobj =
5950 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5951 const Arm_exidx_input_section* exidx_input_section =
5952 arm_relobj->exidx_input_section_by_link(shndx);
5954 // If this text section has no EXIDX section or if the EXIDX section
5955 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5956 // of the last seen EXIDX section.
5957 if (exidx_input_section == NULL || exidx_input_section->has_errors())
5959 exidx_fixup.add_exidx_cantunwind_as_needed();
5963 Relobj* exidx_relobj = exidx_input_section->relobj();
5964 unsigned int exidx_shndx = exidx_input_section->shndx();
5965 Section_id sid(exidx_relobj, exidx_shndx);
5966 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid);
5967 if (iter == text_to_exidx_map.end())
5969 // This is odd. We have not seen this EXIDX input section before.
5970 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5971 // issue a warning instead. We assume the user knows what he
5972 // or she is doing. Otherwise, this is an error.
5973 if (layout->script_options()->saw_sections_clause())
5974 gold_warning(_("unwinding may not work because EXIDX input section"
5975 " %u of %s is not in EXIDX output section"),
5976 exidx_shndx, exidx_relobj->name().c_str());
5978 gold_error(_("unwinding may not work because EXIDX input section"
5979 " %u of %s is not in EXIDX output section"),
5980 exidx_shndx, exidx_relobj->name().c_str());
5982 exidx_fixup.add_exidx_cantunwind_as_needed();
5986 // We need to access the contents of the EXIDX section, lock the
5988 Task_lock_obj<Object> tl(task, exidx_relobj);
5989 section_size_type exidx_size;
5990 const unsigned char* exidx_contents =
5991 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false);
5993 // Fix up coverage and append input section to output data list.
5994 Arm_exidx_section_offset_map* section_offset_map = NULL;
5995 uint32_t deleted_bytes =
5996 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5999 §ion_offset_map);
6001 if (deleted_bytes == exidx_input_section->size())
6003 // The whole EXIDX section got merged. Remove it from output.
6004 gold_assert(section_offset_map == NULL);
6005 exidx_relobj->set_output_section(exidx_shndx, NULL);
6007 // All local symbols defined in this input section will be dropped.
6008 // We need to adjust output local symbol count.
6009 arm_relobj->set_output_local_symbol_count_needs_update();
6011 else if (deleted_bytes > 0)
6013 // Some entries are merged. We need to convert this EXIDX input
6014 // section into a relaxed section.
6015 gold_assert(section_offset_map != NULL);
6017 Arm_exidx_merged_section* merged_section =
6018 new Arm_exidx_merged_section(*exidx_input_section,
6019 *section_offset_map, deleted_bytes);
6020 merged_section->build_contents(exidx_contents, exidx_size);
6022 const std::string secname = exidx_relobj->section_name(exidx_shndx);
6023 this->add_relaxed_input_section(layout, merged_section, secname);
6024 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
6026 // All local symbols defined in discarded portions of this input
6027 // section will be dropped. We need to adjust output local symbol
6029 arm_relobj->set_output_local_symbol_count_needs_update();
6033 // Just add back the EXIDX input section.
6034 gold_assert(section_offset_map == NULL);
6035 const Output_section::Input_section* pis = iter->second;
6036 gold_assert(pis->is_input_section());
6037 this->add_script_input_section(*pis);
6040 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
6043 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6044 exidx_fixup.add_exidx_cantunwind_as_needed();
6046 // Remove any known EXIDX input sections that are not processed.
6047 for (Input_section_list::const_iterator p = input_sections.begin();
6048 p != input_sections.end();
6051 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
6052 == processed_input_sections.end())
6054 // We discard a known EXIDX section because its linked
6055 // text section has been folded by ICF. We also discard an
6056 // EXIDX section with error, the output does not matter in this
6057 // case. We do this to avoid triggering asserts.
6058 Arm_relobj<big_endian>* arm_relobj =
6059 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6060 const Arm_exidx_input_section* exidx_input_section =
6061 arm_relobj->exidx_input_section_by_shndx(p->shndx());
6062 gold_assert(exidx_input_section != NULL);
6063 if (!exidx_input_section->has_errors())
6065 unsigned int text_shndx = exidx_input_section->link();
6066 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
6069 // Remove this from link. We also need to recount the
6071 p->relobj()->set_output_section(p->shndx(), NULL);
6072 arm_relobj->set_output_local_symbol_count_needs_update();
6076 // Link exidx output section to the first seen output section and
6077 // set correct entry size.
6078 this->set_link_section(exidx_fixup.first_output_text_section());
6079 this->set_entsize(8);
6081 // Make changes permanent.
6082 this->save_states();
6083 this->set_section_offsets_need_adjustment();
6086 // Link EXIDX output sections to text output sections.
6088 template<bool big_endian>
6090 Arm_output_section<big_endian>::set_exidx_section_link()
6092 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
6093 if (!this->input_sections().empty())
6095 Input_section_list::const_iterator p = this->input_sections().begin();
6096 Arm_relobj<big_endian>* arm_relobj =
6097 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6098 unsigned exidx_shndx = p->shndx();
6099 const Arm_exidx_input_section* exidx_input_section =
6100 arm_relobj->exidx_input_section_by_shndx(exidx_shndx);
6101 gold_assert(exidx_input_section != NULL);
6102 unsigned int text_shndx = exidx_input_section->link();
6103 Output_section* os = arm_relobj->output_section(text_shndx);
6104 this->set_link_section(os);
6108 // Arm_relobj methods.
6110 // Determine if an input section is scannable for stub processing. SHDR is
6111 // the header of the section and SHNDX is the section index. OS is the output
6112 // section for the input section and SYMTAB is the global symbol table used to
6113 // look up ICF information.
6115 template<bool big_endian>
6117 Arm_relobj<big_endian>::section_is_scannable(
6118 const elfcpp::Shdr<32, big_endian>& shdr,
6120 const Output_section* os,
6121 const Symbol_table* symtab)
6123 // Skip any empty sections, unallocated sections or sections whose
6124 // type are not SHT_PROGBITS.
6125 if (shdr.get_sh_size() == 0
6126 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
6127 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
6130 // Skip any discarded or ICF'ed sections.
6131 if (os == NULL || symtab->is_section_folded(this, shndx))
6134 // If this requires special offset handling, check to see if it is
6135 // a relaxed section. If this is not, then it is a merged section that
6136 // we cannot handle.
6137 if (this->is_output_section_offset_invalid(shndx))
6139 const Output_relaxed_input_section* poris =
6140 os->find_relaxed_input_section(this, shndx);
6148 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6149 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6151 template<bool big_endian>
6153 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
6154 const elfcpp::Shdr<32, big_endian>& shdr,
6155 const Relobj::Output_sections& out_sections,
6156 const Symbol_table* symtab,
6157 const unsigned char* pshdrs)
6159 unsigned int sh_type = shdr.get_sh_type();
6160 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
6163 // Ignore empty section.
6164 off_t sh_size = shdr.get_sh_size();
6168 // Ignore reloc section with unexpected symbol table. The
6169 // error will be reported in the final link.
6170 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
6173 unsigned int reloc_size;
6174 if (sh_type == elfcpp::SHT_REL)
6175 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6177 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6179 // Ignore reloc section with unexpected entsize or uneven size.
6180 // The error will be reported in the final link.
6181 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
6184 // Ignore reloc section with bad info. This error will be
6185 // reported in the final link.
6186 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6187 if (index >= this->shnum())
6190 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6191 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
6192 return this->section_is_scannable(text_shdr, index,
6193 out_sections[index], symtab);
6196 // Return the output address of either a plain input section or a relaxed
6197 // input section. SHNDX is the section index. We define and use this
6198 // instead of calling Output_section::output_address because that is slow
6199 // for large output.
6201 template<bool big_endian>
6203 Arm_relobj<big_endian>::simple_input_section_output_address(
6207 if (this->is_output_section_offset_invalid(shndx))
6209 const Output_relaxed_input_section* poris =
6210 os->find_relaxed_input_section(this, shndx);
6211 // We do not handle merged sections here.
6212 gold_assert(poris != NULL);
6213 return poris->address();
6216 return os->address() + this->get_output_section_offset(shndx);
6219 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6220 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6222 template<bool big_endian>
6224 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
6225 const elfcpp::Shdr<32, big_endian>& shdr,
6228 const Symbol_table* symtab)
6230 if (!this->section_is_scannable(shdr, shndx, os, symtab))
6233 // If the section does not cross any 4K-boundaries, it does not need to
6235 Arm_address address = this->simple_input_section_output_address(shndx, os);
6236 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
6242 // Scan a section for Cortex-A8 workaround.
6244 template<bool big_endian>
6246 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
6247 const elfcpp::Shdr<32, big_endian>& shdr,
6250 Target_arm<big_endian>* arm_target)
6252 // Look for the first mapping symbol in this section. It should be
6254 Mapping_symbol_position section_start(shndx, 0);
6255 typename Mapping_symbols_info::const_iterator p =
6256 this->mapping_symbols_info_.lower_bound(section_start);
6258 // There are no mapping symbols for this section. Treat it as a data-only
6260 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
6263 Arm_address output_address =
6264 this->simple_input_section_output_address(shndx, os);
6266 // Get the section contents.
6267 section_size_type input_view_size = 0;
6268 const unsigned char* input_view =
6269 this->section_contents(shndx, &input_view_size, false);
6271 // We need to go through the mapping symbols to determine what to
6272 // scan. There are two reasons. First, we should look at THUMB code and
6273 // THUMB code only. Second, we only want to look at the 4K-page boundary
6274 // to speed up the scanning.
6276 while (p != this->mapping_symbols_info_.end()
6277 && p->first.first == shndx)
6279 typename Mapping_symbols_info::const_iterator next =
6280 this->mapping_symbols_info_.upper_bound(p->first);
6282 // Only scan part of a section with THUMB code.
6283 if (p->second == 't')
6285 // Determine the end of this range.
6286 section_size_type span_start =
6287 convert_to_section_size_type(p->first.second);
6288 section_size_type span_end;
6289 if (next != this->mapping_symbols_info_.end()
6290 && next->first.first == shndx)
6291 span_end = convert_to_section_size_type(next->first.second);
6293 span_end = convert_to_section_size_type(shdr.get_sh_size());
6295 if (((span_start + output_address) & ~0xfffUL)
6296 != ((span_end + output_address - 1) & ~0xfffUL))
6298 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
6299 span_start, span_end,
6309 // Scan relocations for stub generation.
6311 template<bool big_endian>
6313 Arm_relobj<big_endian>::scan_sections_for_stubs(
6314 Target_arm<big_endian>* arm_target,
6315 const Symbol_table* symtab,
6316 const Layout* layout)
6318 unsigned int shnum = this->shnum();
6319 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6321 // Read the section headers.
6322 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6326 // To speed up processing, we set up hash tables for fast lookup of
6327 // input offsets to output addresses.
6328 this->initialize_input_to_output_maps();
6330 const Relobj::Output_sections& out_sections(this->output_sections());
6332 Relocate_info<32, big_endian> relinfo;
6333 relinfo.symtab = symtab;
6334 relinfo.layout = layout;
6335 relinfo.object = this;
6337 // Do relocation stubs scanning.
6338 const unsigned char* p = pshdrs + shdr_size;
6339 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6341 const elfcpp::Shdr<32, big_endian> shdr(p);
6342 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
6345 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6346 Arm_address output_offset = this->get_output_section_offset(index);
6347 Arm_address output_address;
6348 if (output_offset != invalid_address)
6349 output_address = out_sections[index]->address() + output_offset;
6352 // Currently this only happens for a relaxed section.
6353 const Output_relaxed_input_section* poris =
6354 out_sections[index]->find_relaxed_input_section(this, index);
6355 gold_assert(poris != NULL);
6356 output_address = poris->address();
6359 // Get the relocations.
6360 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
6364 // Get the section contents. This does work for the case in which
6365 // we modify the contents of an input section. We need to pass the
6366 // output view under such circumstances.
6367 section_size_type input_view_size = 0;
6368 const unsigned char* input_view =
6369 this->section_contents(index, &input_view_size, false);
6371 relinfo.reloc_shndx = i;
6372 relinfo.data_shndx = index;
6373 unsigned int sh_type = shdr.get_sh_type();
6374 unsigned int reloc_size;
6375 if (sh_type == elfcpp::SHT_REL)
6376 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6378 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6380 Output_section* os = out_sections[index];
6381 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
6382 shdr.get_sh_size() / reloc_size,
6384 output_offset == invalid_address,
6385 input_view, output_address,
6390 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6391 // after its relocation section, if there is one, is processed for
6392 // relocation stubs. Merging this loop with the one above would have been
6393 // complicated since we would have had to make sure that relocation stub
6394 // scanning is done first.
6395 if (arm_target->fix_cortex_a8())
6397 const unsigned char* p = pshdrs + shdr_size;
6398 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6400 const elfcpp::Shdr<32, big_endian> shdr(p);
6401 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
6404 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
6409 // After we've done the relocations, we release the hash tables,
6410 // since we no longer need them.
6411 this->free_input_to_output_maps();
6414 // Count the local symbols. The ARM backend needs to know if a symbol
6415 // is a THUMB function or not. For global symbols, it is easy because
6416 // the Symbol object keeps the ELF symbol type. For local symbol it is
6417 // harder because we cannot access this information. So we override the
6418 // do_count_local_symbol in parent and scan local symbols to mark
6419 // THUMB functions. This is not the most efficient way but I do not want to
6420 // slow down other ports by calling a per symbol target hook inside
6421 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6423 template<bool big_endian>
6425 Arm_relobj<big_endian>::do_count_local_symbols(
6426 Stringpool_template<char>* pool,
6427 Stringpool_template<char>* dynpool)
6429 // We need to fix-up the values of any local symbols whose type are
6432 // Ask parent to count the local symbols.
6433 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool);
6434 const unsigned int loccount = this->local_symbol_count();
6438 // Initialize the thumb function bit-vector.
6439 std::vector<bool> empty_vector(loccount, false);
6440 this->local_symbol_is_thumb_function_.swap(empty_vector);
6442 // Read the symbol table section header.
6443 const unsigned int symtab_shndx = this->symtab_shndx();
6444 elfcpp::Shdr<32, big_endian>
6445 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6446 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6448 // Read the local symbols.
6449 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6450 gold_assert(loccount == symtabshdr.get_sh_info());
6451 off_t locsize = loccount * sym_size;
6452 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6453 locsize, true, true);
6455 // For mapping symbol processing, we need to read the symbol names.
6456 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
6457 if (strtab_shndx >= this->shnum())
6459 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
6463 elfcpp::Shdr<32, big_endian>
6464 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
6465 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
6467 this->error(_("symbol table name section has wrong type: %u"),
6468 static_cast<unsigned int>(strtabshdr.get_sh_type()));
6471 const char* pnames =
6472 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
6473 strtabshdr.get_sh_size(),
6476 // Loop over the local symbols and mark any local symbols pointing
6477 // to THUMB functions.
6479 // Skip the first dummy symbol.
6481 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values =
6482 this->local_values();
6483 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6485 elfcpp::Sym<32, big_endian> sym(psyms);
6486 elfcpp::STT st_type = sym.get_st_type();
6487 Symbol_value<32>& lv((*plocal_values)[i]);
6488 Arm_address input_value = lv.input_value();
6490 // Check to see if this is a mapping symbol.
6491 const char* sym_name = pnames + sym.get_st_name();
6492 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
6495 unsigned int input_shndx =
6496 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary);
6497 gold_assert(is_ordinary);
6499 // Strip of LSB in case this is a THUMB symbol.
6500 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
6501 this->mapping_symbols_info_[msp] = sym_name[1];
6504 if (st_type == elfcpp::STT_ARM_TFUNC
6505 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
6507 // This is a THUMB function. Mark this and canonicalize the
6508 // symbol value by setting LSB.
6509 this->local_symbol_is_thumb_function_[i] = true;
6510 if ((input_value & 1) == 0)
6511 lv.set_input_value(input_value | 1);
6516 // Relocate sections.
6517 template<bool big_endian>
6519 Arm_relobj<big_endian>::do_relocate_sections(
6520 const Symbol_table* symtab,
6521 const Layout* layout,
6522 const unsigned char* pshdrs,
6524 typename Sized_relobj_file<32, big_endian>::Views* pviews)
6526 // Call parent to relocate sections.
6527 Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout,
6528 pshdrs, of, pviews);
6530 // We do not generate stubs if doing a relocatable link.
6531 if (parameters->options().relocatable())
6534 // Relocate stub tables.
6535 unsigned int shnum = this->shnum();
6537 Target_arm<big_endian>* arm_target =
6538 Target_arm<big_endian>::default_target();
6540 Relocate_info<32, big_endian> relinfo;
6541 relinfo.symtab = symtab;
6542 relinfo.layout = layout;
6543 relinfo.object = this;
6545 for (unsigned int i = 1; i < shnum; ++i)
6547 Arm_input_section<big_endian>* arm_input_section =
6548 arm_target->find_arm_input_section(this, i);
6550 if (arm_input_section != NULL
6551 && arm_input_section->is_stub_table_owner()
6552 && !arm_input_section->stub_table()->empty())
6554 // We cannot discard a section if it owns a stub table.
6555 Output_section* os = this->output_section(i);
6556 gold_assert(os != NULL);
6558 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
6559 relinfo.reloc_shdr = NULL;
6560 relinfo.data_shndx = i;
6561 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
6563 gold_assert((*pviews)[i].view != NULL);
6565 // We are passed the output section view. Adjust it to cover the
6567 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6568 gold_assert((stub_table->address() >= (*pviews)[i].address)
6569 && ((stub_table->address() + stub_table->data_size())
6570 <= (*pviews)[i].address + (*pviews)[i].view_size));
6572 off_t offset = stub_table->address() - (*pviews)[i].address;
6573 unsigned char* view = (*pviews)[i].view + offset;
6574 Arm_address address = stub_table->address();
6575 section_size_type view_size = stub_table->data_size();
6577 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6581 // Apply Cortex A8 workaround if applicable.
6582 if (this->section_has_cortex_a8_workaround(i))
6584 unsigned char* view = (*pviews)[i].view;
6585 Arm_address view_address = (*pviews)[i].address;
6586 section_size_type view_size = (*pviews)[i].view_size;
6587 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6589 // Adjust view to cover section.
6590 Output_section* os = this->output_section(i);
6591 gold_assert(os != NULL);
6592 Arm_address section_address =
6593 this->simple_input_section_output_address(i, os);
6594 uint64_t section_size = this->section_size(i);
6596 gold_assert(section_address >= view_address
6597 && ((section_address + section_size)
6598 <= (view_address + view_size)));
6600 unsigned char* section_view = view + (section_address - view_address);
6602 // Apply the Cortex-A8 workaround to the output address range
6603 // corresponding to this input section.
6604 stub_table->apply_cortex_a8_workaround_to_address_range(
6613 // Find the linked text section of an EXIDX section by looking at the first
6614 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6615 // must be linked to its associated code section via the sh_link field of
6616 // its section header. However, some tools are broken and the link is not
6617 // always set. LD just drops such an EXIDX section silently, causing the
6618 // associated code not unwindabled. Here we try a little bit harder to
6619 // discover the linked code section.
6621 // PSHDR points to the section header of a relocation section of an EXIDX
6622 // section. If we can find a linked text section, return true and
6623 // store the text section index in the location PSHNDX. Otherwise
6626 template<bool big_endian>
6628 Arm_relobj<big_endian>::find_linked_text_section(
6629 const unsigned char* pshdr,
6630 const unsigned char* psyms,
6631 unsigned int* pshndx)
6633 elfcpp::Shdr<32, big_endian> shdr(pshdr);
6635 // If there is no relocation, we cannot find the linked text section.
6637 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6638 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6640 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6641 size_t reloc_count = shdr.get_sh_size() / reloc_size;
6643 // Get the relocations.
6644 const unsigned char* prelocs =
6645 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6647 // Find the REL31 relocation for the first word of the first EXIDX entry.
6648 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6650 Arm_address r_offset;
6651 typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6652 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6654 typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6655 r_info = reloc.get_r_info();
6656 r_offset = reloc.get_r_offset();
6660 typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6661 r_info = reloc.get_r_info();
6662 r_offset = reloc.get_r_offset();
6665 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6666 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6669 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6671 || r_sym >= this->local_symbol_count()
6675 // This is the relocation for the first word of the first EXIDX entry.
6676 // We expect to see a local section symbol.
6677 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6678 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6679 if (sym.get_st_type() == elfcpp::STT_SECTION)
6683 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary);
6684 gold_assert(is_ordinary);
6694 // Make an EXIDX input section object for an EXIDX section whose index is
6695 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6696 // is the section index of the linked text section.
6698 template<bool big_endian>
6700 Arm_relobj<big_endian>::make_exidx_input_section(
6702 const elfcpp::Shdr<32, big_endian>& shdr,
6703 unsigned int text_shndx,
6704 const elfcpp::Shdr<32, big_endian>& text_shdr)
6706 // Create an Arm_exidx_input_section object for this EXIDX section.
6707 Arm_exidx_input_section* exidx_input_section =
6708 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6709 shdr.get_sh_addralign(),
6710 text_shdr.get_sh_size());
6712 gold_assert(this->exidx_section_map_[shndx] == NULL);
6713 this->exidx_section_map_[shndx] = exidx_input_section;
6715 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum())
6717 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6718 this->section_name(shndx).c_str(), shndx, text_shndx,
6719 this->name().c_str());
6720 exidx_input_section->set_has_errors();
6722 else if (this->exidx_section_map_[text_shndx] != NULL)
6724 unsigned other_exidx_shndx =
6725 this->exidx_section_map_[text_shndx]->shndx();
6726 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6728 this->section_name(shndx).c_str(), shndx,
6729 this->section_name(other_exidx_shndx).c_str(),
6730 other_exidx_shndx, this->section_name(text_shndx).c_str(),
6731 text_shndx, this->name().c_str());
6732 exidx_input_section->set_has_errors();
6735 this->exidx_section_map_[text_shndx] = exidx_input_section;
6737 // Check section flags of text section.
6738 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0)
6740 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6742 this->section_name(shndx).c_str(), shndx,
6743 this->section_name(text_shndx).c_str(), text_shndx,
6744 this->name().c_str());
6745 exidx_input_section->set_has_errors();
6747 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0)
6748 // I would like to make this an error but currently ld just ignores
6750 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6752 this->section_name(shndx).c_str(), shndx,
6753 this->section_name(text_shndx).c_str(), text_shndx,
6754 this->name().c_str());
6757 // Read the symbol information.
6759 template<bool big_endian>
6761 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6763 // Call parent class to read symbol information.
6764 this->base_read_symbols(sd);
6766 // If this input file is a binary file, it has no processor
6767 // specific flags and attributes section.
6768 Input_file::Format format = this->input_file()->format();
6769 if (format != Input_file::FORMAT_ELF)
6771 gold_assert(format == Input_file::FORMAT_BINARY);
6772 this->merge_flags_and_attributes_ = false;
6776 // Read processor-specific flags in ELF file header.
6777 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6778 elfcpp::Elf_sizes<32>::ehdr_size,
6780 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6781 this->processor_specific_flags_ = ehdr.get_e_flags();
6783 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6785 std::vector<unsigned int> deferred_exidx_sections;
6786 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6787 const unsigned char* pshdrs = sd->section_headers->data();
6788 const unsigned char* ps = pshdrs + shdr_size;
6789 bool must_merge_flags_and_attributes = false;
6790 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6792 elfcpp::Shdr<32, big_endian> shdr(ps);
6794 // Sometimes an object has no contents except the section name string
6795 // table and an empty symbol table with the undefined symbol. We
6796 // don't want to merge processor-specific flags from such an object.
6797 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB)
6799 // Symbol table is not empty.
6800 const elfcpp::Elf_types<32>::Elf_WXword sym_size =
6801 elfcpp::Elf_sizes<32>::sym_size;
6802 if (shdr.get_sh_size() > sym_size)
6803 must_merge_flags_and_attributes = true;
6805 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB)
6806 // If this is neither an empty symbol table nor a string table,
6808 must_merge_flags_and_attributes = true;
6810 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6812 gold_assert(this->attributes_section_data_ == NULL);
6813 section_offset_type section_offset = shdr.get_sh_offset();
6814 section_size_type section_size =
6815 convert_to_section_size_type(shdr.get_sh_size());
6816 const unsigned char* view =
6817 this->get_view(section_offset, section_size, true, false);
6818 this->attributes_section_data_ =
6819 new Attributes_section_data(view, section_size);
6821 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6823 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6824 if (text_shndx == elfcpp::SHN_UNDEF)
6825 deferred_exidx_sections.push_back(i);
6828 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6829 + text_shndx * shdr_size);
6830 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr);
6832 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6833 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0)
6834 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6835 this->section_name(i).c_str(), this->name().c_str());
6840 if (!must_merge_flags_and_attributes)
6842 gold_assert(deferred_exidx_sections.empty());
6843 this->merge_flags_and_attributes_ = false;
6847 // Some tools are broken and they do not set the link of EXIDX sections.
6848 // We look at the first relocation to figure out the linked sections.
6849 if (!deferred_exidx_sections.empty())
6851 // We need to go over the section headers again to find the mapping
6852 // from sections being relocated to their relocation sections. This is
6853 // a bit inefficient as we could do that in the loop above. However,
6854 // we do not expect any deferred EXIDX sections normally. So we do not
6855 // want to slow down the most common path.
6856 typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
6857 Reloc_map reloc_map;
6858 ps = pshdrs + shdr_size;
6859 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6861 elfcpp::Shdr<32, big_endian> shdr(ps);
6862 elfcpp::Elf_Word sh_type = shdr.get_sh_type();
6863 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
6865 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
6866 if (info_shndx >= this->shnum())
6867 gold_error(_("relocation section %u has invalid info %u"),
6869 Reloc_map::value_type value(info_shndx, i);
6870 std::pair<Reloc_map::iterator, bool> result =
6871 reloc_map.insert(value);
6873 gold_error(_("section %u has multiple relocation sections "
6875 info_shndx, i, reloc_map[info_shndx]);
6879 // Read the symbol table section header.
6880 const unsigned int symtab_shndx = this->symtab_shndx();
6881 elfcpp::Shdr<32, big_endian>
6882 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6883 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6885 // Read the local symbols.
6886 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6887 const unsigned int loccount = this->local_symbol_count();
6888 gold_assert(loccount == symtabshdr.get_sh_info());
6889 off_t locsize = loccount * sym_size;
6890 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6891 locsize, true, true);
6893 // Process the deferred EXIDX sections.
6894 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
6896 unsigned int shndx = deferred_exidx_sections[i];
6897 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
6898 unsigned int text_shndx = elfcpp::SHN_UNDEF;
6899 Reloc_map::const_iterator it = reloc_map.find(shndx);
6900 if (it != reloc_map.end())
6901 find_linked_text_section(pshdrs + it->second * shdr_size,
6902 psyms, &text_shndx);
6903 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6904 + text_shndx * shdr_size);
6905 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr);
6910 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6911 // sections for unwinding. These sections are referenced implicitly by
6912 // text sections linked in the section headers. If we ignore these implicit
6913 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6914 // will be garbage-collected incorrectly. Hence we override the same function
6915 // in the base class to handle these implicit references.
6917 template<bool big_endian>
6919 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6921 Read_relocs_data* rd)
6923 // First, call base class method to process relocations in this object.
6924 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6926 // If --gc-sections is not specified, there is nothing more to do.
6927 // This happens when --icf is used but --gc-sections is not.
6928 if (!parameters->options().gc_sections())
6931 unsigned int shnum = this->shnum();
6932 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6933 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6937 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6938 // to these from the linked text sections.
6939 const unsigned char* ps = pshdrs + shdr_size;
6940 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6942 elfcpp::Shdr<32, big_endian> shdr(ps);
6943 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6945 // Found an .ARM.exidx section, add it to the set of reachable
6946 // sections from its linked text section.
6947 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6948 symtab->gc()->add_reference(this, text_shndx, this, i);
6953 // Update output local symbol count. Owing to EXIDX entry merging, some local
6954 // symbols will be removed in output. Adjust output local symbol count
6955 // accordingly. We can only changed the static output local symbol count. It
6956 // is too late to change the dynamic symbols.
6958 template<bool big_endian>
6960 Arm_relobj<big_endian>::update_output_local_symbol_count()
6962 // Caller should check that this needs updating. We want caller checking
6963 // because output_local_symbol_count_needs_update() is most likely inlined.
6964 gold_assert(this->output_local_symbol_count_needs_update_);
6966 gold_assert(this->symtab_shndx() != -1U);
6967 if (this->symtab_shndx() == 0)
6969 // This object has no symbols. Weird but legal.
6973 // Read the symbol table section header.
6974 const unsigned int symtab_shndx = this->symtab_shndx();
6975 elfcpp::Shdr<32, big_endian>
6976 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6977 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6979 // Read the local symbols.
6980 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6981 const unsigned int loccount = this->local_symbol_count();
6982 gold_assert(loccount == symtabshdr.get_sh_info());
6983 off_t locsize = loccount * sym_size;
6984 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6985 locsize, true, true);
6987 // Loop over the local symbols.
6989 typedef typename Sized_relobj_file<32, big_endian>::Output_sections
6991 const Output_sections& out_sections(this->output_sections());
6992 unsigned int shnum = this->shnum();
6993 unsigned int count = 0;
6994 // Skip the first, dummy, symbol.
6996 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6998 elfcpp::Sym<32, big_endian> sym(psyms);
7000 Symbol_value<32>& lv((*this->local_values())[i]);
7002 // This local symbol was already discarded by do_count_local_symbols.
7003 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry())
7007 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
7012 Output_section* os = out_sections[shndx];
7014 // This local symbol no longer has an output section. Discard it.
7017 lv.set_no_output_symtab_entry();
7021 // Currently we only discard parts of EXIDX input sections.
7022 // We explicitly check for a merged EXIDX input section to avoid
7023 // calling Output_section_data::output_offset unless necessary.
7024 if ((this->get_output_section_offset(shndx) == invalid_address)
7025 && (this->exidx_input_section_by_shndx(shndx) != NULL))
7027 section_offset_type output_offset =
7028 os->output_offset(this, shndx, lv.input_value());
7029 if (output_offset == -1)
7031 // This symbol is defined in a part of an EXIDX input section
7032 // that is discarded due to entry merging.
7033 lv.set_no_output_symtab_entry();
7042 this->set_output_local_symbol_count(count);
7043 this->output_local_symbol_count_needs_update_ = false;
7046 // Arm_dynobj methods.
7048 // Read the symbol information.
7050 template<bool big_endian>
7052 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
7054 // Call parent class to read symbol information.
7055 this->base_read_symbols(sd);
7057 // Read processor-specific flags in ELF file header.
7058 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
7059 elfcpp::Elf_sizes<32>::ehdr_size,
7061 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
7062 this->processor_specific_flags_ = ehdr.get_e_flags();
7064 // Read the attributes section if there is one.
7065 // We read from the end because gas seems to put it near the end of
7066 // the section headers.
7067 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
7068 const unsigned char* ps =
7069 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
7070 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
7072 elfcpp::Shdr<32, big_endian> shdr(ps);
7073 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
7075 section_offset_type section_offset = shdr.get_sh_offset();
7076 section_size_type section_size =
7077 convert_to_section_size_type(shdr.get_sh_size());
7078 const unsigned char* view =
7079 this->get_view(section_offset, section_size, true, false);
7080 this->attributes_section_data_ =
7081 new Attributes_section_data(view, section_size);
7087 // Stub_addend_reader methods.
7089 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7091 template<bool big_endian>
7092 elfcpp::Elf_types<32>::Elf_Swxword
7093 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
7094 unsigned int r_type,
7095 const unsigned char* view,
7096 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
7098 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
7102 case elfcpp::R_ARM_CALL:
7103 case elfcpp::R_ARM_JUMP24:
7104 case elfcpp::R_ARM_PLT32:
7106 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7107 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7108 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
7109 return Bits<26>::sign_extend32(val << 2);
7112 case elfcpp::R_ARM_THM_CALL:
7113 case elfcpp::R_ARM_THM_JUMP24:
7114 case elfcpp::R_ARM_THM_XPC22:
7116 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7117 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7118 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7119 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7120 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
7123 case elfcpp::R_ARM_THM_JUMP19:
7125 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7126 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7127 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7128 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7129 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
7137 // Arm_output_data_got methods.
7139 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7140 // The first one is initialized to be 1, which is the module index for
7141 // the main executable and the second one 0. A reloc of the type
7142 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7143 // be applied by gold. GSYM is a global symbol.
7145 template<bool big_endian>
7147 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7148 unsigned int got_type,
7151 if (gsym->has_got_offset(got_type))
7154 // We are doing a static link. Just mark it as belong to module 1,
7156 unsigned int got_offset = this->add_constant(1);
7157 gsym->set_got_offset(got_type, got_offset);
7158 got_offset = this->add_constant(0);
7159 this->static_relocs_.push_back(Static_reloc(got_offset,
7160 elfcpp::R_ARM_TLS_DTPOFF32,
7164 // Same as the above but for a local symbol.
7166 template<bool big_endian>
7168 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7169 unsigned int got_type,
7170 Sized_relobj_file<32, big_endian>* object,
7173 if (object->local_has_got_offset(index, got_type))
7176 // We are doing a static link. Just mark it as belong to module 1,
7178 unsigned int got_offset = this->add_constant(1);
7179 object->set_local_got_offset(index, got_type, got_offset);
7180 got_offset = this->add_constant(0);
7181 this->static_relocs_.push_back(Static_reloc(got_offset,
7182 elfcpp::R_ARM_TLS_DTPOFF32,
7186 template<bool big_endian>
7188 Arm_output_data_got<big_endian>::do_write(Output_file* of)
7190 // Call parent to write out GOT.
7191 Output_data_got<32, big_endian>::do_write(of);
7193 // We are done if there is no fix up.
7194 if (this->static_relocs_.empty())
7197 gold_assert(parameters->doing_static_link());
7199 const off_t offset = this->offset();
7200 const section_size_type oview_size =
7201 convert_to_section_size_type(this->data_size());
7202 unsigned char* const oview = of->get_output_view(offset, oview_size);
7204 Output_segment* tls_segment = this->layout_->tls_segment();
7205 gold_assert(tls_segment != NULL);
7207 // The thread pointer $tp points to the TCB, which is followed by the
7208 // TLS. So we need to adjust $tp relative addressing by this amount.
7209 Arm_address aligned_tcb_size =
7210 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
7212 for (size_t i = 0; i < this->static_relocs_.size(); ++i)
7214 Static_reloc& reloc(this->static_relocs_[i]);
7217 if (!reloc.symbol_is_global())
7219 Sized_relobj_file<32, big_endian>* object = reloc.relobj();
7220 const Symbol_value<32>* psymval =
7221 reloc.relobj()->local_symbol(reloc.index());
7223 // We are doing static linking. Issue an error and skip this
7224 // relocation if the symbol is undefined or in a discarded_section.
7226 unsigned int shndx = psymval->input_shndx(&is_ordinary);
7227 if ((shndx == elfcpp::SHN_UNDEF)
7229 && shndx != elfcpp::SHN_UNDEF
7230 && !object->is_section_included(shndx)
7231 && !this->symbol_table_->is_section_folded(object, shndx)))
7233 gold_error(_("undefined or discarded local symbol %u from "
7234 " object %s in GOT"),
7235 reloc.index(), reloc.relobj()->name().c_str());
7239 value = psymval->value(object, 0);
7243 const Symbol* gsym = reloc.symbol();
7244 gold_assert(gsym != NULL);
7245 if (gsym->is_forwarder())
7246 gsym = this->symbol_table_->resolve_forwards(gsym);
7248 // We are doing static linking. Issue an error and skip this
7249 // relocation if the symbol is undefined or in a discarded_section
7250 // unless it is a weakly_undefined symbol.
7251 if ((gsym->is_defined_in_discarded_section()
7252 || gsym->is_undefined())
7253 && !gsym->is_weak_undefined())
7255 gold_error(_("undefined or discarded symbol %s in GOT"),
7260 if (!gsym->is_weak_undefined())
7262 const Sized_symbol<32>* sym =
7263 static_cast<const Sized_symbol<32>*>(gsym);
7264 value = sym->value();
7270 unsigned got_offset = reloc.got_offset();
7271 gold_assert(got_offset < oview_size);
7273 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7274 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset);
7276 switch (reloc.r_type())
7278 case elfcpp::R_ARM_TLS_DTPOFF32:
7281 case elfcpp::R_ARM_TLS_TPOFF32:
7282 x = value + aligned_tcb_size;
7287 elfcpp::Swap<32, big_endian>::writeval(wv, x);
7290 of->write_output_view(offset, oview_size, oview);
7293 // A class to handle the PLT data.
7294 // This is an abstract base class that handles most of the linker details
7295 // but does not know the actual contents of PLT entries. The derived
7296 // classes below fill in those details.
7298 template<bool big_endian>
7299 class Output_data_plt_arm : public Output_section_data
7302 // Unlike aarch64, which records symbol value in "addend" field of relocations
7303 // and could be done at the same time an IRelative reloc is created for the
7304 // symbol, arm puts the symbol value into "GOT" table, which, however, is
7305 // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7306 // to keep necessary symbol information for later use in do_write. We usually
7307 // have only a very limited number of ifuncs, so the extra data required here
7310 struct IRelative_data
7312 IRelative_data(Sized_symbol<32>* sized_symbol)
7313 : symbol_is_global_(true)
7315 u_.global = sized_symbol;
7318 IRelative_data(Sized_relobj_file<32, big_endian>* relobj,
7320 : symbol_is_global_(false)
7322 u_.local.relobj = relobj;
7323 u_.local.index = index;
7328 Sized_symbol<32>* global;
7332 Sized_relobj_file<32, big_endian>* relobj;
7337 bool symbol_is_global_;
7340 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
7343 Output_data_plt_arm(Layout* layout, uint64_t addralign,
7344 Arm_output_data_got<big_endian>* got,
7345 Output_data_space* got_plt,
7346 Output_data_space* got_irelative);
7348 // Add an entry to the PLT.
7350 add_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym);
7352 // Add the relocation for a plt entry.
7354 add_relocation(Symbol_table* symtab, Layout* layout,
7355 Symbol* gsym, unsigned int got_offset);
7357 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7359 add_local_ifunc_entry(Symbol_table* symtab, Layout*,
7360 Sized_relobj_file<32, big_endian>* relobj,
7361 unsigned int local_sym_index);
7363 // Return the .rel.plt section data.
7364 const Reloc_section*
7366 { return this->rel_; }
7368 // Return the PLT relocation container for IRELATIVE.
7370 rel_irelative(Symbol_table*, Layout*);
7372 // Return the number of PLT entries.
7375 { return this->count_ + this->irelative_count_; }
7377 // Return the offset of the first non-reserved PLT entry.
7379 first_plt_entry_offset() const
7380 { return this->do_first_plt_entry_offset(); }
7382 // Return the size of a PLT entry.
7384 get_plt_entry_size() const
7385 { return this->do_get_plt_entry_size(); }
7387 // Return the PLT address for globals.
7389 address_for_global(const Symbol*) const;
7391 // Return the PLT address for locals.
7393 address_for_local(const Relobj*, unsigned int symndx) const;
7396 // Fill in the first PLT entry.
7398 fill_first_plt_entry(unsigned char* pov,
7399 Arm_address got_address,
7400 Arm_address plt_address)
7401 { this->do_fill_first_plt_entry(pov, got_address, plt_address); }
7404 fill_plt_entry(unsigned char* pov,
7405 Arm_address got_address,
7406 Arm_address plt_address,
7407 unsigned int got_offset,
7408 unsigned int plt_offset)
7409 { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); }
7411 virtual unsigned int
7412 do_first_plt_entry_offset() const = 0;
7414 virtual unsigned int
7415 do_get_plt_entry_size() const = 0;
7418 do_fill_first_plt_entry(unsigned char* pov,
7419 Arm_address got_address,
7420 Arm_address plt_address) = 0;
7423 do_fill_plt_entry(unsigned char* pov,
7424 Arm_address got_address,
7425 Arm_address plt_address,
7426 unsigned int got_offset,
7427 unsigned int plt_offset) = 0;
7430 do_adjust_output_section(Output_section* os);
7432 // Write to a map file.
7434 do_print_to_mapfile(Mapfile* mapfile) const
7435 { mapfile->print_output_data(this, _("** PLT")); }
7438 // Set the final size.
7440 set_final_data_size()
7442 this->set_data_size(this->first_plt_entry_offset()
7443 + ((this->count_ + this->irelative_count_)
7444 * this->get_plt_entry_size()));
7447 // Write out the PLT data.
7449 do_write(Output_file*);
7451 // Record irelative symbol data.
7452 void insert_irelative_data(const IRelative_data& idata)
7453 { irelative_data_vec_.push_back(idata); }
7455 // The reloc section.
7456 Reloc_section* rel_;
7457 // The IRELATIVE relocs, if necessary. These must follow the
7458 // regular PLT relocations.
7459 Reloc_section* irelative_rel_;
7460 // The .got section.
7461 Arm_output_data_got<big_endian>* got_;
7462 // The .got.plt section.
7463 Output_data_space* got_plt_;
7464 // The part of the .got.plt section used for IRELATIVE relocs.
7465 Output_data_space* got_irelative_;
7466 // The number of PLT entries.
7467 unsigned int count_;
7468 // Number of PLT entries with R_ARM_IRELATIVE relocs. These
7469 // follow the regular PLT entries.
7470 unsigned int irelative_count_;
7471 // Vector for irelative data.
7472 typedef std::vector<IRelative_data> IRelative_data_vec;
7473 IRelative_data_vec irelative_data_vec_;
7476 // Create the PLT section. The ordinary .got section is an argument,
7477 // since we need to refer to the start. We also create our own .got
7478 // section just for PLT entries.
7480 template<bool big_endian>
7481 Output_data_plt_arm<big_endian>::Output_data_plt_arm(
7482 Layout* layout, uint64_t addralign,
7483 Arm_output_data_got<big_endian>* got,
7484 Output_data_space* got_plt,
7485 Output_data_space* got_irelative)
7486 : Output_section_data(addralign), irelative_rel_(NULL),
7487 got_(got), got_plt_(got_plt), got_irelative_(got_irelative),
7488 count_(0), irelative_count_(0)
7490 this->rel_ = new Reloc_section(false);
7491 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
7492 elfcpp::SHF_ALLOC, this->rel_,
7493 ORDER_DYNAMIC_PLT_RELOCS, false);
7496 template<bool big_endian>
7498 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
7503 // Add an entry to the PLT.
7505 template<bool big_endian>
7507 Output_data_plt_arm<big_endian>::add_entry(Symbol_table* symtab,
7511 gold_assert(!gsym->has_plt_offset());
7513 unsigned int* entry_count;
7514 Output_section_data_build* got;
7516 // We have 2 different types of plt entry here, normal and ifunc.
7518 // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7519 // 1st entry offset would be 20, the second 32, third 44 ... etc.
7521 // For ifunc plt, the offset begins with 0. So the first offset would 0,
7522 // second 12, third 24 ... etc.
7524 // IFunc plt entries *always* come after *normal* plt entries.
7526 // Notice, when computing the plt address of a certain symbol, "plt_address +
7527 // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7528 // target->plt_address_for_local() instead.
7530 int begin_offset = 0;
7531 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7532 && gsym->can_use_relative_reloc(false))
7534 entry_count = &this->irelative_count_;
7535 got = this->got_irelative_;
7536 // For irelative plt entries, offset is relative to the end of normal plt
7537 // entries, so it starts from 0.
7539 // Record symbol information.
7540 this->insert_irelative_data(
7541 IRelative_data(symtab->get_sized_symbol<32>(gsym)));
7545 entry_count = &this->count_;
7546 got = this->got_plt_;
7547 // Note that for normal plt entries, when setting the PLT offset we skip
7548 // the initial reserved PLT entry.
7549 begin_offset = this->first_plt_entry_offset();
7552 gsym->set_plt_offset(begin_offset
7553 + (*entry_count) * this->get_plt_entry_size());
7557 section_offset_type got_offset = got->current_data_size();
7559 // Every PLT entry needs a GOT entry which points back to the PLT
7560 // entry (this will be changed by the dynamic linker, normally
7561 // lazily when the function is called).
7562 got->set_current_data_size(got_offset + 4);
7564 // Every PLT entry needs a reloc.
7565 this->add_relocation(symtab, layout, gsym, got_offset);
7567 // Note that we don't need to save the symbol. The contents of the
7568 // PLT are independent of which symbols are used. The symbols only
7569 // appear in the relocations.
7572 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return
7575 template<bool big_endian>
7577 Output_data_plt_arm<big_endian>::add_local_ifunc_entry(
7578 Symbol_table* symtab,
7580 Sized_relobj_file<32, big_endian>* relobj,
7581 unsigned int local_sym_index)
7583 this->insert_irelative_data(IRelative_data(relobj, local_sym_index));
7585 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7586 // no longer correct. Use target->plt_address_for_local() instead.
7587 unsigned int plt_offset = this->irelative_count_ * this->get_plt_entry_size();
7588 ++this->irelative_count_;
7590 section_offset_type got_offset = this->got_irelative_->current_data_size();
7592 // Every PLT entry needs a GOT entry which points back to the PLT
7594 this->got_irelative_->set_current_data_size(got_offset + 4);
7597 // Every PLT entry needs a reloc.
7598 Reloc_section* rel = this->rel_irelative(symtab, layout);
7599 rel->add_symbolless_local_addend(relobj, local_sym_index,
7600 elfcpp::R_ARM_IRELATIVE,
7601 this->got_irelative_, got_offset);
7606 // Add the relocation for a PLT entry.
7608 template<bool big_endian>
7610 Output_data_plt_arm<big_endian>::add_relocation(
7611 Symbol_table* symtab, Layout* layout, Symbol* gsym, unsigned int got_offset)
7613 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7614 && gsym->can_use_relative_reloc(false))
7616 Reloc_section* rel = this->rel_irelative(symtab, layout);
7617 rel->add_symbolless_global_addend(gsym, elfcpp::R_ARM_IRELATIVE,
7618 this->got_irelative_, got_offset);
7622 gsym->set_needs_dynsym_entry();
7623 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
7629 // Create the irelative relocation data.
7631 template<bool big_endian>
7632 typename Output_data_plt_arm<big_endian>::Reloc_section*
7633 Output_data_plt_arm<big_endian>::rel_irelative(Symbol_table* symtab,
7636 if (this->irelative_rel_ == NULL)
7638 // Since irelative relocations goes into 'rel.dyn', we delegate the
7639 // creation of irelative_rel_ to where rel_dyn section gets created.
7640 Target_arm<big_endian>* arm_target =
7641 Target_arm<big_endian>::default_target();
7642 this->irelative_rel_ = arm_target->rel_irelative_section(layout);
7644 // Make sure we have a place for the TLSDESC relocations, in
7645 // case we see any later on.
7646 // this->rel_tlsdesc(layout);
7647 if (parameters->doing_static_link())
7649 // A statically linked executable will only have a .rel.plt section to
7650 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library
7651 // will use these symbols to locate the IRELATIVE relocs at program
7653 symtab->define_in_output_data("__rel_iplt_start", NULL,
7654 Symbol_table::PREDEFINED,
7655 this->irelative_rel_, 0, 0,
7656 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7657 elfcpp::STV_HIDDEN, 0, false, true);
7658 symtab->define_in_output_data("__rel_iplt_end", NULL,
7659 Symbol_table::PREDEFINED,
7660 this->irelative_rel_, 0, 0,
7661 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7662 elfcpp::STV_HIDDEN, 0, true, true);
7665 return this->irelative_rel_;
7669 // Return the PLT address for a global symbol.
7671 template<bool big_endian>
7673 Output_data_plt_arm<big_endian>::address_for_global(const Symbol* gsym) const
7675 uint64_t begin_offset = 0;
7676 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7677 && gsym->can_use_relative_reloc(false))
7679 begin_offset = (this->first_plt_entry_offset() +
7680 this->count_ * this->get_plt_entry_size());
7682 return this->address() + begin_offset + gsym->plt_offset();
7686 // Return the PLT address for a local symbol. These are always
7687 // IRELATIVE relocs.
7689 template<bool big_endian>
7691 Output_data_plt_arm<big_endian>::address_for_local(
7692 const Relobj* object,
7693 unsigned int r_sym) const
7695 return (this->address()
7696 + this->first_plt_entry_offset()
7697 + this->count_ * this->get_plt_entry_size()
7698 + object->local_plt_offset(r_sym));
7702 template<bool big_endian>
7703 class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian>
7706 Output_data_plt_arm_standard(Layout* layout,
7707 Arm_output_data_got<big_endian>* got,
7708 Output_data_space* got_plt,
7709 Output_data_space* got_irelative)
7710 : Output_data_plt_arm<big_endian>(layout, 4, got, got_plt, got_irelative)
7714 // Return the offset of the first non-reserved PLT entry.
7715 virtual unsigned int
7716 do_first_plt_entry_offset() const
7717 { return sizeof(first_plt_entry); }
7719 // Return the size of a PLT entry.
7720 virtual unsigned int
7721 do_get_plt_entry_size() const
7722 { return sizeof(plt_entry); }
7725 do_fill_first_plt_entry(unsigned char* pov,
7726 Arm_address got_address,
7727 Arm_address plt_address);
7730 do_fill_plt_entry(unsigned char* pov,
7731 Arm_address got_address,
7732 Arm_address plt_address,
7733 unsigned int got_offset,
7734 unsigned int plt_offset);
7737 // Template for the first PLT entry.
7738 static const uint32_t first_plt_entry[5];
7740 // Template for subsequent PLT entries.
7741 static const uint32_t plt_entry[3];
7745 // FIXME: This is not very flexible. Right now this has only been tested
7746 // on armv5te. If we are to support additional architecture features like
7747 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7749 // The first entry in the PLT.
7750 template<bool big_endian>
7751 const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] =
7753 0xe52de004, // str lr, [sp, #-4]!
7754 0xe59fe004, // ldr lr, [pc, #4]
7755 0xe08fe00e, // add lr, pc, lr
7756 0xe5bef008, // ldr pc, [lr, #8]!
7757 0x00000000, // &GOT[0] - .
7760 template<bool big_endian>
7762 Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
7764 Arm_address got_address,
7765 Arm_address plt_address)
7767 // Write first PLT entry. All but the last word are constants.
7768 const size_t num_first_plt_words = (sizeof(first_plt_entry)
7769 / sizeof(plt_entry[0]));
7770 for (size_t i = 0; i < num_first_plt_words - 1; i++)
7771 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
7772 // Last word in first PLT entry is &GOT[0] - .
7773 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
7774 got_address - (plt_address + 16));
7777 // Subsequent entries in the PLT.
7779 template<bool big_endian>
7780 const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] =
7782 0xe28fc600, // add ip, pc, #0xNN00000
7783 0xe28cca00, // add ip, ip, #0xNN000
7784 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7787 template<bool big_endian>
7789 Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
7791 Arm_address got_address,
7792 Arm_address plt_address,
7793 unsigned int got_offset,
7794 unsigned int plt_offset)
7796 int32_t offset = ((got_address + got_offset)
7797 - (plt_address + plt_offset + 8));
7799 gold_assert(offset >= 0 && offset < 0x0fffffff);
7800 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
7801 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
7802 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
7803 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
7804 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
7805 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
7808 // Write out the PLT. This uses the hand-coded instructions above,
7809 // and adjusts them as needed. This is all specified by the arm ELF
7810 // Processor Supplement.
7812 template<bool big_endian>
7814 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
7816 const off_t offset = this->offset();
7817 const section_size_type oview_size =
7818 convert_to_section_size_type(this->data_size());
7819 unsigned char* const oview = of->get_output_view(offset, oview_size);
7821 const off_t got_file_offset = this->got_plt_->offset();
7822 gold_assert(got_file_offset + this->got_plt_->data_size()
7823 == this->got_irelative_->offset());
7824 const section_size_type got_size =
7825 convert_to_section_size_type(this->got_plt_->data_size()
7826 + this->got_irelative_->data_size());
7827 unsigned char* const got_view = of->get_output_view(got_file_offset,
7829 unsigned char* pov = oview;
7831 Arm_address plt_address = this->address();
7832 Arm_address got_address = this->got_plt_->address();
7834 // Write first PLT entry.
7835 this->fill_first_plt_entry(pov, got_address, plt_address);
7836 pov += this->first_plt_entry_offset();
7838 unsigned char* got_pov = got_view;
7840 memset(got_pov, 0, 12);
7843 unsigned int plt_offset = this->first_plt_entry_offset();
7844 unsigned int got_offset = 12;
7845 const unsigned int count = this->count_ + this->irelative_count_;
7846 gold_assert(this->irelative_count_ == this->irelative_data_vec_.size());
7847 for (unsigned int i = 0;
7850 pov += this->get_plt_entry_size(),
7852 plt_offset += this->get_plt_entry_size(),
7855 // Set and adjust the PLT entry itself.
7856 this->fill_plt_entry(pov, got_address, plt_address,
7857 got_offset, plt_offset);
7860 if (i < this->count_)
7862 // For non-irelative got entries, the value is the beginning of plt.
7863 value = plt_address;
7867 // For irelative got entries, the value is the (global/local) symbol
7869 const IRelative_data& idata =
7870 this->irelative_data_vec_[i - this->count_];
7871 if (idata.symbol_is_global_)
7873 // Set the entry in the GOT for irelative symbols. The content is
7874 // the address of the ifunc, not the address of plt start.
7875 const Sized_symbol<32>* sized_symbol = idata.u_.global;
7876 gold_assert(sized_symbol->type() == elfcpp::STT_GNU_IFUNC);
7877 value = sized_symbol->value();
7881 value = idata.u_.local.relobj->local_symbol_value(
7882 idata.u_.local.index, 0);
7885 elfcpp::Swap<32, big_endian>::writeval(got_pov, value);
7888 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
7889 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
7891 of->write_output_view(offset, oview_size, oview);
7892 of->write_output_view(got_file_offset, got_size, got_view);
7896 // Create a PLT entry for a global symbol.
7898 template<bool big_endian>
7900 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
7903 if (gsym->has_plt_offset())
7906 if (this->plt_ == NULL)
7907 this->make_plt_section(symtab, layout);
7909 this->plt_->add_entry(symtab, layout, gsym);
7913 // Create the PLT section.
7914 template<bool big_endian>
7916 Target_arm<big_endian>::make_plt_section(
7917 Symbol_table* symtab, Layout* layout)
7919 if (this->plt_ == NULL)
7921 // Create the GOT section first.
7922 this->got_section(symtab, layout);
7924 // GOT for irelatives is create along with got.plt.
7925 gold_assert(this->got_ != NULL
7926 && this->got_plt_ != NULL
7927 && this->got_irelative_ != NULL);
7928 this->plt_ = this->make_data_plt(layout, this->got_, this->got_plt_,
7929 this->got_irelative_);
7931 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
7933 | elfcpp::SHF_EXECINSTR),
7934 this->plt_, ORDER_PLT, false);
7935 symtab->define_in_output_data("$a", NULL,
7936 Symbol_table::PREDEFINED,
7938 0, 0, elfcpp::STT_NOTYPE,
7940 elfcpp::STV_DEFAULT, 0,
7946 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
7948 template<bool big_endian>
7950 Target_arm<big_endian>::make_local_ifunc_plt_entry(
7951 Symbol_table* symtab, Layout* layout,
7952 Sized_relobj_file<32, big_endian>* relobj,
7953 unsigned int local_sym_index)
7955 if (relobj->local_has_plt_offset(local_sym_index))
7957 if (this->plt_ == NULL)
7958 this->make_plt_section(symtab, layout);
7959 unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout,
7962 relobj->set_local_plt_offset(local_sym_index, plt_offset);
7966 // Return the number of entries in the PLT.
7968 template<bool big_endian>
7970 Target_arm<big_endian>::plt_entry_count() const
7972 if (this->plt_ == NULL)
7974 return this->plt_->entry_count();
7977 // Return the offset of the first non-reserved PLT entry.
7979 template<bool big_endian>
7981 Target_arm<big_endian>::first_plt_entry_offset() const
7983 return this->plt_->first_plt_entry_offset();
7986 // Return the size of each PLT entry.
7988 template<bool big_endian>
7990 Target_arm<big_endian>::plt_entry_size() const
7992 return this->plt_->get_plt_entry_size();
7995 // Get the section to use for TLS_DESC relocations.
7997 template<bool big_endian>
7998 typename Target_arm<big_endian>::Reloc_section*
7999 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const
8001 return this->plt_section()->rel_tls_desc(layout);
8004 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8006 template<bool big_endian>
8008 Target_arm<big_endian>::define_tls_base_symbol(
8009 Symbol_table* symtab,
8012 if (this->tls_base_symbol_defined_)
8015 Output_segment* tls_segment = layout->tls_segment();
8016 if (tls_segment != NULL)
8018 bool is_exec = parameters->options().output_is_executable();
8019 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL,
8020 Symbol_table::PREDEFINED,
8024 elfcpp::STV_HIDDEN, 0,
8026 ? Symbol::SEGMENT_END
8027 : Symbol::SEGMENT_START),
8030 this->tls_base_symbol_defined_ = true;
8033 // Create a GOT entry for the TLS module index.
8035 template<bool big_endian>
8037 Target_arm<big_endian>::got_mod_index_entry(
8038 Symbol_table* symtab,
8040 Sized_relobj_file<32, big_endian>* object)
8042 if (this->got_mod_index_offset_ == -1U)
8044 gold_assert(symtab != NULL && layout != NULL && object != NULL);
8045 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout);
8046 unsigned int got_offset;
8047 if (!parameters->doing_static_link())
8049 got_offset = got->add_constant(0);
8050 Reloc_section* rel_dyn = this->rel_dyn_section(layout);
8051 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got,
8056 // We are doing a static link. Just mark it as belong to module 1,
8058 got_offset = got->add_constant(1);
8061 got->add_constant(0);
8062 this->got_mod_index_offset_ = got_offset;
8064 return this->got_mod_index_offset_;
8067 // Optimize the TLS relocation type based on what we know about the
8068 // symbol. IS_FINAL is true if the final address of this symbol is
8069 // known at link time.
8071 template<bool big_endian>
8072 tls::Tls_optimization
8073 Target_arm<big_endian>::optimize_tls_reloc(bool, int)
8075 // FIXME: Currently we do not do any TLS optimization.
8076 return tls::TLSOPT_NONE;
8079 // Get the Reference_flags for a particular relocation.
8081 template<bool big_endian>
8083 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type)
8087 case elfcpp::R_ARM_NONE:
8088 case elfcpp::R_ARM_V4BX:
8089 case elfcpp::R_ARM_GNU_VTENTRY:
8090 case elfcpp::R_ARM_GNU_VTINHERIT:
8091 // No symbol reference.
8094 case elfcpp::R_ARM_ABS32:
8095 case elfcpp::R_ARM_ABS16:
8096 case elfcpp::R_ARM_ABS12:
8097 case elfcpp::R_ARM_THM_ABS5:
8098 case elfcpp::R_ARM_ABS8:
8099 case elfcpp::R_ARM_BASE_ABS:
8100 case elfcpp::R_ARM_MOVW_ABS_NC:
8101 case elfcpp::R_ARM_MOVT_ABS:
8102 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8103 case elfcpp::R_ARM_THM_MOVT_ABS:
8104 case elfcpp::R_ARM_ABS32_NOI:
8105 return Symbol::ABSOLUTE_REF;
8107 case elfcpp::R_ARM_REL32:
8108 case elfcpp::R_ARM_LDR_PC_G0:
8109 case elfcpp::R_ARM_SBREL32:
8110 case elfcpp::R_ARM_THM_PC8:
8111 case elfcpp::R_ARM_BASE_PREL:
8112 case elfcpp::R_ARM_MOVW_PREL_NC:
8113 case elfcpp::R_ARM_MOVT_PREL:
8114 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8115 case elfcpp::R_ARM_THM_MOVT_PREL:
8116 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8117 case elfcpp::R_ARM_THM_PC12:
8118 case elfcpp::R_ARM_REL32_NOI:
8119 case elfcpp::R_ARM_ALU_PC_G0_NC:
8120 case elfcpp::R_ARM_ALU_PC_G0:
8121 case elfcpp::R_ARM_ALU_PC_G1_NC:
8122 case elfcpp::R_ARM_ALU_PC_G1:
8123 case elfcpp::R_ARM_ALU_PC_G2:
8124 case elfcpp::R_ARM_LDR_PC_G1:
8125 case elfcpp::R_ARM_LDR_PC_G2:
8126 case elfcpp::R_ARM_LDRS_PC_G0:
8127 case elfcpp::R_ARM_LDRS_PC_G1:
8128 case elfcpp::R_ARM_LDRS_PC_G2:
8129 case elfcpp::R_ARM_LDC_PC_G0:
8130 case elfcpp::R_ARM_LDC_PC_G1:
8131 case elfcpp::R_ARM_LDC_PC_G2:
8132 case elfcpp::R_ARM_ALU_SB_G0_NC:
8133 case elfcpp::R_ARM_ALU_SB_G0:
8134 case elfcpp::R_ARM_ALU_SB_G1_NC:
8135 case elfcpp::R_ARM_ALU_SB_G1:
8136 case elfcpp::R_ARM_ALU_SB_G2:
8137 case elfcpp::R_ARM_LDR_SB_G0:
8138 case elfcpp::R_ARM_LDR_SB_G1:
8139 case elfcpp::R_ARM_LDR_SB_G2:
8140 case elfcpp::R_ARM_LDRS_SB_G0:
8141 case elfcpp::R_ARM_LDRS_SB_G1:
8142 case elfcpp::R_ARM_LDRS_SB_G2:
8143 case elfcpp::R_ARM_LDC_SB_G0:
8144 case elfcpp::R_ARM_LDC_SB_G1:
8145 case elfcpp::R_ARM_LDC_SB_G2:
8146 case elfcpp::R_ARM_MOVW_BREL_NC:
8147 case elfcpp::R_ARM_MOVT_BREL:
8148 case elfcpp::R_ARM_MOVW_BREL:
8149 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8150 case elfcpp::R_ARM_THM_MOVT_BREL:
8151 case elfcpp::R_ARM_THM_MOVW_BREL:
8152 case elfcpp::R_ARM_GOTOFF32:
8153 case elfcpp::R_ARM_GOTOFF12:
8154 case elfcpp::R_ARM_SBREL31:
8155 return Symbol::RELATIVE_REF;
8157 case elfcpp::R_ARM_PLT32:
8158 case elfcpp::R_ARM_CALL:
8159 case elfcpp::R_ARM_JUMP24:
8160 case elfcpp::R_ARM_THM_CALL:
8161 case elfcpp::R_ARM_THM_JUMP24:
8162 case elfcpp::R_ARM_THM_JUMP19:
8163 case elfcpp::R_ARM_THM_JUMP6:
8164 case elfcpp::R_ARM_THM_JUMP11:
8165 case elfcpp::R_ARM_THM_JUMP8:
8166 // R_ARM_PREL31 is not used to relocate call/jump instructions but
8167 // in unwind tables. It may point to functions via PLTs.
8168 // So we treat it like call/jump relocations above.
8169 case elfcpp::R_ARM_PREL31:
8170 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
8172 case elfcpp::R_ARM_GOT_BREL:
8173 case elfcpp::R_ARM_GOT_ABS:
8174 case elfcpp::R_ARM_GOT_PREL:
8176 return Symbol::ABSOLUTE_REF;
8178 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8179 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8180 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8181 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8182 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8183 return Symbol::TLS_REF;
8185 case elfcpp::R_ARM_TARGET1:
8186 case elfcpp::R_ARM_TARGET2:
8187 case elfcpp::R_ARM_COPY:
8188 case elfcpp::R_ARM_GLOB_DAT:
8189 case elfcpp::R_ARM_JUMP_SLOT:
8190 case elfcpp::R_ARM_RELATIVE:
8191 case elfcpp::R_ARM_PC24:
8192 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8193 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8194 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8196 // Not expected. We will give an error later.
8201 // Report an unsupported relocation against a local symbol.
8203 template<bool big_endian>
8205 Target_arm<big_endian>::Scan::unsupported_reloc_local(
8206 Sized_relobj_file<32, big_endian>* object,
8207 unsigned int r_type)
8209 gold_error(_("%s: unsupported reloc %u against local symbol"),
8210 object->name().c_str(), r_type);
8213 // We are about to emit a dynamic relocation of type R_TYPE. If the
8214 // dynamic linker does not support it, issue an error. The GNU linker
8215 // only issues a non-PIC error for an allocated read-only section.
8216 // Here we know the section is allocated, but we don't know that it is
8217 // read-only. But we check for all the relocation types which the
8218 // glibc dynamic linker supports, so it seems appropriate to issue an
8219 // error even if the section is not read-only.
8221 template<bool big_endian>
8223 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
8224 unsigned int r_type)
8228 // These are the relocation types supported by glibc for ARM.
8229 case elfcpp::R_ARM_RELATIVE:
8230 case elfcpp::R_ARM_COPY:
8231 case elfcpp::R_ARM_GLOB_DAT:
8232 case elfcpp::R_ARM_JUMP_SLOT:
8233 case elfcpp::R_ARM_ABS32:
8234 case elfcpp::R_ARM_ABS32_NOI:
8235 case elfcpp::R_ARM_IRELATIVE:
8236 case elfcpp::R_ARM_PC24:
8237 // FIXME: The following 3 types are not supported by Android's dynamic
8239 case elfcpp::R_ARM_TLS_DTPMOD32:
8240 case elfcpp::R_ARM_TLS_DTPOFF32:
8241 case elfcpp::R_ARM_TLS_TPOFF32:
8246 // This prevents us from issuing more than one error per reloc
8247 // section. But we can still wind up issuing more than one
8248 // error per object file.
8249 if (this->issued_non_pic_error_)
8251 const Arm_reloc_property* reloc_property =
8252 arm_reloc_property_table->get_reloc_property(r_type);
8253 gold_assert(reloc_property != NULL);
8254 object->error(_("requires unsupported dynamic reloc %s; "
8255 "recompile with -fPIC"),
8256 reloc_property->name().c_str());
8257 this->issued_non_pic_error_ = true;
8261 case elfcpp::R_ARM_NONE:
8267 // Return whether we need to make a PLT entry for a relocation of the
8268 // given type against a STT_GNU_IFUNC symbol.
8270 template<bool big_endian>
8272 Target_arm<big_endian>::Scan::reloc_needs_plt_for_ifunc(
8273 Sized_relobj_file<32, big_endian>* object,
8274 unsigned int r_type)
8276 int flags = Scan::get_reference_flags(r_type);
8277 if (flags & Symbol::TLS_REF)
8279 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8280 object->name().c_str(), r_type);
8287 // Scan a relocation for a local symbol.
8288 // FIXME: This only handles a subset of relocation types used by Android
8289 // on ARM v5te devices.
8291 template<bool big_endian>
8293 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
8296 Sized_relobj_file<32, big_endian>* object,
8297 unsigned int data_shndx,
8298 Output_section* output_section,
8299 const elfcpp::Rel<32, big_endian>& reloc,
8300 unsigned int r_type,
8301 const elfcpp::Sym<32, big_endian>& lsym,
8307 r_type = get_real_reloc_type(r_type);
8309 // A local STT_GNU_IFUNC symbol may require a PLT entry.
8310 bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC;
8311 if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type))
8313 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8314 target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym);
8319 case elfcpp::R_ARM_NONE:
8320 case elfcpp::R_ARM_V4BX:
8321 case elfcpp::R_ARM_GNU_VTENTRY:
8322 case elfcpp::R_ARM_GNU_VTINHERIT:
8325 case elfcpp::R_ARM_ABS32:
8326 case elfcpp::R_ARM_ABS32_NOI:
8327 // If building a shared library (or a position-independent
8328 // executable), we need to create a dynamic relocation for
8329 // this location. The relocation applied at link time will
8330 // apply the link-time value, so we flag the location with
8331 // an R_ARM_RELATIVE relocation so the dynamic loader can
8332 // relocate it easily.
8333 if (parameters->options().output_is_position_independent())
8335 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8336 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8337 // If we are to add more other reloc types than R_ARM_ABS32,
8338 // we need to add check_non_pic(object, r_type) here.
8339 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
8340 output_section, data_shndx,
8341 reloc.get_r_offset(), is_ifunc);
8345 case elfcpp::R_ARM_ABS16:
8346 case elfcpp::R_ARM_ABS12:
8347 case elfcpp::R_ARM_THM_ABS5:
8348 case elfcpp::R_ARM_ABS8:
8349 case elfcpp::R_ARM_BASE_ABS:
8350 case elfcpp::R_ARM_MOVW_ABS_NC:
8351 case elfcpp::R_ARM_MOVT_ABS:
8352 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8353 case elfcpp::R_ARM_THM_MOVT_ABS:
8354 // If building a shared library (or a position-independent
8355 // executable), we need to create a dynamic relocation for
8356 // this location. Because the addend needs to remain in the
8357 // data section, we need to be careful not to apply this
8358 // relocation statically.
8359 if (parameters->options().output_is_position_independent())
8361 check_non_pic(object, r_type);
8362 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8363 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8364 if (lsym.get_st_type() != elfcpp::STT_SECTION)
8365 rel_dyn->add_local(object, r_sym, r_type, output_section,
8366 data_shndx, reloc.get_r_offset());
8369 gold_assert(lsym.get_st_value() == 0);
8370 unsigned int shndx = lsym.get_st_shndx();
8372 shndx = object->adjust_sym_shndx(r_sym, shndx,
8375 object->error(_("section symbol %u has bad shndx %u"),
8378 rel_dyn->add_local_section(object, shndx,
8379 r_type, output_section,
8380 data_shndx, reloc.get_r_offset());
8385 case elfcpp::R_ARM_REL32:
8386 case elfcpp::R_ARM_LDR_PC_G0:
8387 case elfcpp::R_ARM_SBREL32:
8388 case elfcpp::R_ARM_THM_CALL:
8389 case elfcpp::R_ARM_THM_PC8:
8390 case elfcpp::R_ARM_BASE_PREL:
8391 case elfcpp::R_ARM_PLT32:
8392 case elfcpp::R_ARM_CALL:
8393 case elfcpp::R_ARM_JUMP24:
8394 case elfcpp::R_ARM_THM_JUMP24:
8395 case elfcpp::R_ARM_SBREL31:
8396 case elfcpp::R_ARM_PREL31:
8397 case elfcpp::R_ARM_MOVW_PREL_NC:
8398 case elfcpp::R_ARM_MOVT_PREL:
8399 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8400 case elfcpp::R_ARM_THM_MOVT_PREL:
8401 case elfcpp::R_ARM_THM_JUMP19:
8402 case elfcpp::R_ARM_THM_JUMP6:
8403 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8404 case elfcpp::R_ARM_THM_PC12:
8405 case elfcpp::R_ARM_REL32_NOI:
8406 case elfcpp::R_ARM_ALU_PC_G0_NC:
8407 case elfcpp::R_ARM_ALU_PC_G0:
8408 case elfcpp::R_ARM_ALU_PC_G1_NC:
8409 case elfcpp::R_ARM_ALU_PC_G1:
8410 case elfcpp::R_ARM_ALU_PC_G2:
8411 case elfcpp::R_ARM_LDR_PC_G1:
8412 case elfcpp::R_ARM_LDR_PC_G2:
8413 case elfcpp::R_ARM_LDRS_PC_G0:
8414 case elfcpp::R_ARM_LDRS_PC_G1:
8415 case elfcpp::R_ARM_LDRS_PC_G2:
8416 case elfcpp::R_ARM_LDC_PC_G0:
8417 case elfcpp::R_ARM_LDC_PC_G1:
8418 case elfcpp::R_ARM_LDC_PC_G2:
8419 case elfcpp::R_ARM_ALU_SB_G0_NC:
8420 case elfcpp::R_ARM_ALU_SB_G0:
8421 case elfcpp::R_ARM_ALU_SB_G1_NC:
8422 case elfcpp::R_ARM_ALU_SB_G1:
8423 case elfcpp::R_ARM_ALU_SB_G2:
8424 case elfcpp::R_ARM_LDR_SB_G0:
8425 case elfcpp::R_ARM_LDR_SB_G1:
8426 case elfcpp::R_ARM_LDR_SB_G2:
8427 case elfcpp::R_ARM_LDRS_SB_G0:
8428 case elfcpp::R_ARM_LDRS_SB_G1:
8429 case elfcpp::R_ARM_LDRS_SB_G2:
8430 case elfcpp::R_ARM_LDC_SB_G0:
8431 case elfcpp::R_ARM_LDC_SB_G1:
8432 case elfcpp::R_ARM_LDC_SB_G2:
8433 case elfcpp::R_ARM_MOVW_BREL_NC:
8434 case elfcpp::R_ARM_MOVT_BREL:
8435 case elfcpp::R_ARM_MOVW_BREL:
8436 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8437 case elfcpp::R_ARM_THM_MOVT_BREL:
8438 case elfcpp::R_ARM_THM_MOVW_BREL:
8439 case elfcpp::R_ARM_THM_JUMP11:
8440 case elfcpp::R_ARM_THM_JUMP8:
8441 // We don't need to do anything for a relative addressing relocation
8442 // against a local symbol if it does not reference the GOT.
8445 case elfcpp::R_ARM_GOTOFF32:
8446 case elfcpp::R_ARM_GOTOFF12:
8447 // We need a GOT section:
8448 target->got_section(symtab, layout);
8451 case elfcpp::R_ARM_GOT_BREL:
8452 case elfcpp::R_ARM_GOT_PREL:
8454 // The symbol requires a GOT entry.
8455 Arm_output_data_got<big_endian>* got =
8456 target->got_section(symtab, layout);
8457 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8458 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
8460 // If we are generating a shared object, we need to add a
8461 // dynamic RELATIVE relocation for this symbol's GOT entry.
8462 if (parameters->options().output_is_position_independent())
8464 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8465 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8466 rel_dyn->add_local_relative(
8467 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
8468 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
8474 case elfcpp::R_ARM_TARGET1:
8475 case elfcpp::R_ARM_TARGET2:
8476 // This should have been mapped to another type already.
8478 case elfcpp::R_ARM_COPY:
8479 case elfcpp::R_ARM_GLOB_DAT:
8480 case elfcpp::R_ARM_JUMP_SLOT:
8481 case elfcpp::R_ARM_RELATIVE:
8482 // These are relocations which should only be seen by the
8483 // dynamic linker, and should never be seen here.
8484 gold_error(_("%s: unexpected reloc %u in object file"),
8485 object->name().c_str(), r_type);
8489 // These are initial TLS relocs, which are expected when
8491 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8492 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8493 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8494 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8495 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8497 bool output_is_shared = parameters->options().shared();
8498 const tls::Tls_optimization optimized_type
8499 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared,
8503 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8504 if (optimized_type == tls::TLSOPT_NONE)
8506 // Create a pair of GOT entries for the module index and
8507 // dtv-relative offset.
8508 Arm_output_data_got<big_endian>* got
8509 = target->got_section(symtab, layout);
8510 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8511 unsigned int shndx = lsym.get_st_shndx();
8513 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
8516 object->error(_("local symbol %u has bad shndx %u"),
8521 if (!parameters->doing_static_link())
8522 got->add_local_pair_with_rel(object, r_sym, shndx,
8524 target->rel_dyn_section(layout),
8525 elfcpp::R_ARM_TLS_DTPMOD32);
8527 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR,
8531 // FIXME: TLS optimization not supported yet.
8535 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8536 if (optimized_type == tls::TLSOPT_NONE)
8538 // Create a GOT entry for the module index.
8539 target->got_mod_index_entry(symtab, layout, object);
8542 // FIXME: TLS optimization not supported yet.
8546 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8549 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8550 layout->set_has_static_tls();
8551 if (optimized_type == tls::TLSOPT_NONE)
8553 // Create a GOT entry for the tp-relative offset.
8554 Arm_output_data_got<big_endian>* got
8555 = target->got_section(symtab, layout);
8556 unsigned int r_sym =
8557 elfcpp::elf_r_sym<32>(reloc.get_r_info());
8558 if (!parameters->doing_static_link())
8559 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET,
8560 target->rel_dyn_section(layout),
8561 elfcpp::R_ARM_TLS_TPOFF32);
8562 else if (!object->local_has_got_offset(r_sym,
8563 GOT_TYPE_TLS_OFFSET))
8565 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET);
8566 unsigned int got_offset =
8567 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET);
8568 got->add_static_reloc(got_offset,
8569 elfcpp::R_ARM_TLS_TPOFF32, object,
8574 // FIXME: TLS optimization not supported yet.
8578 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8579 layout->set_has_static_tls();
8580 if (output_is_shared)
8582 // We need to create a dynamic relocation.
8583 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION);
8584 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8585 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8586 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32,
8587 output_section, data_shndx,
8588 reloc.get_r_offset());
8598 case elfcpp::R_ARM_PC24:
8599 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8600 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8601 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8603 unsupported_reloc_local(object, r_type);
8608 // Report an unsupported relocation against a global symbol.
8610 template<bool big_endian>
8612 Target_arm<big_endian>::Scan::unsupported_reloc_global(
8613 Sized_relobj_file<32, big_endian>* object,
8614 unsigned int r_type,
8617 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8618 object->name().c_str(), r_type, gsym->demangled_name().c_str());
8621 template<bool big_endian>
8623 Target_arm<big_endian>::Scan::possible_function_pointer_reloc(
8624 unsigned int r_type)
8628 case elfcpp::R_ARM_PC24:
8629 case elfcpp::R_ARM_THM_CALL:
8630 case elfcpp::R_ARM_PLT32:
8631 case elfcpp::R_ARM_CALL:
8632 case elfcpp::R_ARM_JUMP24:
8633 case elfcpp::R_ARM_THM_JUMP24:
8634 case elfcpp::R_ARM_SBREL31:
8635 case elfcpp::R_ARM_PREL31:
8636 case elfcpp::R_ARM_THM_JUMP19:
8637 case elfcpp::R_ARM_THM_JUMP6:
8638 case elfcpp::R_ARM_THM_JUMP11:
8639 case elfcpp::R_ARM_THM_JUMP8:
8640 // All the relocations above are branches except SBREL31 and PREL31.
8644 // Be conservative and assume this is a function pointer.
8649 template<bool big_endian>
8651 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer(
8654 Target_arm<big_endian>* target,
8655 Sized_relobj_file<32, big_endian>*,
8658 const elfcpp::Rel<32, big_endian>&,
8659 unsigned int r_type,
8660 const elfcpp::Sym<32, big_endian>&)
8662 r_type = target->get_real_reloc_type(r_type);
8663 return possible_function_pointer_reloc(r_type);
8666 template<bool big_endian>
8668 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer(
8671 Target_arm<big_endian>* target,
8672 Sized_relobj_file<32, big_endian>*,
8675 const elfcpp::Rel<32, big_endian>&,
8676 unsigned int r_type,
8679 // GOT is not a function.
8680 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8683 r_type = target->get_real_reloc_type(r_type);
8684 return possible_function_pointer_reloc(r_type);
8687 // Scan a relocation for a global symbol.
8689 template<bool big_endian>
8691 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
8694 Sized_relobj_file<32, big_endian>* object,
8695 unsigned int data_shndx,
8696 Output_section* output_section,
8697 const elfcpp::Rel<32, big_endian>& reloc,
8698 unsigned int r_type,
8701 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8702 // section. We check here to avoid creating a dynamic reloc against
8703 // _GLOBAL_OFFSET_TABLE_.
8704 if (!target->has_got_section()
8705 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8706 target->got_section(symtab, layout);
8708 // A STT_GNU_IFUNC symbol may require a PLT entry.
8709 if (gsym->type() == elfcpp::STT_GNU_IFUNC
8710 && this->reloc_needs_plt_for_ifunc(object, r_type))
8711 target->make_plt_entry(symtab, layout, gsym);
8713 r_type = get_real_reloc_type(r_type);
8716 case elfcpp::R_ARM_NONE:
8717 case elfcpp::R_ARM_V4BX:
8718 case elfcpp::R_ARM_GNU_VTENTRY:
8719 case elfcpp::R_ARM_GNU_VTINHERIT:
8722 case elfcpp::R_ARM_ABS32:
8723 case elfcpp::R_ARM_ABS16:
8724 case elfcpp::R_ARM_ABS12:
8725 case elfcpp::R_ARM_THM_ABS5:
8726 case elfcpp::R_ARM_ABS8:
8727 case elfcpp::R_ARM_BASE_ABS:
8728 case elfcpp::R_ARM_MOVW_ABS_NC:
8729 case elfcpp::R_ARM_MOVT_ABS:
8730 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8731 case elfcpp::R_ARM_THM_MOVT_ABS:
8732 case elfcpp::R_ARM_ABS32_NOI:
8733 // Absolute addressing relocations.
8735 // Make a PLT entry if necessary.
8736 if (this->symbol_needs_plt_entry(gsym))
8738 target->make_plt_entry(symtab, layout, gsym);
8739 // Since this is not a PC-relative relocation, we may be
8740 // taking the address of a function. In that case we need to
8741 // set the entry in the dynamic symbol table to the address of
8743 if (gsym->is_from_dynobj() && !parameters->options().shared())
8744 gsym->set_needs_dynsym_value();
8746 // Make a dynamic relocation if necessary.
8747 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8749 if (!parameters->options().output_is_position_independent()
8750 && gsym->may_need_copy_reloc())
8752 target->copy_reloc(symtab, layout, object,
8753 data_shndx, output_section, gsym, reloc);
8755 else if ((r_type == elfcpp::R_ARM_ABS32
8756 || r_type == elfcpp::R_ARM_ABS32_NOI)
8757 && gsym->type() == elfcpp::STT_GNU_IFUNC
8758 && gsym->can_use_relative_reloc(false)
8759 && !gsym->is_from_dynobj()
8760 && !gsym->is_undefined()
8761 && !gsym->is_preemptible())
8763 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
8764 // symbol. This makes a function address in a PIE executable
8765 // match the address in a shared library that it links against.
8766 Reloc_section* rel_irelative =
8767 target->rel_irelative_section(layout);
8768 unsigned int r_type = elfcpp::R_ARM_IRELATIVE;
8769 rel_irelative->add_symbolless_global_addend(
8770 gsym, r_type, output_section, object,
8771 data_shndx, reloc.get_r_offset());
8773 else if ((r_type == elfcpp::R_ARM_ABS32
8774 || r_type == elfcpp::R_ARM_ABS32_NOI)
8775 && gsym->can_use_relative_reloc(false))
8777 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8778 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
8779 output_section, object,
8780 data_shndx, reloc.get_r_offset());
8784 check_non_pic(object, r_type);
8785 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8786 rel_dyn->add_global(gsym, r_type, output_section, object,
8787 data_shndx, reloc.get_r_offset());
8793 case elfcpp::R_ARM_GOTOFF32:
8794 case elfcpp::R_ARM_GOTOFF12:
8795 // We need a GOT section.
8796 target->got_section(symtab, layout);
8799 case elfcpp::R_ARM_REL32:
8800 case elfcpp::R_ARM_LDR_PC_G0:
8801 case elfcpp::R_ARM_SBREL32:
8802 case elfcpp::R_ARM_THM_PC8:
8803 case elfcpp::R_ARM_BASE_PREL:
8804 case elfcpp::R_ARM_MOVW_PREL_NC:
8805 case elfcpp::R_ARM_MOVT_PREL:
8806 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8807 case elfcpp::R_ARM_THM_MOVT_PREL:
8808 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8809 case elfcpp::R_ARM_THM_PC12:
8810 case elfcpp::R_ARM_REL32_NOI:
8811 case elfcpp::R_ARM_ALU_PC_G0_NC:
8812 case elfcpp::R_ARM_ALU_PC_G0:
8813 case elfcpp::R_ARM_ALU_PC_G1_NC:
8814 case elfcpp::R_ARM_ALU_PC_G1:
8815 case elfcpp::R_ARM_ALU_PC_G2:
8816 case elfcpp::R_ARM_LDR_PC_G1:
8817 case elfcpp::R_ARM_LDR_PC_G2:
8818 case elfcpp::R_ARM_LDRS_PC_G0:
8819 case elfcpp::R_ARM_LDRS_PC_G1:
8820 case elfcpp::R_ARM_LDRS_PC_G2:
8821 case elfcpp::R_ARM_LDC_PC_G0:
8822 case elfcpp::R_ARM_LDC_PC_G1:
8823 case elfcpp::R_ARM_LDC_PC_G2:
8824 case elfcpp::R_ARM_ALU_SB_G0_NC:
8825 case elfcpp::R_ARM_ALU_SB_G0:
8826 case elfcpp::R_ARM_ALU_SB_G1_NC:
8827 case elfcpp::R_ARM_ALU_SB_G1:
8828 case elfcpp::R_ARM_ALU_SB_G2:
8829 case elfcpp::R_ARM_LDR_SB_G0:
8830 case elfcpp::R_ARM_LDR_SB_G1:
8831 case elfcpp::R_ARM_LDR_SB_G2:
8832 case elfcpp::R_ARM_LDRS_SB_G0:
8833 case elfcpp::R_ARM_LDRS_SB_G1:
8834 case elfcpp::R_ARM_LDRS_SB_G2:
8835 case elfcpp::R_ARM_LDC_SB_G0:
8836 case elfcpp::R_ARM_LDC_SB_G1:
8837 case elfcpp::R_ARM_LDC_SB_G2:
8838 case elfcpp::R_ARM_MOVW_BREL_NC:
8839 case elfcpp::R_ARM_MOVT_BREL:
8840 case elfcpp::R_ARM_MOVW_BREL:
8841 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8842 case elfcpp::R_ARM_THM_MOVT_BREL:
8843 case elfcpp::R_ARM_THM_MOVW_BREL:
8844 // Relative addressing relocations.
8846 // Make a dynamic relocation if necessary.
8847 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8849 if (parameters->options().output_is_executable()
8850 && target->may_need_copy_reloc(gsym))
8852 target->copy_reloc(symtab, layout, object,
8853 data_shndx, output_section, gsym, reloc);
8857 check_non_pic(object, r_type);
8858 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8859 rel_dyn->add_global(gsym, r_type, output_section, object,
8860 data_shndx, reloc.get_r_offset());
8866 case elfcpp::R_ARM_THM_CALL:
8867 case elfcpp::R_ARM_PLT32:
8868 case elfcpp::R_ARM_CALL:
8869 case elfcpp::R_ARM_JUMP24:
8870 case elfcpp::R_ARM_THM_JUMP24:
8871 case elfcpp::R_ARM_SBREL31:
8872 case elfcpp::R_ARM_PREL31:
8873 case elfcpp::R_ARM_THM_JUMP19:
8874 case elfcpp::R_ARM_THM_JUMP6:
8875 case elfcpp::R_ARM_THM_JUMP11:
8876 case elfcpp::R_ARM_THM_JUMP8:
8877 // All the relocation above are branches except for the PREL31 ones.
8878 // A PREL31 relocation can point to a personality function in a shared
8879 // library. In that case we want to use a PLT because we want to
8880 // call the personality routine and the dynamic linkers we care about
8881 // do not support dynamic PREL31 relocations. An REL31 relocation may
8882 // point to a function whose unwinding behaviour is being described but
8883 // we will not mistakenly generate a PLT for that because we should use
8884 // a local section symbol.
8886 // If the symbol is fully resolved, this is just a relative
8887 // local reloc. Otherwise we need a PLT entry.
8888 if (gsym->final_value_is_known())
8890 // If building a shared library, we can also skip the PLT entry
8891 // if the symbol is defined in the output file and is protected
8893 if (gsym->is_defined()
8894 && !gsym->is_from_dynobj()
8895 && !gsym->is_preemptible())
8897 target->make_plt_entry(symtab, layout, gsym);
8900 case elfcpp::R_ARM_GOT_BREL:
8901 case elfcpp::R_ARM_GOT_ABS:
8902 case elfcpp::R_ARM_GOT_PREL:
8904 // The symbol requires a GOT entry.
8905 Arm_output_data_got<big_endian>* got =
8906 target->got_section(symtab, layout);
8907 if (gsym->final_value_is_known())
8909 // For a STT_GNU_IFUNC symbol we want the PLT address.
8910 if (gsym->type() == elfcpp::STT_GNU_IFUNC)
8911 got->add_global_plt(gsym, GOT_TYPE_STANDARD);
8913 got->add_global(gsym, GOT_TYPE_STANDARD);
8917 // If this symbol is not fully resolved, we need to add a
8918 // GOT entry with a dynamic relocation.
8919 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8920 if (gsym->is_from_dynobj()
8921 || gsym->is_undefined()
8922 || gsym->is_preemptible()
8923 || (gsym->visibility() == elfcpp::STV_PROTECTED
8924 && parameters->options().shared())
8925 || (gsym->type() == elfcpp::STT_GNU_IFUNC
8926 && parameters->options().output_is_position_independent()))
8927 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
8928 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
8931 // For a STT_GNU_IFUNC symbol we want to write the PLT
8932 // offset into the GOT, so that function pointer
8933 // comparisons work correctly.
8935 if (gsym->type() != elfcpp::STT_GNU_IFUNC)
8936 is_new = got->add_global(gsym, GOT_TYPE_STANDARD);
8939 is_new = got->add_global_plt(gsym, GOT_TYPE_STANDARD);
8940 // Tell the dynamic linker to use the PLT address
8941 // when resolving relocations.
8942 if (gsym->is_from_dynobj()
8943 && !parameters->options().shared())
8944 gsym->set_needs_dynsym_value();
8947 rel_dyn->add_global_relative(
8948 gsym, elfcpp::R_ARM_RELATIVE, got,
8949 gsym->got_offset(GOT_TYPE_STANDARD));
8955 case elfcpp::R_ARM_TARGET1:
8956 case elfcpp::R_ARM_TARGET2:
8957 // These should have been mapped to other types already.
8959 case elfcpp::R_ARM_COPY:
8960 case elfcpp::R_ARM_GLOB_DAT:
8961 case elfcpp::R_ARM_JUMP_SLOT:
8962 case elfcpp::R_ARM_RELATIVE:
8963 // These are relocations which should only be seen by the
8964 // dynamic linker, and should never be seen here.
8965 gold_error(_("%s: unexpected reloc %u in object file"),
8966 object->name().c_str(), r_type);
8969 // These are initial tls relocs, which are expected when
8971 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8972 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8973 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8974 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8975 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8977 const bool is_final = gsym->final_value_is_known();
8978 const tls::Tls_optimization optimized_type
8979 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
8982 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8983 if (optimized_type == tls::TLSOPT_NONE)
8985 // Create a pair of GOT entries for the module index and
8986 // dtv-relative offset.
8987 Arm_output_data_got<big_endian>* got
8988 = target->got_section(symtab, layout);
8989 if (!parameters->doing_static_link())
8990 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR,
8991 target->rel_dyn_section(layout),
8992 elfcpp::R_ARM_TLS_DTPMOD32,
8993 elfcpp::R_ARM_TLS_DTPOFF32);
8995 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym);
8998 // FIXME: TLS optimization not supported yet.
9002 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9003 if (optimized_type == tls::TLSOPT_NONE)
9005 // Create a GOT entry for the module index.
9006 target->got_mod_index_entry(symtab, layout, object);
9009 // FIXME: TLS optimization not supported yet.
9013 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9016 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9017 layout->set_has_static_tls();
9018 if (optimized_type == tls::TLSOPT_NONE)
9020 // Create a GOT entry for the tp-relative offset.
9021 Arm_output_data_got<big_endian>* got
9022 = target->got_section(symtab, layout);
9023 if (!parameters->doing_static_link())
9024 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET,
9025 target->rel_dyn_section(layout),
9026 elfcpp::R_ARM_TLS_TPOFF32);
9027 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET))
9029 got->add_global(gsym, GOT_TYPE_TLS_OFFSET);
9030 unsigned int got_offset =
9031 gsym->got_offset(GOT_TYPE_TLS_OFFSET);
9032 got->add_static_reloc(got_offset,
9033 elfcpp::R_ARM_TLS_TPOFF32, gsym);
9037 // FIXME: TLS optimization not supported yet.
9041 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9042 layout->set_has_static_tls();
9043 if (parameters->options().shared())
9045 // We need to create a dynamic relocation.
9046 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
9047 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32,
9048 output_section, object,
9049 data_shndx, reloc.get_r_offset());
9059 case elfcpp::R_ARM_PC24:
9060 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9061 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9062 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9064 unsupported_reloc_global(object, r_type, gsym);
9069 // Process relocations for gc.
9071 template<bool big_endian>
9073 Target_arm<big_endian>::gc_process_relocs(
9074 Symbol_table* symtab,
9076 Sized_relobj_file<32, big_endian>* object,
9077 unsigned int data_shndx,
9079 const unsigned char* prelocs,
9081 Output_section* output_section,
9082 bool needs_special_offset_handling,
9083 size_t local_symbol_count,
9084 const unsigned char* plocal_symbols)
9086 typedef Target_arm<big_endian> Arm;
9087 typedef typename Target_arm<big_endian>::Scan Scan;
9089 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan,
9090 typename Target_arm::Relocatable_size_for_reloc>(
9099 needs_special_offset_handling,
9104 // Scan relocations for a section.
9106 template<bool big_endian>
9108 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
9110 Sized_relobj_file<32, big_endian>* object,
9111 unsigned int data_shndx,
9112 unsigned int sh_type,
9113 const unsigned char* prelocs,
9115 Output_section* output_section,
9116 bool needs_special_offset_handling,
9117 size_t local_symbol_count,
9118 const unsigned char* plocal_symbols)
9120 typedef typename Target_arm<big_endian>::Scan Scan;
9121 if (sh_type == elfcpp::SHT_RELA)
9123 gold_error(_("%s: unsupported RELA reloc section"),
9124 object->name().c_str());
9128 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
9137 needs_special_offset_handling,
9142 // Finalize the sections.
9144 template<bool big_endian>
9146 Target_arm<big_endian>::do_finalize_sections(
9148 const Input_objects* input_objects,
9151 bool merged_any_attributes = false;
9152 // Merge processor-specific flags.
9153 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
9154 p != input_objects->relobj_end();
9157 Arm_relobj<big_endian>* arm_relobj =
9158 Arm_relobj<big_endian>::as_arm_relobj(*p);
9159 if (arm_relobj->merge_flags_and_attributes())
9161 this->merge_processor_specific_flags(
9163 arm_relobj->processor_specific_flags());
9164 this->merge_object_attributes(arm_relobj->name().c_str(),
9165 arm_relobj->attributes_section_data());
9166 merged_any_attributes = true;
9170 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
9171 p != input_objects->dynobj_end();
9174 Arm_dynobj<big_endian>* arm_dynobj =
9175 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
9176 this->merge_processor_specific_flags(
9178 arm_dynobj->processor_specific_flags());
9179 this->merge_object_attributes(arm_dynobj->name().c_str(),
9180 arm_dynobj->attributes_section_data());
9181 merged_any_attributes = true;
9184 // Create an empty uninitialized attribute section if we still don't have it
9185 // at this moment. This happens if there is no attributes sections in all
9187 if (this->attributes_section_data_ == NULL)
9188 this->attributes_section_data_ = new Attributes_section_data(NULL, 0);
9190 const Object_attribute* cpu_arch_attr =
9191 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
9192 // Check if we need to use Cortex-A8 workaround.
9193 if (parameters->options().user_set_fix_cortex_a8())
9194 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
9197 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9198 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9200 const Object_attribute* cpu_arch_profile_attr =
9201 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
9202 this->fix_cortex_a8_ =
9203 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
9204 && (cpu_arch_profile_attr->int_value() == 'A'
9205 || cpu_arch_profile_attr->int_value() == 0));
9208 // Check if we can use V4BX interworking.
9209 // The V4BX interworking stub contains BX instruction,
9210 // which is not specified for some profiles.
9211 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9212 && !this->may_use_v4t_interworking())
9213 gold_error(_("unable to provide V4BX reloc interworking fix up; "
9214 "the target profile does not support BX instruction"));
9216 // Fill in some more dynamic tags.
9217 const Reloc_section* rel_plt = (this->plt_ == NULL
9219 : this->plt_->rel_plt());
9220 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
9221 this->rel_dyn_, true, false);
9223 // Emit any relocs we saved in an attempt to avoid generating COPY
9225 if (this->copy_relocs_.any_saved_relocs())
9226 this->copy_relocs_.emit(this->rel_dyn_section(layout));
9228 // Handle the .ARM.exidx section.
9229 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
9231 if (!parameters->options().relocatable())
9233 if (exidx_section != NULL
9234 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX)
9236 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9237 // the .ARM.exidx section.
9238 if (!layout->script_options()->saw_phdrs_clause())
9240 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0,
9243 Output_segment* exidx_segment =
9244 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
9245 exidx_segment->add_output_section_to_nonload(exidx_section,
9251 // Create an .ARM.attributes section if we have merged any attributes
9253 if (merged_any_attributes)
9255 Output_attributes_section_data* attributes_section =
9256 new Output_attributes_section_data(*this->attributes_section_data_);
9257 layout->add_output_section_data(".ARM.attributes",
9258 elfcpp::SHT_ARM_ATTRIBUTES, 0,
9259 attributes_section, ORDER_INVALID,
9263 // Fix up links in section EXIDX headers.
9264 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
9265 p != layout->section_list().end();
9267 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
9269 Arm_output_section<big_endian>* os =
9270 Arm_output_section<big_endian>::as_arm_output_section(*p);
9271 os->set_exidx_section_link();
9275 // Return whether a direct absolute static relocation needs to be applied.
9276 // In cases where Scan::local() or Scan::global() has created
9277 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9278 // of the relocation is carried in the data, and we must not
9279 // apply the static relocation.
9281 template<bool big_endian>
9283 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
9284 const Sized_symbol<32>* gsym,
9285 unsigned int r_type,
9287 Output_section* output_section)
9289 // If the output section is not allocated, then we didn't call
9290 // scan_relocs, we didn't create a dynamic reloc, and we must apply
9292 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
9295 int ref_flags = Scan::get_reference_flags(r_type);
9297 // For local symbols, we will have created a non-RELATIVE dynamic
9298 // relocation only if (a) the output is position independent,
9299 // (b) the relocation is absolute (not pc- or segment-relative), and
9300 // (c) the relocation is not 32 bits wide.
9302 return !(parameters->options().output_is_position_independent()
9303 && (ref_flags & Symbol::ABSOLUTE_REF)
9306 // For global symbols, we use the same helper routines used in the
9307 // scan pass. If we did not create a dynamic relocation, or if we
9308 // created a RELATIVE dynamic relocation, we should apply the static
9310 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
9311 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
9312 && gsym->can_use_relative_reloc(ref_flags
9313 & Symbol::FUNCTION_CALL);
9314 return !has_dyn || is_rel;
9317 // Perform a relocation.
9319 template<bool big_endian>
9321 Target_arm<big_endian>::Relocate::relocate(
9322 const Relocate_info<32, big_endian>* relinfo,
9324 Output_section* output_section,
9326 const elfcpp::Rel<32, big_endian>& rel,
9327 unsigned int r_type,
9328 const Sized_symbol<32>* gsym,
9329 const Symbol_value<32>* psymval,
9330 unsigned char* view,
9331 Arm_address address,
9332 section_size_type view_size)
9337 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
9339 r_type = get_real_reloc_type(r_type);
9340 const Arm_reloc_property* reloc_property =
9341 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9342 if (reloc_property == NULL)
9344 std::string reloc_name =
9345 arm_reloc_property_table->reloc_name_in_error_message(r_type);
9346 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9347 _("cannot relocate %s in object file"),
9348 reloc_name.c_str());
9352 const Arm_relobj<big_endian>* object =
9353 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9355 // If the final branch target of a relocation is THUMB instruction, this
9356 // is 1. Otherwise it is 0.
9357 Arm_address thumb_bit = 0;
9358 Symbol_value<32> symval;
9359 bool is_weakly_undefined_without_plt = false;
9360 bool have_got_offset = false;
9361 unsigned int got_offset = 0;
9363 // If the relocation uses the GOT entry of a symbol instead of the symbol
9364 // itself, we don't care about whether the symbol is defined or what kind
9366 if (reloc_property->uses_got_entry())
9368 // Get the GOT offset.
9369 // The GOT pointer points to the end of the GOT section.
9370 // We need to subtract the size of the GOT section to get
9371 // the actual offset to use in the relocation.
9372 // TODO: We should move GOT offset computing code in TLS relocations
9376 case elfcpp::R_ARM_GOT_BREL:
9377 case elfcpp::R_ARM_GOT_PREL:
9380 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
9381 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
9382 - target->got_size());
9386 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9387 gold_assert(object->local_has_got_offset(r_sym,
9388 GOT_TYPE_STANDARD));
9389 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
9390 - target->got_size());
9392 have_got_offset = true;
9399 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
9403 // This is a global symbol. Determine if we use PLT and if the
9404 // final target is THUMB.
9405 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
9407 // This uses a PLT, change the symbol value.
9408 symval.set_output_value(target->plt_address_for_global(gsym));
9411 else if (gsym->is_weak_undefined())
9413 // This is a weakly undefined symbol and we do not use PLT
9414 // for this relocation. A branch targeting this symbol will
9415 // be converted into an NOP.
9416 is_weakly_undefined_without_plt = true;
9418 else if (gsym->is_undefined() && reloc_property->uses_symbol())
9420 // This relocation uses the symbol value but the symbol is
9421 // undefined. Exit early and have the caller reporting an
9427 // Set thumb bit if symbol:
9428 // -Has type STT_ARM_TFUNC or
9429 // -Has type STT_FUNC, is defined and with LSB in value set.
9431 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
9432 || (gsym->type() == elfcpp::STT_FUNC
9433 && !gsym->is_undefined()
9434 && ((psymval->value(object, 0) & 1) != 0)))
9441 // This is a local symbol. Determine if the final target is THUMB.
9442 // We saved this information when all the local symbols were read.
9443 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
9444 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9445 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
9447 if (psymval->is_ifunc_symbol() && object->local_has_plt_offset(r_sym))
9449 symval.set_output_value(
9450 target->plt_address_for_local(object, r_sym));
9457 // This is a fake relocation synthesized for a stub. It does not have
9458 // a real symbol. We just look at the LSB of the symbol value to
9459 // determine if the target is THUMB or not.
9460 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
9463 // Strip LSB if this points to a THUMB target.
9465 && reloc_property->uses_thumb_bit()
9466 && ((psymval->value(object, 0) & 1) != 0))
9468 Arm_address stripped_value =
9469 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
9470 symval.set_output_value(stripped_value);
9474 // To look up relocation stubs, we need to pass the symbol table index of
9476 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9478 // Get the addressing origin of the output segment defining the
9479 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9480 Arm_address sym_origin = 0;
9481 if (reloc_property->uses_symbol_base())
9483 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
9484 // R_ARM_BASE_ABS with the NULL symbol will give the
9485 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9486 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9487 sym_origin = target->got_plt_section()->address();
9488 else if (gsym == NULL)
9490 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
9491 sym_origin = gsym->output_segment()->vaddr();
9492 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
9493 sym_origin = gsym->output_data()->address();
9495 // TODO: Assumes the segment base to be zero for the global symbols
9496 // till the proper support for the segment-base-relative addressing
9497 // will be implemented. This is consistent with GNU ld.
9500 // For relative addressing relocation, find out the relative address base.
9501 Arm_address relative_address_base = 0;
9502 switch(reloc_property->relative_address_base())
9504 case Arm_reloc_property::RAB_NONE:
9505 // Relocations with relative address bases RAB_TLS and RAB_tp are
9506 // handled by relocate_tls. So we do not need to do anything here.
9507 case Arm_reloc_property::RAB_TLS:
9508 case Arm_reloc_property::RAB_tp:
9510 case Arm_reloc_property::RAB_B_S:
9511 relative_address_base = sym_origin;
9513 case Arm_reloc_property::RAB_GOT_ORG:
9514 relative_address_base = target->got_plt_section()->address();
9516 case Arm_reloc_property::RAB_P:
9517 relative_address_base = address;
9519 case Arm_reloc_property::RAB_Pa:
9520 relative_address_base = address & 0xfffffffcU;
9526 typename Arm_relocate_functions::Status reloc_status =
9527 Arm_relocate_functions::STATUS_OKAY;
9528 bool check_overflow = reloc_property->checks_overflow();
9531 case elfcpp::R_ARM_NONE:
9534 case elfcpp::R_ARM_ABS8:
9535 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9536 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
9539 case elfcpp::R_ARM_ABS12:
9540 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9541 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
9544 case elfcpp::R_ARM_ABS16:
9545 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9546 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
9549 case elfcpp::R_ARM_ABS32:
9550 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9551 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9555 case elfcpp::R_ARM_ABS32_NOI:
9556 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9557 // No thumb bit for this relocation: (S + A)
9558 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9562 case elfcpp::R_ARM_MOVW_ABS_NC:
9563 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9564 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
9569 case elfcpp::R_ARM_MOVT_ABS:
9570 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9571 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
9574 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9575 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9576 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
9577 0, thumb_bit, false);
9580 case elfcpp::R_ARM_THM_MOVT_ABS:
9581 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9582 reloc_status = Arm_relocate_functions::thm_movt(view, object,
9586 case elfcpp::R_ARM_MOVW_PREL_NC:
9587 case elfcpp::R_ARM_MOVW_BREL_NC:
9588 case elfcpp::R_ARM_MOVW_BREL:
9590 Arm_relocate_functions::movw(view, object, psymval,
9591 relative_address_base, thumb_bit,
9595 case elfcpp::R_ARM_MOVT_PREL:
9596 case elfcpp::R_ARM_MOVT_BREL:
9598 Arm_relocate_functions::movt(view, object, psymval,
9599 relative_address_base);
9602 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9603 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9604 case elfcpp::R_ARM_THM_MOVW_BREL:
9606 Arm_relocate_functions::thm_movw(view, object, psymval,
9607 relative_address_base,
9608 thumb_bit, check_overflow);
9611 case elfcpp::R_ARM_THM_MOVT_PREL:
9612 case elfcpp::R_ARM_THM_MOVT_BREL:
9614 Arm_relocate_functions::thm_movt(view, object, psymval,
9615 relative_address_base);
9618 case elfcpp::R_ARM_REL32:
9619 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9620 address, thumb_bit);
9623 case elfcpp::R_ARM_THM_ABS5:
9624 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9625 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
9628 // Thumb long branches.
9629 case elfcpp::R_ARM_THM_CALL:
9630 case elfcpp::R_ARM_THM_XPC22:
9631 case elfcpp::R_ARM_THM_JUMP24:
9633 Arm_relocate_functions::thumb_branch_common(
9634 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9635 thumb_bit, is_weakly_undefined_without_plt);
9638 case elfcpp::R_ARM_GOTOFF32:
9640 Arm_address got_origin;
9641 got_origin = target->got_plt_section()->address();
9642 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9643 got_origin, thumb_bit);
9647 case elfcpp::R_ARM_BASE_PREL:
9648 gold_assert(gsym != NULL);
9650 Arm_relocate_functions::base_prel(view, sym_origin, address);
9653 case elfcpp::R_ARM_BASE_ABS:
9654 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9655 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
9658 case elfcpp::R_ARM_GOT_BREL:
9659 gold_assert(have_got_offset);
9660 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
9663 case elfcpp::R_ARM_GOT_PREL:
9664 gold_assert(have_got_offset);
9665 // Get the address origin for GOT PLT, which is allocated right
9666 // after the GOT section, to calculate an absolute address of
9667 // the symbol GOT entry (got_origin + got_offset).
9668 Arm_address got_origin;
9669 got_origin = target->got_plt_section()->address();
9670 reloc_status = Arm_relocate_functions::got_prel(view,
9671 got_origin + got_offset,
9675 case elfcpp::R_ARM_PLT32:
9676 case elfcpp::R_ARM_CALL:
9677 case elfcpp::R_ARM_JUMP24:
9678 case elfcpp::R_ARM_XPC25:
9679 gold_assert(gsym == NULL
9680 || gsym->has_plt_offset()
9681 || gsym->final_value_is_known()
9682 || (gsym->is_defined()
9683 && !gsym->is_from_dynobj()
9684 && !gsym->is_preemptible()));
9686 Arm_relocate_functions::arm_branch_common(
9687 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9688 thumb_bit, is_weakly_undefined_without_plt);
9691 case elfcpp::R_ARM_THM_JUMP19:
9693 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
9697 case elfcpp::R_ARM_THM_JUMP6:
9699 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
9702 case elfcpp::R_ARM_THM_JUMP8:
9704 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
9707 case elfcpp::R_ARM_THM_JUMP11:
9709 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
9712 case elfcpp::R_ARM_PREL31:
9713 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
9714 address, thumb_bit);
9717 case elfcpp::R_ARM_V4BX:
9718 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
9720 const bool is_v4bx_interworking =
9721 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
9723 Arm_relocate_functions::v4bx(relinfo, view, object, address,
9724 is_v4bx_interworking);
9728 case elfcpp::R_ARM_THM_PC8:
9730 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
9733 case elfcpp::R_ARM_THM_PC12:
9735 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
9738 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9740 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
9744 case elfcpp::R_ARM_ALU_PC_G0_NC:
9745 case elfcpp::R_ARM_ALU_PC_G0:
9746 case elfcpp::R_ARM_ALU_PC_G1_NC:
9747 case elfcpp::R_ARM_ALU_PC_G1:
9748 case elfcpp::R_ARM_ALU_PC_G2:
9749 case elfcpp::R_ARM_ALU_SB_G0_NC:
9750 case elfcpp::R_ARM_ALU_SB_G0:
9751 case elfcpp::R_ARM_ALU_SB_G1_NC:
9752 case elfcpp::R_ARM_ALU_SB_G1:
9753 case elfcpp::R_ARM_ALU_SB_G2:
9755 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
9756 reloc_property->group_index(),
9757 relative_address_base,
9758 thumb_bit, check_overflow);
9761 case elfcpp::R_ARM_LDR_PC_G0:
9762 case elfcpp::R_ARM_LDR_PC_G1:
9763 case elfcpp::R_ARM_LDR_PC_G2:
9764 case elfcpp::R_ARM_LDR_SB_G0:
9765 case elfcpp::R_ARM_LDR_SB_G1:
9766 case elfcpp::R_ARM_LDR_SB_G2:
9768 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
9769 reloc_property->group_index(),
9770 relative_address_base);
9773 case elfcpp::R_ARM_LDRS_PC_G0:
9774 case elfcpp::R_ARM_LDRS_PC_G1:
9775 case elfcpp::R_ARM_LDRS_PC_G2:
9776 case elfcpp::R_ARM_LDRS_SB_G0:
9777 case elfcpp::R_ARM_LDRS_SB_G1:
9778 case elfcpp::R_ARM_LDRS_SB_G2:
9780 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
9781 reloc_property->group_index(),
9782 relative_address_base);
9785 case elfcpp::R_ARM_LDC_PC_G0:
9786 case elfcpp::R_ARM_LDC_PC_G1:
9787 case elfcpp::R_ARM_LDC_PC_G2:
9788 case elfcpp::R_ARM_LDC_SB_G0:
9789 case elfcpp::R_ARM_LDC_SB_G1:
9790 case elfcpp::R_ARM_LDC_SB_G2:
9792 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
9793 reloc_property->group_index(),
9794 relative_address_base);
9797 // These are initial tls relocs, which are expected when
9799 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9800 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9801 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9802 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9803 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9805 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval,
9806 view, address, view_size);
9809 // The known and unknown unsupported and/or deprecated relocations.
9810 case elfcpp::R_ARM_PC24:
9811 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9812 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9813 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9815 // Just silently leave the method. We should get an appropriate error
9816 // message in the scan methods.
9820 // Report any errors.
9821 switch (reloc_status)
9823 case Arm_relocate_functions::STATUS_OKAY:
9825 case Arm_relocate_functions::STATUS_OVERFLOW:
9826 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9827 _("relocation overflow in %s"),
9828 reloc_property->name().c_str());
9830 case Arm_relocate_functions::STATUS_BAD_RELOC:
9831 gold_error_at_location(
9835 _("unexpected opcode while processing relocation %s"),
9836 reloc_property->name().c_str());
9845 // Perform a TLS relocation.
9847 template<bool big_endian>
9848 inline typename Arm_relocate_functions<big_endian>::Status
9849 Target_arm<big_endian>::Relocate::relocate_tls(
9850 const Relocate_info<32, big_endian>* relinfo,
9851 Target_arm<big_endian>* target,
9853 const elfcpp::Rel<32, big_endian>& rel,
9854 unsigned int r_type,
9855 const Sized_symbol<32>* gsym,
9856 const Symbol_value<32>* psymval,
9857 unsigned char* view,
9858 elfcpp::Elf_types<32>::Elf_Addr address,
9859 section_size_type /*view_size*/ )
9861 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs;
9862 typedef Relocate_functions<32, big_endian> RelocFuncs;
9863 Output_segment* tls_segment = relinfo->layout->tls_segment();
9865 const Sized_relobj_file<32, big_endian>* object = relinfo->object;
9867 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0);
9869 const bool is_final = (gsym == NULL
9870 ? !parameters->options().shared()
9871 : gsym->final_value_is_known());
9872 const tls::Tls_optimization optimized_type
9873 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
9876 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9878 unsigned int got_type = GOT_TYPE_TLS_PAIR;
9879 unsigned int got_offset;
9882 gold_assert(gsym->has_got_offset(got_type));
9883 got_offset = gsym->got_offset(got_type) - target->got_size();
9887 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9888 gold_assert(object->local_has_got_offset(r_sym, got_type));
9889 got_offset = (object->local_got_offset(r_sym, got_type)
9890 - target->got_size());
9892 if (optimized_type == tls::TLSOPT_NONE)
9894 Arm_address got_entry =
9895 target->got_plt_section()->address() + got_offset;
9897 // Relocate the field with the PC relative offset of the pair of
9899 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9900 return ArmRelocFuncs::STATUS_OKAY;
9905 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9906 if (optimized_type == tls::TLSOPT_NONE)
9908 // Relocate the field with the offset of the GOT entry for
9909 // the module index.
9910 unsigned int got_offset;
9911 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL)
9912 - target->got_size());
9913 Arm_address got_entry =
9914 target->got_plt_section()->address() + got_offset;
9916 // Relocate the field with the PC relative offset of the pair of
9918 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9919 return ArmRelocFuncs::STATUS_OKAY;
9923 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9924 RelocFuncs::rel32_unaligned(view, value);
9925 return ArmRelocFuncs::STATUS_OKAY;
9927 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9928 if (optimized_type == tls::TLSOPT_NONE)
9930 // Relocate the field with the offset of the GOT entry for
9931 // the tp-relative offset of the symbol.
9932 unsigned int got_type = GOT_TYPE_TLS_OFFSET;
9933 unsigned int got_offset;
9936 gold_assert(gsym->has_got_offset(got_type));
9937 got_offset = gsym->got_offset(got_type);
9941 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9942 gold_assert(object->local_has_got_offset(r_sym, got_type));
9943 got_offset = object->local_got_offset(r_sym, got_type);
9946 // All GOT offsets are relative to the end of the GOT.
9947 got_offset -= target->got_size();
9949 Arm_address got_entry =
9950 target->got_plt_section()->address() + got_offset;
9952 // Relocate the field with the PC relative offset of the GOT entry.
9953 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9954 return ArmRelocFuncs::STATUS_OKAY;
9958 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9959 // If we're creating a shared library, a dynamic relocation will
9960 // have been created for this location, so do not apply it now.
9961 if (!parameters->options().shared())
9963 gold_assert(tls_segment != NULL);
9965 // $tp points to the TCB, which is followed by the TLS, so we
9966 // need to add TCB size to the offset.
9967 Arm_address aligned_tcb_size =
9968 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
9969 RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size);
9972 return ArmRelocFuncs::STATUS_OKAY;
9978 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9979 _("unsupported reloc %u"),
9981 return ArmRelocFuncs::STATUS_BAD_RELOC;
9984 // Relocate section data.
9986 template<bool big_endian>
9988 Target_arm<big_endian>::relocate_section(
9989 const Relocate_info<32, big_endian>* relinfo,
9990 unsigned int sh_type,
9991 const unsigned char* prelocs,
9993 Output_section* output_section,
9994 bool needs_special_offset_handling,
9995 unsigned char* view,
9996 Arm_address address,
9997 section_size_type view_size,
9998 const Reloc_symbol_changes* reloc_symbol_changes)
10000 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
10001 gold_assert(sh_type == elfcpp::SHT_REL);
10003 // See if we are relocating a relaxed input section. If so, the view
10004 // covers the whole output section and we need to adjust accordingly.
10005 if (needs_special_offset_handling)
10007 const Output_relaxed_input_section* poris =
10008 output_section->find_relaxed_input_section(relinfo->object,
10009 relinfo->data_shndx);
10012 Arm_address section_address = poris->address();
10013 section_size_type section_size = poris->data_size();
10015 gold_assert((section_address >= address)
10016 && ((section_address + section_size)
10017 <= (address + view_size)));
10019 off_t offset = section_address - address;
10022 view_size = section_size;
10026 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
10027 Arm_relocate, gold::Default_comdat_behavior>(
10033 needs_special_offset_handling,
10037 reloc_symbol_changes);
10040 // Return the size of a relocation while scanning during a relocatable
10043 template<bool big_endian>
10045 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
10046 unsigned int r_type,
10049 r_type = get_real_reloc_type(r_type);
10050 const Arm_reloc_property* arp =
10051 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10053 return arp->size();
10056 std::string reloc_name =
10057 arm_reloc_property_table->reloc_name_in_error_message(r_type);
10058 gold_error(_("%s: unexpected %s in object file"),
10059 object->name().c_str(), reloc_name.c_str());
10064 // Scan the relocs during a relocatable link.
10066 template<bool big_endian>
10068 Target_arm<big_endian>::scan_relocatable_relocs(
10069 Symbol_table* symtab,
10071 Sized_relobj_file<32, big_endian>* object,
10072 unsigned int data_shndx,
10073 unsigned int sh_type,
10074 const unsigned char* prelocs,
10075 size_t reloc_count,
10076 Output_section* output_section,
10077 bool needs_special_offset_handling,
10078 size_t local_symbol_count,
10079 const unsigned char* plocal_symbols,
10080 Relocatable_relocs* rr)
10082 gold_assert(sh_type == elfcpp::SHT_REL);
10084 typedef Arm_scan_relocatable_relocs<big_endian, elfcpp::SHT_REL,
10085 Relocatable_size_for_reloc> Scan_relocatable_relocs;
10087 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
10088 Scan_relocatable_relocs>(
10096 needs_special_offset_handling,
10097 local_symbol_count,
10102 // Emit relocations for a section.
10104 template<bool big_endian>
10106 Target_arm<big_endian>::relocate_relocs(
10107 const Relocate_info<32, big_endian>* relinfo,
10108 unsigned int sh_type,
10109 const unsigned char* prelocs,
10110 size_t reloc_count,
10111 Output_section* output_section,
10112 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10113 const Relocatable_relocs* rr,
10114 unsigned char* view,
10115 Arm_address view_address,
10116 section_size_type view_size,
10117 unsigned char* reloc_view,
10118 section_size_type reloc_view_size)
10120 gold_assert(sh_type == elfcpp::SHT_REL);
10122 gold::relocate_relocs<32, big_endian, elfcpp::SHT_REL>(
10127 offset_in_output_section,
10136 // Perform target-specific processing in a relocatable link. This is
10137 // only used if we use the relocation strategy RELOC_SPECIAL.
10139 template<bool big_endian>
10141 Target_arm<big_endian>::relocate_special_relocatable(
10142 const Relocate_info<32, big_endian>* relinfo,
10143 unsigned int sh_type,
10144 const unsigned char* preloc_in,
10146 Output_section* output_section,
10147 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10148 unsigned char* view,
10149 elfcpp::Elf_types<32>::Elf_Addr view_address,
10151 unsigned char* preloc_out)
10153 // We can only handle REL type relocation sections.
10154 gold_assert(sh_type == elfcpp::SHT_REL);
10156 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype;
10157 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write
10159 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1;
10161 const Arm_relobj<big_endian>* object =
10162 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
10163 const unsigned int local_count = object->local_symbol_count();
10165 Reltype reloc(preloc_in);
10166 Reltype_write reloc_write(preloc_out);
10168 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
10169 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
10170 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
10172 const Arm_reloc_property* arp =
10173 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10174 gold_assert(arp != NULL);
10176 // Get the new symbol index.
10177 // We only use RELOC_SPECIAL strategy in local relocations.
10178 gold_assert(r_sym < local_count);
10180 // We are adjusting a section symbol. We need to find
10181 // the symbol table index of the section symbol for
10182 // the output section corresponding to input section
10183 // in which this symbol is defined.
10185 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary);
10186 gold_assert(is_ordinary);
10187 Output_section* os = object->output_section(shndx);
10188 gold_assert(os != NULL);
10189 gold_assert(os->needs_symtab_index());
10190 unsigned int new_symndx = os->symtab_index();
10192 // Get the new offset--the location in the output section where
10193 // this relocation should be applied.
10195 Arm_address offset = reloc.get_r_offset();
10196 Arm_address new_offset;
10197 if (offset_in_output_section != invalid_address)
10198 new_offset = offset + offset_in_output_section;
10201 section_offset_type sot_offset =
10202 convert_types<section_offset_type, Arm_address>(offset);
10203 section_offset_type new_sot_offset =
10204 output_section->output_offset(object, relinfo->data_shndx,
10206 gold_assert(new_sot_offset != -1);
10207 new_offset = new_sot_offset;
10210 // In an object file, r_offset is an offset within the section.
10211 // In an executable or dynamic object, generated by
10212 // --emit-relocs, r_offset is an absolute address.
10213 if (!parameters->options().relocatable())
10215 new_offset += view_address;
10216 if (offset_in_output_section != invalid_address)
10217 new_offset -= offset_in_output_section;
10220 reloc_write.put_r_offset(new_offset);
10221 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type));
10223 // Handle the reloc addend.
10224 // The relocation uses a section symbol in the input file.
10225 // We are adjusting it to use a section symbol in the output
10226 // file. The input section symbol refers to some address in
10227 // the input section. We need the relocation in the output
10228 // file to refer to that same address. This adjustment to
10229 // the addend is the same calculation we use for a simple
10230 // absolute relocation for the input section symbol.
10232 const Symbol_value<32>* psymval = object->local_symbol(r_sym);
10234 // Handle THUMB bit.
10235 Symbol_value<32> symval;
10236 Arm_address thumb_bit =
10237 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
10239 && arp->uses_thumb_bit()
10240 && ((psymval->value(object, 0) & 1) != 0))
10242 Arm_address stripped_value =
10243 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
10244 symval.set_output_value(stripped_value);
10248 unsigned char* paddend = view + offset;
10249 typename Arm_relocate_functions<big_endian>::Status reloc_status =
10250 Arm_relocate_functions<big_endian>::STATUS_OKAY;
10253 case elfcpp::R_ARM_ABS8:
10254 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object,
10258 case elfcpp::R_ARM_ABS12:
10259 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object,
10263 case elfcpp::R_ARM_ABS16:
10264 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object,
10268 case elfcpp::R_ARM_THM_ABS5:
10269 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend,
10274 case elfcpp::R_ARM_MOVW_ABS_NC:
10275 case elfcpp::R_ARM_MOVW_PREL_NC:
10276 case elfcpp::R_ARM_MOVW_BREL_NC:
10277 case elfcpp::R_ARM_MOVW_BREL:
10278 reloc_status = Arm_relocate_functions<big_endian>::movw(
10279 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10282 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
10283 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
10284 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
10285 case elfcpp::R_ARM_THM_MOVW_BREL:
10286 reloc_status = Arm_relocate_functions<big_endian>::thm_movw(
10287 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10290 case elfcpp::R_ARM_THM_CALL:
10291 case elfcpp::R_ARM_THM_XPC22:
10292 case elfcpp::R_ARM_THM_JUMP24:
10294 Arm_relocate_functions<big_endian>::thumb_branch_common(
10295 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10299 case elfcpp::R_ARM_PLT32:
10300 case elfcpp::R_ARM_CALL:
10301 case elfcpp::R_ARM_JUMP24:
10302 case elfcpp::R_ARM_XPC25:
10304 Arm_relocate_functions<big_endian>::arm_branch_common(
10305 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10309 case elfcpp::R_ARM_THM_JUMP19:
10311 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object,
10312 psymval, 0, thumb_bit);
10315 case elfcpp::R_ARM_THM_JUMP6:
10317 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval,
10321 case elfcpp::R_ARM_THM_JUMP8:
10323 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval,
10327 case elfcpp::R_ARM_THM_JUMP11:
10329 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval,
10333 case elfcpp::R_ARM_PREL31:
10335 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0,
10339 case elfcpp::R_ARM_THM_PC8:
10341 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval,
10345 case elfcpp::R_ARM_THM_PC12:
10347 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval,
10351 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
10353 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval,
10357 // These relocation truncate relocation results so we cannot handle them
10358 // in a relocatable link.
10359 case elfcpp::R_ARM_MOVT_ABS:
10360 case elfcpp::R_ARM_THM_MOVT_ABS:
10361 case elfcpp::R_ARM_MOVT_PREL:
10362 case elfcpp::R_ARM_MOVT_BREL:
10363 case elfcpp::R_ARM_THM_MOVT_PREL:
10364 case elfcpp::R_ARM_THM_MOVT_BREL:
10365 case elfcpp::R_ARM_ALU_PC_G0_NC:
10366 case elfcpp::R_ARM_ALU_PC_G0:
10367 case elfcpp::R_ARM_ALU_PC_G1_NC:
10368 case elfcpp::R_ARM_ALU_PC_G1:
10369 case elfcpp::R_ARM_ALU_PC_G2:
10370 case elfcpp::R_ARM_ALU_SB_G0_NC:
10371 case elfcpp::R_ARM_ALU_SB_G0:
10372 case elfcpp::R_ARM_ALU_SB_G1_NC:
10373 case elfcpp::R_ARM_ALU_SB_G1:
10374 case elfcpp::R_ARM_ALU_SB_G2:
10375 case elfcpp::R_ARM_LDR_PC_G0:
10376 case elfcpp::R_ARM_LDR_PC_G1:
10377 case elfcpp::R_ARM_LDR_PC_G2:
10378 case elfcpp::R_ARM_LDR_SB_G0:
10379 case elfcpp::R_ARM_LDR_SB_G1:
10380 case elfcpp::R_ARM_LDR_SB_G2:
10381 case elfcpp::R_ARM_LDRS_PC_G0:
10382 case elfcpp::R_ARM_LDRS_PC_G1:
10383 case elfcpp::R_ARM_LDRS_PC_G2:
10384 case elfcpp::R_ARM_LDRS_SB_G0:
10385 case elfcpp::R_ARM_LDRS_SB_G1:
10386 case elfcpp::R_ARM_LDRS_SB_G2:
10387 case elfcpp::R_ARM_LDC_PC_G0:
10388 case elfcpp::R_ARM_LDC_PC_G1:
10389 case elfcpp::R_ARM_LDC_PC_G2:
10390 case elfcpp::R_ARM_LDC_SB_G0:
10391 case elfcpp::R_ARM_LDC_SB_G1:
10392 case elfcpp::R_ARM_LDC_SB_G2:
10393 gold_error(_("cannot handle %s in a relocatable link"),
10394 arp->name().c_str());
10398 gold_unreachable();
10401 // Report any errors.
10402 switch (reloc_status)
10404 case Arm_relocate_functions<big_endian>::STATUS_OKAY:
10406 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW:
10407 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10408 _("relocation overflow in %s"),
10409 arp->name().c_str());
10411 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC:
10412 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10413 _("unexpected opcode while processing relocation %s"),
10414 arp->name().c_str());
10417 gold_unreachable();
10421 // Return the value to use for a dynamic symbol which requires special
10422 // treatment. This is how we support equality comparisons of function
10423 // pointers across shared library boundaries, as described in the
10424 // processor specific ABI supplement.
10426 template<bool big_endian>
10428 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
10430 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
10431 return this->plt_address_for_global(gsym);
10434 // Map platform-specific relocs to real relocs
10436 template<bool big_endian>
10438 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type)
10442 case elfcpp::R_ARM_TARGET1:
10443 // This is either R_ARM_ABS32 or R_ARM_REL32;
10444 return elfcpp::R_ARM_ABS32;
10446 case elfcpp::R_ARM_TARGET2:
10447 // This can be any reloc type but usually is R_ARM_GOT_PREL
10448 return elfcpp::R_ARM_GOT_PREL;
10455 // Whether if two EABI versions V1 and V2 are compatible.
10457 template<bool big_endian>
10459 Target_arm<big_endian>::are_eabi_versions_compatible(
10460 elfcpp::Elf_Word v1,
10461 elfcpp::Elf_Word v2)
10463 // v4 and v5 are the same spec before and after it was released,
10464 // so allow mixing them.
10465 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN)
10466 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
10467 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
10473 // Combine FLAGS from an input object called NAME and the processor-specific
10474 // flags in the ELF header of the output. Much of this is adapted from the
10475 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10476 // in bfd/elf32-arm.c.
10478 template<bool big_endian>
10480 Target_arm<big_endian>::merge_processor_specific_flags(
10481 const std::string& name,
10482 elfcpp::Elf_Word flags)
10484 if (this->are_processor_specific_flags_set())
10486 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
10488 // Nothing to merge if flags equal to those in output.
10489 if (flags == out_flags)
10492 // Complain about various flag mismatches.
10493 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
10494 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
10495 if (!this->are_eabi_versions_compatible(version1, version2)
10496 && parameters->options().warn_mismatch())
10497 gold_error(_("Source object %s has EABI version %d but output has "
10498 "EABI version %d."),
10500 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
10501 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
10505 // If the input is the default architecture and had the default
10506 // flags then do not bother setting the flags for the output
10507 // architecture, instead allow future merges to do this. If no
10508 // future merges ever set these flags then they will retain their
10509 // uninitialised values, which surprise surprise, correspond
10510 // to the default values.
10514 // This is the first time, just copy the flags.
10515 // We only copy the EABI version for now.
10516 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
10520 // Adjust ELF file header.
10521 template<bool big_endian>
10523 Target_arm<big_endian>::do_adjust_elf_header(
10524 unsigned char* view,
10527 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
10529 elfcpp::Ehdr<32, big_endian> ehdr(view);
10530 elfcpp::Elf_Word flags = this->processor_specific_flags();
10531 unsigned char e_ident[elfcpp::EI_NIDENT];
10532 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
10534 if (elfcpp::arm_eabi_version(flags)
10535 == elfcpp::EF_ARM_EABI_UNKNOWN)
10536 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
10538 e_ident[elfcpp::EI_OSABI] = 0;
10539 e_ident[elfcpp::EI_ABIVERSION] = 0;
10541 // FIXME: Do EF_ARM_BE8 adjustment.
10543 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10545 if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5)
10547 elfcpp::Elf_Half type = ehdr.get_e_type();
10548 if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN)
10550 Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args);
10551 if (attr->int_value() == elfcpp::AEABI_VFP_args_vfp)
10552 flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD;
10554 flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT;
10555 this->set_processor_specific_flags(flags);
10558 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
10559 oehdr.put_e_ident(e_ident);
10560 oehdr.put_e_flags(this->processor_specific_flags());
10563 // do_make_elf_object to override the same function in the base class.
10564 // We need to use a target-specific sub-class of
10565 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10566 // Hence we need to have our own ELF object creation.
10568 template<bool big_endian>
10570 Target_arm<big_endian>::do_make_elf_object(
10571 const std::string& name,
10572 Input_file* input_file,
10573 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
10575 int et = ehdr.get_e_type();
10576 // ET_EXEC files are valid input for --just-symbols/-R,
10577 // and we treat them as relocatable objects.
10578 if (et == elfcpp::ET_REL
10579 || (et == elfcpp::ET_EXEC && input_file->just_symbols()))
10581 Arm_relobj<big_endian>* obj =
10582 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
10586 else if (et == elfcpp::ET_DYN)
10588 Sized_dynobj<32, big_endian>* obj =
10589 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
10595 gold_error(_("%s: unsupported ELF file type %d"),
10601 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10602 // Returns -1 if no architecture could be read.
10603 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10605 template<bool big_endian>
10607 Target_arm<big_endian>::get_secondary_compatible_arch(
10608 const Attributes_section_data* pasd)
10610 const Object_attribute* known_attributes =
10611 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10613 // Note: the tag and its argument below are uleb128 values, though
10614 // currently-defined values fit in one byte for each.
10615 const std::string& sv =
10616 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
10618 && sv.data()[0] == elfcpp::Tag_CPU_arch
10619 && (sv.data()[1] & 128) != 128)
10620 return sv.data()[1];
10622 // This tag is "safely ignorable", so don't complain if it looks funny.
10626 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10627 // The tag is removed if ARCH is -1.
10628 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10630 template<bool big_endian>
10632 Target_arm<big_endian>::set_secondary_compatible_arch(
10633 Attributes_section_data* pasd,
10636 Object_attribute* known_attributes =
10637 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10641 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
10645 // Note: the tag and its argument below are uleb128 values, though
10646 // currently-defined values fit in one byte for each.
10648 sv[0] = elfcpp::Tag_CPU_arch;
10649 gold_assert(arch != 0);
10653 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
10656 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10658 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10660 template<bool big_endian>
10662 Target_arm<big_endian>::tag_cpu_arch_combine(
10665 int* secondary_compat_out,
10667 int secondary_compat)
10669 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10670 static const int v6t2[] =
10672 T(V6T2), // PRE_V4.
10682 static const int v6k[] =
10695 static const int v7[] =
10709 static const int v6_m[] =
10724 static const int v6s_m[] =
10740 static const int v7e_m[] =
10747 T(V7E_M), // V5TEJ.
10754 T(V7E_M), // V6S_M.
10757 static const int v8[] =
10775 static const int v4t_plus_v6_m[] =
10782 T(V5TEJ), // V5TEJ.
10789 T(V6S_M), // V6S_M.
10790 T(V7E_M), // V7E_M.
10792 T(V4T_PLUS_V6_M) // V4T plus V6_M.
10794 static const int* comb[] =
10803 // Pseudo-architecture.
10807 // Check we've not got a higher architecture than we know about.
10809 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH)
10811 gold_error(_("%s: unknown CPU architecture"), name);
10815 // Override old tag if we have a Tag_also_compatible_with on the output.
10817 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10818 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10819 oldtag = T(V4T_PLUS_V6_M);
10821 // And override the new tag if we have a Tag_also_compatible_with on the
10824 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10825 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10826 newtag = T(V4T_PLUS_V6_M);
10828 // Architectures before V6KZ add features monotonically.
10829 int tagh = std::max(oldtag, newtag);
10830 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
10833 int tagl = std::min(oldtag, newtag);
10834 int result = comb[tagh - T(V6T2)][tagl];
10836 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10837 // as the canonical version.
10838 if (result == T(V4T_PLUS_V6_M))
10841 *secondary_compat_out = T(V6_M);
10844 *secondary_compat_out = -1;
10848 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10849 name, oldtag, newtag);
10857 // Helper to print AEABI enum tag value.
10859 template<bool big_endian>
10861 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
10863 static const char* aeabi_enum_names[] =
10864 { "", "variable-size", "32-bit", "" };
10865 const size_t aeabi_enum_names_size =
10866 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
10868 if (value < aeabi_enum_names_size)
10869 return std::string(aeabi_enum_names[value]);
10873 sprintf(buffer, "<unknown value %u>", value);
10874 return std::string(buffer);
10878 // Return the string value to store in TAG_CPU_name.
10880 template<bool big_endian>
10882 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
10884 static const char* name_table[] = {
10885 // These aren't real CPU names, but we can't guess
10886 // that from the architecture version alone.
10903 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
10905 if (value < name_table_size)
10906 return std::string(name_table[value]);
10910 sprintf(buffer, "<unknown CPU value %u>", value);
10911 return std::string(buffer);
10915 // Query attributes object to see if integer divide instructions may be
10916 // present in an object.
10918 template<bool big_endian>
10920 Target_arm<big_endian>::attributes_accept_div(int arch, int profile,
10921 const Object_attribute* div_attr)
10923 switch (div_attr->int_value())
10926 // Integer divide allowed if instruction contained in
10928 if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
10930 else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M)
10936 // Integer divide explicitly prohibited.
10940 // Unrecognised case - treat as allowing divide everywhere.
10942 // Integer divide allowed in ARM state.
10947 // Query attributes object to see if integer divide instructions are
10948 // forbidden to be in the object. This is not the inverse of
10949 // attributes_accept_div.
10951 template<bool big_endian>
10953 Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr)
10955 return div_attr->int_value() == 1;
10958 // Merge object attributes from input file called NAME with those of the
10959 // output. The input object attributes are in the object pointed by PASD.
10961 template<bool big_endian>
10963 Target_arm<big_endian>::merge_object_attributes(
10965 const Attributes_section_data* pasd)
10967 // Return if there is no attributes section data.
10971 // If output has no object attributes, just copy.
10972 const int vendor = Object_attribute::OBJ_ATTR_PROC;
10973 if (this->attributes_section_data_ == NULL)
10975 this->attributes_section_data_ = new Attributes_section_data(*pasd);
10976 Object_attribute* out_attr =
10977 this->attributes_section_data_->known_attributes(vendor);
10979 // We do not output objects with Tag_MPextension_use_legacy - we move
10980 // the attribute's value to Tag_MPextension_use. */
10981 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0)
10983 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0
10984 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value()
10985 != out_attr[elfcpp::Tag_MPextension_use].int_value())
10987 gold_error(_("%s has both the current and legacy "
10988 "Tag_MPextension_use attributes"),
10992 out_attr[elfcpp::Tag_MPextension_use] =
10993 out_attr[elfcpp::Tag_MPextension_use_legacy];
10994 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0);
10995 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0);
11001 const Object_attribute* in_attr = pasd->known_attributes(vendor);
11002 Object_attribute* out_attr =
11003 this->attributes_section_data_->known_attributes(vendor);
11005 // This needs to happen before Tag_ABI_FP_number_model is merged. */
11006 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11007 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
11009 // Ignore mismatches if the object doesn't use floating point. */
11010 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11011 == elfcpp::AEABI_FP_number_model_none
11012 || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11013 != elfcpp::AEABI_FP_number_model_none
11014 && out_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11015 == elfcpp::AEABI_VFP_args_compatible))
11016 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
11017 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
11018 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11019 != elfcpp::AEABI_FP_number_model_none
11020 && in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11021 != elfcpp::AEABI_VFP_args_compatible
11022 && parameters->options().warn_mismatch())
11023 gold_error(_("%s uses VFP register arguments, output does not"),
11027 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
11029 // Merge this attribute with existing attributes.
11032 case elfcpp::Tag_CPU_raw_name:
11033 case elfcpp::Tag_CPU_name:
11034 // These are merged after Tag_CPU_arch.
11037 case elfcpp::Tag_ABI_optimization_goals:
11038 case elfcpp::Tag_ABI_FP_optimization_goals:
11039 // Use the first value seen.
11042 case elfcpp::Tag_CPU_arch:
11044 unsigned int saved_out_attr = out_attr->int_value();
11045 // Merge Tag_CPU_arch and Tag_also_compatible_with.
11046 int secondary_compat =
11047 this->get_secondary_compatible_arch(pasd);
11048 int secondary_compat_out =
11049 this->get_secondary_compatible_arch(
11050 this->attributes_section_data_);
11051 out_attr[i].set_int_value(
11052 tag_cpu_arch_combine(name, out_attr[i].int_value(),
11053 &secondary_compat_out,
11054 in_attr[i].int_value(),
11055 secondary_compat));
11056 this->set_secondary_compatible_arch(this->attributes_section_data_,
11057 secondary_compat_out);
11059 // Merge Tag_CPU_name and Tag_CPU_raw_name.
11060 if (out_attr[i].int_value() == saved_out_attr)
11061 ; // Leave the names alone.
11062 else if (out_attr[i].int_value() == in_attr[i].int_value())
11064 // The output architecture has been changed to match the
11065 // input architecture. Use the input names.
11066 out_attr[elfcpp::Tag_CPU_name].set_string_value(
11067 in_attr[elfcpp::Tag_CPU_name].string_value());
11068 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
11069 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
11073 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
11074 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
11077 // If we still don't have a value for Tag_CPU_name,
11078 // make one up now. Tag_CPU_raw_name remains blank.
11079 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
11081 const std::string cpu_name =
11082 this->tag_cpu_name_value(out_attr[i].int_value());
11083 // FIXME: If we see an unknown CPU, this will be set
11084 // to "<unknown CPU n>", where n is the attribute value.
11085 // This is different from BFD, which leaves the name alone.
11086 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
11091 case elfcpp::Tag_ARM_ISA_use:
11092 case elfcpp::Tag_THUMB_ISA_use:
11093 case elfcpp::Tag_WMMX_arch:
11094 case elfcpp::Tag_Advanced_SIMD_arch:
11095 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11096 case elfcpp::Tag_ABI_FP_rounding:
11097 case elfcpp::Tag_ABI_FP_exceptions:
11098 case elfcpp::Tag_ABI_FP_user_exceptions:
11099 case elfcpp::Tag_ABI_FP_number_model:
11100 case elfcpp::Tag_VFP_HP_extension:
11101 case elfcpp::Tag_CPU_unaligned_access:
11102 case elfcpp::Tag_T2EE_use:
11103 case elfcpp::Tag_Virtualization_use:
11104 case elfcpp::Tag_MPextension_use:
11105 // Use the largest value specified.
11106 if (in_attr[i].int_value() > out_attr[i].int_value())
11107 out_attr[i].set_int_value(in_attr[i].int_value());
11110 case elfcpp::Tag_ABI_align8_preserved:
11111 case elfcpp::Tag_ABI_PCS_RO_data:
11112 // Use the smallest value specified.
11113 if (in_attr[i].int_value() < out_attr[i].int_value())
11114 out_attr[i].set_int_value(in_attr[i].int_value());
11117 case elfcpp::Tag_ABI_align8_needed:
11118 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
11119 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
11120 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
11123 // This error message should be enabled once all non-conforming
11124 // binaries in the toolchain have had the attributes set
11126 // gold_error(_("output 8-byte data alignment conflicts with %s"),
11130 case elfcpp::Tag_ABI_FP_denormal:
11131 case elfcpp::Tag_ABI_PCS_GOT_use:
11133 // These tags have 0 = don't care, 1 = strong requirement,
11134 // 2 = weak requirement.
11135 static const int order_021[3] = {0, 2, 1};
11137 // Use the "greatest" from the sequence 0, 2, 1, or the largest
11138 // value if greater than 2 (for future-proofing).
11139 if ((in_attr[i].int_value() > 2
11140 && in_attr[i].int_value() > out_attr[i].int_value())
11141 || (in_attr[i].int_value() <= 2
11142 && out_attr[i].int_value() <= 2
11143 && (order_021[in_attr[i].int_value()]
11144 > order_021[out_attr[i].int_value()])))
11145 out_attr[i].set_int_value(in_attr[i].int_value());
11149 case elfcpp::Tag_CPU_arch_profile:
11150 if (out_attr[i].int_value() != in_attr[i].int_value())
11152 // 0 will merge with anything.
11153 // 'A' and 'S' merge to 'A'.
11154 // 'R' and 'S' merge to 'R'.
11155 // 'M' and 'A|R|S' is an error.
11156 if (out_attr[i].int_value() == 0
11157 || (out_attr[i].int_value() == 'S'
11158 && (in_attr[i].int_value() == 'A'
11159 || in_attr[i].int_value() == 'R')))
11160 out_attr[i].set_int_value(in_attr[i].int_value());
11161 else if (in_attr[i].int_value() == 0
11162 || (in_attr[i].int_value() == 'S'
11163 && (out_attr[i].int_value() == 'A'
11164 || out_attr[i].int_value() == 'R')))
11166 else if (parameters->options().warn_mismatch())
11169 (_("conflicting architecture profiles %c/%c"),
11170 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
11171 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
11175 case elfcpp::Tag_VFP_arch:
11177 static const struct
11181 } vfp_versions[7] =
11192 // Values greater than 6 aren't defined, so just pick the
11194 if (in_attr[i].int_value() > 6
11195 && in_attr[i].int_value() > out_attr[i].int_value())
11197 *out_attr = *in_attr;
11200 // The output uses the superset of input features
11201 // (ISA version) and registers.
11202 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
11203 vfp_versions[out_attr[i].int_value()].ver);
11204 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
11205 vfp_versions[out_attr[i].int_value()].regs);
11206 // This assumes all possible supersets are also a valid
11209 for (newval = 6; newval > 0; newval--)
11211 if (regs == vfp_versions[newval].regs
11212 && ver == vfp_versions[newval].ver)
11215 out_attr[i].set_int_value(newval);
11218 case elfcpp::Tag_PCS_config:
11219 if (out_attr[i].int_value() == 0)
11220 out_attr[i].set_int_value(in_attr[i].int_value());
11221 else if (in_attr[i].int_value() != 0
11222 && out_attr[i].int_value() != 0
11223 && parameters->options().warn_mismatch())
11225 // It's sometimes ok to mix different configs, so this is only
11227 gold_warning(_("%s: conflicting platform configuration"), name);
11230 case elfcpp::Tag_ABI_PCS_R9_use:
11231 if (in_attr[i].int_value() != out_attr[i].int_value()
11232 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
11233 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused
11234 && parameters->options().warn_mismatch())
11236 gold_error(_("%s: conflicting use of R9"), name);
11238 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
11239 out_attr[i].set_int_value(in_attr[i].int_value());
11241 case elfcpp::Tag_ABI_PCS_RW_data:
11242 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11243 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11244 != elfcpp::AEABI_R9_SB)
11245 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11246 != elfcpp::AEABI_R9_unused)
11247 && parameters->options().warn_mismatch())
11249 gold_error(_("%s: SB relative addressing conflicts with use "
11253 // Use the smallest value specified.
11254 if (in_attr[i].int_value() < out_attr[i].int_value())
11255 out_attr[i].set_int_value(in_attr[i].int_value());
11257 case elfcpp::Tag_ABI_PCS_wchar_t:
11258 if (out_attr[i].int_value()
11259 && in_attr[i].int_value()
11260 && out_attr[i].int_value() != in_attr[i].int_value()
11261 && parameters->options().warn_mismatch()
11262 && parameters->options().wchar_size_warning())
11264 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11265 "use %u-byte wchar_t; use of wchar_t values "
11266 "across objects may fail"),
11267 name, in_attr[i].int_value(),
11268 out_attr[i].int_value());
11270 else if (in_attr[i].int_value() && !out_attr[i].int_value())
11271 out_attr[i].set_int_value(in_attr[i].int_value());
11273 case elfcpp::Tag_ABI_enum_size:
11274 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
11276 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
11277 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
11279 // The existing object is compatible with anything.
11280 // Use whatever requirements the new object has.
11281 out_attr[i].set_int_value(in_attr[i].int_value());
11283 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
11284 && out_attr[i].int_value() != in_attr[i].int_value()
11285 && parameters->options().warn_mismatch()
11286 && parameters->options().enum_size_warning())
11288 unsigned int in_value = in_attr[i].int_value();
11289 unsigned int out_value = out_attr[i].int_value();
11290 gold_warning(_("%s uses %s enums yet the output is to use "
11291 "%s enums; use of enum values across objects "
11294 this->aeabi_enum_name(in_value).c_str(),
11295 this->aeabi_enum_name(out_value).c_str());
11299 case elfcpp::Tag_ABI_VFP_args:
11302 case elfcpp::Tag_ABI_WMMX_args:
11303 if (in_attr[i].int_value() != out_attr[i].int_value()
11304 && parameters->options().warn_mismatch())
11306 gold_error(_("%s uses iWMMXt register arguments, output does "
11311 case Object_attribute::Tag_compatibility:
11312 // Merged in target-independent code.
11314 case elfcpp::Tag_ABI_HardFP_use:
11315 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11316 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
11317 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
11318 out_attr[i].set_int_value(3);
11319 else if (in_attr[i].int_value() > out_attr[i].int_value())
11320 out_attr[i].set_int_value(in_attr[i].int_value());
11322 case elfcpp::Tag_ABI_FP_16bit_format:
11323 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
11325 if (in_attr[i].int_value() != out_attr[i].int_value()
11326 && parameters->options().warn_mismatch())
11327 gold_error(_("fp16 format mismatch between %s and output"),
11330 if (in_attr[i].int_value() != 0)
11331 out_attr[i].set_int_value(in_attr[i].int_value());
11334 case elfcpp::Tag_DIV_use:
11336 // A value of zero on input means that the divide
11337 // instruction may be used if available in the base
11338 // architecture as specified via Tag_CPU_arch and
11339 // Tag_CPU_arch_profile. A value of 1 means that the user
11340 // did not want divide instructions. A value of 2
11341 // explicitly means that divide instructions were allowed
11342 // in ARM and Thumb state.
11344 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)->
11346 int profile = this->
11347 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)->
11349 if (in_attr[i].int_value() == out_attr[i].int_value())
11353 else if (attributes_forbid_div(&in_attr[i])
11354 && !attributes_accept_div(arch, profile, &out_attr[i]))
11355 out_attr[i].set_int_value(1);
11356 else if (attributes_forbid_div(&out_attr[i])
11357 && attributes_accept_div(arch, profile, &in_attr[i]))
11358 out_attr[i].set_int_value(in_attr[i].int_value());
11359 else if (in_attr[i].int_value() == 2)
11360 out_attr[i].set_int_value(in_attr[i].int_value());
11364 case elfcpp::Tag_MPextension_use_legacy:
11365 // We don't output objects with Tag_MPextension_use_legacy - we
11366 // move the value to Tag_MPextension_use.
11367 if (in_attr[i].int_value() != 0
11368 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0)
11370 if (in_attr[elfcpp::Tag_MPextension_use].int_value()
11371 != in_attr[i].int_value())
11373 gold_error(_("%s has has both the current and legacy "
11374 "Tag_MPextension_use attributes"),
11379 if (in_attr[i].int_value()
11380 > out_attr[elfcpp::Tag_MPextension_use].int_value())
11381 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i];
11385 case elfcpp::Tag_nodefaults:
11386 // This tag is set if it exists, but the value is unused (and is
11387 // typically zero). We don't actually need to do anything here -
11388 // the merge happens automatically when the type flags are merged
11391 case elfcpp::Tag_also_compatible_with:
11392 // Already done in Tag_CPU_arch.
11394 case elfcpp::Tag_conformance:
11395 // Keep the attribute if it matches. Throw it away otherwise.
11396 // No attribute means no claim to conform.
11397 if (in_attr[i].string_value() != out_attr[i].string_value())
11398 out_attr[i].set_string_value("");
11403 const char* err_object = NULL;
11405 // The "known_obj_attributes" table does contain some undefined
11406 // attributes. Ensure that there are unused.
11407 if (out_attr[i].int_value() != 0
11408 || out_attr[i].string_value() != "")
11409 err_object = "output";
11410 else if (in_attr[i].int_value() != 0
11411 || in_attr[i].string_value() != "")
11414 if (err_object != NULL
11415 && parameters->options().warn_mismatch())
11417 // Attribute numbers >=64 (mod 128) can be safely ignored.
11418 if ((i & 127) < 64)
11419 gold_error(_("%s: unknown mandatory EABI object attribute "
11423 gold_warning(_("%s: unknown EABI object attribute %d"),
11427 // Only pass on attributes that match in both inputs.
11428 if (!in_attr[i].matches(out_attr[i]))
11430 out_attr[i].set_int_value(0);
11431 out_attr[i].set_string_value("");
11436 // If out_attr was copied from in_attr then it won't have a type yet.
11437 if (in_attr[i].type() && !out_attr[i].type())
11438 out_attr[i].set_type(in_attr[i].type());
11441 // Merge Tag_compatibility attributes and any common GNU ones.
11442 this->attributes_section_data_->merge(name, pasd);
11444 // Check for any attributes not known on ARM.
11445 typedef Vendor_object_attributes::Other_attributes Other_attributes;
11446 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
11447 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
11448 Other_attributes* out_other_attributes =
11449 this->attributes_section_data_->other_attributes(vendor);
11450 Other_attributes::iterator out_iter = out_other_attributes->begin();
11452 while (in_iter != in_other_attributes->end()
11453 || out_iter != out_other_attributes->end())
11455 const char* err_object = NULL;
11458 // The tags for each list are in numerical order.
11459 // If the tags are equal, then merge.
11460 if (out_iter != out_other_attributes->end()
11461 && (in_iter == in_other_attributes->end()
11462 || in_iter->first > out_iter->first))
11464 // This attribute only exists in output. We can't merge, and we
11465 // don't know what the tag means, so delete it.
11466 err_object = "output";
11467 err_tag = out_iter->first;
11468 int saved_tag = out_iter->first;
11469 delete out_iter->second;
11470 out_other_attributes->erase(out_iter);
11471 out_iter = out_other_attributes->upper_bound(saved_tag);
11473 else if (in_iter != in_other_attributes->end()
11474 && (out_iter != out_other_attributes->end()
11475 || in_iter->first < out_iter->first))
11477 // This attribute only exists in input. We can't merge, and we
11478 // don't know what the tag means, so ignore it.
11480 err_tag = in_iter->first;
11483 else // The tags are equal.
11485 // As present, all attributes in the list are unknown, and
11486 // therefore can't be merged meaningfully.
11487 err_object = "output";
11488 err_tag = out_iter->first;
11490 // Only pass on attributes that match in both inputs.
11491 if (!in_iter->second->matches(*(out_iter->second)))
11493 // No match. Delete the attribute.
11494 int saved_tag = out_iter->first;
11495 delete out_iter->second;
11496 out_other_attributes->erase(out_iter);
11497 out_iter = out_other_attributes->upper_bound(saved_tag);
11501 // Matched. Keep the attribute and move to the next.
11507 if (err_object && parameters->options().warn_mismatch())
11509 // Attribute numbers >=64 (mod 128) can be safely ignored. */
11510 if ((err_tag & 127) < 64)
11512 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11513 err_object, err_tag);
11517 gold_warning(_("%s: unknown EABI object attribute %d"),
11518 err_object, err_tag);
11524 // Stub-generation methods for Target_arm.
11526 // Make a new Arm_input_section object.
11528 template<bool big_endian>
11529 Arm_input_section<big_endian>*
11530 Target_arm<big_endian>::new_arm_input_section(
11532 unsigned int shndx)
11534 Section_id sid(relobj, shndx);
11536 Arm_input_section<big_endian>* arm_input_section =
11537 new Arm_input_section<big_endian>(relobj, shndx);
11538 arm_input_section->init();
11540 // Register new Arm_input_section in map for look-up.
11541 std::pair<typename Arm_input_section_map::iterator, bool> ins =
11542 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
11544 // Make sure that it we have not created another Arm_input_section
11545 // for this input section already.
11546 gold_assert(ins.second);
11548 return arm_input_section;
11551 // Find the Arm_input_section object corresponding to the SHNDX-th input
11552 // section of RELOBJ.
11554 template<bool big_endian>
11555 Arm_input_section<big_endian>*
11556 Target_arm<big_endian>::find_arm_input_section(
11558 unsigned int shndx) const
11560 Section_id sid(relobj, shndx);
11561 typename Arm_input_section_map::const_iterator p =
11562 this->arm_input_section_map_.find(sid);
11563 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
11566 // Make a new stub table.
11568 template<bool big_endian>
11569 Stub_table<big_endian>*
11570 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
11572 Stub_table<big_endian>* stub_table =
11573 new Stub_table<big_endian>(owner);
11574 this->stub_tables_.push_back(stub_table);
11576 stub_table->set_address(owner->address() + owner->data_size());
11577 stub_table->set_file_offset(owner->offset() + owner->data_size());
11578 stub_table->finalize_data_size();
11583 // Scan a relocation for stub generation.
11585 template<bool big_endian>
11587 Target_arm<big_endian>::scan_reloc_for_stub(
11588 const Relocate_info<32, big_endian>* relinfo,
11589 unsigned int r_type,
11590 const Sized_symbol<32>* gsym,
11591 unsigned int r_sym,
11592 const Symbol_value<32>* psymval,
11593 elfcpp::Elf_types<32>::Elf_Swxword addend,
11594 Arm_address address)
11596 const Arm_relobj<big_endian>* arm_relobj =
11597 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11599 bool target_is_thumb;
11600 Symbol_value<32> symval;
11603 // This is a global symbol. Determine if we use PLT and if the
11604 // final target is THUMB.
11605 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
11607 // This uses a PLT, change the symbol value.
11608 symval.set_output_value(this->plt_address_for_global(gsym));
11610 target_is_thumb = false;
11612 else if (gsym->is_undefined())
11613 // There is no need to generate a stub symbol is undefined.
11618 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
11619 || (gsym->type() == elfcpp::STT_FUNC
11620 && !gsym->is_undefined()
11621 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
11626 // This is a local symbol. Determine if the final target is THUMB.
11627 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
11630 // Strip LSB if this points to a THUMB target.
11631 const Arm_reloc_property* reloc_property =
11632 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
11633 gold_assert(reloc_property != NULL);
11634 if (target_is_thumb
11635 && reloc_property->uses_thumb_bit()
11636 && ((psymval->value(arm_relobj, 0) & 1) != 0))
11638 Arm_address stripped_value =
11639 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
11640 symval.set_output_value(stripped_value);
11644 // Get the symbol value.
11645 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
11647 // Owing to pipelining, the PC relative branches below actually skip
11648 // two instructions when the branch offset is 0.
11649 Arm_address destination;
11652 case elfcpp::R_ARM_CALL:
11653 case elfcpp::R_ARM_JUMP24:
11654 case elfcpp::R_ARM_PLT32:
11656 destination = value + addend + 8;
11658 case elfcpp::R_ARM_THM_CALL:
11659 case elfcpp::R_ARM_THM_XPC22:
11660 case elfcpp::R_ARM_THM_JUMP24:
11661 case elfcpp::R_ARM_THM_JUMP19:
11663 destination = value + addend + 4;
11666 gold_unreachable();
11669 Reloc_stub* stub = NULL;
11670 Stub_type stub_type =
11671 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
11673 if (stub_type != arm_stub_none)
11675 // Try looking up an existing stub from a stub table.
11676 Stub_table<big_endian>* stub_table =
11677 arm_relobj->stub_table(relinfo->data_shndx);
11678 gold_assert(stub_table != NULL);
11680 // Locate stub by destination.
11681 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
11683 // Create a stub if there is not one already
11684 stub = stub_table->find_reloc_stub(stub_key);
11687 // create a new stub and add it to stub table.
11688 stub = this->stub_factory().make_reloc_stub(stub_type);
11689 stub_table->add_reloc_stub(stub, stub_key);
11692 // Record the destination address.
11693 stub->set_destination_address(destination
11694 | (target_is_thumb ? 1 : 0));
11697 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11698 if (this->fix_cortex_a8_
11699 && (r_type == elfcpp::R_ARM_THM_JUMP24
11700 || r_type == elfcpp::R_ARM_THM_JUMP19
11701 || r_type == elfcpp::R_ARM_THM_CALL
11702 || r_type == elfcpp::R_ARM_THM_XPC22)
11703 && (address & 0xfffU) == 0xffeU)
11705 // Found a candidate. Note we haven't checked the destination is
11706 // within 4K here: if we do so (and don't create a record) we can't
11707 // tell that a branch should have been relocated when scanning later.
11708 this->cortex_a8_relocs_info_[address] =
11709 new Cortex_a8_reloc(stub, r_type,
11710 destination | (target_is_thumb ? 1 : 0));
11714 // This function scans a relocation sections for stub generation.
11715 // The template parameter Relocate must be a class type which provides
11716 // a single function, relocate(), which implements the machine
11717 // specific part of a relocation.
11719 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11720 // SHT_REL or SHT_RELA.
11722 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11723 // of relocs. OUTPUT_SECTION is the output section.
11724 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11725 // mapped to output offsets.
11727 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11728 // VIEW_SIZE is the size. These refer to the input section, unless
11729 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11730 // the output section.
11732 template<bool big_endian>
11733 template<int sh_type>
11735 Target_arm<big_endian>::scan_reloc_section_for_stubs(
11736 const Relocate_info<32, big_endian>* relinfo,
11737 const unsigned char* prelocs,
11738 size_t reloc_count,
11739 Output_section* output_section,
11740 bool needs_special_offset_handling,
11741 const unsigned char* view,
11742 elfcpp::Elf_types<32>::Elf_Addr view_address,
11745 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
11746 const int reloc_size =
11747 Reloc_types<sh_type, 32, big_endian>::reloc_size;
11749 Arm_relobj<big_endian>* arm_object =
11750 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11751 unsigned int local_count = arm_object->local_symbol_count();
11753 gold::Default_comdat_behavior default_comdat_behavior;
11754 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
11756 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
11758 Reltype reloc(prelocs);
11760 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
11761 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
11762 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
11764 r_type = this->get_real_reloc_type(r_type);
11766 // Only a few relocation types need stubs.
11767 if ((r_type != elfcpp::R_ARM_CALL)
11768 && (r_type != elfcpp::R_ARM_JUMP24)
11769 && (r_type != elfcpp::R_ARM_PLT32)
11770 && (r_type != elfcpp::R_ARM_THM_CALL)
11771 && (r_type != elfcpp::R_ARM_THM_XPC22)
11772 && (r_type != elfcpp::R_ARM_THM_JUMP24)
11773 && (r_type != elfcpp::R_ARM_THM_JUMP19)
11774 && (r_type != elfcpp::R_ARM_V4BX))
11777 section_offset_type offset =
11778 convert_to_section_size_type(reloc.get_r_offset());
11780 if (needs_special_offset_handling)
11782 offset = output_section->output_offset(relinfo->object,
11783 relinfo->data_shndx,
11789 // Create a v4bx stub if --fix-v4bx-interworking is used.
11790 if (r_type == elfcpp::R_ARM_V4BX)
11792 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING)
11794 // Get the BX instruction.
11795 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
11796 const Valtype* wv =
11797 reinterpret_cast<const Valtype*>(view + offset);
11798 elfcpp::Elf_types<32>::Elf_Swxword insn =
11799 elfcpp::Swap<32, big_endian>::readval(wv);
11800 const uint32_t reg = (insn & 0xf);
11804 // Try looking up an existing stub from a stub table.
11805 Stub_table<big_endian>* stub_table =
11806 arm_object->stub_table(relinfo->data_shndx);
11807 gold_assert(stub_table != NULL);
11809 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
11811 // create a new stub and add it to stub table.
11812 Arm_v4bx_stub* stub =
11813 this->stub_factory().make_arm_v4bx_stub(reg);
11814 gold_assert(stub != NULL);
11815 stub_table->add_arm_v4bx_stub(stub);
11823 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
11824 elfcpp::Elf_types<32>::Elf_Swxword addend =
11825 stub_addend_reader(r_type, view + offset, reloc);
11827 const Sized_symbol<32>* sym;
11829 Symbol_value<32> symval;
11830 const Symbol_value<32> *psymval;
11831 bool is_defined_in_discarded_section;
11832 unsigned int shndx;
11833 if (r_sym < local_count)
11836 psymval = arm_object->local_symbol(r_sym);
11838 // If the local symbol belongs to a section we are discarding,
11839 // and that section is a debug section, try to find the
11840 // corresponding kept section and map this symbol to its
11841 // counterpart in the kept section. The symbol must not
11842 // correspond to a section we are folding.
11844 shndx = psymval->input_shndx(&is_ordinary);
11845 is_defined_in_discarded_section =
11847 && shndx != elfcpp::SHN_UNDEF
11848 && !arm_object->is_section_included(shndx)
11849 && !relinfo->symtab->is_section_folded(arm_object, shndx));
11851 // We need to compute the would-be final value of this local
11853 if (!is_defined_in_discarded_section)
11855 typedef Sized_relobj_file<32, big_endian> ObjType;
11856 typename ObjType::Compute_final_local_value_status status =
11857 arm_object->compute_final_local_value(r_sym, psymval, &symval,
11859 if (status == ObjType::CFLV_OK)
11861 // Currently we cannot handle a branch to a target in
11862 // a merged section. If this is the case, issue an error
11863 // and also free the merge symbol value.
11864 if (!symval.has_output_value())
11866 const std::string& section_name =
11867 arm_object->section_name(shndx);
11868 arm_object->error(_("cannot handle branch to local %u "
11869 "in a merged section %s"),
11870 r_sym, section_name.c_str());
11876 // We cannot determine the final value.
11883 const Symbol* gsym;
11884 gsym = arm_object->global_symbol(r_sym);
11885 gold_assert(gsym != NULL);
11886 if (gsym->is_forwarder())
11887 gsym = relinfo->symtab->resolve_forwards(gsym);
11889 sym = static_cast<const Sized_symbol<32>*>(gsym);
11890 if (sym->has_symtab_index() && sym->symtab_index() != -1U)
11891 symval.set_output_symtab_index(sym->symtab_index());
11893 symval.set_no_output_symtab_entry();
11895 // We need to compute the would-be final value of this global
11897 const Symbol_table* symtab = relinfo->symtab;
11898 const Sized_symbol<32>* sized_symbol =
11899 symtab->get_sized_symbol<32>(gsym);
11900 Symbol_table::Compute_final_value_status status;
11901 Arm_address value =
11902 symtab->compute_final_value<32>(sized_symbol, &status);
11904 // Skip this if the symbol has not output section.
11905 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
11907 symval.set_output_value(value);
11909 if (gsym->type() == elfcpp::STT_TLS)
11910 symval.set_is_tls_symbol();
11911 else if (gsym->type() == elfcpp::STT_GNU_IFUNC)
11912 symval.set_is_ifunc_symbol();
11915 is_defined_in_discarded_section =
11916 (gsym->is_defined_in_discarded_section()
11917 && gsym->is_undefined());
11921 Symbol_value<32> symval2;
11922 if (is_defined_in_discarded_section)
11924 if (comdat_behavior == CB_UNDETERMINED)
11926 std::string name = arm_object->section_name(relinfo->data_shndx);
11927 comdat_behavior = default_comdat_behavior.get(name.c_str());
11929 if (comdat_behavior == CB_PRETEND)
11931 // FIXME: This case does not work for global symbols.
11932 // We have no place to store the original section index.
11933 // Fortunately this does not matter for comdat sections,
11934 // only for sections explicitly discarded by a linker
11937 typename elfcpp::Elf_types<32>::Elf_Addr value =
11938 arm_object->map_to_kept_section(shndx, &found);
11940 symval2.set_output_value(value + psymval->input_value());
11942 symval2.set_output_value(0);
11946 if (comdat_behavior == CB_WARNING)
11947 gold_warning_at_location(relinfo, i, offset,
11948 _("relocation refers to discarded "
11950 symval2.set_output_value(0);
11952 symval2.set_no_output_symtab_entry();
11953 psymval = &symval2;
11956 // If symbol is a section symbol, we don't know the actual type of
11957 // destination. Give up.
11958 if (psymval->is_section_symbol())
11961 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
11962 addend, view_address + offset);
11966 // Scan an input section for stub generation.
11968 template<bool big_endian>
11970 Target_arm<big_endian>::scan_section_for_stubs(
11971 const Relocate_info<32, big_endian>* relinfo,
11972 unsigned int sh_type,
11973 const unsigned char* prelocs,
11974 size_t reloc_count,
11975 Output_section* output_section,
11976 bool needs_special_offset_handling,
11977 const unsigned char* view,
11978 Arm_address view_address,
11979 section_size_type view_size)
11981 if (sh_type == elfcpp::SHT_REL)
11982 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
11987 needs_special_offset_handling,
11991 else if (sh_type == elfcpp::SHT_RELA)
11992 // We do not support RELA type relocations yet. This is provided for
11994 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
11999 needs_special_offset_handling,
12004 gold_unreachable();
12007 // Group input sections for stub generation.
12009 // We group input sections in an output section so that the total size,
12010 // including any padding space due to alignment is smaller than GROUP_SIZE
12011 // unless the only input section in group is bigger than GROUP_SIZE already.
12012 // Then an ARM stub table is created to follow the last input section
12013 // in group. For each group an ARM stub table is created an is placed
12014 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
12015 // extend the group after the stub table.
12017 template<bool big_endian>
12019 Target_arm<big_endian>::group_sections(
12021 section_size_type group_size,
12022 bool stubs_always_after_branch,
12025 // Group input sections and insert stub table
12026 Layout::Section_list section_list;
12027 layout->get_executable_sections(§ion_list);
12028 for (Layout::Section_list::const_iterator p = section_list.begin();
12029 p != section_list.end();
12032 Arm_output_section<big_endian>* output_section =
12033 Arm_output_section<big_endian>::as_arm_output_section(*p);
12034 output_section->group_sections(group_size, stubs_always_after_branch,
12039 // Relaxation hook. This is where we do stub generation.
12041 template<bool big_endian>
12043 Target_arm<big_endian>::do_relax(
12045 const Input_objects* input_objects,
12046 Symbol_table* symtab,
12050 // No need to generate stubs if this is a relocatable link.
12051 gold_assert(!parameters->options().relocatable());
12053 // If this is the first pass, we need to group input sections into
12055 bool done_exidx_fixup = false;
12056 typedef typename Stub_table_list::iterator Stub_table_iterator;
12059 // Determine the stub group size. The group size is the absolute
12060 // value of the parameter --stub-group-size. If --stub-group-size
12061 // is passed a negative value, we restrict stubs to be always after
12062 // the stubbed branches.
12063 int32_t stub_group_size_param =
12064 parameters->options().stub_group_size();
12065 bool stubs_always_after_branch = stub_group_size_param < 0;
12066 section_size_type stub_group_size = abs(stub_group_size_param);
12068 if (stub_group_size == 1)
12071 // Thumb branch range is +-4MB has to be used as the default
12072 // maximum size (a given section can contain both ARM and Thumb
12073 // code, so the worst case has to be taken into account). If we are
12074 // fixing cortex-a8 errata, the branch range has to be even smaller,
12075 // since wide conditional branch has a range of +-1MB only.
12077 // This value is 48K less than that, which allows for 4096
12078 // 12-byte stubs. If we exceed that, then we will fail to link.
12079 // The user will have to relink with an explicit group size
12081 stub_group_size = 4145152;
12084 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12085 // page as the first half of a 32-bit branch straddling two 4K pages.
12086 // This is a crude way of enforcing that. In addition, long conditional
12087 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
12088 // erratum, limit the group size to (1M - 12k) to avoid unreachable
12089 // cortex-A8 stubs from long conditional branches.
12090 if (this->fix_cortex_a8_)
12092 stubs_always_after_branch = true;
12093 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12);
12094 stub_group_size = std::max(stub_group_size, cortex_a8_group_size);
12097 group_sections(layout, stub_group_size, stubs_always_after_branch, task);
12099 // Also fix .ARM.exidx section coverage.
12100 Arm_output_section<big_endian>* exidx_output_section = NULL;
12101 for (Layout::Section_list::const_iterator p =
12102 layout->section_list().begin();
12103 p != layout->section_list().end();
12105 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
12107 if (exidx_output_section == NULL)
12108 exidx_output_section =
12109 Arm_output_section<big_endian>::as_arm_output_section(*p);
12111 // We cannot handle this now.
12112 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12113 "non-relocatable link"),
12114 exidx_output_section->name(),
12118 if (exidx_output_section != NULL)
12120 this->fix_exidx_coverage(layout, input_objects, exidx_output_section,
12122 done_exidx_fixup = true;
12127 // If this is not the first pass, addresses and file offsets have
12128 // been reset at this point, set them here.
12129 for (Stub_table_iterator sp = this->stub_tables_.begin();
12130 sp != this->stub_tables_.end();
12133 Arm_input_section<big_endian>* owner = (*sp)->owner();
12134 off_t off = align_address(owner->original_size(),
12135 (*sp)->addralign());
12136 (*sp)->set_address_and_file_offset(owner->address() + off,
12137 owner->offset() + off);
12141 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
12142 // beginning of each relaxation pass, just blow away all the stubs.
12143 // Alternatively, we could selectively remove only the stubs and reloc
12144 // information for code sections that have moved since the last pass.
12145 // That would require more book-keeping.
12146 if (this->fix_cortex_a8_)
12148 // Clear all Cortex-A8 reloc information.
12149 for (typename Cortex_a8_relocs_info::const_iterator p =
12150 this->cortex_a8_relocs_info_.begin();
12151 p != this->cortex_a8_relocs_info_.end();
12154 this->cortex_a8_relocs_info_.clear();
12156 // Remove all Cortex-A8 stubs.
12157 for (Stub_table_iterator sp = this->stub_tables_.begin();
12158 sp != this->stub_tables_.end();
12160 (*sp)->remove_all_cortex_a8_stubs();
12163 // Scan relocs for relocation stubs
12164 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12165 op != input_objects->relobj_end();
12168 Arm_relobj<big_endian>* arm_relobj =
12169 Arm_relobj<big_endian>::as_arm_relobj(*op);
12170 // Lock the object so we can read from it. This is only called
12171 // single-threaded from Layout::finalize, so it is OK to lock.
12172 Task_lock_obj<Object> tl(task, arm_relobj);
12173 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
12176 // Check all stub tables to see if any of them have their data sizes
12177 // or addresses alignments changed. These are the only things that
12179 bool any_stub_table_changed = false;
12180 Unordered_set<const Output_section*> sections_needing_adjustment;
12181 for (Stub_table_iterator sp = this->stub_tables_.begin();
12182 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12185 if ((*sp)->update_data_size_and_addralign())
12187 // Update data size of stub table owner.
12188 Arm_input_section<big_endian>* owner = (*sp)->owner();
12189 uint64_t address = owner->address();
12190 off_t offset = owner->offset();
12191 owner->reset_address_and_file_offset();
12192 owner->set_address_and_file_offset(address, offset);
12194 sections_needing_adjustment.insert(owner->output_section());
12195 any_stub_table_changed = true;
12199 // Output_section_data::output_section() returns a const pointer but we
12200 // need to update output sections, so we record all output sections needing
12201 // update above and scan the sections here to find out what sections need
12203 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
12204 p != layout->section_list().end();
12207 if (sections_needing_adjustment.find(*p)
12208 != sections_needing_adjustment.end())
12209 (*p)->set_section_offsets_need_adjustment();
12212 // Stop relaxation if no EXIDX fix-up and no stub table change.
12213 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
12215 // Finalize the stubs in the last relaxation pass.
12216 if (!continue_relaxation)
12218 for (Stub_table_iterator sp = this->stub_tables_.begin();
12219 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12221 (*sp)->finalize_stubs();
12223 // Update output local symbol counts of objects if necessary.
12224 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12225 op != input_objects->relobj_end();
12228 Arm_relobj<big_endian>* arm_relobj =
12229 Arm_relobj<big_endian>::as_arm_relobj(*op);
12231 // Update output local symbol counts. We need to discard local
12232 // symbols defined in parts of input sections that are discarded by
12234 if (arm_relobj->output_local_symbol_count_needs_update())
12236 // We need to lock the object's file to update it.
12237 Task_lock_obj<Object> tl(task, arm_relobj);
12238 arm_relobj->update_output_local_symbol_count();
12243 return continue_relaxation;
12246 // Relocate a stub.
12248 template<bool big_endian>
12250 Target_arm<big_endian>::relocate_stub(
12252 const Relocate_info<32, big_endian>* relinfo,
12253 Output_section* output_section,
12254 unsigned char* view,
12255 Arm_address address,
12256 section_size_type view_size)
12259 const Stub_template* stub_template = stub->stub_template();
12260 for (size_t i = 0; i < stub_template->reloc_count(); i++)
12262 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
12263 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
12265 unsigned int r_type = insn->r_type();
12266 section_size_type reloc_offset = stub_template->reloc_offset(i);
12267 section_size_type reloc_size = insn->size();
12268 gold_assert(reloc_offset + reloc_size <= view_size);
12270 // This is the address of the stub destination.
12271 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
12272 Symbol_value<32> symval;
12273 symval.set_output_value(target);
12275 // Synthesize a fake reloc just in case. We don't have a symbol so
12277 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
12278 memset(reloc_buffer, 0, sizeof(reloc_buffer));
12279 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
12280 reloc_write.put_r_offset(reloc_offset);
12281 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
12282 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
12284 relocate.relocate(relinfo, this, output_section,
12285 this->fake_relnum_for_stubs, rel, r_type,
12286 NULL, &symval, view + reloc_offset,
12287 address + reloc_offset, reloc_size);
12291 // Determine whether an object attribute tag takes an integer, a
12294 template<bool big_endian>
12296 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
12298 if (tag == Object_attribute::Tag_compatibility)
12299 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12300 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
12301 else if (tag == elfcpp::Tag_nodefaults)
12302 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12303 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
12304 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
12305 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
12307 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
12309 return ((tag & 1) != 0
12310 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12311 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
12314 // Reorder attributes.
12316 // The ABI defines that Tag_conformance should be emitted first, and that
12317 // Tag_nodefaults should be second (if either is defined). This sets those
12318 // two positions, and bumps up the position of all the remaining tags to
12321 template<bool big_endian>
12323 Target_arm<big_endian>::do_attributes_order(int num) const
12325 // Reorder the known object attributes in output. We want to move
12326 // Tag_conformance to position 4 and Tag_conformance to position 5
12327 // and shift everything between 4 .. Tag_conformance - 1 to make room.
12329 return elfcpp::Tag_conformance;
12331 return elfcpp::Tag_nodefaults;
12332 if ((num - 2) < elfcpp::Tag_nodefaults)
12334 if ((num - 1) < elfcpp::Tag_conformance)
12339 // Scan a span of THUMB code for Cortex-A8 erratum.
12341 template<bool big_endian>
12343 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
12344 Arm_relobj<big_endian>* arm_relobj,
12345 unsigned int shndx,
12346 section_size_type span_start,
12347 section_size_type span_end,
12348 const unsigned char* view,
12349 Arm_address address)
12351 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12353 // The opcode is BLX.W, BL.W, B.W, Bcc.W
12354 // The branch target is in the same 4KB region as the
12355 // first half of the branch.
12356 // The instruction before the branch is a 32-bit
12357 // length non-branch instruction.
12358 section_size_type i = span_start;
12359 bool last_was_32bit = false;
12360 bool last_was_branch = false;
12361 while (i < span_end)
12363 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12364 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
12365 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
12366 bool is_blx = false, is_b = false;
12367 bool is_bl = false, is_bcc = false;
12369 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
12372 // Load the rest of the insn (in manual-friendly order).
12373 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
12375 // Encoding T4: B<c>.W.
12376 is_b = (insn & 0xf800d000U) == 0xf0009000U;
12377 // Encoding T1: BL<c>.W.
12378 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
12379 // Encoding T2: BLX<c>.W.
12380 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
12381 // Encoding T3: B<c>.W (not permitted in IT block).
12382 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
12383 && (insn & 0x07f00000U) != 0x03800000U);
12386 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
12388 // If this instruction is a 32-bit THUMB branch that crosses a 4K
12389 // page boundary and it follows 32-bit non-branch instruction,
12390 // we need to work around.
12391 if (is_32bit_branch
12392 && ((address + i) & 0xfffU) == 0xffeU
12394 && !last_was_branch)
12396 // Check to see if there is a relocation stub for this branch.
12397 bool force_target_arm = false;
12398 bool force_target_thumb = false;
12399 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
12400 Cortex_a8_relocs_info::const_iterator p =
12401 this->cortex_a8_relocs_info_.find(address + i);
12403 if (p != this->cortex_a8_relocs_info_.end())
12405 cortex_a8_reloc = p->second;
12406 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
12408 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12409 && !target_is_thumb)
12410 force_target_arm = true;
12411 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12412 && target_is_thumb)
12413 force_target_thumb = true;
12417 Stub_type stub_type = arm_stub_none;
12419 // Check if we have an offending branch instruction.
12420 uint16_t upper_insn = (insn >> 16) & 0xffffU;
12421 uint16_t lower_insn = insn & 0xffffU;
12422 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12424 if (cortex_a8_reloc != NULL
12425 && cortex_a8_reloc->reloc_stub() != NULL)
12426 // We've already made a stub for this instruction, e.g.
12427 // it's a long branch or a Thumb->ARM stub. Assume that
12428 // stub will suffice to work around the A8 erratum (see
12429 // setting of always_after_branch above).
12433 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
12435 stub_type = arm_stub_a8_veneer_b_cond;
12437 else if (is_b || is_bl || is_blx)
12439 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
12444 stub_type = (is_blx
12445 ? arm_stub_a8_veneer_blx
12447 ? arm_stub_a8_veneer_bl
12448 : arm_stub_a8_veneer_b));
12451 if (stub_type != arm_stub_none)
12453 Arm_address pc_for_insn = address + i + 4;
12455 // The original instruction is a BL, but the target is
12456 // an ARM instruction. If we were not making a stub,
12457 // the BL would have been converted to a BLX. Use the
12458 // BLX stub instead in that case.
12459 if (this->may_use_v5t_interworking() && force_target_arm
12460 && stub_type == arm_stub_a8_veneer_bl)
12462 stub_type = arm_stub_a8_veneer_blx;
12466 // Conversely, if the original instruction was
12467 // BLX but the target is Thumb mode, use the BL stub.
12468 else if (force_target_thumb
12469 && stub_type == arm_stub_a8_veneer_blx)
12471 stub_type = arm_stub_a8_veneer_bl;
12479 // If we found a relocation, use the proper destination,
12480 // not the offset in the (unrelocated) instruction.
12481 // Note this is always done if we switched the stub type above.
12482 if (cortex_a8_reloc != NULL)
12483 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
12485 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
12487 // Add a new stub if destination address in in the same page.
12488 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
12490 Cortex_a8_stub* stub =
12491 this->stub_factory_.make_cortex_a8_stub(stub_type,
12495 Stub_table<big_endian>* stub_table =
12496 arm_relobj->stub_table(shndx);
12497 gold_assert(stub_table != NULL);
12498 stub_table->add_cortex_a8_stub(address + i, stub);
12503 i += insn_32bit ? 4 : 2;
12504 last_was_32bit = insn_32bit;
12505 last_was_branch = is_32bit_branch;
12509 // Apply the Cortex-A8 workaround.
12511 template<bool big_endian>
12513 Target_arm<big_endian>::apply_cortex_a8_workaround(
12514 const Cortex_a8_stub* stub,
12515 Arm_address stub_address,
12516 unsigned char* insn_view,
12517 Arm_address insn_address)
12519 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12520 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
12521 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
12522 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
12523 off_t branch_offset = stub_address - (insn_address + 4);
12525 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12526 switch (stub->stub_template()->type())
12528 case arm_stub_a8_veneer_b_cond:
12529 // For a conditional branch, we re-write it to be an unconditional
12530 // branch to the stub. We use the THUMB-2 encoding here.
12531 upper_insn = 0xf000U;
12532 lower_insn = 0xb800U;
12534 case arm_stub_a8_veneer_b:
12535 case arm_stub_a8_veneer_bl:
12536 case arm_stub_a8_veneer_blx:
12537 if ((lower_insn & 0x5000U) == 0x4000U)
12538 // For a BLX instruction, make sure that the relocation is
12539 // rounded up to a word boundary. This follows the semantics of
12540 // the instruction which specifies that bit 1 of the target
12541 // address will come from bit 1 of the base address.
12542 branch_offset = (branch_offset + 2) & ~3;
12544 // Put BRANCH_OFFSET back into the insn.
12545 gold_assert(!Bits<25>::has_overflow32(branch_offset));
12546 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
12547 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
12551 gold_unreachable();
12554 // Put the relocated value back in the object file:
12555 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
12556 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
12559 // Target selector for ARM. Note this is never instantiated directly.
12560 // It's only used in Target_selector_arm_nacl, below.
12562 template<bool big_endian>
12563 class Target_selector_arm : public Target_selector
12566 Target_selector_arm()
12567 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
12568 (big_endian ? "elf32-bigarm" : "elf32-littlearm"),
12569 (big_endian ? "armelfb" : "armelf"))
12573 do_instantiate_target()
12574 { return new Target_arm<big_endian>(); }
12577 // Fix .ARM.exidx section coverage.
12579 template<bool big_endian>
12581 Target_arm<big_endian>::fix_exidx_coverage(
12583 const Input_objects* input_objects,
12584 Arm_output_section<big_endian>* exidx_section,
12585 Symbol_table* symtab,
12588 // We need to look at all the input sections in output in ascending
12589 // order of of output address. We do that by building a sorted list
12590 // of output sections by addresses. Then we looks at the output sections
12591 // in order. The input sections in an output section are already sorted
12592 // by addresses within the output section.
12594 typedef std::set<Output_section*, output_section_address_less_than>
12595 Sorted_output_section_list;
12596 Sorted_output_section_list sorted_output_sections;
12598 // Find out all the output sections of input sections pointed by
12599 // EXIDX input sections.
12600 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
12601 p != input_objects->relobj_end();
12604 Arm_relobj<big_endian>* arm_relobj =
12605 Arm_relobj<big_endian>::as_arm_relobj(*p);
12606 std::vector<unsigned int> shndx_list;
12607 arm_relobj->get_exidx_shndx_list(&shndx_list);
12608 for (size_t i = 0; i < shndx_list.size(); ++i)
12610 const Arm_exidx_input_section* exidx_input_section =
12611 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]);
12612 gold_assert(exidx_input_section != NULL);
12613 if (!exidx_input_section->has_errors())
12615 unsigned int text_shndx = exidx_input_section->link();
12616 Output_section* os = arm_relobj->output_section(text_shndx);
12617 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0)
12618 sorted_output_sections.insert(os);
12623 // Go over the output sections in ascending order of output addresses.
12624 typedef typename Arm_output_section<big_endian>::Text_section_list
12626 Text_section_list sorted_text_sections;
12627 for (typename Sorted_output_section_list::iterator p =
12628 sorted_output_sections.begin();
12629 p != sorted_output_sections.end();
12632 Arm_output_section<big_endian>* arm_output_section =
12633 Arm_output_section<big_endian>::as_arm_output_section(*p);
12634 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
12637 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab,
12638 merge_exidx_entries(), task);
12641 template<bool big_endian>
12643 Target_arm<big_endian>::do_define_standard_symbols(
12644 Symbol_table* symtab,
12647 // Handle the .ARM.exidx section.
12648 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
12650 if (exidx_section != NULL)
12652 // Create __exidx_start and __exidx_end symbols.
12653 symtab->define_in_output_data("__exidx_start",
12655 Symbol_table::PREDEFINED,
12659 elfcpp::STT_NOTYPE,
12660 elfcpp::STB_GLOBAL,
12661 elfcpp::STV_HIDDEN,
12663 false, // offset_is_from_end
12664 true); // only_if_ref
12666 symtab->define_in_output_data("__exidx_end",
12668 Symbol_table::PREDEFINED,
12672 elfcpp::STT_NOTYPE,
12673 elfcpp::STB_GLOBAL,
12674 elfcpp::STV_HIDDEN,
12676 true, // offset_is_from_end
12677 true); // only_if_ref
12681 // Define __exidx_start and __exidx_end even when .ARM.exidx
12682 // section is missing to match ld's behaviour.
12683 symtab->define_as_constant("__exidx_start", NULL,
12684 Symbol_table::PREDEFINED,
12685 0, 0, elfcpp::STT_OBJECT,
12686 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12688 symtab->define_as_constant("__exidx_end", NULL,
12689 Symbol_table::PREDEFINED,
12690 0, 0, elfcpp::STT_OBJECT,
12691 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12696 // NaCl variant. It uses different PLT contents.
12698 template<bool big_endian>
12699 class Output_data_plt_arm_nacl;
12701 template<bool big_endian>
12702 class Target_arm_nacl : public Target_arm<big_endian>
12706 : Target_arm<big_endian>(&arm_nacl_info)
12710 virtual Output_data_plt_arm<big_endian>*
12713 Arm_output_data_got<big_endian>* got,
12714 Output_data_space* got_plt,
12715 Output_data_space* got_irelative)
12716 { return new Output_data_plt_arm_nacl<big_endian>(
12717 layout, got, got_plt, got_irelative); }
12720 static const Target::Target_info arm_nacl_info;
12723 template<bool big_endian>
12724 const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info =
12727 big_endian, // is_big_endian
12728 elfcpp::EM_ARM, // machine_code
12729 false, // has_make_symbol
12730 false, // has_resolve
12731 false, // has_code_fill
12732 true, // is_default_stack_executable
12733 false, // can_icf_inline_merge_sections
12735 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12736 0x20000, // default_text_segment_address
12737 0x10000, // abi_pagesize (overridable by -z max-page-size)
12738 0x10000, // common_pagesize (overridable by -z common-page-size)
12739 true, // isolate_execinstr
12740 0x10000000, // rosegment_gap
12741 elfcpp::SHN_UNDEF, // small_common_shndx
12742 elfcpp::SHN_UNDEF, // large_common_shndx
12743 0, // small_common_section_flags
12744 0, // large_common_section_flags
12745 ".ARM.attributes", // attributes_section
12746 "aeabi", // attributes_vendor
12747 "_start" // entry_symbol_name
12750 template<bool big_endian>
12751 class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian>
12754 Output_data_plt_arm_nacl(
12756 Arm_output_data_got<big_endian>* got,
12757 Output_data_space* got_plt,
12758 Output_data_space* got_irelative)
12759 : Output_data_plt_arm<big_endian>(layout, 16, got, got_plt, got_irelative)
12763 // Return the offset of the first non-reserved PLT entry.
12764 virtual unsigned int
12765 do_first_plt_entry_offset() const
12766 { return sizeof(first_plt_entry); }
12768 // Return the size of a PLT entry.
12769 virtual unsigned int
12770 do_get_plt_entry_size() const
12771 { return sizeof(plt_entry); }
12774 do_fill_first_plt_entry(unsigned char* pov,
12775 Arm_address got_address,
12776 Arm_address plt_address);
12779 do_fill_plt_entry(unsigned char* pov,
12780 Arm_address got_address,
12781 Arm_address plt_address,
12782 unsigned int got_offset,
12783 unsigned int plt_offset);
12786 inline uint32_t arm_movw_immediate(uint32_t value)
12788 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
12791 inline uint32_t arm_movt_immediate(uint32_t value)
12793 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
12796 // Template for the first PLT entry.
12797 static const uint32_t first_plt_entry[16];
12799 // Template for subsequent PLT entries.
12800 static const uint32_t plt_entry[4];
12803 // The first entry in the PLT.
12804 template<bool big_endian>
12805 const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] =
12808 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12809 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12810 0xe08cc00f, // add ip, ip, pc
12811 0xe52dc008, // str ip, [sp, #-8]!
12813 0xe3ccc103, // bic ip, ip, #0xc0000000
12814 0xe59cc000, // ldr ip, [ip]
12815 0xe3ccc13f, // bic ip, ip, #0xc000000f
12816 0xe12fff1c, // bx ip
12822 0xe50dc004, // str ip, [sp, #-4]
12824 0xe3ccc103, // bic ip, ip, #0xc0000000
12825 0xe59cc000, // ldr ip, [ip]
12826 0xe3ccc13f, // bic ip, ip, #0xc000000f
12827 0xe12fff1c, // bx ip
12830 template<bool big_endian>
12832 Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry(
12833 unsigned char* pov,
12834 Arm_address got_address,
12835 Arm_address plt_address)
12837 // Write first PLT entry. All but first two words are constants.
12838 const size_t num_first_plt_words = (sizeof(first_plt_entry)
12839 / sizeof(first_plt_entry[0]));
12841 int32_t got_displacement = got_address + 8 - (plt_address + 16);
12843 elfcpp::Swap<32, big_endian>::writeval
12844 (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement));
12845 elfcpp::Swap<32, big_endian>::writeval
12846 (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement));
12848 for (size_t i = 2; i < num_first_plt_words; ++i)
12849 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
12852 // Subsequent entries in the PLT.
12854 template<bool big_endian>
12855 const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] =
12857 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12858 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12859 0xe08cc00f, // add ip, ip, pc
12860 0xea000000, // b .Lplt_tail
12863 template<bool big_endian>
12865 Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry(
12866 unsigned char* pov,
12867 Arm_address got_address,
12868 Arm_address plt_address,
12869 unsigned int got_offset,
12870 unsigned int plt_offset)
12872 // Calculate the displacement between the PLT slot and the
12873 // common tail that's part of the special initial PLT slot.
12874 int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t))
12875 - (plt_address + plt_offset
12876 + sizeof(plt_entry) + sizeof(uint32_t)));
12877 gold_assert((tail_displacement & 3) == 0);
12878 tail_displacement >>= 2;
12880 gold_assert ((tail_displacement & 0xff000000) == 0
12881 || (-tail_displacement & 0xff000000) == 0);
12883 // Calculate the displacement between the PLT slot and the entry
12884 // in the GOT. The offset accounts for the value produced by
12885 // adding to pc in the penultimate instruction of the PLT stub.
12886 const int32_t got_displacement = (got_address + got_offset
12887 - (plt_address + sizeof(plt_entry)));
12889 elfcpp::Swap<32, big_endian>::writeval
12890 (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement));
12891 elfcpp::Swap<32, big_endian>::writeval
12892 (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement));
12893 elfcpp::Swap<32, big_endian>::writeval
12894 (pov + 8, plt_entry[2]);
12895 elfcpp::Swap<32, big_endian>::writeval
12896 (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff));
12899 // Target selectors.
12901 template<bool big_endian>
12902 class Target_selector_arm_nacl
12903 : public Target_selector_nacl<Target_selector_arm<big_endian>,
12904 Target_arm_nacl<big_endian> >
12907 Target_selector_arm_nacl()
12908 : Target_selector_nacl<Target_selector_arm<big_endian>,
12909 Target_arm_nacl<big_endian> >(
12911 big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12912 big_endian ? "armelfb_nacl" : "armelf_nacl")
12916 Target_selector_arm_nacl<false> target_selector_arm;
12917 Target_selector_arm_nacl<true> target_selector_armbe;
12919 } // End anonymous namespace.