1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian>
61 class Output_data_plt_arm;
63 template<bool big_endian>
66 template<bool big_endian>
67 class Arm_input_section;
69 class Arm_exidx_cantunwind;
71 class Arm_exidx_merged_section;
73 class Arm_exidx_fixup;
75 template<bool big_endian>
76 class Arm_output_section;
78 class Arm_exidx_input_section;
80 template<bool big_endian>
83 template<bool big_endian>
87 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
89 // Maximum branch offsets for ARM, THUMB and THUMB2.
90 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
91 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
92 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
93 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
94 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
95 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
97 // The arm target class.
99 // This is a very simple port of gold for ARM-EABI. It is intended for
100 // supporting Android only for the time being.
103 // - Implement all static relocation types documented in arm-reloc.def.
104 // - Make PLTs more flexible for different architecture features like
106 // There are probably a lot more.
108 // Ideally we would like to avoid using global variables but this is used
109 // very in many places and sometimes in loops. If we use a function
110 // returning a static instance of Arm_reloc_property_table, it will very
111 // slow in an threaded environment since the static instance needs to be
112 // locked. The pointer is below initialized in the
113 // Target::do_select_as_default_target() hook so that we do not spend time
114 // building the table if we are not linking ARM objects.
116 // An alternative is to to process the information in arm-reloc.def in
117 // compilation time and generate a representation of it in PODs only. That
118 // way we can avoid initialization when the linker starts.
120 Arm_reloc_property_table *arm_reloc_property_table = NULL;
122 // Instruction template class. This class is similar to the insn_sequence
123 // struct in bfd/elf32-arm.c.
128 // Types of instruction templates.
132 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
133 // templates with class-specific semantics. Currently this is used
134 // only by the Cortex_a8_stub class for handling condition codes in
135 // conditional branches.
136 THUMB16_SPECIAL_TYPE,
142 // Factory methods to create instruction templates in different formats.
144 static const Insn_template
145 thumb16_insn(uint32_t data)
146 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
148 // A Thumb conditional branch, in which the proper condition is inserted
149 // when we build the stub.
150 static const Insn_template
151 thumb16_bcond_insn(uint32_t data)
152 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
154 static const Insn_template
155 thumb32_insn(uint32_t data)
156 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
158 static const Insn_template
159 thumb32_b_insn(uint32_t data, int reloc_addend)
161 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
165 static const Insn_template
166 arm_insn(uint32_t data)
167 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
169 static const Insn_template
170 arm_rel_insn(unsigned data, int reloc_addend)
171 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
173 static const Insn_template
174 data_word(unsigned data, unsigned int r_type, int reloc_addend)
175 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
177 // Accessors. This class is used for read-only objects so no modifiers
182 { return this->data_; }
184 // Return the instruction sequence type of this.
187 { return this->type_; }
189 // Return the ARM relocation type of this.
192 { return this->r_type_; }
196 { return this->reloc_addend_; }
198 // Return size of instruction template in bytes.
202 // Return byte-alignment of instruction template.
207 // We make the constructor private to ensure that only the factory
210 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
211 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
214 // Instruction specific data. This is used to store information like
215 // some of the instruction bits.
217 // Instruction template type.
219 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
220 unsigned int r_type_;
221 // Relocation addend.
222 int32_t reloc_addend_;
225 // Macro for generating code to stub types. One entry per long/short
229 DEF_STUB(long_branch_any_any) \
230 DEF_STUB(long_branch_v4t_arm_thumb) \
231 DEF_STUB(long_branch_thumb_only) \
232 DEF_STUB(long_branch_v4t_thumb_thumb) \
233 DEF_STUB(long_branch_v4t_thumb_arm) \
234 DEF_STUB(short_branch_v4t_thumb_arm) \
235 DEF_STUB(long_branch_any_arm_pic) \
236 DEF_STUB(long_branch_any_thumb_pic) \
237 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
238 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
239 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
240 DEF_STUB(long_branch_thumb_only_pic) \
241 DEF_STUB(a8_veneer_b_cond) \
242 DEF_STUB(a8_veneer_b) \
243 DEF_STUB(a8_veneer_bl) \
244 DEF_STUB(a8_veneer_blx) \
245 DEF_STUB(v4_veneer_bx)
249 #define DEF_STUB(x) arm_stub_##x,
255 // First reloc stub type.
256 arm_stub_reloc_first = arm_stub_long_branch_any_any,
257 // Last reloc stub type.
258 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
260 // First Cortex-A8 stub type.
261 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
262 // Last Cortex-A8 stub type.
263 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
266 arm_stub_type_last = arm_stub_v4_veneer_bx
270 // Stub template class. Templates are meant to be read-only objects.
271 // A stub template for a stub type contains all read-only attributes
272 // common to all stubs of the same type.
277 Stub_template(Stub_type, const Insn_template*, size_t);
285 { return this->type_; }
287 // Return an array of instruction templates.
290 { return this->insns_; }
292 // Return size of template in number of instructions.
295 { return this->insn_count_; }
297 // Return size of template in bytes.
300 { return this->size_; }
302 // Return alignment of the stub template.
305 { return this->alignment_; }
307 // Return whether entry point is in thumb mode.
309 entry_in_thumb_mode() const
310 { return this->entry_in_thumb_mode_; }
312 // Return number of relocations in this template.
315 { return this->relocs_.size(); }
317 // Return index of the I-th instruction with relocation.
319 reloc_insn_index(size_t i) const
321 gold_assert(i < this->relocs_.size());
322 return this->relocs_[i].first;
325 // Return the offset of the I-th instruction with relocation from the
326 // beginning of the stub.
328 reloc_offset(size_t i) const
330 gold_assert(i < this->relocs_.size());
331 return this->relocs_[i].second;
335 // This contains information about an instruction template with a relocation
336 // and its offset from start of stub.
337 typedef std::pair<size_t, section_size_type> Reloc;
339 // A Stub_template may not be copied. We want to share templates as much
341 Stub_template(const Stub_template&);
342 Stub_template& operator=(const Stub_template&);
346 // Points to an array of Insn_templates.
347 const Insn_template* insns_;
348 // Number of Insn_templates in insns_[].
350 // Size of templated instructions in bytes.
352 // Alignment of templated instructions.
354 // Flag to indicate if entry is in thumb mode.
355 bool entry_in_thumb_mode_;
356 // A table of reloc instruction indices and offsets. We can find these by
357 // looking at the instruction templates but we pre-compute and then stash
358 // them here for speed.
359 std::vector<Reloc> relocs_;
363 // A class for code stubs. This is a base class for different type of
364 // stubs used in the ARM target.
370 static const section_offset_type invalid_offset =
371 static_cast<section_offset_type>(-1);
374 Stub(const Stub_template* stub_template)
375 : stub_template_(stub_template), offset_(invalid_offset)
382 // Return the stub template.
384 stub_template() const
385 { return this->stub_template_; }
387 // Return offset of code stub from beginning of its containing stub table.
391 gold_assert(this->offset_ != invalid_offset);
392 return this->offset_;
395 // Set offset of code stub from beginning of its containing stub table.
397 set_offset(section_offset_type offset)
398 { this->offset_ = offset; }
400 // Return the relocation target address of the i-th relocation in the
401 // stub. This must be defined in a child class.
403 reloc_target(size_t i)
404 { return this->do_reloc_target(i); }
406 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
408 write(unsigned char* view, section_size_type view_size, bool big_endian)
409 { this->do_write(view, view_size, big_endian); }
411 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
412 // for the i-th instruction.
414 thumb16_special(size_t i)
415 { return this->do_thumb16_special(i); }
418 // This must be defined in the child class.
420 do_reloc_target(size_t) = 0;
422 // This may be overridden in the child class.
424 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
427 this->do_fixed_endian_write<true>(view, view_size);
429 this->do_fixed_endian_write<false>(view, view_size);
432 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
433 // instruction template.
435 do_thumb16_special(size_t)
436 { gold_unreachable(); }
439 // A template to implement do_write.
440 template<bool big_endian>
442 do_fixed_endian_write(unsigned char*, section_size_type);
445 const Stub_template* stub_template_;
446 // Offset within the section of containing this stub.
447 section_offset_type offset_;
450 // Reloc stub class. These are stubs we use to fix up relocation because
451 // of limited branch ranges.
453 class Reloc_stub : public Stub
456 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
457 // We assume we never jump to this address.
458 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
460 // Return destination address.
462 destination_address() const
464 gold_assert(this->destination_address_ != this->invalid_address);
465 return this->destination_address_;
468 // Set destination address.
470 set_destination_address(Arm_address address)
472 gold_assert(address != this->invalid_address);
473 this->destination_address_ = address;
476 // Reset destination address.
478 reset_destination_address()
479 { this->destination_address_ = this->invalid_address; }
481 // Determine stub type for a branch of a relocation of R_TYPE going
482 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
483 // the branch target is a thumb instruction. TARGET is used for look
484 // up ARM-specific linker settings.
486 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
487 Arm_address branch_target, bool target_is_thumb);
489 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
490 // and an addend. Since we treat global and local symbol differently, we
491 // use a Symbol object for a global symbol and a object-index pair for
496 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
497 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
498 // and R_SYM must not be invalid_index.
499 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
500 unsigned int r_sym, int32_t addend)
501 : stub_type_(stub_type), addend_(addend)
505 this->r_sym_ = Reloc_stub::invalid_index;
506 this->u_.symbol = symbol;
510 gold_assert(relobj != NULL && r_sym != invalid_index);
511 this->r_sym_ = r_sym;
512 this->u_.relobj = relobj;
519 // Accessors: Keys are meant to be read-only object so no modifiers are
525 { return this->stub_type_; }
527 // Return the local symbol index or invalid_index.
530 { return this->r_sym_; }
532 // Return the symbol if there is one.
535 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
537 // Return the relobj if there is one.
540 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
542 // Whether this equals to another key k.
544 eq(const Key& k) const
546 return ((this->stub_type_ == k.stub_type_)
547 && (this->r_sym_ == k.r_sym_)
548 && ((this->r_sym_ != Reloc_stub::invalid_index)
549 ? (this->u_.relobj == k.u_.relobj)
550 : (this->u_.symbol == k.u_.symbol))
551 && (this->addend_ == k.addend_));
554 // Return a hash value.
558 return (this->stub_type_
560 ^ gold::string_hash<char>(
561 (this->r_sym_ != Reloc_stub::invalid_index)
562 ? this->u_.relobj->name().c_str()
563 : this->u_.symbol->name())
567 // Functors for STL associative containers.
571 operator()(const Key& k) const
572 { return k.hash_value(); }
578 operator()(const Key& k1, const Key& k2) const
579 { return k1.eq(k2); }
582 // Name of key. This is mainly for debugging.
588 Stub_type stub_type_;
589 // If this is a local symbol, this is the index in the defining object.
590 // Otherwise, it is invalid_index for a global symbol.
592 // If r_sym_ is invalid index. This points to a global symbol.
593 // Otherwise, this points a relobj. We used the unsized and target
594 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
595 // Arm_relobj. This is done to avoid making the stub class a template
596 // as most of the stub machinery is endianity-neutral. However, it
597 // may require a bit of casting done by users of this class.
600 const Symbol* symbol;
601 const Relobj* relobj;
603 // Addend associated with a reloc.
608 // Reloc_stubs are created via a stub factory. So these are protected.
609 Reloc_stub(const Stub_template* stub_template)
610 : Stub(stub_template), destination_address_(invalid_address)
616 friend class Stub_factory;
618 // Return the relocation target address of the i-th relocation in the
621 do_reloc_target(size_t i)
623 // All reloc stub have only one relocation.
625 return this->destination_address_;
629 // Address of destination.
630 Arm_address destination_address_;
633 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
634 // THUMB branch that meets the following conditions:
636 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
637 // branch address is 0xffe.
638 // 2. The branch target address is in the same page as the first word of the
640 // 3. The branch follows a 32-bit instruction which is not a branch.
642 // To do the fix up, we need to store the address of the branch instruction
643 // and its target at least. We also need to store the original branch
644 // instruction bits for the condition code in a conditional branch. The
645 // condition code is used in a special instruction template. We also want
646 // to identify input sections needing Cortex-A8 workaround quickly. We store
647 // extra information about object and section index of the code section
648 // containing a branch being fixed up. The information is used to mark
649 // the code section when we finalize the Cortex-A8 stubs.
652 class Cortex_a8_stub : public Stub
658 // Return the object of the code section containing the branch being fixed
662 { return this->relobj_; }
664 // Return the section index of the code section containing the branch being
668 { return this->shndx_; }
670 // Return the source address of stub. This is the address of the original
671 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
674 source_address() const
675 { return this->source_address_; }
677 // Return the destination address of the stub. This is the branch taken
678 // address of the original branch instruction. LSB is 1 if it is a THUMB
679 // instruction address.
681 destination_address() const
682 { return this->destination_address_; }
684 // Return the instruction being fixed up.
686 original_insn() const
687 { return this->original_insn_; }
690 // Cortex_a8_stubs are created via a stub factory. So these are protected.
691 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
692 unsigned int shndx, Arm_address source_address,
693 Arm_address destination_address, uint32_t original_insn)
694 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
695 source_address_(source_address | 1U),
696 destination_address_(destination_address),
697 original_insn_(original_insn)
700 friend class Stub_factory;
702 // Return the relocation target address of the i-th relocation in the
705 do_reloc_target(size_t i)
707 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
709 // The conditional branch veneer has two relocations.
711 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
715 // All other Cortex-A8 stubs have only one relocation.
717 return this->destination_address_;
721 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
723 do_thumb16_special(size_t);
726 // Object of the code section containing the branch being fixed up.
728 // Section index of the code section containing the branch begin fixed up.
730 // Source address of original branch.
731 Arm_address source_address_;
732 // Destination address of the original branch.
733 Arm_address destination_address_;
734 // Original branch instruction. This is needed for copying the condition
735 // code from a condition branch to its stub.
736 uint32_t original_insn_;
739 // ARMv4 BX Rx branch relocation stub class.
740 class Arm_v4bx_stub : public Stub
746 // Return the associated register.
749 { return this->reg_; }
752 // Arm V4BX stubs are created via a stub factory. So these are protected.
753 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
754 : Stub(stub_template), reg_(reg)
757 friend class Stub_factory;
759 // Return the relocation target address of the i-th relocation in the
762 do_reloc_target(size_t)
763 { gold_unreachable(); }
765 // This may be overridden in the child class.
767 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
770 this->do_fixed_endian_v4bx_write<true>(view, view_size);
772 this->do_fixed_endian_v4bx_write<false>(view, view_size);
776 // A template to implement do_write.
777 template<bool big_endian>
779 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
781 const Insn_template* insns = this->stub_template()->insns();
782 elfcpp::Swap<32, big_endian>::writeval(view,
784 + (this->reg_ << 16)));
785 view += insns[0].size();
786 elfcpp::Swap<32, big_endian>::writeval(view,
787 (insns[1].data() + this->reg_));
788 view += insns[1].size();
789 elfcpp::Swap<32, big_endian>::writeval(view,
790 (insns[2].data() + this->reg_));
793 // A register index (r0-r14), which is associated with the stub.
797 // Stub factory class.
802 // Return the unique instance of this class.
803 static const Stub_factory&
806 static Stub_factory singleton;
810 // Make a relocation stub.
812 make_reloc_stub(Stub_type stub_type) const
814 gold_assert(stub_type >= arm_stub_reloc_first
815 && stub_type <= arm_stub_reloc_last);
816 return new Reloc_stub(this->stub_templates_[stub_type]);
819 // Make a Cortex-A8 stub.
821 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
822 Arm_address source, Arm_address destination,
823 uint32_t original_insn) const
825 gold_assert(stub_type >= arm_stub_cortex_a8_first
826 && stub_type <= arm_stub_cortex_a8_last);
827 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
828 source, destination, original_insn);
831 // Make an ARM V4BX relocation stub.
832 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
834 make_arm_v4bx_stub(uint32_t reg) const
836 gold_assert(reg < 0xf);
837 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
842 // Constructor and destructor are protected since we only return a single
843 // instance created in Stub_factory::get_instance().
847 // A Stub_factory may not be copied since it is a singleton.
848 Stub_factory(const Stub_factory&);
849 Stub_factory& operator=(Stub_factory&);
851 // Stub templates. These are initialized in the constructor.
852 const Stub_template* stub_templates_[arm_stub_type_last+1];
855 // A class to hold stubs for the ARM target.
857 template<bool big_endian>
858 class Stub_table : public Output_data
861 Stub_table(Arm_input_section<big_endian>* owner)
862 : Output_data(), owner_(owner), reloc_stubs_(), cortex_a8_stubs_(),
863 arm_v4bx_stubs_(0xf), prev_data_size_(0), prev_addralign_(1)
869 // Owner of this stub table.
870 Arm_input_section<big_endian>*
872 { return this->owner_; }
874 // Whether this stub table is empty.
878 return (this->reloc_stubs_.empty()
879 && this->cortex_a8_stubs_.empty()
880 && this->arm_v4bx_stubs_.empty());
883 // Return the current data size.
885 current_data_size() const
886 { return this->current_data_size_for_child(); }
888 // Add a STUB with using KEY. Caller is reponsible for avoid adding
889 // if already a STUB with the same key has been added.
891 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
893 const Stub_template* stub_template = stub->stub_template();
894 gold_assert(stub_template->type() == key.stub_type());
895 this->reloc_stubs_[key] = stub;
898 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
899 // Caller is reponsible for avoid adding if already a STUB with the same
900 // address has been added.
902 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
904 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
905 this->cortex_a8_stubs_.insert(value);
908 // Add an ARM V4BX relocation stub. A register index will be retrieved
911 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
913 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
914 this->arm_v4bx_stubs_[stub->reg()] = stub;
917 // Remove all Cortex-A8 stubs.
919 remove_all_cortex_a8_stubs();
921 // Look up a relocation stub using KEY. Return NULL if there is none.
923 find_reloc_stub(const Reloc_stub::Key& key) const
925 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
926 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
929 // Look up an arm v4bx relocation stub using the register index.
930 // Return NULL if there is none.
932 find_arm_v4bx_stub(const uint32_t reg) const
934 gold_assert(reg < 0xf);
935 return this->arm_v4bx_stubs_[reg];
938 // Relocate stubs in this stub table.
940 relocate_stubs(const Relocate_info<32, big_endian>*,
941 Target_arm<big_endian>*, Output_section*,
942 unsigned char*, Arm_address, section_size_type);
944 // Update data size and alignment at the end of a relaxation pass. Return
945 // true if either data size or alignment is different from that of the
946 // previous relaxation pass.
948 update_data_size_and_addralign();
950 // Finalize stubs. Set the offsets of all stubs and mark input sections
951 // needing the Cortex-A8 workaround.
955 // Apply Cortex-A8 workaround to an address range.
957 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
958 unsigned char*, Arm_address,
962 // Write out section contents.
964 do_write(Output_file*);
966 // Return the required alignment.
969 { return this->prev_addralign_; }
971 // Reset address and file offset.
973 do_reset_address_and_file_offset()
974 { this->set_current_data_size_for_child(this->prev_data_size_); }
976 // Set final data size.
978 set_final_data_size()
979 { this->set_data_size(this->current_data_size()); }
982 // Relocate one stub.
984 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
985 Target_arm<big_endian>*, Output_section*,
986 unsigned char*, Arm_address, section_size_type);
988 // Unordered map of relocation stubs.
990 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
991 Reloc_stub::Key::equal_to>
994 // List of Cortex-A8 stubs ordered by addresses of branches being
995 // fixed up in output.
996 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
997 // List of Arm V4BX relocation stubs ordered by associated registers.
998 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1000 // Owner of this stub table.
1001 Arm_input_section<big_endian>* owner_;
1002 // The relocation stubs.
1003 Reloc_stub_map reloc_stubs_;
1004 // The cortex_a8_stubs.
1005 Cortex_a8_stub_list cortex_a8_stubs_;
1006 // The Arm V4BX relocation stubs.
1007 Arm_v4bx_stub_list arm_v4bx_stubs_;
1008 // data size of this in the previous pass.
1009 off_t prev_data_size_;
1010 // address alignment of this in the previous pass.
1011 uint64_t prev_addralign_;
1014 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1015 // we add to the end of an EXIDX input section that goes into the output.
1017 class Arm_exidx_cantunwind : public Output_section_data
1020 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1021 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1024 // Return the object containing the section pointed by this.
1027 { return this->relobj_; }
1029 // Return the section index of the section pointed by this.
1032 { return this->shndx_; }
1036 do_write(Output_file* of)
1038 if (parameters->target().is_big_endian())
1039 this->do_fixed_endian_write<true>(of);
1041 this->do_fixed_endian_write<false>(of);
1045 // Implement do_write for a given endianity.
1046 template<bool big_endian>
1048 do_fixed_endian_write(Output_file*);
1050 // The object containing the section pointed by this.
1052 // The section index of the section pointed by this.
1053 unsigned int shndx_;
1056 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1057 // Offset map is used to map input section offset within the EXIDX section
1058 // to the output offset from the start of this EXIDX section.
1060 typedef std::map<section_offset_type, section_offset_type>
1061 Arm_exidx_section_offset_map;
1063 // Arm_exidx_merged_section class. This represents an EXIDX input section
1064 // with some of its entries merged.
1066 class Arm_exidx_merged_section : public Output_relaxed_input_section
1069 // Constructor for Arm_exidx_merged_section.
1070 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1071 // SECTION_OFFSET_MAP points to a section offset map describing how
1072 // parts of the input section are mapped to output. DELETED_BYTES is
1073 // the number of bytes deleted from the EXIDX input section.
1074 Arm_exidx_merged_section(
1075 const Arm_exidx_input_section& exidx_input_section,
1076 const Arm_exidx_section_offset_map& section_offset_map,
1077 uint32_t deleted_bytes);
1079 // Return the original EXIDX input section.
1080 const Arm_exidx_input_section&
1081 exidx_input_section() const
1082 { return this->exidx_input_section_; }
1084 // Return the section offset map.
1085 const Arm_exidx_section_offset_map&
1086 section_offset_map() const
1087 { return this->section_offset_map_; }
1090 // Write merged section into file OF.
1092 do_write(Output_file* of);
1095 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1096 section_offset_type*) const;
1099 // Original EXIDX input section.
1100 const Arm_exidx_input_section& exidx_input_section_;
1101 // Section offset map.
1102 const Arm_exidx_section_offset_map& section_offset_map_;
1105 // A class to wrap an ordinary input section containing executable code.
1107 template<bool big_endian>
1108 class Arm_input_section : public Output_relaxed_input_section
1111 Arm_input_section(Relobj* relobj, unsigned int shndx)
1112 : Output_relaxed_input_section(relobj, shndx, 1),
1113 original_addralign_(1), original_size_(0), stub_table_(NULL)
1116 ~Arm_input_section()
1123 // Whether this is a stub table owner.
1125 is_stub_table_owner() const
1126 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1128 // Return the stub table.
1129 Stub_table<big_endian>*
1131 { return this->stub_table_; }
1133 // Set the stub_table.
1135 set_stub_table(Stub_table<big_endian>* stub_table)
1136 { this->stub_table_ = stub_table; }
1138 // Downcast a base pointer to an Arm_input_section pointer. This is
1139 // not type-safe but we only use Arm_input_section not the base class.
1140 static Arm_input_section<big_endian>*
1141 as_arm_input_section(Output_relaxed_input_section* poris)
1142 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1145 // Write data to output file.
1147 do_write(Output_file*);
1149 // Return required alignment of this.
1151 do_addralign() const
1153 if (this->is_stub_table_owner())
1154 return std::max(this->stub_table_->addralign(),
1155 this->original_addralign_);
1157 return this->original_addralign_;
1160 // Finalize data size.
1162 set_final_data_size();
1164 // Reset address and file offset.
1166 do_reset_address_and_file_offset();
1170 do_output_offset(const Relobj* object, unsigned int shndx,
1171 section_offset_type offset,
1172 section_offset_type* poutput) const
1174 if ((object == this->relobj())
1175 && (shndx == this->shndx())
1177 && (convert_types<uint64_t, section_offset_type>(offset)
1178 <= this->original_size_))
1188 // Copying is not allowed.
1189 Arm_input_section(const Arm_input_section&);
1190 Arm_input_section& operator=(const Arm_input_section&);
1192 // Address alignment of the original input section.
1193 uint64_t original_addralign_;
1194 // Section size of the original input section.
1195 uint64_t original_size_;
1197 Stub_table<big_endian>* stub_table_;
1200 // Arm_exidx_fixup class. This is used to define a number of methods
1201 // and keep states for fixing up EXIDX coverage.
1203 class Arm_exidx_fixup
1206 Arm_exidx_fixup(Output_section* exidx_output_section)
1207 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1208 last_inlined_entry_(0), last_input_section_(NULL),
1209 section_offset_map_(NULL), first_output_text_section_(NULL)
1213 { delete this->section_offset_map_; }
1215 // Process an EXIDX section for entry merging. Return number of bytes to
1216 // be deleted in output. If parts of the input EXIDX section are merged
1217 // a heap allocated Arm_exidx_section_offset_map is store in the located
1218 // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for
1220 template<bool big_endian>
1222 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1223 Arm_exidx_section_offset_map** psection_offset_map);
1225 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1226 // input section, if there is not one already.
1228 add_exidx_cantunwind_as_needed();
1230 // Return the output section for the text section which is linked to the
1231 // first exidx input in output.
1233 first_output_text_section() const
1234 { return this->first_output_text_section_; }
1237 // Copying is not allowed.
1238 Arm_exidx_fixup(const Arm_exidx_fixup&);
1239 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1241 // Type of EXIDX unwind entry.
1246 // EXIDX_CANTUNWIND.
1247 UT_EXIDX_CANTUNWIND,
1254 // Process an EXIDX entry. We only care about the second word of the
1255 // entry. Return true if the entry can be deleted.
1257 process_exidx_entry(uint32_t second_word);
1259 // Update the current section offset map during EXIDX section fix-up.
1260 // If there is no map, create one. INPUT_OFFSET is the offset of a
1261 // reference point, DELETED_BYTES is the number of deleted by in the
1262 // section so far. If DELETE_ENTRY is true, the reference point and
1263 // all offsets after the previous reference point are discarded.
1265 update_offset_map(section_offset_type input_offset,
1266 section_size_type deleted_bytes, bool delete_entry);
1268 // EXIDX output section.
1269 Output_section* exidx_output_section_;
1270 // Unwind type of the last EXIDX entry processed.
1271 Unwind_type last_unwind_type_;
1272 // Last seen inlined EXIDX entry.
1273 uint32_t last_inlined_entry_;
1274 // Last processed EXIDX input section.
1275 const Arm_exidx_input_section* last_input_section_;
1276 // Section offset map created in process_exidx_section.
1277 Arm_exidx_section_offset_map* section_offset_map_;
1278 // Output section for the text section which is linked to the first exidx
1280 Output_section* first_output_text_section_;
1283 // Arm output section class. This is defined mainly to add a number of
1284 // stub generation methods.
1286 template<bool big_endian>
1287 class Arm_output_section : public Output_section
1290 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1292 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1293 elfcpp::Elf_Xword flags)
1294 : Output_section(name, type, flags)
1297 ~Arm_output_section()
1300 // Group input sections for stub generation.
1302 group_sections(section_size_type, bool, Target_arm<big_endian>*);
1304 // Downcast a base pointer to an Arm_output_section pointer. This is
1305 // not type-safe but we only use Arm_output_section not the base class.
1306 static Arm_output_section<big_endian>*
1307 as_arm_output_section(Output_section* os)
1308 { return static_cast<Arm_output_section<big_endian>*>(os); }
1310 // Append all input text sections in this into LIST.
1312 append_text_sections_to_list(Text_section_list* list);
1314 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1315 // is a list of text input sections sorted in ascending order of their
1316 // output addresses.
1318 fix_exidx_coverage(const Text_section_list& sorted_text_section,
1319 Symbol_table* symtab);
1323 typedef Output_section::Input_section Input_section;
1324 typedef Output_section::Input_section_list Input_section_list;
1326 // Create a stub group.
1327 void create_stub_group(Input_section_list::const_iterator,
1328 Input_section_list::const_iterator,
1329 Input_section_list::const_iterator,
1330 Target_arm<big_endian>*,
1331 std::vector<Output_relaxed_input_section*>*);
1334 // Arm_exidx_input_section class. This represents an EXIDX input section.
1336 class Arm_exidx_input_section
1339 static const section_offset_type invalid_offset =
1340 static_cast<section_offset_type>(-1);
1342 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1343 unsigned int link, uint32_t size, uint32_t addralign)
1344 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1345 addralign_(addralign)
1348 ~Arm_exidx_input_section()
1351 // Accessors: This is a read-only class.
1353 // Return the object containing this EXIDX input section.
1356 { return this->relobj_; }
1358 // Return the section index of this EXIDX input section.
1361 { return this->shndx_; }
1363 // Return the section index of linked text section in the same object.
1366 { return this->link_; }
1368 // Return size of the EXIDX input section.
1371 { return this->size_; }
1373 // Reutnr address alignment of EXIDX input section.
1376 { return this->addralign_; }
1379 // Object containing this.
1381 // Section index of this.
1382 unsigned int shndx_;
1383 // text section linked to this in the same object.
1385 // Size of this. For ARM 32-bit is sufficient.
1387 // Address alignment of this. For ARM 32-bit is sufficient.
1388 uint32_t addralign_;
1391 // Arm_relobj class.
1393 template<bool big_endian>
1394 class Arm_relobj : public Sized_relobj<32, big_endian>
1397 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1399 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1400 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1401 : Sized_relobj<32, big_endian>(name, input_file, offset, ehdr),
1402 stub_tables_(), local_symbol_is_thumb_function_(),
1403 attributes_section_data_(NULL), mapping_symbols_info_(),
1404 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1405 output_local_symbol_count_needs_update_(false)
1409 { delete this->attributes_section_data_; }
1411 // Return the stub table of the SHNDX-th section if there is one.
1412 Stub_table<big_endian>*
1413 stub_table(unsigned int shndx) const
1415 gold_assert(shndx < this->stub_tables_.size());
1416 return this->stub_tables_[shndx];
1419 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1421 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1423 gold_assert(shndx < this->stub_tables_.size());
1424 this->stub_tables_[shndx] = stub_table;
1427 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1428 // index. This is only valid after do_count_local_symbol is called.
1430 local_symbol_is_thumb_function(unsigned int r_sym) const
1432 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1433 return this->local_symbol_is_thumb_function_[r_sym];
1436 // Scan all relocation sections for stub generation.
1438 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1441 // Convert regular input section with index SHNDX to a relaxed section.
1443 convert_input_section_to_relaxed_section(unsigned shndx)
1445 // The stubs have relocations and we need to process them after writing
1446 // out the stubs. So relocation now must follow section write.
1447 this->set_section_offset(shndx, -1ULL);
1448 this->set_relocs_must_follow_section_writes();
1451 // Downcast a base pointer to an Arm_relobj pointer. This is
1452 // not type-safe but we only use Arm_relobj not the base class.
1453 static Arm_relobj<big_endian>*
1454 as_arm_relobj(Relobj* relobj)
1455 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1457 // Processor-specific flags in ELF file header. This is valid only after
1460 processor_specific_flags() const
1461 { return this->processor_specific_flags_; }
1463 // Attribute section data This is the contents of the .ARM.attribute section
1465 const Attributes_section_data*
1466 attributes_section_data() const
1467 { return this->attributes_section_data_; }
1469 // Mapping symbol location.
1470 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1472 // Functor for STL container.
1473 struct Mapping_symbol_position_less
1476 operator()(const Mapping_symbol_position& p1,
1477 const Mapping_symbol_position& p2) const
1479 return (p1.first < p2.first
1480 || (p1.first == p2.first && p1.second < p2.second));
1484 // We only care about the first character of a mapping symbol, so
1485 // we only store that instead of the whole symbol name.
1486 typedef std::map<Mapping_symbol_position, char,
1487 Mapping_symbol_position_less> Mapping_symbols_info;
1489 // Whether a section contains any Cortex-A8 workaround.
1491 section_has_cortex_a8_workaround(unsigned int shndx) const
1493 return (this->section_has_cortex_a8_workaround_ != NULL
1494 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1497 // Mark a section that has Cortex-A8 workaround.
1499 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1501 if (this->section_has_cortex_a8_workaround_ == NULL)
1502 this->section_has_cortex_a8_workaround_ =
1503 new std::vector<bool>(this->shnum(), false);
1504 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1507 // Return the EXIDX section of an text section with index SHNDX or NULL
1508 // if the text section has no associated EXIDX section.
1509 const Arm_exidx_input_section*
1510 exidx_input_section_by_link(unsigned int shndx) const
1512 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1513 return ((p != this->exidx_section_map_.end()
1514 && p->second->link() == shndx)
1519 // Return the EXIDX section with index SHNDX or NULL if there is none.
1520 const Arm_exidx_input_section*
1521 exidx_input_section_by_shndx(unsigned shndx) const
1523 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1524 return ((p != this->exidx_section_map_.end()
1525 && p->second->shndx() == shndx)
1530 // Whether output local symbol count needs updating.
1532 output_local_symbol_count_needs_update() const
1533 { return this->output_local_symbol_count_needs_update_; }
1535 // Set output_local_symbol_count_needs_update flag to be true.
1537 set_output_local_symbol_count_needs_update()
1538 { this->output_local_symbol_count_needs_update_ = true; }
1540 // Update output local symbol count at the end of relaxation.
1542 update_output_local_symbol_count();
1545 // Post constructor setup.
1549 // Call parent's setup method.
1550 Sized_relobj<32, big_endian>::do_setup();
1552 // Initialize look-up tables.
1553 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1554 this->stub_tables_.swap(empty_stub_table_list);
1557 // Count the local symbols.
1559 do_count_local_symbols(Stringpool_template<char>*,
1560 Stringpool_template<char>*);
1563 do_relocate_sections(const Symbol_table* symtab, const Layout* layout,
1564 const unsigned char* pshdrs,
1565 typename Sized_relobj<32, big_endian>::Views* pivews);
1567 // Read the symbol information.
1569 do_read_symbols(Read_symbols_data* sd);
1571 // Process relocs for garbage collection.
1573 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1577 // Whether a section needs to be scanned for relocation stubs.
1579 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1580 const Relobj::Output_sections&,
1581 const Symbol_table *, const unsigned char*);
1583 // Whether a section is a scannable text section.
1585 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1586 const Output_section*, const Symbol_table *);
1588 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1590 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1591 unsigned int, Output_section*,
1592 const Symbol_table *);
1594 // Scan a section for the Cortex-A8 erratum.
1596 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1597 unsigned int, Output_section*,
1598 Target_arm<big_endian>*);
1600 // Make a new Arm_exidx_input_section object for EXIDX section with
1601 // index SHNDX and section header SHDR.
1603 make_exidx_input_section(unsigned int shndx,
1604 const elfcpp::Shdr<32, big_endian>& shdr);
1606 // Return the output address of either a plain input section or a
1607 // relaxed input section. SHNDX is the section index.
1609 simple_input_section_output_address(unsigned int, Output_section*);
1611 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1612 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1615 // List of stub tables.
1616 Stub_table_list stub_tables_;
1617 // Bit vector to tell if a local symbol is a thumb function or not.
1618 // This is only valid after do_count_local_symbol is called.
1619 std::vector<bool> local_symbol_is_thumb_function_;
1620 // processor-specific flags in ELF file header.
1621 elfcpp::Elf_Word processor_specific_flags_;
1622 // Object attributes if there is an .ARM.attributes section or NULL.
1623 Attributes_section_data* attributes_section_data_;
1624 // Mapping symbols information.
1625 Mapping_symbols_info mapping_symbols_info_;
1626 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1627 std::vector<bool>* section_has_cortex_a8_workaround_;
1628 // Map a text section to its associated .ARM.exidx section, if there is one.
1629 Exidx_section_map exidx_section_map_;
1630 // Whether output local symbol count needs updating.
1631 bool output_local_symbol_count_needs_update_;
1634 // Arm_dynobj class.
1636 template<bool big_endian>
1637 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1640 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1641 const elfcpp::Ehdr<32, big_endian>& ehdr)
1642 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1643 processor_specific_flags_(0), attributes_section_data_(NULL)
1647 { delete this->attributes_section_data_; }
1649 // Downcast a base pointer to an Arm_relobj pointer. This is
1650 // not type-safe but we only use Arm_relobj not the base class.
1651 static Arm_dynobj<big_endian>*
1652 as_arm_dynobj(Dynobj* dynobj)
1653 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1655 // Processor-specific flags in ELF file header. This is valid only after
1658 processor_specific_flags() const
1659 { return this->processor_specific_flags_; }
1661 // Attributes section data.
1662 const Attributes_section_data*
1663 attributes_section_data() const
1664 { return this->attributes_section_data_; }
1667 // Read the symbol information.
1669 do_read_symbols(Read_symbols_data* sd);
1672 // processor-specific flags in ELF file header.
1673 elfcpp::Elf_Word processor_specific_flags_;
1674 // Object attributes if there is an .ARM.attributes section or NULL.
1675 Attributes_section_data* attributes_section_data_;
1678 // Functor to read reloc addends during stub generation.
1680 template<int sh_type, bool big_endian>
1681 struct Stub_addend_reader
1683 // Return the addend for a relocation of a particular type. Depending
1684 // on whether this is a REL or RELA relocation, read the addend from a
1685 // view or from a Reloc object.
1686 elfcpp::Elf_types<32>::Elf_Swxword
1688 unsigned int /* r_type */,
1689 const unsigned char* /* view */,
1690 const typename Reloc_types<sh_type,
1691 32, big_endian>::Reloc& /* reloc */) const;
1694 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1696 template<bool big_endian>
1697 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1699 elfcpp::Elf_types<32>::Elf_Swxword
1702 const unsigned char*,
1703 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1706 // Specialized Stub_addend_reader for RELA type relocation sections.
1707 // We currently do not handle RELA type relocation sections but it is trivial
1708 // to implement the addend reader. This is provided for completeness and to
1709 // make it easier to add support for RELA relocation sections in the future.
1711 template<bool big_endian>
1712 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1714 elfcpp::Elf_types<32>::Elf_Swxword
1717 const unsigned char*,
1718 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1719 big_endian>::Reloc& reloc) const
1720 { return reloc.get_r_addend(); }
1723 // Cortex_a8_reloc class. We keep record of relocation that may need
1724 // the Cortex-A8 erratum workaround.
1726 class Cortex_a8_reloc
1729 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1730 Arm_address destination)
1731 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1737 // Accessors: This is a read-only class.
1739 // Return the relocation stub associated with this relocation if there is
1743 { return this->reloc_stub_; }
1745 // Return the relocation type.
1748 { return this->r_type_; }
1750 // Return the destination address of the relocation. LSB stores the THUMB
1754 { return this->destination_; }
1757 // Associated relocation stub if there is one, or NULL.
1758 const Reloc_stub* reloc_stub_;
1760 unsigned int r_type_;
1761 // Destination address of this relocation. LSB is used to distinguish
1763 Arm_address destination_;
1766 // Utilities for manipulating integers of up to 32-bits
1770 // Sign extend an n-bit unsigned integer stored in an uint32_t into
1771 // an int32_t. NO_BITS must be between 1 to 32.
1772 template<int no_bits>
1773 static inline int32_t
1774 sign_extend(uint32_t bits)
1776 gold_assert(no_bits >= 0 && no_bits <= 32);
1778 return static_cast<int32_t>(bits);
1779 uint32_t mask = (~((uint32_t) 0)) >> (32 - no_bits);
1781 uint32_t top_bit = 1U << (no_bits - 1);
1782 int32_t as_signed = static_cast<int32_t>(bits);
1783 return (bits & top_bit) ? as_signed + (-top_bit * 2) : as_signed;
1786 // Detects overflow of an NO_BITS integer stored in a uint32_t.
1787 template<int no_bits>
1789 has_overflow(uint32_t bits)
1791 gold_assert(no_bits >= 0 && no_bits <= 32);
1794 int32_t max = (1 << (no_bits - 1)) - 1;
1795 int32_t min = -(1 << (no_bits - 1));
1796 int32_t as_signed = static_cast<int32_t>(bits);
1797 return as_signed > max || as_signed < min;
1800 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
1801 // fits in the given number of bits as either a signed or unsigned value.
1802 // For example, has_signed_unsigned_overflow<8> would check
1803 // -128 <= bits <= 255
1804 template<int no_bits>
1806 has_signed_unsigned_overflow(uint32_t bits)
1808 gold_assert(no_bits >= 2 && no_bits <= 32);
1811 int32_t max = static_cast<int32_t>((1U << no_bits) - 1);
1812 int32_t min = -(1 << (no_bits - 1));
1813 int32_t as_signed = static_cast<int32_t>(bits);
1814 return as_signed > max || as_signed < min;
1817 // Select bits from A and B using bits in MASK. For each n in [0..31],
1818 // the n-th bit in the result is chosen from the n-th bits of A and B.
1819 // A zero selects A and a one selects B.
1820 static inline uint32_t
1821 bit_select(uint32_t a, uint32_t b, uint32_t mask)
1822 { return (a & ~mask) | (b & mask); }
1825 template<bool big_endian>
1826 class Target_arm : public Sized_target<32, big_endian>
1829 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
1832 // When were are relocating a stub, we pass this as the relocation number.
1833 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
1836 : Sized_target<32, big_endian>(&arm_info),
1837 got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL),
1838 copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL), stub_tables_(),
1839 stub_factory_(Stub_factory::get_instance()), may_use_blx_(false),
1840 should_force_pic_veneer_(false), arm_input_section_map_(),
1841 attributes_section_data_(NULL), fix_cortex_a8_(false),
1842 cortex_a8_relocs_info_()
1845 // Whether we can use BLX.
1848 { return this->may_use_blx_; }
1850 // Set use-BLX flag.
1852 set_may_use_blx(bool value)
1853 { this->may_use_blx_ = value; }
1855 // Whether we force PCI branch veneers.
1857 should_force_pic_veneer() const
1858 { return this->should_force_pic_veneer_; }
1860 // Set PIC veneer flag.
1862 set_should_force_pic_veneer(bool value)
1863 { this->should_force_pic_veneer_ = value; }
1865 // Whether we use THUMB-2 instructions.
1867 using_thumb2() const
1869 Object_attribute* attr =
1870 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1871 int arch = attr->int_value();
1872 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
1875 // Whether we use THUMB/THUMB-2 instructions only.
1877 using_thumb_only() const
1879 Object_attribute* attr =
1880 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1881 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
1882 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
1884 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
1885 return attr->int_value() == 'M';
1888 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
1890 may_use_arm_nop() const
1892 Object_attribute* attr =
1893 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1894 int arch = attr->int_value();
1895 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1896 || arch == elfcpp::TAG_CPU_ARCH_V6K
1897 || arch == elfcpp::TAG_CPU_ARCH_V7
1898 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1901 // Whether we have THUMB-2 NOP.W instruction.
1903 may_use_thumb2_nop() const
1905 Object_attribute* attr =
1906 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1907 int arch = attr->int_value();
1908 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1909 || arch == elfcpp::TAG_CPU_ARCH_V7
1910 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1913 // Process the relocations to determine unreferenced sections for
1914 // garbage collection.
1916 gc_process_relocs(Symbol_table* symtab,
1918 Sized_relobj<32, big_endian>* object,
1919 unsigned int data_shndx,
1920 unsigned int sh_type,
1921 const unsigned char* prelocs,
1923 Output_section* output_section,
1924 bool needs_special_offset_handling,
1925 size_t local_symbol_count,
1926 const unsigned char* plocal_symbols);
1928 // Scan the relocations to look for symbol adjustments.
1930 scan_relocs(Symbol_table* symtab,
1932 Sized_relobj<32, big_endian>* object,
1933 unsigned int data_shndx,
1934 unsigned int sh_type,
1935 const unsigned char* prelocs,
1937 Output_section* output_section,
1938 bool needs_special_offset_handling,
1939 size_t local_symbol_count,
1940 const unsigned char* plocal_symbols);
1942 // Finalize the sections.
1944 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
1946 // Return the value to use for a dynamic symbol which requires special
1949 do_dynsym_value(const Symbol*) const;
1951 // Relocate a section.
1953 relocate_section(const Relocate_info<32, big_endian>*,
1954 unsigned int sh_type,
1955 const unsigned char* prelocs,
1957 Output_section* output_section,
1958 bool needs_special_offset_handling,
1959 unsigned char* view,
1960 Arm_address view_address,
1961 section_size_type view_size,
1962 const Reloc_symbol_changes*);
1964 // Scan the relocs during a relocatable link.
1966 scan_relocatable_relocs(Symbol_table* symtab,
1968 Sized_relobj<32, big_endian>* object,
1969 unsigned int data_shndx,
1970 unsigned int sh_type,
1971 const unsigned char* prelocs,
1973 Output_section* output_section,
1974 bool needs_special_offset_handling,
1975 size_t local_symbol_count,
1976 const unsigned char* plocal_symbols,
1977 Relocatable_relocs*);
1979 // Relocate a section during a relocatable link.
1981 relocate_for_relocatable(const Relocate_info<32, big_endian>*,
1982 unsigned int sh_type,
1983 const unsigned char* prelocs,
1985 Output_section* output_section,
1986 off_t offset_in_output_section,
1987 const Relocatable_relocs*,
1988 unsigned char* view,
1989 Arm_address view_address,
1990 section_size_type view_size,
1991 unsigned char* reloc_view,
1992 section_size_type reloc_view_size);
1994 // Return whether SYM is defined by the ABI.
1996 do_is_defined_by_abi(Symbol* sym) const
1997 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
1999 // Return the size of the GOT section.
2003 gold_assert(this->got_ != NULL);
2004 return this->got_->data_size();
2007 // Map platform-specific reloc types
2009 get_real_reloc_type (unsigned int r_type);
2012 // Methods to support stub-generations.
2015 // Return the stub factory
2017 stub_factory() const
2018 { return this->stub_factory_; }
2020 // Make a new Arm_input_section object.
2021 Arm_input_section<big_endian>*
2022 new_arm_input_section(Relobj*, unsigned int);
2024 // Find the Arm_input_section object corresponding to the SHNDX-th input
2025 // section of RELOBJ.
2026 Arm_input_section<big_endian>*
2027 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2029 // Make a new Stub_table
2030 Stub_table<big_endian>*
2031 new_stub_table(Arm_input_section<big_endian>*);
2033 // Scan a section for stub generation.
2035 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2036 const unsigned char*, size_t, Output_section*,
2037 bool, const unsigned char*, Arm_address,
2042 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2043 Output_section*, unsigned char*, Arm_address,
2046 // Get the default ARM target.
2047 static Target_arm<big_endian>*
2050 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2051 && parameters->target().is_big_endian() == big_endian);
2052 return static_cast<Target_arm<big_endian>*>(
2053 parameters->sized_target<32, big_endian>());
2056 // Whether NAME belongs to a mapping symbol.
2058 is_mapping_symbol_name(const char* name)
2062 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2063 && (name[2] == '\0' || name[2] == '.'));
2066 // Whether we work around the Cortex-A8 erratum.
2068 fix_cortex_a8() const
2069 { return this->fix_cortex_a8_; }
2071 // Whether we fix R_ARM_V4BX relocation.
2073 // 1 - replace with MOV instruction (armv4 target)
2074 // 2 - make interworking veneer (>= armv4t targets only)
2075 General_options::Fix_v4bx
2077 { return parameters->options().fix_v4bx(); }
2079 // Scan a span of THUMB code section for Cortex-A8 erratum.
2081 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2082 section_size_type, section_size_type,
2083 const unsigned char*, Arm_address);
2085 // Apply Cortex-A8 workaround to a branch.
2087 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2088 unsigned char*, Arm_address);
2091 // Make an ELF object.
2093 do_make_elf_object(const std::string&, Input_file*, off_t,
2094 const elfcpp::Ehdr<32, big_endian>& ehdr);
2097 do_make_elf_object(const std::string&, Input_file*, off_t,
2098 const elfcpp::Ehdr<32, !big_endian>&)
2099 { gold_unreachable(); }
2102 do_make_elf_object(const std::string&, Input_file*, off_t,
2103 const elfcpp::Ehdr<64, false>&)
2104 { gold_unreachable(); }
2107 do_make_elf_object(const std::string&, Input_file*, off_t,
2108 const elfcpp::Ehdr<64, true>&)
2109 { gold_unreachable(); }
2111 // Make an output section.
2113 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2114 elfcpp::Elf_Xword flags)
2115 { return new Arm_output_section<big_endian>(name, type, flags); }
2118 do_adjust_elf_header(unsigned char* view, int len) const;
2120 // We only need to generate stubs, and hence perform relaxation if we are
2121 // not doing relocatable linking.
2123 do_may_relax() const
2124 { return !parameters->options().relocatable(); }
2127 do_relax(int, const Input_objects*, Symbol_table*, Layout*);
2129 // Determine whether an object attribute tag takes an integer, a
2132 do_attribute_arg_type(int tag) const;
2134 // Reorder tags during output.
2136 do_attributes_order(int num) const;
2138 // This is called when the target is selected as the default.
2140 do_select_as_default_target()
2142 // No locking is required since there should only be one default target.
2143 // We cannot have both the big-endian and little-endian ARM targets
2145 gold_assert(arm_reloc_property_table == NULL);
2146 arm_reloc_property_table = new Arm_reloc_property_table();
2150 // The class which scans relocations.
2155 : issued_non_pic_error_(false)
2159 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2160 Sized_relobj<32, big_endian>* object,
2161 unsigned int data_shndx,
2162 Output_section* output_section,
2163 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2164 const elfcpp::Sym<32, big_endian>& lsym);
2167 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2168 Sized_relobj<32, big_endian>* object,
2169 unsigned int data_shndx,
2170 Output_section* output_section,
2171 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2176 unsupported_reloc_local(Sized_relobj<32, big_endian>*,
2177 unsigned int r_type);
2180 unsupported_reloc_global(Sized_relobj<32, big_endian>*,
2181 unsigned int r_type, Symbol*);
2184 check_non_pic(Relobj*, unsigned int r_type);
2186 // Almost identical to Symbol::needs_plt_entry except that it also
2187 // handles STT_ARM_TFUNC.
2189 symbol_needs_plt_entry(const Symbol* sym)
2191 // An undefined symbol from an executable does not need a PLT entry.
2192 if (sym->is_undefined() && !parameters->options().shared())
2195 return (!parameters->doing_static_link()
2196 && (sym->type() == elfcpp::STT_FUNC
2197 || sym->type() == elfcpp::STT_ARM_TFUNC)
2198 && (sym->is_from_dynobj()
2199 || sym->is_undefined()
2200 || sym->is_preemptible()));
2203 // Whether we have issued an error about a non-PIC compilation.
2204 bool issued_non_pic_error_;
2207 // The class which implements relocation.
2217 // Return whether the static relocation needs to be applied.
2219 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2222 Output_section* output_section);
2224 // Do a relocation. Return false if the caller should not issue
2225 // any warnings about this relocation.
2227 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2228 Output_section*, size_t relnum,
2229 const elfcpp::Rel<32, big_endian>&,
2230 unsigned int r_type, const Sized_symbol<32>*,
2231 const Symbol_value<32>*,
2232 unsigned char*, Arm_address,
2235 // Return whether we want to pass flag NON_PIC_REF for this
2236 // reloc. This means the relocation type accesses a symbol not via
2239 reloc_is_non_pic (unsigned int r_type)
2243 // These relocation types reference GOT or PLT entries explicitly.
2244 case elfcpp::R_ARM_GOT_BREL:
2245 case elfcpp::R_ARM_GOT_ABS:
2246 case elfcpp::R_ARM_GOT_PREL:
2247 case elfcpp::R_ARM_GOT_BREL12:
2248 case elfcpp::R_ARM_PLT32_ABS:
2249 case elfcpp::R_ARM_TLS_GD32:
2250 case elfcpp::R_ARM_TLS_LDM32:
2251 case elfcpp::R_ARM_TLS_IE32:
2252 case elfcpp::R_ARM_TLS_IE12GP:
2254 // These relocate types may use PLT entries.
2255 case elfcpp::R_ARM_CALL:
2256 case elfcpp::R_ARM_THM_CALL:
2257 case elfcpp::R_ARM_JUMP24:
2258 case elfcpp::R_ARM_THM_JUMP24:
2259 case elfcpp::R_ARM_THM_JUMP19:
2260 case elfcpp::R_ARM_PLT32:
2261 case elfcpp::R_ARM_THM_XPC22:
2270 // A class which returns the size required for a relocation type,
2271 // used while scanning relocs during a relocatable link.
2272 class Relocatable_size_for_reloc
2276 get_size_for_reloc(unsigned int, Relobj*);
2279 // Get the GOT section, creating it if necessary.
2280 Output_data_got<32, big_endian>*
2281 got_section(Symbol_table*, Layout*);
2283 // Get the GOT PLT section.
2285 got_plt_section() const
2287 gold_assert(this->got_plt_ != NULL);
2288 return this->got_plt_;
2291 // Create a PLT entry for a global symbol.
2293 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2295 // Get the PLT section.
2296 const Output_data_plt_arm<big_endian>*
2299 gold_assert(this->plt_ != NULL);
2303 // Get the dynamic reloc section, creating it if necessary.
2305 rel_dyn_section(Layout*);
2307 // Return true if the symbol may need a COPY relocation.
2308 // References from an executable object to non-function symbols
2309 // defined in a dynamic object may need a COPY relocation.
2311 may_need_copy_reloc(Symbol* gsym)
2313 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2314 && gsym->may_need_copy_reloc());
2317 // Add a potential copy relocation.
2319 copy_reloc(Symbol_table* symtab, Layout* layout,
2320 Sized_relobj<32, big_endian>* object,
2321 unsigned int shndx, Output_section* output_section,
2322 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2324 this->copy_relocs_.copy_reloc(symtab, layout,
2325 symtab->get_sized_symbol<32>(sym),
2326 object, shndx, output_section, reloc,
2327 this->rel_dyn_section(layout));
2330 // Whether two EABI versions are compatible.
2332 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2334 // Merge processor-specific flags from input object and those in the ELF
2335 // header of the output.
2337 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2339 // Get the secondary compatible architecture.
2341 get_secondary_compatible_arch(const Attributes_section_data*);
2343 // Set the secondary compatible architecture.
2345 set_secondary_compatible_arch(Attributes_section_data*, int);
2348 tag_cpu_arch_combine(const char*, int, int*, int, int);
2350 // Helper to print AEABI enum tag value.
2352 aeabi_enum_name(unsigned int);
2354 // Return string value for TAG_CPU_name.
2356 tag_cpu_name_value(unsigned int);
2358 // Merge object attributes from input object and those in the output.
2360 merge_object_attributes(const char*, const Attributes_section_data*);
2362 // Helper to get an AEABI object attribute
2364 get_aeabi_object_attribute(int tag) const
2366 Attributes_section_data* pasd = this->attributes_section_data_;
2367 gold_assert(pasd != NULL);
2368 Object_attribute* attr =
2369 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2370 gold_assert(attr != NULL);
2375 // Methods to support stub-generations.
2378 // Group input sections for stub generation.
2380 group_sections(Layout*, section_size_type, bool);
2382 // Scan a relocation for stub generation.
2384 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2385 const Sized_symbol<32>*, unsigned int,
2386 const Symbol_value<32>*,
2387 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2389 // Scan a relocation section for stub.
2390 template<int sh_type>
2392 scan_reloc_section_for_stubs(
2393 const Relocate_info<32, big_endian>* relinfo,
2394 const unsigned char* prelocs,
2396 Output_section* output_section,
2397 bool needs_special_offset_handling,
2398 const unsigned char* view,
2399 elfcpp::Elf_types<32>::Elf_Addr view_address,
2402 // Fix .ARM.exidx section coverage.
2404 fix_exidx_coverage(Layout*, Arm_output_section<big_endian>*, Symbol_table*);
2406 // Functors for STL set.
2407 struct output_section_address_less_than
2410 operator()(const Output_section* s1, const Output_section* s2) const
2411 { return s1->address() < s2->address(); }
2414 // Information about this specific target which we pass to the
2415 // general Target structure.
2416 static const Target::Target_info arm_info;
2418 // The types of GOT entries needed for this platform.
2421 GOT_TYPE_STANDARD = 0 // GOT entry for a regular symbol
2424 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2426 // Map input section to Arm_input_section.
2427 typedef Unordered_map<Section_id,
2428 Arm_input_section<big_endian>*,
2430 Arm_input_section_map;
2432 // Map output addresses to relocs for Cortex-A8 erratum.
2433 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2434 Cortex_a8_relocs_info;
2437 Output_data_got<32, big_endian>* got_;
2439 Output_data_plt_arm<big_endian>* plt_;
2440 // The GOT PLT section.
2441 Output_data_space* got_plt_;
2442 // The dynamic reloc section.
2443 Reloc_section* rel_dyn_;
2444 // Relocs saved to avoid a COPY reloc.
2445 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2446 // Space for variables copied with a COPY reloc.
2447 Output_data_space* dynbss_;
2448 // Vector of Stub_tables created.
2449 Stub_table_list stub_tables_;
2451 const Stub_factory &stub_factory_;
2452 // Whether we can use BLX.
2454 // Whether we force PIC branch veneers.
2455 bool should_force_pic_veneer_;
2456 // Map for locating Arm_input_sections.
2457 Arm_input_section_map arm_input_section_map_;
2458 // Attributes section data in output.
2459 Attributes_section_data* attributes_section_data_;
2460 // Whether we want to fix code for Cortex-A8 erratum.
2461 bool fix_cortex_a8_;
2462 // Map addresses to relocs for Cortex-A8 erratum.
2463 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2466 template<bool big_endian>
2467 const Target::Target_info Target_arm<big_endian>::arm_info =
2470 big_endian, // is_big_endian
2471 elfcpp::EM_ARM, // machine_code
2472 false, // has_make_symbol
2473 false, // has_resolve
2474 false, // has_code_fill
2475 true, // is_default_stack_executable
2477 "/usr/lib/libc.so.1", // dynamic_linker
2478 0x8000, // default_text_segment_address
2479 0x1000, // abi_pagesize (overridable by -z max-page-size)
2480 0x1000, // common_pagesize (overridable by -z common-page-size)
2481 elfcpp::SHN_UNDEF, // small_common_shndx
2482 elfcpp::SHN_UNDEF, // large_common_shndx
2483 0, // small_common_section_flags
2484 0, // large_common_section_flags
2485 ".ARM.attributes", // attributes_section
2486 "aeabi" // attributes_vendor
2489 // Arm relocate functions class
2492 template<bool big_endian>
2493 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
2498 STATUS_OKAY, // No error during relocation.
2499 STATUS_OVERFLOW, // Relocation oveflow.
2500 STATUS_BAD_RELOC // Relocation cannot be applied.
2504 typedef Relocate_functions<32, big_endian> Base;
2505 typedef Arm_relocate_functions<big_endian> This;
2507 // Encoding of imm16 argument for movt and movw ARM instructions
2510 // imm16 := imm4 | imm12
2512 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2513 // +-------+---------------+-------+-------+-----------------------+
2514 // | | |imm4 | |imm12 |
2515 // +-------+---------------+-------+-------+-----------------------+
2517 // Extract the relocation addend from VAL based on the ARM
2518 // instruction encoding described above.
2519 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2520 extract_arm_movw_movt_addend(
2521 typename elfcpp::Swap<32, big_endian>::Valtype val)
2523 // According to the Elf ABI for ARM Architecture the immediate
2524 // field is sign-extended to form the addend.
2525 return utils::sign_extend<16>(((val >> 4) & 0xf000) | (val & 0xfff));
2528 // Insert X into VAL based on the ARM instruction encoding described
2530 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2531 insert_val_arm_movw_movt(
2532 typename elfcpp::Swap<32, big_endian>::Valtype val,
2533 typename elfcpp::Swap<32, big_endian>::Valtype x)
2537 val |= (x & 0xf000) << 4;
2541 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2544 // imm16 := imm4 | i | imm3 | imm8
2546 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2547 // +---------+-+-----------+-------++-+-----+-------+---------------+
2548 // | |i| |imm4 || |imm3 | |imm8 |
2549 // +---------+-+-----------+-------++-+-----+-------+---------------+
2551 // Extract the relocation addend from VAL based on the Thumb2
2552 // instruction encoding described above.
2553 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2554 extract_thumb_movw_movt_addend(
2555 typename elfcpp::Swap<32, big_endian>::Valtype val)
2557 // According to the Elf ABI for ARM Architecture the immediate
2558 // field is sign-extended to form the addend.
2559 return utils::sign_extend<16>(((val >> 4) & 0xf000)
2560 | ((val >> 15) & 0x0800)
2561 | ((val >> 4) & 0x0700)
2565 // Insert X into VAL based on the Thumb2 instruction encoding
2567 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2568 insert_val_thumb_movw_movt(
2569 typename elfcpp::Swap<32, big_endian>::Valtype val,
2570 typename elfcpp::Swap<32, big_endian>::Valtype x)
2573 val |= (x & 0xf000) << 4;
2574 val |= (x & 0x0800) << 15;
2575 val |= (x & 0x0700) << 4;
2576 val |= (x & 0x00ff);
2580 // Calculate the smallest constant Kn for the specified residual.
2581 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2583 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
2589 // Determine the most significant bit in the residual and
2590 // align the resulting value to a 2-bit boundary.
2591 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
2593 // The desired shift is now (msb - 6), or zero, whichever
2595 return (((msb - 6) < 0) ? 0 : (msb - 6));
2598 // Calculate the final residual for the specified group index.
2599 // If the passed group index is less than zero, the method will return
2600 // the value of the specified residual without any change.
2601 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2602 static typename elfcpp::Swap<32, big_endian>::Valtype
2603 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2606 for (int n = 0; n <= group; n++)
2608 // Calculate which part of the value to mask.
2609 uint32_t shift = calc_grp_kn(residual);
2610 // Calculate the residual for the next time around.
2611 residual &= ~(residual & (0xff << shift));
2617 // Calculate the value of Gn for the specified group index.
2618 // We return it in the form of an encoded constant-and-rotation.
2619 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2620 static typename elfcpp::Swap<32, big_endian>::Valtype
2621 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2624 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
2627 for (int n = 0; n <= group; n++)
2629 // Calculate which part of the value to mask.
2630 shift = calc_grp_kn(residual);
2631 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
2632 gn = residual & (0xff << shift);
2633 // Calculate the residual for the next time around.
2636 // Return Gn in the form of an encoded constant-and-rotation.
2637 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
2641 // Handle ARM long branches.
2642 static typename This::Status
2643 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2644 unsigned char *, const Sized_symbol<32>*,
2645 const Arm_relobj<big_endian>*, unsigned int,
2646 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2648 // Handle THUMB long branches.
2649 static typename This::Status
2650 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2651 unsigned char *, const Sized_symbol<32>*,
2652 const Arm_relobj<big_endian>*, unsigned int,
2653 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2656 // Return the branch offset of a 32-bit THUMB branch.
2657 static inline int32_t
2658 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2660 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
2661 // involving the J1 and J2 bits.
2662 uint32_t s = (upper_insn & (1U << 10)) >> 10;
2663 uint32_t upper = upper_insn & 0x3ffU;
2664 uint32_t lower = lower_insn & 0x7ffU;
2665 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
2666 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
2667 uint32_t i1 = j1 ^ s ? 0 : 1;
2668 uint32_t i2 = j2 ^ s ? 0 : 1;
2670 return utils::sign_extend<25>((s << 24) | (i1 << 23) | (i2 << 22)
2671 | (upper << 12) | (lower << 1));
2674 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
2675 // UPPER_INSN is the original upper instruction of the branch. Caller is
2676 // responsible for overflow checking and BLX offset adjustment.
2677 static inline uint16_t
2678 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
2680 uint32_t s = offset < 0 ? 1 : 0;
2681 uint32_t bits = static_cast<uint32_t>(offset);
2682 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
2685 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
2686 // LOWER_INSN is the original lower instruction of the branch. Caller is
2687 // responsible for overflow checking and BLX offset adjustment.
2688 static inline uint16_t
2689 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
2691 uint32_t s = offset < 0 ? 1 : 0;
2692 uint32_t bits = static_cast<uint32_t>(offset);
2693 return ((lower_insn & ~0x2fffU)
2694 | ((((bits >> 23) & 1) ^ !s) << 13)
2695 | ((((bits >> 22) & 1) ^ !s) << 11)
2696 | ((bits >> 1) & 0x7ffU));
2699 // Return the branch offset of a 32-bit THUMB conditional branch.
2700 static inline int32_t
2701 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2703 uint32_t s = (upper_insn & 0x0400U) >> 10;
2704 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
2705 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
2706 uint32_t lower = (lower_insn & 0x07ffU);
2707 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
2709 return utils::sign_extend<21>((upper << 12) | (lower << 1));
2712 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
2713 // instruction. UPPER_INSN is the original upper instruction of the branch.
2714 // Caller is responsible for overflow checking.
2715 static inline uint16_t
2716 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
2718 uint32_t s = offset < 0 ? 1 : 0;
2719 uint32_t bits = static_cast<uint32_t>(offset);
2720 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
2723 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
2724 // instruction. LOWER_INSN is the original lower instruction of the branch.
2725 // Caller is reponsible for overflow checking.
2726 static inline uint16_t
2727 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
2729 uint32_t bits = static_cast<uint32_t>(offset);
2730 uint32_t j2 = (bits & 0x00080000U) >> 19;
2731 uint32_t j1 = (bits & 0x00040000U) >> 18;
2732 uint32_t lo = (bits & 0x00000ffeU) >> 1;
2734 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
2737 // R_ARM_ABS8: S + A
2738 static inline typename This::Status
2739 abs8(unsigned char *view,
2740 const Sized_relobj<32, big_endian>* object,
2741 const Symbol_value<32>* psymval)
2743 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
2744 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2745 Valtype* wv = reinterpret_cast<Valtype*>(view);
2746 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
2747 Reltype addend = utils::sign_extend<8>(val);
2748 Reltype x = psymval->value(object, addend);
2749 val = utils::bit_select(val, x, 0xffU);
2750 elfcpp::Swap<8, big_endian>::writeval(wv, val);
2751 return (utils::has_signed_unsigned_overflow<8>(x)
2752 ? This::STATUS_OVERFLOW
2753 : This::STATUS_OKAY);
2756 // R_ARM_THM_ABS5: S + A
2757 static inline typename This::Status
2758 thm_abs5(unsigned char *view,
2759 const Sized_relobj<32, big_endian>* object,
2760 const Symbol_value<32>* psymval)
2762 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2763 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2764 Valtype* wv = reinterpret_cast<Valtype*>(view);
2765 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2766 Reltype addend = (val & 0x7e0U) >> 6;
2767 Reltype x = psymval->value(object, addend);
2768 val = utils::bit_select(val, x << 6, 0x7e0U);
2769 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2770 return (utils::has_overflow<5>(x)
2771 ? This::STATUS_OVERFLOW
2772 : This::STATUS_OKAY);
2775 // R_ARM_ABS12: S + A
2776 static inline typename This::Status
2777 abs12(unsigned char *view,
2778 const Sized_relobj<32, big_endian>* object,
2779 const Symbol_value<32>* psymval)
2781 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2782 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2783 Valtype* wv = reinterpret_cast<Valtype*>(view);
2784 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2785 Reltype addend = val & 0x0fffU;
2786 Reltype x = psymval->value(object, addend);
2787 val = utils::bit_select(val, x, 0x0fffU);
2788 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2789 return (utils::has_overflow<12>(x)
2790 ? This::STATUS_OVERFLOW
2791 : This::STATUS_OKAY);
2794 // R_ARM_ABS16: S + A
2795 static inline typename This::Status
2796 abs16(unsigned char *view,
2797 const Sized_relobj<32, big_endian>* object,
2798 const Symbol_value<32>* psymval)
2800 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2801 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2802 Valtype* wv = reinterpret_cast<Valtype*>(view);
2803 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2804 Reltype addend = utils::sign_extend<16>(val);
2805 Reltype x = psymval->value(object, addend);
2806 val = utils::bit_select(val, x, 0xffffU);
2807 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2808 return (utils::has_signed_unsigned_overflow<16>(x)
2809 ? This::STATUS_OVERFLOW
2810 : This::STATUS_OKAY);
2813 // R_ARM_ABS32: (S + A) | T
2814 static inline typename This::Status
2815 abs32(unsigned char *view,
2816 const Sized_relobj<32, big_endian>* object,
2817 const Symbol_value<32>* psymval,
2818 Arm_address thumb_bit)
2820 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2821 Valtype* wv = reinterpret_cast<Valtype*>(view);
2822 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2823 Valtype x = psymval->value(object, addend) | thumb_bit;
2824 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2825 return This::STATUS_OKAY;
2828 // R_ARM_REL32: (S + A) | T - P
2829 static inline typename This::Status
2830 rel32(unsigned char *view,
2831 const Sized_relobj<32, big_endian>* object,
2832 const Symbol_value<32>* psymval,
2833 Arm_address address,
2834 Arm_address thumb_bit)
2836 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2837 Valtype* wv = reinterpret_cast<Valtype*>(view);
2838 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2839 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2840 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2841 return This::STATUS_OKAY;
2844 // R_ARM_THM_JUMP24: (S + A) | T - P
2845 static typename This::Status
2846 thm_jump19(unsigned char *view, const Arm_relobj<big_endian>* object,
2847 const Symbol_value<32>* psymval, Arm_address address,
2848 Arm_address thumb_bit);
2850 // R_ARM_THM_JUMP6: S + A – P
2851 static inline typename This::Status
2852 thm_jump6(unsigned char *view,
2853 const Sized_relobj<32, big_endian>* object,
2854 const Symbol_value<32>* psymval,
2855 Arm_address address)
2857 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2858 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2859 Valtype* wv = reinterpret_cast<Valtype*>(view);
2860 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2861 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
2862 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
2863 Reltype x = (psymval->value(object, addend) - address);
2864 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
2865 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2866 // CZB does only forward jumps.
2867 return ((x > 0x007e)
2868 ? This::STATUS_OVERFLOW
2869 : This::STATUS_OKAY);
2872 // R_ARM_THM_JUMP8: S + A – P
2873 static inline typename This::Status
2874 thm_jump8(unsigned char *view,
2875 const Sized_relobj<32, big_endian>* object,
2876 const Symbol_value<32>* psymval,
2877 Arm_address address)
2879 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2880 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2881 Valtype* wv = reinterpret_cast<Valtype*>(view);
2882 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2883 Reltype addend = utils::sign_extend<8>((val & 0x00ff) << 1);
2884 Reltype x = (psymval->value(object, addend) - address);
2885 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xff00) | ((x & 0x01fe) >> 1));
2886 return (utils::has_overflow<8>(x)
2887 ? This::STATUS_OVERFLOW
2888 : This::STATUS_OKAY);
2891 // R_ARM_THM_JUMP11: S + A – P
2892 static inline typename This::Status
2893 thm_jump11(unsigned char *view,
2894 const Sized_relobj<32, big_endian>* object,
2895 const Symbol_value<32>* psymval,
2896 Arm_address address)
2898 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2899 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2900 Valtype* wv = reinterpret_cast<Valtype*>(view);
2901 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2902 Reltype addend = utils::sign_extend<11>((val & 0x07ff) << 1);
2903 Reltype x = (psymval->value(object, addend) - address);
2904 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xf800) | ((x & 0x0ffe) >> 1));
2905 return (utils::has_overflow<11>(x)
2906 ? This::STATUS_OVERFLOW
2907 : This::STATUS_OKAY);
2910 // R_ARM_BASE_PREL: B(S) + A - P
2911 static inline typename This::Status
2912 base_prel(unsigned char* view,
2914 Arm_address address)
2916 Base::rel32(view, origin - address);
2920 // R_ARM_BASE_ABS: B(S) + A
2921 static inline typename This::Status
2922 base_abs(unsigned char* view,
2925 Base::rel32(view, origin);
2929 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
2930 static inline typename This::Status
2931 got_brel(unsigned char* view,
2932 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
2934 Base::rel32(view, got_offset);
2935 return This::STATUS_OKAY;
2938 // R_ARM_GOT_PREL: GOT(S) + A - P
2939 static inline typename This::Status
2940 got_prel(unsigned char *view,
2941 Arm_address got_entry,
2942 Arm_address address)
2944 Base::rel32(view, got_entry - address);
2945 return This::STATUS_OKAY;
2948 // R_ARM_PREL: (S + A) | T - P
2949 static inline typename This::Status
2950 prel31(unsigned char *view,
2951 const Sized_relobj<32, big_endian>* object,
2952 const Symbol_value<32>* psymval,
2953 Arm_address address,
2954 Arm_address thumb_bit)
2956 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2957 Valtype* wv = reinterpret_cast<Valtype*>(view);
2958 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2959 Valtype addend = utils::sign_extend<31>(val);
2960 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2961 val = utils::bit_select(val, x, 0x7fffffffU);
2962 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2963 return (utils::has_overflow<31>(x) ?
2964 This::STATUS_OVERFLOW : This::STATUS_OKAY);
2967 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
2968 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
2969 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
2970 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
2971 static inline typename This::Status
2972 movw(unsigned char* view,
2973 const Sized_relobj<32, big_endian>* object,
2974 const Symbol_value<32>* psymval,
2975 Arm_address relative_address_base,
2976 Arm_address thumb_bit,
2977 bool check_overflow)
2979 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2980 Valtype* wv = reinterpret_cast<Valtype*>(view);
2981 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2982 Valtype addend = This::extract_arm_movw_movt_addend(val);
2983 Valtype x = ((psymval->value(object, addend) | thumb_bit)
2984 - relative_address_base);
2985 val = This::insert_val_arm_movw_movt(val, x);
2986 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2987 return ((check_overflow && utils::has_overflow<16>(x))
2988 ? This::STATUS_OVERFLOW
2989 : This::STATUS_OKAY);
2992 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
2993 // R_ARM_MOVT_PREL: S + A - P
2994 // R_ARM_MOVT_BREL: S + A - B(S)
2995 static inline typename This::Status
2996 movt(unsigned char* view,
2997 const Sized_relobj<32, big_endian>* object,
2998 const Symbol_value<32>* psymval,
2999 Arm_address relative_address_base)
3001 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3002 Valtype* wv = reinterpret_cast<Valtype*>(view);
3003 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3004 Valtype addend = This::extract_arm_movw_movt_addend(val);
3005 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3006 val = This::insert_val_arm_movw_movt(val, x);
3007 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3008 // FIXME: IHI0044D says that we should check for overflow.
3009 return This::STATUS_OKAY;
3012 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3013 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3014 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3015 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3016 static inline typename This::Status
3017 thm_movw(unsigned char *view,
3018 const Sized_relobj<32, big_endian>* object,
3019 const Symbol_value<32>* psymval,
3020 Arm_address relative_address_base,
3021 Arm_address thumb_bit,
3022 bool check_overflow)
3024 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3025 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3026 Valtype* wv = reinterpret_cast<Valtype*>(view);
3027 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3028 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3029 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3031 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3032 val = This::insert_val_thumb_movw_movt(val, x);
3033 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3034 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3035 return ((check_overflow && utils::has_overflow<16>(x))
3036 ? This::STATUS_OVERFLOW
3037 : This::STATUS_OKAY);
3040 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3041 // R_ARM_THM_MOVT_PREL: S + A - P
3042 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3043 static inline typename This::Status
3044 thm_movt(unsigned char* view,
3045 const Sized_relobj<32, big_endian>* object,
3046 const Symbol_value<32>* psymval,
3047 Arm_address relative_address_base)
3049 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3050 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3051 Valtype* wv = reinterpret_cast<Valtype*>(view);
3052 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3053 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3054 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3055 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3056 val = This::insert_val_thumb_movw_movt(val, x);
3057 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3058 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3059 return This::STATUS_OKAY;
3062 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3063 static inline typename This::Status
3064 thm_alu11(unsigned char* view,
3065 const Sized_relobj<32, big_endian>* object,
3066 const Symbol_value<32>* psymval,
3067 Arm_address address,
3068 Arm_address thumb_bit)
3070 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3071 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3072 Valtype* wv = reinterpret_cast<Valtype*>(view);
3073 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3074 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3076 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3077 // -----------------------------------------------------------------------
3078 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3079 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3080 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3081 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3082 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3083 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3085 // Determine a sign for the addend.
3086 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3087 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3088 // Thumb2 addend encoding:
3089 // imm12 := i | imm3 | imm8
3090 int32_t addend = (insn & 0xff)
3091 | ((insn & 0x00007000) >> 4)
3092 | ((insn & 0x04000000) >> 15);
3093 // Apply a sign to the added.
3096 int32_t x = (psymval->value(object, addend) | thumb_bit)
3097 - (address & 0xfffffffc);
3098 Reltype val = abs(x);
3099 // Mask out the value and a distinct part of the ADD/SUB opcode
3100 // (bits 7:5 of opword).
3101 insn = (insn & 0xfb0f8f00)
3103 | ((val & 0x700) << 4)
3104 | ((val & 0x800) << 15);
3105 // Set the opcode according to whether the value to go in the
3106 // place is negative.
3110 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3111 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3112 return ((val > 0xfff) ?
3113 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3116 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3117 static inline typename This::Status
3118 thm_pc8(unsigned char* view,
3119 const Sized_relobj<32, big_endian>* object,
3120 const Symbol_value<32>* psymval,
3121 Arm_address address)
3123 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3124 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3125 Valtype* wv = reinterpret_cast<Valtype*>(view);
3126 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3127 Reltype addend = ((insn & 0x00ff) << 2);
3128 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3129 Reltype val = abs(x);
3130 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3132 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3133 return ((val > 0x03fc)
3134 ? This::STATUS_OVERFLOW
3135 : This::STATUS_OKAY);
3138 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3139 static inline typename This::Status
3140 thm_pc12(unsigned char* view,
3141 const Sized_relobj<32, big_endian>* object,
3142 const Symbol_value<32>* psymval,
3143 Arm_address address)
3145 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3146 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3147 Valtype* wv = reinterpret_cast<Valtype*>(view);
3148 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3149 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3150 // Determine a sign for the addend (positive if the U bit is 1).
3151 const int sign = (insn & 0x00800000) ? 1 : -1;
3152 int32_t addend = (insn & 0xfff);
3153 // Apply a sign to the added.
3156 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3157 Reltype val = abs(x);
3158 // Mask out and apply the value and the U bit.
3159 insn = (insn & 0xff7ff000) | (val & 0xfff);
3160 // Set the U bit according to whether the value to go in the
3161 // place is positive.
3165 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3166 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3167 return ((val > 0xfff) ?
3168 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3172 static inline typename This::Status
3173 v4bx(const Relocate_info<32, big_endian>* relinfo,
3174 unsigned char *view,
3175 const Arm_relobj<big_endian>* object,
3176 const Arm_address address,
3177 const bool is_interworking)
3180 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3181 Valtype* wv = reinterpret_cast<Valtype*>(view);
3182 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3184 // Ensure that we have a BX instruction.
3185 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3186 const uint32_t reg = (val & 0xf);
3187 if (is_interworking && reg != 0xf)
3189 Stub_table<big_endian>* stub_table =
3190 object->stub_table(relinfo->data_shndx);
3191 gold_assert(stub_table != NULL);
3193 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3194 gold_assert(stub != NULL);
3196 int32_t veneer_address =
3197 stub_table->address() + stub->offset() - 8 - address;
3198 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3199 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3200 // Replace with a branch to veneer (B <addr>)
3201 val = (val & 0xf0000000) | 0x0a000000
3202 | ((veneer_address >> 2) & 0x00ffffff);
3206 // Preserve Rm (lowest four bits) and the condition code
3207 // (highest four bits). Other bits encode MOV PC,Rm.
3208 val = (val & 0xf000000f) | 0x01a0f000;
3210 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3211 return This::STATUS_OKAY;
3214 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3215 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3216 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3217 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3218 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3219 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3220 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3221 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3222 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3223 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3224 static inline typename This::Status
3225 arm_grp_alu(unsigned char* view,
3226 const Sized_relobj<32, big_endian>* object,
3227 const Symbol_value<32>* psymval,
3229 Arm_address address,
3230 Arm_address thumb_bit,
3231 bool check_overflow)
3233 gold_assert(group >= 0 && group < 3);
3234 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3235 Valtype* wv = reinterpret_cast<Valtype*>(view);
3236 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3238 // ALU group relocations are allowed only for the ADD/SUB instructions.
3239 // (0x00800000 - ADD, 0x00400000 - SUB)
3240 const Valtype opcode = insn & 0x01e00000;
3241 if (opcode != 0x00800000 && opcode != 0x00400000)
3242 return This::STATUS_BAD_RELOC;
3244 // Determine a sign for the addend.
3245 const int sign = (opcode == 0x00800000) ? 1 : -1;
3246 // shifter = rotate_imm * 2
3247 const uint32_t shifter = (insn & 0xf00) >> 7;
3248 // Initial addend value.
3249 int32_t addend = insn & 0xff;
3250 // Rotate addend right by shifter.
3251 addend = (addend >> shifter) | (addend << (32 - shifter));
3252 // Apply a sign to the added.
3255 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3256 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3257 // Check for overflow if required
3259 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3260 return This::STATUS_OVERFLOW;
3262 // Mask out the value and the ADD/SUB part of the opcode; take care
3263 // not to destroy the S bit.
3265 // Set the opcode according to whether the value to go in the
3266 // place is negative.
3267 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3268 // Encode the offset (encoded Gn).
3271 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3272 return This::STATUS_OKAY;
3275 // R_ARM_LDR_PC_G0: S + A - P
3276 // R_ARM_LDR_PC_G1: S + A - P
3277 // R_ARM_LDR_PC_G2: S + A - P
3278 // R_ARM_LDR_SB_G0: S + A - B(S)
3279 // R_ARM_LDR_SB_G1: S + A - B(S)
3280 // R_ARM_LDR_SB_G2: S + A - B(S)
3281 static inline typename This::Status
3282 arm_grp_ldr(unsigned char* view,
3283 const Sized_relobj<32, big_endian>* object,
3284 const Symbol_value<32>* psymval,
3286 Arm_address address)
3288 gold_assert(group >= 0 && group < 3);
3289 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3290 Valtype* wv = reinterpret_cast<Valtype*>(view);
3291 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3293 const int sign = (insn & 0x00800000) ? 1 : -1;
3294 int32_t addend = (insn & 0xfff) * sign;
3295 int32_t x = (psymval->value(object, addend) - address);
3296 // Calculate the relevant G(n-1) value to obtain this stage residual.
3298 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3299 if (residual >= 0x1000)
3300 return This::STATUS_OVERFLOW;
3302 // Mask out the value and U bit.
3304 // Set the U bit for non-negative values.
3309 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3310 return This::STATUS_OKAY;
3313 // R_ARM_LDRS_PC_G0: S + A - P
3314 // R_ARM_LDRS_PC_G1: S + A - P
3315 // R_ARM_LDRS_PC_G2: S + A - P
3316 // R_ARM_LDRS_SB_G0: S + A - B(S)
3317 // R_ARM_LDRS_SB_G1: S + A - B(S)
3318 // R_ARM_LDRS_SB_G2: S + A - B(S)
3319 static inline typename This::Status
3320 arm_grp_ldrs(unsigned char* view,
3321 const Sized_relobj<32, big_endian>* object,
3322 const Symbol_value<32>* psymval,
3324 Arm_address address)
3326 gold_assert(group >= 0 && group < 3);
3327 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3328 Valtype* wv = reinterpret_cast<Valtype*>(view);
3329 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3331 const int sign = (insn & 0x00800000) ? 1 : -1;
3332 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3333 int32_t x = (psymval->value(object, addend) - address);
3334 // Calculate the relevant G(n-1) value to obtain this stage residual.
3336 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3337 if (residual >= 0x100)
3338 return This::STATUS_OVERFLOW;
3340 // Mask out the value and U bit.
3342 // Set the U bit for non-negative values.
3345 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3347 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3348 return This::STATUS_OKAY;
3351 // R_ARM_LDC_PC_G0: S + A - P
3352 // R_ARM_LDC_PC_G1: S + A - P
3353 // R_ARM_LDC_PC_G2: S + A - P
3354 // R_ARM_LDC_SB_G0: S + A - B(S)
3355 // R_ARM_LDC_SB_G1: S + A - B(S)
3356 // R_ARM_LDC_SB_G2: S + A - B(S)
3357 static inline typename This::Status
3358 arm_grp_ldc(unsigned char* view,
3359 const Sized_relobj<32, big_endian>* object,
3360 const Symbol_value<32>* psymval,
3362 Arm_address address)
3364 gold_assert(group >= 0 && group < 3);
3365 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3366 Valtype* wv = reinterpret_cast<Valtype*>(view);
3367 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3369 const int sign = (insn & 0x00800000) ? 1 : -1;
3370 int32_t addend = ((insn & 0xff) << 2) * sign;
3371 int32_t x = (psymval->value(object, addend) - address);
3372 // Calculate the relevant G(n-1) value to obtain this stage residual.
3374 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3375 if ((residual & 0x3) != 0 || residual >= 0x400)
3376 return This::STATUS_OVERFLOW;
3378 // Mask out the value and U bit.
3380 // Set the U bit for non-negative values.
3383 insn |= (residual >> 2);
3385 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3386 return This::STATUS_OKAY;
3390 // Relocate ARM long branches. This handles relocation types
3391 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3392 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3393 // undefined and we do not use PLT in this relocation. In such a case,
3394 // the branch is converted into an NOP.
3396 template<bool big_endian>
3397 typename Arm_relocate_functions<big_endian>::Status
3398 Arm_relocate_functions<big_endian>::arm_branch_common(
3399 unsigned int r_type,
3400 const Relocate_info<32, big_endian>* relinfo,
3401 unsigned char *view,
3402 const Sized_symbol<32>* gsym,
3403 const Arm_relobj<big_endian>* object,
3405 const Symbol_value<32>* psymval,
3406 Arm_address address,
3407 Arm_address thumb_bit,
3408 bool is_weakly_undefined_without_plt)
3410 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3411 Valtype* wv = reinterpret_cast<Valtype*>(view);
3412 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3414 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3415 && ((val & 0x0f000000UL) == 0x0a000000UL);
3416 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3417 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3418 && ((val & 0x0f000000UL) == 0x0b000000UL);
3419 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3420 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3422 // Check that the instruction is valid.
3423 if (r_type == elfcpp::R_ARM_CALL)
3425 if (!insn_is_uncond_bl && !insn_is_blx)
3426 return This::STATUS_BAD_RELOC;
3428 else if (r_type == elfcpp::R_ARM_JUMP24)
3430 if (!insn_is_b && !insn_is_cond_bl)
3431 return This::STATUS_BAD_RELOC;
3433 else if (r_type == elfcpp::R_ARM_PLT32)
3435 if (!insn_is_any_branch)
3436 return This::STATUS_BAD_RELOC;
3438 else if (r_type == elfcpp::R_ARM_XPC25)
3440 // FIXME: AAELF document IH0044C does not say much about it other
3441 // than it being obsolete.
3442 if (!insn_is_any_branch)
3443 return This::STATUS_BAD_RELOC;
3448 // A branch to an undefined weak symbol is turned into a jump to
3449 // the next instruction unless a PLT entry will be created.
3450 // Do the same for local undefined symbols.
3451 // The jump to the next instruction is optimized as a NOP depending
3452 // on the architecture.
3453 const Target_arm<big_endian>* arm_target =
3454 Target_arm<big_endian>::default_target();
3455 if (is_weakly_undefined_without_plt)
3457 Valtype cond = val & 0xf0000000U;
3458 if (arm_target->may_use_arm_nop())
3459 val = cond | 0x0320f000;
3461 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3462 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3463 return This::STATUS_OKAY;
3466 Valtype addend = utils::sign_extend<26>(val << 2);
3467 Valtype branch_target = psymval->value(object, addend);
3468 int32_t branch_offset = branch_target - address;
3470 // We need a stub if the branch offset is too large or if we need
3472 bool may_use_blx = arm_target->may_use_blx();
3473 Reloc_stub* stub = NULL;
3474 if ((branch_offset > ARM_MAX_FWD_BRANCH_OFFSET)
3475 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3476 || ((thumb_bit != 0) && !(may_use_blx && r_type == elfcpp::R_ARM_CALL)))
3478 Stub_type stub_type =
3479 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3481 if (stub_type != arm_stub_none)
3483 Stub_table<big_endian>* stub_table =
3484 object->stub_table(relinfo->data_shndx);
3485 gold_assert(stub_table != NULL);
3487 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3488 stub = stub_table->find_reloc_stub(stub_key);
3489 gold_assert(stub != NULL);
3490 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3491 branch_target = stub_table->address() + stub->offset() + addend;
3492 branch_offset = branch_target - address;
3493 gold_assert((branch_offset <= ARM_MAX_FWD_BRANCH_OFFSET)
3494 && (branch_offset >= ARM_MAX_BWD_BRANCH_OFFSET));
3498 // At this point, if we still need to switch mode, the instruction
3499 // must either be a BLX or a BL that can be converted to a BLX.
3503 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
3504 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
3507 val = utils::bit_select(val, (branch_offset >> 2), 0xffffffUL);
3508 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3509 return (utils::has_overflow<26>(branch_offset)
3510 ? This::STATUS_OVERFLOW : This::STATUS_OKAY);
3513 // Relocate THUMB long branches. This handles relocation types
3514 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3515 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3516 // undefined and we do not use PLT in this relocation. In such a case,
3517 // the branch is converted into an NOP.
3519 template<bool big_endian>
3520 typename Arm_relocate_functions<big_endian>::Status
3521 Arm_relocate_functions<big_endian>::thumb_branch_common(
3522 unsigned int r_type,
3523 const Relocate_info<32, big_endian>* relinfo,
3524 unsigned char *view,
3525 const Sized_symbol<32>* gsym,
3526 const Arm_relobj<big_endian>* object,
3528 const Symbol_value<32>* psymval,
3529 Arm_address address,
3530 Arm_address thumb_bit,
3531 bool is_weakly_undefined_without_plt)
3533 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3534 Valtype* wv = reinterpret_cast<Valtype*>(view);
3535 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3536 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3538 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3540 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
3541 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
3543 // Check that the instruction is valid.
3544 if (r_type == elfcpp::R_ARM_THM_CALL)
3546 if (!is_bl_insn && !is_blx_insn)
3547 return This::STATUS_BAD_RELOC;
3549 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
3551 // This cannot be a BLX.
3553 return This::STATUS_BAD_RELOC;
3555 else if (r_type == elfcpp::R_ARM_THM_XPC22)
3557 // Check for Thumb to Thumb call.
3559 return This::STATUS_BAD_RELOC;
3562 gold_warning(_("%s: Thumb BLX instruction targets "
3563 "thumb function '%s'."),
3564 object->name().c_str(),
3565 (gsym ? gsym->name() : "(local)"));
3566 // Convert BLX to BL.
3567 lower_insn |= 0x1000U;
3573 // A branch to an undefined weak symbol is turned into a jump to
3574 // the next instruction unless a PLT entry will be created.
3575 // The jump to the next instruction is optimized as a NOP.W for
3576 // Thumb-2 enabled architectures.
3577 const Target_arm<big_endian>* arm_target =
3578 Target_arm<big_endian>::default_target();
3579 if (is_weakly_undefined_without_plt)
3581 if (arm_target->may_use_thumb2_nop())
3583 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
3584 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
3588 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
3589 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
3591 return This::STATUS_OKAY;
3594 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
3595 Arm_address branch_target = psymval->value(object, addend);
3596 int32_t branch_offset = branch_target - address;
3598 // We need a stub if the branch offset is too large or if we need
3600 bool may_use_blx = arm_target->may_use_blx();
3601 bool thumb2 = arm_target->using_thumb2();
3603 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3604 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3606 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3607 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3608 || ((thumb_bit == 0)
3609 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
3610 || r_type == elfcpp::R_ARM_THM_JUMP24)))
3612 Stub_type stub_type =
3613 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3615 if (stub_type != arm_stub_none)
3617 Stub_table<big_endian>* stub_table =
3618 object->stub_table(relinfo->data_shndx);
3619 gold_assert(stub_table != NULL);
3621 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3622 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
3623 gold_assert(stub != NULL);
3624 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3625 branch_target = stub_table->address() + stub->offset() + addend;
3626 branch_offset = branch_target - address;
3630 // At this point, if we still need to switch mode, the instruction
3631 // must either be a BLX or a BL that can be converted to a BLX.
3634 gold_assert(may_use_blx
3635 && (r_type == elfcpp::R_ARM_THM_CALL
3636 || r_type == elfcpp::R_ARM_THM_XPC22));
3637 // Make sure this is a BLX.
3638 lower_insn &= ~0x1000U;
3642 // Make sure this is a BL.
3643 lower_insn |= 0x1000U;
3646 if ((lower_insn & 0x5000U) == 0x4000U)
3647 // For a BLX instruction, make sure that the relocation is rounded up
3648 // to a word boundary. This follows the semantics of the instruction
3649 // which specifies that bit 1 of the target address will come from bit
3650 // 1 of the base address.
3651 branch_offset = (branch_offset + 2) & ~3;
3653 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
3654 // We use the Thumb-2 encoding, which is safe even if dealing with
3655 // a Thumb-1 instruction by virtue of our overflow check above. */
3656 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
3657 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
3659 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3660 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3663 ? utils::has_overflow<25>(branch_offset)
3664 : utils::has_overflow<23>(branch_offset))
3665 ? This::STATUS_OVERFLOW
3666 : This::STATUS_OKAY);
3669 // Relocate THUMB-2 long conditional branches.
3670 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3671 // undefined and we do not use PLT in this relocation. In such a case,
3672 // the branch is converted into an NOP.
3674 template<bool big_endian>
3675 typename Arm_relocate_functions<big_endian>::Status
3676 Arm_relocate_functions<big_endian>::thm_jump19(
3677 unsigned char *view,
3678 const Arm_relobj<big_endian>* object,
3679 const Symbol_value<32>* psymval,
3680 Arm_address address,
3681 Arm_address thumb_bit)
3683 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3684 Valtype* wv = reinterpret_cast<Valtype*>(view);
3685 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3686 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3687 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
3689 Arm_address branch_target = psymval->value(object, addend);
3690 int32_t branch_offset = branch_target - address;
3692 // ??? Should handle interworking? GCC might someday try to
3693 // use this for tail calls.
3694 // FIXME: We do support thumb entry to PLT yet.
3697 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
3698 return This::STATUS_BAD_RELOC;
3701 // Put RELOCATION back into the insn.
3702 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
3703 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
3705 // Put the relocated value back in the object file:
3706 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3707 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3709 return (utils::has_overflow<21>(branch_offset)
3710 ? This::STATUS_OVERFLOW
3711 : This::STATUS_OKAY);
3714 // Get the GOT section, creating it if necessary.
3716 template<bool big_endian>
3717 Output_data_got<32, big_endian>*
3718 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
3720 if (this->got_ == NULL)
3722 gold_assert(symtab != NULL && layout != NULL);
3724 this->got_ = new Output_data_got<32, big_endian>();
3727 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3729 | elfcpp::SHF_WRITE),
3730 this->got_, false, true, true,
3733 // The old GNU linker creates a .got.plt section. We just
3734 // create another set of data in the .got section. Note that we
3735 // always create a PLT if we create a GOT, although the PLT
3737 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
3738 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3740 | elfcpp::SHF_WRITE),
3741 this->got_plt_, false, false,
3744 // The first three entries are reserved.
3745 this->got_plt_->set_current_data_size(3 * 4);
3747 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
3748 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
3749 Symbol_table::PREDEFINED,
3751 0, 0, elfcpp::STT_OBJECT,
3753 elfcpp::STV_HIDDEN, 0,
3759 // Get the dynamic reloc section, creating it if necessary.
3761 template<bool big_endian>
3762 typename Target_arm<big_endian>::Reloc_section*
3763 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
3765 if (this->rel_dyn_ == NULL)
3767 gold_assert(layout != NULL);
3768 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
3769 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
3770 elfcpp::SHF_ALLOC, this->rel_dyn_, true,
3771 false, false, false);
3773 return this->rel_dyn_;
3776 // Insn_template methods.
3778 // Return byte size of an instruction template.
3781 Insn_template::size() const
3783 switch (this->type())
3786 case THUMB16_SPECIAL_TYPE:
3797 // Return alignment of an instruction template.
3800 Insn_template::alignment() const
3802 switch (this->type())
3805 case THUMB16_SPECIAL_TYPE:
3816 // Stub_template methods.
3818 Stub_template::Stub_template(
3819 Stub_type type, const Insn_template* insns,
3821 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
3822 entry_in_thumb_mode_(false), relocs_()
3826 // Compute byte size and alignment of stub template.
3827 for (size_t i = 0; i < insn_count; i++)
3829 unsigned insn_alignment = insns[i].alignment();
3830 size_t insn_size = insns[i].size();
3831 gold_assert((offset & (insn_alignment - 1)) == 0);
3832 this->alignment_ = std::max(this->alignment_, insn_alignment);
3833 switch (insns[i].type())
3835 case Insn_template::THUMB16_TYPE:
3836 case Insn_template::THUMB16_SPECIAL_TYPE:
3838 this->entry_in_thumb_mode_ = true;
3841 case Insn_template::THUMB32_TYPE:
3842 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
3843 this->relocs_.push_back(Reloc(i, offset));
3845 this->entry_in_thumb_mode_ = true;
3848 case Insn_template::ARM_TYPE:
3849 // Handle cases where the target is encoded within the
3851 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
3852 this->relocs_.push_back(Reloc(i, offset));
3855 case Insn_template::DATA_TYPE:
3856 // Entry point cannot be data.
3857 gold_assert(i != 0);
3858 this->relocs_.push_back(Reloc(i, offset));
3864 offset += insn_size;
3866 this->size_ = offset;
3871 // Template to implement do_write for a specific target endianity.
3873 template<bool big_endian>
3875 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
3877 const Stub_template* stub_template = this->stub_template();
3878 const Insn_template* insns = stub_template->insns();
3880 // FIXME: We do not handle BE8 encoding yet.
3881 unsigned char* pov = view;
3882 for (size_t i = 0; i < stub_template->insn_count(); i++)
3884 switch (insns[i].type())
3886 case Insn_template::THUMB16_TYPE:
3887 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
3889 case Insn_template::THUMB16_SPECIAL_TYPE:
3890 elfcpp::Swap<16, big_endian>::writeval(
3892 this->thumb16_special(i));
3894 case Insn_template::THUMB32_TYPE:
3896 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
3897 uint32_t lo = insns[i].data() & 0xffff;
3898 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
3899 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
3902 case Insn_template::ARM_TYPE:
3903 case Insn_template::DATA_TYPE:
3904 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
3909 pov += insns[i].size();
3911 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
3914 // Reloc_stub::Key methods.
3916 // Dump a Key as a string for debugging.
3919 Reloc_stub::Key::name() const
3921 if (this->r_sym_ == invalid_index)
3923 // Global symbol key name
3924 // <stub-type>:<symbol name>:<addend>.
3925 const std::string sym_name = this->u_.symbol->name();
3926 // We need to print two hex number and two colons. So just add 100 bytes
3927 // to the symbol name size.
3928 size_t len = sym_name.size() + 100;
3929 char* buffer = new char[len];
3930 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
3931 sym_name.c_str(), this->addend_);
3932 gold_assert(c > 0 && c < static_cast<int>(len));
3934 return std::string(buffer);
3938 // local symbol key name
3939 // <stub-type>:<object>:<r_sym>:<addend>.
3940 const size_t len = 200;
3942 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
3943 this->u_.relobj, this->r_sym_, this->addend_);
3944 gold_assert(c > 0 && c < static_cast<int>(len));
3945 return std::string(buffer);
3949 // Reloc_stub methods.
3951 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
3952 // LOCATION to DESTINATION.
3953 // This code is based on the arm_type_of_stub function in
3954 // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub
3958 Reloc_stub::stub_type_for_reloc(
3959 unsigned int r_type,
3960 Arm_address location,
3961 Arm_address destination,
3962 bool target_is_thumb)
3964 Stub_type stub_type = arm_stub_none;
3966 // This is a bit ugly but we want to avoid using a templated class for
3967 // big and little endianities.
3969 bool should_force_pic_veneer;
3972 if (parameters->target().is_big_endian())
3974 const Target_arm<true>* big_endian_target =
3975 Target_arm<true>::default_target();
3976 may_use_blx = big_endian_target->may_use_blx();
3977 should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
3978 thumb2 = big_endian_target->using_thumb2();
3979 thumb_only = big_endian_target->using_thumb_only();
3983 const Target_arm<false>* little_endian_target =
3984 Target_arm<false>::default_target();
3985 may_use_blx = little_endian_target->may_use_blx();
3986 should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
3987 thumb2 = little_endian_target->using_thumb2();
3988 thumb_only = little_endian_target->using_thumb_only();
3991 int64_t branch_offset = (int64_t)destination - location;
3993 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
3995 // Handle cases where:
3996 // - this call goes too far (different Thumb/Thumb2 max
3998 // - it's a Thumb->Arm call and blx is not available, or it's a
3999 // Thumb->Arm branch (not bl). A stub is needed in this case.
4001 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4002 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4004 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4005 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4006 || ((!target_is_thumb)
4007 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4008 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4010 if (target_is_thumb)
4015 stub_type = (parameters->options().shared()
4016 || should_force_pic_veneer)
4019 && (r_type == elfcpp::R_ARM_THM_CALL))
4020 // V5T and above. Stub starts with ARM code, so
4021 // we must be able to switch mode before
4022 // reaching it, which is only possible for 'bl'
4023 // (ie R_ARM_THM_CALL relocation).
4024 ? arm_stub_long_branch_any_thumb_pic
4025 // On V4T, use Thumb code only.
4026 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4030 && (r_type == elfcpp::R_ARM_THM_CALL))
4031 ? arm_stub_long_branch_any_any // V5T and above.
4032 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4036 stub_type = (parameters->options().shared()
4037 || should_force_pic_veneer)
4038 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4039 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4046 // FIXME: We should check that the input section is from an
4047 // object that has interwork enabled.
4049 stub_type = (parameters->options().shared()
4050 || should_force_pic_veneer)
4053 && (r_type == elfcpp::R_ARM_THM_CALL))
4054 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4055 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4059 && (r_type == elfcpp::R_ARM_THM_CALL))
4060 ? arm_stub_long_branch_any_any // V5T and above.
4061 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4063 // Handle v4t short branches.
4064 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4065 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4066 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4067 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4071 else if (r_type == elfcpp::R_ARM_CALL
4072 || r_type == elfcpp::R_ARM_JUMP24
4073 || r_type == elfcpp::R_ARM_PLT32)
4075 if (target_is_thumb)
4079 // FIXME: We should check that the input section is from an
4080 // object that has interwork enabled.
4082 // We have an extra 2-bytes reach because of
4083 // the mode change (bit 24 (H) of BLX encoding).
4084 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4085 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4086 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4087 || (r_type == elfcpp::R_ARM_JUMP24)
4088 || (r_type == elfcpp::R_ARM_PLT32))
4090 stub_type = (parameters->options().shared()
4091 || should_force_pic_veneer)
4094 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4095 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4099 ? arm_stub_long_branch_any_any // V5T and above.
4100 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4106 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4107 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4109 stub_type = (parameters->options().shared()
4110 || should_force_pic_veneer)
4111 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4112 : arm_stub_long_branch_any_any; /// non-PIC.
4120 // Cortex_a8_stub methods.
4122 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4123 // I is the position of the instruction template in the stub template.
4126 Cortex_a8_stub::do_thumb16_special(size_t i)
4128 // The only use of this is to copy condition code from a conditional
4129 // branch being worked around to the corresponding conditional branch in
4131 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4133 uint16_t data = this->stub_template()->insns()[i].data();
4134 gold_assert((data & 0xff00U) == 0xd000U);
4135 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4139 // Stub_factory methods.
4141 Stub_factory::Stub_factory()
4143 // The instruction template sequences are declared as static
4144 // objects and initialized first time the constructor runs.
4146 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4147 // to reach the stub if necessary.
4148 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4150 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4151 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4152 // dcd R_ARM_ABS32(X)
4155 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4157 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4159 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4160 Insn_template::arm_insn(0xe12fff1c), // bx ip
4161 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4162 // dcd R_ARM_ABS32(X)
4165 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4166 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4168 Insn_template::thumb16_insn(0xb401), // push {r0}
4169 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4170 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4171 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4172 Insn_template::thumb16_insn(0x4760), // bx ip
4173 Insn_template::thumb16_insn(0xbf00), // nop
4174 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4175 // dcd R_ARM_ABS32(X)
4178 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4180 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4182 Insn_template::thumb16_insn(0x4778), // bx pc
4183 Insn_template::thumb16_insn(0x46c0), // nop
4184 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4185 Insn_template::arm_insn(0xe12fff1c), // bx ip
4186 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4187 // dcd R_ARM_ABS32(X)
4190 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4192 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4194 Insn_template::thumb16_insn(0x4778), // bx pc
4195 Insn_template::thumb16_insn(0x46c0), // nop
4196 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4197 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4198 // dcd R_ARM_ABS32(X)
4201 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4202 // one, when the destination is close enough.
4203 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4205 Insn_template::thumb16_insn(0x4778), // bx pc
4206 Insn_template::thumb16_insn(0x46c0), // nop
4207 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4210 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4211 // blx to reach the stub if necessary.
4212 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4214 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4215 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4216 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4217 // dcd R_ARM_REL32(X-4)
4220 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4221 // blx to reach the stub if necessary. We can not add into pc;
4222 // it is not guaranteed to mode switch (different in ARMv6 and
4224 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4226 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4227 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4228 Insn_template::arm_insn(0xe12fff1c), // bx ip
4229 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4230 // dcd R_ARM_REL32(X)
4233 // V4T ARM -> ARM long branch stub, PIC.
4234 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4236 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4237 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4238 Insn_template::arm_insn(0xe12fff1c), // bx ip
4239 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4240 // dcd R_ARM_REL32(X)
4243 // V4T Thumb -> ARM long branch stub, PIC.
4244 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4246 Insn_template::thumb16_insn(0x4778), // bx pc
4247 Insn_template::thumb16_insn(0x46c0), // nop
4248 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4249 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4250 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4251 // dcd R_ARM_REL32(X)
4254 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4256 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4258 Insn_template::thumb16_insn(0xb401), // push {r0}
4259 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4260 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4261 Insn_template::thumb16_insn(0x4484), // add ip, r0
4262 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4263 Insn_template::thumb16_insn(0x4760), // bx ip
4264 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4265 // dcd R_ARM_REL32(X)
4268 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4270 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4272 Insn_template::thumb16_insn(0x4778), // bx pc
4273 Insn_template::thumb16_insn(0x46c0), // nop
4274 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4275 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4276 Insn_template::arm_insn(0xe12fff1c), // bx ip
4277 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4278 // dcd R_ARM_REL32(X)
4281 // Cortex-A8 erratum-workaround stubs.
4283 // Stub used for conditional branches (which may be beyond +/-1MB away,
4284 // so we can't use a conditional branch to reach this stub).
4291 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4293 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4294 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4295 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4299 // Stub used for b.w and bl.w instructions.
4301 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4303 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4306 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4308 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4311 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4312 // instruction (which switches to ARM mode) to point to this stub. Jump to
4313 // the real destination using an ARM-mode branch.
4314 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4316 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4319 // Stub used to provide an interworking for R_ARM_V4BX relocation
4320 // (bx r[n] instruction).
4321 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4323 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4324 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4325 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4328 // Fill in the stub template look-up table. Stub templates are constructed
4329 // per instance of Stub_factory for fast look-up without locking
4330 // in a thread-enabled environment.
4332 this->stub_templates_[arm_stub_none] =
4333 new Stub_template(arm_stub_none, NULL, 0);
4335 #define DEF_STUB(x) \
4339 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4340 Stub_type type = arm_stub_##x; \
4341 this->stub_templates_[type] = \
4342 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4350 // Stub_table methods.
4352 // Removel all Cortex-A8 stub.
4354 template<bool big_endian>
4356 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4358 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4359 p != this->cortex_a8_stubs_.end();
4362 this->cortex_a8_stubs_.clear();
4365 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4367 template<bool big_endian>
4369 Stub_table<big_endian>::relocate_stub(
4371 const Relocate_info<32, big_endian>* relinfo,
4372 Target_arm<big_endian>* arm_target,
4373 Output_section* output_section,
4374 unsigned char* view,
4375 Arm_address address,
4376 section_size_type view_size)
4378 const Stub_template* stub_template = stub->stub_template();
4379 if (stub_template->reloc_count() != 0)
4381 // Adjust view to cover the stub only.
4382 section_size_type offset = stub->offset();
4383 section_size_type stub_size = stub_template->size();
4384 gold_assert(offset + stub_size <= view_size);
4386 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4387 address + offset, stub_size);
4391 // Relocate all stubs in this stub table.
4393 template<bool big_endian>
4395 Stub_table<big_endian>::relocate_stubs(
4396 const Relocate_info<32, big_endian>* relinfo,
4397 Target_arm<big_endian>* arm_target,
4398 Output_section* output_section,
4399 unsigned char* view,
4400 Arm_address address,
4401 section_size_type view_size)
4403 // If we are passed a view bigger than the stub table's. we need to
4405 gold_assert(address == this->address()
4407 == static_cast<section_size_type>(this->data_size())));
4409 // Relocate all relocation stubs.
4410 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4411 p != this->reloc_stubs_.end();
4413 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4414 address, view_size);
4416 // Relocate all Cortex-A8 stubs.
4417 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4418 p != this->cortex_a8_stubs_.end();
4420 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4421 address, view_size);
4423 // Relocate all ARM V4BX stubs.
4424 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
4425 p != this->arm_v4bx_stubs_.end();
4429 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
4430 address, view_size);
4434 // Write out the stubs to file.
4436 template<bool big_endian>
4438 Stub_table<big_endian>::do_write(Output_file* of)
4440 off_t offset = this->offset();
4441 const section_size_type oview_size =
4442 convert_to_section_size_type(this->data_size());
4443 unsigned char* const oview = of->get_output_view(offset, oview_size);
4445 // Write relocation stubs.
4446 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4447 p != this->reloc_stubs_.end();
4450 Reloc_stub* stub = p->second;
4451 Arm_address address = this->address() + stub->offset();
4453 == align_address(address,
4454 stub->stub_template()->alignment()));
4455 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4459 // Write Cortex-A8 stubs.
4460 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4461 p != this->cortex_a8_stubs_.end();
4464 Cortex_a8_stub* stub = p->second;
4465 Arm_address address = this->address() + stub->offset();
4467 == align_address(address,
4468 stub->stub_template()->alignment()));
4469 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4473 // Write ARM V4BX relocation stubs.
4474 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4475 p != this->arm_v4bx_stubs_.end();
4481 Arm_address address = this->address() + (*p)->offset();
4483 == align_address(address,
4484 (*p)->stub_template()->alignment()));
4485 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
4489 of->write_output_view(this->offset(), oview_size, oview);
4492 // Update the data size and address alignment of the stub table at the end
4493 // of a relaxation pass. Return true if either the data size or the
4494 // alignment changed in this relaxation pass.
4496 template<bool big_endian>
4498 Stub_table<big_endian>::update_data_size_and_addralign()
4501 unsigned addralign = 1;
4503 // Go over all stubs in table to compute data size and address alignment.
4505 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4506 p != this->reloc_stubs_.end();
4509 const Stub_template* stub_template = p->second->stub_template();
4510 addralign = std::max(addralign, stub_template->alignment());
4511 size = (align_address(size, stub_template->alignment())
4512 + stub_template->size());
4515 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4516 p != this->cortex_a8_stubs_.end();
4519 const Stub_template* stub_template = p->second->stub_template();
4520 addralign = std::max(addralign, stub_template->alignment());
4521 size = (align_address(size, stub_template->alignment())
4522 + stub_template->size());
4525 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4526 p != this->arm_v4bx_stubs_.end();
4532 const Stub_template* stub_template = (*p)->stub_template();
4533 addralign = std::max(addralign, stub_template->alignment());
4534 size = (align_address(size, stub_template->alignment())
4535 + stub_template->size());
4538 // Check if either data size or alignment changed in this pass.
4539 // Update prev_data_size_ and prev_addralign_. These will be used
4540 // as the current data size and address alignment for the next pass.
4541 bool changed = size != this->prev_data_size_;
4542 this->prev_data_size_ = size;
4544 if (addralign != this->prev_addralign_)
4546 this->prev_addralign_ = addralign;
4551 // Finalize the stubs. This sets the offsets of the stubs within the stub
4552 // table. It also marks all input sections needing Cortex-A8 workaround.
4554 template<bool big_endian>
4556 Stub_table<big_endian>::finalize_stubs()
4559 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4560 p != this->reloc_stubs_.end();
4563 Reloc_stub* stub = p->second;
4564 const Stub_template* stub_template = stub->stub_template();
4565 uint64_t stub_addralign = stub_template->alignment();
4566 off = align_address(off, stub_addralign);
4567 stub->set_offset(off);
4568 off += stub_template->size();
4571 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4572 p != this->cortex_a8_stubs_.end();
4575 Cortex_a8_stub* stub = p->second;
4576 const Stub_template* stub_template = stub->stub_template();
4577 uint64_t stub_addralign = stub_template->alignment();
4578 off = align_address(off, stub_addralign);
4579 stub->set_offset(off);
4580 off += stub_template->size();
4582 // Mark input section so that we can determine later if a code section
4583 // needs the Cortex-A8 workaround quickly.
4584 Arm_relobj<big_endian>* arm_relobj =
4585 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
4586 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
4589 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4590 p != this->arm_v4bx_stubs_.end();
4596 const Stub_template* stub_template = (*p)->stub_template();
4597 uint64_t stub_addralign = stub_template->alignment();
4598 off = align_address(off, stub_addralign);
4599 (*p)->set_offset(off);
4600 off += stub_template->size();
4603 gold_assert(off <= this->prev_data_size_);
4606 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
4607 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
4608 // of the address range seen by the linker.
4610 template<bool big_endian>
4612 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
4613 Target_arm<big_endian>* arm_target,
4614 unsigned char* view,
4615 Arm_address view_address,
4616 section_size_type view_size)
4618 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
4619 for (Cortex_a8_stub_list::const_iterator p =
4620 this->cortex_a8_stubs_.lower_bound(view_address);
4621 ((p != this->cortex_a8_stubs_.end())
4622 && (p->first < (view_address + view_size)));
4625 // We do not store the THUMB bit in the LSB of either the branch address
4626 // or the stub offset. There is no need to strip the LSB.
4627 Arm_address branch_address = p->first;
4628 const Cortex_a8_stub* stub = p->second;
4629 Arm_address stub_address = this->address() + stub->offset();
4631 // Offset of the branch instruction relative to this view.
4632 section_size_type offset =
4633 convert_to_section_size_type(branch_address - view_address);
4634 gold_assert((offset + 4) <= view_size);
4636 arm_target->apply_cortex_a8_workaround(stub, stub_address,
4637 view + offset, branch_address);
4641 // Arm_input_section methods.
4643 // Initialize an Arm_input_section.
4645 template<bool big_endian>
4647 Arm_input_section<big_endian>::init()
4649 Relobj* relobj = this->relobj();
4650 unsigned int shndx = this->shndx();
4652 // Cache these to speed up size and alignment queries. It is too slow
4653 // to call section_addraglin and section_size every time.
4654 this->original_addralign_ = relobj->section_addralign(shndx);
4655 this->original_size_ = relobj->section_size(shndx);
4657 // We want to make this look like the original input section after
4658 // output sections are finalized.
4659 Output_section* os = relobj->output_section(shndx);
4660 off_t offset = relobj->output_section_offset(shndx);
4661 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
4662 this->set_address(os->address() + offset);
4663 this->set_file_offset(os->offset() + offset);
4665 this->set_current_data_size(this->original_size_);
4666 this->finalize_data_size();
4669 template<bool big_endian>
4671 Arm_input_section<big_endian>::do_write(Output_file* of)
4673 // We have to write out the original section content.
4674 section_size_type section_size;
4675 const unsigned char* section_contents =
4676 this->relobj()->section_contents(this->shndx(), §ion_size, false);
4677 of->write(this->offset(), section_contents, section_size);
4679 // If this owns a stub table and it is not empty, write it.
4680 if (this->is_stub_table_owner() && !this->stub_table_->empty())
4681 this->stub_table_->write(of);
4684 // Finalize data size.
4686 template<bool big_endian>
4688 Arm_input_section<big_endian>::set_final_data_size()
4690 // If this owns a stub table, finalize its data size as well.
4691 if (this->is_stub_table_owner())
4693 uint64_t address = this->address();
4695 // The stub table comes after the original section contents.
4696 address += this->original_size_;
4697 address = align_address(address, this->stub_table_->addralign());
4698 off_t offset = this->offset() + (address - this->address());
4699 this->stub_table_->set_address_and_file_offset(address, offset);
4700 address += this->stub_table_->data_size();
4701 gold_assert(address == this->address() + this->current_data_size());
4704 this->set_data_size(this->current_data_size());
4707 // Reset address and file offset.
4709 template<bool big_endian>
4711 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
4713 // Size of the original input section contents.
4714 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
4716 // If this is a stub table owner, account for the stub table size.
4717 if (this->is_stub_table_owner())
4719 Stub_table<big_endian>* stub_table = this->stub_table_;
4721 // Reset the stub table's address and file offset. The
4722 // current data size for child will be updated after that.
4723 stub_table_->reset_address_and_file_offset();
4724 off = align_address(off, stub_table_->addralign());
4725 off += stub_table->current_data_size();
4728 this->set_current_data_size(off);
4731 // Arm_exidx_cantunwind methods.
4733 // Write this to Output file OF for a fixed endianity.
4735 template<bool big_endian>
4737 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
4739 off_t offset = this->offset();
4740 const section_size_type oview_size = 8;
4741 unsigned char* const oview = of->get_output_view(offset, oview_size);
4743 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
4744 Valtype* wv = reinterpret_cast<Valtype*>(oview);
4746 Output_section* os = this->relobj_->output_section(this->shndx_);
4747 gold_assert(os != NULL);
4749 Arm_relobj<big_endian>* arm_relobj =
4750 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
4751 Arm_address output_offset =
4752 arm_relobj->get_output_section_offset(this->shndx_);
4753 Arm_address section_start;
4754 if(output_offset != Arm_relobj<big_endian>::invalid_address)
4755 section_start = os->address() + output_offset;
4758 // Currently this only happens for a relaxed section.
4759 const Output_relaxed_input_section* poris =
4760 os->find_relaxed_input_section(this->relobj_, this->shndx_);
4761 gold_assert(poris != NULL);
4762 section_start = poris->address();
4765 // We always append this to the end of an EXIDX section.
4766 Arm_address output_address =
4767 section_start + this->relobj_->section_size(this->shndx_);
4769 // Write out the entry. The first word either points to the beginning
4770 // or after the end of a text section. The second word is the special
4771 // EXIDX_CANTUNWIND value.
4772 uint32_t prel31_offset = output_address - this->address();
4773 if (utils::has_overflow<31>(offset))
4774 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
4775 elfcpp::Swap<32, big_endian>::writeval(wv, prel31_offset & 0x7fffffffU);
4776 elfcpp::Swap<32, big_endian>::writeval(wv + 1, elfcpp::EXIDX_CANTUNWIND);
4778 of->write_output_view(this->offset(), oview_size, oview);
4781 // Arm_exidx_merged_section methods.
4783 // Constructor for Arm_exidx_merged_section.
4784 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
4785 // SECTION_OFFSET_MAP points to a section offset map describing how
4786 // parts of the input section are mapped to output. DELETED_BYTES is
4787 // the number of bytes deleted from the EXIDX input section.
4789 Arm_exidx_merged_section::Arm_exidx_merged_section(
4790 const Arm_exidx_input_section& exidx_input_section,
4791 const Arm_exidx_section_offset_map& section_offset_map,
4792 uint32_t deleted_bytes)
4793 : Output_relaxed_input_section(exidx_input_section.relobj(),
4794 exidx_input_section.shndx(),
4795 exidx_input_section.addralign()),
4796 exidx_input_section_(exidx_input_section),
4797 section_offset_map_(section_offset_map)
4799 // Fix size here so that we do not need to implement set_final_data_size.
4800 this->set_data_size(exidx_input_section.size() - deleted_bytes);
4801 this->fix_data_size();
4804 // Given an input OBJECT, an input section index SHNDX within that
4805 // object, and an OFFSET relative to the start of that input
4806 // section, return whether or not the corresponding offset within
4807 // the output section is known. If this function returns true, it
4808 // sets *POUTPUT to the output offset. The value -1 indicates that
4809 // this input offset is being discarded.
4812 Arm_exidx_merged_section::do_output_offset(
4813 const Relobj* relobj,
4815 section_offset_type offset,
4816 section_offset_type* poutput) const
4818 // We only handle offsets for the original EXIDX input section.
4819 if (relobj != this->exidx_input_section_.relobj()
4820 || shndx != this->exidx_input_section_.shndx())
4823 section_offset_type section_size =
4824 convert_types<section_offset_type>(this->exidx_input_section_.size());
4825 if (offset < 0 || offset >= section_size)
4826 // Input offset is out of valid range.
4830 // We need to look up the section offset map to determine the output
4831 // offset. Find the reference point in map that is first offset
4832 // bigger than or equal to this offset.
4833 Arm_exidx_section_offset_map::const_iterator p =
4834 this->section_offset_map_.lower_bound(offset);
4836 // The section offset maps are build such that this should not happen if
4837 // input offset is in the valid range.
4838 gold_assert(p != this->section_offset_map_.end());
4840 // We need to check if this is dropped.
4841 section_offset_type ref = p->first;
4842 section_offset_type mapped_ref = p->second;
4844 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
4845 // Offset is present in output.
4846 *poutput = mapped_ref + (offset - ref);
4848 // Offset is discarded owing to EXIDX entry merging.
4855 // Write this to output file OF.
4858 Arm_exidx_merged_section::do_write(Output_file* of)
4860 // If we retain or discard the whole EXIDX input section, we would
4862 gold_assert(this->data_size() != this->exidx_input_section_.size()
4863 && this->data_size() != 0);
4865 off_t offset = this->offset();
4866 const section_size_type oview_size = this->data_size();
4867 unsigned char* const oview = of->get_output_view(offset, oview_size);
4869 Output_section* os = this->relobj()->output_section(this->shndx());
4870 gold_assert(os != NULL);
4872 // Get contents of EXIDX input section.
4873 section_size_type section_size;
4874 const unsigned char* section_contents =
4875 this->relobj()->section_contents(this->shndx(), §ion_size, false);
4876 gold_assert(section_size == this->exidx_input_section_.size());
4878 // Go over spans of input offsets and write only those that are not
4880 section_offset_type in_start = 0;
4881 section_offset_type out_start = 0;
4882 for(Arm_exidx_section_offset_map::const_iterator p =
4883 this->section_offset_map_.begin();
4884 p != this->section_offset_map_.end();
4887 section_offset_type in_end = p->first;
4888 gold_assert(in_end >= in_start);
4889 section_offset_type out_end = p->second;
4890 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
4893 size_t out_chunk_size =
4894 convert_types<size_t>(out_end - out_start + 1);
4895 gold_assert(out_chunk_size == in_chunk_size);
4896 memcpy(oview + out_start, section_contents + in_start,
4898 out_start += out_chunk_size;
4900 in_start += in_chunk_size;
4903 gold_assert(convert_to_section_size_type(out_start) == oview_size);
4904 of->write_output_view(this->offset(), oview_size, oview);
4907 // Arm_exidx_fixup methods.
4909 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
4910 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
4911 // points to the end of the last seen EXIDX section.
4914 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
4916 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
4917 && this->last_input_section_ != NULL)
4919 Relobj* relobj = this->last_input_section_->relobj();
4920 unsigned int text_shndx = this->last_input_section_->link();
4921 Arm_exidx_cantunwind* cantunwind =
4922 new Arm_exidx_cantunwind(relobj, text_shndx);
4923 this->exidx_output_section_->add_output_section_data(cantunwind);
4924 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
4928 // Process an EXIDX section entry in input. Return whether this entry
4929 // can be deleted in the output. SECOND_WORD in the second word of the
4933 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
4936 if (second_word == elfcpp::EXIDX_CANTUNWIND)
4938 // Merge if previous entry is also an EXIDX_CANTUNWIND.
4939 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
4940 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
4942 else if ((second_word & 0x80000000) != 0)
4944 // Inlined unwinding data. Merge if equal to previous.
4945 delete_entry = (this->last_unwind_type_ == UT_INLINED_ENTRY
4946 && this->last_inlined_entry_ == second_word);
4947 this->last_unwind_type_ = UT_INLINED_ENTRY;
4948 this->last_inlined_entry_ = second_word;
4952 // Normal table entry. In theory we could merge these too,
4953 // but duplicate entries are likely to be much less common.
4954 delete_entry = false;
4955 this->last_unwind_type_ = UT_NORMAL_ENTRY;
4957 return delete_entry;
4960 // Update the current section offset map during EXIDX section fix-up.
4961 // If there is no map, create one. INPUT_OFFSET is the offset of a
4962 // reference point, DELETED_BYTES is the number of deleted by in the
4963 // section so far. If DELETE_ENTRY is true, the reference point and
4964 // all offsets after the previous reference point are discarded.
4967 Arm_exidx_fixup::update_offset_map(
4968 section_offset_type input_offset,
4969 section_size_type deleted_bytes,
4972 if (this->section_offset_map_ == NULL)
4973 this->section_offset_map_ = new Arm_exidx_section_offset_map();
4974 section_offset_type output_offset = (delete_entry
4976 : input_offset - deleted_bytes);
4977 (*this->section_offset_map_)[input_offset] = output_offset;
4980 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
4981 // bytes deleted. If some entries are merged, also store a pointer to a newly
4982 // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The
4983 // caller owns the map and is responsible for releasing it after use.
4985 template<bool big_endian>
4987 Arm_exidx_fixup::process_exidx_section(
4988 const Arm_exidx_input_section* exidx_input_section,
4989 Arm_exidx_section_offset_map** psection_offset_map)
4991 Relobj* relobj = exidx_input_section->relobj();
4992 unsigned shndx = exidx_input_section->shndx();
4993 section_size_type section_size;
4994 const unsigned char* section_contents =
4995 relobj->section_contents(shndx, §ion_size, false);
4997 if ((section_size % 8) != 0)
4999 // Something is wrong with this section. Better not touch it.
5000 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5001 relobj->name().c_str(), shndx);
5002 this->last_input_section_ = exidx_input_section;
5003 this->last_unwind_type_ = UT_NONE;
5007 uint32_t deleted_bytes = 0;
5008 bool prev_delete_entry = false;
5009 gold_assert(this->section_offset_map_ == NULL);
5011 for (section_size_type i = 0; i < section_size; i += 8)
5013 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5015 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5016 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5018 bool delete_entry = this->process_exidx_entry(second_word);
5020 // Entry deletion causes changes in output offsets. We use a std::map
5021 // to record these. And entry (x, y) means input offset x
5022 // is mapped to output offset y. If y is invalid_offset, then x is
5023 // dropped in the output. Because of the way std::map::lower_bound
5024 // works, we record the last offset in a region w.r.t to keeping or
5025 // dropping. If there is no entry (x0, y0) for an input offset x0,
5026 // the output offset y0 of it is determined by the output offset y1 of
5027 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5028 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1
5030 if (delete_entry != prev_delete_entry && i != 0)
5031 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5033 // Update total deleted bytes for this entry.
5037 prev_delete_entry = delete_entry;
5040 // If section offset map is not NULL, make an entry for the end of
5042 if (this->section_offset_map_ != NULL)
5043 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5045 *psection_offset_map = this->section_offset_map_;
5046 this->section_offset_map_ = NULL;
5047 this->last_input_section_ = exidx_input_section;
5049 // Set the first output text section so that we can link the EXIDX output
5050 // section to it. Ignore any EXIDX input section that is completely merged.
5051 if (this->first_output_text_section_ == NULL
5052 && deleted_bytes != section_size)
5054 unsigned int link = exidx_input_section->link();
5055 Output_section* os = relobj->output_section(link);
5056 gold_assert(os != NULL);
5057 this->first_output_text_section_ = os;
5060 return deleted_bytes;
5063 // Arm_output_section methods.
5065 // Create a stub group for input sections from BEGIN to END. OWNER
5066 // points to the input section to be the owner a new stub table.
5068 template<bool big_endian>
5070 Arm_output_section<big_endian>::create_stub_group(
5071 Input_section_list::const_iterator begin,
5072 Input_section_list::const_iterator end,
5073 Input_section_list::const_iterator owner,
5074 Target_arm<big_endian>* target,
5075 std::vector<Output_relaxed_input_section*>* new_relaxed_sections)
5077 // We use a different kind of relaxed section in an EXIDX section.
5078 // The static casting from Output_relaxed_input_section to
5079 // Arm_input_section is invalid in an EXIDX section. We are okay
5080 // because we should not be calling this for an EXIDX section.
5081 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5083 // Currently we convert ordinary input sections into relaxed sections only
5084 // at this point but we may want to support creating relaxed input section
5085 // very early. So we check here to see if owner is already a relaxed
5088 Arm_input_section<big_endian>* arm_input_section;
5089 if (owner->is_relaxed_input_section())
5092 Arm_input_section<big_endian>::as_arm_input_section(
5093 owner->relaxed_input_section());
5097 gold_assert(owner->is_input_section());
5098 // Create a new relaxed input section.
5100 target->new_arm_input_section(owner->relobj(), owner->shndx());
5101 new_relaxed_sections->push_back(arm_input_section);
5104 // Create a stub table.
5105 Stub_table<big_endian>* stub_table =
5106 target->new_stub_table(arm_input_section);
5108 arm_input_section->set_stub_table(stub_table);
5110 Input_section_list::const_iterator p = begin;
5111 Input_section_list::const_iterator prev_p;
5113 // Look for input sections or relaxed input sections in [begin ... end].
5116 if (p->is_input_section() || p->is_relaxed_input_section())
5118 // The stub table information for input sections live
5119 // in their objects.
5120 Arm_relobj<big_endian>* arm_relobj =
5121 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5122 arm_relobj->set_stub_table(p->shndx(), stub_table);
5126 while (prev_p != end);
5129 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5130 // of stub groups. We grow a stub group by adding input section until the
5131 // size is just below GROUP_SIZE. The last input section will be converted
5132 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5133 // input section after the stub table, effectively double the group size.
5135 // This is similar to the group_sections() function in elf32-arm.c but is
5136 // implemented differently.
5138 template<bool big_endian>
5140 Arm_output_section<big_endian>::group_sections(
5141 section_size_type group_size,
5142 bool stubs_always_after_branch,
5143 Target_arm<big_endian>* target)
5145 // We only care about sections containing code.
5146 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5149 // States for grouping.
5152 // No group is being built.
5154 // A group is being built but the stub table is not found yet.
5155 // We keep group a stub group until the size is just under GROUP_SIZE.
5156 // The last input section in the group will be used as the stub table.
5157 FINDING_STUB_SECTION,
5158 // A group is being built and we have already found a stub table.
5159 // We enter this state to grow a stub group by adding input section
5160 // after the stub table. This effectively doubles the group size.
5164 // Any newly created relaxed sections are stored here.
5165 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5167 State state = NO_GROUP;
5168 section_size_type off = 0;
5169 section_size_type group_begin_offset = 0;
5170 section_size_type group_end_offset = 0;
5171 section_size_type stub_table_end_offset = 0;
5172 Input_section_list::const_iterator group_begin =
5173 this->input_sections().end();
5174 Input_section_list::const_iterator stub_table =
5175 this->input_sections().end();
5176 Input_section_list::const_iterator group_end = this->input_sections().end();
5177 for (Input_section_list::const_iterator p = this->input_sections().begin();
5178 p != this->input_sections().end();
5181 section_size_type section_begin_offset =
5182 align_address(off, p->addralign());
5183 section_size_type section_end_offset =
5184 section_begin_offset + p->data_size();
5186 // Check to see if we should group the previously seens sections.
5192 case FINDING_STUB_SECTION:
5193 // Adding this section makes the group larger than GROUP_SIZE.
5194 if (section_end_offset - group_begin_offset >= group_size)
5196 if (stubs_always_after_branch)
5198 gold_assert(group_end != this->input_sections().end());
5199 this->create_stub_group(group_begin, group_end, group_end,
5200 target, &new_relaxed_sections);
5205 // But wait, there's more! Input sections up to
5206 // stub_group_size bytes after the stub table can be
5207 // handled by it too.
5208 state = HAS_STUB_SECTION;
5209 stub_table = group_end;
5210 stub_table_end_offset = group_end_offset;
5215 case HAS_STUB_SECTION:
5216 // Adding this section makes the post stub-section group larger
5218 if (section_end_offset - stub_table_end_offset >= group_size)
5220 gold_assert(group_end != this->input_sections().end());
5221 this->create_stub_group(group_begin, group_end, stub_table,
5222 target, &new_relaxed_sections);
5231 // If we see an input section and currently there is no group, start
5232 // a new one. Skip any empty sections.
5233 if ((p->is_input_section() || p->is_relaxed_input_section())
5234 && (p->relobj()->section_size(p->shndx()) != 0))
5236 if (state == NO_GROUP)
5238 state = FINDING_STUB_SECTION;
5240 group_begin_offset = section_begin_offset;
5243 // Keep track of the last input section seen.
5245 group_end_offset = section_end_offset;
5248 off = section_end_offset;
5251 // Create a stub group for any ungrouped sections.
5252 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5254 gold_assert(group_end != this->input_sections().end());
5255 this->create_stub_group(group_begin, group_end,
5256 (state == FINDING_STUB_SECTION
5259 target, &new_relaxed_sections);
5262 // Convert input section into relaxed input section in a batch.
5263 if (!new_relaxed_sections.empty())
5264 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5266 // Update the section offsets
5267 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5269 Arm_relobj<big_endian>* arm_relobj =
5270 Arm_relobj<big_endian>::as_arm_relobj(
5271 new_relaxed_sections[i]->relobj());
5272 unsigned int shndx = new_relaxed_sections[i]->shndx();
5273 // Tell Arm_relobj that this input section is converted.
5274 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5278 // Append non empty text sections in this to LIST in ascending
5279 // order of their position in this.
5281 template<bool big_endian>
5283 Arm_output_section<big_endian>::append_text_sections_to_list(
5284 Text_section_list* list)
5286 // We only care about text sections.
5287 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5290 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5292 for (Input_section_list::const_iterator p = this->input_sections().begin();
5293 p != this->input_sections().end();
5296 // We only care about plain or relaxed input sections. We also
5297 // ignore any merged sections.
5298 if ((p->is_input_section() || p->is_relaxed_input_section())
5299 && p->data_size() != 0)
5300 list->push_back(Text_section_list::value_type(p->relobj(),
5305 template<bool big_endian>
5307 Arm_output_section<big_endian>::fix_exidx_coverage(
5308 const Text_section_list& sorted_text_sections,
5309 Symbol_table* symtab)
5311 // We should only do this for the EXIDX output section.
5312 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5314 // We don't want the relaxation loop to undo these changes, so we discard
5315 // the current saved states and take another one after the fix-up.
5316 this->discard_states();
5318 // Remove all input sections.
5319 uint64_t address = this->address();
5320 typedef std::list<Simple_input_section> Simple_input_section_list;
5321 Simple_input_section_list input_sections;
5322 this->reset_address_and_file_offset();
5323 this->get_input_sections(address, std::string(""), &input_sections);
5325 if (!this->input_sections().empty())
5326 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5328 // Go through all the known input sections and record them.
5329 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5330 Section_id_set known_input_sections;
5331 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5332 p != input_sections.end();
5335 // This should never happen. At this point, we should only see
5336 // plain EXIDX input sections.
5337 gold_assert(!p->is_relaxed_input_section());
5338 known_input_sections.insert(Section_id(p->relobj(), p->shndx()));
5341 Arm_exidx_fixup exidx_fixup(this);
5343 // Go over the sorted text sections.
5344 Section_id_set processed_input_sections;
5345 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5346 p != sorted_text_sections.end();
5349 Relobj* relobj = p->first;
5350 unsigned int shndx = p->second;
5352 Arm_relobj<big_endian>* arm_relobj =
5353 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5354 const Arm_exidx_input_section* exidx_input_section =
5355 arm_relobj->exidx_input_section_by_link(shndx);
5357 // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND
5358 // entry pointing to the end of the last seen EXIDX section.
5359 if (exidx_input_section == NULL)
5361 exidx_fixup.add_exidx_cantunwind_as_needed();
5365 Relobj* exidx_relobj = exidx_input_section->relobj();
5366 unsigned int exidx_shndx = exidx_input_section->shndx();
5367 Section_id sid(exidx_relobj, exidx_shndx);
5368 if (known_input_sections.find(sid) == known_input_sections.end())
5370 // This is odd. We have not seen this EXIDX input section before.
5371 // We cannot do fix-up.
5372 gold_error(_("EXIDX section %u of %s is not in EXIDX output section"),
5373 exidx_shndx, exidx_relobj->name().c_str());
5374 exidx_fixup.add_exidx_cantunwind_as_needed();
5378 // Fix up coverage and append input section to output data list.
5379 Arm_exidx_section_offset_map* section_offset_map = NULL;
5380 uint32_t deleted_bytes =
5381 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5382 §ion_offset_map);
5384 if (deleted_bytes == exidx_input_section->size())
5386 // The whole EXIDX section got merged. Remove it from output.
5387 gold_assert(section_offset_map == NULL);
5388 exidx_relobj->set_output_section(exidx_shndx, NULL);
5390 // All local symbols defined in this input section will be dropped.
5391 // We need to adjust output local symbol count.
5392 arm_relobj->set_output_local_symbol_count_needs_update();
5394 else if (deleted_bytes > 0)
5396 // Some entries are merged. We need to convert this EXIDX input
5397 // section into a relaxed section.
5398 gold_assert(section_offset_map != NULL);
5399 Arm_exidx_merged_section* merged_section =
5400 new Arm_exidx_merged_section(*exidx_input_section,
5401 *section_offset_map, deleted_bytes);
5402 this->add_relaxed_input_section(merged_section);
5403 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
5405 // All local symbols defined in discarded portions of this input
5406 // section will be dropped. We need to adjust output local symbol
5408 arm_relobj->set_output_local_symbol_count_needs_update();
5412 // Just add back the EXIDX input section.
5413 gold_assert(section_offset_map == NULL);
5414 Output_section::Simple_input_section sis(exidx_relobj, exidx_shndx);
5415 this->add_simple_input_section(sis, exidx_input_section->size(),
5416 exidx_input_section->addralign());
5419 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
5422 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5423 exidx_fixup.add_exidx_cantunwind_as_needed();
5425 // Remove any known EXIDX input sections that are not processed.
5426 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5427 p != input_sections.end();
5430 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
5431 == processed_input_sections.end())
5433 // We only discard a known EXIDX section because its linked
5434 // text section has been folded by ICF.
5435 Arm_relobj<big_endian>* arm_relobj =
5436 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5437 const Arm_exidx_input_section* exidx_input_section =
5438 arm_relobj->exidx_input_section_by_shndx(p->shndx());
5439 gold_assert(exidx_input_section != NULL);
5440 unsigned int text_shndx = exidx_input_section->link();
5441 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
5443 // Remove this from link.
5444 p->relobj()->set_output_section(p->shndx(), NULL);
5448 // Link exidx output section to the first seen output section and
5449 // set correct entry size.
5450 this->set_link_section(exidx_fixup.first_output_text_section());
5451 this->set_entsize(8);
5453 // Make changes permanent.
5454 this->save_states();
5455 this->set_section_offsets_need_adjustment();
5458 // Arm_relobj methods.
5460 // Determine if an input section is scannable for stub processing. SHDR is
5461 // the header of the section and SHNDX is the section index. OS is the output
5462 // section for the input section and SYMTAB is the global symbol table used to
5463 // look up ICF information.
5465 template<bool big_endian>
5467 Arm_relobj<big_endian>::section_is_scannable(
5468 const elfcpp::Shdr<32, big_endian>& shdr,
5470 const Output_section* os,
5471 const Symbol_table *symtab)
5473 // Skip any empty sections, unallocated sections or sections whose
5474 // type are not SHT_PROGBITS.
5475 if (shdr.get_sh_size() == 0
5476 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
5477 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
5480 // Skip any discarded or ICF'ed sections.
5481 if (os == NULL || symtab->is_section_folded(this, shndx))
5484 // If this requires special offset handling, check to see if it is
5485 // a relaxed section. If this is not, then it is a merged section that
5486 // we cannot handle.
5487 if (this->is_output_section_offset_invalid(shndx))
5489 const Output_relaxed_input_section* poris =
5490 os->find_relaxed_input_section(this, shndx);
5498 // Determine if we want to scan the SHNDX-th section for relocation stubs.
5499 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5501 template<bool big_endian>
5503 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
5504 const elfcpp::Shdr<32, big_endian>& shdr,
5505 const Relobj::Output_sections& out_sections,
5506 const Symbol_table *symtab,
5507 const unsigned char* pshdrs)
5509 unsigned int sh_type = shdr.get_sh_type();
5510 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
5513 // Ignore empty section.
5514 off_t sh_size = shdr.get_sh_size();
5518 // Ignore reloc section with unexpected symbol table. The
5519 // error will be reported in the final link.
5520 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
5523 unsigned int reloc_size;
5524 if (sh_type == elfcpp::SHT_REL)
5525 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5527 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5529 // Ignore reloc section with unexpected entsize or uneven size.
5530 // The error will be reported in the final link.
5531 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
5534 // Ignore reloc section with bad info. This error will be
5535 // reported in the final link.
5536 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5537 if (index >= this->shnum())
5540 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5541 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
5542 return this->section_is_scannable(text_shdr, index,
5543 out_sections[index], symtab);
5546 // Return the output address of either a plain input section or a relaxed
5547 // input section. SHNDX is the section index. We define and use this
5548 // instead of calling Output_section::output_address because that is slow
5549 // for large output.
5551 template<bool big_endian>
5553 Arm_relobj<big_endian>::simple_input_section_output_address(
5557 if (this->is_output_section_offset_invalid(shndx))
5559 const Output_relaxed_input_section* poris =
5560 os->find_relaxed_input_section(this, shndx);
5561 // We do not handle merged sections here.
5562 gold_assert(poris != NULL);
5563 return poris->address();
5566 return os->address() + this->get_output_section_offset(shndx);
5569 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
5570 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5572 template<bool big_endian>
5574 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
5575 const elfcpp::Shdr<32, big_endian>& shdr,
5578 const Symbol_table* symtab)
5580 if (!this->section_is_scannable(shdr, shndx, os, symtab))
5583 // If the section does not cross any 4K-boundaries, it does not need to
5585 Arm_address address = this->simple_input_section_output_address(shndx, os);
5586 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
5592 // Scan a section for Cortex-A8 workaround.
5594 template<bool big_endian>
5596 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
5597 const elfcpp::Shdr<32, big_endian>& shdr,
5600 Target_arm<big_endian>* arm_target)
5602 Arm_address output_address =
5603 this->simple_input_section_output_address(shndx, os);
5605 // Get the section contents.
5606 section_size_type input_view_size = 0;
5607 const unsigned char* input_view =
5608 this->section_contents(shndx, &input_view_size, false);
5610 // We need to go through the mapping symbols to determine what to
5611 // scan. There are two reasons. First, we should look at THUMB code and
5612 // THUMB code only. Second, we only want to look at the 4K-page boundary
5613 // to speed up the scanning.
5615 // Look for the first mapping symbol in this section. It should be
5617 Mapping_symbol_position section_start(shndx, 0);
5618 typename Mapping_symbols_info::const_iterator p =
5619 this->mapping_symbols_info_.lower_bound(section_start);
5621 if (p == this->mapping_symbols_info_.end()
5622 || p->first != section_start)
5624 gold_warning(_("Cortex-A8 erratum scanning failed because there "
5625 "is no mapping symbols for section %u of %s"),
5626 shndx, this->name().c_str());
5630 while (p != this->mapping_symbols_info_.end()
5631 && p->first.first == shndx)
5633 typename Mapping_symbols_info::const_iterator next =
5634 this->mapping_symbols_info_.upper_bound(p->first);
5636 // Only scan part of a section with THUMB code.
5637 if (p->second == 't')
5639 // Determine the end of this range.
5640 section_size_type span_start =
5641 convert_to_section_size_type(p->first.second);
5642 section_size_type span_end;
5643 if (next != this->mapping_symbols_info_.end()
5644 && next->first.first == shndx)
5645 span_end = convert_to_section_size_type(next->first.second);
5647 span_end = convert_to_section_size_type(shdr.get_sh_size());
5649 if (((span_start + output_address) & ~0xfffUL)
5650 != ((span_end + output_address - 1) & ~0xfffUL))
5652 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
5653 span_start, span_end,
5663 // Scan relocations for stub generation.
5665 template<bool big_endian>
5667 Arm_relobj<big_endian>::scan_sections_for_stubs(
5668 Target_arm<big_endian>* arm_target,
5669 const Symbol_table* symtab,
5670 const Layout* layout)
5672 unsigned int shnum = this->shnum();
5673 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5675 // Read the section headers.
5676 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
5680 // To speed up processing, we set up hash tables for fast lookup of
5681 // input offsets to output addresses.
5682 this->initialize_input_to_output_maps();
5684 const Relobj::Output_sections& out_sections(this->output_sections());
5686 Relocate_info<32, big_endian> relinfo;
5687 relinfo.symtab = symtab;
5688 relinfo.layout = layout;
5689 relinfo.object = this;
5691 // Do relocation stubs scanning.
5692 const unsigned char* p = pshdrs + shdr_size;
5693 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5695 const elfcpp::Shdr<32, big_endian> shdr(p);
5696 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
5699 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5700 Arm_address output_offset = this->get_output_section_offset(index);
5701 Arm_address output_address;
5702 if(output_offset != invalid_address)
5703 output_address = out_sections[index]->address() + output_offset;
5706 // Currently this only happens for a relaxed section.
5707 const Output_relaxed_input_section* poris =
5708 out_sections[index]->find_relaxed_input_section(this, index);
5709 gold_assert(poris != NULL);
5710 output_address = poris->address();
5713 // Get the relocations.
5714 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
5718 // Get the section contents. This does work for the case in which
5719 // we modify the contents of an input section. We need to pass the
5720 // output view under such circumstances.
5721 section_size_type input_view_size = 0;
5722 const unsigned char* input_view =
5723 this->section_contents(index, &input_view_size, false);
5725 relinfo.reloc_shndx = i;
5726 relinfo.data_shndx = index;
5727 unsigned int sh_type = shdr.get_sh_type();
5728 unsigned int reloc_size;
5729 if (sh_type == elfcpp::SHT_REL)
5730 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5732 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5734 Output_section* os = out_sections[index];
5735 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
5736 shdr.get_sh_size() / reloc_size,
5738 output_offset == invalid_address,
5739 input_view, output_address,
5744 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
5745 // after its relocation section, if there is one, is processed for
5746 // relocation stubs. Merging this loop with the one above would have been
5747 // complicated since we would have had to make sure that relocation stub
5748 // scanning is done first.
5749 if (arm_target->fix_cortex_a8())
5751 const unsigned char* p = pshdrs + shdr_size;
5752 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5754 const elfcpp::Shdr<32, big_endian> shdr(p);
5755 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
5758 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
5763 // After we've done the relocations, we release the hash tables,
5764 // since we no longer need them.
5765 this->free_input_to_output_maps();
5768 // Count the local symbols. The ARM backend needs to know if a symbol
5769 // is a THUMB function or not. For global symbols, it is easy because
5770 // the Symbol object keeps the ELF symbol type. For local symbol it is
5771 // harder because we cannot access this information. So we override the
5772 // do_count_local_symbol in parent and scan local symbols to mark
5773 // THUMB functions. This is not the most efficient way but I do not want to
5774 // slow down other ports by calling a per symbol targer hook inside
5775 // Sized_relobj<size, big_endian>::do_count_local_symbols.
5777 template<bool big_endian>
5779 Arm_relobj<big_endian>::do_count_local_symbols(
5780 Stringpool_template<char>* pool,
5781 Stringpool_template<char>* dynpool)
5783 // We need to fix-up the values of any local symbols whose type are
5786 // Ask parent to count the local symbols.
5787 Sized_relobj<32, big_endian>::do_count_local_symbols(pool, dynpool);
5788 const unsigned int loccount = this->local_symbol_count();
5792 // Intialize the thumb function bit-vector.
5793 std::vector<bool> empty_vector(loccount, false);
5794 this->local_symbol_is_thumb_function_.swap(empty_vector);
5796 // Read the symbol table section header.
5797 const unsigned int symtab_shndx = this->symtab_shndx();
5798 elfcpp::Shdr<32, big_endian>
5799 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
5800 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
5802 // Read the local symbols.
5803 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
5804 gold_assert(loccount == symtabshdr.get_sh_info());
5805 off_t locsize = loccount * sym_size;
5806 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
5807 locsize, true, true);
5809 // For mapping symbol processing, we need to read the symbol names.
5810 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
5811 if (strtab_shndx >= this->shnum())
5813 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
5817 elfcpp::Shdr<32, big_endian>
5818 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
5819 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
5821 this->error(_("symbol table name section has wrong type: %u"),
5822 static_cast<unsigned int>(strtabshdr.get_sh_type()));
5825 const char* pnames =
5826 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
5827 strtabshdr.get_sh_size(),
5830 // Loop over the local symbols and mark any local symbols pointing
5831 // to THUMB functions.
5833 // Skip the first dummy symbol.
5835 typename Sized_relobj<32, big_endian>::Local_values* plocal_values =
5836 this->local_values();
5837 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
5839 elfcpp::Sym<32, big_endian> sym(psyms);
5840 elfcpp::STT st_type = sym.get_st_type();
5841 Symbol_value<32>& lv((*plocal_values)[i]);
5842 Arm_address input_value = lv.input_value();
5844 // Check to see if this is a mapping symbol.
5845 const char* sym_name = pnames + sym.get_st_name();
5846 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
5848 unsigned int input_shndx = sym.get_st_shndx();
5850 // Strip of LSB in case this is a THUMB symbol.
5851 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
5852 this->mapping_symbols_info_[msp] = sym_name[1];
5855 if (st_type == elfcpp::STT_ARM_TFUNC
5856 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
5858 // This is a THUMB function. Mark this and canonicalize the
5859 // symbol value by setting LSB.
5860 this->local_symbol_is_thumb_function_[i] = true;
5861 if ((input_value & 1) == 0)
5862 lv.set_input_value(input_value | 1);
5867 // Relocate sections.
5868 template<bool big_endian>
5870 Arm_relobj<big_endian>::do_relocate_sections(
5871 const Symbol_table* symtab,
5872 const Layout* layout,
5873 const unsigned char* pshdrs,
5874 typename Sized_relobj<32, big_endian>::Views* pviews)
5876 // Call parent to relocate sections.
5877 Sized_relobj<32, big_endian>::do_relocate_sections(symtab, layout, pshdrs,
5880 // We do not generate stubs if doing a relocatable link.
5881 if (parameters->options().relocatable())
5884 // Relocate stub tables.
5885 unsigned int shnum = this->shnum();
5887 Target_arm<big_endian>* arm_target =
5888 Target_arm<big_endian>::default_target();
5890 Relocate_info<32, big_endian> relinfo;
5891 relinfo.symtab = symtab;
5892 relinfo.layout = layout;
5893 relinfo.object = this;
5895 for (unsigned int i = 1; i < shnum; ++i)
5897 Arm_input_section<big_endian>* arm_input_section =
5898 arm_target->find_arm_input_section(this, i);
5900 if (arm_input_section != NULL
5901 && arm_input_section->is_stub_table_owner()
5902 && !arm_input_section->stub_table()->empty())
5904 // We cannot discard a section if it owns a stub table.
5905 Output_section* os = this->output_section(i);
5906 gold_assert(os != NULL);
5908 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
5909 relinfo.reloc_shdr = NULL;
5910 relinfo.data_shndx = i;
5911 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
5913 gold_assert((*pviews)[i].view != NULL);
5915 // We are passed the output section view. Adjust it to cover the
5917 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
5918 gold_assert((stub_table->address() >= (*pviews)[i].address)
5919 && ((stub_table->address() + stub_table->data_size())
5920 <= (*pviews)[i].address + (*pviews)[i].view_size));
5922 off_t offset = stub_table->address() - (*pviews)[i].address;
5923 unsigned char* view = (*pviews)[i].view + offset;
5924 Arm_address address = stub_table->address();
5925 section_size_type view_size = stub_table->data_size();
5927 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
5931 // Apply Cortex A8 workaround if applicable.
5932 if (this->section_has_cortex_a8_workaround(i))
5934 unsigned char* view = (*pviews)[i].view;
5935 Arm_address view_address = (*pviews)[i].address;
5936 section_size_type view_size = (*pviews)[i].view_size;
5937 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
5939 // Adjust view to cover section.
5940 Output_section* os = this->output_section(i);
5941 gold_assert(os != NULL);
5942 Arm_address section_address =
5943 this->simple_input_section_output_address(i, os);
5944 uint64_t section_size = this->section_size(i);
5946 gold_assert(section_address >= view_address
5947 && ((section_address + section_size)
5948 <= (view_address + view_size)));
5950 unsigned char* section_view = view + (section_address - view_address);
5952 // Apply the Cortex-A8 workaround to the output address range
5953 // corresponding to this input section.
5954 stub_table->apply_cortex_a8_workaround_to_address_range(
5963 // Create a new EXIDX input section object for EXIDX section SHNDX with
5966 template<bool big_endian>
5968 Arm_relobj<big_endian>::make_exidx_input_section(
5970 const elfcpp::Shdr<32, big_endian>& shdr)
5972 // Link .text section to its .ARM.exidx section in the same object.
5973 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
5975 // Issue an error and ignore this EXIDX section if it does not point
5976 // to any text section.
5977 if (text_shndx == elfcpp::SHN_UNDEF)
5979 gold_error(_("EXIDX section %u in %s has no linked text section"),
5980 shndx, this->name().c_str());
5984 // Issue an error and ignore this EXIDX section if it points to a text
5985 // section already has an EXIDX section.
5986 if (this->exidx_section_map_[text_shndx] != NULL)
5988 gold_error(_("EXIDX sections %u and %u both link to text section %u "
5990 shndx, this->exidx_section_map_[text_shndx]->shndx(),
5991 text_shndx, this->name().c_str());
5995 // Create an Arm_exidx_input_section object for this EXIDX section.
5996 Arm_exidx_input_section* exidx_input_section =
5997 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
5998 shdr.get_sh_addralign());
5999 this->exidx_section_map_[text_shndx] = exidx_input_section;
6001 // Also map the EXIDX section index to this.
6002 gold_assert(this->exidx_section_map_[shndx] == NULL);
6003 this->exidx_section_map_[shndx] = exidx_input_section;
6006 // Read the symbol information.
6008 template<bool big_endian>
6010 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6012 // Call parent class to read symbol information.
6013 Sized_relobj<32, big_endian>::do_read_symbols(sd);
6015 // Read processor-specific flags in ELF file header.
6016 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6017 elfcpp::Elf_sizes<32>::ehdr_size,
6019 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6020 this->processor_specific_flags_ = ehdr.get_e_flags();
6022 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6024 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6025 const unsigned char *ps =
6026 sd->section_headers->data() + shdr_size;
6027 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6029 elfcpp::Shdr<32, big_endian> shdr(ps);
6030 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6032 gold_assert(this->attributes_section_data_ == NULL);
6033 section_offset_type section_offset = shdr.get_sh_offset();
6034 section_size_type section_size =
6035 convert_to_section_size_type(shdr.get_sh_size());
6036 File_view* view = this->get_lasting_view(section_offset,
6037 section_size, true, false);
6038 this->attributes_section_data_ =
6039 new Attributes_section_data(view->data(), section_size);
6041 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6042 this->make_exidx_input_section(i, shdr);
6046 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6047 // sections for unwinding. These sections are referenced implicitly by
6048 // text sections linked in the section headers. If we ignore these implict
6049 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6050 // will be garbage-collected incorrectly. Hence we override the same function
6051 // in the base class to handle these implicit references.
6053 template<bool big_endian>
6055 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6057 Read_relocs_data* rd)
6059 // First, call base class method to process relocations in this object.
6060 Sized_relobj<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6062 unsigned int shnum = this->shnum();
6063 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6064 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6068 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6069 // to these from the linked text sections.
6070 const unsigned char* ps = pshdrs + shdr_size;
6071 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6073 elfcpp::Shdr<32, big_endian> shdr(ps);
6074 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6076 // Found an .ARM.exidx section, add it to the set of reachable
6077 // sections from its linked text section.
6078 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6079 symtab->gc()->add_reference(this, text_shndx, this, i);
6084 // Update output local symbol count. Owing to EXIDX entry merging, some local
6085 // symbols will be removed in output. Adjust output local symbol count
6086 // accordingly. We can only changed the static output local symbol count. It
6087 // is too late to change the dynamic symbols.
6089 template<bool big_endian>
6091 Arm_relobj<big_endian>::update_output_local_symbol_count()
6093 // Caller should check that this needs updating. We want caller checking
6094 // because output_local_symbol_count_needs_update() is most likely inlined.
6095 gold_assert(this->output_local_symbol_count_needs_update_);
6097 gold_assert(this->symtab_shndx() != -1U);
6098 if (this->symtab_shndx() == 0)
6100 // This object has no symbols. Weird but legal.
6104 // Read the symbol table section header.
6105 const unsigned int symtab_shndx = this->symtab_shndx();
6106 elfcpp::Shdr<32, big_endian>
6107 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6108 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6110 // Read the local symbols.
6111 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6112 const unsigned int loccount = this->local_symbol_count();
6113 gold_assert(loccount == symtabshdr.get_sh_info());
6114 off_t locsize = loccount * sym_size;
6115 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6116 locsize, true, true);
6118 // Loop over the local symbols.
6120 typedef typename Sized_relobj<32, big_endian>::Output_sections
6122 const Output_sections& out_sections(this->output_sections());
6123 unsigned int shnum = this->shnum();
6124 unsigned int count = 0;
6125 // Skip the first, dummy, symbol.
6127 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6129 elfcpp::Sym<32, big_endian> sym(psyms);
6131 Symbol_value<32>& lv((*this->local_values())[i]);
6133 // This local symbol was already discarded by do_count_local_symbols.
6134 if (!lv.needs_output_symtab_entry())
6138 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
6143 Output_section* os = out_sections[shndx];
6145 // This local symbol no longer has an output section. Discard it.
6148 lv.set_no_output_symtab_entry();
6152 // Currently we only discard parts of EXIDX input sections.
6153 // We explicitly check for a merged EXIDX input section to avoid
6154 // calling Output_section_data::output_offset unless necessary.
6155 if ((this->get_output_section_offset(shndx) == invalid_address)
6156 && (this->exidx_input_section_by_shndx(shndx) != NULL))
6158 section_offset_type output_offset =
6159 os->output_offset(this, shndx, lv.input_value());
6160 if (output_offset == -1)
6162 // This symbol is defined in a part of an EXIDX input section
6163 // that is discarded due to entry merging.
6164 lv.set_no_output_symtab_entry();
6173 this->set_output_local_symbol_count(count);
6174 this->output_local_symbol_count_needs_update_ = false;
6177 // Arm_dynobj methods.
6179 // Read the symbol information.
6181 template<bool big_endian>
6183 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6185 // Call parent class to read symbol information.
6186 Sized_dynobj<32, big_endian>::do_read_symbols(sd);
6188 // Read processor-specific flags in ELF file header.
6189 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6190 elfcpp::Elf_sizes<32>::ehdr_size,
6192 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6193 this->processor_specific_flags_ = ehdr.get_e_flags();
6195 // Read the attributes section if there is one.
6196 // We read from the end because gas seems to put it near the end of
6197 // the section headers.
6198 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6199 const unsigned char *ps =
6200 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
6201 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
6203 elfcpp::Shdr<32, big_endian> shdr(ps);
6204 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6206 section_offset_type section_offset = shdr.get_sh_offset();
6207 section_size_type section_size =
6208 convert_to_section_size_type(shdr.get_sh_size());
6209 File_view* view = this->get_lasting_view(section_offset,
6210 section_size, true, false);
6211 this->attributes_section_data_ =
6212 new Attributes_section_data(view->data(), section_size);
6218 // Stub_addend_reader methods.
6220 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6222 template<bool big_endian>
6223 elfcpp::Elf_types<32>::Elf_Swxword
6224 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
6225 unsigned int r_type,
6226 const unsigned char* view,
6227 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
6229 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
6233 case elfcpp::R_ARM_CALL:
6234 case elfcpp::R_ARM_JUMP24:
6235 case elfcpp::R_ARM_PLT32:
6237 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
6238 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6239 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
6240 return utils::sign_extend<26>(val << 2);
6243 case elfcpp::R_ARM_THM_CALL:
6244 case elfcpp::R_ARM_THM_JUMP24:
6245 case elfcpp::R_ARM_THM_XPC22:
6247 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6248 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6249 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6250 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6251 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
6254 case elfcpp::R_ARM_THM_JUMP19:
6256 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6257 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6258 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6259 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6260 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
6268 // A class to handle the PLT data.
6270 template<bool big_endian>
6271 class Output_data_plt_arm : public Output_section_data
6274 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
6277 Output_data_plt_arm(Layout*, Output_data_space*);
6279 // Add an entry to the PLT.
6281 add_entry(Symbol* gsym);
6283 // Return the .rel.plt section data.
6284 const Reloc_section*
6286 { return this->rel_; }
6290 do_adjust_output_section(Output_section* os);
6292 // Write to a map file.
6294 do_print_to_mapfile(Mapfile* mapfile) const
6295 { mapfile->print_output_data(this, _("** PLT")); }
6298 // Template for the first PLT entry.
6299 static const uint32_t first_plt_entry[5];
6301 // Template for subsequent PLT entries.
6302 static const uint32_t plt_entry[3];
6304 // Set the final size.
6306 set_final_data_size()
6308 this->set_data_size(sizeof(first_plt_entry)
6309 + this->count_ * sizeof(plt_entry));
6312 // Write out the PLT data.
6314 do_write(Output_file*);
6316 // The reloc section.
6317 Reloc_section* rel_;
6318 // The .got.plt section.
6319 Output_data_space* got_plt_;
6320 // The number of PLT entries.
6321 unsigned int count_;
6324 // Create the PLT section. The ordinary .got section is an argument,
6325 // since we need to refer to the start. We also create our own .got
6326 // section just for PLT entries.
6328 template<bool big_endian>
6329 Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout,
6330 Output_data_space* got_plt)
6331 : Output_section_data(4), got_plt_(got_plt), count_(0)
6333 this->rel_ = new Reloc_section(false);
6334 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
6335 elfcpp::SHF_ALLOC, this->rel_, true, false,
6339 template<bool big_endian>
6341 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
6346 // Add an entry to the PLT.
6348 template<bool big_endian>
6350 Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym)
6352 gold_assert(!gsym->has_plt_offset());
6354 // Note that when setting the PLT offset we skip the initial
6355 // reserved PLT entry.
6356 gsym->set_plt_offset((this->count_) * sizeof(plt_entry)
6357 + sizeof(first_plt_entry));
6361 section_offset_type got_offset = this->got_plt_->current_data_size();
6363 // Every PLT entry needs a GOT entry which points back to the PLT
6364 // entry (this will be changed by the dynamic linker, normally
6365 // lazily when the function is called).
6366 this->got_plt_->set_current_data_size(got_offset + 4);
6368 // Every PLT entry needs a reloc.
6369 gsym->set_needs_dynsym_entry();
6370 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
6373 // Note that we don't need to save the symbol. The contents of the
6374 // PLT are independent of which symbols are used. The symbols only
6375 // appear in the relocations.
6379 // FIXME: This is not very flexible. Right now this has only been tested
6380 // on armv5te. If we are to support additional architecture features like
6381 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
6383 // The first entry in the PLT.
6384 template<bool big_endian>
6385 const uint32_t Output_data_plt_arm<big_endian>::first_plt_entry[5] =
6387 0xe52de004, // str lr, [sp, #-4]!
6388 0xe59fe004, // ldr lr, [pc, #4]
6389 0xe08fe00e, // add lr, pc, lr
6390 0xe5bef008, // ldr pc, [lr, #8]!
6391 0x00000000, // &GOT[0] - .
6394 // Subsequent entries in the PLT.
6396 template<bool big_endian>
6397 const uint32_t Output_data_plt_arm<big_endian>::plt_entry[3] =
6399 0xe28fc600, // add ip, pc, #0xNN00000
6400 0xe28cca00, // add ip, ip, #0xNN000
6401 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
6404 // Write out the PLT. This uses the hand-coded instructions above,
6405 // and adjusts them as needed. This is all specified by the arm ELF
6406 // Processor Supplement.
6408 template<bool big_endian>
6410 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
6412 const off_t offset = this->offset();
6413 const section_size_type oview_size =
6414 convert_to_section_size_type(this->data_size());
6415 unsigned char* const oview = of->get_output_view(offset, oview_size);
6417 const off_t got_file_offset = this->got_plt_->offset();
6418 const section_size_type got_size =
6419 convert_to_section_size_type(this->got_plt_->data_size());
6420 unsigned char* const got_view = of->get_output_view(got_file_offset,
6422 unsigned char* pov = oview;
6424 Arm_address plt_address = this->address();
6425 Arm_address got_address = this->got_plt_->address();
6427 // Write first PLT entry. All but the last word are constants.
6428 const size_t num_first_plt_words = (sizeof(first_plt_entry)
6429 / sizeof(plt_entry[0]));
6430 for (size_t i = 0; i < num_first_plt_words - 1; i++)
6431 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
6432 // Last word in first PLT entry is &GOT[0] - .
6433 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
6434 got_address - (plt_address + 16));
6435 pov += sizeof(first_plt_entry);
6437 unsigned char* got_pov = got_view;
6439 memset(got_pov, 0, 12);
6442 const int rel_size = elfcpp::Elf_sizes<32>::rel_size;
6443 unsigned int plt_offset = sizeof(first_plt_entry);
6444 unsigned int plt_rel_offset = 0;
6445 unsigned int got_offset = 12;
6446 const unsigned int count = this->count_;
6447 for (unsigned int i = 0;
6450 pov += sizeof(plt_entry),
6452 plt_offset += sizeof(plt_entry),
6453 plt_rel_offset += rel_size,
6456 // Set and adjust the PLT entry itself.
6457 int32_t offset = ((got_address + got_offset)
6458 - (plt_address + plt_offset + 8));
6460 gold_assert(offset >= 0 && offset < 0x0fffffff);
6461 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
6462 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
6463 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
6464 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
6465 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
6466 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
6468 // Set the entry in the GOT.
6469 elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address);
6472 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
6473 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
6475 of->write_output_view(offset, oview_size, oview);
6476 of->write_output_view(got_file_offset, got_size, got_view);
6479 // Create a PLT entry for a global symbol.
6481 template<bool big_endian>
6483 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
6486 if (gsym->has_plt_offset())
6489 if (this->plt_ == NULL)
6491 // Create the GOT sections first.
6492 this->got_section(symtab, layout);
6494 this->plt_ = new Output_data_plt_arm<big_endian>(layout, this->got_plt_);
6495 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
6497 | elfcpp::SHF_EXECINSTR),
6498 this->plt_, false, false, false, false);
6500 this->plt_->add_entry(gsym);
6503 // Report an unsupported relocation against a local symbol.
6505 template<bool big_endian>
6507 Target_arm<big_endian>::Scan::unsupported_reloc_local(
6508 Sized_relobj<32, big_endian>* object,
6509 unsigned int r_type)
6511 gold_error(_("%s: unsupported reloc %u against local symbol"),
6512 object->name().c_str(), r_type);
6515 // We are about to emit a dynamic relocation of type R_TYPE. If the
6516 // dynamic linker does not support it, issue an error. The GNU linker
6517 // only issues a non-PIC error for an allocated read-only section.
6518 // Here we know the section is allocated, but we don't know that it is
6519 // read-only. But we check for all the relocation types which the
6520 // glibc dynamic linker supports, so it seems appropriate to issue an
6521 // error even if the section is not read-only.
6523 template<bool big_endian>
6525 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
6526 unsigned int r_type)
6530 // These are the relocation types supported by glibc for ARM.
6531 case elfcpp::R_ARM_RELATIVE:
6532 case elfcpp::R_ARM_COPY:
6533 case elfcpp::R_ARM_GLOB_DAT:
6534 case elfcpp::R_ARM_JUMP_SLOT:
6535 case elfcpp::R_ARM_ABS32:
6536 case elfcpp::R_ARM_ABS32_NOI:
6537 case elfcpp::R_ARM_PC24:
6538 // FIXME: The following 3 types are not supported by Android's dynamic
6540 case elfcpp::R_ARM_TLS_DTPMOD32:
6541 case elfcpp::R_ARM_TLS_DTPOFF32:
6542 case elfcpp::R_ARM_TLS_TPOFF32:
6546 // This prevents us from issuing more than one error per reloc
6547 // section. But we can still wind up issuing more than one
6548 // error per object file.
6549 if (this->issued_non_pic_error_)
6551 object->error(_("requires unsupported dynamic reloc; "
6552 "recompile with -fPIC"));
6553 this->issued_non_pic_error_ = true;
6556 case elfcpp::R_ARM_NONE:
6561 // Scan a relocation for a local symbol.
6562 // FIXME: This only handles a subset of relocation types used by Android
6563 // on ARM v5te devices.
6565 template<bool big_endian>
6567 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
6570 Sized_relobj<32, big_endian>* object,
6571 unsigned int data_shndx,
6572 Output_section* output_section,
6573 const elfcpp::Rel<32, big_endian>& reloc,
6574 unsigned int r_type,
6575 const elfcpp::Sym<32, big_endian>&)
6577 r_type = get_real_reloc_type(r_type);
6580 case elfcpp::R_ARM_NONE:
6583 case elfcpp::R_ARM_ABS32:
6584 case elfcpp::R_ARM_ABS32_NOI:
6585 // If building a shared library (or a position-independent
6586 // executable), we need to create a dynamic relocation for
6587 // this location. The relocation applied at link time will
6588 // apply the link-time value, so we flag the location with
6589 // an R_ARM_RELATIVE relocation so the dynamic loader can
6590 // relocate it easily.
6591 if (parameters->options().output_is_position_independent())
6593 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6594 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6595 // If we are to add more other reloc types than R_ARM_ABS32,
6596 // we need to add check_non_pic(object, r_type) here.
6597 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
6598 output_section, data_shndx,
6599 reloc.get_r_offset());
6603 case elfcpp::R_ARM_REL32:
6604 case elfcpp::R_ARM_THM_CALL:
6605 case elfcpp::R_ARM_CALL:
6606 case elfcpp::R_ARM_PREL31:
6607 case elfcpp::R_ARM_JUMP24:
6608 case elfcpp::R_ARM_THM_JUMP24:
6609 case elfcpp::R_ARM_THM_JUMP19:
6610 case elfcpp::R_ARM_PLT32:
6611 case elfcpp::R_ARM_THM_ABS5:
6612 case elfcpp::R_ARM_ABS8:
6613 case elfcpp::R_ARM_ABS12:
6614 case elfcpp::R_ARM_ABS16:
6615 case elfcpp::R_ARM_BASE_ABS:
6616 case elfcpp::R_ARM_MOVW_ABS_NC:
6617 case elfcpp::R_ARM_MOVT_ABS:
6618 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6619 case elfcpp::R_ARM_THM_MOVT_ABS:
6620 case elfcpp::R_ARM_MOVW_PREL_NC:
6621 case elfcpp::R_ARM_MOVT_PREL:
6622 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
6623 case elfcpp::R_ARM_THM_MOVT_PREL:
6624 case elfcpp::R_ARM_MOVW_BREL_NC:
6625 case elfcpp::R_ARM_MOVT_BREL:
6626 case elfcpp::R_ARM_MOVW_BREL:
6627 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
6628 case elfcpp::R_ARM_THM_MOVT_BREL:
6629 case elfcpp::R_ARM_THM_MOVW_BREL:
6630 case elfcpp::R_ARM_THM_JUMP6:
6631 case elfcpp::R_ARM_THM_JUMP8:
6632 case elfcpp::R_ARM_THM_JUMP11:
6633 case elfcpp::R_ARM_V4BX:
6634 case elfcpp::R_ARM_THM_PC8:
6635 case elfcpp::R_ARM_THM_PC12:
6636 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
6637 case elfcpp::R_ARM_ALU_PC_G0_NC:
6638 case elfcpp::R_ARM_ALU_PC_G0:
6639 case elfcpp::R_ARM_ALU_PC_G1_NC:
6640 case elfcpp::R_ARM_ALU_PC_G1:
6641 case elfcpp::R_ARM_ALU_PC_G2:
6642 case elfcpp::R_ARM_ALU_SB_G0_NC:
6643 case elfcpp::R_ARM_ALU_SB_G0:
6644 case elfcpp::R_ARM_ALU_SB_G1_NC:
6645 case elfcpp::R_ARM_ALU_SB_G1:
6646 case elfcpp::R_ARM_ALU_SB_G2:
6647 case elfcpp::R_ARM_LDR_PC_G0:
6648 case elfcpp::R_ARM_LDR_PC_G1:
6649 case elfcpp::R_ARM_LDR_PC_G2:
6650 case elfcpp::R_ARM_LDR_SB_G0:
6651 case elfcpp::R_ARM_LDR_SB_G1:
6652 case elfcpp::R_ARM_LDR_SB_G2:
6653 case elfcpp::R_ARM_LDRS_PC_G0:
6654 case elfcpp::R_ARM_LDRS_PC_G1:
6655 case elfcpp::R_ARM_LDRS_PC_G2:
6656 case elfcpp::R_ARM_LDRS_SB_G0:
6657 case elfcpp::R_ARM_LDRS_SB_G1:
6658 case elfcpp::R_ARM_LDRS_SB_G2:
6659 case elfcpp::R_ARM_LDC_PC_G0:
6660 case elfcpp::R_ARM_LDC_PC_G1:
6661 case elfcpp::R_ARM_LDC_PC_G2:
6662 case elfcpp::R_ARM_LDC_SB_G0:
6663 case elfcpp::R_ARM_LDC_SB_G1:
6664 case elfcpp::R_ARM_LDC_SB_G2:
6667 case elfcpp::R_ARM_GOTOFF32:
6668 // We need a GOT section:
6669 target->got_section(symtab, layout);
6672 case elfcpp::R_ARM_BASE_PREL:
6673 // FIXME: What about this?
6676 case elfcpp::R_ARM_GOT_BREL:
6677 case elfcpp::R_ARM_GOT_PREL:
6679 // The symbol requires a GOT entry.
6680 Output_data_got<32, big_endian>* got =
6681 target->got_section(symtab, layout);
6682 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6683 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
6685 // If we are generating a shared object, we need to add a
6686 // dynamic RELATIVE relocation for this symbol's GOT entry.
6687 if (parameters->options().output_is_position_independent())
6689 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6690 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6691 rel_dyn->add_local_relative(
6692 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
6693 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
6699 case elfcpp::R_ARM_TARGET1:
6700 // This should have been mapped to another type already.
6702 case elfcpp::R_ARM_COPY:
6703 case elfcpp::R_ARM_GLOB_DAT:
6704 case elfcpp::R_ARM_JUMP_SLOT:
6705 case elfcpp::R_ARM_RELATIVE:
6706 // These are relocations which should only be seen by the
6707 // dynamic linker, and should never be seen here.
6708 gold_error(_("%s: unexpected reloc %u in object file"),
6709 object->name().c_str(), r_type);
6713 unsupported_reloc_local(object, r_type);
6718 // Report an unsupported relocation against a global symbol.
6720 template<bool big_endian>
6722 Target_arm<big_endian>::Scan::unsupported_reloc_global(
6723 Sized_relobj<32, big_endian>* object,
6724 unsigned int r_type,
6727 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
6728 object->name().c_str(), r_type, gsym->demangled_name().c_str());
6731 // Scan a relocation for a global symbol.
6732 // FIXME: This only handles a subset of relocation types used by Android
6733 // on ARM v5te devices.
6735 template<bool big_endian>
6737 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
6740 Sized_relobj<32, big_endian>* object,
6741 unsigned int data_shndx,
6742 Output_section* output_section,
6743 const elfcpp::Rel<32, big_endian>& reloc,
6744 unsigned int r_type,
6747 r_type = get_real_reloc_type(r_type);
6750 case elfcpp::R_ARM_NONE:
6753 case elfcpp::R_ARM_ABS32:
6754 case elfcpp::R_ARM_ABS32_NOI:
6756 // Make a dynamic relocation if necessary.
6757 if (gsym->needs_dynamic_reloc(Symbol::ABSOLUTE_REF))
6759 if (target->may_need_copy_reloc(gsym))
6761 target->copy_reloc(symtab, layout, object,
6762 data_shndx, output_section, gsym, reloc);
6764 else if (gsym->can_use_relative_reloc(false))
6766 // If we are to add more other reloc types than R_ARM_ABS32,
6767 // we need to add check_non_pic(object, r_type) here.
6768 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6769 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
6770 output_section, object,
6771 data_shndx, reloc.get_r_offset());
6775 // If we are to add more other reloc types than R_ARM_ABS32,
6776 // we need to add check_non_pic(object, r_type) here.
6777 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6778 rel_dyn->add_global(gsym, r_type, output_section, object,
6779 data_shndx, reloc.get_r_offset());
6785 case elfcpp::R_ARM_MOVW_ABS_NC:
6786 case elfcpp::R_ARM_MOVT_ABS:
6787 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6788 case elfcpp::R_ARM_THM_MOVT_ABS:
6789 case elfcpp::R_ARM_MOVW_PREL_NC:
6790 case elfcpp::R_ARM_MOVT_PREL:
6791 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
6792 case elfcpp::R_ARM_THM_MOVT_PREL:
6793 case elfcpp::R_ARM_MOVW_BREL_NC:
6794 case elfcpp::R_ARM_MOVT_BREL:
6795 case elfcpp::R_ARM_MOVW_BREL:
6796 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
6797 case elfcpp::R_ARM_THM_MOVT_BREL:
6798 case elfcpp::R_ARM_THM_MOVW_BREL:
6799 case elfcpp::R_ARM_THM_JUMP6:
6800 case elfcpp::R_ARM_THM_JUMP8:
6801 case elfcpp::R_ARM_THM_JUMP11:
6802 case elfcpp::R_ARM_V4BX:
6803 case elfcpp::R_ARM_THM_PC8:
6804 case elfcpp::R_ARM_THM_PC12:
6805 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
6806 case elfcpp::R_ARM_ALU_PC_G0_NC:
6807 case elfcpp::R_ARM_ALU_PC_G0:
6808 case elfcpp::R_ARM_ALU_PC_G1_NC:
6809 case elfcpp::R_ARM_ALU_PC_G1:
6810 case elfcpp::R_ARM_ALU_PC_G2:
6811 case elfcpp::R_ARM_ALU_SB_G0_NC:
6812 case elfcpp::R_ARM_ALU_SB_G0:
6813 case elfcpp::R_ARM_ALU_SB_G1_NC:
6814 case elfcpp::R_ARM_ALU_SB_G1:
6815 case elfcpp::R_ARM_ALU_SB_G2:
6816 case elfcpp::R_ARM_LDR_PC_G0:
6817 case elfcpp::R_ARM_LDR_PC_G1:
6818 case elfcpp::R_ARM_LDR_PC_G2:
6819 case elfcpp::R_ARM_LDR_SB_G0:
6820 case elfcpp::R_ARM_LDR_SB_G1:
6821 case elfcpp::R_ARM_LDR_SB_G2:
6822 case elfcpp::R_ARM_LDRS_PC_G0:
6823 case elfcpp::R_ARM_LDRS_PC_G1:
6824 case elfcpp::R_ARM_LDRS_PC_G2:
6825 case elfcpp::R_ARM_LDRS_SB_G0:
6826 case elfcpp::R_ARM_LDRS_SB_G1:
6827 case elfcpp::R_ARM_LDRS_SB_G2:
6828 case elfcpp::R_ARM_LDC_PC_G0:
6829 case elfcpp::R_ARM_LDC_PC_G1:
6830 case elfcpp::R_ARM_LDC_PC_G2:
6831 case elfcpp::R_ARM_LDC_SB_G0:
6832 case elfcpp::R_ARM_LDC_SB_G1:
6833 case elfcpp::R_ARM_LDC_SB_G2:
6836 case elfcpp::R_ARM_THM_ABS5:
6837 case elfcpp::R_ARM_ABS8:
6838 case elfcpp::R_ARM_ABS12:
6839 case elfcpp::R_ARM_ABS16:
6840 case elfcpp::R_ARM_BASE_ABS:
6842 // No dynamic relocs of this kinds.
6843 // Report the error in case of PIC.
6844 int flags = Symbol::NON_PIC_REF;
6845 if (gsym->type() == elfcpp::STT_FUNC
6846 || gsym->type() == elfcpp::STT_ARM_TFUNC)
6847 flags |= Symbol::FUNCTION_CALL;
6848 if (gsym->needs_dynamic_reloc(flags))
6849 check_non_pic(object, r_type);
6853 case elfcpp::R_ARM_REL32:
6855 // Make a dynamic relocation if necessary.
6856 int flags = Symbol::NON_PIC_REF;
6857 if (gsym->needs_dynamic_reloc(flags))
6859 if (target->may_need_copy_reloc(gsym))
6861 target->copy_reloc(symtab, layout, object,
6862 data_shndx, output_section, gsym, reloc);
6866 check_non_pic(object, r_type);
6867 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6868 rel_dyn->add_global(gsym, r_type, output_section, object,
6869 data_shndx, reloc.get_r_offset());
6875 case elfcpp::R_ARM_JUMP24:
6876 case elfcpp::R_ARM_THM_JUMP24:
6877 case elfcpp::R_ARM_THM_JUMP19:
6878 case elfcpp::R_ARM_CALL:
6879 case elfcpp::R_ARM_THM_CALL:
6880 case elfcpp::R_ARM_PLT32:
6881 case elfcpp::R_ARM_PREL31:
6882 case elfcpp::R_ARM_PC24:
6883 // If the symbol is fully resolved, this is just a relative
6884 // local reloc. Otherwise we need a PLT entry.
6885 if (gsym->final_value_is_known())
6887 // If building a shared library, we can also skip the PLT entry
6888 // if the symbol is defined in the output file and is protected
6890 if (gsym->is_defined()
6891 && !gsym->is_from_dynobj()
6892 && !gsym->is_preemptible())
6894 target->make_plt_entry(symtab, layout, gsym);
6897 case elfcpp::R_ARM_GOTOFF32:
6898 // We need a GOT section.
6899 target->got_section(symtab, layout);
6902 case elfcpp::R_ARM_BASE_PREL:
6903 // FIXME: What about this?
6906 case elfcpp::R_ARM_GOT_BREL:
6907 case elfcpp::R_ARM_GOT_PREL:
6909 // The symbol requires a GOT entry.
6910 Output_data_got<32, big_endian>* got =
6911 target->got_section(symtab, layout);
6912 if (gsym->final_value_is_known())
6913 got->add_global(gsym, GOT_TYPE_STANDARD);
6916 // If this symbol is not fully resolved, we need to add a
6917 // GOT entry with a dynamic relocation.
6918 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6919 if (gsym->is_from_dynobj()
6920 || gsym->is_undefined()
6921 || gsym->is_preemptible())
6922 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
6923 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
6926 if (got->add_global(gsym, GOT_TYPE_STANDARD))
6927 rel_dyn->add_global_relative(
6928 gsym, elfcpp::R_ARM_RELATIVE, got,
6929 gsym->got_offset(GOT_TYPE_STANDARD));
6935 case elfcpp::R_ARM_TARGET1:
6936 // This should have been mapped to another type already.
6938 case elfcpp::R_ARM_COPY:
6939 case elfcpp::R_ARM_GLOB_DAT:
6940 case elfcpp::R_ARM_JUMP_SLOT:
6941 case elfcpp::R_ARM_RELATIVE:
6942 // These are relocations which should only be seen by the
6943 // dynamic linker, and should never be seen here.
6944 gold_error(_("%s: unexpected reloc %u in object file"),
6945 object->name().c_str(), r_type);
6949 unsupported_reloc_global(object, r_type, gsym);
6954 // Process relocations for gc.
6956 template<bool big_endian>
6958 Target_arm<big_endian>::gc_process_relocs(Symbol_table* symtab,
6960 Sized_relobj<32, big_endian>* object,
6961 unsigned int data_shndx,
6963 const unsigned char* prelocs,
6965 Output_section* output_section,
6966 bool needs_special_offset_handling,
6967 size_t local_symbol_count,
6968 const unsigned char* plocal_symbols)
6970 typedef Target_arm<big_endian> Arm;
6971 typedef typename Target_arm<big_endian>::Scan Scan;
6973 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan>(
6982 needs_special_offset_handling,
6987 // Scan relocations for a section.
6989 template<bool big_endian>
6991 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
6993 Sized_relobj<32, big_endian>* object,
6994 unsigned int data_shndx,
6995 unsigned int sh_type,
6996 const unsigned char* prelocs,
6998 Output_section* output_section,
6999 bool needs_special_offset_handling,
7000 size_t local_symbol_count,
7001 const unsigned char* plocal_symbols)
7003 typedef typename Target_arm<big_endian>::Scan Scan;
7004 if (sh_type == elfcpp::SHT_RELA)
7006 gold_error(_("%s: unsupported RELA reloc section"),
7007 object->name().c_str());
7011 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
7020 needs_special_offset_handling,
7025 // Finalize the sections.
7027 template<bool big_endian>
7029 Target_arm<big_endian>::do_finalize_sections(
7031 const Input_objects* input_objects,
7032 Symbol_table* symtab)
7034 // Merge processor-specific flags.
7035 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
7036 p != input_objects->relobj_end();
7039 Arm_relobj<big_endian>* arm_relobj =
7040 Arm_relobj<big_endian>::as_arm_relobj(*p);
7041 this->merge_processor_specific_flags(
7043 arm_relobj->processor_specific_flags());
7044 this->merge_object_attributes(arm_relobj->name().c_str(),
7045 arm_relobj->attributes_section_data());
7049 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
7050 p != input_objects->dynobj_end();
7053 Arm_dynobj<big_endian>* arm_dynobj =
7054 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
7055 this->merge_processor_specific_flags(
7057 arm_dynobj->processor_specific_flags());
7058 this->merge_object_attributes(arm_dynobj->name().c_str(),
7059 arm_dynobj->attributes_section_data());
7063 const Object_attribute* cpu_arch_attr =
7064 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
7065 if (cpu_arch_attr->int_value() > elfcpp::TAG_CPU_ARCH_V4)
7066 this->set_may_use_blx(true);
7068 // Check if we need to use Cortex-A8 workaround.
7069 if (parameters->options().user_set_fix_cortex_a8())
7070 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
7073 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
7074 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
7076 const Object_attribute* cpu_arch_profile_attr =
7077 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
7078 this->fix_cortex_a8_ =
7079 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
7080 && (cpu_arch_profile_attr->int_value() == 'A'
7081 || cpu_arch_profile_attr->int_value() == 0));
7084 // Check if we can use V4BX interworking.
7085 // The V4BX interworking stub contains BX instruction,
7086 // which is not specified for some profiles.
7087 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
7088 && !this->may_use_blx())
7089 gold_error(_("unable to provide V4BX reloc interworking fix up; "
7090 "the target profile does not support BX instruction"));
7092 // Fill in some more dynamic tags.
7093 const Reloc_section* rel_plt = (this->plt_ == NULL
7095 : this->plt_->rel_plt());
7096 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
7097 this->rel_dyn_, true);
7099 // Emit any relocs we saved in an attempt to avoid generating COPY
7101 if (this->copy_relocs_.any_saved_relocs())
7102 this->copy_relocs_.emit(this->rel_dyn_section(layout));
7104 // Handle the .ARM.exidx section.
7105 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
7106 if (exidx_section != NULL
7107 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX
7108 && !parameters->options().relocatable())
7110 // Create __exidx_start and __exdix_end symbols.
7111 symtab->define_in_output_data("__exidx_start", NULL,
7112 Symbol_table::PREDEFINED,
7113 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7114 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7116 symtab->define_in_output_data("__exidx_end", NULL,
7117 Symbol_table::PREDEFINED,
7118 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7119 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7122 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
7123 // the .ARM.exidx section.
7124 if (!layout->script_options()->saw_phdrs_clause())
7126 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, 0)
7128 Output_segment* exidx_segment =
7129 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
7130 exidx_segment->add_output_section(exidx_section, elfcpp::PF_R,
7135 // Create an .ARM.attributes section if there is not one already.
7136 Output_attributes_section_data* attributes_section =
7137 new Output_attributes_section_data(*this->attributes_section_data_);
7138 layout->add_output_section_data(".ARM.attributes",
7139 elfcpp::SHT_ARM_ATTRIBUTES, 0,
7140 attributes_section, false, false, false,
7144 // Return whether a direct absolute static relocation needs to be applied.
7145 // In cases where Scan::local() or Scan::global() has created
7146 // a dynamic relocation other than R_ARM_RELATIVE, the addend
7147 // of the relocation is carried in the data, and we must not
7148 // apply the static relocation.
7150 template<bool big_endian>
7152 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
7153 const Sized_symbol<32>* gsym,
7156 Output_section* output_section)
7158 // If the output section is not allocated, then we didn't call
7159 // scan_relocs, we didn't create a dynamic reloc, and we must apply
7161 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
7164 // For local symbols, we will have created a non-RELATIVE dynamic
7165 // relocation only if (a) the output is position independent,
7166 // (b) the relocation is absolute (not pc- or segment-relative), and
7167 // (c) the relocation is not 32 bits wide.
7169 return !(parameters->options().output_is_position_independent()
7170 && (ref_flags & Symbol::ABSOLUTE_REF)
7173 // For global symbols, we use the same helper routines used in the
7174 // scan pass. If we did not create a dynamic relocation, or if we
7175 // created a RELATIVE dynamic relocation, we should apply the static
7177 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
7178 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
7179 && gsym->can_use_relative_reloc(ref_flags
7180 & Symbol::FUNCTION_CALL);
7181 return !has_dyn || is_rel;
7184 // Perform a relocation.
7186 template<bool big_endian>
7188 Target_arm<big_endian>::Relocate::relocate(
7189 const Relocate_info<32, big_endian>* relinfo,
7191 Output_section *output_section,
7193 const elfcpp::Rel<32, big_endian>& rel,
7194 unsigned int r_type,
7195 const Sized_symbol<32>* gsym,
7196 const Symbol_value<32>* psymval,
7197 unsigned char* view,
7198 Arm_address address,
7199 section_size_type /* view_size */ )
7201 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
7203 r_type = get_real_reloc_type(r_type);
7204 const Arm_reloc_property* reloc_property =
7205 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
7206 if (reloc_property == NULL)
7208 std::string reloc_name =
7209 arm_reloc_property_table->reloc_name_in_error_message(r_type);
7210 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7211 _("cannot relocate %s in object file"),
7212 reloc_name.c_str());
7216 const Arm_relobj<big_endian>* object =
7217 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
7219 // If the final branch target of a relocation is THUMB instruction, this
7220 // is 1. Otherwise it is 0.
7221 Arm_address thumb_bit = 0;
7222 Symbol_value<32> symval;
7223 bool is_weakly_undefined_without_plt = false;
7224 if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
7228 // This is a global symbol. Determine if we use PLT and if the
7229 // final target is THUMB.
7230 if (gsym->use_plt_offset(reloc_is_non_pic(r_type)))
7232 // This uses a PLT, change the symbol value.
7233 symval.set_output_value(target->plt_section()->address()
7234 + gsym->plt_offset());
7237 else if (gsym->is_weak_undefined())
7239 // This is a weakly undefined symbol and we do not use PLT
7240 // for this relocation. A branch targeting this symbol will
7241 // be converted into an NOP.
7242 is_weakly_undefined_without_plt = true;
7246 // Set thumb bit if symbol:
7247 // -Has type STT_ARM_TFUNC or
7248 // -Has type STT_FUNC, is defined and with LSB in value set.
7250 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
7251 || (gsym->type() == elfcpp::STT_FUNC
7252 && !gsym->is_undefined()
7253 && ((psymval->value(object, 0) & 1) != 0)))
7260 // This is a local symbol. Determine if the final target is THUMB.
7261 // We saved this information when all the local symbols were read.
7262 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
7263 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
7264 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
7269 // This is a fake relocation synthesized for a stub. It does not have
7270 // a real symbol. We just look at the LSB of the symbol value to
7271 // determine if the target is THUMB or not.
7272 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
7275 // Strip LSB if this points to a THUMB target.
7277 && reloc_property->uses_thumb_bit()
7278 && ((psymval->value(object, 0) & 1) != 0))
7280 Arm_address stripped_value =
7281 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
7282 symval.set_output_value(stripped_value);
7286 // Get the GOT offset if needed.
7287 // The GOT pointer points to the end of the GOT section.
7288 // We need to subtract the size of the GOT section to get
7289 // the actual offset to use in the relocation.
7290 bool have_got_offset = false;
7291 unsigned int got_offset = 0;
7294 case elfcpp::R_ARM_GOT_BREL:
7295 case elfcpp::R_ARM_GOT_PREL:
7298 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
7299 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
7300 - target->got_size());
7304 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7305 gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_STANDARD));
7306 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
7307 - target->got_size());
7309 have_got_offset = true;
7316 // To look up relocation stubs, we need to pass the symbol table index of
7318 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7320 // Get the addressing origin of the output segment defining the
7321 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
7322 Arm_address sym_origin = 0;
7323 if (reloc_property->uses_symbol_base())
7325 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
7326 // R_ARM_BASE_ABS with the NULL symbol will give the
7327 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
7328 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
7329 sym_origin = target->got_plt_section()->address();
7330 else if (gsym == NULL)
7332 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
7333 sym_origin = gsym->output_segment()->vaddr();
7334 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
7335 sym_origin = gsym->output_data()->address();
7337 // TODO: Assumes the segment base to be zero for the global symbols
7338 // till the proper support for the segment-base-relative addressing
7339 // will be implemented. This is consistent with GNU ld.
7342 // For relative addressing relocation, find out the relative address base.
7343 Arm_address relative_address_base = 0;
7344 switch(reloc_property->relative_address_base())
7346 case Arm_reloc_property::RAB_NONE:
7348 case Arm_reloc_property::RAB_B_S:
7349 relative_address_base = sym_origin;
7351 case Arm_reloc_property::RAB_GOT_ORG:
7352 relative_address_base = target->got_plt_section()->address();
7354 case Arm_reloc_property::RAB_P:
7355 relative_address_base = address;
7357 case Arm_reloc_property::RAB_Pa:
7358 relative_address_base = address & 0xfffffffcU;
7364 typename Arm_relocate_functions::Status reloc_status =
7365 Arm_relocate_functions::STATUS_OKAY;
7366 bool check_overflow = reloc_property->checks_overflow();
7369 case elfcpp::R_ARM_NONE:
7372 case elfcpp::R_ARM_ABS8:
7373 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7375 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
7378 case elfcpp::R_ARM_ABS12:
7379 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7381 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
7384 case elfcpp::R_ARM_ABS16:
7385 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7387 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
7390 case elfcpp::R_ARM_ABS32:
7391 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7393 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7397 case elfcpp::R_ARM_ABS32_NOI:
7398 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7400 // No thumb bit for this relocation: (S + A)
7401 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7405 case elfcpp::R_ARM_MOVW_ABS_NC:
7406 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7408 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
7412 gold_error(_("relocation R_ARM_MOVW_ABS_NC cannot be used when making"
7413 "a shared object; recompile with -fPIC"));
7416 case elfcpp::R_ARM_MOVT_ABS:
7417 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7419 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
7421 gold_error(_("relocation R_ARM_MOVT_ABS cannot be used when making"
7422 "a shared object; recompile with -fPIC"));
7425 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7426 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7428 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
7429 0, thumb_bit, false);
7431 gold_error(_("relocation R_ARM_THM_MOVW_ABS_NC cannot be used when"
7432 "making a shared object; recompile with -fPIC"));
7435 case elfcpp::R_ARM_THM_MOVT_ABS:
7436 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7438 reloc_status = Arm_relocate_functions::thm_movt(view, object,
7441 gold_error(_("relocation R_ARM_THM_MOVT_ABS cannot be used when"
7442 "making a shared object; recompile with -fPIC"));
7445 case elfcpp::R_ARM_MOVW_PREL_NC:
7446 case elfcpp::R_ARM_MOVW_BREL_NC:
7447 case elfcpp::R_ARM_MOVW_BREL:
7449 Arm_relocate_functions::movw(view, object, psymval,
7450 relative_address_base, thumb_bit,
7454 case elfcpp::R_ARM_MOVT_PREL:
7455 case elfcpp::R_ARM_MOVT_BREL:
7457 Arm_relocate_functions::movt(view, object, psymval,
7458 relative_address_base);
7461 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7462 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7463 case elfcpp::R_ARM_THM_MOVW_BREL:
7465 Arm_relocate_functions::thm_movw(view, object, psymval,
7466 relative_address_base,
7467 thumb_bit, check_overflow);
7470 case elfcpp::R_ARM_THM_MOVT_PREL:
7471 case elfcpp::R_ARM_THM_MOVT_BREL:
7473 Arm_relocate_functions::thm_movt(view, object, psymval,
7474 relative_address_base);
7477 case elfcpp::R_ARM_REL32:
7478 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7479 address, thumb_bit);
7482 case elfcpp::R_ARM_THM_ABS5:
7483 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7485 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
7488 // Thumb long branches.
7489 case elfcpp::R_ARM_THM_CALL:
7490 case elfcpp::R_ARM_THM_XPC22:
7491 case elfcpp::R_ARM_THM_JUMP24:
7493 Arm_relocate_functions::thumb_branch_common(
7494 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7495 thumb_bit, is_weakly_undefined_without_plt);
7498 case elfcpp::R_ARM_GOTOFF32:
7500 Arm_address got_origin;
7501 got_origin = target->got_plt_section()->address();
7502 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7503 got_origin, thumb_bit);
7507 case elfcpp::R_ARM_BASE_PREL:
7508 gold_assert(gsym != NULL);
7510 Arm_relocate_functions::base_prel(view, sym_origin, address);
7513 case elfcpp::R_ARM_BASE_ABS:
7515 if (!should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7519 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
7523 case elfcpp::R_ARM_GOT_BREL:
7524 gold_assert(have_got_offset);
7525 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
7528 case elfcpp::R_ARM_GOT_PREL:
7529 gold_assert(have_got_offset);
7530 // Get the address origin for GOT PLT, which is allocated right
7531 // after the GOT section, to calculate an absolute address of
7532 // the symbol GOT entry (got_origin + got_offset).
7533 Arm_address got_origin;
7534 got_origin = target->got_plt_section()->address();
7535 reloc_status = Arm_relocate_functions::got_prel(view,
7536 got_origin + got_offset,
7540 case elfcpp::R_ARM_PLT32:
7541 case elfcpp::R_ARM_CALL:
7542 case elfcpp::R_ARM_JUMP24:
7543 case elfcpp::R_ARM_XPC25:
7544 gold_assert(gsym == NULL
7545 || gsym->has_plt_offset()
7546 || gsym->final_value_is_known()
7547 || (gsym->is_defined()
7548 && !gsym->is_from_dynobj()
7549 && !gsym->is_preemptible()));
7551 Arm_relocate_functions::arm_branch_common(
7552 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7553 thumb_bit, is_weakly_undefined_without_plt);
7556 case elfcpp::R_ARM_THM_JUMP19:
7558 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
7562 case elfcpp::R_ARM_THM_JUMP6:
7564 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
7567 case elfcpp::R_ARM_THM_JUMP8:
7569 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
7572 case elfcpp::R_ARM_THM_JUMP11:
7574 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
7577 case elfcpp::R_ARM_PREL31:
7578 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
7579 address, thumb_bit);
7582 case elfcpp::R_ARM_V4BX:
7583 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
7585 const bool is_v4bx_interworking =
7586 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
7588 Arm_relocate_functions::v4bx(relinfo, view, object, address,
7589 is_v4bx_interworking);
7593 case elfcpp::R_ARM_THM_PC8:
7595 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
7598 case elfcpp::R_ARM_THM_PC12:
7600 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
7603 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7605 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
7609 case elfcpp::R_ARM_ALU_PC_G0_NC:
7610 case elfcpp::R_ARM_ALU_PC_G0:
7611 case elfcpp::R_ARM_ALU_PC_G1_NC:
7612 case elfcpp::R_ARM_ALU_PC_G1:
7613 case elfcpp::R_ARM_ALU_PC_G2:
7614 case elfcpp::R_ARM_ALU_SB_G0_NC:
7615 case elfcpp::R_ARM_ALU_SB_G0:
7616 case elfcpp::R_ARM_ALU_SB_G1_NC:
7617 case elfcpp::R_ARM_ALU_SB_G1:
7618 case elfcpp::R_ARM_ALU_SB_G2:
7620 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
7621 reloc_property->group_index(),
7622 relative_address_base,
7623 thumb_bit, check_overflow);
7626 case elfcpp::R_ARM_LDR_PC_G0:
7627 case elfcpp::R_ARM_LDR_PC_G1:
7628 case elfcpp::R_ARM_LDR_PC_G2:
7629 case elfcpp::R_ARM_LDR_SB_G0:
7630 case elfcpp::R_ARM_LDR_SB_G1:
7631 case elfcpp::R_ARM_LDR_SB_G2:
7633 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
7634 reloc_property->group_index(),
7635 relative_address_base);
7638 case elfcpp::R_ARM_LDRS_PC_G0:
7639 case elfcpp::R_ARM_LDRS_PC_G1:
7640 case elfcpp::R_ARM_LDRS_PC_G2:
7641 case elfcpp::R_ARM_LDRS_SB_G0:
7642 case elfcpp::R_ARM_LDRS_SB_G1:
7643 case elfcpp::R_ARM_LDRS_SB_G2:
7645 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
7646 reloc_property->group_index(),
7647 relative_address_base);
7650 case elfcpp::R_ARM_LDC_PC_G0:
7651 case elfcpp::R_ARM_LDC_PC_G1:
7652 case elfcpp::R_ARM_LDC_PC_G2:
7653 case elfcpp::R_ARM_LDC_SB_G0:
7654 case elfcpp::R_ARM_LDC_SB_G1:
7655 case elfcpp::R_ARM_LDC_SB_G2:
7657 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
7658 reloc_property->group_index(),
7659 relative_address_base);
7666 // Report any errors.
7667 switch (reloc_status)
7669 case Arm_relocate_functions::STATUS_OKAY:
7671 case Arm_relocate_functions::STATUS_OVERFLOW:
7672 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7673 _("relocation overflow in relocation %u"),
7676 case Arm_relocate_functions::STATUS_BAD_RELOC:
7677 gold_error_at_location(
7681 _("unexpected opcode while processing relocation %u"),
7691 // Relocate section data.
7693 template<bool big_endian>
7695 Target_arm<big_endian>::relocate_section(
7696 const Relocate_info<32, big_endian>* relinfo,
7697 unsigned int sh_type,
7698 const unsigned char* prelocs,
7700 Output_section* output_section,
7701 bool needs_special_offset_handling,
7702 unsigned char* view,
7703 Arm_address address,
7704 section_size_type view_size,
7705 const Reloc_symbol_changes* reloc_symbol_changes)
7707 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
7708 gold_assert(sh_type == elfcpp::SHT_REL);
7710 // See if we are relocating a relaxed input section. If so, the view
7711 // covers the whole output section and we need to adjust accordingly.
7712 if (needs_special_offset_handling)
7714 const Output_relaxed_input_section* poris =
7715 output_section->find_relaxed_input_section(relinfo->object,
7716 relinfo->data_shndx);
7719 Arm_address section_address = poris->address();
7720 section_size_type section_size = poris->data_size();
7722 gold_assert((section_address >= address)
7723 && ((section_address + section_size)
7724 <= (address + view_size)));
7726 off_t offset = section_address - address;
7729 view_size = section_size;
7733 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
7740 needs_special_offset_handling,
7744 reloc_symbol_changes);
7747 // Return the size of a relocation while scanning during a relocatable
7750 template<bool big_endian>
7752 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
7753 unsigned int r_type,
7756 r_type = get_real_reloc_type(r_type);
7757 const Arm_reloc_property* arp =
7758 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
7763 std::string reloc_name =
7764 arm_reloc_property_table->reloc_name_in_error_message(r_type);
7765 gold_error(_("%s: unexpected %s in object file"),
7766 object->name().c_str(), reloc_name.c_str());
7771 // Scan the relocs during a relocatable link.
7773 template<bool big_endian>
7775 Target_arm<big_endian>::scan_relocatable_relocs(
7776 Symbol_table* symtab,
7778 Sized_relobj<32, big_endian>* object,
7779 unsigned int data_shndx,
7780 unsigned int sh_type,
7781 const unsigned char* prelocs,
7783 Output_section* output_section,
7784 bool needs_special_offset_handling,
7785 size_t local_symbol_count,
7786 const unsigned char* plocal_symbols,
7787 Relocatable_relocs* rr)
7789 gold_assert(sh_type == elfcpp::SHT_REL);
7791 typedef gold::Default_scan_relocatable_relocs<elfcpp::SHT_REL,
7792 Relocatable_size_for_reloc> Scan_relocatable_relocs;
7794 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
7795 Scan_relocatable_relocs>(
7803 needs_special_offset_handling,
7809 // Relocate a section during a relocatable link.
7811 template<bool big_endian>
7813 Target_arm<big_endian>::relocate_for_relocatable(
7814 const Relocate_info<32, big_endian>* relinfo,
7815 unsigned int sh_type,
7816 const unsigned char* prelocs,
7818 Output_section* output_section,
7819 off_t offset_in_output_section,
7820 const Relocatable_relocs* rr,
7821 unsigned char* view,
7822 Arm_address view_address,
7823 section_size_type view_size,
7824 unsigned char* reloc_view,
7825 section_size_type reloc_view_size)
7827 gold_assert(sh_type == elfcpp::SHT_REL);
7829 gold::relocate_for_relocatable<32, big_endian, elfcpp::SHT_REL>(
7834 offset_in_output_section,
7843 // Return the value to use for a dynamic symbol which requires special
7844 // treatment. This is how we support equality comparisons of function
7845 // pointers across shared library boundaries, as described in the
7846 // processor specific ABI supplement.
7848 template<bool big_endian>
7850 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
7852 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
7853 return this->plt_section()->address() + gsym->plt_offset();
7856 // Map platform-specific relocs to real relocs
7858 template<bool big_endian>
7860 Target_arm<big_endian>::get_real_reloc_type (unsigned int r_type)
7864 case elfcpp::R_ARM_TARGET1:
7865 // This is either R_ARM_ABS32 or R_ARM_REL32;
7866 return elfcpp::R_ARM_ABS32;
7868 case elfcpp::R_ARM_TARGET2:
7869 // This can be any reloc type but ususally is R_ARM_GOT_PREL
7870 return elfcpp::R_ARM_GOT_PREL;
7877 // Whether if two EABI versions V1 and V2 are compatible.
7879 template<bool big_endian>
7881 Target_arm<big_endian>::are_eabi_versions_compatible(
7882 elfcpp::Elf_Word v1,
7883 elfcpp::Elf_Word v2)
7885 // v4 and v5 are the same spec before and after it was released,
7886 // so allow mixing them.
7887 if ((v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
7888 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
7894 // Combine FLAGS from an input object called NAME and the processor-specific
7895 // flags in the ELF header of the output. Much of this is adapted from the
7896 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
7897 // in bfd/elf32-arm.c.
7899 template<bool big_endian>
7901 Target_arm<big_endian>::merge_processor_specific_flags(
7902 const std::string& name,
7903 elfcpp::Elf_Word flags)
7905 if (this->are_processor_specific_flags_set())
7907 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
7909 // Nothing to merge if flags equal to those in output.
7910 if (flags == out_flags)
7913 // Complain about various flag mismatches.
7914 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
7915 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
7916 if (!this->are_eabi_versions_compatible(version1, version2))
7917 gold_error(_("Source object %s has EABI version %d but output has "
7918 "EABI version %d."),
7920 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
7921 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
7925 // If the input is the default architecture and had the default
7926 // flags then do not bother setting the flags for the output
7927 // architecture, instead allow future merges to do this. If no
7928 // future merges ever set these flags then they will retain their
7929 // uninitialised values, which surprise surprise, correspond
7930 // to the default values.
7934 // This is the first time, just copy the flags.
7935 // We only copy the EABI version for now.
7936 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
7940 // Adjust ELF file header.
7941 template<bool big_endian>
7943 Target_arm<big_endian>::do_adjust_elf_header(
7944 unsigned char* view,
7947 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
7949 elfcpp::Ehdr<32, big_endian> ehdr(view);
7950 unsigned char e_ident[elfcpp::EI_NIDENT];
7951 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
7953 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
7954 == elfcpp::EF_ARM_EABI_UNKNOWN)
7955 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
7957 e_ident[elfcpp::EI_OSABI] = 0;
7958 e_ident[elfcpp::EI_ABIVERSION] = 0;
7960 // FIXME: Do EF_ARM_BE8 adjustment.
7962 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
7963 oehdr.put_e_ident(e_ident);
7966 // do_make_elf_object to override the same function in the base class.
7967 // We need to use a target-specific sub-class of Sized_relobj<32, big_endian>
7968 // to store ARM specific information. Hence we need to have our own
7969 // ELF object creation.
7971 template<bool big_endian>
7973 Target_arm<big_endian>::do_make_elf_object(
7974 const std::string& name,
7975 Input_file* input_file,
7976 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
7978 int et = ehdr.get_e_type();
7979 if (et == elfcpp::ET_REL)
7981 Arm_relobj<big_endian>* obj =
7982 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
7986 else if (et == elfcpp::ET_DYN)
7988 Sized_dynobj<32, big_endian>* obj =
7989 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
7995 gold_error(_("%s: unsupported ELF file type %d"),
8001 // Read the architecture from the Tag_also_compatible_with attribute, if any.
8002 // Returns -1 if no architecture could be read.
8003 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
8005 template<bool big_endian>
8007 Target_arm<big_endian>::get_secondary_compatible_arch(
8008 const Attributes_section_data* pasd)
8010 const Object_attribute *known_attributes =
8011 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
8013 // Note: the tag and its argument below are uleb128 values, though
8014 // currently-defined values fit in one byte for each.
8015 const std::string& sv =
8016 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
8018 && sv.data()[0] == elfcpp::Tag_CPU_arch
8019 && (sv.data()[1] & 128) != 128)
8020 return sv.data()[1];
8022 // This tag is "safely ignorable", so don't complain if it looks funny.
8026 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8027 // The tag is removed if ARCH is -1.
8028 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
8030 template<bool big_endian>
8032 Target_arm<big_endian>::set_secondary_compatible_arch(
8033 Attributes_section_data* pasd,
8036 Object_attribute *known_attributes =
8037 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
8041 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
8045 // Note: the tag and its argument below are uleb128 values, though
8046 // currently-defined values fit in one byte for each.
8048 sv[0] = elfcpp::Tag_CPU_arch;
8049 gold_assert(arch != 0);
8053 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
8056 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8058 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
8060 template<bool big_endian>
8062 Target_arm<big_endian>::tag_cpu_arch_combine(
8065 int* secondary_compat_out,
8067 int secondary_compat)
8069 #define T(X) elfcpp::TAG_CPU_ARCH_##X
8070 static const int v6t2[] =
8082 static const int v6k[] =
8095 static const int v7[] =
8109 static const int v6_m[] =
8124 static const int v6s_m[] =
8140 static const int v7e_m[] =
8157 static const int v4t_plus_v6_m[] =
8173 T(V4T_PLUS_V6_M) // V4T plus V6_M.
8175 static const int *comb[] =
8183 // Pseudo-architecture.
8187 // Check we've not got a higher architecture than we know about.
8189 if (oldtag >= elfcpp::MAX_TAG_CPU_ARCH || newtag >= elfcpp::MAX_TAG_CPU_ARCH)
8191 gold_error(_("%s: unknown CPU architecture"), name);
8195 // Override old tag if we have a Tag_also_compatible_with on the output.
8197 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
8198 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
8199 oldtag = T(V4T_PLUS_V6_M);
8201 // And override the new tag if we have a Tag_also_compatible_with on the
8204 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
8205 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
8206 newtag = T(V4T_PLUS_V6_M);
8208 // Architectures before V6KZ add features monotonically.
8209 int tagh = std::max(oldtag, newtag);
8210 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
8213 int tagl = std::min(oldtag, newtag);
8214 int result = comb[tagh - T(V6T2)][tagl];
8216 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8217 // as the canonical version.
8218 if (result == T(V4T_PLUS_V6_M))
8221 *secondary_compat_out = T(V6_M);
8224 *secondary_compat_out = -1;
8228 gold_error(_("%s: conflicting CPU architectures %d/%d"),
8229 name, oldtag, newtag);
8237 // Helper to print AEABI enum tag value.
8239 template<bool big_endian>
8241 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
8243 static const char *aeabi_enum_names[] =
8244 { "", "variable-size", "32-bit", "" };
8245 const size_t aeabi_enum_names_size =
8246 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
8248 if (value < aeabi_enum_names_size)
8249 return std::string(aeabi_enum_names[value]);
8253 sprintf(buffer, "<unknown value %u>", value);
8254 return std::string(buffer);
8258 // Return the string value to store in TAG_CPU_name.
8260 template<bool big_endian>
8262 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
8264 static const char *name_table[] = {
8265 // These aren't real CPU names, but we can't guess
8266 // that from the architecture version alone.
8282 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
8284 if (value < name_table_size)
8285 return std::string(name_table[value]);
8289 sprintf(buffer, "<unknown CPU value %u>", value);
8290 return std::string(buffer);
8294 // Merge object attributes from input file called NAME with those of the
8295 // output. The input object attributes are in the object pointed by PASD.
8297 template<bool big_endian>
8299 Target_arm<big_endian>::merge_object_attributes(
8301 const Attributes_section_data* pasd)
8303 // Return if there is no attributes section data.
8307 // If output has no object attributes, just copy.
8308 if (this->attributes_section_data_ == NULL)
8310 this->attributes_section_data_ = new Attributes_section_data(*pasd);
8314 const int vendor = Object_attribute::OBJ_ATTR_PROC;
8315 const Object_attribute* in_attr = pasd->known_attributes(vendor);
8316 Object_attribute* out_attr =
8317 this->attributes_section_data_->known_attributes(vendor);
8319 // This needs to happen before Tag_ABI_FP_number_model is merged. */
8320 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
8321 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
8323 // Ignore mismatches if the object doesn't use floating point. */
8324 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0)
8325 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
8326 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
8327 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0)
8328 gold_error(_("%s uses VFP register arguments, output does not"),
8332 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
8334 // Merge this attribute with existing attributes.
8337 case elfcpp::Tag_CPU_raw_name:
8338 case elfcpp::Tag_CPU_name:
8339 // These are merged after Tag_CPU_arch.
8342 case elfcpp::Tag_ABI_optimization_goals:
8343 case elfcpp::Tag_ABI_FP_optimization_goals:
8344 // Use the first value seen.
8347 case elfcpp::Tag_CPU_arch:
8349 unsigned int saved_out_attr = out_attr->int_value();
8350 // Merge Tag_CPU_arch and Tag_also_compatible_with.
8351 int secondary_compat =
8352 this->get_secondary_compatible_arch(pasd);
8353 int secondary_compat_out =
8354 this->get_secondary_compatible_arch(
8355 this->attributes_section_data_);
8356 out_attr[i].set_int_value(
8357 tag_cpu_arch_combine(name, out_attr[i].int_value(),
8358 &secondary_compat_out,
8359 in_attr[i].int_value(),
8361 this->set_secondary_compatible_arch(this->attributes_section_data_,
8362 secondary_compat_out);
8364 // Merge Tag_CPU_name and Tag_CPU_raw_name.
8365 if (out_attr[i].int_value() == saved_out_attr)
8366 ; // Leave the names alone.
8367 else if (out_attr[i].int_value() == in_attr[i].int_value())
8369 // The output architecture has been changed to match the
8370 // input architecture. Use the input names.
8371 out_attr[elfcpp::Tag_CPU_name].set_string_value(
8372 in_attr[elfcpp::Tag_CPU_name].string_value());
8373 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
8374 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
8378 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
8379 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
8382 // If we still don't have a value for Tag_CPU_name,
8383 // make one up now. Tag_CPU_raw_name remains blank.
8384 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
8386 const std::string cpu_name =
8387 this->tag_cpu_name_value(out_attr[i].int_value());
8388 // FIXME: If we see an unknown CPU, this will be set
8389 // to "<unknown CPU n>", where n is the attribute value.
8390 // This is different from BFD, which leaves the name alone.
8391 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
8396 case elfcpp::Tag_ARM_ISA_use:
8397 case elfcpp::Tag_THUMB_ISA_use:
8398 case elfcpp::Tag_WMMX_arch:
8399 case elfcpp::Tag_Advanced_SIMD_arch:
8400 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
8401 case elfcpp::Tag_ABI_FP_rounding:
8402 case elfcpp::Tag_ABI_FP_exceptions:
8403 case elfcpp::Tag_ABI_FP_user_exceptions:
8404 case elfcpp::Tag_ABI_FP_number_model:
8405 case elfcpp::Tag_VFP_HP_extension:
8406 case elfcpp::Tag_CPU_unaligned_access:
8407 case elfcpp::Tag_T2EE_use:
8408 case elfcpp::Tag_Virtualization_use:
8409 case elfcpp::Tag_MPextension_use:
8410 // Use the largest value specified.
8411 if (in_attr[i].int_value() > out_attr[i].int_value())
8412 out_attr[i].set_int_value(in_attr[i].int_value());
8415 case elfcpp::Tag_ABI_align8_preserved:
8416 case elfcpp::Tag_ABI_PCS_RO_data:
8417 // Use the smallest value specified.
8418 if (in_attr[i].int_value() < out_attr[i].int_value())
8419 out_attr[i].set_int_value(in_attr[i].int_value());
8422 case elfcpp::Tag_ABI_align8_needed:
8423 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
8424 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
8425 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
8428 // This error message should be enabled once all non-conformant
8429 // binaries in the toolchain have had the attributes set
8431 // gold_error(_("output 8-byte data alignment conflicts with %s"),
8435 case elfcpp::Tag_ABI_FP_denormal:
8436 case elfcpp::Tag_ABI_PCS_GOT_use:
8438 // These tags have 0 = don't care, 1 = strong requirement,
8439 // 2 = weak requirement.
8440 static const int order_021[3] = {0, 2, 1};
8442 // Use the "greatest" from the sequence 0, 2, 1, or the largest
8443 // value if greater than 2 (for future-proofing).
8444 if ((in_attr[i].int_value() > 2
8445 && in_attr[i].int_value() > out_attr[i].int_value())
8446 || (in_attr[i].int_value() <= 2
8447 && out_attr[i].int_value() <= 2
8448 && (order_021[in_attr[i].int_value()]
8449 > order_021[out_attr[i].int_value()])))
8450 out_attr[i].set_int_value(in_attr[i].int_value());
8454 case elfcpp::Tag_CPU_arch_profile:
8455 if (out_attr[i].int_value() != in_attr[i].int_value())
8457 // 0 will merge with anything.
8458 // 'A' and 'S' merge to 'A'.
8459 // 'R' and 'S' merge to 'R'.
8460 // 'M' and 'A|R|S' is an error.
8461 if (out_attr[i].int_value() == 0
8462 || (out_attr[i].int_value() == 'S'
8463 && (in_attr[i].int_value() == 'A'
8464 || in_attr[i].int_value() == 'R')))
8465 out_attr[i].set_int_value(in_attr[i].int_value());
8466 else if (in_attr[i].int_value() == 0
8467 || (in_attr[i].int_value() == 'S'
8468 && (out_attr[i].int_value() == 'A'
8469 || out_attr[i].int_value() == 'R')))
8474 (_("conflicting architecture profiles %c/%c"),
8475 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
8476 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
8480 case elfcpp::Tag_VFP_arch:
8497 // Values greater than 6 aren't defined, so just pick the
8499 if (in_attr[i].int_value() > 6
8500 && in_attr[i].int_value() > out_attr[i].int_value())
8502 *out_attr = *in_attr;
8505 // The output uses the superset of input features
8506 // (ISA version) and registers.
8507 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
8508 vfp_versions[out_attr[i].int_value()].ver);
8509 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
8510 vfp_versions[out_attr[i].int_value()].regs);
8511 // This assumes all possible supersets are also a valid
8514 for (newval = 6; newval > 0; newval--)
8516 if (regs == vfp_versions[newval].regs
8517 && ver == vfp_versions[newval].ver)
8520 out_attr[i].set_int_value(newval);
8523 case elfcpp::Tag_PCS_config:
8524 if (out_attr[i].int_value() == 0)
8525 out_attr[i].set_int_value(in_attr[i].int_value());
8526 else if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8528 // It's sometimes ok to mix different configs, so this is only
8530 gold_warning(_("%s: conflicting platform configuration"), name);
8533 case elfcpp::Tag_ABI_PCS_R9_use:
8534 if (in_attr[i].int_value() != out_attr[i].int_value()
8535 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
8536 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused)
8538 gold_error(_("%s: conflicting use of R9"), name);
8540 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
8541 out_attr[i].set_int_value(in_attr[i].int_value());
8543 case elfcpp::Tag_ABI_PCS_RW_data:
8544 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
8545 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8546 != elfcpp::AEABI_R9_SB)
8547 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8548 != elfcpp::AEABI_R9_unused))
8550 gold_error(_("%s: SB relative addressing conflicts with use "
8554 // Use the smallest value specified.
8555 if (in_attr[i].int_value() < out_attr[i].int_value())
8556 out_attr[i].set_int_value(in_attr[i].int_value());
8558 case elfcpp::Tag_ABI_PCS_wchar_t:
8559 // FIXME: Make it possible to turn off this warning.
8560 if (out_attr[i].int_value()
8561 && in_attr[i].int_value()
8562 && out_attr[i].int_value() != in_attr[i].int_value())
8564 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
8565 "use %u-byte wchar_t; use of wchar_t values "
8566 "across objects may fail"),
8567 name, in_attr[i].int_value(),
8568 out_attr[i].int_value());
8570 else if (in_attr[i].int_value() && !out_attr[i].int_value())
8571 out_attr[i].set_int_value(in_attr[i].int_value());
8573 case elfcpp::Tag_ABI_enum_size:
8574 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
8576 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
8577 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
8579 // The existing object is compatible with anything.
8580 // Use whatever requirements the new object has.
8581 out_attr[i].set_int_value(in_attr[i].int_value());
8583 // FIXME: Make it possible to turn off this warning.
8584 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
8585 && out_attr[i].int_value() != in_attr[i].int_value())
8587 unsigned int in_value = in_attr[i].int_value();
8588 unsigned int out_value = out_attr[i].int_value();
8589 gold_warning(_("%s uses %s enums yet the output is to use "
8590 "%s enums; use of enum values across objects "
8593 this->aeabi_enum_name(in_value).c_str(),
8594 this->aeabi_enum_name(out_value).c_str());
8598 case elfcpp::Tag_ABI_VFP_args:
8601 case elfcpp::Tag_ABI_WMMX_args:
8602 if (in_attr[i].int_value() != out_attr[i].int_value())
8604 gold_error(_("%s uses iWMMXt register arguments, output does "
8609 case Object_attribute::Tag_compatibility:
8610 // Merged in target-independent code.
8612 case elfcpp::Tag_ABI_HardFP_use:
8613 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
8614 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
8615 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
8616 out_attr[i].set_int_value(3);
8617 else if (in_attr[i].int_value() > out_attr[i].int_value())
8618 out_attr[i].set_int_value(in_attr[i].int_value());
8620 case elfcpp::Tag_ABI_FP_16bit_format:
8621 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8623 if (in_attr[i].int_value() != out_attr[i].int_value())
8624 gold_error(_("fp16 format mismatch between %s and output"),
8627 if (in_attr[i].int_value() != 0)
8628 out_attr[i].set_int_value(in_attr[i].int_value());
8631 case elfcpp::Tag_nodefaults:
8632 // This tag is set if it exists, but the value is unused (and is
8633 // typically zero). We don't actually need to do anything here -
8634 // the merge happens automatically when the type flags are merged
8637 case elfcpp::Tag_also_compatible_with:
8638 // Already done in Tag_CPU_arch.
8640 case elfcpp::Tag_conformance:
8641 // Keep the attribute if it matches. Throw it away otherwise.
8642 // No attribute means no claim to conform.
8643 if (in_attr[i].string_value() != out_attr[i].string_value())
8644 out_attr[i].set_string_value("");
8649 const char* err_object = NULL;
8651 // The "known_obj_attributes" table does contain some undefined
8652 // attributes. Ensure that there are unused.
8653 if (out_attr[i].int_value() != 0
8654 || out_attr[i].string_value() != "")
8655 err_object = "output";
8656 else if (in_attr[i].int_value() != 0
8657 || in_attr[i].string_value() != "")
8660 if (err_object != NULL)
8662 // Attribute numbers >=64 (mod 128) can be safely ignored.
8664 gold_error(_("%s: unknown mandatory EABI object attribute "
8668 gold_warning(_("%s: unknown EABI object attribute %d"),
8672 // Only pass on attributes that match in both inputs.
8673 if (!in_attr[i].matches(out_attr[i]))
8675 out_attr[i].set_int_value(0);
8676 out_attr[i].set_string_value("");
8681 // If out_attr was copied from in_attr then it won't have a type yet.
8682 if (in_attr[i].type() && !out_attr[i].type())
8683 out_attr[i].set_type(in_attr[i].type());
8686 // Merge Tag_compatibility attributes and any common GNU ones.
8687 this->attributes_section_data_->merge(name, pasd);
8689 // Check for any attributes not known on ARM.
8690 typedef Vendor_object_attributes::Other_attributes Other_attributes;
8691 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
8692 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
8693 Other_attributes* out_other_attributes =
8694 this->attributes_section_data_->other_attributes(vendor);
8695 Other_attributes::iterator out_iter = out_other_attributes->begin();
8697 while (in_iter != in_other_attributes->end()
8698 || out_iter != out_other_attributes->end())
8700 const char* err_object = NULL;
8703 // The tags for each list are in numerical order.
8704 // If the tags are equal, then merge.
8705 if (out_iter != out_other_attributes->end()
8706 && (in_iter == in_other_attributes->end()
8707 || in_iter->first > out_iter->first))
8709 // This attribute only exists in output. We can't merge, and we
8710 // don't know what the tag means, so delete it.
8711 err_object = "output";
8712 err_tag = out_iter->first;
8713 int saved_tag = out_iter->first;
8714 delete out_iter->second;
8715 out_other_attributes->erase(out_iter);
8716 out_iter = out_other_attributes->upper_bound(saved_tag);
8718 else if (in_iter != in_other_attributes->end()
8719 && (out_iter != out_other_attributes->end()
8720 || in_iter->first < out_iter->first))
8722 // This attribute only exists in input. We can't merge, and we
8723 // don't know what the tag means, so ignore it.
8725 err_tag = in_iter->first;
8728 else // The tags are equal.
8730 // As present, all attributes in the list are unknown, and
8731 // therefore can't be merged meaningfully.
8732 err_object = "output";
8733 err_tag = out_iter->first;
8735 // Only pass on attributes that match in both inputs.
8736 if (!in_iter->second->matches(*(out_iter->second)))
8738 // No match. Delete the attribute.
8739 int saved_tag = out_iter->first;
8740 delete out_iter->second;
8741 out_other_attributes->erase(out_iter);
8742 out_iter = out_other_attributes->upper_bound(saved_tag);
8746 // Matched. Keep the attribute and move to the next.
8754 // Attribute numbers >=64 (mod 128) can be safely ignored. */
8755 if ((err_tag & 127) < 64)
8757 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
8758 err_object, err_tag);
8762 gold_warning(_("%s: unknown EABI object attribute %d"),
8763 err_object, err_tag);
8769 // Stub-generation methods for Target_arm.
8771 // Make a new Arm_input_section object.
8773 template<bool big_endian>
8774 Arm_input_section<big_endian>*
8775 Target_arm<big_endian>::new_arm_input_section(
8779 Section_id sid(relobj, shndx);
8781 Arm_input_section<big_endian>* arm_input_section =
8782 new Arm_input_section<big_endian>(relobj, shndx);
8783 arm_input_section->init();
8785 // Register new Arm_input_section in map for look-up.
8786 std::pair<typename Arm_input_section_map::iterator, bool> ins =
8787 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
8789 // Make sure that it we have not created another Arm_input_section
8790 // for this input section already.
8791 gold_assert(ins.second);
8793 return arm_input_section;
8796 // Find the Arm_input_section object corresponding to the SHNDX-th input
8797 // section of RELOBJ.
8799 template<bool big_endian>
8800 Arm_input_section<big_endian>*
8801 Target_arm<big_endian>::find_arm_input_section(
8803 unsigned int shndx) const
8805 Section_id sid(relobj, shndx);
8806 typename Arm_input_section_map::const_iterator p =
8807 this->arm_input_section_map_.find(sid);
8808 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
8811 // Make a new stub table.
8813 template<bool big_endian>
8814 Stub_table<big_endian>*
8815 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
8817 Stub_table<big_endian>* stub_table =
8818 new Stub_table<big_endian>(owner);
8819 this->stub_tables_.push_back(stub_table);
8821 stub_table->set_address(owner->address() + owner->data_size());
8822 stub_table->set_file_offset(owner->offset() + owner->data_size());
8823 stub_table->finalize_data_size();
8828 // Scan a relocation for stub generation.
8830 template<bool big_endian>
8832 Target_arm<big_endian>::scan_reloc_for_stub(
8833 const Relocate_info<32, big_endian>* relinfo,
8834 unsigned int r_type,
8835 const Sized_symbol<32>* gsym,
8837 const Symbol_value<32>* psymval,
8838 elfcpp::Elf_types<32>::Elf_Swxword addend,
8839 Arm_address address)
8841 typedef typename Target_arm<big_endian>::Relocate Relocate;
8843 const Arm_relobj<big_endian>* arm_relobj =
8844 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
8846 if (r_type == elfcpp::R_ARM_V4BX)
8848 const uint32_t reg = (addend & 0xf);
8849 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8852 // Try looking up an existing stub from a stub table.
8853 Stub_table<big_endian>* stub_table =
8854 arm_relobj->stub_table(relinfo->data_shndx);
8855 gold_assert(stub_table != NULL);
8857 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
8859 // create a new stub and add it to stub table.
8860 Arm_v4bx_stub* stub =
8861 this->stub_factory().make_arm_v4bx_stub(reg);
8862 gold_assert(stub != NULL);
8863 stub_table->add_arm_v4bx_stub(stub);
8870 bool target_is_thumb;
8871 Symbol_value<32> symval;
8874 // This is a global symbol. Determine if we use PLT and if the
8875 // final target is THUMB.
8876 if (gsym->use_plt_offset(Relocate::reloc_is_non_pic(r_type)))
8878 // This uses a PLT, change the symbol value.
8879 symval.set_output_value(this->plt_section()->address()
8880 + gsym->plt_offset());
8882 target_is_thumb = false;
8884 else if (gsym->is_undefined())
8885 // There is no need to generate a stub symbol is undefined.
8890 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
8891 || (gsym->type() == elfcpp::STT_FUNC
8892 && !gsym->is_undefined()
8893 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
8898 // This is a local symbol. Determine if the final target is THUMB.
8899 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
8902 // Strip LSB if this points to a THUMB target.
8903 const Arm_reloc_property* reloc_property =
8904 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
8905 gold_assert(reloc_property != NULL);
8907 && reloc_property->uses_thumb_bit()
8908 && ((psymval->value(arm_relobj, 0) & 1) != 0))
8910 Arm_address stripped_value =
8911 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
8912 symval.set_output_value(stripped_value);
8916 // Get the symbol value.
8917 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
8919 // Owing to pipelining, the PC relative branches below actually skip
8920 // two instructions when the branch offset is 0.
8921 Arm_address destination;
8924 case elfcpp::R_ARM_CALL:
8925 case elfcpp::R_ARM_JUMP24:
8926 case elfcpp::R_ARM_PLT32:
8928 destination = value + addend + 8;
8930 case elfcpp::R_ARM_THM_CALL:
8931 case elfcpp::R_ARM_THM_XPC22:
8932 case elfcpp::R_ARM_THM_JUMP24:
8933 case elfcpp::R_ARM_THM_JUMP19:
8935 destination = value + addend + 4;
8941 Reloc_stub* stub = NULL;
8942 Stub_type stub_type =
8943 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
8945 if (stub_type != arm_stub_none)
8947 // Try looking up an existing stub from a stub table.
8948 Stub_table<big_endian>* stub_table =
8949 arm_relobj->stub_table(relinfo->data_shndx);
8950 gold_assert(stub_table != NULL);
8952 // Locate stub by destination.
8953 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
8955 // Create a stub if there is not one already
8956 stub = stub_table->find_reloc_stub(stub_key);
8959 // create a new stub and add it to stub table.
8960 stub = this->stub_factory().make_reloc_stub(stub_type);
8961 stub_table->add_reloc_stub(stub, stub_key);
8964 // Record the destination address.
8965 stub->set_destination_address(destination
8966 | (target_is_thumb ? 1 : 0));
8969 // For Cortex-A8, we need to record a relocation at 4K page boundary.
8970 if (this->fix_cortex_a8_
8971 && (r_type == elfcpp::R_ARM_THM_JUMP24
8972 || r_type == elfcpp::R_ARM_THM_JUMP19
8973 || r_type == elfcpp::R_ARM_THM_CALL
8974 || r_type == elfcpp::R_ARM_THM_XPC22)
8975 && (address & 0xfffU) == 0xffeU)
8977 // Found a candidate. Note we haven't checked the destination is
8978 // within 4K here: if we do so (and don't create a record) we can't
8979 // tell that a branch should have been relocated when scanning later.
8980 this->cortex_a8_relocs_info_[address] =
8981 new Cortex_a8_reloc(stub, r_type,
8982 destination | (target_is_thumb ? 1 : 0));
8986 // This function scans a relocation sections for stub generation.
8987 // The template parameter Relocate must be a class type which provides
8988 // a single function, relocate(), which implements the machine
8989 // specific part of a relocation.
8991 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
8992 // SHT_REL or SHT_RELA.
8994 // PRELOCS points to the relocation data. RELOC_COUNT is the number
8995 // of relocs. OUTPUT_SECTION is the output section.
8996 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
8997 // mapped to output offsets.
8999 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
9000 // VIEW_SIZE is the size. These refer to the input section, unless
9001 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
9002 // the output section.
9004 template<bool big_endian>
9005 template<int sh_type>
9007 Target_arm<big_endian>::scan_reloc_section_for_stubs(
9008 const Relocate_info<32, big_endian>* relinfo,
9009 const unsigned char* prelocs,
9011 Output_section* output_section,
9012 bool needs_special_offset_handling,
9013 const unsigned char* view,
9014 elfcpp::Elf_types<32>::Elf_Addr view_address,
9017 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
9018 const int reloc_size =
9019 Reloc_types<sh_type, 32, big_endian>::reloc_size;
9021 Arm_relobj<big_endian>* arm_object =
9022 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9023 unsigned int local_count = arm_object->local_symbol_count();
9025 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
9027 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
9029 Reltype reloc(prelocs);
9031 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
9032 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9033 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
9035 r_type = this->get_real_reloc_type(r_type);
9037 // Only a few relocation types need stubs.
9038 if ((r_type != elfcpp::R_ARM_CALL)
9039 && (r_type != elfcpp::R_ARM_JUMP24)
9040 && (r_type != elfcpp::R_ARM_PLT32)
9041 && (r_type != elfcpp::R_ARM_THM_CALL)
9042 && (r_type != elfcpp::R_ARM_THM_XPC22)
9043 && (r_type != elfcpp::R_ARM_THM_JUMP24)
9044 && (r_type != elfcpp::R_ARM_THM_JUMP19)
9045 && (r_type != elfcpp::R_ARM_V4BX))
9048 section_offset_type offset =
9049 convert_to_section_size_type(reloc.get_r_offset());
9051 if (needs_special_offset_handling)
9053 offset = output_section->output_offset(relinfo->object,
9054 relinfo->data_shndx,
9060 if (r_type == elfcpp::R_ARM_V4BX)
9062 // Get the BX instruction.
9063 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
9064 const Valtype* wv = reinterpret_cast<const Valtype*>(view + offset);
9065 elfcpp::Elf_types<32>::Elf_Swxword insn =
9066 elfcpp::Swap<32, big_endian>::readval(wv);
9067 this->scan_reloc_for_stub(relinfo, r_type, NULL, 0, NULL,
9073 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
9074 elfcpp::Elf_types<32>::Elf_Swxword addend =
9075 stub_addend_reader(r_type, view + offset, reloc);
9077 const Sized_symbol<32>* sym;
9079 Symbol_value<32> symval;
9080 const Symbol_value<32> *psymval;
9081 if (r_sym < local_count)
9084 psymval = arm_object->local_symbol(r_sym);
9086 // If the local symbol belongs to a section we are discarding,
9087 // and that section is a debug section, try to find the
9088 // corresponding kept section and map this symbol to its
9089 // counterpart in the kept section. The symbol must not
9090 // correspond to a section we are folding.
9092 unsigned int shndx = psymval->input_shndx(&is_ordinary);
9094 && shndx != elfcpp::SHN_UNDEF
9095 && !arm_object->is_section_included(shndx)
9096 && !(relinfo->symtab->is_section_folded(arm_object, shndx)))
9098 if (comdat_behavior == CB_UNDETERMINED)
9101 arm_object->section_name(relinfo->data_shndx);
9102 comdat_behavior = get_comdat_behavior(name.c_str());
9104 if (comdat_behavior == CB_PRETEND)
9107 typename elfcpp::Elf_types<32>::Elf_Addr value =
9108 arm_object->map_to_kept_section(shndx, &found);
9110 symval.set_output_value(value + psymval->input_value());
9112 symval.set_output_value(0);
9116 symval.set_output_value(0);
9118 symval.set_no_output_symtab_entry();
9124 const Symbol* gsym = arm_object->global_symbol(r_sym);
9125 gold_assert(gsym != NULL);
9126 if (gsym->is_forwarder())
9127 gsym = relinfo->symtab->resolve_forwards(gsym);
9129 sym = static_cast<const Sized_symbol<32>*>(gsym);
9130 if (sym->has_symtab_index())
9131 symval.set_output_symtab_index(sym->symtab_index());
9133 symval.set_no_output_symtab_entry();
9135 // We need to compute the would-be final value of this global
9137 const Symbol_table* symtab = relinfo->symtab;
9138 const Sized_symbol<32>* sized_symbol =
9139 symtab->get_sized_symbol<32>(gsym);
9140 Symbol_table::Compute_final_value_status status;
9142 symtab->compute_final_value<32>(sized_symbol, &status);
9144 // Skip this if the symbol has not output section.
9145 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
9148 symval.set_output_value(value);
9152 // If symbol is a section symbol, we don't know the actual type of
9153 // destination. Give up.
9154 if (psymval->is_section_symbol())
9157 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
9158 addend, view_address + offset);
9162 // Scan an input section for stub generation.
9164 template<bool big_endian>
9166 Target_arm<big_endian>::scan_section_for_stubs(
9167 const Relocate_info<32, big_endian>* relinfo,
9168 unsigned int sh_type,
9169 const unsigned char* prelocs,
9171 Output_section* output_section,
9172 bool needs_special_offset_handling,
9173 const unsigned char* view,
9174 Arm_address view_address,
9175 section_size_type view_size)
9177 if (sh_type == elfcpp::SHT_REL)
9178 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
9183 needs_special_offset_handling,
9187 else if (sh_type == elfcpp::SHT_RELA)
9188 // We do not support RELA type relocations yet. This is provided for
9190 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
9195 needs_special_offset_handling,
9203 // Group input sections for stub generation.
9205 // We goup input sections in an output sections so that the total size,
9206 // including any padding space due to alignment is smaller than GROUP_SIZE
9207 // unless the only input section in group is bigger than GROUP_SIZE already.
9208 // Then an ARM stub table is created to follow the last input section
9209 // in group. For each group an ARM stub table is created an is placed
9210 // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further
9211 // extend the group after the stub table.
9213 template<bool big_endian>
9215 Target_arm<big_endian>::group_sections(
9217 section_size_type group_size,
9218 bool stubs_always_after_branch)
9220 // Group input sections and insert stub table
9221 Layout::Section_list section_list;
9222 layout->get_allocated_sections(§ion_list);
9223 for (Layout::Section_list::const_iterator p = section_list.begin();
9224 p != section_list.end();
9227 Arm_output_section<big_endian>* output_section =
9228 Arm_output_section<big_endian>::as_arm_output_section(*p);
9229 output_section->group_sections(group_size, stubs_always_after_branch,
9234 // Relaxation hook. This is where we do stub generation.
9236 template<bool big_endian>
9238 Target_arm<big_endian>::do_relax(
9240 const Input_objects* input_objects,
9241 Symbol_table* symtab,
9244 // No need to generate stubs if this is a relocatable link.
9245 gold_assert(!parameters->options().relocatable());
9247 // If this is the first pass, we need to group input sections into
9249 bool done_exidx_fixup = false;
9252 // Determine the stub group size. The group size is the absolute
9253 // value of the parameter --stub-group-size. If --stub-group-size
9254 // is passed a negative value, we restict stubs to be always after
9255 // the stubbed branches.
9256 int32_t stub_group_size_param =
9257 parameters->options().stub_group_size();
9258 bool stubs_always_after_branch = stub_group_size_param < 0;
9259 section_size_type stub_group_size = abs(stub_group_size_param);
9261 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
9262 // page as the first half of a 32-bit branch straddling two 4K pages.
9263 // This is a crude way of enforcing that.
9264 if (this->fix_cortex_a8_)
9265 stubs_always_after_branch = true;
9267 if (stub_group_size == 1)
9270 // Thumb branch range is +-4MB has to be used as the default
9271 // maximum size (a given section can contain both ARM and Thumb
9272 // code, so the worst case has to be taken into account).
9274 // This value is 24K less than that, which allows for 2025
9275 // 12-byte stubs. If we exceed that, then we will fail to link.
9276 // The user will have to relink with an explicit group size
9278 stub_group_size = 4170000;
9281 group_sections(layout, stub_group_size, stubs_always_after_branch);
9283 // Also fix .ARM.exidx section coverage.
9284 Output_section* os = layout->find_output_section(".ARM.exidx");
9285 if (os != NULL && os->type() == elfcpp::SHT_ARM_EXIDX)
9287 Arm_output_section<big_endian>* exidx_output_section =
9288 Arm_output_section<big_endian>::as_arm_output_section(os);
9289 this->fix_exidx_coverage(layout, exidx_output_section, symtab);
9290 done_exidx_fixup = true;
9294 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
9295 // beginning of each relaxation pass, just blow away all the stubs.
9296 // Alternatively, we could selectively remove only the stubs and reloc
9297 // information for code sections that have moved since the last pass.
9298 // That would require more book-keeping.
9299 typedef typename Stub_table_list::iterator Stub_table_iterator;
9300 if (this->fix_cortex_a8_)
9302 // Clear all Cortex-A8 reloc information.
9303 for (typename Cortex_a8_relocs_info::const_iterator p =
9304 this->cortex_a8_relocs_info_.begin();
9305 p != this->cortex_a8_relocs_info_.end();
9308 this->cortex_a8_relocs_info_.clear();
9310 // Remove all Cortex-A8 stubs.
9311 for (Stub_table_iterator sp = this->stub_tables_.begin();
9312 sp != this->stub_tables_.end();
9314 (*sp)->remove_all_cortex_a8_stubs();
9317 // Scan relocs for relocation stubs
9318 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9319 op != input_objects->relobj_end();
9322 Arm_relobj<big_endian>* arm_relobj =
9323 Arm_relobj<big_endian>::as_arm_relobj(*op);
9324 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
9327 // Check all stub tables to see if any of them have their data sizes
9328 // or addresses alignments changed. These are the only things that
9330 bool any_stub_table_changed = false;
9331 Unordered_set<const Output_section*> sections_needing_adjustment;
9332 for (Stub_table_iterator sp = this->stub_tables_.begin();
9333 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9336 if ((*sp)->update_data_size_and_addralign())
9338 // Update data size of stub table owner.
9339 Arm_input_section<big_endian>* owner = (*sp)->owner();
9340 uint64_t address = owner->address();
9341 off_t offset = owner->offset();
9342 owner->reset_address_and_file_offset();
9343 owner->set_address_and_file_offset(address, offset);
9345 sections_needing_adjustment.insert(owner->output_section());
9346 any_stub_table_changed = true;
9350 // Output_section_data::output_section() returns a const pointer but we
9351 // need to update output sections, so we record all output sections needing
9352 // update above and scan the sections here to find out what sections need
9354 for(Layout::Section_list::const_iterator p = layout->section_list().begin();
9355 p != layout->section_list().end();
9358 if (sections_needing_adjustment.find(*p)
9359 != sections_needing_adjustment.end())
9360 (*p)->set_section_offsets_need_adjustment();
9363 // Stop relaxation if no EXIDX fix-up and no stub table change.
9364 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
9366 // Finalize the stubs in the last relaxation pass.
9367 if (!continue_relaxation)
9369 for (Stub_table_iterator sp = this->stub_tables_.begin();
9370 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9372 (*sp)->finalize_stubs();
9374 // Update output local symbol counts of objects if necessary.
9375 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9376 op != input_objects->relobj_end();
9379 Arm_relobj<big_endian>* arm_relobj =
9380 Arm_relobj<big_endian>::as_arm_relobj(*op);
9382 // Update output local symbol counts. We need to discard local
9383 // symbols defined in parts of input sections that are discarded by
9385 if (arm_relobj->output_local_symbol_count_needs_update())
9386 arm_relobj->update_output_local_symbol_count();
9390 return continue_relaxation;
9395 template<bool big_endian>
9397 Target_arm<big_endian>::relocate_stub(
9399 const Relocate_info<32, big_endian>* relinfo,
9400 Output_section* output_section,
9401 unsigned char* view,
9402 Arm_address address,
9403 section_size_type view_size)
9406 const Stub_template* stub_template = stub->stub_template();
9407 for (size_t i = 0; i < stub_template->reloc_count(); i++)
9409 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
9410 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
9412 unsigned int r_type = insn->r_type();
9413 section_size_type reloc_offset = stub_template->reloc_offset(i);
9414 section_size_type reloc_size = insn->size();
9415 gold_assert(reloc_offset + reloc_size <= view_size);
9417 // This is the address of the stub destination.
9418 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
9419 Symbol_value<32> symval;
9420 symval.set_output_value(target);
9422 // Synthesize a fake reloc just in case. We don't have a symbol so
9424 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
9425 memset(reloc_buffer, 0, sizeof(reloc_buffer));
9426 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
9427 reloc_write.put_r_offset(reloc_offset);
9428 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
9429 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
9431 relocate.relocate(relinfo, this, output_section,
9432 this->fake_relnum_for_stubs, rel, r_type,
9433 NULL, &symval, view + reloc_offset,
9434 address + reloc_offset, reloc_size);
9438 // Determine whether an object attribute tag takes an integer, a
9441 template<bool big_endian>
9443 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
9445 if (tag == Object_attribute::Tag_compatibility)
9446 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9447 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
9448 else if (tag == elfcpp::Tag_nodefaults)
9449 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9450 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
9451 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
9452 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
9454 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
9456 return ((tag & 1) != 0
9457 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
9458 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
9461 // Reorder attributes.
9463 // The ABI defines that Tag_conformance should be emitted first, and that
9464 // Tag_nodefaults should be second (if either is defined). This sets those
9465 // two positions, and bumps up the position of all the remaining tags to
9468 template<bool big_endian>
9470 Target_arm<big_endian>::do_attributes_order(int num) const
9472 // Reorder the known object attributes in output. We want to move
9473 // Tag_conformance to position 4 and Tag_conformance to position 5
9474 // and shift eveything between 4 .. Tag_conformance - 1 to make room.
9476 return elfcpp::Tag_conformance;
9478 return elfcpp::Tag_nodefaults;
9479 if ((num - 2) < elfcpp::Tag_nodefaults)
9481 if ((num - 1) < elfcpp::Tag_conformance)
9486 // Scan a span of THUMB code for Cortex-A8 erratum.
9488 template<bool big_endian>
9490 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
9491 Arm_relobj<big_endian>* arm_relobj,
9493 section_size_type span_start,
9494 section_size_type span_end,
9495 const unsigned char* view,
9496 Arm_address address)
9498 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
9500 // The opcode is BLX.W, BL.W, B.W, Bcc.W
9501 // The branch target is in the same 4KB region as the
9502 // first half of the branch.
9503 // The instruction before the branch is a 32-bit
9504 // length non-branch instruction.
9505 section_size_type i = span_start;
9506 bool last_was_32bit = false;
9507 bool last_was_branch = false;
9508 while (i < span_end)
9510 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
9511 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
9512 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
9513 bool is_blx = false, is_b = false;
9514 bool is_bl = false, is_bcc = false;
9516 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
9519 // Load the rest of the insn (in manual-friendly order).
9520 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
9522 // Encoding T4: B<c>.W.
9523 is_b = (insn & 0xf800d000U) == 0xf0009000U;
9524 // Encoding T1: BL<c>.W.
9525 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
9526 // Encoding T2: BLX<c>.W.
9527 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
9528 // Encoding T3: B<c>.W (not permitted in IT block).
9529 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
9530 && (insn & 0x07f00000U) != 0x03800000U);
9533 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
9535 // If this instruction is a 32-bit THUMB branch that crosses a 4K
9536 // page boundary and it follows 32-bit non-branch instruction,
9537 // we need to work around.
9539 && ((address + i) & 0xfffU) == 0xffeU
9541 && !last_was_branch)
9543 // Check to see if there is a relocation stub for this branch.
9544 bool force_target_arm = false;
9545 bool force_target_thumb = false;
9546 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
9547 Cortex_a8_relocs_info::const_iterator p =
9548 this->cortex_a8_relocs_info_.find(address + i);
9550 if (p != this->cortex_a8_relocs_info_.end())
9552 cortex_a8_reloc = p->second;
9553 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
9555 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9556 && !target_is_thumb)
9557 force_target_arm = true;
9558 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9560 force_target_thumb = true;
9564 Stub_type stub_type = arm_stub_none;
9566 // Check if we have an offending branch instruction.
9567 uint16_t upper_insn = (insn >> 16) & 0xffffU;
9568 uint16_t lower_insn = insn & 0xffffU;
9569 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
9571 if (cortex_a8_reloc != NULL
9572 && cortex_a8_reloc->reloc_stub() != NULL)
9573 // We've already made a stub for this instruction, e.g.
9574 // it's a long branch or a Thumb->ARM stub. Assume that
9575 // stub will suffice to work around the A8 erratum (see
9576 // setting of always_after_branch above).
9580 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
9582 stub_type = arm_stub_a8_veneer_b_cond;
9584 else if (is_b || is_bl || is_blx)
9586 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
9592 ? arm_stub_a8_veneer_blx
9594 ? arm_stub_a8_veneer_bl
9595 : arm_stub_a8_veneer_b));
9598 if (stub_type != arm_stub_none)
9600 Arm_address pc_for_insn = address + i + 4;
9602 // The original instruction is a BL, but the target is
9603 // an ARM instruction. If we were not making a stub,
9604 // the BL would have been converted to a BLX. Use the
9605 // BLX stub instead in that case.
9606 if (this->may_use_blx() && force_target_arm
9607 && stub_type == arm_stub_a8_veneer_bl)
9609 stub_type = arm_stub_a8_veneer_blx;
9613 // Conversely, if the original instruction was
9614 // BLX but the target is Thumb mode, use the BL stub.
9615 else if (force_target_thumb
9616 && stub_type == arm_stub_a8_veneer_blx)
9618 stub_type = arm_stub_a8_veneer_bl;
9626 // If we found a relocation, use the proper destination,
9627 // not the offset in the (unrelocated) instruction.
9628 // Note this is always done if we switched the stub type above.
9629 if (cortex_a8_reloc != NULL)
9630 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
9632 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
9634 // Add a new stub if destination address in in the same page.
9635 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
9637 Cortex_a8_stub* stub =
9638 this->stub_factory_.make_cortex_a8_stub(stub_type,
9642 Stub_table<big_endian>* stub_table =
9643 arm_relobj->stub_table(shndx);
9644 gold_assert(stub_table != NULL);
9645 stub_table->add_cortex_a8_stub(address + i, stub);
9650 i += insn_32bit ? 4 : 2;
9651 last_was_32bit = insn_32bit;
9652 last_was_branch = is_32bit_branch;
9656 // Apply the Cortex-A8 workaround.
9658 template<bool big_endian>
9660 Target_arm<big_endian>::apply_cortex_a8_workaround(
9661 const Cortex_a8_stub* stub,
9662 Arm_address stub_address,
9663 unsigned char* insn_view,
9664 Arm_address insn_address)
9666 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
9667 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
9668 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
9669 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
9670 off_t branch_offset = stub_address - (insn_address + 4);
9672 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
9673 switch (stub->stub_template()->type())
9675 case arm_stub_a8_veneer_b_cond:
9676 gold_assert(!utils::has_overflow<21>(branch_offset));
9677 upper_insn = RelocFuncs::thumb32_cond_branch_upper(upper_insn,
9679 lower_insn = RelocFuncs::thumb32_cond_branch_lower(lower_insn,
9683 case arm_stub_a8_veneer_b:
9684 case arm_stub_a8_veneer_bl:
9685 case arm_stub_a8_veneer_blx:
9686 if ((lower_insn & 0x5000U) == 0x4000U)
9687 // For a BLX instruction, make sure that the relocation is
9688 // rounded up to a word boundary. This follows the semantics of
9689 // the instruction which specifies that bit 1 of the target
9690 // address will come from bit 1 of the base address.
9691 branch_offset = (branch_offset + 2) & ~3;
9693 // Put BRANCH_OFFSET back into the insn.
9694 gold_assert(!utils::has_overflow<25>(branch_offset));
9695 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
9696 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
9703 // Put the relocated value back in the object file:
9704 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
9705 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
9708 template<bool big_endian>
9709 class Target_selector_arm : public Target_selector
9712 Target_selector_arm()
9713 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
9714 (big_endian ? "elf32-bigarm" : "elf32-littlearm"))
9718 do_instantiate_target()
9719 { return new Target_arm<big_endian>(); }
9722 // Fix .ARM.exidx section coverage.
9724 template<bool big_endian>
9726 Target_arm<big_endian>::fix_exidx_coverage(
9728 Arm_output_section<big_endian>* exidx_section,
9729 Symbol_table* symtab)
9731 // We need to look at all the input sections in output in ascending
9732 // order of of output address. We do that by building a sorted list
9733 // of output sections by addresses. Then we looks at the output sections
9734 // in order. The input sections in an output section are already sorted
9735 // by addresses within the output section.
9737 typedef std::set<Output_section*, output_section_address_less_than>
9738 Sorted_output_section_list;
9739 Sorted_output_section_list sorted_output_sections;
9740 Layout::Section_list section_list;
9741 layout->get_allocated_sections(§ion_list);
9742 for (Layout::Section_list::const_iterator p = section_list.begin();
9743 p != section_list.end();
9746 // We only care about output sections that contain executable code.
9747 if (((*p)->flags() & elfcpp::SHF_EXECINSTR) != 0)
9748 sorted_output_sections.insert(*p);
9751 // Go over the output sections in ascending order of output addresses.
9752 typedef typename Arm_output_section<big_endian>::Text_section_list
9754 Text_section_list sorted_text_sections;
9755 for(typename Sorted_output_section_list::iterator p =
9756 sorted_output_sections.begin();
9757 p != sorted_output_sections.end();
9760 Arm_output_section<big_endian>* arm_output_section =
9761 Arm_output_section<big_endian>::as_arm_output_section(*p);
9762 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
9765 exidx_section->fix_exidx_coverage(sorted_text_sections, symtab);
9768 Target_selector_arm<false> target_selector_arm;
9769 Target_selector_arm<true> target_selector_armbe;
9771 } // End anonymous namespace.