1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian>
61 class Output_data_plt_arm;
63 template<bool big_endian>
66 template<bool big_endian>
67 class Arm_input_section;
69 class Arm_exidx_cantunwind;
71 class Arm_exidx_merged_section;
73 class Arm_exidx_fixup;
75 template<bool big_endian>
76 class Arm_output_section;
78 class Arm_exidx_input_section;
80 template<bool big_endian>
83 template<bool big_endian>
87 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
89 // Maximum branch offsets for ARM, THUMB and THUMB2.
90 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
91 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
92 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
93 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
94 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
95 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
97 // The arm target class.
99 // This is a very simple port of gold for ARM-EABI. It is intended for
100 // supporting Android only for the time being.
103 // - Implement all static relocation types documented in arm-reloc.def.
104 // - Make PLTs more flexible for different architecture features like
106 // There are probably a lot more.
108 // Ideally we would like to avoid using global variables but this is used
109 // very in many places and sometimes in loops. If we use a function
110 // returning a static instance of Arm_reloc_property_table, it will very
111 // slow in an threaded environment since the static instance needs to be
112 // locked. The pointer is below initialized in the
113 // Target::do_select_as_default_target() hook so that we do not spend time
114 // building the table if we are not linking ARM objects.
116 // An alternative is to to process the information in arm-reloc.def in
117 // compilation time and generate a representation of it in PODs only. That
118 // way we can avoid initialization when the linker starts.
120 Arm_reloc_property_table *arm_reloc_property_table = NULL;
122 // Instruction template class. This class is similar to the insn_sequence
123 // struct in bfd/elf32-arm.c.
128 // Types of instruction templates.
132 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
133 // templates with class-specific semantics. Currently this is used
134 // only by the Cortex_a8_stub class for handling condition codes in
135 // conditional branches.
136 THUMB16_SPECIAL_TYPE,
142 // Factory methods to create instruction templates in different formats.
144 static const Insn_template
145 thumb16_insn(uint32_t data)
146 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
148 // A Thumb conditional branch, in which the proper condition is inserted
149 // when we build the stub.
150 static const Insn_template
151 thumb16_bcond_insn(uint32_t data)
152 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
154 static const Insn_template
155 thumb32_insn(uint32_t data)
156 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
158 static const Insn_template
159 thumb32_b_insn(uint32_t data, int reloc_addend)
161 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
165 static const Insn_template
166 arm_insn(uint32_t data)
167 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
169 static const Insn_template
170 arm_rel_insn(unsigned data, int reloc_addend)
171 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
173 static const Insn_template
174 data_word(unsigned data, unsigned int r_type, int reloc_addend)
175 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
177 // Accessors. This class is used for read-only objects so no modifiers
182 { return this->data_; }
184 // Return the instruction sequence type of this.
187 { return this->type_; }
189 // Return the ARM relocation type of this.
192 { return this->r_type_; }
196 { return this->reloc_addend_; }
198 // Return size of instruction template in bytes.
202 // Return byte-alignment of instruction template.
207 // We make the constructor private to ensure that only the factory
210 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
211 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
214 // Instruction specific data. This is used to store information like
215 // some of the instruction bits.
217 // Instruction template type.
219 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
220 unsigned int r_type_;
221 // Relocation addend.
222 int32_t reloc_addend_;
225 // Macro for generating code to stub types. One entry per long/short
229 DEF_STUB(long_branch_any_any) \
230 DEF_STUB(long_branch_v4t_arm_thumb) \
231 DEF_STUB(long_branch_thumb_only) \
232 DEF_STUB(long_branch_v4t_thumb_thumb) \
233 DEF_STUB(long_branch_v4t_thumb_arm) \
234 DEF_STUB(short_branch_v4t_thumb_arm) \
235 DEF_STUB(long_branch_any_arm_pic) \
236 DEF_STUB(long_branch_any_thumb_pic) \
237 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
238 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
239 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
240 DEF_STUB(long_branch_thumb_only_pic) \
241 DEF_STUB(a8_veneer_b_cond) \
242 DEF_STUB(a8_veneer_b) \
243 DEF_STUB(a8_veneer_bl) \
244 DEF_STUB(a8_veneer_blx) \
245 DEF_STUB(v4_veneer_bx)
249 #define DEF_STUB(x) arm_stub_##x,
255 // First reloc stub type.
256 arm_stub_reloc_first = arm_stub_long_branch_any_any,
257 // Last reloc stub type.
258 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
260 // First Cortex-A8 stub type.
261 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
262 // Last Cortex-A8 stub type.
263 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
266 arm_stub_type_last = arm_stub_v4_veneer_bx
270 // Stub template class. Templates are meant to be read-only objects.
271 // A stub template for a stub type contains all read-only attributes
272 // common to all stubs of the same type.
277 Stub_template(Stub_type, const Insn_template*, size_t);
285 { return this->type_; }
287 // Return an array of instruction templates.
290 { return this->insns_; }
292 // Return size of template in number of instructions.
295 { return this->insn_count_; }
297 // Return size of template in bytes.
300 { return this->size_; }
302 // Return alignment of the stub template.
305 { return this->alignment_; }
307 // Return whether entry point is in thumb mode.
309 entry_in_thumb_mode() const
310 { return this->entry_in_thumb_mode_; }
312 // Return number of relocations in this template.
315 { return this->relocs_.size(); }
317 // Return index of the I-th instruction with relocation.
319 reloc_insn_index(size_t i) const
321 gold_assert(i < this->relocs_.size());
322 return this->relocs_[i].first;
325 // Return the offset of the I-th instruction with relocation from the
326 // beginning of the stub.
328 reloc_offset(size_t i) const
330 gold_assert(i < this->relocs_.size());
331 return this->relocs_[i].second;
335 // This contains information about an instruction template with a relocation
336 // and its offset from start of stub.
337 typedef std::pair<size_t, section_size_type> Reloc;
339 // A Stub_template may not be copied. We want to share templates as much
341 Stub_template(const Stub_template&);
342 Stub_template& operator=(const Stub_template&);
346 // Points to an array of Insn_templates.
347 const Insn_template* insns_;
348 // Number of Insn_templates in insns_[].
350 // Size of templated instructions in bytes.
352 // Alignment of templated instructions.
354 // Flag to indicate if entry is in thumb mode.
355 bool entry_in_thumb_mode_;
356 // A table of reloc instruction indices and offsets. We can find these by
357 // looking at the instruction templates but we pre-compute and then stash
358 // them here for speed.
359 std::vector<Reloc> relocs_;
363 // A class for code stubs. This is a base class for different type of
364 // stubs used in the ARM target.
370 static const section_offset_type invalid_offset =
371 static_cast<section_offset_type>(-1);
374 Stub(const Stub_template* stub_template)
375 : stub_template_(stub_template), offset_(invalid_offset)
382 // Return the stub template.
384 stub_template() const
385 { return this->stub_template_; }
387 // Return offset of code stub from beginning of its containing stub table.
391 gold_assert(this->offset_ != invalid_offset);
392 return this->offset_;
395 // Set offset of code stub from beginning of its containing stub table.
397 set_offset(section_offset_type offset)
398 { this->offset_ = offset; }
400 // Return the relocation target address of the i-th relocation in the
401 // stub. This must be defined in a child class.
403 reloc_target(size_t i)
404 { return this->do_reloc_target(i); }
406 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
408 write(unsigned char* view, section_size_type view_size, bool big_endian)
409 { this->do_write(view, view_size, big_endian); }
411 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
412 // for the i-th instruction.
414 thumb16_special(size_t i)
415 { return this->do_thumb16_special(i); }
418 // This must be defined in the child class.
420 do_reloc_target(size_t) = 0;
422 // This may be overridden in the child class.
424 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
427 this->do_fixed_endian_write<true>(view, view_size);
429 this->do_fixed_endian_write<false>(view, view_size);
432 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
433 // instruction template.
435 do_thumb16_special(size_t)
436 { gold_unreachable(); }
439 // A template to implement do_write.
440 template<bool big_endian>
442 do_fixed_endian_write(unsigned char*, section_size_type);
445 const Stub_template* stub_template_;
446 // Offset within the section of containing this stub.
447 section_offset_type offset_;
450 // Reloc stub class. These are stubs we use to fix up relocation because
451 // of limited branch ranges.
453 class Reloc_stub : public Stub
456 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
457 // We assume we never jump to this address.
458 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
460 // Return destination address.
462 destination_address() const
464 gold_assert(this->destination_address_ != this->invalid_address);
465 return this->destination_address_;
468 // Set destination address.
470 set_destination_address(Arm_address address)
472 gold_assert(address != this->invalid_address);
473 this->destination_address_ = address;
476 // Reset destination address.
478 reset_destination_address()
479 { this->destination_address_ = this->invalid_address; }
481 // Determine stub type for a branch of a relocation of R_TYPE going
482 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
483 // the branch target is a thumb instruction. TARGET is used for look
484 // up ARM-specific linker settings.
486 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
487 Arm_address branch_target, bool target_is_thumb);
489 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
490 // and an addend. Since we treat global and local symbol differently, we
491 // use a Symbol object for a global symbol and a object-index pair for
496 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
497 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
498 // and R_SYM must not be invalid_index.
499 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
500 unsigned int r_sym, int32_t addend)
501 : stub_type_(stub_type), addend_(addend)
505 this->r_sym_ = Reloc_stub::invalid_index;
506 this->u_.symbol = symbol;
510 gold_assert(relobj != NULL && r_sym != invalid_index);
511 this->r_sym_ = r_sym;
512 this->u_.relobj = relobj;
519 // Accessors: Keys are meant to be read-only object so no modifiers are
525 { return this->stub_type_; }
527 // Return the local symbol index or invalid_index.
530 { return this->r_sym_; }
532 // Return the symbol if there is one.
535 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
537 // Return the relobj if there is one.
540 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
542 // Whether this equals to another key k.
544 eq(const Key& k) const
546 return ((this->stub_type_ == k.stub_type_)
547 && (this->r_sym_ == k.r_sym_)
548 && ((this->r_sym_ != Reloc_stub::invalid_index)
549 ? (this->u_.relobj == k.u_.relobj)
550 : (this->u_.symbol == k.u_.symbol))
551 && (this->addend_ == k.addend_));
554 // Return a hash value.
558 return (this->stub_type_
560 ^ gold::string_hash<char>(
561 (this->r_sym_ != Reloc_stub::invalid_index)
562 ? this->u_.relobj->name().c_str()
563 : this->u_.symbol->name())
567 // Functors for STL associative containers.
571 operator()(const Key& k) const
572 { return k.hash_value(); }
578 operator()(const Key& k1, const Key& k2) const
579 { return k1.eq(k2); }
582 // Name of key. This is mainly for debugging.
588 Stub_type stub_type_;
589 // If this is a local symbol, this is the index in the defining object.
590 // Otherwise, it is invalid_index for a global symbol.
592 // If r_sym_ is invalid index. This points to a global symbol.
593 // Otherwise, this points a relobj. We used the unsized and target
594 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
595 // Arm_relobj. This is done to avoid making the stub class a template
596 // as most of the stub machinery is endianity-neutral. However, it
597 // may require a bit of casting done by users of this class.
600 const Symbol* symbol;
601 const Relobj* relobj;
603 // Addend associated with a reloc.
608 // Reloc_stubs are created via a stub factory. So these are protected.
609 Reloc_stub(const Stub_template* stub_template)
610 : Stub(stub_template), destination_address_(invalid_address)
616 friend class Stub_factory;
618 // Return the relocation target address of the i-th relocation in the
621 do_reloc_target(size_t i)
623 // All reloc stub have only one relocation.
625 return this->destination_address_;
629 // Address of destination.
630 Arm_address destination_address_;
633 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
634 // THUMB branch that meets the following conditions:
636 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
637 // branch address is 0xffe.
638 // 2. The branch target address is in the same page as the first word of the
640 // 3. The branch follows a 32-bit instruction which is not a branch.
642 // To do the fix up, we need to store the address of the branch instruction
643 // and its target at least. We also need to store the original branch
644 // instruction bits for the condition code in a conditional branch. The
645 // condition code is used in a special instruction template. We also want
646 // to identify input sections needing Cortex-A8 workaround quickly. We store
647 // extra information about object and section index of the code section
648 // containing a branch being fixed up. The information is used to mark
649 // the code section when we finalize the Cortex-A8 stubs.
652 class Cortex_a8_stub : public Stub
658 // Return the object of the code section containing the branch being fixed
662 { return this->relobj_; }
664 // Return the section index of the code section containing the branch being
668 { return this->shndx_; }
670 // Return the source address of stub. This is the address of the original
671 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
674 source_address() const
675 { return this->source_address_; }
677 // Return the destination address of the stub. This is the branch taken
678 // address of the original branch instruction. LSB is 1 if it is a THUMB
679 // instruction address.
681 destination_address() const
682 { return this->destination_address_; }
684 // Return the instruction being fixed up.
686 original_insn() const
687 { return this->original_insn_; }
690 // Cortex_a8_stubs are created via a stub factory. So these are protected.
691 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
692 unsigned int shndx, Arm_address source_address,
693 Arm_address destination_address, uint32_t original_insn)
694 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
695 source_address_(source_address | 1U),
696 destination_address_(destination_address),
697 original_insn_(original_insn)
700 friend class Stub_factory;
702 // Return the relocation target address of the i-th relocation in the
705 do_reloc_target(size_t i)
707 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
709 // The conditional branch veneer has two relocations.
711 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
715 // All other Cortex-A8 stubs have only one relocation.
717 return this->destination_address_;
721 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
723 do_thumb16_special(size_t);
726 // Object of the code section containing the branch being fixed up.
728 // Section index of the code section containing the branch begin fixed up.
730 // Source address of original branch.
731 Arm_address source_address_;
732 // Destination address of the original branch.
733 Arm_address destination_address_;
734 // Original branch instruction. This is needed for copying the condition
735 // code from a condition branch to its stub.
736 uint32_t original_insn_;
739 // ARMv4 BX Rx branch relocation stub class.
740 class Arm_v4bx_stub : public Stub
746 // Return the associated register.
749 { return this->reg_; }
752 // Arm V4BX stubs are created via a stub factory. So these are protected.
753 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
754 : Stub(stub_template), reg_(reg)
757 friend class Stub_factory;
759 // Return the relocation target address of the i-th relocation in the
762 do_reloc_target(size_t)
763 { gold_unreachable(); }
765 // This may be overridden in the child class.
767 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
770 this->do_fixed_endian_v4bx_write<true>(view, view_size);
772 this->do_fixed_endian_v4bx_write<false>(view, view_size);
776 // A template to implement do_write.
777 template<bool big_endian>
779 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
781 const Insn_template* insns = this->stub_template()->insns();
782 elfcpp::Swap<32, big_endian>::writeval(view,
784 + (this->reg_ << 16)));
785 view += insns[0].size();
786 elfcpp::Swap<32, big_endian>::writeval(view,
787 (insns[1].data() + this->reg_));
788 view += insns[1].size();
789 elfcpp::Swap<32, big_endian>::writeval(view,
790 (insns[2].data() + this->reg_));
793 // A register index (r0-r14), which is associated with the stub.
797 // Stub factory class.
802 // Return the unique instance of this class.
803 static const Stub_factory&
806 static Stub_factory singleton;
810 // Make a relocation stub.
812 make_reloc_stub(Stub_type stub_type) const
814 gold_assert(stub_type >= arm_stub_reloc_first
815 && stub_type <= arm_stub_reloc_last);
816 return new Reloc_stub(this->stub_templates_[stub_type]);
819 // Make a Cortex-A8 stub.
821 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
822 Arm_address source, Arm_address destination,
823 uint32_t original_insn) const
825 gold_assert(stub_type >= arm_stub_cortex_a8_first
826 && stub_type <= arm_stub_cortex_a8_last);
827 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
828 source, destination, original_insn);
831 // Make an ARM V4BX relocation stub.
832 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
834 make_arm_v4bx_stub(uint32_t reg) const
836 gold_assert(reg < 0xf);
837 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
842 // Constructor and destructor are protected since we only return a single
843 // instance created in Stub_factory::get_instance().
847 // A Stub_factory may not be copied since it is a singleton.
848 Stub_factory(const Stub_factory&);
849 Stub_factory& operator=(Stub_factory&);
851 // Stub templates. These are initialized in the constructor.
852 const Stub_template* stub_templates_[arm_stub_type_last+1];
855 // A class to hold stubs for the ARM target.
857 template<bool big_endian>
858 class Stub_table : public Output_data
861 Stub_table(Arm_input_section<big_endian>* owner)
862 : Output_data(), owner_(owner), reloc_stubs_(), cortex_a8_stubs_(),
863 arm_v4bx_stubs_(0xf), prev_data_size_(0), prev_addralign_(1)
869 // Owner of this stub table.
870 Arm_input_section<big_endian>*
872 { return this->owner_; }
874 // Whether this stub table is empty.
878 return (this->reloc_stubs_.empty()
879 && this->cortex_a8_stubs_.empty()
880 && this->arm_v4bx_stubs_.empty());
883 // Return the current data size.
885 current_data_size() const
886 { return this->current_data_size_for_child(); }
888 // Add a STUB with using KEY. Caller is reponsible for avoid adding
889 // if already a STUB with the same key has been added.
891 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
893 const Stub_template* stub_template = stub->stub_template();
894 gold_assert(stub_template->type() == key.stub_type());
895 this->reloc_stubs_[key] = stub;
898 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
899 // Caller is reponsible for avoid adding if already a STUB with the same
900 // address has been added.
902 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
904 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
905 this->cortex_a8_stubs_.insert(value);
908 // Add an ARM V4BX relocation stub. A register index will be retrieved
911 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
913 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
914 this->arm_v4bx_stubs_[stub->reg()] = stub;
917 // Remove all Cortex-A8 stubs.
919 remove_all_cortex_a8_stubs();
921 // Look up a relocation stub using KEY. Return NULL if there is none.
923 find_reloc_stub(const Reloc_stub::Key& key) const
925 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
926 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
929 // Look up an arm v4bx relocation stub using the register index.
930 // Return NULL if there is none.
932 find_arm_v4bx_stub(const uint32_t reg) const
934 gold_assert(reg < 0xf);
935 return this->arm_v4bx_stubs_[reg];
938 // Relocate stubs in this stub table.
940 relocate_stubs(const Relocate_info<32, big_endian>*,
941 Target_arm<big_endian>*, Output_section*,
942 unsigned char*, Arm_address, section_size_type);
944 // Update data size and alignment at the end of a relaxation pass. Return
945 // true if either data size or alignment is different from that of the
946 // previous relaxation pass.
948 update_data_size_and_addralign();
950 // Finalize stubs. Set the offsets of all stubs and mark input sections
951 // needing the Cortex-A8 workaround.
955 // Apply Cortex-A8 workaround to an address range.
957 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
958 unsigned char*, Arm_address,
962 // Write out section contents.
964 do_write(Output_file*);
966 // Return the required alignment.
969 { return this->prev_addralign_; }
971 // Reset address and file offset.
973 do_reset_address_and_file_offset()
974 { this->set_current_data_size_for_child(this->prev_data_size_); }
976 // Set final data size.
978 set_final_data_size()
979 { this->set_data_size(this->current_data_size()); }
982 // Relocate one stub.
984 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
985 Target_arm<big_endian>*, Output_section*,
986 unsigned char*, Arm_address, section_size_type);
988 // Unordered map of relocation stubs.
990 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
991 Reloc_stub::Key::equal_to>
994 // List of Cortex-A8 stubs ordered by addresses of branches being
995 // fixed up in output.
996 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
997 // List of Arm V4BX relocation stubs ordered by associated registers.
998 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1000 // Owner of this stub table.
1001 Arm_input_section<big_endian>* owner_;
1002 // The relocation stubs.
1003 Reloc_stub_map reloc_stubs_;
1004 // The cortex_a8_stubs.
1005 Cortex_a8_stub_list cortex_a8_stubs_;
1006 // The Arm V4BX relocation stubs.
1007 Arm_v4bx_stub_list arm_v4bx_stubs_;
1008 // data size of this in the previous pass.
1009 off_t prev_data_size_;
1010 // address alignment of this in the previous pass.
1011 uint64_t prev_addralign_;
1014 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1015 // we add to the end of an EXIDX input section that goes into the output.
1017 class Arm_exidx_cantunwind : public Output_section_data
1020 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1021 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1024 // Return the object containing the section pointed by this.
1027 { return this->relobj_; }
1029 // Return the section index of the section pointed by this.
1032 { return this->shndx_; }
1036 do_write(Output_file* of)
1038 if (parameters->target().is_big_endian())
1039 this->do_fixed_endian_write<true>(of);
1041 this->do_fixed_endian_write<false>(of);
1045 // Implement do_write for a given endianity.
1046 template<bool big_endian>
1048 do_fixed_endian_write(Output_file*);
1050 // The object containing the section pointed by this.
1052 // The section index of the section pointed by this.
1053 unsigned int shndx_;
1056 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1057 // Offset map is used to map input section offset within the EXIDX section
1058 // to the output offset from the start of this EXIDX section.
1060 typedef std::map<section_offset_type, section_offset_type>
1061 Arm_exidx_section_offset_map;
1063 // Arm_exidx_merged_section class. This represents an EXIDX input section
1064 // with some of its entries merged.
1066 class Arm_exidx_merged_section : public Output_relaxed_input_section
1069 // Constructor for Arm_exidx_merged_section.
1070 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1071 // SECTION_OFFSET_MAP points to a section offset map describing how
1072 // parts of the input section are mapped to output. DELETED_BYTES is
1073 // the number of bytes deleted from the EXIDX input section.
1074 Arm_exidx_merged_section(
1075 const Arm_exidx_input_section& exidx_input_section,
1076 const Arm_exidx_section_offset_map& section_offset_map,
1077 uint32_t deleted_bytes);
1079 // Return the original EXIDX input section.
1080 const Arm_exidx_input_section&
1081 exidx_input_section() const
1082 { return this->exidx_input_section_; }
1084 // Return the section offset map.
1085 const Arm_exidx_section_offset_map&
1086 section_offset_map() const
1087 { return this->section_offset_map_; }
1090 // Write merged section into file OF.
1092 do_write(Output_file* of);
1095 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1096 section_offset_type*) const;
1099 // Original EXIDX input section.
1100 const Arm_exidx_input_section& exidx_input_section_;
1101 // Section offset map.
1102 const Arm_exidx_section_offset_map& section_offset_map_;
1105 // A class to wrap an ordinary input section containing executable code.
1107 template<bool big_endian>
1108 class Arm_input_section : public Output_relaxed_input_section
1111 Arm_input_section(Relobj* relobj, unsigned int shndx)
1112 : Output_relaxed_input_section(relobj, shndx, 1),
1113 original_addralign_(1), original_size_(0), stub_table_(NULL)
1116 ~Arm_input_section()
1123 // Whether this is a stub table owner.
1125 is_stub_table_owner() const
1126 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1128 // Return the stub table.
1129 Stub_table<big_endian>*
1131 { return this->stub_table_; }
1133 // Set the stub_table.
1135 set_stub_table(Stub_table<big_endian>* stub_table)
1136 { this->stub_table_ = stub_table; }
1138 // Downcast a base pointer to an Arm_input_section pointer. This is
1139 // not type-safe but we only use Arm_input_section not the base class.
1140 static Arm_input_section<big_endian>*
1141 as_arm_input_section(Output_relaxed_input_section* poris)
1142 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1145 // Write data to output file.
1147 do_write(Output_file*);
1149 // Return required alignment of this.
1151 do_addralign() const
1153 if (this->is_stub_table_owner())
1154 return std::max(this->stub_table_->addralign(),
1155 this->original_addralign_);
1157 return this->original_addralign_;
1160 // Finalize data size.
1162 set_final_data_size();
1164 // Reset address and file offset.
1166 do_reset_address_and_file_offset();
1170 do_output_offset(const Relobj* object, unsigned int shndx,
1171 section_offset_type offset,
1172 section_offset_type* poutput) const
1174 if ((object == this->relobj())
1175 && (shndx == this->shndx())
1177 && (convert_types<uint64_t, section_offset_type>(offset)
1178 <= this->original_size_))
1188 // Copying is not allowed.
1189 Arm_input_section(const Arm_input_section&);
1190 Arm_input_section& operator=(const Arm_input_section&);
1192 // Address alignment of the original input section.
1193 uint64_t original_addralign_;
1194 // Section size of the original input section.
1195 uint64_t original_size_;
1197 Stub_table<big_endian>* stub_table_;
1200 // Arm_exidx_fixup class. This is used to define a number of methods
1201 // and keep states for fixing up EXIDX coverage.
1203 class Arm_exidx_fixup
1206 Arm_exidx_fixup(Output_section* exidx_output_section)
1207 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1208 last_inlined_entry_(0), last_input_section_(NULL),
1209 section_offset_map_(NULL), first_output_text_section_(NULL)
1213 { delete this->section_offset_map_; }
1215 // Process an EXIDX section for entry merging. Return number of bytes to
1216 // be deleted in output. If parts of the input EXIDX section are merged
1217 // a heap allocated Arm_exidx_section_offset_map is store in the located
1218 // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for
1220 template<bool big_endian>
1222 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1223 Arm_exidx_section_offset_map** psection_offset_map);
1225 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1226 // input section, if there is not one already.
1228 add_exidx_cantunwind_as_needed();
1230 // Return the output section for the text section which is linked to the
1231 // first exidx input in output.
1233 first_output_text_section() const
1234 { return this->first_output_text_section_; }
1237 // Copying is not allowed.
1238 Arm_exidx_fixup(const Arm_exidx_fixup&);
1239 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1241 // Type of EXIDX unwind entry.
1246 // EXIDX_CANTUNWIND.
1247 UT_EXIDX_CANTUNWIND,
1254 // Process an EXIDX entry. We only care about the second word of the
1255 // entry. Return true if the entry can be deleted.
1257 process_exidx_entry(uint32_t second_word);
1259 // Update the current section offset map during EXIDX section fix-up.
1260 // If there is no map, create one. INPUT_OFFSET is the offset of a
1261 // reference point, DELETED_BYTES is the number of deleted by in the
1262 // section so far. If DELETE_ENTRY is true, the reference point and
1263 // all offsets after the previous reference point are discarded.
1265 update_offset_map(section_offset_type input_offset,
1266 section_size_type deleted_bytes, bool delete_entry);
1268 // EXIDX output section.
1269 Output_section* exidx_output_section_;
1270 // Unwind type of the last EXIDX entry processed.
1271 Unwind_type last_unwind_type_;
1272 // Last seen inlined EXIDX entry.
1273 uint32_t last_inlined_entry_;
1274 // Last processed EXIDX input section.
1275 const Arm_exidx_input_section* last_input_section_;
1276 // Section offset map created in process_exidx_section.
1277 Arm_exidx_section_offset_map* section_offset_map_;
1278 // Output section for the text section which is linked to the first exidx
1280 Output_section* first_output_text_section_;
1283 // Arm output section class. This is defined mainly to add a number of
1284 // stub generation methods.
1286 template<bool big_endian>
1287 class Arm_output_section : public Output_section
1290 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1292 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1293 elfcpp::Elf_Xword flags)
1294 : Output_section(name, type, flags)
1297 ~Arm_output_section()
1300 // Group input sections for stub generation.
1302 group_sections(section_size_type, bool, Target_arm<big_endian>*);
1304 // Downcast a base pointer to an Arm_output_section pointer. This is
1305 // not type-safe but we only use Arm_output_section not the base class.
1306 static Arm_output_section<big_endian>*
1307 as_arm_output_section(Output_section* os)
1308 { return static_cast<Arm_output_section<big_endian>*>(os); }
1310 // Append all input text sections in this into LIST.
1312 append_text_sections_to_list(Text_section_list* list);
1314 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1315 // is a list of text input sections sorted in ascending order of their
1316 // output addresses.
1318 fix_exidx_coverage(const Text_section_list& sorted_text_section,
1319 Symbol_table* symtab);
1323 typedef Output_section::Input_section Input_section;
1324 typedef Output_section::Input_section_list Input_section_list;
1326 // Create a stub group.
1327 void create_stub_group(Input_section_list::const_iterator,
1328 Input_section_list::const_iterator,
1329 Input_section_list::const_iterator,
1330 Target_arm<big_endian>*,
1331 std::vector<Output_relaxed_input_section*>*);
1334 // Arm_exidx_input_section class. This represents an EXIDX input section.
1336 class Arm_exidx_input_section
1339 static const section_offset_type invalid_offset =
1340 static_cast<section_offset_type>(-1);
1342 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1343 unsigned int link, uint32_t size, uint32_t addralign)
1344 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1345 addralign_(addralign)
1348 ~Arm_exidx_input_section()
1351 // Accessors: This is a read-only class.
1353 // Return the object containing this EXIDX input section.
1356 { return this->relobj_; }
1358 // Return the section index of this EXIDX input section.
1361 { return this->shndx_; }
1363 // Return the section index of linked text section in the same object.
1366 { return this->link_; }
1368 // Return size of the EXIDX input section.
1371 { return this->size_; }
1373 // Reutnr address alignment of EXIDX input section.
1376 { return this->addralign_; }
1379 // Object containing this.
1381 // Section index of this.
1382 unsigned int shndx_;
1383 // text section linked to this in the same object.
1385 // Size of this. For ARM 32-bit is sufficient.
1387 // Address alignment of this. For ARM 32-bit is sufficient.
1388 uint32_t addralign_;
1391 // Arm_relobj class.
1393 template<bool big_endian>
1394 class Arm_relobj : public Sized_relobj<32, big_endian>
1397 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1399 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1400 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1401 : Sized_relobj<32, big_endian>(name, input_file, offset, ehdr),
1402 stub_tables_(), local_symbol_is_thumb_function_(),
1403 attributes_section_data_(NULL), mapping_symbols_info_(),
1404 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1405 output_local_symbol_count_needs_update_(false)
1409 { delete this->attributes_section_data_; }
1411 // Return the stub table of the SHNDX-th section if there is one.
1412 Stub_table<big_endian>*
1413 stub_table(unsigned int shndx) const
1415 gold_assert(shndx < this->stub_tables_.size());
1416 return this->stub_tables_[shndx];
1419 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1421 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1423 gold_assert(shndx < this->stub_tables_.size());
1424 this->stub_tables_[shndx] = stub_table;
1427 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1428 // index. This is only valid after do_count_local_symbol is called.
1430 local_symbol_is_thumb_function(unsigned int r_sym) const
1432 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1433 return this->local_symbol_is_thumb_function_[r_sym];
1436 // Scan all relocation sections for stub generation.
1438 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1441 // Convert regular input section with index SHNDX to a relaxed section.
1443 convert_input_section_to_relaxed_section(unsigned shndx)
1445 // The stubs have relocations and we need to process them after writing
1446 // out the stubs. So relocation now must follow section write.
1447 this->set_section_offset(shndx, -1ULL);
1448 this->set_relocs_must_follow_section_writes();
1451 // Downcast a base pointer to an Arm_relobj pointer. This is
1452 // not type-safe but we only use Arm_relobj not the base class.
1453 static Arm_relobj<big_endian>*
1454 as_arm_relobj(Relobj* relobj)
1455 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1457 // Processor-specific flags in ELF file header. This is valid only after
1460 processor_specific_flags() const
1461 { return this->processor_specific_flags_; }
1463 // Attribute section data This is the contents of the .ARM.attribute section
1465 const Attributes_section_data*
1466 attributes_section_data() const
1467 { return this->attributes_section_data_; }
1469 // Mapping symbol location.
1470 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1472 // Functor for STL container.
1473 struct Mapping_symbol_position_less
1476 operator()(const Mapping_symbol_position& p1,
1477 const Mapping_symbol_position& p2) const
1479 return (p1.first < p2.first
1480 || (p1.first == p2.first && p1.second < p2.second));
1484 // We only care about the first character of a mapping symbol, so
1485 // we only store that instead of the whole symbol name.
1486 typedef std::map<Mapping_symbol_position, char,
1487 Mapping_symbol_position_less> Mapping_symbols_info;
1489 // Whether a section contains any Cortex-A8 workaround.
1491 section_has_cortex_a8_workaround(unsigned int shndx) const
1493 return (this->section_has_cortex_a8_workaround_ != NULL
1494 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1497 // Mark a section that has Cortex-A8 workaround.
1499 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1501 if (this->section_has_cortex_a8_workaround_ == NULL)
1502 this->section_has_cortex_a8_workaround_ =
1503 new std::vector<bool>(this->shnum(), false);
1504 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1507 // Return the EXIDX section of an text section with index SHNDX or NULL
1508 // if the text section has no associated EXIDX section.
1509 const Arm_exidx_input_section*
1510 exidx_input_section_by_link(unsigned int shndx) const
1512 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1513 return ((p != this->exidx_section_map_.end()
1514 && p->second->link() == shndx)
1519 // Return the EXIDX section with index SHNDX or NULL if there is none.
1520 const Arm_exidx_input_section*
1521 exidx_input_section_by_shndx(unsigned shndx) const
1523 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1524 return ((p != this->exidx_section_map_.end()
1525 && p->second->shndx() == shndx)
1530 // Whether output local symbol count needs updating.
1532 output_local_symbol_count_needs_update() const
1533 { return this->output_local_symbol_count_needs_update_; }
1535 // Set output_local_symbol_count_needs_update flag to be true.
1537 set_output_local_symbol_count_needs_update()
1538 { this->output_local_symbol_count_needs_update_ = true; }
1540 // Update output local symbol count at the end of relaxation.
1542 update_output_local_symbol_count();
1545 // Post constructor setup.
1549 // Call parent's setup method.
1550 Sized_relobj<32, big_endian>::do_setup();
1552 // Initialize look-up tables.
1553 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1554 this->stub_tables_.swap(empty_stub_table_list);
1557 // Count the local symbols.
1559 do_count_local_symbols(Stringpool_template<char>*,
1560 Stringpool_template<char>*);
1563 do_relocate_sections(const Symbol_table* symtab, const Layout* layout,
1564 const unsigned char* pshdrs,
1565 typename Sized_relobj<32, big_endian>::Views* pivews);
1567 // Read the symbol information.
1569 do_read_symbols(Read_symbols_data* sd);
1571 // Process relocs for garbage collection.
1573 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1577 // Whether a section needs to be scanned for relocation stubs.
1579 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1580 const Relobj::Output_sections&,
1581 const Symbol_table *, const unsigned char*);
1583 // Whether a section is a scannable text section.
1585 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1586 const Output_section*, const Symbol_table *);
1588 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1590 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1591 unsigned int, Output_section*,
1592 const Symbol_table *);
1594 // Scan a section for the Cortex-A8 erratum.
1596 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1597 unsigned int, Output_section*,
1598 Target_arm<big_endian>*);
1600 // Find the linked text section of an EXIDX section by looking at the
1601 // first reloction of the EXIDX section. PSHDR points to the section
1602 // headers of a relocation section and PSYMS points to the local symbols.
1603 // PSHNDX points to a location storing the text section index if found.
1604 // Return whether we can find the linked section.
1606 find_linked_text_section(const unsigned char* pshdr,
1607 const unsigned char* psyms, unsigned int* pshndx);
1610 // Make a new Arm_exidx_input_section object for EXIDX section with
1611 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1612 // index of the linked text section.
1614 make_exidx_input_section(unsigned int shndx,
1615 const elfcpp::Shdr<32, big_endian>& shdr,
1616 unsigned int text_shndx);
1618 // Return the output address of either a plain input section or a
1619 // relaxed input section. SHNDX is the section index.
1621 simple_input_section_output_address(unsigned int, Output_section*);
1623 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1624 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1627 // List of stub tables.
1628 Stub_table_list stub_tables_;
1629 // Bit vector to tell if a local symbol is a thumb function or not.
1630 // This is only valid after do_count_local_symbol is called.
1631 std::vector<bool> local_symbol_is_thumb_function_;
1632 // processor-specific flags in ELF file header.
1633 elfcpp::Elf_Word processor_specific_flags_;
1634 // Object attributes if there is an .ARM.attributes section or NULL.
1635 Attributes_section_data* attributes_section_data_;
1636 // Mapping symbols information.
1637 Mapping_symbols_info mapping_symbols_info_;
1638 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1639 std::vector<bool>* section_has_cortex_a8_workaround_;
1640 // Map a text section to its associated .ARM.exidx section, if there is one.
1641 Exidx_section_map exidx_section_map_;
1642 // Whether output local symbol count needs updating.
1643 bool output_local_symbol_count_needs_update_;
1646 // Arm_dynobj class.
1648 template<bool big_endian>
1649 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1652 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1653 const elfcpp::Ehdr<32, big_endian>& ehdr)
1654 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1655 processor_specific_flags_(0), attributes_section_data_(NULL)
1659 { delete this->attributes_section_data_; }
1661 // Downcast a base pointer to an Arm_relobj pointer. This is
1662 // not type-safe but we only use Arm_relobj not the base class.
1663 static Arm_dynobj<big_endian>*
1664 as_arm_dynobj(Dynobj* dynobj)
1665 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1667 // Processor-specific flags in ELF file header. This is valid only after
1670 processor_specific_flags() const
1671 { return this->processor_specific_flags_; }
1673 // Attributes section data.
1674 const Attributes_section_data*
1675 attributes_section_data() const
1676 { return this->attributes_section_data_; }
1679 // Read the symbol information.
1681 do_read_symbols(Read_symbols_data* sd);
1684 // processor-specific flags in ELF file header.
1685 elfcpp::Elf_Word processor_specific_flags_;
1686 // Object attributes if there is an .ARM.attributes section or NULL.
1687 Attributes_section_data* attributes_section_data_;
1690 // Functor to read reloc addends during stub generation.
1692 template<int sh_type, bool big_endian>
1693 struct Stub_addend_reader
1695 // Return the addend for a relocation of a particular type. Depending
1696 // on whether this is a REL or RELA relocation, read the addend from a
1697 // view or from a Reloc object.
1698 elfcpp::Elf_types<32>::Elf_Swxword
1700 unsigned int /* r_type */,
1701 const unsigned char* /* view */,
1702 const typename Reloc_types<sh_type,
1703 32, big_endian>::Reloc& /* reloc */) const;
1706 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1708 template<bool big_endian>
1709 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1711 elfcpp::Elf_types<32>::Elf_Swxword
1714 const unsigned char*,
1715 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1718 // Specialized Stub_addend_reader for RELA type relocation sections.
1719 // We currently do not handle RELA type relocation sections but it is trivial
1720 // to implement the addend reader. This is provided for completeness and to
1721 // make it easier to add support for RELA relocation sections in the future.
1723 template<bool big_endian>
1724 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1726 elfcpp::Elf_types<32>::Elf_Swxword
1729 const unsigned char*,
1730 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1731 big_endian>::Reloc& reloc) const
1732 { return reloc.get_r_addend(); }
1735 // Cortex_a8_reloc class. We keep record of relocation that may need
1736 // the Cortex-A8 erratum workaround.
1738 class Cortex_a8_reloc
1741 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1742 Arm_address destination)
1743 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1749 // Accessors: This is a read-only class.
1751 // Return the relocation stub associated with this relocation if there is
1755 { return this->reloc_stub_; }
1757 // Return the relocation type.
1760 { return this->r_type_; }
1762 // Return the destination address of the relocation. LSB stores the THUMB
1766 { return this->destination_; }
1769 // Associated relocation stub if there is one, or NULL.
1770 const Reloc_stub* reloc_stub_;
1772 unsigned int r_type_;
1773 // Destination address of this relocation. LSB is used to distinguish
1775 Arm_address destination_;
1778 // Utilities for manipulating integers of up to 32-bits
1782 // Sign extend an n-bit unsigned integer stored in an uint32_t into
1783 // an int32_t. NO_BITS must be between 1 to 32.
1784 template<int no_bits>
1785 static inline int32_t
1786 sign_extend(uint32_t bits)
1788 gold_assert(no_bits >= 0 && no_bits <= 32);
1790 return static_cast<int32_t>(bits);
1791 uint32_t mask = (~((uint32_t) 0)) >> (32 - no_bits);
1793 uint32_t top_bit = 1U << (no_bits - 1);
1794 int32_t as_signed = static_cast<int32_t>(bits);
1795 return (bits & top_bit) ? as_signed + (-top_bit * 2) : as_signed;
1798 // Detects overflow of an NO_BITS integer stored in a uint32_t.
1799 template<int no_bits>
1801 has_overflow(uint32_t bits)
1803 gold_assert(no_bits >= 0 && no_bits <= 32);
1806 int32_t max = (1 << (no_bits - 1)) - 1;
1807 int32_t min = -(1 << (no_bits - 1));
1808 int32_t as_signed = static_cast<int32_t>(bits);
1809 return as_signed > max || as_signed < min;
1812 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
1813 // fits in the given number of bits as either a signed or unsigned value.
1814 // For example, has_signed_unsigned_overflow<8> would check
1815 // -128 <= bits <= 255
1816 template<int no_bits>
1818 has_signed_unsigned_overflow(uint32_t bits)
1820 gold_assert(no_bits >= 2 && no_bits <= 32);
1823 int32_t max = static_cast<int32_t>((1U << no_bits) - 1);
1824 int32_t min = -(1 << (no_bits - 1));
1825 int32_t as_signed = static_cast<int32_t>(bits);
1826 return as_signed > max || as_signed < min;
1829 // Select bits from A and B using bits in MASK. For each n in [0..31],
1830 // the n-th bit in the result is chosen from the n-th bits of A and B.
1831 // A zero selects A and a one selects B.
1832 static inline uint32_t
1833 bit_select(uint32_t a, uint32_t b, uint32_t mask)
1834 { return (a & ~mask) | (b & mask); }
1837 template<bool big_endian>
1838 class Target_arm : public Sized_target<32, big_endian>
1841 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
1844 // When were are relocating a stub, we pass this as the relocation number.
1845 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
1848 : Sized_target<32, big_endian>(&arm_info),
1849 got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL),
1850 copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL), stub_tables_(),
1851 stub_factory_(Stub_factory::get_instance()), may_use_blx_(false),
1852 should_force_pic_veneer_(false), arm_input_section_map_(),
1853 attributes_section_data_(NULL), fix_cortex_a8_(false),
1854 cortex_a8_relocs_info_()
1857 // Whether we can use BLX.
1860 { return this->may_use_blx_; }
1862 // Set use-BLX flag.
1864 set_may_use_blx(bool value)
1865 { this->may_use_blx_ = value; }
1867 // Whether we force PCI branch veneers.
1869 should_force_pic_veneer() const
1870 { return this->should_force_pic_veneer_; }
1872 // Set PIC veneer flag.
1874 set_should_force_pic_veneer(bool value)
1875 { this->should_force_pic_veneer_ = value; }
1877 // Whether we use THUMB-2 instructions.
1879 using_thumb2() const
1881 Object_attribute* attr =
1882 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1883 int arch = attr->int_value();
1884 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
1887 // Whether we use THUMB/THUMB-2 instructions only.
1889 using_thumb_only() const
1891 Object_attribute* attr =
1892 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1893 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
1894 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
1896 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
1897 return attr->int_value() == 'M';
1900 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
1902 may_use_arm_nop() const
1904 Object_attribute* attr =
1905 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1906 int arch = attr->int_value();
1907 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1908 || arch == elfcpp::TAG_CPU_ARCH_V6K
1909 || arch == elfcpp::TAG_CPU_ARCH_V7
1910 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1913 // Whether we have THUMB-2 NOP.W instruction.
1915 may_use_thumb2_nop() const
1917 Object_attribute* attr =
1918 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1919 int arch = attr->int_value();
1920 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1921 || arch == elfcpp::TAG_CPU_ARCH_V7
1922 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1925 // Process the relocations to determine unreferenced sections for
1926 // garbage collection.
1928 gc_process_relocs(Symbol_table* symtab,
1930 Sized_relobj<32, big_endian>* object,
1931 unsigned int data_shndx,
1932 unsigned int sh_type,
1933 const unsigned char* prelocs,
1935 Output_section* output_section,
1936 bool needs_special_offset_handling,
1937 size_t local_symbol_count,
1938 const unsigned char* plocal_symbols);
1940 // Scan the relocations to look for symbol adjustments.
1942 scan_relocs(Symbol_table* symtab,
1944 Sized_relobj<32, big_endian>* object,
1945 unsigned int data_shndx,
1946 unsigned int sh_type,
1947 const unsigned char* prelocs,
1949 Output_section* output_section,
1950 bool needs_special_offset_handling,
1951 size_t local_symbol_count,
1952 const unsigned char* plocal_symbols);
1954 // Finalize the sections.
1956 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
1958 // Return the value to use for a dynamic symbol which requires special
1961 do_dynsym_value(const Symbol*) const;
1963 // Relocate a section.
1965 relocate_section(const Relocate_info<32, big_endian>*,
1966 unsigned int sh_type,
1967 const unsigned char* prelocs,
1969 Output_section* output_section,
1970 bool needs_special_offset_handling,
1971 unsigned char* view,
1972 Arm_address view_address,
1973 section_size_type view_size,
1974 const Reloc_symbol_changes*);
1976 // Scan the relocs during a relocatable link.
1978 scan_relocatable_relocs(Symbol_table* symtab,
1980 Sized_relobj<32, big_endian>* object,
1981 unsigned int data_shndx,
1982 unsigned int sh_type,
1983 const unsigned char* prelocs,
1985 Output_section* output_section,
1986 bool needs_special_offset_handling,
1987 size_t local_symbol_count,
1988 const unsigned char* plocal_symbols,
1989 Relocatable_relocs*);
1991 // Relocate a section during a relocatable link.
1993 relocate_for_relocatable(const Relocate_info<32, big_endian>*,
1994 unsigned int sh_type,
1995 const unsigned char* prelocs,
1997 Output_section* output_section,
1998 off_t offset_in_output_section,
1999 const Relocatable_relocs*,
2000 unsigned char* view,
2001 Arm_address view_address,
2002 section_size_type view_size,
2003 unsigned char* reloc_view,
2004 section_size_type reloc_view_size);
2006 // Return whether SYM is defined by the ABI.
2008 do_is_defined_by_abi(Symbol* sym) const
2009 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
2011 // Return whether there is a GOT section.
2013 has_got_section() const
2014 { return this->got_ != NULL; }
2016 // Return the size of the GOT section.
2020 gold_assert(this->got_ != NULL);
2021 return this->got_->data_size();
2024 // Map platform-specific reloc types
2026 get_real_reloc_type (unsigned int r_type);
2029 // Methods to support stub-generations.
2032 // Return the stub factory
2034 stub_factory() const
2035 { return this->stub_factory_; }
2037 // Make a new Arm_input_section object.
2038 Arm_input_section<big_endian>*
2039 new_arm_input_section(Relobj*, unsigned int);
2041 // Find the Arm_input_section object corresponding to the SHNDX-th input
2042 // section of RELOBJ.
2043 Arm_input_section<big_endian>*
2044 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2046 // Make a new Stub_table
2047 Stub_table<big_endian>*
2048 new_stub_table(Arm_input_section<big_endian>*);
2050 // Scan a section for stub generation.
2052 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2053 const unsigned char*, size_t, Output_section*,
2054 bool, const unsigned char*, Arm_address,
2059 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2060 Output_section*, unsigned char*, Arm_address,
2063 // Get the default ARM target.
2064 static Target_arm<big_endian>*
2067 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2068 && parameters->target().is_big_endian() == big_endian);
2069 return static_cast<Target_arm<big_endian>*>(
2070 parameters->sized_target<32, big_endian>());
2073 // Whether NAME belongs to a mapping symbol.
2075 is_mapping_symbol_name(const char* name)
2079 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2080 && (name[2] == '\0' || name[2] == '.'));
2083 // Whether we work around the Cortex-A8 erratum.
2085 fix_cortex_a8() const
2086 { return this->fix_cortex_a8_; }
2088 // Whether we fix R_ARM_V4BX relocation.
2090 // 1 - replace with MOV instruction (armv4 target)
2091 // 2 - make interworking veneer (>= armv4t targets only)
2092 General_options::Fix_v4bx
2094 { return parameters->options().fix_v4bx(); }
2096 // Scan a span of THUMB code section for Cortex-A8 erratum.
2098 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2099 section_size_type, section_size_type,
2100 const unsigned char*, Arm_address);
2102 // Apply Cortex-A8 workaround to a branch.
2104 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2105 unsigned char*, Arm_address);
2108 // Make an ELF object.
2110 do_make_elf_object(const std::string&, Input_file*, off_t,
2111 const elfcpp::Ehdr<32, big_endian>& ehdr);
2114 do_make_elf_object(const std::string&, Input_file*, off_t,
2115 const elfcpp::Ehdr<32, !big_endian>&)
2116 { gold_unreachable(); }
2119 do_make_elf_object(const std::string&, Input_file*, off_t,
2120 const elfcpp::Ehdr<64, false>&)
2121 { gold_unreachable(); }
2124 do_make_elf_object(const std::string&, Input_file*, off_t,
2125 const elfcpp::Ehdr<64, true>&)
2126 { gold_unreachable(); }
2128 // Make an output section.
2130 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2131 elfcpp::Elf_Xword flags)
2132 { return new Arm_output_section<big_endian>(name, type, flags); }
2135 do_adjust_elf_header(unsigned char* view, int len) const;
2137 // We only need to generate stubs, and hence perform relaxation if we are
2138 // not doing relocatable linking.
2140 do_may_relax() const
2141 { return !parameters->options().relocatable(); }
2144 do_relax(int, const Input_objects*, Symbol_table*, Layout*);
2146 // Determine whether an object attribute tag takes an integer, a
2149 do_attribute_arg_type(int tag) const;
2151 // Reorder tags during output.
2153 do_attributes_order(int num) const;
2155 // This is called when the target is selected as the default.
2157 do_select_as_default_target()
2159 // No locking is required since there should only be one default target.
2160 // We cannot have both the big-endian and little-endian ARM targets
2162 gold_assert(arm_reloc_property_table == NULL);
2163 arm_reloc_property_table = new Arm_reloc_property_table();
2167 // The class which scans relocations.
2172 : issued_non_pic_error_(false)
2176 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2177 Sized_relobj<32, big_endian>* object,
2178 unsigned int data_shndx,
2179 Output_section* output_section,
2180 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2181 const elfcpp::Sym<32, big_endian>& lsym);
2184 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2185 Sized_relobj<32, big_endian>* object,
2186 unsigned int data_shndx,
2187 Output_section* output_section,
2188 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2192 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2193 Sized_relobj<32, big_endian>* ,
2196 const elfcpp::Rel<32, big_endian>& ,
2198 const elfcpp::Sym<32, big_endian>&)
2202 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2203 Sized_relobj<32, big_endian>* ,
2206 const elfcpp::Rel<32, big_endian>& ,
2207 unsigned int , Symbol*)
2212 unsupported_reloc_local(Sized_relobj<32, big_endian>*,
2213 unsigned int r_type);
2216 unsupported_reloc_global(Sized_relobj<32, big_endian>*,
2217 unsigned int r_type, Symbol*);
2220 check_non_pic(Relobj*, unsigned int r_type);
2222 // Almost identical to Symbol::needs_plt_entry except that it also
2223 // handles STT_ARM_TFUNC.
2225 symbol_needs_plt_entry(const Symbol* sym)
2227 // An undefined symbol from an executable does not need a PLT entry.
2228 if (sym->is_undefined() && !parameters->options().shared())
2231 return (!parameters->doing_static_link()
2232 && (sym->type() == elfcpp::STT_FUNC
2233 || sym->type() == elfcpp::STT_ARM_TFUNC)
2234 && (sym->is_from_dynobj()
2235 || sym->is_undefined()
2236 || sym->is_preemptible()));
2239 // Whether we have issued an error about a non-PIC compilation.
2240 bool issued_non_pic_error_;
2243 // The class which implements relocation.
2253 // Return whether the static relocation needs to be applied.
2255 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2258 Output_section* output_section);
2260 // Do a relocation. Return false if the caller should not issue
2261 // any warnings about this relocation.
2263 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2264 Output_section*, size_t relnum,
2265 const elfcpp::Rel<32, big_endian>&,
2266 unsigned int r_type, const Sized_symbol<32>*,
2267 const Symbol_value<32>*,
2268 unsigned char*, Arm_address,
2271 // Return whether we want to pass flag NON_PIC_REF for this
2272 // reloc. This means the relocation type accesses a symbol not via
2275 reloc_is_non_pic (unsigned int r_type)
2279 // These relocation types reference GOT or PLT entries explicitly.
2280 case elfcpp::R_ARM_GOT_BREL:
2281 case elfcpp::R_ARM_GOT_ABS:
2282 case elfcpp::R_ARM_GOT_PREL:
2283 case elfcpp::R_ARM_GOT_BREL12:
2284 case elfcpp::R_ARM_PLT32_ABS:
2285 case elfcpp::R_ARM_TLS_GD32:
2286 case elfcpp::R_ARM_TLS_LDM32:
2287 case elfcpp::R_ARM_TLS_IE32:
2288 case elfcpp::R_ARM_TLS_IE12GP:
2290 // These relocate types may use PLT entries.
2291 case elfcpp::R_ARM_CALL:
2292 case elfcpp::R_ARM_THM_CALL:
2293 case elfcpp::R_ARM_JUMP24:
2294 case elfcpp::R_ARM_THM_JUMP24:
2295 case elfcpp::R_ARM_THM_JUMP19:
2296 case elfcpp::R_ARM_PLT32:
2297 case elfcpp::R_ARM_THM_XPC22:
2306 // A class which returns the size required for a relocation type,
2307 // used while scanning relocs during a relocatable link.
2308 class Relocatable_size_for_reloc
2312 get_size_for_reloc(unsigned int, Relobj*);
2315 // Get the GOT section, creating it if necessary.
2316 Output_data_got<32, big_endian>*
2317 got_section(Symbol_table*, Layout*);
2319 // Get the GOT PLT section.
2321 got_plt_section() const
2323 gold_assert(this->got_plt_ != NULL);
2324 return this->got_plt_;
2327 // Create a PLT entry for a global symbol.
2329 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2331 // Get the PLT section.
2332 const Output_data_plt_arm<big_endian>*
2335 gold_assert(this->plt_ != NULL);
2339 // Get the dynamic reloc section, creating it if necessary.
2341 rel_dyn_section(Layout*);
2343 // Return true if the symbol may need a COPY relocation.
2344 // References from an executable object to non-function symbols
2345 // defined in a dynamic object may need a COPY relocation.
2347 may_need_copy_reloc(Symbol* gsym)
2349 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2350 && gsym->may_need_copy_reloc());
2353 // Add a potential copy relocation.
2355 copy_reloc(Symbol_table* symtab, Layout* layout,
2356 Sized_relobj<32, big_endian>* object,
2357 unsigned int shndx, Output_section* output_section,
2358 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2360 this->copy_relocs_.copy_reloc(symtab, layout,
2361 symtab->get_sized_symbol<32>(sym),
2362 object, shndx, output_section, reloc,
2363 this->rel_dyn_section(layout));
2366 // Whether two EABI versions are compatible.
2368 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2370 // Merge processor-specific flags from input object and those in the ELF
2371 // header of the output.
2373 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2375 // Get the secondary compatible architecture.
2377 get_secondary_compatible_arch(const Attributes_section_data*);
2379 // Set the secondary compatible architecture.
2381 set_secondary_compatible_arch(Attributes_section_data*, int);
2384 tag_cpu_arch_combine(const char*, int, int*, int, int);
2386 // Helper to print AEABI enum tag value.
2388 aeabi_enum_name(unsigned int);
2390 // Return string value for TAG_CPU_name.
2392 tag_cpu_name_value(unsigned int);
2394 // Merge object attributes from input object and those in the output.
2396 merge_object_attributes(const char*, const Attributes_section_data*);
2398 // Helper to get an AEABI object attribute
2400 get_aeabi_object_attribute(int tag) const
2402 Attributes_section_data* pasd = this->attributes_section_data_;
2403 gold_assert(pasd != NULL);
2404 Object_attribute* attr =
2405 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2406 gold_assert(attr != NULL);
2411 // Methods to support stub-generations.
2414 // Group input sections for stub generation.
2416 group_sections(Layout*, section_size_type, bool);
2418 // Scan a relocation for stub generation.
2420 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2421 const Sized_symbol<32>*, unsigned int,
2422 const Symbol_value<32>*,
2423 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2425 // Scan a relocation section for stub.
2426 template<int sh_type>
2428 scan_reloc_section_for_stubs(
2429 const Relocate_info<32, big_endian>* relinfo,
2430 const unsigned char* prelocs,
2432 Output_section* output_section,
2433 bool needs_special_offset_handling,
2434 const unsigned char* view,
2435 elfcpp::Elf_types<32>::Elf_Addr view_address,
2438 // Fix .ARM.exidx section coverage.
2440 fix_exidx_coverage(Layout*, Arm_output_section<big_endian>*, Symbol_table*);
2442 // Functors for STL set.
2443 struct output_section_address_less_than
2446 operator()(const Output_section* s1, const Output_section* s2) const
2447 { return s1->address() < s2->address(); }
2450 // Information about this specific target which we pass to the
2451 // general Target structure.
2452 static const Target::Target_info arm_info;
2454 // The types of GOT entries needed for this platform.
2457 GOT_TYPE_STANDARD = 0 // GOT entry for a regular symbol
2460 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2462 // Map input section to Arm_input_section.
2463 typedef Unordered_map<Section_id,
2464 Arm_input_section<big_endian>*,
2466 Arm_input_section_map;
2468 // Map output addresses to relocs for Cortex-A8 erratum.
2469 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2470 Cortex_a8_relocs_info;
2473 Output_data_got<32, big_endian>* got_;
2475 Output_data_plt_arm<big_endian>* plt_;
2476 // The GOT PLT section.
2477 Output_data_space* got_plt_;
2478 // The dynamic reloc section.
2479 Reloc_section* rel_dyn_;
2480 // Relocs saved to avoid a COPY reloc.
2481 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2482 // Space for variables copied with a COPY reloc.
2483 Output_data_space* dynbss_;
2484 // Vector of Stub_tables created.
2485 Stub_table_list stub_tables_;
2487 const Stub_factory &stub_factory_;
2488 // Whether we can use BLX.
2490 // Whether we force PIC branch veneers.
2491 bool should_force_pic_veneer_;
2492 // Map for locating Arm_input_sections.
2493 Arm_input_section_map arm_input_section_map_;
2494 // Attributes section data in output.
2495 Attributes_section_data* attributes_section_data_;
2496 // Whether we want to fix code for Cortex-A8 erratum.
2497 bool fix_cortex_a8_;
2498 // Map addresses to relocs for Cortex-A8 erratum.
2499 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2502 template<bool big_endian>
2503 const Target::Target_info Target_arm<big_endian>::arm_info =
2506 big_endian, // is_big_endian
2507 elfcpp::EM_ARM, // machine_code
2508 false, // has_make_symbol
2509 false, // has_resolve
2510 false, // has_code_fill
2511 true, // is_default_stack_executable
2513 "/usr/lib/libc.so.1", // dynamic_linker
2514 0x8000, // default_text_segment_address
2515 0x1000, // abi_pagesize (overridable by -z max-page-size)
2516 0x1000, // common_pagesize (overridable by -z common-page-size)
2517 elfcpp::SHN_UNDEF, // small_common_shndx
2518 elfcpp::SHN_UNDEF, // large_common_shndx
2519 0, // small_common_section_flags
2520 0, // large_common_section_flags
2521 ".ARM.attributes", // attributes_section
2522 "aeabi" // attributes_vendor
2525 // Arm relocate functions class
2528 template<bool big_endian>
2529 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
2534 STATUS_OKAY, // No error during relocation.
2535 STATUS_OVERFLOW, // Relocation oveflow.
2536 STATUS_BAD_RELOC // Relocation cannot be applied.
2540 typedef Relocate_functions<32, big_endian> Base;
2541 typedef Arm_relocate_functions<big_endian> This;
2543 // Encoding of imm16 argument for movt and movw ARM instructions
2546 // imm16 := imm4 | imm12
2548 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2549 // +-------+---------------+-------+-------+-----------------------+
2550 // | | |imm4 | |imm12 |
2551 // +-------+---------------+-------+-------+-----------------------+
2553 // Extract the relocation addend from VAL based on the ARM
2554 // instruction encoding described above.
2555 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2556 extract_arm_movw_movt_addend(
2557 typename elfcpp::Swap<32, big_endian>::Valtype val)
2559 // According to the Elf ABI for ARM Architecture the immediate
2560 // field is sign-extended to form the addend.
2561 return utils::sign_extend<16>(((val >> 4) & 0xf000) | (val & 0xfff));
2564 // Insert X into VAL based on the ARM instruction encoding described
2566 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2567 insert_val_arm_movw_movt(
2568 typename elfcpp::Swap<32, big_endian>::Valtype val,
2569 typename elfcpp::Swap<32, big_endian>::Valtype x)
2573 val |= (x & 0xf000) << 4;
2577 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2580 // imm16 := imm4 | i | imm3 | imm8
2582 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2583 // +---------+-+-----------+-------++-+-----+-------+---------------+
2584 // | |i| |imm4 || |imm3 | |imm8 |
2585 // +---------+-+-----------+-------++-+-----+-------+---------------+
2587 // Extract the relocation addend from VAL based on the Thumb2
2588 // instruction encoding described above.
2589 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2590 extract_thumb_movw_movt_addend(
2591 typename elfcpp::Swap<32, big_endian>::Valtype val)
2593 // According to the Elf ABI for ARM Architecture the immediate
2594 // field is sign-extended to form the addend.
2595 return utils::sign_extend<16>(((val >> 4) & 0xf000)
2596 | ((val >> 15) & 0x0800)
2597 | ((val >> 4) & 0x0700)
2601 // Insert X into VAL based on the Thumb2 instruction encoding
2603 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2604 insert_val_thumb_movw_movt(
2605 typename elfcpp::Swap<32, big_endian>::Valtype val,
2606 typename elfcpp::Swap<32, big_endian>::Valtype x)
2609 val |= (x & 0xf000) << 4;
2610 val |= (x & 0x0800) << 15;
2611 val |= (x & 0x0700) << 4;
2612 val |= (x & 0x00ff);
2616 // Calculate the smallest constant Kn for the specified residual.
2617 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2619 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
2625 // Determine the most significant bit in the residual and
2626 // align the resulting value to a 2-bit boundary.
2627 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
2629 // The desired shift is now (msb - 6), or zero, whichever
2631 return (((msb - 6) < 0) ? 0 : (msb - 6));
2634 // Calculate the final residual for the specified group index.
2635 // If the passed group index is less than zero, the method will return
2636 // the value of the specified residual without any change.
2637 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2638 static typename elfcpp::Swap<32, big_endian>::Valtype
2639 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2642 for (int n = 0; n <= group; n++)
2644 // Calculate which part of the value to mask.
2645 uint32_t shift = calc_grp_kn(residual);
2646 // Calculate the residual for the next time around.
2647 residual &= ~(residual & (0xff << shift));
2653 // Calculate the value of Gn for the specified group index.
2654 // We return it in the form of an encoded constant-and-rotation.
2655 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2656 static typename elfcpp::Swap<32, big_endian>::Valtype
2657 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2660 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
2663 for (int n = 0; n <= group; n++)
2665 // Calculate which part of the value to mask.
2666 shift = calc_grp_kn(residual);
2667 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
2668 gn = residual & (0xff << shift);
2669 // Calculate the residual for the next time around.
2672 // Return Gn in the form of an encoded constant-and-rotation.
2673 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
2677 // Handle ARM long branches.
2678 static typename This::Status
2679 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2680 unsigned char *, const Sized_symbol<32>*,
2681 const Arm_relobj<big_endian>*, unsigned int,
2682 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2684 // Handle THUMB long branches.
2685 static typename This::Status
2686 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2687 unsigned char *, const Sized_symbol<32>*,
2688 const Arm_relobj<big_endian>*, unsigned int,
2689 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2692 // Return the branch offset of a 32-bit THUMB branch.
2693 static inline int32_t
2694 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2696 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
2697 // involving the J1 and J2 bits.
2698 uint32_t s = (upper_insn & (1U << 10)) >> 10;
2699 uint32_t upper = upper_insn & 0x3ffU;
2700 uint32_t lower = lower_insn & 0x7ffU;
2701 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
2702 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
2703 uint32_t i1 = j1 ^ s ? 0 : 1;
2704 uint32_t i2 = j2 ^ s ? 0 : 1;
2706 return utils::sign_extend<25>((s << 24) | (i1 << 23) | (i2 << 22)
2707 | (upper << 12) | (lower << 1));
2710 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
2711 // UPPER_INSN is the original upper instruction of the branch. Caller is
2712 // responsible for overflow checking and BLX offset adjustment.
2713 static inline uint16_t
2714 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
2716 uint32_t s = offset < 0 ? 1 : 0;
2717 uint32_t bits = static_cast<uint32_t>(offset);
2718 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
2721 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
2722 // LOWER_INSN is the original lower instruction of the branch. Caller is
2723 // responsible for overflow checking and BLX offset adjustment.
2724 static inline uint16_t
2725 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
2727 uint32_t s = offset < 0 ? 1 : 0;
2728 uint32_t bits = static_cast<uint32_t>(offset);
2729 return ((lower_insn & ~0x2fffU)
2730 | ((((bits >> 23) & 1) ^ !s) << 13)
2731 | ((((bits >> 22) & 1) ^ !s) << 11)
2732 | ((bits >> 1) & 0x7ffU));
2735 // Return the branch offset of a 32-bit THUMB conditional branch.
2736 static inline int32_t
2737 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2739 uint32_t s = (upper_insn & 0x0400U) >> 10;
2740 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
2741 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
2742 uint32_t lower = (lower_insn & 0x07ffU);
2743 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
2745 return utils::sign_extend<21>((upper << 12) | (lower << 1));
2748 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
2749 // instruction. UPPER_INSN is the original upper instruction of the branch.
2750 // Caller is responsible for overflow checking.
2751 static inline uint16_t
2752 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
2754 uint32_t s = offset < 0 ? 1 : 0;
2755 uint32_t bits = static_cast<uint32_t>(offset);
2756 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
2759 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
2760 // instruction. LOWER_INSN is the original lower instruction of the branch.
2761 // Caller is reponsible for overflow checking.
2762 static inline uint16_t
2763 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
2765 uint32_t bits = static_cast<uint32_t>(offset);
2766 uint32_t j2 = (bits & 0x00080000U) >> 19;
2767 uint32_t j1 = (bits & 0x00040000U) >> 18;
2768 uint32_t lo = (bits & 0x00000ffeU) >> 1;
2770 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
2773 // R_ARM_ABS8: S + A
2774 static inline typename This::Status
2775 abs8(unsigned char *view,
2776 const Sized_relobj<32, big_endian>* object,
2777 const Symbol_value<32>* psymval)
2779 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
2780 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2781 Valtype* wv = reinterpret_cast<Valtype*>(view);
2782 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
2783 Reltype addend = utils::sign_extend<8>(val);
2784 Reltype x = psymval->value(object, addend);
2785 val = utils::bit_select(val, x, 0xffU);
2786 elfcpp::Swap<8, big_endian>::writeval(wv, val);
2787 return (utils::has_signed_unsigned_overflow<8>(x)
2788 ? This::STATUS_OVERFLOW
2789 : This::STATUS_OKAY);
2792 // R_ARM_THM_ABS5: S + A
2793 static inline typename This::Status
2794 thm_abs5(unsigned char *view,
2795 const Sized_relobj<32, big_endian>* object,
2796 const Symbol_value<32>* psymval)
2798 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2799 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2800 Valtype* wv = reinterpret_cast<Valtype*>(view);
2801 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2802 Reltype addend = (val & 0x7e0U) >> 6;
2803 Reltype x = psymval->value(object, addend);
2804 val = utils::bit_select(val, x << 6, 0x7e0U);
2805 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2806 return (utils::has_overflow<5>(x)
2807 ? This::STATUS_OVERFLOW
2808 : This::STATUS_OKAY);
2811 // R_ARM_ABS12: S + A
2812 static inline typename This::Status
2813 abs12(unsigned char *view,
2814 const Sized_relobj<32, big_endian>* object,
2815 const Symbol_value<32>* psymval)
2817 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2818 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2819 Valtype* wv = reinterpret_cast<Valtype*>(view);
2820 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2821 Reltype addend = val & 0x0fffU;
2822 Reltype x = psymval->value(object, addend);
2823 val = utils::bit_select(val, x, 0x0fffU);
2824 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2825 return (utils::has_overflow<12>(x)
2826 ? This::STATUS_OVERFLOW
2827 : This::STATUS_OKAY);
2830 // R_ARM_ABS16: S + A
2831 static inline typename This::Status
2832 abs16(unsigned char *view,
2833 const Sized_relobj<32, big_endian>* object,
2834 const Symbol_value<32>* psymval)
2836 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2837 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2838 Valtype* wv = reinterpret_cast<Valtype*>(view);
2839 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2840 Reltype addend = utils::sign_extend<16>(val);
2841 Reltype x = psymval->value(object, addend);
2842 val = utils::bit_select(val, x, 0xffffU);
2843 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2844 return (utils::has_signed_unsigned_overflow<16>(x)
2845 ? This::STATUS_OVERFLOW
2846 : This::STATUS_OKAY);
2849 // R_ARM_ABS32: (S + A) | T
2850 static inline typename This::Status
2851 abs32(unsigned char *view,
2852 const Sized_relobj<32, big_endian>* object,
2853 const Symbol_value<32>* psymval,
2854 Arm_address thumb_bit)
2856 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2857 Valtype* wv = reinterpret_cast<Valtype*>(view);
2858 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2859 Valtype x = psymval->value(object, addend) | thumb_bit;
2860 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2861 return This::STATUS_OKAY;
2864 // R_ARM_REL32: (S + A) | T - P
2865 static inline typename This::Status
2866 rel32(unsigned char *view,
2867 const Sized_relobj<32, big_endian>* object,
2868 const Symbol_value<32>* psymval,
2869 Arm_address address,
2870 Arm_address thumb_bit)
2872 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2873 Valtype* wv = reinterpret_cast<Valtype*>(view);
2874 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2875 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2876 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2877 return This::STATUS_OKAY;
2880 // R_ARM_THM_JUMP24: (S + A) | T - P
2881 static typename This::Status
2882 thm_jump19(unsigned char *view, const Arm_relobj<big_endian>* object,
2883 const Symbol_value<32>* psymval, Arm_address address,
2884 Arm_address thumb_bit);
2886 // R_ARM_THM_JUMP6: S + A – P
2887 static inline typename This::Status
2888 thm_jump6(unsigned char *view,
2889 const Sized_relobj<32, big_endian>* object,
2890 const Symbol_value<32>* psymval,
2891 Arm_address address)
2893 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2894 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2895 Valtype* wv = reinterpret_cast<Valtype*>(view);
2896 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2897 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
2898 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
2899 Reltype x = (psymval->value(object, addend) - address);
2900 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
2901 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2902 // CZB does only forward jumps.
2903 return ((x > 0x007e)
2904 ? This::STATUS_OVERFLOW
2905 : This::STATUS_OKAY);
2908 // R_ARM_THM_JUMP8: S + A – P
2909 static inline typename This::Status
2910 thm_jump8(unsigned char *view,
2911 const Sized_relobj<32, big_endian>* object,
2912 const Symbol_value<32>* psymval,
2913 Arm_address address)
2915 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2916 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2917 Valtype* wv = reinterpret_cast<Valtype*>(view);
2918 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2919 Reltype addend = utils::sign_extend<8>((val & 0x00ff) << 1);
2920 Reltype x = (psymval->value(object, addend) - address);
2921 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xff00) | ((x & 0x01fe) >> 1));
2922 return (utils::has_overflow<8>(x)
2923 ? This::STATUS_OVERFLOW
2924 : This::STATUS_OKAY);
2927 // R_ARM_THM_JUMP11: S + A – P
2928 static inline typename This::Status
2929 thm_jump11(unsigned char *view,
2930 const Sized_relobj<32, big_endian>* object,
2931 const Symbol_value<32>* psymval,
2932 Arm_address address)
2934 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2935 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2936 Valtype* wv = reinterpret_cast<Valtype*>(view);
2937 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2938 Reltype addend = utils::sign_extend<11>((val & 0x07ff) << 1);
2939 Reltype x = (psymval->value(object, addend) - address);
2940 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xf800) | ((x & 0x0ffe) >> 1));
2941 return (utils::has_overflow<11>(x)
2942 ? This::STATUS_OVERFLOW
2943 : This::STATUS_OKAY);
2946 // R_ARM_BASE_PREL: B(S) + A - P
2947 static inline typename This::Status
2948 base_prel(unsigned char* view,
2950 Arm_address address)
2952 Base::rel32(view, origin - address);
2956 // R_ARM_BASE_ABS: B(S) + A
2957 static inline typename This::Status
2958 base_abs(unsigned char* view,
2961 Base::rel32(view, origin);
2965 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
2966 static inline typename This::Status
2967 got_brel(unsigned char* view,
2968 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
2970 Base::rel32(view, got_offset);
2971 return This::STATUS_OKAY;
2974 // R_ARM_GOT_PREL: GOT(S) + A - P
2975 static inline typename This::Status
2976 got_prel(unsigned char *view,
2977 Arm_address got_entry,
2978 Arm_address address)
2980 Base::rel32(view, got_entry - address);
2981 return This::STATUS_OKAY;
2984 // R_ARM_PREL: (S + A) | T - P
2985 static inline typename This::Status
2986 prel31(unsigned char *view,
2987 const Sized_relobj<32, big_endian>* object,
2988 const Symbol_value<32>* psymval,
2989 Arm_address address,
2990 Arm_address thumb_bit)
2992 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2993 Valtype* wv = reinterpret_cast<Valtype*>(view);
2994 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2995 Valtype addend = utils::sign_extend<31>(val);
2996 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2997 val = utils::bit_select(val, x, 0x7fffffffU);
2998 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2999 return (utils::has_overflow<31>(x) ?
3000 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3003 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3004 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3005 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3006 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3007 static inline typename This::Status
3008 movw(unsigned char* view,
3009 const Sized_relobj<32, big_endian>* object,
3010 const Symbol_value<32>* psymval,
3011 Arm_address relative_address_base,
3012 Arm_address thumb_bit,
3013 bool check_overflow)
3015 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3016 Valtype* wv = reinterpret_cast<Valtype*>(view);
3017 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3018 Valtype addend = This::extract_arm_movw_movt_addend(val);
3019 Valtype x = ((psymval->value(object, addend) | thumb_bit)
3020 - relative_address_base);
3021 val = This::insert_val_arm_movw_movt(val, x);
3022 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3023 return ((check_overflow && utils::has_overflow<16>(x))
3024 ? This::STATUS_OVERFLOW
3025 : This::STATUS_OKAY);
3028 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3029 // R_ARM_MOVT_PREL: S + A - P
3030 // R_ARM_MOVT_BREL: S + A - B(S)
3031 static inline typename This::Status
3032 movt(unsigned char* view,
3033 const Sized_relobj<32, big_endian>* object,
3034 const Symbol_value<32>* psymval,
3035 Arm_address relative_address_base)
3037 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3038 Valtype* wv = reinterpret_cast<Valtype*>(view);
3039 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3040 Valtype addend = This::extract_arm_movw_movt_addend(val);
3041 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3042 val = This::insert_val_arm_movw_movt(val, x);
3043 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3044 // FIXME: IHI0044D says that we should check for overflow.
3045 return This::STATUS_OKAY;
3048 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3049 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3050 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3051 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3052 static inline typename This::Status
3053 thm_movw(unsigned char *view,
3054 const Sized_relobj<32, big_endian>* object,
3055 const Symbol_value<32>* psymval,
3056 Arm_address relative_address_base,
3057 Arm_address thumb_bit,
3058 bool check_overflow)
3060 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3061 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3062 Valtype* wv = reinterpret_cast<Valtype*>(view);
3063 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3064 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3065 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3067 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3068 val = This::insert_val_thumb_movw_movt(val, x);
3069 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3070 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3071 return ((check_overflow && utils::has_overflow<16>(x))
3072 ? This::STATUS_OVERFLOW
3073 : This::STATUS_OKAY);
3076 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3077 // R_ARM_THM_MOVT_PREL: S + A - P
3078 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3079 static inline typename This::Status
3080 thm_movt(unsigned char* view,
3081 const Sized_relobj<32, big_endian>* object,
3082 const Symbol_value<32>* psymval,
3083 Arm_address relative_address_base)
3085 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3086 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3087 Valtype* wv = reinterpret_cast<Valtype*>(view);
3088 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3089 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3090 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3091 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3092 val = This::insert_val_thumb_movw_movt(val, x);
3093 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3094 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3095 return This::STATUS_OKAY;
3098 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3099 static inline typename This::Status
3100 thm_alu11(unsigned char* view,
3101 const Sized_relobj<32, big_endian>* object,
3102 const Symbol_value<32>* psymval,
3103 Arm_address address,
3104 Arm_address thumb_bit)
3106 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3107 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3108 Valtype* wv = reinterpret_cast<Valtype*>(view);
3109 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3110 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3112 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3113 // -----------------------------------------------------------------------
3114 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3115 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3116 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3117 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3118 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3119 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3121 // Determine a sign for the addend.
3122 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3123 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3124 // Thumb2 addend encoding:
3125 // imm12 := i | imm3 | imm8
3126 int32_t addend = (insn & 0xff)
3127 | ((insn & 0x00007000) >> 4)
3128 | ((insn & 0x04000000) >> 15);
3129 // Apply a sign to the added.
3132 int32_t x = (psymval->value(object, addend) | thumb_bit)
3133 - (address & 0xfffffffc);
3134 Reltype val = abs(x);
3135 // Mask out the value and a distinct part of the ADD/SUB opcode
3136 // (bits 7:5 of opword).
3137 insn = (insn & 0xfb0f8f00)
3139 | ((val & 0x700) << 4)
3140 | ((val & 0x800) << 15);
3141 // Set the opcode according to whether the value to go in the
3142 // place is negative.
3146 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3147 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3148 return ((val > 0xfff) ?
3149 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3152 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3153 static inline typename This::Status
3154 thm_pc8(unsigned char* view,
3155 const Sized_relobj<32, big_endian>* object,
3156 const Symbol_value<32>* psymval,
3157 Arm_address address)
3159 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3160 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3161 Valtype* wv = reinterpret_cast<Valtype*>(view);
3162 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3163 Reltype addend = ((insn & 0x00ff) << 2);
3164 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3165 Reltype val = abs(x);
3166 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3168 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3169 return ((val > 0x03fc)
3170 ? This::STATUS_OVERFLOW
3171 : This::STATUS_OKAY);
3174 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3175 static inline typename This::Status
3176 thm_pc12(unsigned char* view,
3177 const Sized_relobj<32, big_endian>* object,
3178 const Symbol_value<32>* psymval,
3179 Arm_address address)
3181 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3182 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3183 Valtype* wv = reinterpret_cast<Valtype*>(view);
3184 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3185 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3186 // Determine a sign for the addend (positive if the U bit is 1).
3187 const int sign = (insn & 0x00800000) ? 1 : -1;
3188 int32_t addend = (insn & 0xfff);
3189 // Apply a sign to the added.
3192 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3193 Reltype val = abs(x);
3194 // Mask out and apply the value and the U bit.
3195 insn = (insn & 0xff7ff000) | (val & 0xfff);
3196 // Set the U bit according to whether the value to go in the
3197 // place is positive.
3201 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3202 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3203 return ((val > 0xfff) ?
3204 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3208 static inline typename This::Status
3209 v4bx(const Relocate_info<32, big_endian>* relinfo,
3210 unsigned char *view,
3211 const Arm_relobj<big_endian>* object,
3212 const Arm_address address,
3213 const bool is_interworking)
3216 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3217 Valtype* wv = reinterpret_cast<Valtype*>(view);
3218 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3220 // Ensure that we have a BX instruction.
3221 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3222 const uint32_t reg = (val & 0xf);
3223 if (is_interworking && reg != 0xf)
3225 Stub_table<big_endian>* stub_table =
3226 object->stub_table(relinfo->data_shndx);
3227 gold_assert(stub_table != NULL);
3229 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3230 gold_assert(stub != NULL);
3232 int32_t veneer_address =
3233 stub_table->address() + stub->offset() - 8 - address;
3234 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3235 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3236 // Replace with a branch to veneer (B <addr>)
3237 val = (val & 0xf0000000) | 0x0a000000
3238 | ((veneer_address >> 2) & 0x00ffffff);
3242 // Preserve Rm (lowest four bits) and the condition code
3243 // (highest four bits). Other bits encode MOV PC,Rm.
3244 val = (val & 0xf000000f) | 0x01a0f000;
3246 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3247 return This::STATUS_OKAY;
3250 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3251 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3252 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3253 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3254 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3255 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3256 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3257 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3258 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3259 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3260 static inline typename This::Status
3261 arm_grp_alu(unsigned char* view,
3262 const Sized_relobj<32, big_endian>* object,
3263 const Symbol_value<32>* psymval,
3265 Arm_address address,
3266 Arm_address thumb_bit,
3267 bool check_overflow)
3269 gold_assert(group >= 0 && group < 3);
3270 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3271 Valtype* wv = reinterpret_cast<Valtype*>(view);
3272 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3274 // ALU group relocations are allowed only for the ADD/SUB instructions.
3275 // (0x00800000 - ADD, 0x00400000 - SUB)
3276 const Valtype opcode = insn & 0x01e00000;
3277 if (opcode != 0x00800000 && opcode != 0x00400000)
3278 return This::STATUS_BAD_RELOC;
3280 // Determine a sign for the addend.
3281 const int sign = (opcode == 0x00800000) ? 1 : -1;
3282 // shifter = rotate_imm * 2
3283 const uint32_t shifter = (insn & 0xf00) >> 7;
3284 // Initial addend value.
3285 int32_t addend = insn & 0xff;
3286 // Rotate addend right by shifter.
3287 addend = (addend >> shifter) | (addend << (32 - shifter));
3288 // Apply a sign to the added.
3291 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3292 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3293 // Check for overflow if required
3295 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3296 return This::STATUS_OVERFLOW;
3298 // Mask out the value and the ADD/SUB part of the opcode; take care
3299 // not to destroy the S bit.
3301 // Set the opcode according to whether the value to go in the
3302 // place is negative.
3303 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3304 // Encode the offset (encoded Gn).
3307 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3308 return This::STATUS_OKAY;
3311 // R_ARM_LDR_PC_G0: S + A - P
3312 // R_ARM_LDR_PC_G1: S + A - P
3313 // R_ARM_LDR_PC_G2: S + A - P
3314 // R_ARM_LDR_SB_G0: S + A - B(S)
3315 // R_ARM_LDR_SB_G1: S + A - B(S)
3316 // R_ARM_LDR_SB_G2: S + A - B(S)
3317 static inline typename This::Status
3318 arm_grp_ldr(unsigned char* view,
3319 const Sized_relobj<32, big_endian>* object,
3320 const Symbol_value<32>* psymval,
3322 Arm_address address)
3324 gold_assert(group >= 0 && group < 3);
3325 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3326 Valtype* wv = reinterpret_cast<Valtype*>(view);
3327 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3329 const int sign = (insn & 0x00800000) ? 1 : -1;
3330 int32_t addend = (insn & 0xfff) * sign;
3331 int32_t x = (psymval->value(object, addend) - address);
3332 // Calculate the relevant G(n-1) value to obtain this stage residual.
3334 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3335 if (residual >= 0x1000)
3336 return This::STATUS_OVERFLOW;
3338 // Mask out the value and U bit.
3340 // Set the U bit for non-negative values.
3345 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3346 return This::STATUS_OKAY;
3349 // R_ARM_LDRS_PC_G0: S + A - P
3350 // R_ARM_LDRS_PC_G1: S + A - P
3351 // R_ARM_LDRS_PC_G2: S + A - P
3352 // R_ARM_LDRS_SB_G0: S + A - B(S)
3353 // R_ARM_LDRS_SB_G1: S + A - B(S)
3354 // R_ARM_LDRS_SB_G2: S + A - B(S)
3355 static inline typename This::Status
3356 arm_grp_ldrs(unsigned char* view,
3357 const Sized_relobj<32, big_endian>* object,
3358 const Symbol_value<32>* psymval,
3360 Arm_address address)
3362 gold_assert(group >= 0 && group < 3);
3363 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3364 Valtype* wv = reinterpret_cast<Valtype*>(view);
3365 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3367 const int sign = (insn & 0x00800000) ? 1 : -1;
3368 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3369 int32_t x = (psymval->value(object, addend) - address);
3370 // Calculate the relevant G(n-1) value to obtain this stage residual.
3372 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3373 if (residual >= 0x100)
3374 return This::STATUS_OVERFLOW;
3376 // Mask out the value and U bit.
3378 // Set the U bit for non-negative values.
3381 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3383 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3384 return This::STATUS_OKAY;
3387 // R_ARM_LDC_PC_G0: S + A - P
3388 // R_ARM_LDC_PC_G1: S + A - P
3389 // R_ARM_LDC_PC_G2: S + A - P
3390 // R_ARM_LDC_SB_G0: S + A - B(S)
3391 // R_ARM_LDC_SB_G1: S + A - B(S)
3392 // R_ARM_LDC_SB_G2: S + A - B(S)
3393 static inline typename This::Status
3394 arm_grp_ldc(unsigned char* view,
3395 const Sized_relobj<32, big_endian>* object,
3396 const Symbol_value<32>* psymval,
3398 Arm_address address)
3400 gold_assert(group >= 0 && group < 3);
3401 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3402 Valtype* wv = reinterpret_cast<Valtype*>(view);
3403 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3405 const int sign = (insn & 0x00800000) ? 1 : -1;
3406 int32_t addend = ((insn & 0xff) << 2) * sign;
3407 int32_t x = (psymval->value(object, addend) - address);
3408 // Calculate the relevant G(n-1) value to obtain this stage residual.
3410 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3411 if ((residual & 0x3) != 0 || residual >= 0x400)
3412 return This::STATUS_OVERFLOW;
3414 // Mask out the value and U bit.
3416 // Set the U bit for non-negative values.
3419 insn |= (residual >> 2);
3421 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3422 return This::STATUS_OKAY;
3426 // Relocate ARM long branches. This handles relocation types
3427 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3428 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3429 // undefined and we do not use PLT in this relocation. In such a case,
3430 // the branch is converted into an NOP.
3432 template<bool big_endian>
3433 typename Arm_relocate_functions<big_endian>::Status
3434 Arm_relocate_functions<big_endian>::arm_branch_common(
3435 unsigned int r_type,
3436 const Relocate_info<32, big_endian>* relinfo,
3437 unsigned char *view,
3438 const Sized_symbol<32>* gsym,
3439 const Arm_relobj<big_endian>* object,
3441 const Symbol_value<32>* psymval,
3442 Arm_address address,
3443 Arm_address thumb_bit,
3444 bool is_weakly_undefined_without_plt)
3446 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3447 Valtype* wv = reinterpret_cast<Valtype*>(view);
3448 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3450 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3451 && ((val & 0x0f000000UL) == 0x0a000000UL);
3452 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3453 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3454 && ((val & 0x0f000000UL) == 0x0b000000UL);
3455 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3456 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3458 // Check that the instruction is valid.
3459 if (r_type == elfcpp::R_ARM_CALL)
3461 if (!insn_is_uncond_bl && !insn_is_blx)
3462 return This::STATUS_BAD_RELOC;
3464 else if (r_type == elfcpp::R_ARM_JUMP24)
3466 if (!insn_is_b && !insn_is_cond_bl)
3467 return This::STATUS_BAD_RELOC;
3469 else if (r_type == elfcpp::R_ARM_PLT32)
3471 if (!insn_is_any_branch)
3472 return This::STATUS_BAD_RELOC;
3474 else if (r_type == elfcpp::R_ARM_XPC25)
3476 // FIXME: AAELF document IH0044C does not say much about it other
3477 // than it being obsolete.
3478 if (!insn_is_any_branch)
3479 return This::STATUS_BAD_RELOC;
3484 // A branch to an undefined weak symbol is turned into a jump to
3485 // the next instruction unless a PLT entry will be created.
3486 // Do the same for local undefined symbols.
3487 // The jump to the next instruction is optimized as a NOP depending
3488 // on the architecture.
3489 const Target_arm<big_endian>* arm_target =
3490 Target_arm<big_endian>::default_target();
3491 if (is_weakly_undefined_without_plt)
3493 Valtype cond = val & 0xf0000000U;
3494 if (arm_target->may_use_arm_nop())
3495 val = cond | 0x0320f000;
3497 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3498 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3499 return This::STATUS_OKAY;
3502 Valtype addend = utils::sign_extend<26>(val << 2);
3503 Valtype branch_target = psymval->value(object, addend);
3504 int32_t branch_offset = branch_target - address;
3506 // We need a stub if the branch offset is too large or if we need
3508 bool may_use_blx = arm_target->may_use_blx();
3509 Reloc_stub* stub = NULL;
3510 if ((branch_offset > ARM_MAX_FWD_BRANCH_OFFSET)
3511 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3512 || ((thumb_bit != 0) && !(may_use_blx && r_type == elfcpp::R_ARM_CALL)))
3514 Stub_type stub_type =
3515 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3517 if (stub_type != arm_stub_none)
3519 Stub_table<big_endian>* stub_table =
3520 object->stub_table(relinfo->data_shndx);
3521 gold_assert(stub_table != NULL);
3523 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3524 stub = stub_table->find_reloc_stub(stub_key);
3525 gold_assert(stub != NULL);
3526 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3527 branch_target = stub_table->address() + stub->offset() + addend;
3528 branch_offset = branch_target - address;
3529 gold_assert((branch_offset <= ARM_MAX_FWD_BRANCH_OFFSET)
3530 && (branch_offset >= ARM_MAX_BWD_BRANCH_OFFSET));
3534 // At this point, if we still need to switch mode, the instruction
3535 // must either be a BLX or a BL that can be converted to a BLX.
3539 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
3540 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
3543 val = utils::bit_select(val, (branch_offset >> 2), 0xffffffUL);
3544 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3545 return (utils::has_overflow<26>(branch_offset)
3546 ? This::STATUS_OVERFLOW : This::STATUS_OKAY);
3549 // Relocate THUMB long branches. This handles relocation types
3550 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3551 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3552 // undefined and we do not use PLT in this relocation. In such a case,
3553 // the branch is converted into an NOP.
3555 template<bool big_endian>
3556 typename Arm_relocate_functions<big_endian>::Status
3557 Arm_relocate_functions<big_endian>::thumb_branch_common(
3558 unsigned int r_type,
3559 const Relocate_info<32, big_endian>* relinfo,
3560 unsigned char *view,
3561 const Sized_symbol<32>* gsym,
3562 const Arm_relobj<big_endian>* object,
3564 const Symbol_value<32>* psymval,
3565 Arm_address address,
3566 Arm_address thumb_bit,
3567 bool is_weakly_undefined_without_plt)
3569 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3570 Valtype* wv = reinterpret_cast<Valtype*>(view);
3571 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3572 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3574 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3576 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
3577 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
3579 // Check that the instruction is valid.
3580 if (r_type == elfcpp::R_ARM_THM_CALL)
3582 if (!is_bl_insn && !is_blx_insn)
3583 return This::STATUS_BAD_RELOC;
3585 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
3587 // This cannot be a BLX.
3589 return This::STATUS_BAD_RELOC;
3591 else if (r_type == elfcpp::R_ARM_THM_XPC22)
3593 // Check for Thumb to Thumb call.
3595 return This::STATUS_BAD_RELOC;
3598 gold_warning(_("%s: Thumb BLX instruction targets "
3599 "thumb function '%s'."),
3600 object->name().c_str(),
3601 (gsym ? gsym->name() : "(local)"));
3602 // Convert BLX to BL.
3603 lower_insn |= 0x1000U;
3609 // A branch to an undefined weak symbol is turned into a jump to
3610 // the next instruction unless a PLT entry will be created.
3611 // The jump to the next instruction is optimized as a NOP.W for
3612 // Thumb-2 enabled architectures.
3613 const Target_arm<big_endian>* arm_target =
3614 Target_arm<big_endian>::default_target();
3615 if (is_weakly_undefined_without_plt)
3617 if (arm_target->may_use_thumb2_nop())
3619 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
3620 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
3624 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
3625 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
3627 return This::STATUS_OKAY;
3630 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
3631 Arm_address branch_target = psymval->value(object, addend);
3632 int32_t branch_offset = branch_target - address;
3634 // We need a stub if the branch offset is too large or if we need
3636 bool may_use_blx = arm_target->may_use_blx();
3637 bool thumb2 = arm_target->using_thumb2();
3639 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3640 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3642 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3643 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3644 || ((thumb_bit == 0)
3645 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
3646 || r_type == elfcpp::R_ARM_THM_JUMP24)))
3648 Stub_type stub_type =
3649 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3651 if (stub_type != arm_stub_none)
3653 Stub_table<big_endian>* stub_table =
3654 object->stub_table(relinfo->data_shndx);
3655 gold_assert(stub_table != NULL);
3657 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3658 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
3659 gold_assert(stub != NULL);
3660 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3661 branch_target = stub_table->address() + stub->offset() + addend;
3662 branch_offset = branch_target - address;
3666 // At this point, if we still need to switch mode, the instruction
3667 // must either be a BLX or a BL that can be converted to a BLX.
3670 gold_assert(may_use_blx
3671 && (r_type == elfcpp::R_ARM_THM_CALL
3672 || r_type == elfcpp::R_ARM_THM_XPC22));
3673 // Make sure this is a BLX.
3674 lower_insn &= ~0x1000U;
3678 // Make sure this is a BL.
3679 lower_insn |= 0x1000U;
3682 if ((lower_insn & 0x5000U) == 0x4000U)
3683 // For a BLX instruction, make sure that the relocation is rounded up
3684 // to a word boundary. This follows the semantics of the instruction
3685 // which specifies that bit 1 of the target address will come from bit
3686 // 1 of the base address.
3687 branch_offset = (branch_offset + 2) & ~3;
3689 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
3690 // We use the Thumb-2 encoding, which is safe even if dealing with
3691 // a Thumb-1 instruction by virtue of our overflow check above. */
3692 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
3693 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
3695 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3696 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3699 ? utils::has_overflow<25>(branch_offset)
3700 : utils::has_overflow<23>(branch_offset))
3701 ? This::STATUS_OVERFLOW
3702 : This::STATUS_OKAY);
3705 // Relocate THUMB-2 long conditional branches.
3706 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3707 // undefined and we do not use PLT in this relocation. In such a case,
3708 // the branch is converted into an NOP.
3710 template<bool big_endian>
3711 typename Arm_relocate_functions<big_endian>::Status
3712 Arm_relocate_functions<big_endian>::thm_jump19(
3713 unsigned char *view,
3714 const Arm_relobj<big_endian>* object,
3715 const Symbol_value<32>* psymval,
3716 Arm_address address,
3717 Arm_address thumb_bit)
3719 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3720 Valtype* wv = reinterpret_cast<Valtype*>(view);
3721 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3722 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3723 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
3725 Arm_address branch_target = psymval->value(object, addend);
3726 int32_t branch_offset = branch_target - address;
3728 // ??? Should handle interworking? GCC might someday try to
3729 // use this for tail calls.
3730 // FIXME: We do support thumb entry to PLT yet.
3733 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
3734 return This::STATUS_BAD_RELOC;
3737 // Put RELOCATION back into the insn.
3738 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
3739 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
3741 // Put the relocated value back in the object file:
3742 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3743 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3745 return (utils::has_overflow<21>(branch_offset)
3746 ? This::STATUS_OVERFLOW
3747 : This::STATUS_OKAY);
3750 // Get the GOT section, creating it if necessary.
3752 template<bool big_endian>
3753 Output_data_got<32, big_endian>*
3754 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
3756 if (this->got_ == NULL)
3758 gold_assert(symtab != NULL && layout != NULL);
3760 this->got_ = new Output_data_got<32, big_endian>();
3763 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3765 | elfcpp::SHF_WRITE),
3766 this->got_, false, true, true,
3769 // The old GNU linker creates a .got.plt section. We just
3770 // create another set of data in the .got section. Note that we
3771 // always create a PLT if we create a GOT, although the PLT
3773 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
3774 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3776 | elfcpp::SHF_WRITE),
3777 this->got_plt_, false, false,
3780 // The first three entries are reserved.
3781 this->got_plt_->set_current_data_size(3 * 4);
3783 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
3784 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
3785 Symbol_table::PREDEFINED,
3787 0, 0, elfcpp::STT_OBJECT,
3789 elfcpp::STV_HIDDEN, 0,
3795 // Get the dynamic reloc section, creating it if necessary.
3797 template<bool big_endian>
3798 typename Target_arm<big_endian>::Reloc_section*
3799 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
3801 if (this->rel_dyn_ == NULL)
3803 gold_assert(layout != NULL);
3804 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
3805 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
3806 elfcpp::SHF_ALLOC, this->rel_dyn_, true,
3807 false, false, false);
3809 return this->rel_dyn_;
3812 // Insn_template methods.
3814 // Return byte size of an instruction template.
3817 Insn_template::size() const
3819 switch (this->type())
3822 case THUMB16_SPECIAL_TYPE:
3833 // Return alignment of an instruction template.
3836 Insn_template::alignment() const
3838 switch (this->type())
3841 case THUMB16_SPECIAL_TYPE:
3852 // Stub_template methods.
3854 Stub_template::Stub_template(
3855 Stub_type type, const Insn_template* insns,
3857 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
3858 entry_in_thumb_mode_(false), relocs_()
3862 // Compute byte size and alignment of stub template.
3863 for (size_t i = 0; i < insn_count; i++)
3865 unsigned insn_alignment = insns[i].alignment();
3866 size_t insn_size = insns[i].size();
3867 gold_assert((offset & (insn_alignment - 1)) == 0);
3868 this->alignment_ = std::max(this->alignment_, insn_alignment);
3869 switch (insns[i].type())
3871 case Insn_template::THUMB16_TYPE:
3872 case Insn_template::THUMB16_SPECIAL_TYPE:
3874 this->entry_in_thumb_mode_ = true;
3877 case Insn_template::THUMB32_TYPE:
3878 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
3879 this->relocs_.push_back(Reloc(i, offset));
3881 this->entry_in_thumb_mode_ = true;
3884 case Insn_template::ARM_TYPE:
3885 // Handle cases where the target is encoded within the
3887 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
3888 this->relocs_.push_back(Reloc(i, offset));
3891 case Insn_template::DATA_TYPE:
3892 // Entry point cannot be data.
3893 gold_assert(i != 0);
3894 this->relocs_.push_back(Reloc(i, offset));
3900 offset += insn_size;
3902 this->size_ = offset;
3907 // Template to implement do_write for a specific target endianity.
3909 template<bool big_endian>
3911 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
3913 const Stub_template* stub_template = this->stub_template();
3914 const Insn_template* insns = stub_template->insns();
3916 // FIXME: We do not handle BE8 encoding yet.
3917 unsigned char* pov = view;
3918 for (size_t i = 0; i < stub_template->insn_count(); i++)
3920 switch (insns[i].type())
3922 case Insn_template::THUMB16_TYPE:
3923 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
3925 case Insn_template::THUMB16_SPECIAL_TYPE:
3926 elfcpp::Swap<16, big_endian>::writeval(
3928 this->thumb16_special(i));
3930 case Insn_template::THUMB32_TYPE:
3932 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
3933 uint32_t lo = insns[i].data() & 0xffff;
3934 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
3935 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
3938 case Insn_template::ARM_TYPE:
3939 case Insn_template::DATA_TYPE:
3940 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
3945 pov += insns[i].size();
3947 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
3950 // Reloc_stub::Key methods.
3952 // Dump a Key as a string for debugging.
3955 Reloc_stub::Key::name() const
3957 if (this->r_sym_ == invalid_index)
3959 // Global symbol key name
3960 // <stub-type>:<symbol name>:<addend>.
3961 const std::string sym_name = this->u_.symbol->name();
3962 // We need to print two hex number and two colons. So just add 100 bytes
3963 // to the symbol name size.
3964 size_t len = sym_name.size() + 100;
3965 char* buffer = new char[len];
3966 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
3967 sym_name.c_str(), this->addend_);
3968 gold_assert(c > 0 && c < static_cast<int>(len));
3970 return std::string(buffer);
3974 // local symbol key name
3975 // <stub-type>:<object>:<r_sym>:<addend>.
3976 const size_t len = 200;
3978 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
3979 this->u_.relobj, this->r_sym_, this->addend_);
3980 gold_assert(c > 0 && c < static_cast<int>(len));
3981 return std::string(buffer);
3985 // Reloc_stub methods.
3987 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
3988 // LOCATION to DESTINATION.
3989 // This code is based on the arm_type_of_stub function in
3990 // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub
3994 Reloc_stub::stub_type_for_reloc(
3995 unsigned int r_type,
3996 Arm_address location,
3997 Arm_address destination,
3998 bool target_is_thumb)
4000 Stub_type stub_type = arm_stub_none;
4002 // This is a bit ugly but we want to avoid using a templated class for
4003 // big and little endianities.
4005 bool should_force_pic_veneer;
4008 if (parameters->target().is_big_endian())
4010 const Target_arm<true>* big_endian_target =
4011 Target_arm<true>::default_target();
4012 may_use_blx = big_endian_target->may_use_blx();
4013 should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
4014 thumb2 = big_endian_target->using_thumb2();
4015 thumb_only = big_endian_target->using_thumb_only();
4019 const Target_arm<false>* little_endian_target =
4020 Target_arm<false>::default_target();
4021 may_use_blx = little_endian_target->may_use_blx();
4022 should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
4023 thumb2 = little_endian_target->using_thumb2();
4024 thumb_only = little_endian_target->using_thumb_only();
4027 int64_t branch_offset = (int64_t)destination - location;
4029 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4031 // Handle cases where:
4032 // - this call goes too far (different Thumb/Thumb2 max
4034 // - it's a Thumb->Arm call and blx is not available, or it's a
4035 // Thumb->Arm branch (not bl). A stub is needed in this case.
4037 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4038 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4040 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4041 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4042 || ((!target_is_thumb)
4043 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4044 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4046 if (target_is_thumb)
4051 stub_type = (parameters->options().shared()
4052 || should_force_pic_veneer)
4055 && (r_type == elfcpp::R_ARM_THM_CALL))
4056 // V5T and above. Stub starts with ARM code, so
4057 // we must be able to switch mode before
4058 // reaching it, which is only possible for 'bl'
4059 // (ie R_ARM_THM_CALL relocation).
4060 ? arm_stub_long_branch_any_thumb_pic
4061 // On V4T, use Thumb code only.
4062 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4066 && (r_type == elfcpp::R_ARM_THM_CALL))
4067 ? arm_stub_long_branch_any_any // V5T and above.
4068 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4072 stub_type = (parameters->options().shared()
4073 || should_force_pic_veneer)
4074 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4075 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4082 // FIXME: We should check that the input section is from an
4083 // object that has interwork enabled.
4085 stub_type = (parameters->options().shared()
4086 || should_force_pic_veneer)
4089 && (r_type == elfcpp::R_ARM_THM_CALL))
4090 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4091 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4095 && (r_type == elfcpp::R_ARM_THM_CALL))
4096 ? arm_stub_long_branch_any_any // V5T and above.
4097 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4099 // Handle v4t short branches.
4100 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4101 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4102 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4103 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4107 else if (r_type == elfcpp::R_ARM_CALL
4108 || r_type == elfcpp::R_ARM_JUMP24
4109 || r_type == elfcpp::R_ARM_PLT32)
4111 if (target_is_thumb)
4115 // FIXME: We should check that the input section is from an
4116 // object that has interwork enabled.
4118 // We have an extra 2-bytes reach because of
4119 // the mode change (bit 24 (H) of BLX encoding).
4120 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4121 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4122 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4123 || (r_type == elfcpp::R_ARM_JUMP24)
4124 || (r_type == elfcpp::R_ARM_PLT32))
4126 stub_type = (parameters->options().shared()
4127 || should_force_pic_veneer)
4130 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4131 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4135 ? arm_stub_long_branch_any_any // V5T and above.
4136 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4142 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4143 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4145 stub_type = (parameters->options().shared()
4146 || should_force_pic_veneer)
4147 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4148 : arm_stub_long_branch_any_any; /// non-PIC.
4156 // Cortex_a8_stub methods.
4158 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4159 // I is the position of the instruction template in the stub template.
4162 Cortex_a8_stub::do_thumb16_special(size_t i)
4164 // The only use of this is to copy condition code from a conditional
4165 // branch being worked around to the corresponding conditional branch in
4167 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4169 uint16_t data = this->stub_template()->insns()[i].data();
4170 gold_assert((data & 0xff00U) == 0xd000U);
4171 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4175 // Stub_factory methods.
4177 Stub_factory::Stub_factory()
4179 // The instruction template sequences are declared as static
4180 // objects and initialized first time the constructor runs.
4182 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4183 // to reach the stub if necessary.
4184 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4186 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4187 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4188 // dcd R_ARM_ABS32(X)
4191 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4193 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4195 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4196 Insn_template::arm_insn(0xe12fff1c), // bx ip
4197 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4198 // dcd R_ARM_ABS32(X)
4201 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4202 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4204 Insn_template::thumb16_insn(0xb401), // push {r0}
4205 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4206 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4207 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4208 Insn_template::thumb16_insn(0x4760), // bx ip
4209 Insn_template::thumb16_insn(0xbf00), // nop
4210 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4211 // dcd R_ARM_ABS32(X)
4214 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4216 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4218 Insn_template::thumb16_insn(0x4778), // bx pc
4219 Insn_template::thumb16_insn(0x46c0), // nop
4220 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4221 Insn_template::arm_insn(0xe12fff1c), // bx ip
4222 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4223 // dcd R_ARM_ABS32(X)
4226 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4228 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4230 Insn_template::thumb16_insn(0x4778), // bx pc
4231 Insn_template::thumb16_insn(0x46c0), // nop
4232 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4233 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4234 // dcd R_ARM_ABS32(X)
4237 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4238 // one, when the destination is close enough.
4239 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4241 Insn_template::thumb16_insn(0x4778), // bx pc
4242 Insn_template::thumb16_insn(0x46c0), // nop
4243 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4246 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4247 // blx to reach the stub if necessary.
4248 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4250 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4251 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4252 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4253 // dcd R_ARM_REL32(X-4)
4256 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4257 // blx to reach the stub if necessary. We can not add into pc;
4258 // it is not guaranteed to mode switch (different in ARMv6 and
4260 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4262 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4263 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4264 Insn_template::arm_insn(0xe12fff1c), // bx ip
4265 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4266 // dcd R_ARM_REL32(X)
4269 // V4T ARM -> ARM long branch stub, PIC.
4270 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4272 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4273 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4274 Insn_template::arm_insn(0xe12fff1c), // bx ip
4275 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4276 // dcd R_ARM_REL32(X)
4279 // V4T Thumb -> ARM long branch stub, PIC.
4280 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4282 Insn_template::thumb16_insn(0x4778), // bx pc
4283 Insn_template::thumb16_insn(0x46c0), // nop
4284 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4285 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4286 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4287 // dcd R_ARM_REL32(X)
4290 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4292 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4294 Insn_template::thumb16_insn(0xb401), // push {r0}
4295 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4296 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4297 Insn_template::thumb16_insn(0x4484), // add ip, r0
4298 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4299 Insn_template::thumb16_insn(0x4760), // bx ip
4300 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4301 // dcd R_ARM_REL32(X)
4304 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4306 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4308 Insn_template::thumb16_insn(0x4778), // bx pc
4309 Insn_template::thumb16_insn(0x46c0), // nop
4310 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4311 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4312 Insn_template::arm_insn(0xe12fff1c), // bx ip
4313 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4314 // dcd R_ARM_REL32(X)
4317 // Cortex-A8 erratum-workaround stubs.
4319 // Stub used for conditional branches (which may be beyond +/-1MB away,
4320 // so we can't use a conditional branch to reach this stub).
4327 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4329 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4330 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4331 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4335 // Stub used for b.w and bl.w instructions.
4337 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4339 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4342 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4344 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4347 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4348 // instruction (which switches to ARM mode) to point to this stub. Jump to
4349 // the real destination using an ARM-mode branch.
4350 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4352 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4355 // Stub used to provide an interworking for R_ARM_V4BX relocation
4356 // (bx r[n] instruction).
4357 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4359 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4360 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4361 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4364 // Fill in the stub template look-up table. Stub templates are constructed
4365 // per instance of Stub_factory for fast look-up without locking
4366 // in a thread-enabled environment.
4368 this->stub_templates_[arm_stub_none] =
4369 new Stub_template(arm_stub_none, NULL, 0);
4371 #define DEF_STUB(x) \
4375 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4376 Stub_type type = arm_stub_##x; \
4377 this->stub_templates_[type] = \
4378 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4386 // Stub_table methods.
4388 // Removel all Cortex-A8 stub.
4390 template<bool big_endian>
4392 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4394 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4395 p != this->cortex_a8_stubs_.end();
4398 this->cortex_a8_stubs_.clear();
4401 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4403 template<bool big_endian>
4405 Stub_table<big_endian>::relocate_stub(
4407 const Relocate_info<32, big_endian>* relinfo,
4408 Target_arm<big_endian>* arm_target,
4409 Output_section* output_section,
4410 unsigned char* view,
4411 Arm_address address,
4412 section_size_type view_size)
4414 const Stub_template* stub_template = stub->stub_template();
4415 if (stub_template->reloc_count() != 0)
4417 // Adjust view to cover the stub only.
4418 section_size_type offset = stub->offset();
4419 section_size_type stub_size = stub_template->size();
4420 gold_assert(offset + stub_size <= view_size);
4422 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4423 address + offset, stub_size);
4427 // Relocate all stubs in this stub table.
4429 template<bool big_endian>
4431 Stub_table<big_endian>::relocate_stubs(
4432 const Relocate_info<32, big_endian>* relinfo,
4433 Target_arm<big_endian>* arm_target,
4434 Output_section* output_section,
4435 unsigned char* view,
4436 Arm_address address,
4437 section_size_type view_size)
4439 // If we are passed a view bigger than the stub table's. we need to
4441 gold_assert(address == this->address()
4443 == static_cast<section_size_type>(this->data_size())));
4445 // Relocate all relocation stubs.
4446 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4447 p != this->reloc_stubs_.end();
4449 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4450 address, view_size);
4452 // Relocate all Cortex-A8 stubs.
4453 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4454 p != this->cortex_a8_stubs_.end();
4456 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4457 address, view_size);
4459 // Relocate all ARM V4BX stubs.
4460 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
4461 p != this->arm_v4bx_stubs_.end();
4465 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
4466 address, view_size);
4470 // Write out the stubs to file.
4472 template<bool big_endian>
4474 Stub_table<big_endian>::do_write(Output_file* of)
4476 off_t offset = this->offset();
4477 const section_size_type oview_size =
4478 convert_to_section_size_type(this->data_size());
4479 unsigned char* const oview = of->get_output_view(offset, oview_size);
4481 // Write relocation stubs.
4482 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4483 p != this->reloc_stubs_.end();
4486 Reloc_stub* stub = p->second;
4487 Arm_address address = this->address() + stub->offset();
4489 == align_address(address,
4490 stub->stub_template()->alignment()));
4491 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4495 // Write Cortex-A8 stubs.
4496 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4497 p != this->cortex_a8_stubs_.end();
4500 Cortex_a8_stub* stub = p->second;
4501 Arm_address address = this->address() + stub->offset();
4503 == align_address(address,
4504 stub->stub_template()->alignment()));
4505 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4509 // Write ARM V4BX relocation stubs.
4510 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4511 p != this->arm_v4bx_stubs_.end();
4517 Arm_address address = this->address() + (*p)->offset();
4519 == align_address(address,
4520 (*p)->stub_template()->alignment()));
4521 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
4525 of->write_output_view(this->offset(), oview_size, oview);
4528 // Update the data size and address alignment of the stub table at the end
4529 // of a relaxation pass. Return true if either the data size or the
4530 // alignment changed in this relaxation pass.
4532 template<bool big_endian>
4534 Stub_table<big_endian>::update_data_size_and_addralign()
4537 unsigned addralign = 1;
4539 // Go over all stubs in table to compute data size and address alignment.
4541 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4542 p != this->reloc_stubs_.end();
4545 const Stub_template* stub_template = p->second->stub_template();
4546 addralign = std::max(addralign, stub_template->alignment());
4547 size = (align_address(size, stub_template->alignment())
4548 + stub_template->size());
4551 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4552 p != this->cortex_a8_stubs_.end();
4555 const Stub_template* stub_template = p->second->stub_template();
4556 addralign = std::max(addralign, stub_template->alignment());
4557 size = (align_address(size, stub_template->alignment())
4558 + stub_template->size());
4561 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4562 p != this->arm_v4bx_stubs_.end();
4568 const Stub_template* stub_template = (*p)->stub_template();
4569 addralign = std::max(addralign, stub_template->alignment());
4570 size = (align_address(size, stub_template->alignment())
4571 + stub_template->size());
4574 // Check if either data size or alignment changed in this pass.
4575 // Update prev_data_size_ and prev_addralign_. These will be used
4576 // as the current data size and address alignment for the next pass.
4577 bool changed = size != this->prev_data_size_;
4578 this->prev_data_size_ = size;
4580 if (addralign != this->prev_addralign_)
4582 this->prev_addralign_ = addralign;
4587 // Finalize the stubs. This sets the offsets of the stubs within the stub
4588 // table. It also marks all input sections needing Cortex-A8 workaround.
4590 template<bool big_endian>
4592 Stub_table<big_endian>::finalize_stubs()
4595 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4596 p != this->reloc_stubs_.end();
4599 Reloc_stub* stub = p->second;
4600 const Stub_template* stub_template = stub->stub_template();
4601 uint64_t stub_addralign = stub_template->alignment();
4602 off = align_address(off, stub_addralign);
4603 stub->set_offset(off);
4604 off += stub_template->size();
4607 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4608 p != this->cortex_a8_stubs_.end();
4611 Cortex_a8_stub* stub = p->second;
4612 const Stub_template* stub_template = stub->stub_template();
4613 uint64_t stub_addralign = stub_template->alignment();
4614 off = align_address(off, stub_addralign);
4615 stub->set_offset(off);
4616 off += stub_template->size();
4618 // Mark input section so that we can determine later if a code section
4619 // needs the Cortex-A8 workaround quickly.
4620 Arm_relobj<big_endian>* arm_relobj =
4621 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
4622 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
4625 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4626 p != this->arm_v4bx_stubs_.end();
4632 const Stub_template* stub_template = (*p)->stub_template();
4633 uint64_t stub_addralign = stub_template->alignment();
4634 off = align_address(off, stub_addralign);
4635 (*p)->set_offset(off);
4636 off += stub_template->size();
4639 gold_assert(off <= this->prev_data_size_);
4642 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
4643 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
4644 // of the address range seen by the linker.
4646 template<bool big_endian>
4648 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
4649 Target_arm<big_endian>* arm_target,
4650 unsigned char* view,
4651 Arm_address view_address,
4652 section_size_type view_size)
4654 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
4655 for (Cortex_a8_stub_list::const_iterator p =
4656 this->cortex_a8_stubs_.lower_bound(view_address);
4657 ((p != this->cortex_a8_stubs_.end())
4658 && (p->first < (view_address + view_size)));
4661 // We do not store the THUMB bit in the LSB of either the branch address
4662 // or the stub offset. There is no need to strip the LSB.
4663 Arm_address branch_address = p->first;
4664 const Cortex_a8_stub* stub = p->second;
4665 Arm_address stub_address = this->address() + stub->offset();
4667 // Offset of the branch instruction relative to this view.
4668 section_size_type offset =
4669 convert_to_section_size_type(branch_address - view_address);
4670 gold_assert((offset + 4) <= view_size);
4672 arm_target->apply_cortex_a8_workaround(stub, stub_address,
4673 view + offset, branch_address);
4677 // Arm_input_section methods.
4679 // Initialize an Arm_input_section.
4681 template<bool big_endian>
4683 Arm_input_section<big_endian>::init()
4685 Relobj* relobj = this->relobj();
4686 unsigned int shndx = this->shndx();
4688 // Cache these to speed up size and alignment queries. It is too slow
4689 // to call section_addraglin and section_size every time.
4690 this->original_addralign_ = relobj->section_addralign(shndx);
4691 this->original_size_ = relobj->section_size(shndx);
4693 // We want to make this look like the original input section after
4694 // output sections are finalized.
4695 Output_section* os = relobj->output_section(shndx);
4696 off_t offset = relobj->output_section_offset(shndx);
4697 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
4698 this->set_address(os->address() + offset);
4699 this->set_file_offset(os->offset() + offset);
4701 this->set_current_data_size(this->original_size_);
4702 this->finalize_data_size();
4705 template<bool big_endian>
4707 Arm_input_section<big_endian>::do_write(Output_file* of)
4709 // We have to write out the original section content.
4710 section_size_type section_size;
4711 const unsigned char* section_contents =
4712 this->relobj()->section_contents(this->shndx(), §ion_size, false);
4713 of->write(this->offset(), section_contents, section_size);
4715 // If this owns a stub table and it is not empty, write it.
4716 if (this->is_stub_table_owner() && !this->stub_table_->empty())
4717 this->stub_table_->write(of);
4720 // Finalize data size.
4722 template<bool big_endian>
4724 Arm_input_section<big_endian>::set_final_data_size()
4726 // If this owns a stub table, finalize its data size as well.
4727 if (this->is_stub_table_owner())
4729 uint64_t address = this->address();
4731 // The stub table comes after the original section contents.
4732 address += this->original_size_;
4733 address = align_address(address, this->stub_table_->addralign());
4734 off_t offset = this->offset() + (address - this->address());
4735 this->stub_table_->set_address_and_file_offset(address, offset);
4736 address += this->stub_table_->data_size();
4737 gold_assert(address == this->address() + this->current_data_size());
4740 this->set_data_size(this->current_data_size());
4743 // Reset address and file offset.
4745 template<bool big_endian>
4747 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
4749 // Size of the original input section contents.
4750 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
4752 // If this is a stub table owner, account for the stub table size.
4753 if (this->is_stub_table_owner())
4755 Stub_table<big_endian>* stub_table = this->stub_table_;
4757 // Reset the stub table's address and file offset. The
4758 // current data size for child will be updated after that.
4759 stub_table_->reset_address_and_file_offset();
4760 off = align_address(off, stub_table_->addralign());
4761 off += stub_table->current_data_size();
4764 this->set_current_data_size(off);
4767 // Arm_exidx_cantunwind methods.
4769 // Write this to Output file OF for a fixed endianity.
4771 template<bool big_endian>
4773 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
4775 off_t offset = this->offset();
4776 const section_size_type oview_size = 8;
4777 unsigned char* const oview = of->get_output_view(offset, oview_size);
4779 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
4780 Valtype* wv = reinterpret_cast<Valtype*>(oview);
4782 Output_section* os = this->relobj_->output_section(this->shndx_);
4783 gold_assert(os != NULL);
4785 Arm_relobj<big_endian>* arm_relobj =
4786 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
4787 Arm_address output_offset =
4788 arm_relobj->get_output_section_offset(this->shndx_);
4789 Arm_address section_start;
4790 if(output_offset != Arm_relobj<big_endian>::invalid_address)
4791 section_start = os->address() + output_offset;
4794 // Currently this only happens for a relaxed section.
4795 const Output_relaxed_input_section* poris =
4796 os->find_relaxed_input_section(this->relobj_, this->shndx_);
4797 gold_assert(poris != NULL);
4798 section_start = poris->address();
4801 // We always append this to the end of an EXIDX section.
4802 Arm_address output_address =
4803 section_start + this->relobj_->section_size(this->shndx_);
4805 // Write out the entry. The first word either points to the beginning
4806 // or after the end of a text section. The second word is the special
4807 // EXIDX_CANTUNWIND value.
4808 uint32_t prel31_offset = output_address - this->address();
4809 if (utils::has_overflow<31>(offset))
4810 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
4811 elfcpp::Swap<32, big_endian>::writeval(wv, prel31_offset & 0x7fffffffU);
4812 elfcpp::Swap<32, big_endian>::writeval(wv + 1, elfcpp::EXIDX_CANTUNWIND);
4814 of->write_output_view(this->offset(), oview_size, oview);
4817 // Arm_exidx_merged_section methods.
4819 // Constructor for Arm_exidx_merged_section.
4820 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
4821 // SECTION_OFFSET_MAP points to a section offset map describing how
4822 // parts of the input section are mapped to output. DELETED_BYTES is
4823 // the number of bytes deleted from the EXIDX input section.
4825 Arm_exidx_merged_section::Arm_exidx_merged_section(
4826 const Arm_exidx_input_section& exidx_input_section,
4827 const Arm_exidx_section_offset_map& section_offset_map,
4828 uint32_t deleted_bytes)
4829 : Output_relaxed_input_section(exidx_input_section.relobj(),
4830 exidx_input_section.shndx(),
4831 exidx_input_section.addralign()),
4832 exidx_input_section_(exidx_input_section),
4833 section_offset_map_(section_offset_map)
4835 // Fix size here so that we do not need to implement set_final_data_size.
4836 this->set_data_size(exidx_input_section.size() - deleted_bytes);
4837 this->fix_data_size();
4840 // Given an input OBJECT, an input section index SHNDX within that
4841 // object, and an OFFSET relative to the start of that input
4842 // section, return whether or not the corresponding offset within
4843 // the output section is known. If this function returns true, it
4844 // sets *POUTPUT to the output offset. The value -1 indicates that
4845 // this input offset is being discarded.
4848 Arm_exidx_merged_section::do_output_offset(
4849 const Relobj* relobj,
4851 section_offset_type offset,
4852 section_offset_type* poutput) const
4854 // We only handle offsets for the original EXIDX input section.
4855 if (relobj != this->exidx_input_section_.relobj()
4856 || shndx != this->exidx_input_section_.shndx())
4859 section_offset_type section_size =
4860 convert_types<section_offset_type>(this->exidx_input_section_.size());
4861 if (offset < 0 || offset >= section_size)
4862 // Input offset is out of valid range.
4866 // We need to look up the section offset map to determine the output
4867 // offset. Find the reference point in map that is first offset
4868 // bigger than or equal to this offset.
4869 Arm_exidx_section_offset_map::const_iterator p =
4870 this->section_offset_map_.lower_bound(offset);
4872 // The section offset maps are build such that this should not happen if
4873 // input offset is in the valid range.
4874 gold_assert(p != this->section_offset_map_.end());
4876 // We need to check if this is dropped.
4877 section_offset_type ref = p->first;
4878 section_offset_type mapped_ref = p->second;
4880 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
4881 // Offset is present in output.
4882 *poutput = mapped_ref + (offset - ref);
4884 // Offset is discarded owing to EXIDX entry merging.
4891 // Write this to output file OF.
4894 Arm_exidx_merged_section::do_write(Output_file* of)
4896 // If we retain or discard the whole EXIDX input section, we would
4898 gold_assert(this->data_size() != this->exidx_input_section_.size()
4899 && this->data_size() != 0);
4901 off_t offset = this->offset();
4902 const section_size_type oview_size = this->data_size();
4903 unsigned char* const oview = of->get_output_view(offset, oview_size);
4905 Output_section* os = this->relobj()->output_section(this->shndx());
4906 gold_assert(os != NULL);
4908 // Get contents of EXIDX input section.
4909 section_size_type section_size;
4910 const unsigned char* section_contents =
4911 this->relobj()->section_contents(this->shndx(), §ion_size, false);
4912 gold_assert(section_size == this->exidx_input_section_.size());
4914 // Go over spans of input offsets and write only those that are not
4916 section_offset_type in_start = 0;
4917 section_offset_type out_start = 0;
4918 for(Arm_exidx_section_offset_map::const_iterator p =
4919 this->section_offset_map_.begin();
4920 p != this->section_offset_map_.end();
4923 section_offset_type in_end = p->first;
4924 gold_assert(in_end >= in_start);
4925 section_offset_type out_end = p->second;
4926 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
4929 size_t out_chunk_size =
4930 convert_types<size_t>(out_end - out_start + 1);
4931 gold_assert(out_chunk_size == in_chunk_size);
4932 memcpy(oview + out_start, section_contents + in_start,
4934 out_start += out_chunk_size;
4936 in_start += in_chunk_size;
4939 gold_assert(convert_to_section_size_type(out_start) == oview_size);
4940 of->write_output_view(this->offset(), oview_size, oview);
4943 // Arm_exidx_fixup methods.
4945 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
4946 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
4947 // points to the end of the last seen EXIDX section.
4950 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
4952 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
4953 && this->last_input_section_ != NULL)
4955 Relobj* relobj = this->last_input_section_->relobj();
4956 unsigned int text_shndx = this->last_input_section_->link();
4957 Arm_exidx_cantunwind* cantunwind =
4958 new Arm_exidx_cantunwind(relobj, text_shndx);
4959 this->exidx_output_section_->add_output_section_data(cantunwind);
4960 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
4964 // Process an EXIDX section entry in input. Return whether this entry
4965 // can be deleted in the output. SECOND_WORD in the second word of the
4969 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
4972 if (second_word == elfcpp::EXIDX_CANTUNWIND)
4974 // Merge if previous entry is also an EXIDX_CANTUNWIND.
4975 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
4976 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
4978 else if ((second_word & 0x80000000) != 0)
4980 // Inlined unwinding data. Merge if equal to previous.
4981 delete_entry = (this->last_unwind_type_ == UT_INLINED_ENTRY
4982 && this->last_inlined_entry_ == second_word);
4983 this->last_unwind_type_ = UT_INLINED_ENTRY;
4984 this->last_inlined_entry_ = second_word;
4988 // Normal table entry. In theory we could merge these too,
4989 // but duplicate entries are likely to be much less common.
4990 delete_entry = false;
4991 this->last_unwind_type_ = UT_NORMAL_ENTRY;
4993 return delete_entry;
4996 // Update the current section offset map during EXIDX section fix-up.
4997 // If there is no map, create one. INPUT_OFFSET is the offset of a
4998 // reference point, DELETED_BYTES is the number of deleted by in the
4999 // section so far. If DELETE_ENTRY is true, the reference point and
5000 // all offsets after the previous reference point are discarded.
5003 Arm_exidx_fixup::update_offset_map(
5004 section_offset_type input_offset,
5005 section_size_type deleted_bytes,
5008 if (this->section_offset_map_ == NULL)
5009 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5010 section_offset_type output_offset = (delete_entry
5012 : input_offset - deleted_bytes);
5013 (*this->section_offset_map_)[input_offset] = output_offset;
5016 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5017 // bytes deleted. If some entries are merged, also store a pointer to a newly
5018 // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The
5019 // caller owns the map and is responsible for releasing it after use.
5021 template<bool big_endian>
5023 Arm_exidx_fixup::process_exidx_section(
5024 const Arm_exidx_input_section* exidx_input_section,
5025 Arm_exidx_section_offset_map** psection_offset_map)
5027 Relobj* relobj = exidx_input_section->relobj();
5028 unsigned shndx = exidx_input_section->shndx();
5029 section_size_type section_size;
5030 const unsigned char* section_contents =
5031 relobj->section_contents(shndx, §ion_size, false);
5033 if ((section_size % 8) != 0)
5035 // Something is wrong with this section. Better not touch it.
5036 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5037 relobj->name().c_str(), shndx);
5038 this->last_input_section_ = exidx_input_section;
5039 this->last_unwind_type_ = UT_NONE;
5043 uint32_t deleted_bytes = 0;
5044 bool prev_delete_entry = false;
5045 gold_assert(this->section_offset_map_ == NULL);
5047 for (section_size_type i = 0; i < section_size; i += 8)
5049 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5051 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5052 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5054 bool delete_entry = this->process_exidx_entry(second_word);
5056 // Entry deletion causes changes in output offsets. We use a std::map
5057 // to record these. And entry (x, y) means input offset x
5058 // is mapped to output offset y. If y is invalid_offset, then x is
5059 // dropped in the output. Because of the way std::map::lower_bound
5060 // works, we record the last offset in a region w.r.t to keeping or
5061 // dropping. If there is no entry (x0, y0) for an input offset x0,
5062 // the output offset y0 of it is determined by the output offset y1 of
5063 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5064 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1
5066 if (delete_entry != prev_delete_entry && i != 0)
5067 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5069 // Update total deleted bytes for this entry.
5073 prev_delete_entry = delete_entry;
5076 // If section offset map is not NULL, make an entry for the end of
5078 if (this->section_offset_map_ != NULL)
5079 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5081 *psection_offset_map = this->section_offset_map_;
5082 this->section_offset_map_ = NULL;
5083 this->last_input_section_ = exidx_input_section;
5085 // Set the first output text section so that we can link the EXIDX output
5086 // section to it. Ignore any EXIDX input section that is completely merged.
5087 if (this->first_output_text_section_ == NULL
5088 && deleted_bytes != section_size)
5090 unsigned int link = exidx_input_section->link();
5091 Output_section* os = relobj->output_section(link);
5092 gold_assert(os != NULL);
5093 this->first_output_text_section_ = os;
5096 return deleted_bytes;
5099 // Arm_output_section methods.
5101 // Create a stub group for input sections from BEGIN to END. OWNER
5102 // points to the input section to be the owner a new stub table.
5104 template<bool big_endian>
5106 Arm_output_section<big_endian>::create_stub_group(
5107 Input_section_list::const_iterator begin,
5108 Input_section_list::const_iterator end,
5109 Input_section_list::const_iterator owner,
5110 Target_arm<big_endian>* target,
5111 std::vector<Output_relaxed_input_section*>* new_relaxed_sections)
5113 // We use a different kind of relaxed section in an EXIDX section.
5114 // The static casting from Output_relaxed_input_section to
5115 // Arm_input_section is invalid in an EXIDX section. We are okay
5116 // because we should not be calling this for an EXIDX section.
5117 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5119 // Currently we convert ordinary input sections into relaxed sections only
5120 // at this point but we may want to support creating relaxed input section
5121 // very early. So we check here to see if owner is already a relaxed
5124 Arm_input_section<big_endian>* arm_input_section;
5125 if (owner->is_relaxed_input_section())
5128 Arm_input_section<big_endian>::as_arm_input_section(
5129 owner->relaxed_input_section());
5133 gold_assert(owner->is_input_section());
5134 // Create a new relaxed input section.
5136 target->new_arm_input_section(owner->relobj(), owner->shndx());
5137 new_relaxed_sections->push_back(arm_input_section);
5140 // Create a stub table.
5141 Stub_table<big_endian>* stub_table =
5142 target->new_stub_table(arm_input_section);
5144 arm_input_section->set_stub_table(stub_table);
5146 Input_section_list::const_iterator p = begin;
5147 Input_section_list::const_iterator prev_p;
5149 // Look for input sections or relaxed input sections in [begin ... end].
5152 if (p->is_input_section() || p->is_relaxed_input_section())
5154 // The stub table information for input sections live
5155 // in their objects.
5156 Arm_relobj<big_endian>* arm_relobj =
5157 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5158 arm_relobj->set_stub_table(p->shndx(), stub_table);
5162 while (prev_p != end);
5165 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5166 // of stub groups. We grow a stub group by adding input section until the
5167 // size is just below GROUP_SIZE. The last input section will be converted
5168 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5169 // input section after the stub table, effectively double the group size.
5171 // This is similar to the group_sections() function in elf32-arm.c but is
5172 // implemented differently.
5174 template<bool big_endian>
5176 Arm_output_section<big_endian>::group_sections(
5177 section_size_type group_size,
5178 bool stubs_always_after_branch,
5179 Target_arm<big_endian>* target)
5181 // We only care about sections containing code.
5182 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5185 // States for grouping.
5188 // No group is being built.
5190 // A group is being built but the stub table is not found yet.
5191 // We keep group a stub group until the size is just under GROUP_SIZE.
5192 // The last input section in the group will be used as the stub table.
5193 FINDING_STUB_SECTION,
5194 // A group is being built and we have already found a stub table.
5195 // We enter this state to grow a stub group by adding input section
5196 // after the stub table. This effectively doubles the group size.
5200 // Any newly created relaxed sections are stored here.
5201 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5203 State state = NO_GROUP;
5204 section_size_type off = 0;
5205 section_size_type group_begin_offset = 0;
5206 section_size_type group_end_offset = 0;
5207 section_size_type stub_table_end_offset = 0;
5208 Input_section_list::const_iterator group_begin =
5209 this->input_sections().end();
5210 Input_section_list::const_iterator stub_table =
5211 this->input_sections().end();
5212 Input_section_list::const_iterator group_end = this->input_sections().end();
5213 for (Input_section_list::const_iterator p = this->input_sections().begin();
5214 p != this->input_sections().end();
5217 section_size_type section_begin_offset =
5218 align_address(off, p->addralign());
5219 section_size_type section_end_offset =
5220 section_begin_offset + p->data_size();
5222 // Check to see if we should group the previously seens sections.
5228 case FINDING_STUB_SECTION:
5229 // Adding this section makes the group larger than GROUP_SIZE.
5230 if (section_end_offset - group_begin_offset >= group_size)
5232 if (stubs_always_after_branch)
5234 gold_assert(group_end != this->input_sections().end());
5235 this->create_stub_group(group_begin, group_end, group_end,
5236 target, &new_relaxed_sections);
5241 // But wait, there's more! Input sections up to
5242 // stub_group_size bytes after the stub table can be
5243 // handled by it too.
5244 state = HAS_STUB_SECTION;
5245 stub_table = group_end;
5246 stub_table_end_offset = group_end_offset;
5251 case HAS_STUB_SECTION:
5252 // Adding this section makes the post stub-section group larger
5254 if (section_end_offset - stub_table_end_offset >= group_size)
5256 gold_assert(group_end != this->input_sections().end());
5257 this->create_stub_group(group_begin, group_end, stub_table,
5258 target, &new_relaxed_sections);
5267 // If we see an input section and currently there is no group, start
5268 // a new one. Skip any empty sections.
5269 if ((p->is_input_section() || p->is_relaxed_input_section())
5270 && (p->relobj()->section_size(p->shndx()) != 0))
5272 if (state == NO_GROUP)
5274 state = FINDING_STUB_SECTION;
5276 group_begin_offset = section_begin_offset;
5279 // Keep track of the last input section seen.
5281 group_end_offset = section_end_offset;
5284 off = section_end_offset;
5287 // Create a stub group for any ungrouped sections.
5288 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5290 gold_assert(group_end != this->input_sections().end());
5291 this->create_stub_group(group_begin, group_end,
5292 (state == FINDING_STUB_SECTION
5295 target, &new_relaxed_sections);
5298 // Convert input section into relaxed input section in a batch.
5299 if (!new_relaxed_sections.empty())
5300 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5302 // Update the section offsets
5303 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5305 Arm_relobj<big_endian>* arm_relobj =
5306 Arm_relobj<big_endian>::as_arm_relobj(
5307 new_relaxed_sections[i]->relobj());
5308 unsigned int shndx = new_relaxed_sections[i]->shndx();
5309 // Tell Arm_relobj that this input section is converted.
5310 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5314 // Append non empty text sections in this to LIST in ascending
5315 // order of their position in this.
5317 template<bool big_endian>
5319 Arm_output_section<big_endian>::append_text_sections_to_list(
5320 Text_section_list* list)
5322 // We only care about text sections.
5323 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5326 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5328 for (Input_section_list::const_iterator p = this->input_sections().begin();
5329 p != this->input_sections().end();
5332 // We only care about plain or relaxed input sections. We also
5333 // ignore any merged sections.
5334 if ((p->is_input_section() || p->is_relaxed_input_section())
5335 && p->data_size() != 0)
5336 list->push_back(Text_section_list::value_type(p->relobj(),
5341 template<bool big_endian>
5343 Arm_output_section<big_endian>::fix_exidx_coverage(
5344 const Text_section_list& sorted_text_sections,
5345 Symbol_table* symtab)
5347 // We should only do this for the EXIDX output section.
5348 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5350 // We don't want the relaxation loop to undo these changes, so we discard
5351 // the current saved states and take another one after the fix-up.
5352 this->discard_states();
5354 // Remove all input sections.
5355 uint64_t address = this->address();
5356 typedef std::list<Simple_input_section> Simple_input_section_list;
5357 Simple_input_section_list input_sections;
5358 this->reset_address_and_file_offset();
5359 this->get_input_sections(address, std::string(""), &input_sections);
5361 if (!this->input_sections().empty())
5362 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5364 // Go through all the known input sections and record them.
5365 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5366 Section_id_set known_input_sections;
5367 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5368 p != input_sections.end();
5371 // This should never happen. At this point, we should only see
5372 // plain EXIDX input sections.
5373 gold_assert(!p->is_relaxed_input_section());
5374 known_input_sections.insert(Section_id(p->relobj(), p->shndx()));
5377 Arm_exidx_fixup exidx_fixup(this);
5379 // Go over the sorted text sections.
5380 Section_id_set processed_input_sections;
5381 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5382 p != sorted_text_sections.end();
5385 Relobj* relobj = p->first;
5386 unsigned int shndx = p->second;
5388 Arm_relobj<big_endian>* arm_relobj =
5389 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5390 const Arm_exidx_input_section* exidx_input_section =
5391 arm_relobj->exidx_input_section_by_link(shndx);
5393 // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND
5394 // entry pointing to the end of the last seen EXIDX section.
5395 if (exidx_input_section == NULL)
5397 exidx_fixup.add_exidx_cantunwind_as_needed();
5401 Relobj* exidx_relobj = exidx_input_section->relobj();
5402 unsigned int exidx_shndx = exidx_input_section->shndx();
5403 Section_id sid(exidx_relobj, exidx_shndx);
5404 if (known_input_sections.find(sid) == known_input_sections.end())
5406 // This is odd. We have not seen this EXIDX input section before.
5407 // We cannot do fix-up.
5408 gold_error(_("EXIDX section %u of %s is not in EXIDX output section"),
5409 exidx_shndx, exidx_relobj->name().c_str());
5410 exidx_fixup.add_exidx_cantunwind_as_needed();
5414 // Fix up coverage and append input section to output data list.
5415 Arm_exidx_section_offset_map* section_offset_map = NULL;
5416 uint32_t deleted_bytes =
5417 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5418 §ion_offset_map);
5420 if (deleted_bytes == exidx_input_section->size())
5422 // The whole EXIDX section got merged. Remove it from output.
5423 gold_assert(section_offset_map == NULL);
5424 exidx_relobj->set_output_section(exidx_shndx, NULL);
5426 // All local symbols defined in this input section will be dropped.
5427 // We need to adjust output local symbol count.
5428 arm_relobj->set_output_local_symbol_count_needs_update();
5430 else if (deleted_bytes > 0)
5432 // Some entries are merged. We need to convert this EXIDX input
5433 // section into a relaxed section.
5434 gold_assert(section_offset_map != NULL);
5435 Arm_exidx_merged_section* merged_section =
5436 new Arm_exidx_merged_section(*exidx_input_section,
5437 *section_offset_map, deleted_bytes);
5438 this->add_relaxed_input_section(merged_section);
5439 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
5441 // All local symbols defined in discarded portions of this input
5442 // section will be dropped. We need to adjust output local symbol
5444 arm_relobj->set_output_local_symbol_count_needs_update();
5448 // Just add back the EXIDX input section.
5449 gold_assert(section_offset_map == NULL);
5450 Output_section::Simple_input_section sis(exidx_relobj, exidx_shndx);
5451 this->add_simple_input_section(sis, exidx_input_section->size(),
5452 exidx_input_section->addralign());
5455 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
5458 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5459 exidx_fixup.add_exidx_cantunwind_as_needed();
5461 // Remove any known EXIDX input sections that are not processed.
5462 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5463 p != input_sections.end();
5466 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
5467 == processed_input_sections.end())
5469 // We only discard a known EXIDX section because its linked
5470 // text section has been folded by ICF.
5471 Arm_relobj<big_endian>* arm_relobj =
5472 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5473 const Arm_exidx_input_section* exidx_input_section =
5474 arm_relobj->exidx_input_section_by_shndx(p->shndx());
5475 gold_assert(exidx_input_section != NULL);
5476 unsigned int text_shndx = exidx_input_section->link();
5477 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
5479 // Remove this from link.
5480 p->relobj()->set_output_section(p->shndx(), NULL);
5484 // Link exidx output section to the first seen output section and
5485 // set correct entry size.
5486 this->set_link_section(exidx_fixup.first_output_text_section());
5487 this->set_entsize(8);
5489 // Make changes permanent.
5490 this->save_states();
5491 this->set_section_offsets_need_adjustment();
5494 // Arm_relobj methods.
5496 // Determine if an input section is scannable for stub processing. SHDR is
5497 // the header of the section and SHNDX is the section index. OS is the output
5498 // section for the input section and SYMTAB is the global symbol table used to
5499 // look up ICF information.
5501 template<bool big_endian>
5503 Arm_relobj<big_endian>::section_is_scannable(
5504 const elfcpp::Shdr<32, big_endian>& shdr,
5506 const Output_section* os,
5507 const Symbol_table *symtab)
5509 // Skip any empty sections, unallocated sections or sections whose
5510 // type are not SHT_PROGBITS.
5511 if (shdr.get_sh_size() == 0
5512 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
5513 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
5516 // Skip any discarded or ICF'ed sections.
5517 if (os == NULL || symtab->is_section_folded(this, shndx))
5520 // If this requires special offset handling, check to see if it is
5521 // a relaxed section. If this is not, then it is a merged section that
5522 // we cannot handle.
5523 if (this->is_output_section_offset_invalid(shndx))
5525 const Output_relaxed_input_section* poris =
5526 os->find_relaxed_input_section(this, shndx);
5534 // Determine if we want to scan the SHNDX-th section for relocation stubs.
5535 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5537 template<bool big_endian>
5539 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
5540 const elfcpp::Shdr<32, big_endian>& shdr,
5541 const Relobj::Output_sections& out_sections,
5542 const Symbol_table *symtab,
5543 const unsigned char* pshdrs)
5545 unsigned int sh_type = shdr.get_sh_type();
5546 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
5549 // Ignore empty section.
5550 off_t sh_size = shdr.get_sh_size();
5554 // Ignore reloc section with unexpected symbol table. The
5555 // error will be reported in the final link.
5556 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
5559 unsigned int reloc_size;
5560 if (sh_type == elfcpp::SHT_REL)
5561 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5563 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5565 // Ignore reloc section with unexpected entsize or uneven size.
5566 // The error will be reported in the final link.
5567 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
5570 // Ignore reloc section with bad info. This error will be
5571 // reported in the final link.
5572 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5573 if (index >= this->shnum())
5576 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5577 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
5578 return this->section_is_scannable(text_shdr, index,
5579 out_sections[index], symtab);
5582 // Return the output address of either a plain input section or a relaxed
5583 // input section. SHNDX is the section index. We define and use this
5584 // instead of calling Output_section::output_address because that is slow
5585 // for large output.
5587 template<bool big_endian>
5589 Arm_relobj<big_endian>::simple_input_section_output_address(
5593 if (this->is_output_section_offset_invalid(shndx))
5595 const Output_relaxed_input_section* poris =
5596 os->find_relaxed_input_section(this, shndx);
5597 // We do not handle merged sections here.
5598 gold_assert(poris != NULL);
5599 return poris->address();
5602 return os->address() + this->get_output_section_offset(shndx);
5605 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
5606 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5608 template<bool big_endian>
5610 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
5611 const elfcpp::Shdr<32, big_endian>& shdr,
5614 const Symbol_table* symtab)
5616 if (!this->section_is_scannable(shdr, shndx, os, symtab))
5619 // If the section does not cross any 4K-boundaries, it does not need to
5621 Arm_address address = this->simple_input_section_output_address(shndx, os);
5622 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
5628 // Scan a section for Cortex-A8 workaround.
5630 template<bool big_endian>
5632 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
5633 const elfcpp::Shdr<32, big_endian>& shdr,
5636 Target_arm<big_endian>* arm_target)
5638 // Look for the first mapping symbol in this section. It should be
5640 Mapping_symbol_position section_start(shndx, 0);
5641 typename Mapping_symbols_info::const_iterator p =
5642 this->mapping_symbols_info_.lower_bound(section_start);
5644 // There are no mapping symbols for this section. Treat it as a data-only
5646 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
5649 Arm_address output_address =
5650 this->simple_input_section_output_address(shndx, os);
5652 // Get the section contents.
5653 section_size_type input_view_size = 0;
5654 const unsigned char* input_view =
5655 this->section_contents(shndx, &input_view_size, false);
5657 // We need to go through the mapping symbols to determine what to
5658 // scan. There are two reasons. First, we should look at THUMB code and
5659 // THUMB code only. Second, we only want to look at the 4K-page boundary
5660 // to speed up the scanning.
5662 while (p != this->mapping_symbols_info_.end()
5663 && p->first.first == shndx)
5665 typename Mapping_symbols_info::const_iterator next =
5666 this->mapping_symbols_info_.upper_bound(p->first);
5668 // Only scan part of a section with THUMB code.
5669 if (p->second == 't')
5671 // Determine the end of this range.
5672 section_size_type span_start =
5673 convert_to_section_size_type(p->first.second);
5674 section_size_type span_end;
5675 if (next != this->mapping_symbols_info_.end()
5676 && next->first.first == shndx)
5677 span_end = convert_to_section_size_type(next->first.second);
5679 span_end = convert_to_section_size_type(shdr.get_sh_size());
5681 if (((span_start + output_address) & ~0xfffUL)
5682 != ((span_end + output_address - 1) & ~0xfffUL))
5684 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
5685 span_start, span_end,
5695 // Scan relocations for stub generation.
5697 template<bool big_endian>
5699 Arm_relobj<big_endian>::scan_sections_for_stubs(
5700 Target_arm<big_endian>* arm_target,
5701 const Symbol_table* symtab,
5702 const Layout* layout)
5704 unsigned int shnum = this->shnum();
5705 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5707 // Read the section headers.
5708 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
5712 // To speed up processing, we set up hash tables for fast lookup of
5713 // input offsets to output addresses.
5714 this->initialize_input_to_output_maps();
5716 const Relobj::Output_sections& out_sections(this->output_sections());
5718 Relocate_info<32, big_endian> relinfo;
5719 relinfo.symtab = symtab;
5720 relinfo.layout = layout;
5721 relinfo.object = this;
5723 // Do relocation stubs scanning.
5724 const unsigned char* p = pshdrs + shdr_size;
5725 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5727 const elfcpp::Shdr<32, big_endian> shdr(p);
5728 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
5731 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5732 Arm_address output_offset = this->get_output_section_offset(index);
5733 Arm_address output_address;
5734 if(output_offset != invalid_address)
5735 output_address = out_sections[index]->address() + output_offset;
5738 // Currently this only happens for a relaxed section.
5739 const Output_relaxed_input_section* poris =
5740 out_sections[index]->find_relaxed_input_section(this, index);
5741 gold_assert(poris != NULL);
5742 output_address = poris->address();
5745 // Get the relocations.
5746 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
5750 // Get the section contents. This does work for the case in which
5751 // we modify the contents of an input section. We need to pass the
5752 // output view under such circumstances.
5753 section_size_type input_view_size = 0;
5754 const unsigned char* input_view =
5755 this->section_contents(index, &input_view_size, false);
5757 relinfo.reloc_shndx = i;
5758 relinfo.data_shndx = index;
5759 unsigned int sh_type = shdr.get_sh_type();
5760 unsigned int reloc_size;
5761 if (sh_type == elfcpp::SHT_REL)
5762 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5764 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5766 Output_section* os = out_sections[index];
5767 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
5768 shdr.get_sh_size() / reloc_size,
5770 output_offset == invalid_address,
5771 input_view, output_address,
5776 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
5777 // after its relocation section, if there is one, is processed for
5778 // relocation stubs. Merging this loop with the one above would have been
5779 // complicated since we would have had to make sure that relocation stub
5780 // scanning is done first.
5781 if (arm_target->fix_cortex_a8())
5783 const unsigned char* p = pshdrs + shdr_size;
5784 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5786 const elfcpp::Shdr<32, big_endian> shdr(p);
5787 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
5790 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
5795 // After we've done the relocations, we release the hash tables,
5796 // since we no longer need them.
5797 this->free_input_to_output_maps();
5800 // Count the local symbols. The ARM backend needs to know if a symbol
5801 // is a THUMB function or not. For global symbols, it is easy because
5802 // the Symbol object keeps the ELF symbol type. For local symbol it is
5803 // harder because we cannot access this information. So we override the
5804 // do_count_local_symbol in parent and scan local symbols to mark
5805 // THUMB functions. This is not the most efficient way but I do not want to
5806 // slow down other ports by calling a per symbol targer hook inside
5807 // Sized_relobj<size, big_endian>::do_count_local_symbols.
5809 template<bool big_endian>
5811 Arm_relobj<big_endian>::do_count_local_symbols(
5812 Stringpool_template<char>* pool,
5813 Stringpool_template<char>* dynpool)
5815 // We need to fix-up the values of any local symbols whose type are
5818 // Ask parent to count the local symbols.
5819 Sized_relobj<32, big_endian>::do_count_local_symbols(pool, dynpool);
5820 const unsigned int loccount = this->local_symbol_count();
5824 // Intialize the thumb function bit-vector.
5825 std::vector<bool> empty_vector(loccount, false);
5826 this->local_symbol_is_thumb_function_.swap(empty_vector);
5828 // Read the symbol table section header.
5829 const unsigned int symtab_shndx = this->symtab_shndx();
5830 elfcpp::Shdr<32, big_endian>
5831 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
5832 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
5834 // Read the local symbols.
5835 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
5836 gold_assert(loccount == symtabshdr.get_sh_info());
5837 off_t locsize = loccount * sym_size;
5838 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
5839 locsize, true, true);
5841 // For mapping symbol processing, we need to read the symbol names.
5842 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
5843 if (strtab_shndx >= this->shnum())
5845 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
5849 elfcpp::Shdr<32, big_endian>
5850 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
5851 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
5853 this->error(_("symbol table name section has wrong type: %u"),
5854 static_cast<unsigned int>(strtabshdr.get_sh_type()));
5857 const char* pnames =
5858 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
5859 strtabshdr.get_sh_size(),
5862 // Loop over the local symbols and mark any local symbols pointing
5863 // to THUMB functions.
5865 // Skip the first dummy symbol.
5867 typename Sized_relobj<32, big_endian>::Local_values* plocal_values =
5868 this->local_values();
5869 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
5871 elfcpp::Sym<32, big_endian> sym(psyms);
5872 elfcpp::STT st_type = sym.get_st_type();
5873 Symbol_value<32>& lv((*plocal_values)[i]);
5874 Arm_address input_value = lv.input_value();
5876 // Check to see if this is a mapping symbol.
5877 const char* sym_name = pnames + sym.get_st_name();
5878 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
5880 unsigned int input_shndx = sym.get_st_shndx();
5882 // Strip of LSB in case this is a THUMB symbol.
5883 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
5884 this->mapping_symbols_info_[msp] = sym_name[1];
5887 if (st_type == elfcpp::STT_ARM_TFUNC
5888 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
5890 // This is a THUMB function. Mark this and canonicalize the
5891 // symbol value by setting LSB.
5892 this->local_symbol_is_thumb_function_[i] = true;
5893 if ((input_value & 1) == 0)
5894 lv.set_input_value(input_value | 1);
5899 // Relocate sections.
5900 template<bool big_endian>
5902 Arm_relobj<big_endian>::do_relocate_sections(
5903 const Symbol_table* symtab,
5904 const Layout* layout,
5905 const unsigned char* pshdrs,
5906 typename Sized_relobj<32, big_endian>::Views* pviews)
5908 // Call parent to relocate sections.
5909 Sized_relobj<32, big_endian>::do_relocate_sections(symtab, layout, pshdrs,
5912 // We do not generate stubs if doing a relocatable link.
5913 if (parameters->options().relocatable())
5916 // Relocate stub tables.
5917 unsigned int shnum = this->shnum();
5919 Target_arm<big_endian>* arm_target =
5920 Target_arm<big_endian>::default_target();
5922 Relocate_info<32, big_endian> relinfo;
5923 relinfo.symtab = symtab;
5924 relinfo.layout = layout;
5925 relinfo.object = this;
5927 for (unsigned int i = 1; i < shnum; ++i)
5929 Arm_input_section<big_endian>* arm_input_section =
5930 arm_target->find_arm_input_section(this, i);
5932 if (arm_input_section != NULL
5933 && arm_input_section->is_stub_table_owner()
5934 && !arm_input_section->stub_table()->empty())
5936 // We cannot discard a section if it owns a stub table.
5937 Output_section* os = this->output_section(i);
5938 gold_assert(os != NULL);
5940 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
5941 relinfo.reloc_shdr = NULL;
5942 relinfo.data_shndx = i;
5943 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
5945 gold_assert((*pviews)[i].view != NULL);
5947 // We are passed the output section view. Adjust it to cover the
5949 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
5950 gold_assert((stub_table->address() >= (*pviews)[i].address)
5951 && ((stub_table->address() + stub_table->data_size())
5952 <= (*pviews)[i].address + (*pviews)[i].view_size));
5954 off_t offset = stub_table->address() - (*pviews)[i].address;
5955 unsigned char* view = (*pviews)[i].view + offset;
5956 Arm_address address = stub_table->address();
5957 section_size_type view_size = stub_table->data_size();
5959 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
5963 // Apply Cortex A8 workaround if applicable.
5964 if (this->section_has_cortex_a8_workaround(i))
5966 unsigned char* view = (*pviews)[i].view;
5967 Arm_address view_address = (*pviews)[i].address;
5968 section_size_type view_size = (*pviews)[i].view_size;
5969 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
5971 // Adjust view to cover section.
5972 Output_section* os = this->output_section(i);
5973 gold_assert(os != NULL);
5974 Arm_address section_address =
5975 this->simple_input_section_output_address(i, os);
5976 uint64_t section_size = this->section_size(i);
5978 gold_assert(section_address >= view_address
5979 && ((section_address + section_size)
5980 <= (view_address + view_size)));
5982 unsigned char* section_view = view + (section_address - view_address);
5984 // Apply the Cortex-A8 workaround to the output address range
5985 // corresponding to this input section.
5986 stub_table->apply_cortex_a8_workaround_to_address_range(
5995 // Find the linked text section of an EXIDX section by looking the the first
5996 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
5997 // must be linked to to its associated code section via the sh_link field of
5998 // its section header. However, some tools are broken and the link is not
5999 // always set. LD just drops such an EXIDX section silently, causing the
6000 // associated code not unwindabled. Here we try a little bit harder to
6001 // discover the linked code section.
6003 // PSHDR points to the section header of a relocation section of an EXIDX
6004 // section. If we can find a linked text section, return true and
6005 // store the text section index in the location PSHNDX. Otherwise
6008 template<bool big_endian>
6010 Arm_relobj<big_endian>::find_linked_text_section(
6011 const unsigned char* pshdr,
6012 const unsigned char* psyms,
6013 unsigned int* pshndx)
6015 elfcpp::Shdr<32, big_endian> shdr(pshdr);
6017 // If there is no relocation, we cannot find the linked text section.
6019 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6020 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6022 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6023 size_t reloc_count = shdr.get_sh_size() / reloc_size;
6025 // Get the relocations.
6026 const unsigned char* prelocs =
6027 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6029 // Find the REL31 relocation for the first word of the first EXIDX entry.
6030 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6032 Arm_address r_offset;
6033 typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6034 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6036 typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6037 r_info = reloc.get_r_info();
6038 r_offset = reloc.get_r_offset();
6042 typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6043 r_info = reloc.get_r_info();
6044 r_offset = reloc.get_r_offset();
6047 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6048 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6051 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6053 || r_sym >= this->local_symbol_count()
6057 // This is the relocation for the first word of the first EXIDX entry.
6058 // We expect to see a local section symbol.
6059 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6060 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6061 if (sym.get_st_type() == elfcpp::STT_SECTION)
6063 *pshndx = this->adjust_shndx(sym.get_st_shndx());
6073 // Make an EXIDX input section object for an EXIDX section whose index is
6074 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6075 // is the section index of the linked text section.
6077 template<bool big_endian>
6079 Arm_relobj<big_endian>::make_exidx_input_section(
6081 const elfcpp::Shdr<32, big_endian>& shdr,
6082 unsigned int text_shndx)
6084 // Issue an error and ignore this EXIDX section if it points to a text
6085 // section already has an EXIDX section.
6086 if (this->exidx_section_map_[text_shndx] != NULL)
6088 gold_error(_("EXIDX sections %u and %u both link to text section %u "
6090 shndx, this->exidx_section_map_[text_shndx]->shndx(),
6091 text_shndx, this->name().c_str());
6095 // Create an Arm_exidx_input_section object for this EXIDX section.
6096 Arm_exidx_input_section* exidx_input_section =
6097 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6098 shdr.get_sh_addralign());
6099 this->exidx_section_map_[text_shndx] = exidx_input_section;
6101 // Also map the EXIDX section index to this.
6102 gold_assert(this->exidx_section_map_[shndx] == NULL);
6103 this->exidx_section_map_[shndx] = exidx_input_section;
6106 // Read the symbol information.
6108 template<bool big_endian>
6110 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6112 // Call parent class to read symbol information.
6113 Sized_relobj<32, big_endian>::do_read_symbols(sd);
6115 // Read processor-specific flags in ELF file header.
6116 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6117 elfcpp::Elf_sizes<32>::ehdr_size,
6119 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6120 this->processor_specific_flags_ = ehdr.get_e_flags();
6122 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6124 std::vector<unsigned int> deferred_exidx_sections;
6125 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6126 const unsigned char* pshdrs = sd->section_headers->data();
6127 const unsigned char *ps = pshdrs + shdr_size;
6128 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6130 elfcpp::Shdr<32, big_endian> shdr(ps);
6131 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6133 gold_assert(this->attributes_section_data_ == NULL);
6134 section_offset_type section_offset = shdr.get_sh_offset();
6135 section_size_type section_size =
6136 convert_to_section_size_type(shdr.get_sh_size());
6137 File_view* view = this->get_lasting_view(section_offset,
6138 section_size, true, false);
6139 this->attributes_section_data_ =
6140 new Attributes_section_data(view->data(), section_size);
6142 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6144 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6145 if (text_shndx >= this->shnum())
6146 gold_error(_("EXIDX section %u linked to invalid section %u"),
6148 else if (text_shndx == elfcpp::SHN_UNDEF)
6149 deferred_exidx_sections.push_back(i);
6151 this->make_exidx_input_section(i, shdr, text_shndx);
6155 // Some tools are broken and they do not set the link of EXIDX sections.
6156 // We look at the first relocation to figure out the linked sections.
6157 if (!deferred_exidx_sections.empty())
6159 // We need to go over the section headers again to find the mapping
6160 // from sections being relocated to their relocation sections. This is
6161 // a bit inefficient as we could do that in the loop above. However,
6162 // we do not expect any deferred EXIDX sections normally. So we do not
6163 // want to slow down the most common path.
6164 typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
6165 Reloc_map reloc_map;
6166 ps = pshdrs + shdr_size;
6167 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6169 elfcpp::Shdr<32, big_endian> shdr(ps);
6170 elfcpp::Elf_Word sh_type = shdr.get_sh_type();
6171 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
6173 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
6174 if (info_shndx >= this->shnum())
6175 gold_error(_("relocation section %u has invalid info %u"),
6177 Reloc_map::value_type value(info_shndx, i);
6178 std::pair<Reloc_map::iterator, bool> result =
6179 reloc_map.insert(value);
6181 gold_error(_("section %u has multiple relocation sections "
6183 info_shndx, i, reloc_map[info_shndx]);
6187 // Read the symbol table section header.
6188 const unsigned int symtab_shndx = this->symtab_shndx();
6189 elfcpp::Shdr<32, big_endian>
6190 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6191 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6193 // Read the local symbols.
6194 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6195 const unsigned int loccount = this->local_symbol_count();
6196 gold_assert(loccount == symtabshdr.get_sh_info());
6197 off_t locsize = loccount * sym_size;
6198 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6199 locsize, true, true);
6201 // Process the deferred EXIDX sections.
6202 for(unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
6204 unsigned int shndx = deferred_exidx_sections[i];
6205 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
6206 unsigned int text_shndx;
6207 Reloc_map::const_iterator it = reloc_map.find(shndx);
6208 if (it != reloc_map.end()
6209 && find_linked_text_section(pshdrs + it->second * shdr_size,
6210 psyms, &text_shndx))
6211 this->make_exidx_input_section(shndx, shdr, text_shndx);
6213 gold_error(_("EXIDX section %u has no linked text section."),
6219 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6220 // sections for unwinding. These sections are referenced implicitly by
6221 // text sections linked in the section headers. If we ignore these implict
6222 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6223 // will be garbage-collected incorrectly. Hence we override the same function
6224 // in the base class to handle these implicit references.
6226 template<bool big_endian>
6228 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6230 Read_relocs_data* rd)
6232 // First, call base class method to process relocations in this object.
6233 Sized_relobj<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6235 unsigned int shnum = this->shnum();
6236 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6237 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6241 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6242 // to these from the linked text sections.
6243 const unsigned char* ps = pshdrs + shdr_size;
6244 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6246 elfcpp::Shdr<32, big_endian> shdr(ps);
6247 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6249 // Found an .ARM.exidx section, add it to the set of reachable
6250 // sections from its linked text section.
6251 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6252 symtab->gc()->add_reference(this, text_shndx, this, i);
6257 // Update output local symbol count. Owing to EXIDX entry merging, some local
6258 // symbols will be removed in output. Adjust output local symbol count
6259 // accordingly. We can only changed the static output local symbol count. It
6260 // is too late to change the dynamic symbols.
6262 template<bool big_endian>
6264 Arm_relobj<big_endian>::update_output_local_symbol_count()
6266 // Caller should check that this needs updating. We want caller checking
6267 // because output_local_symbol_count_needs_update() is most likely inlined.
6268 gold_assert(this->output_local_symbol_count_needs_update_);
6270 gold_assert(this->symtab_shndx() != -1U);
6271 if (this->symtab_shndx() == 0)
6273 // This object has no symbols. Weird but legal.
6277 // Read the symbol table section header.
6278 const unsigned int symtab_shndx = this->symtab_shndx();
6279 elfcpp::Shdr<32, big_endian>
6280 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6281 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6283 // Read the local symbols.
6284 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6285 const unsigned int loccount = this->local_symbol_count();
6286 gold_assert(loccount == symtabshdr.get_sh_info());
6287 off_t locsize = loccount * sym_size;
6288 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6289 locsize, true, true);
6291 // Loop over the local symbols.
6293 typedef typename Sized_relobj<32, big_endian>::Output_sections
6295 const Output_sections& out_sections(this->output_sections());
6296 unsigned int shnum = this->shnum();
6297 unsigned int count = 0;
6298 // Skip the first, dummy, symbol.
6300 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6302 elfcpp::Sym<32, big_endian> sym(psyms);
6304 Symbol_value<32>& lv((*this->local_values())[i]);
6306 // This local symbol was already discarded by do_count_local_symbols.
6307 if (!lv.needs_output_symtab_entry())
6311 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
6316 Output_section* os = out_sections[shndx];
6318 // This local symbol no longer has an output section. Discard it.
6321 lv.set_no_output_symtab_entry();
6325 // Currently we only discard parts of EXIDX input sections.
6326 // We explicitly check for a merged EXIDX input section to avoid
6327 // calling Output_section_data::output_offset unless necessary.
6328 if ((this->get_output_section_offset(shndx) == invalid_address)
6329 && (this->exidx_input_section_by_shndx(shndx) != NULL))
6331 section_offset_type output_offset =
6332 os->output_offset(this, shndx, lv.input_value());
6333 if (output_offset == -1)
6335 // This symbol is defined in a part of an EXIDX input section
6336 // that is discarded due to entry merging.
6337 lv.set_no_output_symtab_entry();
6346 this->set_output_local_symbol_count(count);
6347 this->output_local_symbol_count_needs_update_ = false;
6350 // Arm_dynobj methods.
6352 // Read the symbol information.
6354 template<bool big_endian>
6356 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6358 // Call parent class to read symbol information.
6359 Sized_dynobj<32, big_endian>::do_read_symbols(sd);
6361 // Read processor-specific flags in ELF file header.
6362 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6363 elfcpp::Elf_sizes<32>::ehdr_size,
6365 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6366 this->processor_specific_flags_ = ehdr.get_e_flags();
6368 // Read the attributes section if there is one.
6369 // We read from the end because gas seems to put it near the end of
6370 // the section headers.
6371 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6372 const unsigned char *ps =
6373 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
6374 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
6376 elfcpp::Shdr<32, big_endian> shdr(ps);
6377 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6379 section_offset_type section_offset = shdr.get_sh_offset();
6380 section_size_type section_size =
6381 convert_to_section_size_type(shdr.get_sh_size());
6382 File_view* view = this->get_lasting_view(section_offset,
6383 section_size, true, false);
6384 this->attributes_section_data_ =
6385 new Attributes_section_data(view->data(), section_size);
6391 // Stub_addend_reader methods.
6393 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6395 template<bool big_endian>
6396 elfcpp::Elf_types<32>::Elf_Swxword
6397 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
6398 unsigned int r_type,
6399 const unsigned char* view,
6400 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
6402 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
6406 case elfcpp::R_ARM_CALL:
6407 case elfcpp::R_ARM_JUMP24:
6408 case elfcpp::R_ARM_PLT32:
6410 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
6411 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6412 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
6413 return utils::sign_extend<26>(val << 2);
6416 case elfcpp::R_ARM_THM_CALL:
6417 case elfcpp::R_ARM_THM_JUMP24:
6418 case elfcpp::R_ARM_THM_XPC22:
6420 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6421 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6422 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6423 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6424 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
6427 case elfcpp::R_ARM_THM_JUMP19:
6429 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6430 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6431 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6432 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6433 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
6441 // A class to handle the PLT data.
6443 template<bool big_endian>
6444 class Output_data_plt_arm : public Output_section_data
6447 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
6450 Output_data_plt_arm(Layout*, Output_data_space*);
6452 // Add an entry to the PLT.
6454 add_entry(Symbol* gsym);
6456 // Return the .rel.plt section data.
6457 const Reloc_section*
6459 { return this->rel_; }
6463 do_adjust_output_section(Output_section* os);
6465 // Write to a map file.
6467 do_print_to_mapfile(Mapfile* mapfile) const
6468 { mapfile->print_output_data(this, _("** PLT")); }
6471 // Template for the first PLT entry.
6472 static const uint32_t first_plt_entry[5];
6474 // Template for subsequent PLT entries.
6475 static const uint32_t plt_entry[3];
6477 // Set the final size.
6479 set_final_data_size()
6481 this->set_data_size(sizeof(first_plt_entry)
6482 + this->count_ * sizeof(plt_entry));
6485 // Write out the PLT data.
6487 do_write(Output_file*);
6489 // The reloc section.
6490 Reloc_section* rel_;
6491 // The .got.plt section.
6492 Output_data_space* got_plt_;
6493 // The number of PLT entries.
6494 unsigned int count_;
6497 // Create the PLT section. The ordinary .got section is an argument,
6498 // since we need to refer to the start. We also create our own .got
6499 // section just for PLT entries.
6501 template<bool big_endian>
6502 Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout,
6503 Output_data_space* got_plt)
6504 : Output_section_data(4), got_plt_(got_plt), count_(0)
6506 this->rel_ = new Reloc_section(false);
6507 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
6508 elfcpp::SHF_ALLOC, this->rel_, true, false,
6512 template<bool big_endian>
6514 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
6519 // Add an entry to the PLT.
6521 template<bool big_endian>
6523 Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym)
6525 gold_assert(!gsym->has_plt_offset());
6527 // Note that when setting the PLT offset we skip the initial
6528 // reserved PLT entry.
6529 gsym->set_plt_offset((this->count_) * sizeof(plt_entry)
6530 + sizeof(first_plt_entry));
6534 section_offset_type got_offset = this->got_plt_->current_data_size();
6536 // Every PLT entry needs a GOT entry which points back to the PLT
6537 // entry (this will be changed by the dynamic linker, normally
6538 // lazily when the function is called).
6539 this->got_plt_->set_current_data_size(got_offset + 4);
6541 // Every PLT entry needs a reloc.
6542 gsym->set_needs_dynsym_entry();
6543 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
6546 // Note that we don't need to save the symbol. The contents of the
6547 // PLT are independent of which symbols are used. The symbols only
6548 // appear in the relocations.
6552 // FIXME: This is not very flexible. Right now this has only been tested
6553 // on armv5te. If we are to support additional architecture features like
6554 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
6556 // The first entry in the PLT.
6557 template<bool big_endian>
6558 const uint32_t Output_data_plt_arm<big_endian>::first_plt_entry[5] =
6560 0xe52de004, // str lr, [sp, #-4]!
6561 0xe59fe004, // ldr lr, [pc, #4]
6562 0xe08fe00e, // add lr, pc, lr
6563 0xe5bef008, // ldr pc, [lr, #8]!
6564 0x00000000, // &GOT[0] - .
6567 // Subsequent entries in the PLT.
6569 template<bool big_endian>
6570 const uint32_t Output_data_plt_arm<big_endian>::plt_entry[3] =
6572 0xe28fc600, // add ip, pc, #0xNN00000
6573 0xe28cca00, // add ip, ip, #0xNN000
6574 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
6577 // Write out the PLT. This uses the hand-coded instructions above,
6578 // and adjusts them as needed. This is all specified by the arm ELF
6579 // Processor Supplement.
6581 template<bool big_endian>
6583 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
6585 const off_t offset = this->offset();
6586 const section_size_type oview_size =
6587 convert_to_section_size_type(this->data_size());
6588 unsigned char* const oview = of->get_output_view(offset, oview_size);
6590 const off_t got_file_offset = this->got_plt_->offset();
6591 const section_size_type got_size =
6592 convert_to_section_size_type(this->got_plt_->data_size());
6593 unsigned char* const got_view = of->get_output_view(got_file_offset,
6595 unsigned char* pov = oview;
6597 Arm_address plt_address = this->address();
6598 Arm_address got_address = this->got_plt_->address();
6600 // Write first PLT entry. All but the last word are constants.
6601 const size_t num_first_plt_words = (sizeof(first_plt_entry)
6602 / sizeof(plt_entry[0]));
6603 for (size_t i = 0; i < num_first_plt_words - 1; i++)
6604 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
6605 // Last word in first PLT entry is &GOT[0] - .
6606 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
6607 got_address - (plt_address + 16));
6608 pov += sizeof(first_plt_entry);
6610 unsigned char* got_pov = got_view;
6612 memset(got_pov, 0, 12);
6615 const int rel_size = elfcpp::Elf_sizes<32>::rel_size;
6616 unsigned int plt_offset = sizeof(first_plt_entry);
6617 unsigned int plt_rel_offset = 0;
6618 unsigned int got_offset = 12;
6619 const unsigned int count = this->count_;
6620 for (unsigned int i = 0;
6623 pov += sizeof(plt_entry),
6625 plt_offset += sizeof(plt_entry),
6626 plt_rel_offset += rel_size,
6629 // Set and adjust the PLT entry itself.
6630 int32_t offset = ((got_address + got_offset)
6631 - (plt_address + plt_offset + 8));
6633 gold_assert(offset >= 0 && offset < 0x0fffffff);
6634 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
6635 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
6636 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
6637 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
6638 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
6639 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
6641 // Set the entry in the GOT.
6642 elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address);
6645 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
6646 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
6648 of->write_output_view(offset, oview_size, oview);
6649 of->write_output_view(got_file_offset, got_size, got_view);
6652 // Create a PLT entry for a global symbol.
6654 template<bool big_endian>
6656 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
6659 if (gsym->has_plt_offset())
6662 if (this->plt_ == NULL)
6664 // Create the GOT sections first.
6665 this->got_section(symtab, layout);
6667 this->plt_ = new Output_data_plt_arm<big_endian>(layout, this->got_plt_);
6668 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
6670 | elfcpp::SHF_EXECINSTR),
6671 this->plt_, false, false, false, false);
6673 this->plt_->add_entry(gsym);
6676 // Report an unsupported relocation against a local symbol.
6678 template<bool big_endian>
6680 Target_arm<big_endian>::Scan::unsupported_reloc_local(
6681 Sized_relobj<32, big_endian>* object,
6682 unsigned int r_type)
6684 gold_error(_("%s: unsupported reloc %u against local symbol"),
6685 object->name().c_str(), r_type);
6688 // We are about to emit a dynamic relocation of type R_TYPE. If the
6689 // dynamic linker does not support it, issue an error. The GNU linker
6690 // only issues a non-PIC error for an allocated read-only section.
6691 // Here we know the section is allocated, but we don't know that it is
6692 // read-only. But we check for all the relocation types which the
6693 // glibc dynamic linker supports, so it seems appropriate to issue an
6694 // error even if the section is not read-only.
6696 template<bool big_endian>
6698 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
6699 unsigned int r_type)
6703 // These are the relocation types supported by glibc for ARM.
6704 case elfcpp::R_ARM_RELATIVE:
6705 case elfcpp::R_ARM_COPY:
6706 case elfcpp::R_ARM_GLOB_DAT:
6707 case elfcpp::R_ARM_JUMP_SLOT:
6708 case elfcpp::R_ARM_ABS32:
6709 case elfcpp::R_ARM_ABS32_NOI:
6710 case elfcpp::R_ARM_PC24:
6711 // FIXME: The following 3 types are not supported by Android's dynamic
6713 case elfcpp::R_ARM_TLS_DTPMOD32:
6714 case elfcpp::R_ARM_TLS_DTPOFF32:
6715 case elfcpp::R_ARM_TLS_TPOFF32:
6720 // This prevents us from issuing more than one error per reloc
6721 // section. But we can still wind up issuing more than one
6722 // error per object file.
6723 if (this->issued_non_pic_error_)
6725 const Arm_reloc_property* reloc_property =
6726 arm_reloc_property_table->get_reloc_property(r_type);
6727 gold_assert(reloc_property != NULL);
6728 object->error(_("requires unsupported dynamic reloc %s; "
6729 "recompile with -fPIC"),
6730 reloc_property->name().c_str());
6731 this->issued_non_pic_error_ = true;
6735 case elfcpp::R_ARM_NONE:
6740 // Scan a relocation for a local symbol.
6741 // FIXME: This only handles a subset of relocation types used by Android
6742 // on ARM v5te devices.
6744 template<bool big_endian>
6746 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
6749 Sized_relobj<32, big_endian>* object,
6750 unsigned int data_shndx,
6751 Output_section* output_section,
6752 const elfcpp::Rel<32, big_endian>& reloc,
6753 unsigned int r_type,
6754 const elfcpp::Sym<32, big_endian>& lsym)
6756 r_type = get_real_reloc_type(r_type);
6759 case elfcpp::R_ARM_NONE:
6760 case elfcpp::R_ARM_V4BX:
6761 case elfcpp::R_ARM_GNU_VTENTRY:
6762 case elfcpp::R_ARM_GNU_VTINHERIT:
6765 case elfcpp::R_ARM_ABS32:
6766 case elfcpp::R_ARM_ABS32_NOI:
6767 // If building a shared library (or a position-independent
6768 // executable), we need to create a dynamic relocation for
6769 // this location. The relocation applied at link time will
6770 // apply the link-time value, so we flag the location with
6771 // an R_ARM_RELATIVE relocation so the dynamic loader can
6772 // relocate it easily.
6773 if (parameters->options().output_is_position_independent())
6775 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6776 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6777 // If we are to add more other reloc types than R_ARM_ABS32,
6778 // we need to add check_non_pic(object, r_type) here.
6779 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
6780 output_section, data_shndx,
6781 reloc.get_r_offset());
6785 case elfcpp::R_ARM_ABS16:
6786 case elfcpp::R_ARM_ABS12:
6787 case elfcpp::R_ARM_THM_ABS5:
6788 case elfcpp::R_ARM_ABS8:
6789 case elfcpp::R_ARM_BASE_ABS:
6790 case elfcpp::R_ARM_MOVW_ABS_NC:
6791 case elfcpp::R_ARM_MOVT_ABS:
6792 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6793 case elfcpp::R_ARM_THM_MOVT_ABS:
6794 // If building a shared library (or a position-independent
6795 // executable), we need to create a dynamic relocation for
6796 // this location. Because the addend needs to remain in the
6797 // data section, we need to be careful not to apply this
6798 // relocation statically.
6799 if (parameters->options().output_is_position_independent())
6801 check_non_pic(object, r_type);
6802 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6803 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6804 if (lsym.get_st_type() != elfcpp::STT_SECTION)
6805 rel_dyn->add_local(object, r_sym, r_type, output_section,
6806 data_shndx, reloc.get_r_offset());
6809 gold_assert(lsym.get_st_value() == 0);
6810 unsigned int shndx = lsym.get_st_shndx();
6812 shndx = object->adjust_sym_shndx(r_sym, shndx,
6815 object->error(_("section symbol %u has bad shndx %u"),
6818 rel_dyn->add_local_section(object, shndx,
6819 r_type, output_section,
6820 data_shndx, reloc.get_r_offset());
6825 case elfcpp::R_ARM_PC24:
6826 case elfcpp::R_ARM_REL32:
6827 case elfcpp::R_ARM_LDR_PC_G0:
6828 case elfcpp::R_ARM_SBREL32:
6829 case elfcpp::R_ARM_THM_CALL:
6830 case elfcpp::R_ARM_THM_PC8:
6831 case elfcpp::R_ARM_BASE_PREL:
6832 case elfcpp::R_ARM_PLT32:
6833 case elfcpp::R_ARM_CALL:
6834 case elfcpp::R_ARM_JUMP24:
6835 case elfcpp::R_ARM_THM_JUMP24:
6836 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
6837 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
6838 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
6839 case elfcpp::R_ARM_SBREL31:
6840 case elfcpp::R_ARM_PREL31:
6841 case elfcpp::R_ARM_MOVW_PREL_NC:
6842 case elfcpp::R_ARM_MOVT_PREL:
6843 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
6844 case elfcpp::R_ARM_THM_MOVT_PREL:
6845 case elfcpp::R_ARM_THM_JUMP19:
6846 case elfcpp::R_ARM_THM_JUMP6:
6847 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
6848 case elfcpp::R_ARM_THM_PC12:
6849 case elfcpp::R_ARM_REL32_NOI:
6850 case elfcpp::R_ARM_ALU_PC_G0_NC:
6851 case elfcpp::R_ARM_ALU_PC_G0:
6852 case elfcpp::R_ARM_ALU_PC_G1_NC:
6853 case elfcpp::R_ARM_ALU_PC_G1:
6854 case elfcpp::R_ARM_ALU_PC_G2:
6855 case elfcpp::R_ARM_LDR_PC_G1:
6856 case elfcpp::R_ARM_LDR_PC_G2:
6857 case elfcpp::R_ARM_LDRS_PC_G0:
6858 case elfcpp::R_ARM_LDRS_PC_G1:
6859 case elfcpp::R_ARM_LDRS_PC_G2:
6860 case elfcpp::R_ARM_LDC_PC_G0:
6861 case elfcpp::R_ARM_LDC_PC_G1:
6862 case elfcpp::R_ARM_LDC_PC_G2:
6863 case elfcpp::R_ARM_ALU_SB_G0_NC:
6864 case elfcpp::R_ARM_ALU_SB_G0:
6865 case elfcpp::R_ARM_ALU_SB_G1_NC:
6866 case elfcpp::R_ARM_ALU_SB_G1:
6867 case elfcpp::R_ARM_ALU_SB_G2:
6868 case elfcpp::R_ARM_LDR_SB_G0:
6869 case elfcpp::R_ARM_LDR_SB_G1:
6870 case elfcpp::R_ARM_LDR_SB_G2:
6871 case elfcpp::R_ARM_LDRS_SB_G0:
6872 case elfcpp::R_ARM_LDRS_SB_G1:
6873 case elfcpp::R_ARM_LDRS_SB_G2:
6874 case elfcpp::R_ARM_LDC_SB_G0:
6875 case elfcpp::R_ARM_LDC_SB_G1:
6876 case elfcpp::R_ARM_LDC_SB_G2:
6877 case elfcpp::R_ARM_MOVW_BREL_NC:
6878 case elfcpp::R_ARM_MOVT_BREL:
6879 case elfcpp::R_ARM_MOVW_BREL:
6880 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
6881 case elfcpp::R_ARM_THM_MOVT_BREL:
6882 case elfcpp::R_ARM_THM_MOVW_BREL:
6883 case elfcpp::R_ARM_THM_JUMP11:
6884 case elfcpp::R_ARM_THM_JUMP8:
6885 // We don't need to do anything for a relative addressing relocation
6886 // against a local symbol if it does not reference the GOT.
6889 case elfcpp::R_ARM_GOTOFF32:
6890 case elfcpp::R_ARM_GOTOFF12:
6891 // We need a GOT section:
6892 target->got_section(symtab, layout);
6895 case elfcpp::R_ARM_GOT_BREL:
6896 case elfcpp::R_ARM_GOT_PREL:
6898 // The symbol requires a GOT entry.
6899 Output_data_got<32, big_endian>* got =
6900 target->got_section(symtab, layout);
6901 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6902 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
6904 // If we are generating a shared object, we need to add a
6905 // dynamic RELATIVE relocation for this symbol's GOT entry.
6906 if (parameters->options().output_is_position_independent())
6908 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6909 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6910 rel_dyn->add_local_relative(
6911 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
6912 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
6918 case elfcpp::R_ARM_TARGET1:
6919 case elfcpp::R_ARM_TARGET2:
6920 // This should have been mapped to another type already.
6922 case elfcpp::R_ARM_COPY:
6923 case elfcpp::R_ARM_GLOB_DAT:
6924 case elfcpp::R_ARM_JUMP_SLOT:
6925 case elfcpp::R_ARM_RELATIVE:
6926 // These are relocations which should only be seen by the
6927 // dynamic linker, and should never be seen here.
6928 gold_error(_("%s: unexpected reloc %u in object file"),
6929 object->name().c_str(), r_type);
6933 unsupported_reloc_local(object, r_type);
6938 // Report an unsupported relocation against a global symbol.
6940 template<bool big_endian>
6942 Target_arm<big_endian>::Scan::unsupported_reloc_global(
6943 Sized_relobj<32, big_endian>* object,
6944 unsigned int r_type,
6947 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
6948 object->name().c_str(), r_type, gsym->demangled_name().c_str());
6951 // Scan a relocation for a global symbol.
6953 template<bool big_endian>
6955 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
6958 Sized_relobj<32, big_endian>* object,
6959 unsigned int data_shndx,
6960 Output_section* output_section,
6961 const elfcpp::Rel<32, big_endian>& reloc,
6962 unsigned int r_type,
6965 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
6966 // section. We check here to avoid creating a dynamic reloc against
6967 // _GLOBAL_OFFSET_TABLE_.
6968 if (!target->has_got_section()
6969 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
6970 target->got_section(symtab, layout);
6972 r_type = get_real_reloc_type(r_type);
6975 case elfcpp::R_ARM_NONE:
6976 case elfcpp::R_ARM_V4BX:
6977 case elfcpp::R_ARM_GNU_VTENTRY:
6978 case elfcpp::R_ARM_GNU_VTINHERIT:
6981 case elfcpp::R_ARM_ABS32:
6982 case elfcpp::R_ARM_ABS16:
6983 case elfcpp::R_ARM_ABS12:
6984 case elfcpp::R_ARM_THM_ABS5:
6985 case elfcpp::R_ARM_ABS8:
6986 case elfcpp::R_ARM_BASE_ABS:
6987 case elfcpp::R_ARM_MOVW_ABS_NC:
6988 case elfcpp::R_ARM_MOVT_ABS:
6989 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6990 case elfcpp::R_ARM_THM_MOVT_ABS:
6991 case elfcpp::R_ARM_ABS32_NOI:
6992 // Absolute addressing relocations.
6994 // Make a PLT entry if necessary.
6995 if (this->symbol_needs_plt_entry(gsym))
6997 target->make_plt_entry(symtab, layout, gsym);
6998 // Since this is not a PC-relative relocation, we may be
6999 // taking the address of a function. In that case we need to
7000 // set the entry in the dynamic symbol table to the address of
7002 if (gsym->is_from_dynobj() && !parameters->options().shared())
7003 gsym->set_needs_dynsym_value();
7005 // Make a dynamic relocation if necessary.
7006 if (gsym->needs_dynamic_reloc(Symbol::ABSOLUTE_REF))
7008 if (gsym->may_need_copy_reloc())
7010 target->copy_reloc(symtab, layout, object,
7011 data_shndx, output_section, gsym, reloc);
7013 else if ((r_type == elfcpp::R_ARM_ABS32
7014 || r_type == elfcpp::R_ARM_ABS32_NOI)
7015 && gsym->can_use_relative_reloc(false))
7017 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7018 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
7019 output_section, object,
7020 data_shndx, reloc.get_r_offset());
7024 check_non_pic(object, r_type);
7025 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7026 rel_dyn->add_global(gsym, r_type, output_section, object,
7027 data_shndx, reloc.get_r_offset());
7033 case elfcpp::R_ARM_GOTOFF32:
7034 case elfcpp::R_ARM_GOTOFF12:
7035 // We need a GOT section.
7036 target->got_section(symtab, layout);
7039 case elfcpp::R_ARM_REL32:
7040 case elfcpp::R_ARM_LDR_PC_G0:
7041 case elfcpp::R_ARM_SBREL32:
7042 case elfcpp::R_ARM_THM_PC8:
7043 case elfcpp::R_ARM_BASE_PREL:
7044 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
7045 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
7046 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
7047 case elfcpp::R_ARM_MOVW_PREL_NC:
7048 case elfcpp::R_ARM_MOVT_PREL:
7049 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7050 case elfcpp::R_ARM_THM_MOVT_PREL:
7051 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7052 case elfcpp::R_ARM_THM_PC12:
7053 case elfcpp::R_ARM_REL32_NOI:
7054 case elfcpp::R_ARM_ALU_PC_G0_NC:
7055 case elfcpp::R_ARM_ALU_PC_G0:
7056 case elfcpp::R_ARM_ALU_PC_G1_NC:
7057 case elfcpp::R_ARM_ALU_PC_G1:
7058 case elfcpp::R_ARM_ALU_PC_G2:
7059 case elfcpp::R_ARM_LDR_PC_G1:
7060 case elfcpp::R_ARM_LDR_PC_G2:
7061 case elfcpp::R_ARM_LDRS_PC_G0:
7062 case elfcpp::R_ARM_LDRS_PC_G1:
7063 case elfcpp::R_ARM_LDRS_PC_G2:
7064 case elfcpp::R_ARM_LDC_PC_G0:
7065 case elfcpp::R_ARM_LDC_PC_G1:
7066 case elfcpp::R_ARM_LDC_PC_G2:
7067 case elfcpp::R_ARM_ALU_SB_G0_NC:
7068 case elfcpp::R_ARM_ALU_SB_G0:
7069 case elfcpp::R_ARM_ALU_SB_G1_NC:
7070 case elfcpp::R_ARM_ALU_SB_G1:
7071 case elfcpp::R_ARM_ALU_SB_G2:
7072 case elfcpp::R_ARM_LDR_SB_G0:
7073 case elfcpp::R_ARM_LDR_SB_G1:
7074 case elfcpp::R_ARM_LDR_SB_G2:
7075 case elfcpp::R_ARM_LDRS_SB_G0:
7076 case elfcpp::R_ARM_LDRS_SB_G1:
7077 case elfcpp::R_ARM_LDRS_SB_G2:
7078 case elfcpp::R_ARM_LDC_SB_G0:
7079 case elfcpp::R_ARM_LDC_SB_G1:
7080 case elfcpp::R_ARM_LDC_SB_G2:
7081 case elfcpp::R_ARM_MOVW_BREL_NC:
7082 case elfcpp::R_ARM_MOVT_BREL:
7083 case elfcpp::R_ARM_MOVW_BREL:
7084 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7085 case elfcpp::R_ARM_THM_MOVT_BREL:
7086 case elfcpp::R_ARM_THM_MOVW_BREL:
7087 // Relative addressing relocations.
7089 // Make a dynamic relocation if necessary.
7090 int flags = Symbol::NON_PIC_REF;
7091 if (gsym->needs_dynamic_reloc(flags))
7093 if (target->may_need_copy_reloc(gsym))
7095 target->copy_reloc(symtab, layout, object,
7096 data_shndx, output_section, gsym, reloc);
7100 check_non_pic(object, r_type);
7101 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7102 rel_dyn->add_global(gsym, r_type, output_section, object,
7103 data_shndx, reloc.get_r_offset());
7109 case elfcpp::R_ARM_PC24:
7110 case elfcpp::R_ARM_THM_CALL:
7111 case elfcpp::R_ARM_PLT32:
7112 case elfcpp::R_ARM_CALL:
7113 case elfcpp::R_ARM_JUMP24:
7114 case elfcpp::R_ARM_THM_JUMP24:
7115 case elfcpp::R_ARM_SBREL31:
7116 case elfcpp::R_ARM_PREL31:
7117 case elfcpp::R_ARM_THM_JUMP19:
7118 case elfcpp::R_ARM_THM_JUMP6:
7119 case elfcpp::R_ARM_THM_JUMP11:
7120 case elfcpp::R_ARM_THM_JUMP8:
7121 // All the relocation above are branches except for the PREL31 ones.
7122 // A PREL31 relocation can point to a personality function in a shared
7123 // library. In that case we want to use a PLT because we want to
7124 // call the personality routine and the dyanmic linkers we care about
7125 // do not support dynamic PREL31 relocations. An REL31 relocation may
7126 // point to a function whose unwinding behaviour is being described but
7127 // we will not mistakenly generate a PLT for that because we should use
7128 // a local section symbol.
7130 // If the symbol is fully resolved, this is just a relative
7131 // local reloc. Otherwise we need a PLT entry.
7132 if (gsym->final_value_is_known())
7134 // If building a shared library, we can also skip the PLT entry
7135 // if the symbol is defined in the output file and is protected
7137 if (gsym->is_defined()
7138 && !gsym->is_from_dynobj()
7139 && !gsym->is_preemptible())
7141 target->make_plt_entry(symtab, layout, gsym);
7144 case elfcpp::R_ARM_GOT_BREL:
7145 case elfcpp::R_ARM_GOT_ABS:
7146 case elfcpp::R_ARM_GOT_PREL:
7148 // The symbol requires a GOT entry.
7149 Output_data_got<32, big_endian>* got =
7150 target->got_section(symtab, layout);
7151 if (gsym->final_value_is_known())
7152 got->add_global(gsym, GOT_TYPE_STANDARD);
7155 // If this symbol is not fully resolved, we need to add a
7156 // GOT entry with a dynamic relocation.
7157 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7158 if (gsym->is_from_dynobj()
7159 || gsym->is_undefined()
7160 || gsym->is_preemptible())
7161 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
7162 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
7165 if (got->add_global(gsym, GOT_TYPE_STANDARD))
7166 rel_dyn->add_global_relative(
7167 gsym, elfcpp::R_ARM_RELATIVE, got,
7168 gsym->got_offset(GOT_TYPE_STANDARD));
7174 case elfcpp::R_ARM_TARGET1:
7175 case elfcpp::R_ARM_TARGET2:
7176 // These should have been mapped to other types already.
7178 case elfcpp::R_ARM_COPY:
7179 case elfcpp::R_ARM_GLOB_DAT:
7180 case elfcpp::R_ARM_JUMP_SLOT:
7181 case elfcpp::R_ARM_RELATIVE:
7182 // These are relocations which should only be seen by the
7183 // dynamic linker, and should never be seen here.
7184 gold_error(_("%s: unexpected reloc %u in object file"),
7185 object->name().c_str(), r_type);
7189 unsupported_reloc_global(object, r_type, gsym);
7194 // Process relocations for gc.
7196 template<bool big_endian>
7198 Target_arm<big_endian>::gc_process_relocs(Symbol_table* symtab,
7200 Sized_relobj<32, big_endian>* object,
7201 unsigned int data_shndx,
7203 const unsigned char* prelocs,
7205 Output_section* output_section,
7206 bool needs_special_offset_handling,
7207 size_t local_symbol_count,
7208 const unsigned char* plocal_symbols)
7210 typedef Target_arm<big_endian> Arm;
7211 typedef typename Target_arm<big_endian>::Scan Scan;
7213 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan>(
7222 needs_special_offset_handling,
7227 // Scan relocations for a section.
7229 template<bool big_endian>
7231 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
7233 Sized_relobj<32, big_endian>* object,
7234 unsigned int data_shndx,
7235 unsigned int sh_type,
7236 const unsigned char* prelocs,
7238 Output_section* output_section,
7239 bool needs_special_offset_handling,
7240 size_t local_symbol_count,
7241 const unsigned char* plocal_symbols)
7243 typedef typename Target_arm<big_endian>::Scan Scan;
7244 if (sh_type == elfcpp::SHT_RELA)
7246 gold_error(_("%s: unsupported RELA reloc section"),
7247 object->name().c_str());
7251 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
7260 needs_special_offset_handling,
7265 // Finalize the sections.
7267 template<bool big_endian>
7269 Target_arm<big_endian>::do_finalize_sections(
7271 const Input_objects* input_objects,
7272 Symbol_table* symtab)
7274 // Merge processor-specific flags.
7275 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
7276 p != input_objects->relobj_end();
7279 Arm_relobj<big_endian>* arm_relobj =
7280 Arm_relobj<big_endian>::as_arm_relobj(*p);
7281 this->merge_processor_specific_flags(
7283 arm_relobj->processor_specific_flags());
7284 this->merge_object_attributes(arm_relobj->name().c_str(),
7285 arm_relobj->attributes_section_data());
7289 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
7290 p != input_objects->dynobj_end();
7293 Arm_dynobj<big_endian>* arm_dynobj =
7294 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
7295 this->merge_processor_specific_flags(
7297 arm_dynobj->processor_specific_flags());
7298 this->merge_object_attributes(arm_dynobj->name().c_str(),
7299 arm_dynobj->attributes_section_data());
7303 const Object_attribute* cpu_arch_attr =
7304 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
7305 if (cpu_arch_attr->int_value() > elfcpp::TAG_CPU_ARCH_V4)
7306 this->set_may_use_blx(true);
7308 // Check if we need to use Cortex-A8 workaround.
7309 if (parameters->options().user_set_fix_cortex_a8())
7310 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
7313 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
7314 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
7316 const Object_attribute* cpu_arch_profile_attr =
7317 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
7318 this->fix_cortex_a8_ =
7319 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
7320 && (cpu_arch_profile_attr->int_value() == 'A'
7321 || cpu_arch_profile_attr->int_value() == 0));
7324 // Check if we can use V4BX interworking.
7325 // The V4BX interworking stub contains BX instruction,
7326 // which is not specified for some profiles.
7327 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
7328 && !this->may_use_blx())
7329 gold_error(_("unable to provide V4BX reloc interworking fix up; "
7330 "the target profile does not support BX instruction"));
7332 // Fill in some more dynamic tags.
7333 const Reloc_section* rel_plt = (this->plt_ == NULL
7335 : this->plt_->rel_plt());
7336 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
7337 this->rel_dyn_, true, false);
7339 // Emit any relocs we saved in an attempt to avoid generating COPY
7341 if (this->copy_relocs_.any_saved_relocs())
7342 this->copy_relocs_.emit(this->rel_dyn_section(layout));
7344 // Handle the .ARM.exidx section.
7345 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
7346 if (exidx_section != NULL
7347 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX
7348 && !parameters->options().relocatable())
7350 // Create __exidx_start and __exdix_end symbols.
7351 symtab->define_in_output_data("__exidx_start", NULL,
7352 Symbol_table::PREDEFINED,
7353 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7354 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7356 symtab->define_in_output_data("__exidx_end", NULL,
7357 Symbol_table::PREDEFINED,
7358 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7359 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7362 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
7363 // the .ARM.exidx section.
7364 if (!layout->script_options()->saw_phdrs_clause())
7366 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, 0)
7368 Output_segment* exidx_segment =
7369 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
7370 exidx_segment->add_output_section(exidx_section, elfcpp::PF_R,
7375 // Create an .ARM.attributes section if there is not one already.
7376 Output_attributes_section_data* attributes_section =
7377 new Output_attributes_section_data(*this->attributes_section_data_);
7378 layout->add_output_section_data(".ARM.attributes",
7379 elfcpp::SHT_ARM_ATTRIBUTES, 0,
7380 attributes_section, false, false, false,
7384 // Return whether a direct absolute static relocation needs to be applied.
7385 // In cases where Scan::local() or Scan::global() has created
7386 // a dynamic relocation other than R_ARM_RELATIVE, the addend
7387 // of the relocation is carried in the data, and we must not
7388 // apply the static relocation.
7390 template<bool big_endian>
7392 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
7393 const Sized_symbol<32>* gsym,
7396 Output_section* output_section)
7398 // If the output section is not allocated, then we didn't call
7399 // scan_relocs, we didn't create a dynamic reloc, and we must apply
7401 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
7404 // For local symbols, we will have created a non-RELATIVE dynamic
7405 // relocation only if (a) the output is position independent,
7406 // (b) the relocation is absolute (not pc- or segment-relative), and
7407 // (c) the relocation is not 32 bits wide.
7409 return !(parameters->options().output_is_position_independent()
7410 && (ref_flags & Symbol::ABSOLUTE_REF)
7413 // For global symbols, we use the same helper routines used in the
7414 // scan pass. If we did not create a dynamic relocation, or if we
7415 // created a RELATIVE dynamic relocation, we should apply the static
7417 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
7418 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
7419 && gsym->can_use_relative_reloc(ref_flags
7420 & Symbol::FUNCTION_CALL);
7421 return !has_dyn || is_rel;
7424 // Perform a relocation.
7426 template<bool big_endian>
7428 Target_arm<big_endian>::Relocate::relocate(
7429 const Relocate_info<32, big_endian>* relinfo,
7431 Output_section *output_section,
7433 const elfcpp::Rel<32, big_endian>& rel,
7434 unsigned int r_type,
7435 const Sized_symbol<32>* gsym,
7436 const Symbol_value<32>* psymval,
7437 unsigned char* view,
7438 Arm_address address,
7439 section_size_type /* view_size */ )
7441 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
7443 r_type = get_real_reloc_type(r_type);
7444 const Arm_reloc_property* reloc_property =
7445 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
7446 if (reloc_property == NULL)
7448 std::string reloc_name =
7449 arm_reloc_property_table->reloc_name_in_error_message(r_type);
7450 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7451 _("cannot relocate %s in object file"),
7452 reloc_name.c_str());
7456 const Arm_relobj<big_endian>* object =
7457 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
7459 // If the final branch target of a relocation is THUMB instruction, this
7460 // is 1. Otherwise it is 0.
7461 Arm_address thumb_bit = 0;
7462 Symbol_value<32> symval;
7463 bool is_weakly_undefined_without_plt = false;
7464 if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
7468 // This is a global symbol. Determine if we use PLT and if the
7469 // final target is THUMB.
7470 if (gsym->use_plt_offset(reloc_is_non_pic(r_type)))
7472 // This uses a PLT, change the symbol value.
7473 symval.set_output_value(target->plt_section()->address()
7474 + gsym->plt_offset());
7477 else if (gsym->is_weak_undefined())
7479 // This is a weakly undefined symbol and we do not use PLT
7480 // for this relocation. A branch targeting this symbol will
7481 // be converted into an NOP.
7482 is_weakly_undefined_without_plt = true;
7486 // Set thumb bit if symbol:
7487 // -Has type STT_ARM_TFUNC or
7488 // -Has type STT_FUNC, is defined and with LSB in value set.
7490 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
7491 || (gsym->type() == elfcpp::STT_FUNC
7492 && !gsym->is_undefined()
7493 && ((psymval->value(object, 0) & 1) != 0)))
7500 // This is a local symbol. Determine if the final target is THUMB.
7501 // We saved this information when all the local symbols were read.
7502 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
7503 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
7504 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
7509 // This is a fake relocation synthesized for a stub. It does not have
7510 // a real symbol. We just look at the LSB of the symbol value to
7511 // determine if the target is THUMB or not.
7512 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
7515 // Strip LSB if this points to a THUMB target.
7517 && reloc_property->uses_thumb_bit()
7518 && ((psymval->value(object, 0) & 1) != 0))
7520 Arm_address stripped_value =
7521 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
7522 symval.set_output_value(stripped_value);
7526 // Get the GOT offset if needed.
7527 // The GOT pointer points to the end of the GOT section.
7528 // We need to subtract the size of the GOT section to get
7529 // the actual offset to use in the relocation.
7530 bool have_got_offset = false;
7531 unsigned int got_offset = 0;
7534 case elfcpp::R_ARM_GOT_BREL:
7535 case elfcpp::R_ARM_GOT_PREL:
7538 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
7539 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
7540 - target->got_size());
7544 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7545 gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_STANDARD));
7546 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
7547 - target->got_size());
7549 have_got_offset = true;
7556 // To look up relocation stubs, we need to pass the symbol table index of
7558 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7560 // Get the addressing origin of the output segment defining the
7561 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
7562 Arm_address sym_origin = 0;
7563 if (reloc_property->uses_symbol_base())
7565 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
7566 // R_ARM_BASE_ABS with the NULL symbol will give the
7567 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
7568 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
7569 sym_origin = target->got_plt_section()->address();
7570 else if (gsym == NULL)
7572 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
7573 sym_origin = gsym->output_segment()->vaddr();
7574 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
7575 sym_origin = gsym->output_data()->address();
7577 // TODO: Assumes the segment base to be zero for the global symbols
7578 // till the proper support for the segment-base-relative addressing
7579 // will be implemented. This is consistent with GNU ld.
7582 // For relative addressing relocation, find out the relative address base.
7583 Arm_address relative_address_base = 0;
7584 switch(reloc_property->relative_address_base())
7586 case Arm_reloc_property::RAB_NONE:
7588 case Arm_reloc_property::RAB_B_S:
7589 relative_address_base = sym_origin;
7591 case Arm_reloc_property::RAB_GOT_ORG:
7592 relative_address_base = target->got_plt_section()->address();
7594 case Arm_reloc_property::RAB_P:
7595 relative_address_base = address;
7597 case Arm_reloc_property::RAB_Pa:
7598 relative_address_base = address & 0xfffffffcU;
7604 typename Arm_relocate_functions::Status reloc_status =
7605 Arm_relocate_functions::STATUS_OKAY;
7606 bool check_overflow = reloc_property->checks_overflow();
7609 case elfcpp::R_ARM_NONE:
7612 case elfcpp::R_ARM_ABS8:
7613 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7615 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
7618 case elfcpp::R_ARM_ABS12:
7619 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7621 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
7624 case elfcpp::R_ARM_ABS16:
7625 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7627 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
7630 case elfcpp::R_ARM_ABS32:
7631 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7633 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7637 case elfcpp::R_ARM_ABS32_NOI:
7638 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7640 // No thumb bit for this relocation: (S + A)
7641 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7645 case elfcpp::R_ARM_MOVW_ABS_NC:
7646 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7648 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
7653 case elfcpp::R_ARM_MOVT_ABS:
7654 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7656 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
7659 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7660 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7662 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
7663 0, thumb_bit, false);
7666 case elfcpp::R_ARM_THM_MOVT_ABS:
7667 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7669 reloc_status = Arm_relocate_functions::thm_movt(view, object,
7673 case elfcpp::R_ARM_MOVW_PREL_NC:
7674 case elfcpp::R_ARM_MOVW_BREL_NC:
7675 case elfcpp::R_ARM_MOVW_BREL:
7677 Arm_relocate_functions::movw(view, object, psymval,
7678 relative_address_base, thumb_bit,
7682 case elfcpp::R_ARM_MOVT_PREL:
7683 case elfcpp::R_ARM_MOVT_BREL:
7685 Arm_relocate_functions::movt(view, object, psymval,
7686 relative_address_base);
7689 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7690 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7691 case elfcpp::R_ARM_THM_MOVW_BREL:
7693 Arm_relocate_functions::thm_movw(view, object, psymval,
7694 relative_address_base,
7695 thumb_bit, check_overflow);
7698 case elfcpp::R_ARM_THM_MOVT_PREL:
7699 case elfcpp::R_ARM_THM_MOVT_BREL:
7701 Arm_relocate_functions::thm_movt(view, object, psymval,
7702 relative_address_base);
7705 case elfcpp::R_ARM_REL32:
7706 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7707 address, thumb_bit);
7710 case elfcpp::R_ARM_THM_ABS5:
7711 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7713 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
7716 // Thumb long branches.
7717 case elfcpp::R_ARM_THM_CALL:
7718 case elfcpp::R_ARM_THM_XPC22:
7719 case elfcpp::R_ARM_THM_JUMP24:
7721 Arm_relocate_functions::thumb_branch_common(
7722 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7723 thumb_bit, is_weakly_undefined_without_plt);
7726 case elfcpp::R_ARM_GOTOFF32:
7728 Arm_address got_origin;
7729 got_origin = target->got_plt_section()->address();
7730 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7731 got_origin, thumb_bit);
7735 case elfcpp::R_ARM_BASE_PREL:
7736 gold_assert(gsym != NULL);
7738 Arm_relocate_functions::base_prel(view, sym_origin, address);
7741 case elfcpp::R_ARM_BASE_ABS:
7743 if (!should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7747 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
7751 case elfcpp::R_ARM_GOT_BREL:
7752 gold_assert(have_got_offset);
7753 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
7756 case elfcpp::R_ARM_GOT_PREL:
7757 gold_assert(have_got_offset);
7758 // Get the address origin for GOT PLT, which is allocated right
7759 // after the GOT section, to calculate an absolute address of
7760 // the symbol GOT entry (got_origin + got_offset).
7761 Arm_address got_origin;
7762 got_origin = target->got_plt_section()->address();
7763 reloc_status = Arm_relocate_functions::got_prel(view,
7764 got_origin + got_offset,
7768 case elfcpp::R_ARM_PLT32:
7769 case elfcpp::R_ARM_CALL:
7770 case elfcpp::R_ARM_JUMP24:
7771 case elfcpp::R_ARM_XPC25:
7772 gold_assert(gsym == NULL
7773 || gsym->has_plt_offset()
7774 || gsym->final_value_is_known()
7775 || (gsym->is_defined()
7776 && !gsym->is_from_dynobj()
7777 && !gsym->is_preemptible()));
7779 Arm_relocate_functions::arm_branch_common(
7780 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7781 thumb_bit, is_weakly_undefined_without_plt);
7784 case elfcpp::R_ARM_THM_JUMP19:
7786 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
7790 case elfcpp::R_ARM_THM_JUMP6:
7792 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
7795 case elfcpp::R_ARM_THM_JUMP8:
7797 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
7800 case elfcpp::R_ARM_THM_JUMP11:
7802 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
7805 case elfcpp::R_ARM_PREL31:
7806 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
7807 address, thumb_bit);
7810 case elfcpp::R_ARM_V4BX:
7811 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
7813 const bool is_v4bx_interworking =
7814 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
7816 Arm_relocate_functions::v4bx(relinfo, view, object, address,
7817 is_v4bx_interworking);
7821 case elfcpp::R_ARM_THM_PC8:
7823 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
7826 case elfcpp::R_ARM_THM_PC12:
7828 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
7831 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7833 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
7837 case elfcpp::R_ARM_ALU_PC_G0_NC:
7838 case elfcpp::R_ARM_ALU_PC_G0:
7839 case elfcpp::R_ARM_ALU_PC_G1_NC:
7840 case elfcpp::R_ARM_ALU_PC_G1:
7841 case elfcpp::R_ARM_ALU_PC_G2:
7842 case elfcpp::R_ARM_ALU_SB_G0_NC:
7843 case elfcpp::R_ARM_ALU_SB_G0:
7844 case elfcpp::R_ARM_ALU_SB_G1_NC:
7845 case elfcpp::R_ARM_ALU_SB_G1:
7846 case elfcpp::R_ARM_ALU_SB_G2:
7848 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
7849 reloc_property->group_index(),
7850 relative_address_base,
7851 thumb_bit, check_overflow);
7854 case elfcpp::R_ARM_LDR_PC_G0:
7855 case elfcpp::R_ARM_LDR_PC_G1:
7856 case elfcpp::R_ARM_LDR_PC_G2:
7857 case elfcpp::R_ARM_LDR_SB_G0:
7858 case elfcpp::R_ARM_LDR_SB_G1:
7859 case elfcpp::R_ARM_LDR_SB_G2:
7861 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
7862 reloc_property->group_index(),
7863 relative_address_base);
7866 case elfcpp::R_ARM_LDRS_PC_G0:
7867 case elfcpp::R_ARM_LDRS_PC_G1:
7868 case elfcpp::R_ARM_LDRS_PC_G2:
7869 case elfcpp::R_ARM_LDRS_SB_G0:
7870 case elfcpp::R_ARM_LDRS_SB_G1:
7871 case elfcpp::R_ARM_LDRS_SB_G2:
7873 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
7874 reloc_property->group_index(),
7875 relative_address_base);
7878 case elfcpp::R_ARM_LDC_PC_G0:
7879 case elfcpp::R_ARM_LDC_PC_G1:
7880 case elfcpp::R_ARM_LDC_PC_G2:
7881 case elfcpp::R_ARM_LDC_SB_G0:
7882 case elfcpp::R_ARM_LDC_SB_G1:
7883 case elfcpp::R_ARM_LDC_SB_G2:
7885 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
7886 reloc_property->group_index(),
7887 relative_address_base);
7894 // Report any errors.
7895 switch (reloc_status)
7897 case Arm_relocate_functions::STATUS_OKAY:
7899 case Arm_relocate_functions::STATUS_OVERFLOW:
7900 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7901 _("relocation overflow in relocation %u"),
7904 case Arm_relocate_functions::STATUS_BAD_RELOC:
7905 gold_error_at_location(
7909 _("unexpected opcode while processing relocation %u"),
7919 // Relocate section data.
7921 template<bool big_endian>
7923 Target_arm<big_endian>::relocate_section(
7924 const Relocate_info<32, big_endian>* relinfo,
7925 unsigned int sh_type,
7926 const unsigned char* prelocs,
7928 Output_section* output_section,
7929 bool needs_special_offset_handling,
7930 unsigned char* view,
7931 Arm_address address,
7932 section_size_type view_size,
7933 const Reloc_symbol_changes* reloc_symbol_changes)
7935 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
7936 gold_assert(sh_type == elfcpp::SHT_REL);
7938 // See if we are relocating a relaxed input section. If so, the view
7939 // covers the whole output section and we need to adjust accordingly.
7940 if (needs_special_offset_handling)
7942 const Output_relaxed_input_section* poris =
7943 output_section->find_relaxed_input_section(relinfo->object,
7944 relinfo->data_shndx);
7947 Arm_address section_address = poris->address();
7948 section_size_type section_size = poris->data_size();
7950 gold_assert((section_address >= address)
7951 && ((section_address + section_size)
7952 <= (address + view_size)));
7954 off_t offset = section_address - address;
7957 view_size = section_size;
7961 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
7968 needs_special_offset_handling,
7972 reloc_symbol_changes);
7975 // Return the size of a relocation while scanning during a relocatable
7978 template<bool big_endian>
7980 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
7981 unsigned int r_type,
7984 r_type = get_real_reloc_type(r_type);
7985 const Arm_reloc_property* arp =
7986 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
7991 std::string reloc_name =
7992 arm_reloc_property_table->reloc_name_in_error_message(r_type);
7993 gold_error(_("%s: unexpected %s in object file"),
7994 object->name().c_str(), reloc_name.c_str());
7999 // Scan the relocs during a relocatable link.
8001 template<bool big_endian>
8003 Target_arm<big_endian>::scan_relocatable_relocs(
8004 Symbol_table* symtab,
8006 Sized_relobj<32, big_endian>* object,
8007 unsigned int data_shndx,
8008 unsigned int sh_type,
8009 const unsigned char* prelocs,
8011 Output_section* output_section,
8012 bool needs_special_offset_handling,
8013 size_t local_symbol_count,
8014 const unsigned char* plocal_symbols,
8015 Relocatable_relocs* rr)
8017 gold_assert(sh_type == elfcpp::SHT_REL);
8019 typedef gold::Default_scan_relocatable_relocs<elfcpp::SHT_REL,
8020 Relocatable_size_for_reloc> Scan_relocatable_relocs;
8022 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
8023 Scan_relocatable_relocs>(
8031 needs_special_offset_handling,
8037 // Relocate a section during a relocatable link.
8039 template<bool big_endian>
8041 Target_arm<big_endian>::relocate_for_relocatable(
8042 const Relocate_info<32, big_endian>* relinfo,
8043 unsigned int sh_type,
8044 const unsigned char* prelocs,
8046 Output_section* output_section,
8047 off_t offset_in_output_section,
8048 const Relocatable_relocs* rr,
8049 unsigned char* view,
8050 Arm_address view_address,
8051 section_size_type view_size,
8052 unsigned char* reloc_view,
8053 section_size_type reloc_view_size)
8055 gold_assert(sh_type == elfcpp::SHT_REL);
8057 gold::relocate_for_relocatable<32, big_endian, elfcpp::SHT_REL>(
8062 offset_in_output_section,
8071 // Return the value to use for a dynamic symbol which requires special
8072 // treatment. This is how we support equality comparisons of function
8073 // pointers across shared library boundaries, as described in the
8074 // processor specific ABI supplement.
8076 template<bool big_endian>
8078 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
8080 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
8081 return this->plt_section()->address() + gsym->plt_offset();
8084 // Map platform-specific relocs to real relocs
8086 template<bool big_endian>
8088 Target_arm<big_endian>::get_real_reloc_type (unsigned int r_type)
8092 case elfcpp::R_ARM_TARGET1:
8093 // This is either R_ARM_ABS32 or R_ARM_REL32;
8094 return elfcpp::R_ARM_ABS32;
8096 case elfcpp::R_ARM_TARGET2:
8097 // This can be any reloc type but ususally is R_ARM_GOT_PREL
8098 return elfcpp::R_ARM_GOT_PREL;
8105 // Whether if two EABI versions V1 and V2 are compatible.
8107 template<bool big_endian>
8109 Target_arm<big_endian>::are_eabi_versions_compatible(
8110 elfcpp::Elf_Word v1,
8111 elfcpp::Elf_Word v2)
8113 // v4 and v5 are the same spec before and after it was released,
8114 // so allow mixing them.
8115 if ((v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
8116 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
8122 // Combine FLAGS from an input object called NAME and the processor-specific
8123 // flags in the ELF header of the output. Much of this is adapted from the
8124 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
8125 // in bfd/elf32-arm.c.
8127 template<bool big_endian>
8129 Target_arm<big_endian>::merge_processor_specific_flags(
8130 const std::string& name,
8131 elfcpp::Elf_Word flags)
8133 if (this->are_processor_specific_flags_set())
8135 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
8137 // Nothing to merge if flags equal to those in output.
8138 if (flags == out_flags)
8141 // Complain about various flag mismatches.
8142 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
8143 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
8144 if (!this->are_eabi_versions_compatible(version1, version2))
8145 gold_error(_("Source object %s has EABI version %d but output has "
8146 "EABI version %d."),
8148 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
8149 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
8153 // If the input is the default architecture and had the default
8154 // flags then do not bother setting the flags for the output
8155 // architecture, instead allow future merges to do this. If no
8156 // future merges ever set these flags then they will retain their
8157 // uninitialised values, which surprise surprise, correspond
8158 // to the default values.
8162 // This is the first time, just copy the flags.
8163 // We only copy the EABI version for now.
8164 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
8168 // Adjust ELF file header.
8169 template<bool big_endian>
8171 Target_arm<big_endian>::do_adjust_elf_header(
8172 unsigned char* view,
8175 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
8177 elfcpp::Ehdr<32, big_endian> ehdr(view);
8178 unsigned char e_ident[elfcpp::EI_NIDENT];
8179 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
8181 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
8182 == elfcpp::EF_ARM_EABI_UNKNOWN)
8183 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
8185 e_ident[elfcpp::EI_OSABI] = 0;
8186 e_ident[elfcpp::EI_ABIVERSION] = 0;
8188 // FIXME: Do EF_ARM_BE8 adjustment.
8190 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
8191 oehdr.put_e_ident(e_ident);
8194 // do_make_elf_object to override the same function in the base class.
8195 // We need to use a target-specific sub-class of Sized_relobj<32, big_endian>
8196 // to store ARM specific information. Hence we need to have our own
8197 // ELF object creation.
8199 template<bool big_endian>
8201 Target_arm<big_endian>::do_make_elf_object(
8202 const std::string& name,
8203 Input_file* input_file,
8204 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
8206 int et = ehdr.get_e_type();
8207 if (et == elfcpp::ET_REL)
8209 Arm_relobj<big_endian>* obj =
8210 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
8214 else if (et == elfcpp::ET_DYN)
8216 Sized_dynobj<32, big_endian>* obj =
8217 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
8223 gold_error(_("%s: unsupported ELF file type %d"),
8229 // Read the architecture from the Tag_also_compatible_with attribute, if any.
8230 // Returns -1 if no architecture could be read.
8231 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
8233 template<bool big_endian>
8235 Target_arm<big_endian>::get_secondary_compatible_arch(
8236 const Attributes_section_data* pasd)
8238 const Object_attribute *known_attributes =
8239 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
8241 // Note: the tag and its argument below are uleb128 values, though
8242 // currently-defined values fit in one byte for each.
8243 const std::string& sv =
8244 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
8246 && sv.data()[0] == elfcpp::Tag_CPU_arch
8247 && (sv.data()[1] & 128) != 128)
8248 return sv.data()[1];
8250 // This tag is "safely ignorable", so don't complain if it looks funny.
8254 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8255 // The tag is removed if ARCH is -1.
8256 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
8258 template<bool big_endian>
8260 Target_arm<big_endian>::set_secondary_compatible_arch(
8261 Attributes_section_data* pasd,
8264 Object_attribute *known_attributes =
8265 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
8269 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
8273 // Note: the tag and its argument below are uleb128 values, though
8274 // currently-defined values fit in one byte for each.
8276 sv[0] = elfcpp::Tag_CPU_arch;
8277 gold_assert(arch != 0);
8281 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
8284 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8286 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
8288 template<bool big_endian>
8290 Target_arm<big_endian>::tag_cpu_arch_combine(
8293 int* secondary_compat_out,
8295 int secondary_compat)
8297 #define T(X) elfcpp::TAG_CPU_ARCH_##X
8298 static const int v6t2[] =
8310 static const int v6k[] =
8323 static const int v7[] =
8337 static const int v6_m[] =
8352 static const int v6s_m[] =
8368 static const int v7e_m[] =
8385 static const int v4t_plus_v6_m[] =
8401 T(V4T_PLUS_V6_M) // V4T plus V6_M.
8403 static const int *comb[] =
8411 // Pseudo-architecture.
8415 // Check we've not got a higher architecture than we know about.
8417 if (oldtag >= elfcpp::MAX_TAG_CPU_ARCH || newtag >= elfcpp::MAX_TAG_CPU_ARCH)
8419 gold_error(_("%s: unknown CPU architecture"), name);
8423 // Override old tag if we have a Tag_also_compatible_with on the output.
8425 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
8426 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
8427 oldtag = T(V4T_PLUS_V6_M);
8429 // And override the new tag if we have a Tag_also_compatible_with on the
8432 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
8433 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
8434 newtag = T(V4T_PLUS_V6_M);
8436 // Architectures before V6KZ add features monotonically.
8437 int tagh = std::max(oldtag, newtag);
8438 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
8441 int tagl = std::min(oldtag, newtag);
8442 int result = comb[tagh - T(V6T2)][tagl];
8444 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8445 // as the canonical version.
8446 if (result == T(V4T_PLUS_V6_M))
8449 *secondary_compat_out = T(V6_M);
8452 *secondary_compat_out = -1;
8456 gold_error(_("%s: conflicting CPU architectures %d/%d"),
8457 name, oldtag, newtag);
8465 // Helper to print AEABI enum tag value.
8467 template<bool big_endian>
8469 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
8471 static const char *aeabi_enum_names[] =
8472 { "", "variable-size", "32-bit", "" };
8473 const size_t aeabi_enum_names_size =
8474 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
8476 if (value < aeabi_enum_names_size)
8477 return std::string(aeabi_enum_names[value]);
8481 sprintf(buffer, "<unknown value %u>", value);
8482 return std::string(buffer);
8486 // Return the string value to store in TAG_CPU_name.
8488 template<bool big_endian>
8490 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
8492 static const char *name_table[] = {
8493 // These aren't real CPU names, but we can't guess
8494 // that from the architecture version alone.
8510 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
8512 if (value < name_table_size)
8513 return std::string(name_table[value]);
8517 sprintf(buffer, "<unknown CPU value %u>", value);
8518 return std::string(buffer);
8522 // Merge object attributes from input file called NAME with those of the
8523 // output. The input object attributes are in the object pointed by PASD.
8525 template<bool big_endian>
8527 Target_arm<big_endian>::merge_object_attributes(
8529 const Attributes_section_data* pasd)
8531 // Return if there is no attributes section data.
8535 // If output has no object attributes, just copy.
8536 if (this->attributes_section_data_ == NULL)
8538 this->attributes_section_data_ = new Attributes_section_data(*pasd);
8542 const int vendor = Object_attribute::OBJ_ATTR_PROC;
8543 const Object_attribute* in_attr = pasd->known_attributes(vendor);
8544 Object_attribute* out_attr =
8545 this->attributes_section_data_->known_attributes(vendor);
8547 // This needs to happen before Tag_ABI_FP_number_model is merged. */
8548 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
8549 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
8551 // Ignore mismatches if the object doesn't use floating point. */
8552 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0)
8553 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
8554 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
8555 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0)
8556 gold_error(_("%s uses VFP register arguments, output does not"),
8560 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
8562 // Merge this attribute with existing attributes.
8565 case elfcpp::Tag_CPU_raw_name:
8566 case elfcpp::Tag_CPU_name:
8567 // These are merged after Tag_CPU_arch.
8570 case elfcpp::Tag_ABI_optimization_goals:
8571 case elfcpp::Tag_ABI_FP_optimization_goals:
8572 // Use the first value seen.
8575 case elfcpp::Tag_CPU_arch:
8577 unsigned int saved_out_attr = out_attr->int_value();
8578 // Merge Tag_CPU_arch and Tag_also_compatible_with.
8579 int secondary_compat =
8580 this->get_secondary_compatible_arch(pasd);
8581 int secondary_compat_out =
8582 this->get_secondary_compatible_arch(
8583 this->attributes_section_data_);
8584 out_attr[i].set_int_value(
8585 tag_cpu_arch_combine(name, out_attr[i].int_value(),
8586 &secondary_compat_out,
8587 in_attr[i].int_value(),
8589 this->set_secondary_compatible_arch(this->attributes_section_data_,
8590 secondary_compat_out);
8592 // Merge Tag_CPU_name and Tag_CPU_raw_name.
8593 if (out_attr[i].int_value() == saved_out_attr)
8594 ; // Leave the names alone.
8595 else if (out_attr[i].int_value() == in_attr[i].int_value())
8597 // The output architecture has been changed to match the
8598 // input architecture. Use the input names.
8599 out_attr[elfcpp::Tag_CPU_name].set_string_value(
8600 in_attr[elfcpp::Tag_CPU_name].string_value());
8601 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
8602 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
8606 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
8607 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
8610 // If we still don't have a value for Tag_CPU_name,
8611 // make one up now. Tag_CPU_raw_name remains blank.
8612 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
8614 const std::string cpu_name =
8615 this->tag_cpu_name_value(out_attr[i].int_value());
8616 // FIXME: If we see an unknown CPU, this will be set
8617 // to "<unknown CPU n>", where n is the attribute value.
8618 // This is different from BFD, which leaves the name alone.
8619 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
8624 case elfcpp::Tag_ARM_ISA_use:
8625 case elfcpp::Tag_THUMB_ISA_use:
8626 case elfcpp::Tag_WMMX_arch:
8627 case elfcpp::Tag_Advanced_SIMD_arch:
8628 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
8629 case elfcpp::Tag_ABI_FP_rounding:
8630 case elfcpp::Tag_ABI_FP_exceptions:
8631 case elfcpp::Tag_ABI_FP_user_exceptions:
8632 case elfcpp::Tag_ABI_FP_number_model:
8633 case elfcpp::Tag_VFP_HP_extension:
8634 case elfcpp::Tag_CPU_unaligned_access:
8635 case elfcpp::Tag_T2EE_use:
8636 case elfcpp::Tag_Virtualization_use:
8637 case elfcpp::Tag_MPextension_use:
8638 // Use the largest value specified.
8639 if (in_attr[i].int_value() > out_attr[i].int_value())
8640 out_attr[i].set_int_value(in_attr[i].int_value());
8643 case elfcpp::Tag_ABI_align8_preserved:
8644 case elfcpp::Tag_ABI_PCS_RO_data:
8645 // Use the smallest value specified.
8646 if (in_attr[i].int_value() < out_attr[i].int_value())
8647 out_attr[i].set_int_value(in_attr[i].int_value());
8650 case elfcpp::Tag_ABI_align8_needed:
8651 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
8652 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
8653 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
8656 // This error message should be enabled once all non-conformant
8657 // binaries in the toolchain have had the attributes set
8659 // gold_error(_("output 8-byte data alignment conflicts with %s"),
8663 case elfcpp::Tag_ABI_FP_denormal:
8664 case elfcpp::Tag_ABI_PCS_GOT_use:
8666 // These tags have 0 = don't care, 1 = strong requirement,
8667 // 2 = weak requirement.
8668 static const int order_021[3] = {0, 2, 1};
8670 // Use the "greatest" from the sequence 0, 2, 1, or the largest
8671 // value if greater than 2 (for future-proofing).
8672 if ((in_attr[i].int_value() > 2
8673 && in_attr[i].int_value() > out_attr[i].int_value())
8674 || (in_attr[i].int_value() <= 2
8675 && out_attr[i].int_value() <= 2
8676 && (order_021[in_attr[i].int_value()]
8677 > order_021[out_attr[i].int_value()])))
8678 out_attr[i].set_int_value(in_attr[i].int_value());
8682 case elfcpp::Tag_CPU_arch_profile:
8683 if (out_attr[i].int_value() != in_attr[i].int_value())
8685 // 0 will merge with anything.
8686 // 'A' and 'S' merge to 'A'.
8687 // 'R' and 'S' merge to 'R'.
8688 // 'M' and 'A|R|S' is an error.
8689 if (out_attr[i].int_value() == 0
8690 || (out_attr[i].int_value() == 'S'
8691 && (in_attr[i].int_value() == 'A'
8692 || in_attr[i].int_value() == 'R')))
8693 out_attr[i].set_int_value(in_attr[i].int_value());
8694 else if (in_attr[i].int_value() == 0
8695 || (in_attr[i].int_value() == 'S'
8696 && (out_attr[i].int_value() == 'A'
8697 || out_attr[i].int_value() == 'R')))
8702 (_("conflicting architecture profiles %c/%c"),
8703 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
8704 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
8708 case elfcpp::Tag_VFP_arch:
8725 // Values greater than 6 aren't defined, so just pick the
8727 if (in_attr[i].int_value() > 6
8728 && in_attr[i].int_value() > out_attr[i].int_value())
8730 *out_attr = *in_attr;
8733 // The output uses the superset of input features
8734 // (ISA version) and registers.
8735 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
8736 vfp_versions[out_attr[i].int_value()].ver);
8737 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
8738 vfp_versions[out_attr[i].int_value()].regs);
8739 // This assumes all possible supersets are also a valid
8742 for (newval = 6; newval > 0; newval--)
8744 if (regs == vfp_versions[newval].regs
8745 && ver == vfp_versions[newval].ver)
8748 out_attr[i].set_int_value(newval);
8751 case elfcpp::Tag_PCS_config:
8752 if (out_attr[i].int_value() == 0)
8753 out_attr[i].set_int_value(in_attr[i].int_value());
8754 else if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8756 // It's sometimes ok to mix different configs, so this is only
8758 gold_warning(_("%s: conflicting platform configuration"), name);
8761 case elfcpp::Tag_ABI_PCS_R9_use:
8762 if (in_attr[i].int_value() != out_attr[i].int_value()
8763 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
8764 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused)
8766 gold_error(_("%s: conflicting use of R9"), name);
8768 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
8769 out_attr[i].set_int_value(in_attr[i].int_value());
8771 case elfcpp::Tag_ABI_PCS_RW_data:
8772 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
8773 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8774 != elfcpp::AEABI_R9_SB)
8775 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8776 != elfcpp::AEABI_R9_unused))
8778 gold_error(_("%s: SB relative addressing conflicts with use "
8782 // Use the smallest value specified.
8783 if (in_attr[i].int_value() < out_attr[i].int_value())
8784 out_attr[i].set_int_value(in_attr[i].int_value());
8786 case elfcpp::Tag_ABI_PCS_wchar_t:
8787 // FIXME: Make it possible to turn off this warning.
8788 if (out_attr[i].int_value()
8789 && in_attr[i].int_value()
8790 && out_attr[i].int_value() != in_attr[i].int_value())
8792 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
8793 "use %u-byte wchar_t; use of wchar_t values "
8794 "across objects may fail"),
8795 name, in_attr[i].int_value(),
8796 out_attr[i].int_value());
8798 else if (in_attr[i].int_value() && !out_attr[i].int_value())
8799 out_attr[i].set_int_value(in_attr[i].int_value());
8801 case elfcpp::Tag_ABI_enum_size:
8802 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
8804 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
8805 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
8807 // The existing object is compatible with anything.
8808 // Use whatever requirements the new object has.
8809 out_attr[i].set_int_value(in_attr[i].int_value());
8811 // FIXME: Make it possible to turn off this warning.
8812 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
8813 && out_attr[i].int_value() != in_attr[i].int_value())
8815 unsigned int in_value = in_attr[i].int_value();
8816 unsigned int out_value = out_attr[i].int_value();
8817 gold_warning(_("%s uses %s enums yet the output is to use "
8818 "%s enums; use of enum values across objects "
8821 this->aeabi_enum_name(in_value).c_str(),
8822 this->aeabi_enum_name(out_value).c_str());
8826 case elfcpp::Tag_ABI_VFP_args:
8829 case elfcpp::Tag_ABI_WMMX_args:
8830 if (in_attr[i].int_value() != out_attr[i].int_value())
8832 gold_error(_("%s uses iWMMXt register arguments, output does "
8837 case Object_attribute::Tag_compatibility:
8838 // Merged in target-independent code.
8840 case elfcpp::Tag_ABI_HardFP_use:
8841 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
8842 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
8843 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
8844 out_attr[i].set_int_value(3);
8845 else if (in_attr[i].int_value() > out_attr[i].int_value())
8846 out_attr[i].set_int_value(in_attr[i].int_value());
8848 case elfcpp::Tag_ABI_FP_16bit_format:
8849 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8851 if (in_attr[i].int_value() != out_attr[i].int_value())
8852 gold_error(_("fp16 format mismatch between %s and output"),
8855 if (in_attr[i].int_value() != 0)
8856 out_attr[i].set_int_value(in_attr[i].int_value());
8859 case elfcpp::Tag_nodefaults:
8860 // This tag is set if it exists, but the value is unused (and is
8861 // typically zero). We don't actually need to do anything here -
8862 // the merge happens automatically when the type flags are merged
8865 case elfcpp::Tag_also_compatible_with:
8866 // Already done in Tag_CPU_arch.
8868 case elfcpp::Tag_conformance:
8869 // Keep the attribute if it matches. Throw it away otherwise.
8870 // No attribute means no claim to conform.
8871 if (in_attr[i].string_value() != out_attr[i].string_value())
8872 out_attr[i].set_string_value("");
8877 const char* err_object = NULL;
8879 // The "known_obj_attributes" table does contain some undefined
8880 // attributes. Ensure that there are unused.
8881 if (out_attr[i].int_value() != 0
8882 || out_attr[i].string_value() != "")
8883 err_object = "output";
8884 else if (in_attr[i].int_value() != 0
8885 || in_attr[i].string_value() != "")
8888 if (err_object != NULL)
8890 // Attribute numbers >=64 (mod 128) can be safely ignored.
8892 gold_error(_("%s: unknown mandatory EABI object attribute "
8896 gold_warning(_("%s: unknown EABI object attribute %d"),
8900 // Only pass on attributes that match in both inputs.
8901 if (!in_attr[i].matches(out_attr[i]))
8903 out_attr[i].set_int_value(0);
8904 out_attr[i].set_string_value("");
8909 // If out_attr was copied from in_attr then it won't have a type yet.
8910 if (in_attr[i].type() && !out_attr[i].type())
8911 out_attr[i].set_type(in_attr[i].type());
8914 // Merge Tag_compatibility attributes and any common GNU ones.
8915 this->attributes_section_data_->merge(name, pasd);
8917 // Check for any attributes not known on ARM.
8918 typedef Vendor_object_attributes::Other_attributes Other_attributes;
8919 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
8920 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
8921 Other_attributes* out_other_attributes =
8922 this->attributes_section_data_->other_attributes(vendor);
8923 Other_attributes::iterator out_iter = out_other_attributes->begin();
8925 while (in_iter != in_other_attributes->end()
8926 || out_iter != out_other_attributes->end())
8928 const char* err_object = NULL;
8931 // The tags for each list are in numerical order.
8932 // If the tags are equal, then merge.
8933 if (out_iter != out_other_attributes->end()
8934 && (in_iter == in_other_attributes->end()
8935 || in_iter->first > out_iter->first))
8937 // This attribute only exists in output. We can't merge, and we
8938 // don't know what the tag means, so delete it.
8939 err_object = "output";
8940 err_tag = out_iter->first;
8941 int saved_tag = out_iter->first;
8942 delete out_iter->second;
8943 out_other_attributes->erase(out_iter);
8944 out_iter = out_other_attributes->upper_bound(saved_tag);
8946 else if (in_iter != in_other_attributes->end()
8947 && (out_iter != out_other_attributes->end()
8948 || in_iter->first < out_iter->first))
8950 // This attribute only exists in input. We can't merge, and we
8951 // don't know what the tag means, so ignore it.
8953 err_tag = in_iter->first;
8956 else // The tags are equal.
8958 // As present, all attributes in the list are unknown, and
8959 // therefore can't be merged meaningfully.
8960 err_object = "output";
8961 err_tag = out_iter->first;
8963 // Only pass on attributes that match in both inputs.
8964 if (!in_iter->second->matches(*(out_iter->second)))
8966 // No match. Delete the attribute.
8967 int saved_tag = out_iter->first;
8968 delete out_iter->second;
8969 out_other_attributes->erase(out_iter);
8970 out_iter = out_other_attributes->upper_bound(saved_tag);
8974 // Matched. Keep the attribute and move to the next.
8982 // Attribute numbers >=64 (mod 128) can be safely ignored. */
8983 if ((err_tag & 127) < 64)
8985 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
8986 err_object, err_tag);
8990 gold_warning(_("%s: unknown EABI object attribute %d"),
8991 err_object, err_tag);
8997 // Stub-generation methods for Target_arm.
8999 // Make a new Arm_input_section object.
9001 template<bool big_endian>
9002 Arm_input_section<big_endian>*
9003 Target_arm<big_endian>::new_arm_input_section(
9007 Section_id sid(relobj, shndx);
9009 Arm_input_section<big_endian>* arm_input_section =
9010 new Arm_input_section<big_endian>(relobj, shndx);
9011 arm_input_section->init();
9013 // Register new Arm_input_section in map for look-up.
9014 std::pair<typename Arm_input_section_map::iterator, bool> ins =
9015 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
9017 // Make sure that it we have not created another Arm_input_section
9018 // for this input section already.
9019 gold_assert(ins.second);
9021 return arm_input_section;
9024 // Find the Arm_input_section object corresponding to the SHNDX-th input
9025 // section of RELOBJ.
9027 template<bool big_endian>
9028 Arm_input_section<big_endian>*
9029 Target_arm<big_endian>::find_arm_input_section(
9031 unsigned int shndx) const
9033 Section_id sid(relobj, shndx);
9034 typename Arm_input_section_map::const_iterator p =
9035 this->arm_input_section_map_.find(sid);
9036 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
9039 // Make a new stub table.
9041 template<bool big_endian>
9042 Stub_table<big_endian>*
9043 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
9045 Stub_table<big_endian>* stub_table =
9046 new Stub_table<big_endian>(owner);
9047 this->stub_tables_.push_back(stub_table);
9049 stub_table->set_address(owner->address() + owner->data_size());
9050 stub_table->set_file_offset(owner->offset() + owner->data_size());
9051 stub_table->finalize_data_size();
9056 // Scan a relocation for stub generation.
9058 template<bool big_endian>
9060 Target_arm<big_endian>::scan_reloc_for_stub(
9061 const Relocate_info<32, big_endian>* relinfo,
9062 unsigned int r_type,
9063 const Sized_symbol<32>* gsym,
9065 const Symbol_value<32>* psymval,
9066 elfcpp::Elf_types<32>::Elf_Swxword addend,
9067 Arm_address address)
9069 typedef typename Target_arm<big_endian>::Relocate Relocate;
9071 const Arm_relobj<big_endian>* arm_relobj =
9072 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9074 if (r_type == elfcpp::R_ARM_V4BX)
9076 const uint32_t reg = (addend & 0xf);
9077 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9080 // Try looking up an existing stub from a stub table.
9081 Stub_table<big_endian>* stub_table =
9082 arm_relobj->stub_table(relinfo->data_shndx);
9083 gold_assert(stub_table != NULL);
9085 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
9087 // create a new stub and add it to stub table.
9088 Arm_v4bx_stub* stub =
9089 this->stub_factory().make_arm_v4bx_stub(reg);
9090 gold_assert(stub != NULL);
9091 stub_table->add_arm_v4bx_stub(stub);
9098 bool target_is_thumb;
9099 Symbol_value<32> symval;
9102 // This is a global symbol. Determine if we use PLT and if the
9103 // final target is THUMB.
9104 if (gsym->use_plt_offset(Relocate::reloc_is_non_pic(r_type)))
9106 // This uses a PLT, change the symbol value.
9107 symval.set_output_value(this->plt_section()->address()
9108 + gsym->plt_offset());
9110 target_is_thumb = false;
9112 else if (gsym->is_undefined())
9113 // There is no need to generate a stub symbol is undefined.
9118 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
9119 || (gsym->type() == elfcpp::STT_FUNC
9120 && !gsym->is_undefined()
9121 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
9126 // This is a local symbol. Determine if the final target is THUMB.
9127 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
9130 // Strip LSB if this points to a THUMB target.
9131 const Arm_reloc_property* reloc_property =
9132 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9133 gold_assert(reloc_property != NULL);
9135 && reloc_property->uses_thumb_bit()
9136 && ((psymval->value(arm_relobj, 0) & 1) != 0))
9138 Arm_address stripped_value =
9139 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
9140 symval.set_output_value(stripped_value);
9144 // Get the symbol value.
9145 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
9147 // Owing to pipelining, the PC relative branches below actually skip
9148 // two instructions when the branch offset is 0.
9149 Arm_address destination;
9152 case elfcpp::R_ARM_CALL:
9153 case elfcpp::R_ARM_JUMP24:
9154 case elfcpp::R_ARM_PLT32:
9156 destination = value + addend + 8;
9158 case elfcpp::R_ARM_THM_CALL:
9159 case elfcpp::R_ARM_THM_XPC22:
9160 case elfcpp::R_ARM_THM_JUMP24:
9161 case elfcpp::R_ARM_THM_JUMP19:
9163 destination = value + addend + 4;
9169 Reloc_stub* stub = NULL;
9170 Stub_type stub_type =
9171 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
9173 if (stub_type != arm_stub_none)
9175 // Try looking up an existing stub from a stub table.
9176 Stub_table<big_endian>* stub_table =
9177 arm_relobj->stub_table(relinfo->data_shndx);
9178 gold_assert(stub_table != NULL);
9180 // Locate stub by destination.
9181 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
9183 // Create a stub if there is not one already
9184 stub = stub_table->find_reloc_stub(stub_key);
9187 // create a new stub and add it to stub table.
9188 stub = this->stub_factory().make_reloc_stub(stub_type);
9189 stub_table->add_reloc_stub(stub, stub_key);
9192 // Record the destination address.
9193 stub->set_destination_address(destination
9194 | (target_is_thumb ? 1 : 0));
9197 // For Cortex-A8, we need to record a relocation at 4K page boundary.
9198 if (this->fix_cortex_a8_
9199 && (r_type == elfcpp::R_ARM_THM_JUMP24
9200 || r_type == elfcpp::R_ARM_THM_JUMP19
9201 || r_type == elfcpp::R_ARM_THM_CALL
9202 || r_type == elfcpp::R_ARM_THM_XPC22)
9203 && (address & 0xfffU) == 0xffeU)
9205 // Found a candidate. Note we haven't checked the destination is
9206 // within 4K here: if we do so (and don't create a record) we can't
9207 // tell that a branch should have been relocated when scanning later.
9208 this->cortex_a8_relocs_info_[address] =
9209 new Cortex_a8_reloc(stub, r_type,
9210 destination | (target_is_thumb ? 1 : 0));
9214 // This function scans a relocation sections for stub generation.
9215 // The template parameter Relocate must be a class type which provides
9216 // a single function, relocate(), which implements the machine
9217 // specific part of a relocation.
9219 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
9220 // SHT_REL or SHT_RELA.
9222 // PRELOCS points to the relocation data. RELOC_COUNT is the number
9223 // of relocs. OUTPUT_SECTION is the output section.
9224 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
9225 // mapped to output offsets.
9227 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
9228 // VIEW_SIZE is the size. These refer to the input section, unless
9229 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
9230 // the output section.
9232 template<bool big_endian>
9233 template<int sh_type>
9235 Target_arm<big_endian>::scan_reloc_section_for_stubs(
9236 const Relocate_info<32, big_endian>* relinfo,
9237 const unsigned char* prelocs,
9239 Output_section* output_section,
9240 bool needs_special_offset_handling,
9241 const unsigned char* view,
9242 elfcpp::Elf_types<32>::Elf_Addr view_address,
9245 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
9246 const int reloc_size =
9247 Reloc_types<sh_type, 32, big_endian>::reloc_size;
9249 Arm_relobj<big_endian>* arm_object =
9250 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9251 unsigned int local_count = arm_object->local_symbol_count();
9253 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
9255 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
9257 Reltype reloc(prelocs);
9259 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
9260 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9261 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
9263 r_type = this->get_real_reloc_type(r_type);
9265 // Only a few relocation types need stubs.
9266 if ((r_type != elfcpp::R_ARM_CALL)
9267 && (r_type != elfcpp::R_ARM_JUMP24)
9268 && (r_type != elfcpp::R_ARM_PLT32)
9269 && (r_type != elfcpp::R_ARM_THM_CALL)
9270 && (r_type != elfcpp::R_ARM_THM_XPC22)
9271 && (r_type != elfcpp::R_ARM_THM_JUMP24)
9272 && (r_type != elfcpp::R_ARM_THM_JUMP19)
9273 && (r_type != elfcpp::R_ARM_V4BX))
9276 section_offset_type offset =
9277 convert_to_section_size_type(reloc.get_r_offset());
9279 if (needs_special_offset_handling)
9281 offset = output_section->output_offset(relinfo->object,
9282 relinfo->data_shndx,
9288 if (r_type == elfcpp::R_ARM_V4BX)
9290 // Get the BX instruction.
9291 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
9292 const Valtype* wv = reinterpret_cast<const Valtype*>(view + offset);
9293 elfcpp::Elf_types<32>::Elf_Swxword insn =
9294 elfcpp::Swap<32, big_endian>::readval(wv);
9295 this->scan_reloc_for_stub(relinfo, r_type, NULL, 0, NULL,
9301 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
9302 elfcpp::Elf_types<32>::Elf_Swxword addend =
9303 stub_addend_reader(r_type, view + offset, reloc);
9305 const Sized_symbol<32>* sym;
9307 Symbol_value<32> symval;
9308 const Symbol_value<32> *psymval;
9309 if (r_sym < local_count)
9312 psymval = arm_object->local_symbol(r_sym);
9314 // If the local symbol belongs to a section we are discarding,
9315 // and that section is a debug section, try to find the
9316 // corresponding kept section and map this symbol to its
9317 // counterpart in the kept section. The symbol must not
9318 // correspond to a section we are folding.
9320 unsigned int shndx = psymval->input_shndx(&is_ordinary);
9322 && shndx != elfcpp::SHN_UNDEF
9323 && !arm_object->is_section_included(shndx)
9324 && !(relinfo->symtab->is_section_folded(arm_object, shndx)))
9326 if (comdat_behavior == CB_UNDETERMINED)
9329 arm_object->section_name(relinfo->data_shndx);
9330 comdat_behavior = get_comdat_behavior(name.c_str());
9332 if (comdat_behavior == CB_PRETEND)
9335 typename elfcpp::Elf_types<32>::Elf_Addr value =
9336 arm_object->map_to_kept_section(shndx, &found);
9338 symval.set_output_value(value + psymval->input_value());
9340 symval.set_output_value(0);
9344 symval.set_output_value(0);
9346 symval.set_no_output_symtab_entry();
9352 const Symbol* gsym = arm_object->global_symbol(r_sym);
9353 gold_assert(gsym != NULL);
9354 if (gsym->is_forwarder())
9355 gsym = relinfo->symtab->resolve_forwards(gsym);
9357 sym = static_cast<const Sized_symbol<32>*>(gsym);
9358 if (sym->has_symtab_index())
9359 symval.set_output_symtab_index(sym->symtab_index());
9361 symval.set_no_output_symtab_entry();
9363 // We need to compute the would-be final value of this global
9365 const Symbol_table* symtab = relinfo->symtab;
9366 const Sized_symbol<32>* sized_symbol =
9367 symtab->get_sized_symbol<32>(gsym);
9368 Symbol_table::Compute_final_value_status status;
9370 symtab->compute_final_value<32>(sized_symbol, &status);
9372 // Skip this if the symbol has not output section.
9373 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
9376 symval.set_output_value(value);
9380 // If symbol is a section symbol, we don't know the actual type of
9381 // destination. Give up.
9382 if (psymval->is_section_symbol())
9385 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
9386 addend, view_address + offset);
9390 // Scan an input section for stub generation.
9392 template<bool big_endian>
9394 Target_arm<big_endian>::scan_section_for_stubs(
9395 const Relocate_info<32, big_endian>* relinfo,
9396 unsigned int sh_type,
9397 const unsigned char* prelocs,
9399 Output_section* output_section,
9400 bool needs_special_offset_handling,
9401 const unsigned char* view,
9402 Arm_address view_address,
9403 section_size_type view_size)
9405 if (sh_type == elfcpp::SHT_REL)
9406 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
9411 needs_special_offset_handling,
9415 else if (sh_type == elfcpp::SHT_RELA)
9416 // We do not support RELA type relocations yet. This is provided for
9418 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
9423 needs_special_offset_handling,
9431 // Group input sections for stub generation.
9433 // We goup input sections in an output sections so that the total size,
9434 // including any padding space due to alignment is smaller than GROUP_SIZE
9435 // unless the only input section in group is bigger than GROUP_SIZE already.
9436 // Then an ARM stub table is created to follow the last input section
9437 // in group. For each group an ARM stub table is created an is placed
9438 // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further
9439 // extend the group after the stub table.
9441 template<bool big_endian>
9443 Target_arm<big_endian>::group_sections(
9445 section_size_type group_size,
9446 bool stubs_always_after_branch)
9448 // Group input sections and insert stub table
9449 Layout::Section_list section_list;
9450 layout->get_allocated_sections(§ion_list);
9451 for (Layout::Section_list::const_iterator p = section_list.begin();
9452 p != section_list.end();
9455 Arm_output_section<big_endian>* output_section =
9456 Arm_output_section<big_endian>::as_arm_output_section(*p);
9457 output_section->group_sections(group_size, stubs_always_after_branch,
9462 // Relaxation hook. This is where we do stub generation.
9464 template<bool big_endian>
9466 Target_arm<big_endian>::do_relax(
9468 const Input_objects* input_objects,
9469 Symbol_table* symtab,
9472 // No need to generate stubs if this is a relocatable link.
9473 gold_assert(!parameters->options().relocatable());
9475 // If this is the first pass, we need to group input sections into
9477 bool done_exidx_fixup = false;
9480 // Determine the stub group size. The group size is the absolute
9481 // value of the parameter --stub-group-size. If --stub-group-size
9482 // is passed a negative value, we restict stubs to be always after
9483 // the stubbed branches.
9484 int32_t stub_group_size_param =
9485 parameters->options().stub_group_size();
9486 bool stubs_always_after_branch = stub_group_size_param < 0;
9487 section_size_type stub_group_size = abs(stub_group_size_param);
9489 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
9490 // page as the first half of a 32-bit branch straddling two 4K pages.
9491 // This is a crude way of enforcing that.
9492 if (this->fix_cortex_a8_)
9493 stubs_always_after_branch = true;
9495 if (stub_group_size == 1)
9498 // Thumb branch range is +-4MB has to be used as the default
9499 // maximum size (a given section can contain both ARM and Thumb
9500 // code, so the worst case has to be taken into account).
9502 // This value is 24K less than that, which allows for 2025
9503 // 12-byte stubs. If we exceed that, then we will fail to link.
9504 // The user will have to relink with an explicit group size
9506 stub_group_size = 4170000;
9509 group_sections(layout, stub_group_size, stubs_always_after_branch);
9511 // Also fix .ARM.exidx section coverage.
9512 Output_section* os = layout->find_output_section(".ARM.exidx");
9513 if (os != NULL && os->type() == elfcpp::SHT_ARM_EXIDX)
9515 Arm_output_section<big_endian>* exidx_output_section =
9516 Arm_output_section<big_endian>::as_arm_output_section(os);
9517 this->fix_exidx_coverage(layout, exidx_output_section, symtab);
9518 done_exidx_fixup = true;
9522 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
9523 // beginning of each relaxation pass, just blow away all the stubs.
9524 // Alternatively, we could selectively remove only the stubs and reloc
9525 // information for code sections that have moved since the last pass.
9526 // That would require more book-keeping.
9527 typedef typename Stub_table_list::iterator Stub_table_iterator;
9528 if (this->fix_cortex_a8_)
9530 // Clear all Cortex-A8 reloc information.
9531 for (typename Cortex_a8_relocs_info::const_iterator p =
9532 this->cortex_a8_relocs_info_.begin();
9533 p != this->cortex_a8_relocs_info_.end();
9536 this->cortex_a8_relocs_info_.clear();
9538 // Remove all Cortex-A8 stubs.
9539 for (Stub_table_iterator sp = this->stub_tables_.begin();
9540 sp != this->stub_tables_.end();
9542 (*sp)->remove_all_cortex_a8_stubs();
9545 // Scan relocs for relocation stubs
9546 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9547 op != input_objects->relobj_end();
9550 Arm_relobj<big_endian>* arm_relobj =
9551 Arm_relobj<big_endian>::as_arm_relobj(*op);
9552 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
9555 // Check all stub tables to see if any of them have their data sizes
9556 // or addresses alignments changed. These are the only things that
9558 bool any_stub_table_changed = false;
9559 Unordered_set<const Output_section*> sections_needing_adjustment;
9560 for (Stub_table_iterator sp = this->stub_tables_.begin();
9561 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9564 if ((*sp)->update_data_size_and_addralign())
9566 // Update data size of stub table owner.
9567 Arm_input_section<big_endian>* owner = (*sp)->owner();
9568 uint64_t address = owner->address();
9569 off_t offset = owner->offset();
9570 owner->reset_address_and_file_offset();
9571 owner->set_address_and_file_offset(address, offset);
9573 sections_needing_adjustment.insert(owner->output_section());
9574 any_stub_table_changed = true;
9578 // Output_section_data::output_section() returns a const pointer but we
9579 // need to update output sections, so we record all output sections needing
9580 // update above and scan the sections here to find out what sections need
9582 for(Layout::Section_list::const_iterator p = layout->section_list().begin();
9583 p != layout->section_list().end();
9586 if (sections_needing_adjustment.find(*p)
9587 != sections_needing_adjustment.end())
9588 (*p)->set_section_offsets_need_adjustment();
9591 // Stop relaxation if no EXIDX fix-up and no stub table change.
9592 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
9594 // Finalize the stubs in the last relaxation pass.
9595 if (!continue_relaxation)
9597 for (Stub_table_iterator sp = this->stub_tables_.begin();
9598 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9600 (*sp)->finalize_stubs();
9602 // Update output local symbol counts of objects if necessary.
9603 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9604 op != input_objects->relobj_end();
9607 Arm_relobj<big_endian>* arm_relobj =
9608 Arm_relobj<big_endian>::as_arm_relobj(*op);
9610 // Update output local symbol counts. We need to discard local
9611 // symbols defined in parts of input sections that are discarded by
9613 if (arm_relobj->output_local_symbol_count_needs_update())
9614 arm_relobj->update_output_local_symbol_count();
9618 return continue_relaxation;
9623 template<bool big_endian>
9625 Target_arm<big_endian>::relocate_stub(
9627 const Relocate_info<32, big_endian>* relinfo,
9628 Output_section* output_section,
9629 unsigned char* view,
9630 Arm_address address,
9631 section_size_type view_size)
9634 const Stub_template* stub_template = stub->stub_template();
9635 for (size_t i = 0; i < stub_template->reloc_count(); i++)
9637 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
9638 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
9640 unsigned int r_type = insn->r_type();
9641 section_size_type reloc_offset = stub_template->reloc_offset(i);
9642 section_size_type reloc_size = insn->size();
9643 gold_assert(reloc_offset + reloc_size <= view_size);
9645 // This is the address of the stub destination.
9646 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
9647 Symbol_value<32> symval;
9648 symval.set_output_value(target);
9650 // Synthesize a fake reloc just in case. We don't have a symbol so
9652 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
9653 memset(reloc_buffer, 0, sizeof(reloc_buffer));
9654 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
9655 reloc_write.put_r_offset(reloc_offset);
9656 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
9657 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
9659 relocate.relocate(relinfo, this, output_section,
9660 this->fake_relnum_for_stubs, rel, r_type,
9661 NULL, &symval, view + reloc_offset,
9662 address + reloc_offset, reloc_size);
9666 // Determine whether an object attribute tag takes an integer, a
9669 template<bool big_endian>
9671 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
9673 if (tag == Object_attribute::Tag_compatibility)
9674 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9675 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
9676 else if (tag == elfcpp::Tag_nodefaults)
9677 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9678 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
9679 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
9680 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
9682 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
9684 return ((tag & 1) != 0
9685 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
9686 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
9689 // Reorder attributes.
9691 // The ABI defines that Tag_conformance should be emitted first, and that
9692 // Tag_nodefaults should be second (if either is defined). This sets those
9693 // two positions, and bumps up the position of all the remaining tags to
9696 template<bool big_endian>
9698 Target_arm<big_endian>::do_attributes_order(int num) const
9700 // Reorder the known object attributes in output. We want to move
9701 // Tag_conformance to position 4 and Tag_conformance to position 5
9702 // and shift eveything between 4 .. Tag_conformance - 1 to make room.
9704 return elfcpp::Tag_conformance;
9706 return elfcpp::Tag_nodefaults;
9707 if ((num - 2) < elfcpp::Tag_nodefaults)
9709 if ((num - 1) < elfcpp::Tag_conformance)
9714 // Scan a span of THUMB code for Cortex-A8 erratum.
9716 template<bool big_endian>
9718 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
9719 Arm_relobj<big_endian>* arm_relobj,
9721 section_size_type span_start,
9722 section_size_type span_end,
9723 const unsigned char* view,
9724 Arm_address address)
9726 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
9728 // The opcode is BLX.W, BL.W, B.W, Bcc.W
9729 // The branch target is in the same 4KB region as the
9730 // first half of the branch.
9731 // The instruction before the branch is a 32-bit
9732 // length non-branch instruction.
9733 section_size_type i = span_start;
9734 bool last_was_32bit = false;
9735 bool last_was_branch = false;
9736 while (i < span_end)
9738 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
9739 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
9740 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
9741 bool is_blx = false, is_b = false;
9742 bool is_bl = false, is_bcc = false;
9744 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
9747 // Load the rest of the insn (in manual-friendly order).
9748 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
9750 // Encoding T4: B<c>.W.
9751 is_b = (insn & 0xf800d000U) == 0xf0009000U;
9752 // Encoding T1: BL<c>.W.
9753 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
9754 // Encoding T2: BLX<c>.W.
9755 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
9756 // Encoding T3: B<c>.W (not permitted in IT block).
9757 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
9758 && (insn & 0x07f00000U) != 0x03800000U);
9761 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
9763 // If this instruction is a 32-bit THUMB branch that crosses a 4K
9764 // page boundary and it follows 32-bit non-branch instruction,
9765 // we need to work around.
9767 && ((address + i) & 0xfffU) == 0xffeU
9769 && !last_was_branch)
9771 // Check to see if there is a relocation stub for this branch.
9772 bool force_target_arm = false;
9773 bool force_target_thumb = false;
9774 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
9775 Cortex_a8_relocs_info::const_iterator p =
9776 this->cortex_a8_relocs_info_.find(address + i);
9778 if (p != this->cortex_a8_relocs_info_.end())
9780 cortex_a8_reloc = p->second;
9781 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
9783 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9784 && !target_is_thumb)
9785 force_target_arm = true;
9786 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9788 force_target_thumb = true;
9792 Stub_type stub_type = arm_stub_none;
9794 // Check if we have an offending branch instruction.
9795 uint16_t upper_insn = (insn >> 16) & 0xffffU;
9796 uint16_t lower_insn = insn & 0xffffU;
9797 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
9799 if (cortex_a8_reloc != NULL
9800 && cortex_a8_reloc->reloc_stub() != NULL)
9801 // We've already made a stub for this instruction, e.g.
9802 // it's a long branch or a Thumb->ARM stub. Assume that
9803 // stub will suffice to work around the A8 erratum (see
9804 // setting of always_after_branch above).
9808 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
9810 stub_type = arm_stub_a8_veneer_b_cond;
9812 else if (is_b || is_bl || is_blx)
9814 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
9820 ? arm_stub_a8_veneer_blx
9822 ? arm_stub_a8_veneer_bl
9823 : arm_stub_a8_veneer_b));
9826 if (stub_type != arm_stub_none)
9828 Arm_address pc_for_insn = address + i + 4;
9830 // The original instruction is a BL, but the target is
9831 // an ARM instruction. If we were not making a stub,
9832 // the BL would have been converted to a BLX. Use the
9833 // BLX stub instead in that case.
9834 if (this->may_use_blx() && force_target_arm
9835 && stub_type == arm_stub_a8_veneer_bl)
9837 stub_type = arm_stub_a8_veneer_blx;
9841 // Conversely, if the original instruction was
9842 // BLX but the target is Thumb mode, use the BL stub.
9843 else if (force_target_thumb
9844 && stub_type == arm_stub_a8_veneer_blx)
9846 stub_type = arm_stub_a8_veneer_bl;
9854 // If we found a relocation, use the proper destination,
9855 // not the offset in the (unrelocated) instruction.
9856 // Note this is always done if we switched the stub type above.
9857 if (cortex_a8_reloc != NULL)
9858 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
9860 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
9862 // Add a new stub if destination address in in the same page.
9863 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
9865 Cortex_a8_stub* stub =
9866 this->stub_factory_.make_cortex_a8_stub(stub_type,
9870 Stub_table<big_endian>* stub_table =
9871 arm_relobj->stub_table(shndx);
9872 gold_assert(stub_table != NULL);
9873 stub_table->add_cortex_a8_stub(address + i, stub);
9878 i += insn_32bit ? 4 : 2;
9879 last_was_32bit = insn_32bit;
9880 last_was_branch = is_32bit_branch;
9884 // Apply the Cortex-A8 workaround.
9886 template<bool big_endian>
9888 Target_arm<big_endian>::apply_cortex_a8_workaround(
9889 const Cortex_a8_stub* stub,
9890 Arm_address stub_address,
9891 unsigned char* insn_view,
9892 Arm_address insn_address)
9894 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
9895 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
9896 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
9897 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
9898 off_t branch_offset = stub_address - (insn_address + 4);
9900 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
9901 switch (stub->stub_template()->type())
9903 case arm_stub_a8_veneer_b_cond:
9904 gold_assert(!utils::has_overflow<21>(branch_offset));
9905 upper_insn = RelocFuncs::thumb32_cond_branch_upper(upper_insn,
9907 lower_insn = RelocFuncs::thumb32_cond_branch_lower(lower_insn,
9911 case arm_stub_a8_veneer_b:
9912 case arm_stub_a8_veneer_bl:
9913 case arm_stub_a8_veneer_blx:
9914 if ((lower_insn & 0x5000U) == 0x4000U)
9915 // For a BLX instruction, make sure that the relocation is
9916 // rounded up to a word boundary. This follows the semantics of
9917 // the instruction which specifies that bit 1 of the target
9918 // address will come from bit 1 of the base address.
9919 branch_offset = (branch_offset + 2) & ~3;
9921 // Put BRANCH_OFFSET back into the insn.
9922 gold_assert(!utils::has_overflow<25>(branch_offset));
9923 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
9924 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
9931 // Put the relocated value back in the object file:
9932 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
9933 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
9936 template<bool big_endian>
9937 class Target_selector_arm : public Target_selector
9940 Target_selector_arm()
9941 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
9942 (big_endian ? "elf32-bigarm" : "elf32-littlearm"))
9946 do_instantiate_target()
9947 { return new Target_arm<big_endian>(); }
9950 // Fix .ARM.exidx section coverage.
9952 template<bool big_endian>
9954 Target_arm<big_endian>::fix_exidx_coverage(
9956 Arm_output_section<big_endian>* exidx_section,
9957 Symbol_table* symtab)
9959 // We need to look at all the input sections in output in ascending
9960 // order of of output address. We do that by building a sorted list
9961 // of output sections by addresses. Then we looks at the output sections
9962 // in order. The input sections in an output section are already sorted
9963 // by addresses within the output section.
9965 typedef std::set<Output_section*, output_section_address_less_than>
9966 Sorted_output_section_list;
9967 Sorted_output_section_list sorted_output_sections;
9968 Layout::Section_list section_list;
9969 layout->get_allocated_sections(§ion_list);
9970 for (Layout::Section_list::const_iterator p = section_list.begin();
9971 p != section_list.end();
9974 // We only care about output sections that contain executable code.
9975 if (((*p)->flags() & elfcpp::SHF_EXECINSTR) != 0)
9976 sorted_output_sections.insert(*p);
9979 // Go over the output sections in ascending order of output addresses.
9980 typedef typename Arm_output_section<big_endian>::Text_section_list
9982 Text_section_list sorted_text_sections;
9983 for(typename Sorted_output_section_list::iterator p =
9984 sorted_output_sections.begin();
9985 p != sorted_output_sections.end();
9988 Arm_output_section<big_endian>* arm_output_section =
9989 Arm_output_section<big_endian>::as_arm_output_section(*p);
9990 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
9993 exidx_section->fix_exidx_coverage(sorted_text_sections, symtab);
9996 Target_selector_arm<false> target_selector_arm;
9997 Target_selector_arm<true> target_selector_armbe;
9999 } // End anonymous namespace.