1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian>
61 class Output_data_plt_arm;
63 template<bool big_endian>
66 template<bool big_endian>
67 class Arm_input_section;
69 class Arm_exidx_cantunwind;
71 class Arm_exidx_merged_section;
73 class Arm_exidx_fixup;
75 template<bool big_endian>
76 class Arm_output_section;
78 class Arm_exidx_input_section;
80 template<bool big_endian>
83 template<bool big_endian>
84 class Arm_relocate_functions;
86 template<bool big_endian>
87 class Arm_output_data_got;
89 template<bool big_endian>
93 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
95 // Maximum branch offsets for ARM, THUMB and THUMB2.
96 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
97 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
98 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
99 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
100 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
101 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
103 // Thread Control Block size.
104 const size_t ARM_TCB_SIZE = 8;
106 // The arm target class.
108 // This is a very simple port of gold for ARM-EABI. It is intended for
109 // supporting Android only for the time being.
112 // - Implement all static relocation types documented in arm-reloc.def.
113 // - Make PLTs more flexible for different architecture features like
115 // There are probably a lot more.
117 // Ideally we would like to avoid using global variables but this is used
118 // very in many places and sometimes in loops. If we use a function
119 // returning a static instance of Arm_reloc_property_table, it will be very
120 // slow in an threaded environment since the static instance needs to be
121 // locked. The pointer is below initialized in the
122 // Target::do_select_as_default_target() hook so that we do not spend time
123 // building the table if we are not linking ARM objects.
125 // An alternative is to to process the information in arm-reloc.def in
126 // compilation time and generate a representation of it in PODs only. That
127 // way we can avoid initialization when the linker starts.
129 Arm_reloc_property_table* arm_reloc_property_table = NULL;
131 // Instruction template class. This class is similar to the insn_sequence
132 // struct in bfd/elf32-arm.c.
137 // Types of instruction templates.
141 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
142 // templates with class-specific semantics. Currently this is used
143 // only by the Cortex_a8_stub class for handling condition codes in
144 // conditional branches.
145 THUMB16_SPECIAL_TYPE,
151 // Factory methods to create instruction templates in different formats.
153 static const Insn_template
154 thumb16_insn(uint32_t data)
155 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
157 // A Thumb conditional branch, in which the proper condition is inserted
158 // when we build the stub.
159 static const Insn_template
160 thumb16_bcond_insn(uint32_t data)
161 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
163 static const Insn_template
164 thumb32_insn(uint32_t data)
165 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
167 static const Insn_template
168 thumb32_b_insn(uint32_t data, int reloc_addend)
170 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
174 static const Insn_template
175 arm_insn(uint32_t data)
176 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
178 static const Insn_template
179 arm_rel_insn(unsigned data, int reloc_addend)
180 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
182 static const Insn_template
183 data_word(unsigned data, unsigned int r_type, int reloc_addend)
184 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
186 // Accessors. This class is used for read-only objects so no modifiers
191 { return this->data_; }
193 // Return the instruction sequence type of this.
196 { return this->type_; }
198 // Return the ARM relocation type of this.
201 { return this->r_type_; }
205 { return this->reloc_addend_; }
207 // Return size of instruction template in bytes.
211 // Return byte-alignment of instruction template.
216 // We make the constructor private to ensure that only the factory
219 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
220 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
223 // Instruction specific data. This is used to store information like
224 // some of the instruction bits.
226 // Instruction template type.
228 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
229 unsigned int r_type_;
230 // Relocation addend.
231 int32_t reloc_addend_;
234 // Macro for generating code to stub types. One entry per long/short
238 DEF_STUB(long_branch_any_any) \
239 DEF_STUB(long_branch_v4t_arm_thumb) \
240 DEF_STUB(long_branch_thumb_only) \
241 DEF_STUB(long_branch_v4t_thumb_thumb) \
242 DEF_STUB(long_branch_v4t_thumb_arm) \
243 DEF_STUB(short_branch_v4t_thumb_arm) \
244 DEF_STUB(long_branch_any_arm_pic) \
245 DEF_STUB(long_branch_any_thumb_pic) \
246 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
247 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
248 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
249 DEF_STUB(long_branch_thumb_only_pic) \
250 DEF_STUB(a8_veneer_b_cond) \
251 DEF_STUB(a8_veneer_b) \
252 DEF_STUB(a8_veneer_bl) \
253 DEF_STUB(a8_veneer_blx) \
254 DEF_STUB(v4_veneer_bx)
258 #define DEF_STUB(x) arm_stub_##x,
264 // First reloc stub type.
265 arm_stub_reloc_first = arm_stub_long_branch_any_any,
266 // Last reloc stub type.
267 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
269 // First Cortex-A8 stub type.
270 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
271 // Last Cortex-A8 stub type.
272 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
275 arm_stub_type_last = arm_stub_v4_veneer_bx
279 // Stub template class. Templates are meant to be read-only objects.
280 // A stub template for a stub type contains all read-only attributes
281 // common to all stubs of the same type.
286 Stub_template(Stub_type, const Insn_template*, size_t);
294 { return this->type_; }
296 // Return an array of instruction templates.
299 { return this->insns_; }
301 // Return size of template in number of instructions.
304 { return this->insn_count_; }
306 // Return size of template in bytes.
309 { return this->size_; }
311 // Return alignment of the stub template.
314 { return this->alignment_; }
316 // Return whether entry point is in thumb mode.
318 entry_in_thumb_mode() const
319 { return this->entry_in_thumb_mode_; }
321 // Return number of relocations in this template.
324 { return this->relocs_.size(); }
326 // Return index of the I-th instruction with relocation.
328 reloc_insn_index(size_t i) const
330 gold_assert(i < this->relocs_.size());
331 return this->relocs_[i].first;
334 // Return the offset of the I-th instruction with relocation from the
335 // beginning of the stub.
337 reloc_offset(size_t i) const
339 gold_assert(i < this->relocs_.size());
340 return this->relocs_[i].second;
344 // This contains information about an instruction template with a relocation
345 // and its offset from start of stub.
346 typedef std::pair<size_t, section_size_type> Reloc;
348 // A Stub_template may not be copied. We want to share templates as much
350 Stub_template(const Stub_template&);
351 Stub_template& operator=(const Stub_template&);
355 // Points to an array of Insn_templates.
356 const Insn_template* insns_;
357 // Number of Insn_templates in insns_[].
359 // Size of templated instructions in bytes.
361 // Alignment of templated instructions.
363 // Flag to indicate if entry is in thumb mode.
364 bool entry_in_thumb_mode_;
365 // A table of reloc instruction indices and offsets. We can find these by
366 // looking at the instruction templates but we pre-compute and then stash
367 // them here for speed.
368 std::vector<Reloc> relocs_;
372 // A class for code stubs. This is a base class for different type of
373 // stubs used in the ARM target.
379 static const section_offset_type invalid_offset =
380 static_cast<section_offset_type>(-1);
383 Stub(const Stub_template* stub_template)
384 : stub_template_(stub_template), offset_(invalid_offset)
391 // Return the stub template.
393 stub_template() const
394 { return this->stub_template_; }
396 // Return offset of code stub from beginning of its containing stub table.
400 gold_assert(this->offset_ != invalid_offset);
401 return this->offset_;
404 // Set offset of code stub from beginning of its containing stub table.
406 set_offset(section_offset_type offset)
407 { this->offset_ = offset; }
409 // Return the relocation target address of the i-th relocation in the
410 // stub. This must be defined in a child class.
412 reloc_target(size_t i)
413 { return this->do_reloc_target(i); }
415 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
417 write(unsigned char* view, section_size_type view_size, bool big_endian)
418 { this->do_write(view, view_size, big_endian); }
420 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
421 // for the i-th instruction.
423 thumb16_special(size_t i)
424 { return this->do_thumb16_special(i); }
427 // This must be defined in the child class.
429 do_reloc_target(size_t) = 0;
431 // This may be overridden in the child class.
433 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
436 this->do_fixed_endian_write<true>(view, view_size);
438 this->do_fixed_endian_write<false>(view, view_size);
441 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
442 // instruction template.
444 do_thumb16_special(size_t)
445 { gold_unreachable(); }
448 // A template to implement do_write.
449 template<bool big_endian>
451 do_fixed_endian_write(unsigned char*, section_size_type);
454 const Stub_template* stub_template_;
455 // Offset within the section of containing this stub.
456 section_offset_type offset_;
459 // Reloc stub class. These are stubs we use to fix up relocation because
460 // of limited branch ranges.
462 class Reloc_stub : public Stub
465 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
466 // We assume we never jump to this address.
467 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
469 // Return destination address.
471 destination_address() const
473 gold_assert(this->destination_address_ != this->invalid_address);
474 return this->destination_address_;
477 // Set destination address.
479 set_destination_address(Arm_address address)
481 gold_assert(address != this->invalid_address);
482 this->destination_address_ = address;
485 // Reset destination address.
487 reset_destination_address()
488 { this->destination_address_ = this->invalid_address; }
490 // Determine stub type for a branch of a relocation of R_TYPE going
491 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
492 // the branch target is a thumb instruction. TARGET is used for look
493 // up ARM-specific linker settings.
495 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
496 Arm_address branch_target, bool target_is_thumb);
498 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
499 // and an addend. Since we treat global and local symbol differently, we
500 // use a Symbol object for a global symbol and a object-index pair for
505 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
506 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
507 // and R_SYM must not be invalid_index.
508 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
509 unsigned int r_sym, int32_t addend)
510 : stub_type_(stub_type), addend_(addend)
514 this->r_sym_ = Reloc_stub::invalid_index;
515 this->u_.symbol = symbol;
519 gold_assert(relobj != NULL && r_sym != invalid_index);
520 this->r_sym_ = r_sym;
521 this->u_.relobj = relobj;
528 // Accessors: Keys are meant to be read-only object so no modifiers are
534 { return this->stub_type_; }
536 // Return the local symbol index or invalid_index.
539 { return this->r_sym_; }
541 // Return the symbol if there is one.
544 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
546 // Return the relobj if there is one.
549 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
551 // Whether this equals to another key k.
553 eq(const Key& k) const
555 return ((this->stub_type_ == k.stub_type_)
556 && (this->r_sym_ == k.r_sym_)
557 && ((this->r_sym_ != Reloc_stub::invalid_index)
558 ? (this->u_.relobj == k.u_.relobj)
559 : (this->u_.symbol == k.u_.symbol))
560 && (this->addend_ == k.addend_));
563 // Return a hash value.
567 return (this->stub_type_
569 ^ gold::string_hash<char>(
570 (this->r_sym_ != Reloc_stub::invalid_index)
571 ? this->u_.relobj->name().c_str()
572 : this->u_.symbol->name())
576 // Functors for STL associative containers.
580 operator()(const Key& k) const
581 { return k.hash_value(); }
587 operator()(const Key& k1, const Key& k2) const
588 { return k1.eq(k2); }
591 // Name of key. This is mainly for debugging.
597 Stub_type stub_type_;
598 // If this is a local symbol, this is the index in the defining object.
599 // Otherwise, it is invalid_index for a global symbol.
601 // If r_sym_ is an invalid index, this points to a global symbol.
602 // Otherwise, it points to a relobj. We used the unsized and target
603 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
604 // Arm_relobj, in order to avoid making the stub class a template
605 // as most of the stub machinery is endianness-neutral. However, it
606 // may require a bit of casting done by users of this class.
609 const Symbol* symbol;
610 const Relobj* relobj;
612 // Addend associated with a reloc.
617 // Reloc_stubs are created via a stub factory. So these are protected.
618 Reloc_stub(const Stub_template* stub_template)
619 : Stub(stub_template), destination_address_(invalid_address)
625 friend class Stub_factory;
627 // Return the relocation target address of the i-th relocation in the
630 do_reloc_target(size_t i)
632 // All reloc stub have only one relocation.
634 return this->destination_address_;
638 // Address of destination.
639 Arm_address destination_address_;
642 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
643 // THUMB branch that meets the following conditions:
645 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
646 // branch address is 0xffe.
647 // 2. The branch target address is in the same page as the first word of the
649 // 3. The branch follows a 32-bit instruction which is not a branch.
651 // To do the fix up, we need to store the address of the branch instruction
652 // and its target at least. We also need to store the original branch
653 // instruction bits for the condition code in a conditional branch. The
654 // condition code is used in a special instruction template. We also want
655 // to identify input sections needing Cortex-A8 workaround quickly. We store
656 // extra information about object and section index of the code section
657 // containing a branch being fixed up. The information is used to mark
658 // the code section when we finalize the Cortex-A8 stubs.
661 class Cortex_a8_stub : public Stub
667 // Return the object of the code section containing the branch being fixed
671 { return this->relobj_; }
673 // Return the section index of the code section containing the branch being
677 { return this->shndx_; }
679 // Return the source address of stub. This is the address of the original
680 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
683 source_address() const
684 { return this->source_address_; }
686 // Return the destination address of the stub. This is the branch taken
687 // address of the original branch instruction. LSB is 1 if it is a THUMB
688 // instruction address.
690 destination_address() const
691 { return this->destination_address_; }
693 // Return the instruction being fixed up.
695 original_insn() const
696 { return this->original_insn_; }
699 // Cortex_a8_stubs are created via a stub factory. So these are protected.
700 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
701 unsigned int shndx, Arm_address source_address,
702 Arm_address destination_address, uint32_t original_insn)
703 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
704 source_address_(source_address | 1U),
705 destination_address_(destination_address),
706 original_insn_(original_insn)
709 friend class Stub_factory;
711 // Return the relocation target address of the i-th relocation in the
714 do_reloc_target(size_t i)
716 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
718 // The conditional branch veneer has two relocations.
720 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
724 // All other Cortex-A8 stubs have only one relocation.
726 return this->destination_address_;
730 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
732 do_thumb16_special(size_t);
735 // Object of the code section containing the branch being fixed up.
737 // Section index of the code section containing the branch begin fixed up.
739 // Source address of original branch.
740 Arm_address source_address_;
741 // Destination address of the original branch.
742 Arm_address destination_address_;
743 // Original branch instruction. This is needed for copying the condition
744 // code from a condition branch to its stub.
745 uint32_t original_insn_;
748 // ARMv4 BX Rx branch relocation stub class.
749 class Arm_v4bx_stub : public Stub
755 // Return the associated register.
758 { return this->reg_; }
761 // Arm V4BX stubs are created via a stub factory. So these are protected.
762 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
763 : Stub(stub_template), reg_(reg)
766 friend class Stub_factory;
768 // Return the relocation target address of the i-th relocation in the
771 do_reloc_target(size_t)
772 { gold_unreachable(); }
774 // This may be overridden in the child class.
776 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
779 this->do_fixed_endian_v4bx_write<true>(view, view_size);
781 this->do_fixed_endian_v4bx_write<false>(view, view_size);
785 // A template to implement do_write.
786 template<bool big_endian>
788 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
790 const Insn_template* insns = this->stub_template()->insns();
791 elfcpp::Swap<32, big_endian>::writeval(view,
793 + (this->reg_ << 16)));
794 view += insns[0].size();
795 elfcpp::Swap<32, big_endian>::writeval(view,
796 (insns[1].data() + this->reg_));
797 view += insns[1].size();
798 elfcpp::Swap<32, big_endian>::writeval(view,
799 (insns[2].data() + this->reg_));
802 // A register index (r0-r14), which is associated with the stub.
806 // Stub factory class.
811 // Return the unique instance of this class.
812 static const Stub_factory&
815 static Stub_factory singleton;
819 // Make a relocation stub.
821 make_reloc_stub(Stub_type stub_type) const
823 gold_assert(stub_type >= arm_stub_reloc_first
824 && stub_type <= arm_stub_reloc_last);
825 return new Reloc_stub(this->stub_templates_[stub_type]);
828 // Make a Cortex-A8 stub.
830 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
831 Arm_address source, Arm_address destination,
832 uint32_t original_insn) const
834 gold_assert(stub_type >= arm_stub_cortex_a8_first
835 && stub_type <= arm_stub_cortex_a8_last);
836 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
837 source, destination, original_insn);
840 // Make an ARM V4BX relocation stub.
841 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
843 make_arm_v4bx_stub(uint32_t reg) const
845 gold_assert(reg < 0xf);
846 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
851 // Constructor and destructor are protected since we only return a single
852 // instance created in Stub_factory::get_instance().
856 // A Stub_factory may not be copied since it is a singleton.
857 Stub_factory(const Stub_factory&);
858 Stub_factory& operator=(Stub_factory&);
860 // Stub templates. These are initialized in the constructor.
861 const Stub_template* stub_templates_[arm_stub_type_last+1];
864 // A class to hold stubs for the ARM target.
866 template<bool big_endian>
867 class Stub_table : public Output_data
870 Stub_table(Arm_input_section<big_endian>* owner)
871 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0),
872 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
873 prev_data_size_(0), prev_addralign_(1)
879 // Owner of this stub table.
880 Arm_input_section<big_endian>*
882 { return this->owner_; }
884 // Whether this stub table is empty.
888 return (this->reloc_stubs_.empty()
889 && this->cortex_a8_stubs_.empty()
890 && this->arm_v4bx_stubs_.empty());
893 // Return the current data size.
895 current_data_size() const
896 { return this->current_data_size_for_child(); }
898 // Add a STUB using KEY. The caller is responsible for avoiding addition
899 // if a STUB with the same key has already been added.
901 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
903 const Stub_template* stub_template = stub->stub_template();
904 gold_assert(stub_template->type() == key.stub_type());
905 this->reloc_stubs_[key] = stub;
907 // Assign stub offset early. We can do this because we never remove
908 // reloc stubs and they are in the beginning of the stub table.
909 uint64_t align = stub_template->alignment();
910 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align);
911 stub->set_offset(this->reloc_stubs_size_);
912 this->reloc_stubs_size_ += stub_template->size();
913 this->reloc_stubs_addralign_ =
914 std::max(this->reloc_stubs_addralign_, align);
917 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
918 // The caller is responsible for avoiding addition if a STUB with the same
919 // address has already been added.
921 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
923 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
924 this->cortex_a8_stubs_.insert(value);
927 // Add an ARM V4BX relocation stub. A register index will be retrieved
930 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
932 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
933 this->arm_v4bx_stubs_[stub->reg()] = stub;
936 // Remove all Cortex-A8 stubs.
938 remove_all_cortex_a8_stubs();
940 // Look up a relocation stub using KEY. Return NULL if there is none.
942 find_reloc_stub(const Reloc_stub::Key& key) const
944 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
945 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
948 // Look up an arm v4bx relocation stub using the register index.
949 // Return NULL if there is none.
951 find_arm_v4bx_stub(const uint32_t reg) const
953 gold_assert(reg < 0xf);
954 return this->arm_v4bx_stubs_[reg];
957 // Relocate stubs in this stub table.
959 relocate_stubs(const Relocate_info<32, big_endian>*,
960 Target_arm<big_endian>*, Output_section*,
961 unsigned char*, Arm_address, section_size_type);
963 // Update data size and alignment at the end of a relaxation pass. Return
964 // true if either data size or alignment is different from that of the
965 // previous relaxation pass.
967 update_data_size_and_addralign();
969 // Finalize stubs. Set the offsets of all stubs and mark input sections
970 // needing the Cortex-A8 workaround.
974 // Apply Cortex-A8 workaround to an address range.
976 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
977 unsigned char*, Arm_address,
981 // Write out section contents.
983 do_write(Output_file*);
985 // Return the required alignment.
988 { return this->prev_addralign_; }
990 // Reset address and file offset.
992 do_reset_address_and_file_offset()
993 { this->set_current_data_size_for_child(this->prev_data_size_); }
995 // Set final data size.
997 set_final_data_size()
998 { this->set_data_size(this->current_data_size()); }
1001 // Relocate one stub.
1003 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
1004 Target_arm<big_endian>*, Output_section*,
1005 unsigned char*, Arm_address, section_size_type);
1007 // Unordered map of relocation stubs.
1009 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
1010 Reloc_stub::Key::equal_to>
1013 // List of Cortex-A8 stubs ordered by addresses of branches being
1014 // fixed up in output.
1015 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1016 // List of Arm V4BX relocation stubs ordered by associated registers.
1017 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1019 // Owner of this stub table.
1020 Arm_input_section<big_endian>* owner_;
1021 // The relocation stubs.
1022 Reloc_stub_map reloc_stubs_;
1023 // Size of reloc stubs.
1024 off_t reloc_stubs_size_;
1025 // Maximum address alignment of reloc stubs.
1026 uint64_t reloc_stubs_addralign_;
1027 // The cortex_a8_stubs.
1028 Cortex_a8_stub_list cortex_a8_stubs_;
1029 // The Arm V4BX relocation stubs.
1030 Arm_v4bx_stub_list arm_v4bx_stubs_;
1031 // data size of this in the previous pass.
1032 off_t prev_data_size_;
1033 // address alignment of this in the previous pass.
1034 uint64_t prev_addralign_;
1037 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1038 // we add to the end of an EXIDX input section that goes into the output.
1040 class Arm_exidx_cantunwind : public Output_section_data
1043 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1044 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1047 // Return the object containing the section pointed by this.
1050 { return this->relobj_; }
1052 // Return the section index of the section pointed by this.
1055 { return this->shndx_; }
1059 do_write(Output_file* of)
1061 if (parameters->target().is_big_endian())
1062 this->do_fixed_endian_write<true>(of);
1064 this->do_fixed_endian_write<false>(of);
1067 // Write to a map file.
1069 do_print_to_mapfile(Mapfile* mapfile) const
1070 { mapfile->print_output_data(this, _("** ARM cantunwind")); }
1073 // Implement do_write for a given endianness.
1074 template<bool big_endian>
1076 do_fixed_endian_write(Output_file*);
1078 // The object containing the section pointed by this.
1080 // The section index of the section pointed by this.
1081 unsigned int shndx_;
1084 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1085 // Offset map is used to map input section offset within the EXIDX section
1086 // to the output offset from the start of this EXIDX section.
1088 typedef std::map<section_offset_type, section_offset_type>
1089 Arm_exidx_section_offset_map;
1091 // Arm_exidx_merged_section class. This represents an EXIDX input section
1092 // with some of its entries merged.
1094 class Arm_exidx_merged_section : public Output_relaxed_input_section
1097 // Constructor for Arm_exidx_merged_section.
1098 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1099 // SECTION_OFFSET_MAP points to a section offset map describing how
1100 // parts of the input section are mapped to output. DELETED_BYTES is
1101 // the number of bytes deleted from the EXIDX input section.
1102 Arm_exidx_merged_section(
1103 const Arm_exidx_input_section& exidx_input_section,
1104 const Arm_exidx_section_offset_map& section_offset_map,
1105 uint32_t deleted_bytes);
1107 // Build output contents.
1109 build_contents(const unsigned char*, section_size_type);
1111 // Return the original EXIDX input section.
1112 const Arm_exidx_input_section&
1113 exidx_input_section() const
1114 { return this->exidx_input_section_; }
1116 // Return the section offset map.
1117 const Arm_exidx_section_offset_map&
1118 section_offset_map() const
1119 { return this->section_offset_map_; }
1122 // Write merged section into file OF.
1124 do_write(Output_file* of);
1127 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1128 section_offset_type*) const;
1131 // Original EXIDX input section.
1132 const Arm_exidx_input_section& exidx_input_section_;
1133 // Section offset map.
1134 const Arm_exidx_section_offset_map& section_offset_map_;
1135 // Merged section contents. We need to keep build the merged section
1136 // and save it here to avoid accessing the original EXIDX section when
1137 // we cannot lock the sections' object.
1138 unsigned char* section_contents_;
1141 // A class to wrap an ordinary input section containing executable code.
1143 template<bool big_endian>
1144 class Arm_input_section : public Output_relaxed_input_section
1147 Arm_input_section(Relobj* relobj, unsigned int shndx)
1148 : Output_relaxed_input_section(relobj, shndx, 1),
1149 original_addralign_(1), original_size_(0), stub_table_(NULL),
1150 original_contents_(NULL)
1153 ~Arm_input_section()
1154 { delete[] this->original_contents_; }
1160 // Whether this is a stub table owner.
1162 is_stub_table_owner() const
1163 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1165 // Return the stub table.
1166 Stub_table<big_endian>*
1168 { return this->stub_table_; }
1170 // Set the stub_table.
1172 set_stub_table(Stub_table<big_endian>* stub_table)
1173 { this->stub_table_ = stub_table; }
1175 // Downcast a base pointer to an Arm_input_section pointer. This is
1176 // not type-safe but we only use Arm_input_section not the base class.
1177 static Arm_input_section<big_endian>*
1178 as_arm_input_section(Output_relaxed_input_section* poris)
1179 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1181 // Return the original size of the section.
1183 original_size() const
1184 { return this->original_size_; }
1187 // Write data to output file.
1189 do_write(Output_file*);
1191 // Return required alignment of this.
1193 do_addralign() const
1195 if (this->is_stub_table_owner())
1196 return std::max(this->stub_table_->addralign(),
1197 static_cast<uint64_t>(this->original_addralign_));
1199 return this->original_addralign_;
1202 // Finalize data size.
1204 set_final_data_size();
1206 // Reset address and file offset.
1208 do_reset_address_and_file_offset();
1212 do_output_offset(const Relobj* object, unsigned int shndx,
1213 section_offset_type offset,
1214 section_offset_type* poutput) const
1216 if ((object == this->relobj())
1217 && (shndx == this->shndx())
1220 convert_types<section_offset_type, uint32_t>(this->original_size_)))
1230 // Copying is not allowed.
1231 Arm_input_section(const Arm_input_section&);
1232 Arm_input_section& operator=(const Arm_input_section&);
1234 // Address alignment of the original input section.
1235 uint32_t original_addralign_;
1236 // Section size of the original input section.
1237 uint32_t original_size_;
1239 Stub_table<big_endian>* stub_table_;
1240 // Original section contents. We have to make a copy here since the file
1241 // containing the original section may not be locked when we need to access
1243 unsigned char* original_contents_;
1246 // Arm_exidx_fixup class. This is used to define a number of methods
1247 // and keep states for fixing up EXIDX coverage.
1249 class Arm_exidx_fixup
1252 Arm_exidx_fixup(Output_section* exidx_output_section,
1253 bool merge_exidx_entries = true)
1254 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1255 last_inlined_entry_(0), last_input_section_(NULL),
1256 section_offset_map_(NULL), first_output_text_section_(NULL),
1257 merge_exidx_entries_(merge_exidx_entries)
1261 { delete this->section_offset_map_; }
1263 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1264 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1265 // number of bytes to be deleted in output. If parts of the input EXIDX
1266 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1267 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1268 // responsible for releasing it.
1269 template<bool big_endian>
1271 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1272 const unsigned char* section_contents,
1273 section_size_type section_size,
1274 Arm_exidx_section_offset_map** psection_offset_map);
1276 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1277 // input section, if there is not one already.
1279 add_exidx_cantunwind_as_needed();
1281 // Return the output section for the text section which is linked to the
1282 // first exidx input in output.
1284 first_output_text_section() const
1285 { return this->first_output_text_section_; }
1288 // Copying is not allowed.
1289 Arm_exidx_fixup(const Arm_exidx_fixup&);
1290 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1292 // Type of EXIDX unwind entry.
1297 // EXIDX_CANTUNWIND.
1298 UT_EXIDX_CANTUNWIND,
1305 // Process an EXIDX entry. We only care about the second word of the
1306 // entry. Return true if the entry can be deleted.
1308 process_exidx_entry(uint32_t second_word);
1310 // Update the current section offset map during EXIDX section fix-up.
1311 // If there is no map, create one. INPUT_OFFSET is the offset of a
1312 // reference point, DELETED_BYTES is the number of deleted by in the
1313 // section so far. If DELETE_ENTRY is true, the reference point and
1314 // all offsets after the previous reference point are discarded.
1316 update_offset_map(section_offset_type input_offset,
1317 section_size_type deleted_bytes, bool delete_entry);
1319 // EXIDX output section.
1320 Output_section* exidx_output_section_;
1321 // Unwind type of the last EXIDX entry processed.
1322 Unwind_type last_unwind_type_;
1323 // Last seen inlined EXIDX entry.
1324 uint32_t last_inlined_entry_;
1325 // Last processed EXIDX input section.
1326 const Arm_exidx_input_section* last_input_section_;
1327 // Section offset map created in process_exidx_section.
1328 Arm_exidx_section_offset_map* section_offset_map_;
1329 // Output section for the text section which is linked to the first exidx
1331 Output_section* first_output_text_section_;
1333 bool merge_exidx_entries_;
1336 // Arm output section class. This is defined mainly to add a number of
1337 // stub generation methods.
1339 template<bool big_endian>
1340 class Arm_output_section : public Output_section
1343 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1345 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1346 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1347 elfcpp::Elf_Xword flags)
1348 : Output_section(name, type,
1349 (type == elfcpp::SHT_ARM_EXIDX
1350 ? flags | elfcpp::SHF_LINK_ORDER
1353 if (type == elfcpp::SHT_ARM_EXIDX)
1354 this->set_always_keeps_input_sections();
1357 ~Arm_output_section()
1360 // Group input sections for stub generation.
1362 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*);
1364 // Downcast a base pointer to an Arm_output_section pointer. This is
1365 // not type-safe but we only use Arm_output_section not the base class.
1366 static Arm_output_section<big_endian>*
1367 as_arm_output_section(Output_section* os)
1368 { return static_cast<Arm_output_section<big_endian>*>(os); }
1370 // Append all input text sections in this into LIST.
1372 append_text_sections_to_list(Text_section_list* list);
1374 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1375 // is a list of text input sections sorted in ascending order of their
1376 // output addresses.
1378 fix_exidx_coverage(Layout* layout,
1379 const Text_section_list& sorted_text_section,
1380 Symbol_table* symtab,
1381 bool merge_exidx_entries,
1384 // Link an EXIDX section into its corresponding text section.
1386 set_exidx_section_link();
1390 typedef Output_section::Input_section Input_section;
1391 typedef Output_section::Input_section_list Input_section_list;
1393 // Create a stub group.
1394 void create_stub_group(Input_section_list::const_iterator,
1395 Input_section_list::const_iterator,
1396 Input_section_list::const_iterator,
1397 Target_arm<big_endian>*,
1398 std::vector<Output_relaxed_input_section*>*,
1402 // Arm_exidx_input_section class. This represents an EXIDX input section.
1404 class Arm_exidx_input_section
1407 static const section_offset_type invalid_offset =
1408 static_cast<section_offset_type>(-1);
1410 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1411 unsigned int link, uint32_t size,
1412 uint32_t addralign, uint32_t text_size)
1413 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1414 addralign_(addralign), text_size_(text_size), has_errors_(false)
1417 ~Arm_exidx_input_section()
1420 // Accessors: This is a read-only class.
1422 // Return the object containing this EXIDX input section.
1425 { return this->relobj_; }
1427 // Return the section index of this EXIDX input section.
1430 { return this->shndx_; }
1432 // Return the section index of linked text section in the same object.
1435 { return this->link_; }
1437 // Return size of the EXIDX input section.
1440 { return this->size_; }
1442 // Return address alignment of EXIDX input section.
1445 { return this->addralign_; }
1447 // Return size of the associated text input section.
1450 { return this->text_size_; }
1452 // Whether there are any errors in the EXIDX input section.
1455 { return this->has_errors_; }
1457 // Set has-errors flag.
1460 { this->has_errors_ = true; }
1463 // Object containing this.
1465 // Section index of this.
1466 unsigned int shndx_;
1467 // text section linked to this in the same object.
1469 // Size of this. For ARM 32-bit is sufficient.
1471 // Address alignment of this. For ARM 32-bit is sufficient.
1472 uint32_t addralign_;
1473 // Size of associated text section.
1474 uint32_t text_size_;
1475 // Whether this has any errors.
1479 // Arm_relobj class.
1481 template<bool big_endian>
1482 class Arm_relobj : public Sized_relobj_file<32, big_endian>
1485 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1487 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1488 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1489 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr),
1490 stub_tables_(), local_symbol_is_thumb_function_(),
1491 attributes_section_data_(NULL), mapping_symbols_info_(),
1492 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1493 output_local_symbol_count_needs_update_(false),
1494 merge_flags_and_attributes_(true)
1498 { delete this->attributes_section_data_; }
1500 // Return the stub table of the SHNDX-th section if there is one.
1501 Stub_table<big_endian>*
1502 stub_table(unsigned int shndx) const
1504 gold_assert(shndx < this->stub_tables_.size());
1505 return this->stub_tables_[shndx];
1508 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1510 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1512 gold_assert(shndx < this->stub_tables_.size());
1513 this->stub_tables_[shndx] = stub_table;
1516 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1517 // index. This is only valid after do_count_local_symbol is called.
1519 local_symbol_is_thumb_function(unsigned int r_sym) const
1521 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1522 return this->local_symbol_is_thumb_function_[r_sym];
1525 // Scan all relocation sections for stub generation.
1527 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1530 // Convert regular input section with index SHNDX to a relaxed section.
1532 convert_input_section_to_relaxed_section(unsigned shndx)
1534 // The stubs have relocations and we need to process them after writing
1535 // out the stubs. So relocation now must follow section write.
1536 this->set_section_offset(shndx, -1ULL);
1537 this->set_relocs_must_follow_section_writes();
1540 // Downcast a base pointer to an Arm_relobj pointer. This is
1541 // not type-safe but we only use Arm_relobj not the base class.
1542 static Arm_relobj<big_endian>*
1543 as_arm_relobj(Relobj* relobj)
1544 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1546 // Processor-specific flags in ELF file header. This is valid only after
1549 processor_specific_flags() const
1550 { return this->processor_specific_flags_; }
1552 // Attribute section data This is the contents of the .ARM.attribute section
1554 const Attributes_section_data*
1555 attributes_section_data() const
1556 { return this->attributes_section_data_; }
1558 // Mapping symbol location.
1559 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1561 // Functor for STL container.
1562 struct Mapping_symbol_position_less
1565 operator()(const Mapping_symbol_position& p1,
1566 const Mapping_symbol_position& p2) const
1568 return (p1.first < p2.first
1569 || (p1.first == p2.first && p1.second < p2.second));
1573 // We only care about the first character of a mapping symbol, so
1574 // we only store that instead of the whole symbol name.
1575 typedef std::map<Mapping_symbol_position, char,
1576 Mapping_symbol_position_less> Mapping_symbols_info;
1578 // Whether a section contains any Cortex-A8 workaround.
1580 section_has_cortex_a8_workaround(unsigned int shndx) const
1582 return (this->section_has_cortex_a8_workaround_ != NULL
1583 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1586 // Mark a section that has Cortex-A8 workaround.
1588 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1590 if (this->section_has_cortex_a8_workaround_ == NULL)
1591 this->section_has_cortex_a8_workaround_ =
1592 new std::vector<bool>(this->shnum(), false);
1593 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1596 // Return the EXIDX section of an text section with index SHNDX or NULL
1597 // if the text section has no associated EXIDX section.
1598 const Arm_exidx_input_section*
1599 exidx_input_section_by_link(unsigned int shndx) const
1601 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1602 return ((p != this->exidx_section_map_.end()
1603 && p->second->link() == shndx)
1608 // Return the EXIDX section with index SHNDX or NULL if there is none.
1609 const Arm_exidx_input_section*
1610 exidx_input_section_by_shndx(unsigned shndx) const
1612 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1613 return ((p != this->exidx_section_map_.end()
1614 && p->second->shndx() == shndx)
1619 // Whether output local symbol count needs updating.
1621 output_local_symbol_count_needs_update() const
1622 { return this->output_local_symbol_count_needs_update_; }
1624 // Set output_local_symbol_count_needs_update flag to be true.
1626 set_output_local_symbol_count_needs_update()
1627 { this->output_local_symbol_count_needs_update_ = true; }
1629 // Update output local symbol count at the end of relaxation.
1631 update_output_local_symbol_count();
1633 // Whether we want to merge processor-specific flags and attributes.
1635 merge_flags_and_attributes() const
1636 { return this->merge_flags_and_attributes_; }
1638 // Export list of EXIDX section indices.
1640 get_exidx_shndx_list(std::vector<unsigned int>* list) const
1643 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin();
1644 p != this->exidx_section_map_.end();
1647 if (p->second->shndx() == p->first)
1648 list->push_back(p->first);
1650 // Sort list to make result independent of implementation of map.
1651 std::sort(list->begin(), list->end());
1655 // Post constructor setup.
1659 // Call parent's setup method.
1660 Sized_relobj_file<32, big_endian>::do_setup();
1662 // Initialize look-up tables.
1663 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1664 this->stub_tables_.swap(empty_stub_table_list);
1667 // Count the local symbols.
1669 do_count_local_symbols(Stringpool_template<char>*,
1670 Stringpool_template<char>*);
1673 do_relocate_sections(
1674 const Symbol_table* symtab, const Layout* layout,
1675 const unsigned char* pshdrs, Output_file* of,
1676 typename Sized_relobj_file<32, big_endian>::Views* pivews);
1678 // Read the symbol information.
1680 do_read_symbols(Read_symbols_data* sd);
1682 // Process relocs for garbage collection.
1684 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1688 // Whether a section needs to be scanned for relocation stubs.
1690 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1691 const Relobj::Output_sections&,
1692 const Symbol_table*, const unsigned char*);
1694 // Whether a section is a scannable text section.
1696 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1697 const Output_section*, const Symbol_table*);
1699 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1701 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1702 unsigned int, Output_section*,
1703 const Symbol_table*);
1705 // Scan a section for the Cortex-A8 erratum.
1707 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1708 unsigned int, Output_section*,
1709 Target_arm<big_endian>*);
1711 // Find the linked text section of an EXIDX section by looking at the
1712 // first relocation of the EXIDX section. PSHDR points to the section
1713 // headers of a relocation section and PSYMS points to the local symbols.
1714 // PSHNDX points to a location storing the text section index if found.
1715 // Return whether we can find the linked section.
1717 find_linked_text_section(const unsigned char* pshdr,
1718 const unsigned char* psyms, unsigned int* pshndx);
1721 // Make a new Arm_exidx_input_section object for EXIDX section with
1722 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1723 // index of the linked text section.
1725 make_exidx_input_section(unsigned int shndx,
1726 const elfcpp::Shdr<32, big_endian>& shdr,
1727 unsigned int text_shndx,
1728 const elfcpp::Shdr<32, big_endian>& text_shdr);
1730 // Return the output address of either a plain input section or a
1731 // relaxed input section. SHNDX is the section index.
1733 simple_input_section_output_address(unsigned int, Output_section*);
1735 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1736 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1739 // List of stub tables.
1740 Stub_table_list stub_tables_;
1741 // Bit vector to tell if a local symbol is a thumb function or not.
1742 // This is only valid after do_count_local_symbol is called.
1743 std::vector<bool> local_symbol_is_thumb_function_;
1744 // processor-specific flags in ELF file header.
1745 elfcpp::Elf_Word processor_specific_flags_;
1746 // Object attributes if there is an .ARM.attributes section or NULL.
1747 Attributes_section_data* attributes_section_data_;
1748 // Mapping symbols information.
1749 Mapping_symbols_info mapping_symbols_info_;
1750 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1751 std::vector<bool>* section_has_cortex_a8_workaround_;
1752 // Map a text section to its associated .ARM.exidx section, if there is one.
1753 Exidx_section_map exidx_section_map_;
1754 // Whether output local symbol count needs updating.
1755 bool output_local_symbol_count_needs_update_;
1756 // Whether we merge processor flags and attributes of this object to
1758 bool merge_flags_and_attributes_;
1761 // Arm_dynobj class.
1763 template<bool big_endian>
1764 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1767 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1768 const elfcpp::Ehdr<32, big_endian>& ehdr)
1769 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1770 processor_specific_flags_(0), attributes_section_data_(NULL)
1774 { delete this->attributes_section_data_; }
1776 // Downcast a base pointer to an Arm_relobj pointer. This is
1777 // not type-safe but we only use Arm_relobj not the base class.
1778 static Arm_dynobj<big_endian>*
1779 as_arm_dynobj(Dynobj* dynobj)
1780 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1782 // Processor-specific flags in ELF file header. This is valid only after
1785 processor_specific_flags() const
1786 { return this->processor_specific_flags_; }
1788 // Attributes section data.
1789 const Attributes_section_data*
1790 attributes_section_data() const
1791 { return this->attributes_section_data_; }
1794 // Read the symbol information.
1796 do_read_symbols(Read_symbols_data* sd);
1799 // processor-specific flags in ELF file header.
1800 elfcpp::Elf_Word processor_specific_flags_;
1801 // Object attributes if there is an .ARM.attributes section or NULL.
1802 Attributes_section_data* attributes_section_data_;
1805 // Functor to read reloc addends during stub generation.
1807 template<int sh_type, bool big_endian>
1808 struct Stub_addend_reader
1810 // Return the addend for a relocation of a particular type. Depending
1811 // on whether this is a REL or RELA relocation, read the addend from a
1812 // view or from a Reloc object.
1813 elfcpp::Elf_types<32>::Elf_Swxword
1815 unsigned int /* r_type */,
1816 const unsigned char* /* view */,
1817 const typename Reloc_types<sh_type,
1818 32, big_endian>::Reloc& /* reloc */) const;
1821 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1823 template<bool big_endian>
1824 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1826 elfcpp::Elf_types<32>::Elf_Swxword
1829 const unsigned char*,
1830 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1833 // Specialized Stub_addend_reader for RELA type relocation sections.
1834 // We currently do not handle RELA type relocation sections but it is trivial
1835 // to implement the addend reader. This is provided for completeness and to
1836 // make it easier to add support for RELA relocation sections in the future.
1838 template<bool big_endian>
1839 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1841 elfcpp::Elf_types<32>::Elf_Swxword
1844 const unsigned char*,
1845 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1846 big_endian>::Reloc& reloc) const
1847 { return reloc.get_r_addend(); }
1850 // Cortex_a8_reloc class. We keep record of relocation that may need
1851 // the Cortex-A8 erratum workaround.
1853 class Cortex_a8_reloc
1856 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1857 Arm_address destination)
1858 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1864 // Accessors: This is a read-only class.
1866 // Return the relocation stub associated with this relocation if there is
1870 { return this->reloc_stub_; }
1872 // Return the relocation type.
1875 { return this->r_type_; }
1877 // Return the destination address of the relocation. LSB stores the THUMB
1881 { return this->destination_; }
1884 // Associated relocation stub if there is one, or NULL.
1885 const Reloc_stub* reloc_stub_;
1887 unsigned int r_type_;
1888 // Destination address of this relocation. LSB is used to distinguish
1890 Arm_address destination_;
1893 // Arm_output_data_got class. We derive this from Output_data_got to add
1894 // extra methods to handle TLS relocations in a static link.
1896 template<bool big_endian>
1897 class Arm_output_data_got : public Output_data_got<32, big_endian>
1900 Arm_output_data_got(Symbol_table* symtab, Layout* layout)
1901 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout)
1904 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1905 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1906 // applied in a static link.
1908 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1909 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); }
1911 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1912 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1913 // relocation that needs to be applied in a static link.
1915 add_static_reloc(unsigned int got_offset, unsigned int r_type,
1916 Sized_relobj_file<32, big_endian>* relobj,
1919 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj,
1923 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1924 // The first one is initialized to be 1, which is the module index for
1925 // the main executable and the second one 0. A reloc of the type
1926 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1927 // be applied by gold. GSYM is a global symbol.
1929 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym);
1931 // Same as the above but for a local symbol in OBJECT with INDEX.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type,
1934 Sized_relobj_file<32, big_endian>* object,
1935 unsigned int index);
1938 // Write out the GOT table.
1940 do_write(Output_file*);
1943 // This class represent dynamic relocations that need to be applied by
1944 // gold because we are using TLS relocations in a static link.
1948 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1949 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true)
1950 { this->u_.global.symbol = gsym; }
1952 Static_reloc(unsigned int got_offset, unsigned int r_type,
1953 Sized_relobj_file<32, big_endian>* relobj, unsigned int index)
1954 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false)
1956 this->u_.local.relobj = relobj;
1957 this->u_.local.index = index;
1960 // Return the GOT offset.
1963 { return this->got_offset_; }
1968 { return this->r_type_; }
1970 // Whether the symbol is global or not.
1972 symbol_is_global() const
1973 { return this->symbol_is_global_; }
1975 // For a relocation against a global symbol, the global symbol.
1979 gold_assert(this->symbol_is_global_);
1980 return this->u_.global.symbol;
1983 // For a relocation against a local symbol, the defining object.
1984 Sized_relobj_file<32, big_endian>*
1987 gold_assert(!this->symbol_is_global_);
1988 return this->u_.local.relobj;
1991 // For a relocation against a local symbol, the local symbol index.
1995 gold_assert(!this->symbol_is_global_);
1996 return this->u_.local.index;
2000 // GOT offset of the entry to which this relocation is applied.
2001 unsigned int got_offset_;
2002 // Type of relocation.
2003 unsigned int r_type_;
2004 // Whether this relocation is against a global symbol.
2005 bool symbol_is_global_;
2006 // A global or local symbol.
2011 // For a global symbol, the symbol itself.
2016 // For a local symbol, the object defining object.
2017 Sized_relobj_file<32, big_endian>* relobj;
2018 // For a local symbol, the symbol index.
2024 // Symbol table of the output object.
2025 Symbol_table* symbol_table_;
2026 // Layout of the output object.
2028 // Static relocs to be applied to the GOT.
2029 std::vector<Static_reloc> static_relocs_;
2032 // The ARM target has many relocation types with odd-sizes or noncontiguous
2033 // bits. The default handling of relocatable relocation cannot process these
2034 // relocations. So we have to extend the default code.
2036 template<bool big_endian, int sh_type, typename Classify_reloc>
2037 class Arm_scan_relocatable_relocs :
2038 public Default_scan_relocatable_relocs<sh_type, Classify_reloc>
2041 // Return the strategy to use for a local symbol which is a section
2042 // symbol, given the relocation type.
2043 inline Relocatable_relocs::Reloc_strategy
2044 local_section_strategy(unsigned int r_type, Relobj*)
2046 if (sh_type == elfcpp::SHT_RELA)
2047 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA;
2050 if (r_type == elfcpp::R_ARM_TARGET1
2051 || r_type == elfcpp::R_ARM_TARGET2)
2053 const Target_arm<big_endian>* arm_target =
2054 Target_arm<big_endian>::default_target();
2055 r_type = arm_target->get_real_reloc_type(r_type);
2060 // Relocations that write nothing. These exclude R_ARM_TARGET1
2061 // and R_ARM_TARGET2.
2062 case elfcpp::R_ARM_NONE:
2063 case elfcpp::R_ARM_V4BX:
2064 case elfcpp::R_ARM_TLS_GOTDESC:
2065 case elfcpp::R_ARM_TLS_CALL:
2066 case elfcpp::R_ARM_TLS_DESCSEQ:
2067 case elfcpp::R_ARM_THM_TLS_CALL:
2068 case elfcpp::R_ARM_GOTRELAX:
2069 case elfcpp::R_ARM_GNU_VTENTRY:
2070 case elfcpp::R_ARM_GNU_VTINHERIT:
2071 case elfcpp::R_ARM_THM_TLS_DESCSEQ16:
2072 case elfcpp::R_ARM_THM_TLS_DESCSEQ32:
2073 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0;
2074 // These should have been converted to something else above.
2075 case elfcpp::R_ARM_TARGET1:
2076 case elfcpp::R_ARM_TARGET2:
2078 // Relocations that write full 32 bits.
2079 case elfcpp::R_ARM_ABS32:
2080 case elfcpp::R_ARM_REL32:
2081 case elfcpp::R_ARM_SBREL32:
2082 case elfcpp::R_ARM_GOTOFF32:
2083 case elfcpp::R_ARM_BASE_PREL:
2084 case elfcpp::R_ARM_GOT_BREL:
2085 case elfcpp::R_ARM_BASE_ABS:
2086 case elfcpp::R_ARM_ABS32_NOI:
2087 case elfcpp::R_ARM_REL32_NOI:
2088 case elfcpp::R_ARM_PLT32_ABS:
2089 case elfcpp::R_ARM_GOT_ABS:
2090 case elfcpp::R_ARM_GOT_PREL:
2091 case elfcpp::R_ARM_TLS_GD32:
2092 case elfcpp::R_ARM_TLS_LDM32:
2093 case elfcpp::R_ARM_TLS_LDO32:
2094 case elfcpp::R_ARM_TLS_IE32:
2095 case elfcpp::R_ARM_TLS_LE32:
2096 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4;
2098 // For all other static relocations, return RELOC_SPECIAL.
2099 return Relocatable_relocs::RELOC_SPECIAL;
2105 // Utilities for manipulating integers of up to 32-bits
2109 // Sign extend an n-bit unsigned integer stored in an uint32_t into
2110 // an int32_t. NO_BITS must be between 1 to 32.
2111 template<int no_bits>
2112 static inline int32_t
2113 sign_extend(uint32_t bits)
2115 gold_assert(no_bits >= 0 && no_bits <= 32);
2117 return static_cast<int32_t>(bits);
2118 uint32_t mask = (~((uint32_t) 0)) >> (32 - no_bits);
2120 uint32_t top_bit = 1U << (no_bits - 1);
2121 int32_t as_signed = static_cast<int32_t>(bits);
2122 return (bits & top_bit) ? as_signed + (-top_bit * 2) : as_signed;
2125 // Detects overflow of an NO_BITS integer stored in a uint32_t.
2126 template<int no_bits>
2128 has_overflow(uint32_t bits)
2130 gold_assert(no_bits >= 0 && no_bits <= 32);
2133 int32_t max = (1 << (no_bits - 1)) - 1;
2134 int32_t min = -(1 << (no_bits - 1));
2135 int32_t as_signed = static_cast<int32_t>(bits);
2136 return as_signed > max || as_signed < min;
2139 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
2140 // fits in the given number of bits as either a signed or unsigned value.
2141 // For example, has_signed_unsigned_overflow<8> would check
2142 // -128 <= bits <= 255
2143 template<int no_bits>
2145 has_signed_unsigned_overflow(uint32_t bits)
2147 gold_assert(no_bits >= 2 && no_bits <= 32);
2150 int32_t max = static_cast<int32_t>((1U << no_bits) - 1);
2151 int32_t min = -(1 << (no_bits - 1));
2152 int32_t as_signed = static_cast<int32_t>(bits);
2153 return as_signed > max || as_signed < min;
2156 // Select bits from A and B using bits in MASK. For each n in [0..31],
2157 // the n-th bit in the result is chosen from the n-th bits of A and B.
2158 // A zero selects A and a one selects B.
2159 static inline uint32_t
2160 bit_select(uint32_t a, uint32_t b, uint32_t mask)
2161 { return (a & ~mask) | (b & mask); }
2164 template<bool big_endian>
2165 class Target_arm : public Sized_target<32, big_endian>
2168 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
2171 // When were are relocating a stub, we pass this as the relocation number.
2172 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
2175 : Sized_target<32, big_endian>(&arm_info),
2176 got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL),
2177 copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL),
2178 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2179 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2180 may_use_blx_(false), should_force_pic_veneer_(false),
2181 arm_input_section_map_(), attributes_section_data_(NULL),
2182 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2185 // Virtual function which is set to return true by a target if
2186 // it can use relocation types to determine if a function's
2187 // pointer is taken.
2189 can_check_for_function_pointers() const
2192 // Whether a section called SECTION_NAME may have function pointers to
2193 // sections not eligible for safe ICF folding.
2195 section_may_have_icf_unsafe_pointers(const char* section_name) const
2197 return (!is_prefix_of(".ARM.exidx", section_name)
2198 && !is_prefix_of(".ARM.extab", section_name)
2199 && Target::section_may_have_icf_unsafe_pointers(section_name));
2202 // Whether we can use BLX.
2205 { return this->may_use_blx_; }
2207 // Set use-BLX flag.
2209 set_may_use_blx(bool value)
2210 { this->may_use_blx_ = value; }
2212 // Whether we force PCI branch veneers.
2214 should_force_pic_veneer() const
2215 { return this->should_force_pic_veneer_; }
2217 // Set PIC veneer flag.
2219 set_should_force_pic_veneer(bool value)
2220 { this->should_force_pic_veneer_ = value; }
2222 // Whether we use THUMB-2 instructions.
2224 using_thumb2() const
2226 Object_attribute* attr =
2227 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2228 int arch = attr->int_value();
2229 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
2232 // Whether we use THUMB/THUMB-2 instructions only.
2234 using_thumb_only() const
2236 Object_attribute* attr =
2237 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2239 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2240 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M)
2242 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
2243 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
2245 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
2246 return attr->int_value() == 'M';
2249 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2251 may_use_arm_nop() const
2253 Object_attribute* attr =
2254 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2255 int arch = attr->int_value();
2256 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2257 || arch == elfcpp::TAG_CPU_ARCH_V6K
2258 || arch == elfcpp::TAG_CPU_ARCH_V7
2259 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2262 // Whether we have THUMB-2 NOP.W instruction.
2264 may_use_thumb2_nop() const
2266 Object_attribute* attr =
2267 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2268 int arch = attr->int_value();
2269 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2270 || arch == elfcpp::TAG_CPU_ARCH_V7
2271 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2274 // Process the relocations to determine unreferenced sections for
2275 // garbage collection.
2277 gc_process_relocs(Symbol_table* symtab,
2279 Sized_relobj_file<32, big_endian>* object,
2280 unsigned int data_shndx,
2281 unsigned int sh_type,
2282 const unsigned char* prelocs,
2284 Output_section* output_section,
2285 bool needs_special_offset_handling,
2286 size_t local_symbol_count,
2287 const unsigned char* plocal_symbols);
2289 // Scan the relocations to look for symbol adjustments.
2291 scan_relocs(Symbol_table* symtab,
2293 Sized_relobj_file<32, big_endian>* object,
2294 unsigned int data_shndx,
2295 unsigned int sh_type,
2296 const unsigned char* prelocs,
2298 Output_section* output_section,
2299 bool needs_special_offset_handling,
2300 size_t local_symbol_count,
2301 const unsigned char* plocal_symbols);
2303 // Finalize the sections.
2305 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
2307 // Return the value to use for a dynamic symbol which requires special
2310 do_dynsym_value(const Symbol*) const;
2312 // Relocate a section.
2314 relocate_section(const Relocate_info<32, big_endian>*,
2315 unsigned int sh_type,
2316 const unsigned char* prelocs,
2318 Output_section* output_section,
2319 bool needs_special_offset_handling,
2320 unsigned char* view,
2321 Arm_address view_address,
2322 section_size_type view_size,
2323 const Reloc_symbol_changes*);
2325 // Scan the relocs during a relocatable link.
2327 scan_relocatable_relocs(Symbol_table* symtab,
2329 Sized_relobj_file<32, big_endian>* object,
2330 unsigned int data_shndx,
2331 unsigned int sh_type,
2332 const unsigned char* prelocs,
2334 Output_section* output_section,
2335 bool needs_special_offset_handling,
2336 size_t local_symbol_count,
2337 const unsigned char* plocal_symbols,
2338 Relocatable_relocs*);
2340 // Relocate a section during a relocatable link.
2342 relocate_for_relocatable(const Relocate_info<32, big_endian>*,
2343 unsigned int sh_type,
2344 const unsigned char* prelocs,
2346 Output_section* output_section,
2347 off_t offset_in_output_section,
2348 const Relocatable_relocs*,
2349 unsigned char* view,
2350 Arm_address view_address,
2351 section_size_type view_size,
2352 unsigned char* reloc_view,
2353 section_size_type reloc_view_size);
2355 // Perform target-specific processing in a relocatable link. This is
2356 // only used if we use the relocation strategy RELOC_SPECIAL.
2358 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo,
2359 unsigned int sh_type,
2360 const unsigned char* preloc_in,
2362 Output_section* output_section,
2363 off_t offset_in_output_section,
2364 unsigned char* view,
2365 typename elfcpp::Elf_types<32>::Elf_Addr
2367 section_size_type view_size,
2368 unsigned char* preloc_out);
2370 // Return whether SYM is defined by the ABI.
2372 do_is_defined_by_abi(Symbol* sym) const
2373 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
2375 // Return whether there is a GOT section.
2377 has_got_section() const
2378 { return this->got_ != NULL; }
2380 // Return the size of the GOT section.
2384 gold_assert(this->got_ != NULL);
2385 return this->got_->data_size();
2388 // Return the number of entries in the GOT.
2390 got_entry_count() const
2392 if (!this->has_got_section())
2394 return this->got_size() / 4;
2397 // Return the number of entries in the PLT.
2399 plt_entry_count() const;
2401 // Return the offset of the first non-reserved PLT entry.
2403 first_plt_entry_offset() const;
2405 // Return the size of each PLT entry.
2407 plt_entry_size() const;
2409 // Map platform-specific reloc types
2411 get_real_reloc_type(unsigned int r_type);
2414 // Methods to support stub-generations.
2417 // Return the stub factory
2419 stub_factory() const
2420 { return this->stub_factory_; }
2422 // Make a new Arm_input_section object.
2423 Arm_input_section<big_endian>*
2424 new_arm_input_section(Relobj*, unsigned int);
2426 // Find the Arm_input_section object corresponding to the SHNDX-th input
2427 // section of RELOBJ.
2428 Arm_input_section<big_endian>*
2429 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2431 // Make a new Stub_table
2432 Stub_table<big_endian>*
2433 new_stub_table(Arm_input_section<big_endian>*);
2435 // Scan a section for stub generation.
2437 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2438 const unsigned char*, size_t, Output_section*,
2439 bool, const unsigned char*, Arm_address,
2444 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2445 Output_section*, unsigned char*, Arm_address,
2448 // Get the default ARM target.
2449 static Target_arm<big_endian>*
2452 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2453 && parameters->target().is_big_endian() == big_endian);
2454 return static_cast<Target_arm<big_endian>*>(
2455 parameters->sized_target<32, big_endian>());
2458 // Whether NAME belongs to a mapping symbol.
2460 is_mapping_symbol_name(const char* name)
2464 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2465 && (name[2] == '\0' || name[2] == '.'));
2468 // Whether we work around the Cortex-A8 erratum.
2470 fix_cortex_a8() const
2471 { return this->fix_cortex_a8_; }
2473 // Whether we merge exidx entries in debuginfo.
2475 merge_exidx_entries() const
2476 { return parameters->options().merge_exidx_entries(); }
2478 // Whether we fix R_ARM_V4BX relocation.
2480 // 1 - replace with MOV instruction (armv4 target)
2481 // 2 - make interworking veneer (>= armv4t targets only)
2482 General_options::Fix_v4bx
2484 { return parameters->options().fix_v4bx(); }
2486 // Scan a span of THUMB code section for Cortex-A8 erratum.
2488 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2489 section_size_type, section_size_type,
2490 const unsigned char*, Arm_address);
2492 // Apply Cortex-A8 workaround to a branch.
2494 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2495 unsigned char*, Arm_address);
2498 // Make an ELF object.
2500 do_make_elf_object(const std::string&, Input_file*, off_t,
2501 const elfcpp::Ehdr<32, big_endian>& ehdr);
2504 do_make_elf_object(const std::string&, Input_file*, off_t,
2505 const elfcpp::Ehdr<32, !big_endian>&)
2506 { gold_unreachable(); }
2509 do_make_elf_object(const std::string&, Input_file*, off_t,
2510 const elfcpp::Ehdr<64, false>&)
2511 { gold_unreachable(); }
2514 do_make_elf_object(const std::string&, Input_file*, off_t,
2515 const elfcpp::Ehdr<64, true>&)
2516 { gold_unreachable(); }
2518 // Make an output section.
2520 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2521 elfcpp::Elf_Xword flags)
2522 { return new Arm_output_section<big_endian>(name, type, flags); }
2525 do_adjust_elf_header(unsigned char* view, int len) const;
2527 // We only need to generate stubs, and hence perform relaxation if we are
2528 // not doing relocatable linking.
2530 do_may_relax() const
2531 { return !parameters->options().relocatable(); }
2534 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*);
2536 // Determine whether an object attribute tag takes an integer, a
2539 do_attribute_arg_type(int tag) const;
2541 // Reorder tags during output.
2543 do_attributes_order(int num) const;
2545 // This is called when the target is selected as the default.
2547 do_select_as_default_target()
2549 // No locking is required since there should only be one default target.
2550 // We cannot have both the big-endian and little-endian ARM targets
2552 gold_assert(arm_reloc_property_table == NULL);
2553 arm_reloc_property_table = new Arm_reloc_property_table();
2557 // The class which scans relocations.
2562 : issued_non_pic_error_(false)
2566 get_reference_flags(unsigned int r_type);
2569 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2570 Sized_relobj_file<32, big_endian>* object,
2571 unsigned int data_shndx,
2572 Output_section* output_section,
2573 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2574 const elfcpp::Sym<32, big_endian>& lsym);
2577 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2578 Sized_relobj_file<32, big_endian>* object,
2579 unsigned int data_shndx,
2580 Output_section* output_section,
2581 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2585 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2586 Sized_relobj_file<32, big_endian>* ,
2589 const elfcpp::Rel<32, big_endian>& ,
2591 const elfcpp::Sym<32, big_endian>&);
2594 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2595 Sized_relobj_file<32, big_endian>* ,
2598 const elfcpp::Rel<32, big_endian>& ,
2599 unsigned int , Symbol*);
2603 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*,
2604 unsigned int r_type);
2607 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*,
2608 unsigned int r_type, Symbol*);
2611 check_non_pic(Relobj*, unsigned int r_type);
2613 // Almost identical to Symbol::needs_plt_entry except that it also
2614 // handles STT_ARM_TFUNC.
2616 symbol_needs_plt_entry(const Symbol* sym)
2618 // An undefined symbol from an executable does not need a PLT entry.
2619 if (sym->is_undefined() && !parameters->options().shared())
2622 return (!parameters->doing_static_link()
2623 && (sym->type() == elfcpp::STT_FUNC
2624 || sym->type() == elfcpp::STT_ARM_TFUNC)
2625 && (sym->is_from_dynobj()
2626 || sym->is_undefined()
2627 || sym->is_preemptible()));
2631 possible_function_pointer_reloc(unsigned int r_type);
2633 // Whether we have issued an error about a non-PIC compilation.
2634 bool issued_non_pic_error_;
2637 // The class which implements relocation.
2647 // Return whether the static relocation needs to be applied.
2649 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2650 unsigned int r_type,
2652 Output_section* output_section);
2654 // Do a relocation. Return false if the caller should not issue
2655 // any warnings about this relocation.
2657 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2658 Output_section*, size_t relnum,
2659 const elfcpp::Rel<32, big_endian>&,
2660 unsigned int r_type, const Sized_symbol<32>*,
2661 const Symbol_value<32>*,
2662 unsigned char*, Arm_address,
2665 // Return whether we want to pass flag NON_PIC_REF for this
2666 // reloc. This means the relocation type accesses a symbol not via
2669 reloc_is_non_pic(unsigned int r_type)
2673 // These relocation types reference GOT or PLT entries explicitly.
2674 case elfcpp::R_ARM_GOT_BREL:
2675 case elfcpp::R_ARM_GOT_ABS:
2676 case elfcpp::R_ARM_GOT_PREL:
2677 case elfcpp::R_ARM_GOT_BREL12:
2678 case elfcpp::R_ARM_PLT32_ABS:
2679 case elfcpp::R_ARM_TLS_GD32:
2680 case elfcpp::R_ARM_TLS_LDM32:
2681 case elfcpp::R_ARM_TLS_IE32:
2682 case elfcpp::R_ARM_TLS_IE12GP:
2684 // These relocate types may use PLT entries.
2685 case elfcpp::R_ARM_CALL:
2686 case elfcpp::R_ARM_THM_CALL:
2687 case elfcpp::R_ARM_JUMP24:
2688 case elfcpp::R_ARM_THM_JUMP24:
2689 case elfcpp::R_ARM_THM_JUMP19:
2690 case elfcpp::R_ARM_PLT32:
2691 case elfcpp::R_ARM_THM_XPC22:
2692 case elfcpp::R_ARM_PREL31:
2693 case elfcpp::R_ARM_SBREL31:
2702 // Do a TLS relocation.
2703 inline typename Arm_relocate_functions<big_endian>::Status
2704 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*,
2705 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int,
2706 const Sized_symbol<32>*, const Symbol_value<32>*,
2707 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr,
2712 // A class which returns the size required for a relocation type,
2713 // used while scanning relocs during a relocatable link.
2714 class Relocatable_size_for_reloc
2718 get_size_for_reloc(unsigned int, Relobj*);
2721 // Adjust TLS relocation type based on the options and whether this
2722 // is a local symbol.
2723 static tls::Tls_optimization
2724 optimize_tls_reloc(bool is_final, int r_type);
2726 // Get the GOT section, creating it if necessary.
2727 Arm_output_data_got<big_endian>*
2728 got_section(Symbol_table*, Layout*);
2730 // Get the GOT PLT section.
2732 got_plt_section() const
2734 gold_assert(this->got_plt_ != NULL);
2735 return this->got_plt_;
2738 // Create a PLT entry for a global symbol.
2740 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2742 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2744 define_tls_base_symbol(Symbol_table*, Layout*);
2746 // Create a GOT entry for the TLS module index.
2748 got_mod_index_entry(Symbol_table* symtab, Layout* layout,
2749 Sized_relobj_file<32, big_endian>* object);
2751 // Get the PLT section.
2752 const Output_data_plt_arm<big_endian>*
2755 gold_assert(this->plt_ != NULL);
2759 // Get the dynamic reloc section, creating it if necessary.
2761 rel_dyn_section(Layout*);
2763 // Get the section to use for TLS_DESC relocations.
2765 rel_tls_desc_section(Layout*) const;
2767 // Return true if the symbol may need a COPY relocation.
2768 // References from an executable object to non-function symbols
2769 // defined in a dynamic object may need a COPY relocation.
2771 may_need_copy_reloc(Symbol* gsym)
2773 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2774 && gsym->may_need_copy_reloc());
2777 // Add a potential copy relocation.
2779 copy_reloc(Symbol_table* symtab, Layout* layout,
2780 Sized_relobj_file<32, big_endian>* object,
2781 unsigned int shndx, Output_section* output_section,
2782 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2784 this->copy_relocs_.copy_reloc(symtab, layout,
2785 symtab->get_sized_symbol<32>(sym),
2786 object, shndx, output_section, reloc,
2787 this->rel_dyn_section(layout));
2790 // Whether two EABI versions are compatible.
2792 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2794 // Merge processor-specific flags from input object and those in the ELF
2795 // header of the output.
2797 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2799 // Get the secondary compatible architecture.
2801 get_secondary_compatible_arch(const Attributes_section_data*);
2803 // Set the secondary compatible architecture.
2805 set_secondary_compatible_arch(Attributes_section_data*, int);
2808 tag_cpu_arch_combine(const char*, int, int*, int, int);
2810 // Helper to print AEABI enum tag value.
2812 aeabi_enum_name(unsigned int);
2814 // Return string value for TAG_CPU_name.
2816 tag_cpu_name_value(unsigned int);
2818 // Merge object attributes from input object and those in the output.
2820 merge_object_attributes(const char*, const Attributes_section_data*);
2822 // Helper to get an AEABI object attribute
2824 get_aeabi_object_attribute(int tag) const
2826 Attributes_section_data* pasd = this->attributes_section_data_;
2827 gold_assert(pasd != NULL);
2828 Object_attribute* attr =
2829 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2830 gold_assert(attr != NULL);
2835 // Methods to support stub-generations.
2838 // Group input sections for stub generation.
2840 group_sections(Layout*, section_size_type, bool, const Task*);
2842 // Scan a relocation for stub generation.
2844 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2845 const Sized_symbol<32>*, unsigned int,
2846 const Symbol_value<32>*,
2847 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2849 // Scan a relocation section for stub.
2850 template<int sh_type>
2852 scan_reloc_section_for_stubs(
2853 const Relocate_info<32, big_endian>* relinfo,
2854 const unsigned char* prelocs,
2856 Output_section* output_section,
2857 bool needs_special_offset_handling,
2858 const unsigned char* view,
2859 elfcpp::Elf_types<32>::Elf_Addr view_address,
2862 // Fix .ARM.exidx section coverage.
2864 fix_exidx_coverage(Layout*, const Input_objects*,
2865 Arm_output_section<big_endian>*, Symbol_table*,
2868 // Functors for STL set.
2869 struct output_section_address_less_than
2872 operator()(const Output_section* s1, const Output_section* s2) const
2873 { return s1->address() < s2->address(); }
2876 // Information about this specific target which we pass to the
2877 // general Target structure.
2878 static const Target::Target_info arm_info;
2880 // The types of GOT entries needed for this platform.
2881 // These values are exposed to the ABI in an incremental link.
2882 // Do not renumber existing values without changing the version
2883 // number of the .gnu_incremental_inputs section.
2886 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol
2887 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset
2888 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset
2889 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair
2890 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair
2893 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2895 // Map input section to Arm_input_section.
2896 typedef Unordered_map<Section_id,
2897 Arm_input_section<big_endian>*,
2899 Arm_input_section_map;
2901 // Map output addresses to relocs for Cortex-A8 erratum.
2902 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2903 Cortex_a8_relocs_info;
2906 Arm_output_data_got<big_endian>* got_;
2908 Output_data_plt_arm<big_endian>* plt_;
2909 // The GOT PLT section.
2910 Output_data_space* got_plt_;
2911 // The dynamic reloc section.
2912 Reloc_section* rel_dyn_;
2913 // Relocs saved to avoid a COPY reloc.
2914 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2915 // Space for variables copied with a COPY reloc.
2916 Output_data_space* dynbss_;
2917 // Offset of the GOT entry for the TLS module index.
2918 unsigned int got_mod_index_offset_;
2919 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2920 bool tls_base_symbol_defined_;
2921 // Vector of Stub_tables created.
2922 Stub_table_list stub_tables_;
2924 const Stub_factory &stub_factory_;
2925 // Whether we can use BLX.
2927 // Whether we force PIC branch veneers.
2928 bool should_force_pic_veneer_;
2929 // Map for locating Arm_input_sections.
2930 Arm_input_section_map arm_input_section_map_;
2931 // Attributes section data in output.
2932 Attributes_section_data* attributes_section_data_;
2933 // Whether we want to fix code for Cortex-A8 erratum.
2934 bool fix_cortex_a8_;
2935 // Map addresses to relocs for Cortex-A8 erratum.
2936 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2939 template<bool big_endian>
2940 const Target::Target_info Target_arm<big_endian>::arm_info =
2943 big_endian, // is_big_endian
2944 elfcpp::EM_ARM, // machine_code
2945 false, // has_make_symbol
2946 false, // has_resolve
2947 false, // has_code_fill
2948 true, // is_default_stack_executable
2950 "/usr/lib/libc.so.1", // dynamic_linker
2951 0x8000, // default_text_segment_address
2952 0x1000, // abi_pagesize (overridable by -z max-page-size)
2953 0x1000, // common_pagesize (overridable by -z common-page-size)
2954 elfcpp::SHN_UNDEF, // small_common_shndx
2955 elfcpp::SHN_UNDEF, // large_common_shndx
2956 0, // small_common_section_flags
2957 0, // large_common_section_flags
2958 ".ARM.attributes", // attributes_section
2959 "aeabi" // attributes_vendor
2962 // Arm relocate functions class
2965 template<bool big_endian>
2966 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
2971 STATUS_OKAY, // No error during relocation.
2972 STATUS_OVERFLOW, // Relocation overflow.
2973 STATUS_BAD_RELOC // Relocation cannot be applied.
2977 typedef Relocate_functions<32, big_endian> Base;
2978 typedef Arm_relocate_functions<big_endian> This;
2980 // Encoding of imm16 argument for movt and movw ARM instructions
2983 // imm16 := imm4 | imm12
2985 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2986 // +-------+---------------+-------+-------+-----------------------+
2987 // | | |imm4 | |imm12 |
2988 // +-------+---------------+-------+-------+-----------------------+
2990 // Extract the relocation addend from VAL based on the ARM
2991 // instruction encoding described above.
2992 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2993 extract_arm_movw_movt_addend(
2994 typename elfcpp::Swap<32, big_endian>::Valtype val)
2996 // According to the Elf ABI for ARM Architecture the immediate
2997 // field is sign-extended to form the addend.
2998 return utils::sign_extend<16>(((val >> 4) & 0xf000) | (val & 0xfff));
3001 // Insert X into VAL based on the ARM instruction encoding described
3003 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3004 insert_val_arm_movw_movt(
3005 typename elfcpp::Swap<32, big_endian>::Valtype val,
3006 typename elfcpp::Swap<32, big_endian>::Valtype x)
3010 val |= (x & 0xf000) << 4;
3014 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3017 // imm16 := imm4 | i | imm3 | imm8
3019 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3020 // +---------+-+-----------+-------++-+-----+-------+---------------+
3021 // | |i| |imm4 || |imm3 | |imm8 |
3022 // +---------+-+-----------+-------++-+-----+-------+---------------+
3024 // Extract the relocation addend from VAL based on the Thumb2
3025 // instruction encoding described above.
3026 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3027 extract_thumb_movw_movt_addend(
3028 typename elfcpp::Swap<32, big_endian>::Valtype val)
3030 // According to the Elf ABI for ARM Architecture the immediate
3031 // field is sign-extended to form the addend.
3032 return utils::sign_extend<16>(((val >> 4) & 0xf000)
3033 | ((val >> 15) & 0x0800)
3034 | ((val >> 4) & 0x0700)
3038 // Insert X into VAL based on the Thumb2 instruction encoding
3040 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3041 insert_val_thumb_movw_movt(
3042 typename elfcpp::Swap<32, big_endian>::Valtype val,
3043 typename elfcpp::Swap<32, big_endian>::Valtype x)
3046 val |= (x & 0xf000) << 4;
3047 val |= (x & 0x0800) << 15;
3048 val |= (x & 0x0700) << 4;
3049 val |= (x & 0x00ff);
3053 // Calculate the smallest constant Kn for the specified residual.
3054 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3056 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
3062 // Determine the most significant bit in the residual and
3063 // align the resulting value to a 2-bit boundary.
3064 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
3066 // The desired shift is now (msb - 6), or zero, whichever
3068 return (((msb - 6) < 0) ? 0 : (msb - 6));
3071 // Calculate the final residual for the specified group index.
3072 // If the passed group index is less than zero, the method will return
3073 // the value of the specified residual without any change.
3074 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3075 static typename elfcpp::Swap<32, big_endian>::Valtype
3076 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3079 for (int n = 0; n <= group; n++)
3081 // Calculate which part of the value to mask.
3082 uint32_t shift = calc_grp_kn(residual);
3083 // Calculate the residual for the next time around.
3084 residual &= ~(residual & (0xff << shift));
3090 // Calculate the value of Gn for the specified group index.
3091 // We return it in the form of an encoded constant-and-rotation.
3092 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3093 static typename elfcpp::Swap<32, big_endian>::Valtype
3094 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3097 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
3100 for (int n = 0; n <= group; n++)
3102 // Calculate which part of the value to mask.
3103 shift = calc_grp_kn(residual);
3104 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3105 gn = residual & (0xff << shift);
3106 // Calculate the residual for the next time around.
3109 // Return Gn in the form of an encoded constant-and-rotation.
3110 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
3114 // Handle ARM long branches.
3115 static typename This::Status
3116 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3117 unsigned char*, const Sized_symbol<32>*,
3118 const Arm_relobj<big_endian>*, unsigned int,
3119 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3121 // Handle THUMB long branches.
3122 static typename This::Status
3123 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3124 unsigned char*, const Sized_symbol<32>*,
3125 const Arm_relobj<big_endian>*, unsigned int,
3126 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3129 // Return the branch offset of a 32-bit THUMB branch.
3130 static inline int32_t
3131 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3133 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3134 // involving the J1 and J2 bits.
3135 uint32_t s = (upper_insn & (1U << 10)) >> 10;
3136 uint32_t upper = upper_insn & 0x3ffU;
3137 uint32_t lower = lower_insn & 0x7ffU;
3138 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
3139 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
3140 uint32_t i1 = j1 ^ s ? 0 : 1;
3141 uint32_t i2 = j2 ^ s ? 0 : 1;
3143 return utils::sign_extend<25>((s << 24) | (i1 << 23) | (i2 << 22)
3144 | (upper << 12) | (lower << 1));
3147 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3148 // UPPER_INSN is the original upper instruction of the branch. Caller is
3149 // responsible for overflow checking and BLX offset adjustment.
3150 static inline uint16_t
3151 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
3153 uint32_t s = offset < 0 ? 1 : 0;
3154 uint32_t bits = static_cast<uint32_t>(offset);
3155 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
3158 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3159 // LOWER_INSN is the original lower instruction of the branch. Caller is
3160 // responsible for overflow checking and BLX offset adjustment.
3161 static inline uint16_t
3162 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
3164 uint32_t s = offset < 0 ? 1 : 0;
3165 uint32_t bits = static_cast<uint32_t>(offset);
3166 return ((lower_insn & ~0x2fffU)
3167 | ((((bits >> 23) & 1) ^ !s) << 13)
3168 | ((((bits >> 22) & 1) ^ !s) << 11)
3169 | ((bits >> 1) & 0x7ffU));
3172 // Return the branch offset of a 32-bit THUMB conditional branch.
3173 static inline int32_t
3174 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3176 uint32_t s = (upper_insn & 0x0400U) >> 10;
3177 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
3178 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
3179 uint32_t lower = (lower_insn & 0x07ffU);
3180 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
3182 return utils::sign_extend<21>((upper << 12) | (lower << 1));
3185 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3186 // instruction. UPPER_INSN is the original upper instruction of the branch.
3187 // Caller is responsible for overflow checking.
3188 static inline uint16_t
3189 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
3191 uint32_t s = offset < 0 ? 1 : 0;
3192 uint32_t bits = static_cast<uint32_t>(offset);
3193 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
3196 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3197 // instruction. LOWER_INSN is the original lower instruction of the branch.
3198 // The caller is responsible for overflow checking.
3199 static inline uint16_t
3200 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
3202 uint32_t bits = static_cast<uint32_t>(offset);
3203 uint32_t j2 = (bits & 0x00080000U) >> 19;
3204 uint32_t j1 = (bits & 0x00040000U) >> 18;
3205 uint32_t lo = (bits & 0x00000ffeU) >> 1;
3207 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
3210 // R_ARM_ABS8: S + A
3211 static inline typename This::Status
3212 abs8(unsigned char* view,
3213 const Sized_relobj_file<32, big_endian>* object,
3214 const Symbol_value<32>* psymval)
3216 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
3217 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3218 Valtype* wv = reinterpret_cast<Valtype*>(view);
3219 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
3220 Reltype addend = utils::sign_extend<8>(val);
3221 Reltype x = psymval->value(object, addend);
3222 val = utils::bit_select(val, x, 0xffU);
3223 elfcpp::Swap<8, big_endian>::writeval(wv, val);
3225 // R_ARM_ABS8 permits signed or unsigned results.
3226 int signed_x = static_cast<int32_t>(x);
3227 return ((signed_x < -128 || signed_x > 255)
3228 ? This::STATUS_OVERFLOW
3229 : This::STATUS_OKAY);
3232 // R_ARM_THM_ABS5: S + A
3233 static inline typename This::Status
3234 thm_abs5(unsigned char* view,
3235 const Sized_relobj_file<32, big_endian>* object,
3236 const Symbol_value<32>* psymval)
3238 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3239 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3240 Valtype* wv = reinterpret_cast<Valtype*>(view);
3241 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3242 Reltype addend = (val & 0x7e0U) >> 6;
3243 Reltype x = psymval->value(object, addend);
3244 val = utils::bit_select(val, x << 6, 0x7e0U);
3245 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3247 // R_ARM_ABS16 permits signed or unsigned results.
3248 int signed_x = static_cast<int32_t>(x);
3249 return ((signed_x < -32768 || signed_x > 65535)
3250 ? This::STATUS_OVERFLOW
3251 : This::STATUS_OKAY);
3254 // R_ARM_ABS12: S + A
3255 static inline typename This::Status
3256 abs12(unsigned char* view,
3257 const Sized_relobj_file<32, big_endian>* object,
3258 const Symbol_value<32>* psymval)
3260 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3261 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3262 Valtype* wv = reinterpret_cast<Valtype*>(view);
3263 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3264 Reltype addend = val & 0x0fffU;
3265 Reltype x = psymval->value(object, addend);
3266 val = utils::bit_select(val, x, 0x0fffU);
3267 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3268 return (utils::has_overflow<12>(x)
3269 ? This::STATUS_OVERFLOW
3270 : This::STATUS_OKAY);
3273 // R_ARM_ABS16: S + A
3274 static inline typename This::Status
3275 abs16(unsigned char* view,
3276 const Sized_relobj_file<32, big_endian>* object,
3277 const Symbol_value<32>* psymval)
3279 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3280 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3281 Valtype* wv = reinterpret_cast<Valtype*>(view);
3282 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3283 Reltype addend = utils::sign_extend<16>(val);
3284 Reltype x = psymval->value(object, addend);
3285 val = utils::bit_select(val, x, 0xffffU);
3286 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3287 return (utils::has_signed_unsigned_overflow<16>(x)
3288 ? This::STATUS_OVERFLOW
3289 : This::STATUS_OKAY);
3292 // R_ARM_ABS32: (S + A) | T
3293 static inline typename This::Status
3294 abs32(unsigned char* view,
3295 const Sized_relobj_file<32, big_endian>* object,
3296 const Symbol_value<32>* psymval,
3297 Arm_address thumb_bit)
3299 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3300 Valtype* wv = reinterpret_cast<Valtype*>(view);
3301 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
3302 Valtype x = psymval->value(object, addend) | thumb_bit;
3303 elfcpp::Swap<32, big_endian>::writeval(wv, x);
3304 return This::STATUS_OKAY;
3307 // R_ARM_REL32: (S + A) | T - P
3308 static inline typename This::Status
3309 rel32(unsigned char* view,
3310 const Sized_relobj_file<32, big_endian>* object,
3311 const Symbol_value<32>* psymval,
3312 Arm_address address,
3313 Arm_address thumb_bit)
3315 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3316 Valtype* wv = reinterpret_cast<Valtype*>(view);
3317 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
3318 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3319 elfcpp::Swap<32, big_endian>::writeval(wv, x);
3320 return This::STATUS_OKAY;
3323 // R_ARM_THM_JUMP24: (S + A) | T - P
3324 static typename This::Status
3325 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object,
3326 const Symbol_value<32>* psymval, Arm_address address,
3327 Arm_address thumb_bit);
3329 // R_ARM_THM_JUMP6: S + A – P
3330 static inline typename This::Status
3331 thm_jump6(unsigned char* view,
3332 const Sized_relobj_file<32, big_endian>* object,
3333 const Symbol_value<32>* psymval,
3334 Arm_address address)
3336 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3337 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3338 Valtype* wv = reinterpret_cast<Valtype*>(view);
3339 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3340 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3341 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
3342 Reltype x = (psymval->value(object, addend) - address);
3343 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
3344 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3345 // CZB does only forward jumps.
3346 return ((x > 0x007e)
3347 ? This::STATUS_OVERFLOW
3348 : This::STATUS_OKAY);
3351 // R_ARM_THM_JUMP8: S + A – P
3352 static inline typename This::Status
3353 thm_jump8(unsigned char* view,
3354 const Sized_relobj_file<32, big_endian>* object,
3355 const Symbol_value<32>* psymval,
3356 Arm_address address)
3358 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3359 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3360 Valtype* wv = reinterpret_cast<Valtype*>(view);
3361 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3362 Reltype addend = utils::sign_extend<8>((val & 0x00ff) << 1);
3363 Reltype x = (psymval->value(object, addend) - address);
3364 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xff00) | ((x & 0x01fe) >> 1));
3365 return (utils::has_overflow<8>(x)
3366 ? This::STATUS_OVERFLOW
3367 : This::STATUS_OKAY);
3370 // R_ARM_THM_JUMP11: S + A – P
3371 static inline typename This::Status
3372 thm_jump11(unsigned char* view,
3373 const Sized_relobj_file<32, big_endian>* object,
3374 const Symbol_value<32>* psymval,
3375 Arm_address address)
3377 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3378 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3379 Valtype* wv = reinterpret_cast<Valtype*>(view);
3380 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3381 Reltype addend = utils::sign_extend<11>((val & 0x07ff) << 1);
3382 Reltype x = (psymval->value(object, addend) - address);
3383 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xf800) | ((x & 0x0ffe) >> 1));
3384 return (utils::has_overflow<11>(x)
3385 ? This::STATUS_OVERFLOW
3386 : This::STATUS_OKAY);
3389 // R_ARM_BASE_PREL: B(S) + A - P
3390 static inline typename This::Status
3391 base_prel(unsigned char* view,
3393 Arm_address address)
3395 Base::rel32(view, origin - address);
3399 // R_ARM_BASE_ABS: B(S) + A
3400 static inline typename This::Status
3401 base_abs(unsigned char* view,
3404 Base::rel32(view, origin);
3408 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3409 static inline typename This::Status
3410 got_brel(unsigned char* view,
3411 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
3413 Base::rel32(view, got_offset);
3414 return This::STATUS_OKAY;
3417 // R_ARM_GOT_PREL: GOT(S) + A - P
3418 static inline typename This::Status
3419 got_prel(unsigned char* view,
3420 Arm_address got_entry,
3421 Arm_address address)
3423 Base::rel32(view, got_entry - address);
3424 return This::STATUS_OKAY;
3427 // R_ARM_PREL: (S + A) | T - P
3428 static inline typename This::Status
3429 prel31(unsigned char* view,
3430 const Sized_relobj_file<32, big_endian>* object,
3431 const Symbol_value<32>* psymval,
3432 Arm_address address,
3433 Arm_address thumb_bit)
3435 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3436 Valtype* wv = reinterpret_cast<Valtype*>(view);
3437 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3438 Valtype addend = utils::sign_extend<31>(val);
3439 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3440 val = utils::bit_select(val, x, 0x7fffffffU);
3441 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3442 return (utils::has_overflow<31>(x) ?
3443 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3446 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3447 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3448 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3449 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3450 static inline typename This::Status
3451 movw(unsigned char* view,
3452 const Sized_relobj_file<32, big_endian>* object,
3453 const Symbol_value<32>* psymval,
3454 Arm_address relative_address_base,
3455 Arm_address thumb_bit,
3456 bool check_overflow)
3458 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3459 Valtype* wv = reinterpret_cast<Valtype*>(view);
3460 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3461 Valtype addend = This::extract_arm_movw_movt_addend(val);
3462 Valtype x = ((psymval->value(object, addend) | thumb_bit)
3463 - relative_address_base);
3464 val = This::insert_val_arm_movw_movt(val, x);
3465 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3466 return ((check_overflow && utils::has_overflow<16>(x))
3467 ? This::STATUS_OVERFLOW
3468 : This::STATUS_OKAY);
3471 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3472 // R_ARM_MOVT_PREL: S + A - P
3473 // R_ARM_MOVT_BREL: S + A - B(S)
3474 static inline typename This::Status
3475 movt(unsigned char* view,
3476 const Sized_relobj_file<32, big_endian>* object,
3477 const Symbol_value<32>* psymval,
3478 Arm_address relative_address_base)
3480 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3481 Valtype* wv = reinterpret_cast<Valtype*>(view);
3482 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3483 Valtype addend = This::extract_arm_movw_movt_addend(val);
3484 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3485 val = This::insert_val_arm_movw_movt(val, x);
3486 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3487 // FIXME: IHI0044D says that we should check for overflow.
3488 return This::STATUS_OKAY;
3491 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3492 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3493 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3494 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3495 static inline typename This::Status
3496 thm_movw(unsigned char* view,
3497 const Sized_relobj_file<32, big_endian>* object,
3498 const Symbol_value<32>* psymval,
3499 Arm_address relative_address_base,
3500 Arm_address thumb_bit,
3501 bool check_overflow)
3503 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3504 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3505 Valtype* wv = reinterpret_cast<Valtype*>(view);
3506 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3507 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3508 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3510 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3511 val = This::insert_val_thumb_movw_movt(val, x);
3512 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3513 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3514 return ((check_overflow && utils::has_overflow<16>(x))
3515 ? This::STATUS_OVERFLOW
3516 : This::STATUS_OKAY);
3519 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3520 // R_ARM_THM_MOVT_PREL: S + A - P
3521 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3522 static inline typename This::Status
3523 thm_movt(unsigned char* view,
3524 const Sized_relobj_file<32, big_endian>* object,
3525 const Symbol_value<32>* psymval,
3526 Arm_address relative_address_base)
3528 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3529 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3530 Valtype* wv = reinterpret_cast<Valtype*>(view);
3531 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3532 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3533 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3534 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3535 val = This::insert_val_thumb_movw_movt(val, x);
3536 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3537 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3538 return This::STATUS_OKAY;
3541 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3542 static inline typename This::Status
3543 thm_alu11(unsigned char* view,
3544 const Sized_relobj_file<32, big_endian>* object,
3545 const Symbol_value<32>* psymval,
3546 Arm_address address,
3547 Arm_address thumb_bit)
3549 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3550 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3551 Valtype* wv = reinterpret_cast<Valtype*>(view);
3552 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3553 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3555 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3556 // -----------------------------------------------------------------------
3557 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3558 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3559 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3560 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3561 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3562 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3564 // Determine a sign for the addend.
3565 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3566 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3567 // Thumb2 addend encoding:
3568 // imm12 := i | imm3 | imm8
3569 int32_t addend = (insn & 0xff)
3570 | ((insn & 0x00007000) >> 4)
3571 | ((insn & 0x04000000) >> 15);
3572 // Apply a sign to the added.
3575 int32_t x = (psymval->value(object, addend) | thumb_bit)
3576 - (address & 0xfffffffc);
3577 Reltype val = abs(x);
3578 // Mask out the value and a distinct part of the ADD/SUB opcode
3579 // (bits 7:5 of opword).
3580 insn = (insn & 0xfb0f8f00)
3582 | ((val & 0x700) << 4)
3583 | ((val & 0x800) << 15);
3584 // Set the opcode according to whether the value to go in the
3585 // place is negative.
3589 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3590 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3591 return ((val > 0xfff) ?
3592 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3595 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3596 static inline typename This::Status
3597 thm_pc8(unsigned char* view,
3598 const Sized_relobj_file<32, big_endian>* object,
3599 const Symbol_value<32>* psymval,
3600 Arm_address address)
3602 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3603 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3604 Valtype* wv = reinterpret_cast<Valtype*>(view);
3605 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3606 Reltype addend = ((insn & 0x00ff) << 2);
3607 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3608 Reltype val = abs(x);
3609 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3611 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3612 return ((val > 0x03fc)
3613 ? This::STATUS_OVERFLOW
3614 : This::STATUS_OKAY);
3617 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3618 static inline typename This::Status
3619 thm_pc12(unsigned char* view,
3620 const Sized_relobj_file<32, big_endian>* object,
3621 const Symbol_value<32>* psymval,
3622 Arm_address address)
3624 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3625 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3626 Valtype* wv = reinterpret_cast<Valtype*>(view);
3627 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3628 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3629 // Determine a sign for the addend (positive if the U bit is 1).
3630 const int sign = (insn & 0x00800000) ? 1 : -1;
3631 int32_t addend = (insn & 0xfff);
3632 // Apply a sign to the added.
3635 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3636 Reltype val = abs(x);
3637 // Mask out and apply the value and the U bit.
3638 insn = (insn & 0xff7ff000) | (val & 0xfff);
3639 // Set the U bit according to whether the value to go in the
3640 // place is positive.
3644 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3645 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3646 return ((val > 0xfff) ?
3647 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3651 static inline typename This::Status
3652 v4bx(const Relocate_info<32, big_endian>* relinfo,
3653 unsigned char* view,
3654 const Arm_relobj<big_endian>* object,
3655 const Arm_address address,
3656 const bool is_interworking)
3659 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3660 Valtype* wv = reinterpret_cast<Valtype*>(view);
3661 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3663 // Ensure that we have a BX instruction.
3664 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3665 const uint32_t reg = (val & 0xf);
3666 if (is_interworking && reg != 0xf)
3668 Stub_table<big_endian>* stub_table =
3669 object->stub_table(relinfo->data_shndx);
3670 gold_assert(stub_table != NULL);
3672 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3673 gold_assert(stub != NULL);
3675 int32_t veneer_address =
3676 stub_table->address() + stub->offset() - 8 - address;
3677 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3678 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3679 // Replace with a branch to veneer (B <addr>)
3680 val = (val & 0xf0000000) | 0x0a000000
3681 | ((veneer_address >> 2) & 0x00ffffff);
3685 // Preserve Rm (lowest four bits) and the condition code
3686 // (highest four bits). Other bits encode MOV PC,Rm.
3687 val = (val & 0xf000000f) | 0x01a0f000;
3689 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3690 return This::STATUS_OKAY;
3693 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3694 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3695 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3696 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3697 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3698 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3699 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3700 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3701 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3702 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3703 static inline typename This::Status
3704 arm_grp_alu(unsigned char* view,
3705 const Sized_relobj_file<32, big_endian>* object,
3706 const Symbol_value<32>* psymval,
3708 Arm_address address,
3709 Arm_address thumb_bit,
3710 bool check_overflow)
3712 gold_assert(group >= 0 && group < 3);
3713 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3714 Valtype* wv = reinterpret_cast<Valtype*>(view);
3715 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3717 // ALU group relocations are allowed only for the ADD/SUB instructions.
3718 // (0x00800000 - ADD, 0x00400000 - SUB)
3719 const Valtype opcode = insn & 0x01e00000;
3720 if (opcode != 0x00800000 && opcode != 0x00400000)
3721 return This::STATUS_BAD_RELOC;
3723 // Determine a sign for the addend.
3724 const int sign = (opcode == 0x00800000) ? 1 : -1;
3725 // shifter = rotate_imm * 2
3726 const uint32_t shifter = (insn & 0xf00) >> 7;
3727 // Initial addend value.
3728 int32_t addend = insn & 0xff;
3729 // Rotate addend right by shifter.
3730 addend = (addend >> shifter) | (addend << (32 - shifter));
3731 // Apply a sign to the added.
3734 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3735 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3736 // Check for overflow if required
3738 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3739 return This::STATUS_OVERFLOW;
3741 // Mask out the value and the ADD/SUB part of the opcode; take care
3742 // not to destroy the S bit.
3744 // Set the opcode according to whether the value to go in the
3745 // place is negative.
3746 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3747 // Encode the offset (encoded Gn).
3750 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3751 return This::STATUS_OKAY;
3754 // R_ARM_LDR_PC_G0: S + A - P
3755 // R_ARM_LDR_PC_G1: S + A - P
3756 // R_ARM_LDR_PC_G2: S + A - P
3757 // R_ARM_LDR_SB_G0: S + A - B(S)
3758 // R_ARM_LDR_SB_G1: S + A - B(S)
3759 // R_ARM_LDR_SB_G2: S + A - B(S)
3760 static inline typename This::Status
3761 arm_grp_ldr(unsigned char* view,
3762 const Sized_relobj_file<32, big_endian>* object,
3763 const Symbol_value<32>* psymval,
3765 Arm_address address)
3767 gold_assert(group >= 0 && group < 3);
3768 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3769 Valtype* wv = reinterpret_cast<Valtype*>(view);
3770 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3772 const int sign = (insn & 0x00800000) ? 1 : -1;
3773 int32_t addend = (insn & 0xfff) * sign;
3774 int32_t x = (psymval->value(object, addend) - address);
3775 // Calculate the relevant G(n-1) value to obtain this stage residual.
3777 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3778 if (residual >= 0x1000)
3779 return This::STATUS_OVERFLOW;
3781 // Mask out the value and U bit.
3783 // Set the U bit for non-negative values.
3788 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3789 return This::STATUS_OKAY;
3792 // R_ARM_LDRS_PC_G0: S + A - P
3793 // R_ARM_LDRS_PC_G1: S + A - P
3794 // R_ARM_LDRS_PC_G2: S + A - P
3795 // R_ARM_LDRS_SB_G0: S + A - B(S)
3796 // R_ARM_LDRS_SB_G1: S + A - B(S)
3797 // R_ARM_LDRS_SB_G2: S + A - B(S)
3798 static inline typename This::Status
3799 arm_grp_ldrs(unsigned char* view,
3800 const Sized_relobj_file<32, big_endian>* object,
3801 const Symbol_value<32>* psymval,
3803 Arm_address address)
3805 gold_assert(group >= 0 && group < 3);
3806 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3807 Valtype* wv = reinterpret_cast<Valtype*>(view);
3808 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3810 const int sign = (insn & 0x00800000) ? 1 : -1;
3811 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3812 int32_t x = (psymval->value(object, addend) - address);
3813 // Calculate the relevant G(n-1) value to obtain this stage residual.
3815 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3816 if (residual >= 0x100)
3817 return This::STATUS_OVERFLOW;
3819 // Mask out the value and U bit.
3821 // Set the U bit for non-negative values.
3824 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3826 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3827 return This::STATUS_OKAY;
3830 // R_ARM_LDC_PC_G0: S + A - P
3831 // R_ARM_LDC_PC_G1: S + A - P
3832 // R_ARM_LDC_PC_G2: S + A - P
3833 // R_ARM_LDC_SB_G0: S + A - B(S)
3834 // R_ARM_LDC_SB_G1: S + A - B(S)
3835 // R_ARM_LDC_SB_G2: S + A - B(S)
3836 static inline typename This::Status
3837 arm_grp_ldc(unsigned char* view,
3838 const Sized_relobj_file<32, big_endian>* object,
3839 const Symbol_value<32>* psymval,
3841 Arm_address address)
3843 gold_assert(group >= 0 && group < 3);
3844 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3845 Valtype* wv = reinterpret_cast<Valtype*>(view);
3846 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3848 const int sign = (insn & 0x00800000) ? 1 : -1;
3849 int32_t addend = ((insn & 0xff) << 2) * sign;
3850 int32_t x = (psymval->value(object, addend) - address);
3851 // Calculate the relevant G(n-1) value to obtain this stage residual.
3853 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3854 if ((residual & 0x3) != 0 || residual >= 0x400)
3855 return This::STATUS_OVERFLOW;
3857 // Mask out the value and U bit.
3859 // Set the U bit for non-negative values.
3862 insn |= (residual >> 2);
3864 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3865 return This::STATUS_OKAY;
3869 // Relocate ARM long branches. This handles relocation types
3870 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3871 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3872 // undefined and we do not use PLT in this relocation. In such a case,
3873 // the branch is converted into an NOP.
3875 template<bool big_endian>
3876 typename Arm_relocate_functions<big_endian>::Status
3877 Arm_relocate_functions<big_endian>::arm_branch_common(
3878 unsigned int r_type,
3879 const Relocate_info<32, big_endian>* relinfo,
3880 unsigned char* view,
3881 const Sized_symbol<32>* gsym,
3882 const Arm_relobj<big_endian>* object,
3884 const Symbol_value<32>* psymval,
3885 Arm_address address,
3886 Arm_address thumb_bit,
3887 bool is_weakly_undefined_without_plt)
3889 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3890 Valtype* wv = reinterpret_cast<Valtype*>(view);
3891 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3893 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3894 && ((val & 0x0f000000UL) == 0x0a000000UL);
3895 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3896 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3897 && ((val & 0x0f000000UL) == 0x0b000000UL);
3898 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3899 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3901 // Check that the instruction is valid.
3902 if (r_type == elfcpp::R_ARM_CALL)
3904 if (!insn_is_uncond_bl && !insn_is_blx)
3905 return This::STATUS_BAD_RELOC;
3907 else if (r_type == elfcpp::R_ARM_JUMP24)
3909 if (!insn_is_b && !insn_is_cond_bl)
3910 return This::STATUS_BAD_RELOC;
3912 else if (r_type == elfcpp::R_ARM_PLT32)
3914 if (!insn_is_any_branch)
3915 return This::STATUS_BAD_RELOC;
3917 else if (r_type == elfcpp::R_ARM_XPC25)
3919 // FIXME: AAELF document IH0044C does not say much about it other
3920 // than it being obsolete.
3921 if (!insn_is_any_branch)
3922 return This::STATUS_BAD_RELOC;
3927 // A branch to an undefined weak symbol is turned into a jump to
3928 // the next instruction unless a PLT entry will be created.
3929 // Do the same for local undefined symbols.
3930 // The jump to the next instruction is optimized as a NOP depending
3931 // on the architecture.
3932 const Target_arm<big_endian>* arm_target =
3933 Target_arm<big_endian>::default_target();
3934 if (is_weakly_undefined_without_plt)
3936 gold_assert(!parameters->options().relocatable());
3937 Valtype cond = val & 0xf0000000U;
3938 if (arm_target->may_use_arm_nop())
3939 val = cond | 0x0320f000;
3941 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3942 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3943 return This::STATUS_OKAY;
3946 Valtype addend = utils::sign_extend<26>(val << 2);
3947 Valtype branch_target = psymval->value(object, addend);
3948 int32_t branch_offset = branch_target - address;
3950 // We need a stub if the branch offset is too large or if we need
3952 bool may_use_blx = arm_target->may_use_blx();
3953 Reloc_stub* stub = NULL;
3955 if (!parameters->options().relocatable()
3956 && (utils::has_overflow<26>(branch_offset)
3957 || ((thumb_bit != 0)
3958 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL))))
3960 Valtype unadjusted_branch_target = psymval->value(object, 0);
3962 Stub_type stub_type =
3963 Reloc_stub::stub_type_for_reloc(r_type, address,
3964 unadjusted_branch_target,
3966 if (stub_type != arm_stub_none)
3968 Stub_table<big_endian>* stub_table =
3969 object->stub_table(relinfo->data_shndx);
3970 gold_assert(stub_table != NULL);
3972 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3973 stub = stub_table->find_reloc_stub(stub_key);
3974 gold_assert(stub != NULL);
3975 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3976 branch_target = stub_table->address() + stub->offset() + addend;
3977 branch_offset = branch_target - address;
3978 gold_assert(!utils::has_overflow<26>(branch_offset));
3982 // At this point, if we still need to switch mode, the instruction
3983 // must either be a BLX or a BL that can be converted to a BLX.
3987 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
3988 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
3991 val = utils::bit_select(val, (branch_offset >> 2), 0xffffffUL);
3992 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3993 return (utils::has_overflow<26>(branch_offset)
3994 ? This::STATUS_OVERFLOW : This::STATUS_OKAY);
3997 // Relocate THUMB long branches. This handles relocation types
3998 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3999 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4000 // undefined and we do not use PLT in this relocation. In such a case,
4001 // the branch is converted into an NOP.
4003 template<bool big_endian>
4004 typename Arm_relocate_functions<big_endian>::Status
4005 Arm_relocate_functions<big_endian>::thumb_branch_common(
4006 unsigned int r_type,
4007 const Relocate_info<32, big_endian>* relinfo,
4008 unsigned char* view,
4009 const Sized_symbol<32>* gsym,
4010 const Arm_relobj<big_endian>* object,
4012 const Symbol_value<32>* psymval,
4013 Arm_address address,
4014 Arm_address thumb_bit,
4015 bool is_weakly_undefined_without_plt)
4017 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4018 Valtype* wv = reinterpret_cast<Valtype*>(view);
4019 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4020 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4022 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4024 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
4025 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
4027 // Check that the instruction is valid.
4028 if (r_type == elfcpp::R_ARM_THM_CALL)
4030 if (!is_bl_insn && !is_blx_insn)
4031 return This::STATUS_BAD_RELOC;
4033 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
4035 // This cannot be a BLX.
4037 return This::STATUS_BAD_RELOC;
4039 else if (r_type == elfcpp::R_ARM_THM_XPC22)
4041 // Check for Thumb to Thumb call.
4043 return This::STATUS_BAD_RELOC;
4046 gold_warning(_("%s: Thumb BLX instruction targets "
4047 "thumb function '%s'."),
4048 object->name().c_str(),
4049 (gsym ? gsym->name() : "(local)"));
4050 // Convert BLX to BL.
4051 lower_insn |= 0x1000U;
4057 // A branch to an undefined weak symbol is turned into a jump to
4058 // the next instruction unless a PLT entry will be created.
4059 // The jump to the next instruction is optimized as a NOP.W for
4060 // Thumb-2 enabled architectures.
4061 const Target_arm<big_endian>* arm_target =
4062 Target_arm<big_endian>::default_target();
4063 if (is_weakly_undefined_without_plt)
4065 gold_assert(!parameters->options().relocatable());
4066 if (arm_target->may_use_thumb2_nop())
4068 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
4069 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
4073 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
4074 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
4076 return This::STATUS_OKAY;
4079 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
4080 Arm_address branch_target = psymval->value(object, addend);
4082 // For BLX, bit 1 of target address comes from bit 1 of base address.
4083 bool may_use_blx = arm_target->may_use_blx();
4084 if (thumb_bit == 0 && may_use_blx)
4085 branch_target = utils::bit_select(branch_target, address, 0x2);
4087 int32_t branch_offset = branch_target - address;
4089 // We need a stub if the branch offset is too large or if we need
4091 bool thumb2 = arm_target->using_thumb2();
4092 if (!parameters->options().relocatable()
4093 && ((!thumb2 && utils::has_overflow<23>(branch_offset))
4094 || (thumb2 && utils::has_overflow<25>(branch_offset))
4095 || ((thumb_bit == 0)
4096 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4097 || r_type == elfcpp::R_ARM_THM_JUMP24))))
4099 Arm_address unadjusted_branch_target = psymval->value(object, 0);
4101 Stub_type stub_type =
4102 Reloc_stub::stub_type_for_reloc(r_type, address,
4103 unadjusted_branch_target,
4106 if (stub_type != arm_stub_none)
4108 Stub_table<big_endian>* stub_table =
4109 object->stub_table(relinfo->data_shndx);
4110 gold_assert(stub_table != NULL);
4112 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4113 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
4114 gold_assert(stub != NULL);
4115 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4116 branch_target = stub_table->address() + stub->offset() + addend;
4117 if (thumb_bit == 0 && may_use_blx)
4118 branch_target = utils::bit_select(branch_target, address, 0x2);
4119 branch_offset = branch_target - address;
4123 // At this point, if we still need to switch mode, the instruction
4124 // must either be a BLX or a BL that can be converted to a BLX.
4127 gold_assert(may_use_blx
4128 && (r_type == elfcpp::R_ARM_THM_CALL
4129 || r_type == elfcpp::R_ARM_THM_XPC22));
4130 // Make sure this is a BLX.
4131 lower_insn &= ~0x1000U;
4135 // Make sure this is a BL.
4136 lower_insn |= 0x1000U;
4139 // For a BLX instruction, make sure that the relocation is rounded up
4140 // to a word boundary. This follows the semantics of the instruction
4141 // which specifies that bit 1 of the target address will come from bit
4142 // 1 of the base address.
4143 if ((lower_insn & 0x5000U) == 0x4000U)
4144 gold_assert((branch_offset & 3) == 0);
4146 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4147 // We use the Thumb-2 encoding, which is safe even if dealing with
4148 // a Thumb-1 instruction by virtue of our overflow check above. */
4149 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
4150 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
4152 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4153 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4155 gold_assert(!utils::has_overflow<25>(branch_offset));
4158 ? utils::has_overflow<25>(branch_offset)
4159 : utils::has_overflow<23>(branch_offset))
4160 ? This::STATUS_OVERFLOW
4161 : This::STATUS_OKAY);
4164 // Relocate THUMB-2 long conditional branches.
4165 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4166 // undefined and we do not use PLT in this relocation. In such a case,
4167 // the branch is converted into an NOP.
4169 template<bool big_endian>
4170 typename Arm_relocate_functions<big_endian>::Status
4171 Arm_relocate_functions<big_endian>::thm_jump19(
4172 unsigned char* view,
4173 const Arm_relobj<big_endian>* object,
4174 const Symbol_value<32>* psymval,
4175 Arm_address address,
4176 Arm_address thumb_bit)
4178 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4179 Valtype* wv = reinterpret_cast<Valtype*>(view);
4180 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4181 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4182 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
4184 Arm_address branch_target = psymval->value(object, addend);
4185 int32_t branch_offset = branch_target - address;
4187 // ??? Should handle interworking? GCC might someday try to
4188 // use this for tail calls.
4189 // FIXME: We do support thumb entry to PLT yet.
4192 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4193 return This::STATUS_BAD_RELOC;
4196 // Put RELOCATION back into the insn.
4197 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
4198 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
4200 // Put the relocated value back in the object file:
4201 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4202 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4204 return (utils::has_overflow<21>(branch_offset)
4205 ? This::STATUS_OVERFLOW
4206 : This::STATUS_OKAY);
4209 // Get the GOT section, creating it if necessary.
4211 template<bool big_endian>
4212 Arm_output_data_got<big_endian>*
4213 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
4215 if (this->got_ == NULL)
4217 gold_assert(symtab != NULL && layout != NULL);
4219 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout);
4221 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4222 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4223 this->got_, ORDER_DATA, false);
4225 // The old GNU linker creates a .got.plt section. We just
4226 // create another set of data in the .got section. Note that we
4227 // always create a PLT if we create a GOT, although the PLT
4229 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
4230 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4231 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4232 this->got_plt_, ORDER_DATA, false);
4234 // The first three entries are reserved.
4235 this->got_plt_->set_current_data_size(3 * 4);
4237 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4238 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
4239 Symbol_table::PREDEFINED,
4241 0, 0, elfcpp::STT_OBJECT,
4243 elfcpp::STV_HIDDEN, 0,
4249 // Get the dynamic reloc section, creating it if necessary.
4251 template<bool big_endian>
4252 typename Target_arm<big_endian>::Reloc_section*
4253 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
4255 if (this->rel_dyn_ == NULL)
4257 gold_assert(layout != NULL);
4258 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
4259 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4260 elfcpp::SHF_ALLOC, this->rel_dyn_,
4261 ORDER_DYNAMIC_RELOCS, false);
4263 return this->rel_dyn_;
4266 // Insn_template methods.
4268 // Return byte size of an instruction template.
4271 Insn_template::size() const
4273 switch (this->type())
4276 case THUMB16_SPECIAL_TYPE:
4287 // Return alignment of an instruction template.
4290 Insn_template::alignment() const
4292 switch (this->type())
4295 case THUMB16_SPECIAL_TYPE:
4306 // Stub_template methods.
4308 Stub_template::Stub_template(
4309 Stub_type type, const Insn_template* insns,
4311 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
4312 entry_in_thumb_mode_(false), relocs_()
4316 // Compute byte size and alignment of stub template.
4317 for (size_t i = 0; i < insn_count; i++)
4319 unsigned insn_alignment = insns[i].alignment();
4320 size_t insn_size = insns[i].size();
4321 gold_assert((offset & (insn_alignment - 1)) == 0);
4322 this->alignment_ = std::max(this->alignment_, insn_alignment);
4323 switch (insns[i].type())
4325 case Insn_template::THUMB16_TYPE:
4326 case Insn_template::THUMB16_SPECIAL_TYPE:
4328 this->entry_in_thumb_mode_ = true;
4331 case Insn_template::THUMB32_TYPE:
4332 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
4333 this->relocs_.push_back(Reloc(i, offset));
4335 this->entry_in_thumb_mode_ = true;
4338 case Insn_template::ARM_TYPE:
4339 // Handle cases where the target is encoded within the
4341 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
4342 this->relocs_.push_back(Reloc(i, offset));
4345 case Insn_template::DATA_TYPE:
4346 // Entry point cannot be data.
4347 gold_assert(i != 0);
4348 this->relocs_.push_back(Reloc(i, offset));
4354 offset += insn_size;
4356 this->size_ = offset;
4361 // Template to implement do_write for a specific target endianness.
4363 template<bool big_endian>
4365 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4367 const Stub_template* stub_template = this->stub_template();
4368 const Insn_template* insns = stub_template->insns();
4370 // FIXME: We do not handle BE8 encoding yet.
4371 unsigned char* pov = view;
4372 for (size_t i = 0; i < stub_template->insn_count(); i++)
4374 switch (insns[i].type())
4376 case Insn_template::THUMB16_TYPE:
4377 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4379 case Insn_template::THUMB16_SPECIAL_TYPE:
4380 elfcpp::Swap<16, big_endian>::writeval(
4382 this->thumb16_special(i));
4384 case Insn_template::THUMB32_TYPE:
4386 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4387 uint32_t lo = insns[i].data() & 0xffff;
4388 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4389 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4392 case Insn_template::ARM_TYPE:
4393 case Insn_template::DATA_TYPE:
4394 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4399 pov += insns[i].size();
4401 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4404 // Reloc_stub::Key methods.
4406 // Dump a Key as a string for debugging.
4409 Reloc_stub::Key::name() const
4411 if (this->r_sym_ == invalid_index)
4413 // Global symbol key name
4414 // <stub-type>:<symbol name>:<addend>.
4415 const std::string sym_name = this->u_.symbol->name();
4416 // We need to print two hex number and two colons. So just add 100 bytes
4417 // to the symbol name size.
4418 size_t len = sym_name.size() + 100;
4419 char* buffer = new char[len];
4420 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4421 sym_name.c_str(), this->addend_);
4422 gold_assert(c > 0 && c < static_cast<int>(len));
4424 return std::string(buffer);
4428 // local symbol key name
4429 // <stub-type>:<object>:<r_sym>:<addend>.
4430 const size_t len = 200;
4432 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4433 this->u_.relobj, this->r_sym_, this->addend_);
4434 gold_assert(c > 0 && c < static_cast<int>(len));
4435 return std::string(buffer);
4439 // Reloc_stub methods.
4441 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4442 // LOCATION to DESTINATION.
4443 // This code is based on the arm_type_of_stub function in
4444 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4448 Reloc_stub::stub_type_for_reloc(
4449 unsigned int r_type,
4450 Arm_address location,
4451 Arm_address destination,
4452 bool target_is_thumb)
4454 Stub_type stub_type = arm_stub_none;
4456 // This is a bit ugly but we want to avoid using a templated class for
4457 // big and little endianities.
4459 bool should_force_pic_veneer;
4462 if (parameters->target().is_big_endian())
4464 const Target_arm<true>* big_endian_target =
4465 Target_arm<true>::default_target();
4466 may_use_blx = big_endian_target->may_use_blx();
4467 should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
4468 thumb2 = big_endian_target->using_thumb2();
4469 thumb_only = big_endian_target->using_thumb_only();
4473 const Target_arm<false>* little_endian_target =
4474 Target_arm<false>::default_target();
4475 may_use_blx = little_endian_target->may_use_blx();
4476 should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
4477 thumb2 = little_endian_target->using_thumb2();
4478 thumb_only = little_endian_target->using_thumb_only();
4481 int64_t branch_offset;
4482 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4484 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4485 // base address (instruction address + 4).
4486 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb)
4487 destination = utils::bit_select(destination, location, 0x2);
4488 branch_offset = static_cast<int64_t>(destination) - location;
4490 // Handle cases where:
4491 // - this call goes too far (different Thumb/Thumb2 max
4493 // - it's a Thumb->Arm call and blx is not available, or it's a
4494 // Thumb->Arm branch (not bl). A stub is needed in this case.
4496 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4497 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4499 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4500 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4501 || ((!target_is_thumb)
4502 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4503 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4505 if (target_is_thumb)
4510 stub_type = (parameters->options().shared()
4511 || should_force_pic_veneer)
4514 && (r_type == elfcpp::R_ARM_THM_CALL))
4515 // V5T and above. Stub starts with ARM code, so
4516 // we must be able to switch mode before
4517 // reaching it, which is only possible for 'bl'
4518 // (ie R_ARM_THM_CALL relocation).
4519 ? arm_stub_long_branch_any_thumb_pic
4520 // On V4T, use Thumb code only.
4521 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4525 && (r_type == elfcpp::R_ARM_THM_CALL))
4526 ? arm_stub_long_branch_any_any // V5T and above.
4527 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4531 stub_type = (parameters->options().shared()
4532 || should_force_pic_veneer)
4533 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4534 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4541 // FIXME: We should check that the input section is from an
4542 // object that has interwork enabled.
4544 stub_type = (parameters->options().shared()
4545 || should_force_pic_veneer)
4548 && (r_type == elfcpp::R_ARM_THM_CALL))
4549 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4550 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4554 && (r_type == elfcpp::R_ARM_THM_CALL))
4555 ? arm_stub_long_branch_any_any // V5T and above.
4556 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4558 // Handle v4t short branches.
4559 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4560 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4561 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4562 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4566 else if (r_type == elfcpp::R_ARM_CALL
4567 || r_type == elfcpp::R_ARM_JUMP24
4568 || r_type == elfcpp::R_ARM_PLT32)
4570 branch_offset = static_cast<int64_t>(destination) - location;
4571 if (target_is_thumb)
4575 // FIXME: We should check that the input section is from an
4576 // object that has interwork enabled.
4578 // We have an extra 2-bytes reach because of
4579 // the mode change (bit 24 (H) of BLX encoding).
4580 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4581 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4582 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4583 || (r_type == elfcpp::R_ARM_JUMP24)
4584 || (r_type == elfcpp::R_ARM_PLT32))
4586 stub_type = (parameters->options().shared()
4587 || should_force_pic_veneer)
4590 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4591 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4595 ? arm_stub_long_branch_any_any // V5T and above.
4596 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4602 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4603 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4605 stub_type = (parameters->options().shared()
4606 || should_force_pic_veneer)
4607 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4608 : arm_stub_long_branch_any_any; /// non-PIC.
4616 // Cortex_a8_stub methods.
4618 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4619 // I is the position of the instruction template in the stub template.
4622 Cortex_a8_stub::do_thumb16_special(size_t i)
4624 // The only use of this is to copy condition code from a conditional
4625 // branch being worked around to the corresponding conditional branch in
4627 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4629 uint16_t data = this->stub_template()->insns()[i].data();
4630 gold_assert((data & 0xff00U) == 0xd000U);
4631 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4635 // Stub_factory methods.
4637 Stub_factory::Stub_factory()
4639 // The instruction template sequences are declared as static
4640 // objects and initialized first time the constructor runs.
4642 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4643 // to reach the stub if necessary.
4644 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4646 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4647 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4648 // dcd R_ARM_ABS32(X)
4651 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4653 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4655 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4656 Insn_template::arm_insn(0xe12fff1c), // bx ip
4657 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4658 // dcd R_ARM_ABS32(X)
4661 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4662 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4664 Insn_template::thumb16_insn(0xb401), // push {r0}
4665 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4666 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4667 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4668 Insn_template::thumb16_insn(0x4760), // bx ip
4669 Insn_template::thumb16_insn(0xbf00), // nop
4670 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4671 // dcd R_ARM_ABS32(X)
4674 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4676 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4678 Insn_template::thumb16_insn(0x4778), // bx pc
4679 Insn_template::thumb16_insn(0x46c0), // nop
4680 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4681 Insn_template::arm_insn(0xe12fff1c), // bx ip
4682 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4683 // dcd R_ARM_ABS32(X)
4686 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4688 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4690 Insn_template::thumb16_insn(0x4778), // bx pc
4691 Insn_template::thumb16_insn(0x46c0), // nop
4692 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4693 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4694 // dcd R_ARM_ABS32(X)
4697 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4698 // one, when the destination is close enough.
4699 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4701 Insn_template::thumb16_insn(0x4778), // bx pc
4702 Insn_template::thumb16_insn(0x46c0), // nop
4703 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4706 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4707 // blx to reach the stub if necessary.
4708 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4710 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4711 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4712 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4713 // dcd R_ARM_REL32(X-4)
4716 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4717 // blx to reach the stub if necessary. We can not add into pc;
4718 // it is not guaranteed to mode switch (different in ARMv6 and
4720 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4722 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4723 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4724 Insn_template::arm_insn(0xe12fff1c), // bx ip
4725 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4726 // dcd R_ARM_REL32(X)
4729 // V4T ARM -> ARM long branch stub, PIC.
4730 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4732 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4733 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4734 Insn_template::arm_insn(0xe12fff1c), // bx ip
4735 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4736 // dcd R_ARM_REL32(X)
4739 // V4T Thumb -> ARM long branch stub, PIC.
4740 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4742 Insn_template::thumb16_insn(0x4778), // bx pc
4743 Insn_template::thumb16_insn(0x46c0), // nop
4744 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4745 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4746 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4747 // dcd R_ARM_REL32(X)
4750 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4752 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4754 Insn_template::thumb16_insn(0xb401), // push {r0}
4755 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4756 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4757 Insn_template::thumb16_insn(0x4484), // add ip, r0
4758 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4759 Insn_template::thumb16_insn(0x4760), // bx ip
4760 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4761 // dcd R_ARM_REL32(X)
4764 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4766 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4768 Insn_template::thumb16_insn(0x4778), // bx pc
4769 Insn_template::thumb16_insn(0x46c0), // nop
4770 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4771 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4772 Insn_template::arm_insn(0xe12fff1c), // bx ip
4773 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4774 // dcd R_ARM_REL32(X)
4777 // Cortex-A8 erratum-workaround stubs.
4779 // Stub used for conditional branches (which may be beyond +/-1MB away,
4780 // so we can't use a conditional branch to reach this stub).
4787 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4789 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4790 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4791 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4795 // Stub used for b.w and bl.w instructions.
4797 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4799 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4802 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4804 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4807 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4808 // instruction (which switches to ARM mode) to point to this stub. Jump to
4809 // the real destination using an ARM-mode branch.
4810 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4812 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4815 // Stub used to provide an interworking for R_ARM_V4BX relocation
4816 // (bx r[n] instruction).
4817 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4819 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4820 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4821 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4824 // Fill in the stub template look-up table. Stub templates are constructed
4825 // per instance of Stub_factory for fast look-up without locking
4826 // in a thread-enabled environment.
4828 this->stub_templates_[arm_stub_none] =
4829 new Stub_template(arm_stub_none, NULL, 0);
4831 #define DEF_STUB(x) \
4835 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4836 Stub_type type = arm_stub_##x; \
4837 this->stub_templates_[type] = \
4838 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4846 // Stub_table methods.
4848 // Remove all Cortex-A8 stub.
4850 template<bool big_endian>
4852 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4854 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4855 p != this->cortex_a8_stubs_.end();
4858 this->cortex_a8_stubs_.clear();
4861 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4863 template<bool big_endian>
4865 Stub_table<big_endian>::relocate_stub(
4867 const Relocate_info<32, big_endian>* relinfo,
4868 Target_arm<big_endian>* arm_target,
4869 Output_section* output_section,
4870 unsigned char* view,
4871 Arm_address address,
4872 section_size_type view_size)
4874 const Stub_template* stub_template = stub->stub_template();
4875 if (stub_template->reloc_count() != 0)
4877 // Adjust view to cover the stub only.
4878 section_size_type offset = stub->offset();
4879 section_size_type stub_size = stub_template->size();
4880 gold_assert(offset + stub_size <= view_size);
4882 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4883 address + offset, stub_size);
4887 // Relocate all stubs in this stub table.
4889 template<bool big_endian>
4891 Stub_table<big_endian>::relocate_stubs(
4892 const Relocate_info<32, big_endian>* relinfo,
4893 Target_arm<big_endian>* arm_target,
4894 Output_section* output_section,
4895 unsigned char* view,
4896 Arm_address address,
4897 section_size_type view_size)
4899 // If we are passed a view bigger than the stub table's. we need to
4901 gold_assert(address == this->address()
4903 == static_cast<section_size_type>(this->data_size())));
4905 // Relocate all relocation stubs.
4906 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4907 p != this->reloc_stubs_.end();
4909 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4910 address, view_size);
4912 // Relocate all Cortex-A8 stubs.
4913 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4914 p != this->cortex_a8_stubs_.end();
4916 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4917 address, view_size);
4919 // Relocate all ARM V4BX stubs.
4920 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
4921 p != this->arm_v4bx_stubs_.end();
4925 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
4926 address, view_size);
4930 // Write out the stubs to file.
4932 template<bool big_endian>
4934 Stub_table<big_endian>::do_write(Output_file* of)
4936 off_t offset = this->offset();
4937 const section_size_type oview_size =
4938 convert_to_section_size_type(this->data_size());
4939 unsigned char* const oview = of->get_output_view(offset, oview_size);
4941 // Write relocation stubs.
4942 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4943 p != this->reloc_stubs_.end();
4946 Reloc_stub* stub = p->second;
4947 Arm_address address = this->address() + stub->offset();
4949 == align_address(address,
4950 stub->stub_template()->alignment()));
4951 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4955 // Write Cortex-A8 stubs.
4956 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4957 p != this->cortex_a8_stubs_.end();
4960 Cortex_a8_stub* stub = p->second;
4961 Arm_address address = this->address() + stub->offset();
4963 == align_address(address,
4964 stub->stub_template()->alignment()));
4965 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4969 // Write ARM V4BX relocation stubs.
4970 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4971 p != this->arm_v4bx_stubs_.end();
4977 Arm_address address = this->address() + (*p)->offset();
4979 == align_address(address,
4980 (*p)->stub_template()->alignment()));
4981 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
4985 of->write_output_view(this->offset(), oview_size, oview);
4988 // Update the data size and address alignment of the stub table at the end
4989 // of a relaxation pass. Return true if either the data size or the
4990 // alignment changed in this relaxation pass.
4992 template<bool big_endian>
4994 Stub_table<big_endian>::update_data_size_and_addralign()
4996 // Go over all stubs in table to compute data size and address alignment.
4997 off_t size = this->reloc_stubs_size_;
4998 unsigned addralign = this->reloc_stubs_addralign_;
5000 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5001 p != this->cortex_a8_stubs_.end();
5004 const Stub_template* stub_template = p->second->stub_template();
5005 addralign = std::max(addralign, stub_template->alignment());
5006 size = (align_address(size, stub_template->alignment())
5007 + stub_template->size());
5010 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5011 p != this->arm_v4bx_stubs_.end();
5017 const Stub_template* stub_template = (*p)->stub_template();
5018 addralign = std::max(addralign, stub_template->alignment());
5019 size = (align_address(size, stub_template->alignment())
5020 + stub_template->size());
5023 // Check if either data size or alignment changed in this pass.
5024 // Update prev_data_size_ and prev_addralign_. These will be used
5025 // as the current data size and address alignment for the next pass.
5026 bool changed = size != this->prev_data_size_;
5027 this->prev_data_size_ = size;
5029 if (addralign != this->prev_addralign_)
5031 this->prev_addralign_ = addralign;
5036 // Finalize the stubs. This sets the offsets of the stubs within the stub
5037 // table. It also marks all input sections needing Cortex-A8 workaround.
5039 template<bool big_endian>
5041 Stub_table<big_endian>::finalize_stubs()
5043 off_t off = this->reloc_stubs_size_;
5044 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5045 p != this->cortex_a8_stubs_.end();
5048 Cortex_a8_stub* stub = p->second;
5049 const Stub_template* stub_template = stub->stub_template();
5050 uint64_t stub_addralign = stub_template->alignment();
5051 off = align_address(off, stub_addralign);
5052 stub->set_offset(off);
5053 off += stub_template->size();
5055 // Mark input section so that we can determine later if a code section
5056 // needs the Cortex-A8 workaround quickly.
5057 Arm_relobj<big_endian>* arm_relobj =
5058 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
5059 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
5062 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5063 p != this->arm_v4bx_stubs_.end();
5069 const Stub_template* stub_template = (*p)->stub_template();
5070 uint64_t stub_addralign = stub_template->alignment();
5071 off = align_address(off, stub_addralign);
5072 (*p)->set_offset(off);
5073 off += stub_template->size();
5076 gold_assert(off <= this->prev_data_size_);
5079 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5080 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5081 // of the address range seen by the linker.
5083 template<bool big_endian>
5085 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
5086 Target_arm<big_endian>* arm_target,
5087 unsigned char* view,
5088 Arm_address view_address,
5089 section_size_type view_size)
5091 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5092 for (Cortex_a8_stub_list::const_iterator p =
5093 this->cortex_a8_stubs_.lower_bound(view_address);
5094 ((p != this->cortex_a8_stubs_.end())
5095 && (p->first < (view_address + view_size)));
5098 // We do not store the THUMB bit in the LSB of either the branch address
5099 // or the stub offset. There is no need to strip the LSB.
5100 Arm_address branch_address = p->first;
5101 const Cortex_a8_stub* stub = p->second;
5102 Arm_address stub_address = this->address() + stub->offset();
5104 // Offset of the branch instruction relative to this view.
5105 section_size_type offset =
5106 convert_to_section_size_type(branch_address - view_address);
5107 gold_assert((offset + 4) <= view_size);
5109 arm_target->apply_cortex_a8_workaround(stub, stub_address,
5110 view + offset, branch_address);
5114 // Arm_input_section methods.
5116 // Initialize an Arm_input_section.
5118 template<bool big_endian>
5120 Arm_input_section<big_endian>::init()
5122 Relobj* relobj = this->relobj();
5123 unsigned int shndx = this->shndx();
5125 // We have to cache original size, alignment and contents to avoid locking
5126 // the original file.
5127 this->original_addralign_ =
5128 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx));
5130 // This is not efficient but we expect only a small number of relaxed
5131 // input sections for stubs.
5132 section_size_type section_size;
5133 const unsigned char* section_contents =
5134 relobj->section_contents(shndx, §ion_size, false);
5135 this->original_size_ =
5136 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx));
5138 gold_assert(this->original_contents_ == NULL);
5139 this->original_contents_ = new unsigned char[section_size];
5140 memcpy(this->original_contents_, section_contents, section_size);
5142 // We want to make this look like the original input section after
5143 // output sections are finalized.
5144 Output_section* os = relobj->output_section(shndx);
5145 off_t offset = relobj->output_section_offset(shndx);
5146 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
5147 this->set_address(os->address() + offset);
5148 this->set_file_offset(os->offset() + offset);
5150 this->set_current_data_size(this->original_size_);
5151 this->finalize_data_size();
5154 template<bool big_endian>
5156 Arm_input_section<big_endian>::do_write(Output_file* of)
5158 // We have to write out the original section content.
5159 gold_assert(this->original_contents_ != NULL);
5160 of->write(this->offset(), this->original_contents_,
5161 this->original_size_);
5163 // If this owns a stub table and it is not empty, write it.
5164 if (this->is_stub_table_owner() && !this->stub_table_->empty())
5165 this->stub_table_->write(of);
5168 // Finalize data size.
5170 template<bool big_endian>
5172 Arm_input_section<big_endian>::set_final_data_size()
5174 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5176 if (this->is_stub_table_owner())
5178 this->stub_table_->finalize_data_size();
5179 off = align_address(off, this->stub_table_->addralign());
5180 off += this->stub_table_->data_size();
5182 this->set_data_size(off);
5185 // Reset address and file offset.
5187 template<bool big_endian>
5189 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
5191 // Size of the original input section contents.
5192 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5194 // If this is a stub table owner, account for the stub table size.
5195 if (this->is_stub_table_owner())
5197 Stub_table<big_endian>* stub_table = this->stub_table_;
5199 // Reset the stub table's address and file offset. The
5200 // current data size for child will be updated after that.
5201 stub_table_->reset_address_and_file_offset();
5202 off = align_address(off, stub_table_->addralign());
5203 off += stub_table->current_data_size();
5206 this->set_current_data_size(off);
5209 // Arm_exidx_cantunwind methods.
5211 // Write this to Output file OF for a fixed endianness.
5213 template<bool big_endian>
5215 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
5217 off_t offset = this->offset();
5218 const section_size_type oview_size = 8;
5219 unsigned char* const oview = of->get_output_view(offset, oview_size);
5221 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5222 Valtype* wv = reinterpret_cast<Valtype*>(oview);
5224 Output_section* os = this->relobj_->output_section(this->shndx_);
5225 gold_assert(os != NULL);
5227 Arm_relobj<big_endian>* arm_relobj =
5228 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
5229 Arm_address output_offset =
5230 arm_relobj->get_output_section_offset(this->shndx_);
5231 Arm_address section_start;
5232 section_size_type section_size;
5234 // Find out the end of the text section referred by this.
5235 if (output_offset != Arm_relobj<big_endian>::invalid_address)
5237 section_start = os->address() + output_offset;
5238 const Arm_exidx_input_section* exidx_input_section =
5239 arm_relobj->exidx_input_section_by_link(this->shndx_);
5240 gold_assert(exidx_input_section != NULL);
5242 convert_to_section_size_type(exidx_input_section->text_size());
5246 // Currently this only happens for a relaxed section.
5247 const Output_relaxed_input_section* poris =
5248 os->find_relaxed_input_section(this->relobj_, this->shndx_);
5249 gold_assert(poris != NULL);
5250 section_start = poris->address();
5251 section_size = convert_to_section_size_type(poris->data_size());
5254 // We always append this to the end of an EXIDX section.
5255 Arm_address output_address = section_start + section_size;
5257 // Write out the entry. The first word either points to the beginning
5258 // or after the end of a text section. The second word is the special
5259 // EXIDX_CANTUNWIND value.
5260 uint32_t prel31_offset = output_address - this->address();
5261 if (utils::has_overflow<31>(offset))
5262 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5263 elfcpp::Swap<32, big_endian>::writeval(wv, prel31_offset & 0x7fffffffU);
5264 elfcpp::Swap<32, big_endian>::writeval(wv + 1, elfcpp::EXIDX_CANTUNWIND);
5266 of->write_output_view(this->offset(), oview_size, oview);
5269 // Arm_exidx_merged_section methods.
5271 // Constructor for Arm_exidx_merged_section.
5272 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5273 // SECTION_OFFSET_MAP points to a section offset map describing how
5274 // parts of the input section are mapped to output. DELETED_BYTES is
5275 // the number of bytes deleted from the EXIDX input section.
5277 Arm_exidx_merged_section::Arm_exidx_merged_section(
5278 const Arm_exidx_input_section& exidx_input_section,
5279 const Arm_exidx_section_offset_map& section_offset_map,
5280 uint32_t deleted_bytes)
5281 : Output_relaxed_input_section(exidx_input_section.relobj(),
5282 exidx_input_section.shndx(),
5283 exidx_input_section.addralign()),
5284 exidx_input_section_(exidx_input_section),
5285 section_offset_map_(section_offset_map)
5287 // If we retain or discard the whole EXIDX input section, we would
5289 gold_assert(deleted_bytes != 0
5290 && deleted_bytes != this->exidx_input_section_.size());
5292 // Fix size here so that we do not need to implement set_final_data_size.
5293 uint32_t size = exidx_input_section.size() - deleted_bytes;
5294 this->set_data_size(size);
5295 this->fix_data_size();
5297 // Allocate buffer for section contents and build contents.
5298 this->section_contents_ = new unsigned char[size];
5301 // Build the contents of a merged EXIDX output section.
5304 Arm_exidx_merged_section::build_contents(
5305 const unsigned char* original_contents,
5306 section_size_type original_size)
5308 // Go over spans of input offsets and write only those that are not
5310 section_offset_type in_start = 0;
5311 section_offset_type out_start = 0;
5312 section_offset_type in_max =
5313 convert_types<section_offset_type>(original_size);
5314 section_offset_type out_max =
5315 convert_types<section_offset_type>(this->data_size());
5316 for (Arm_exidx_section_offset_map::const_iterator p =
5317 this->section_offset_map_.begin();
5318 p != this->section_offset_map_.end();
5321 section_offset_type in_end = p->first;
5322 gold_assert(in_end >= in_start);
5323 section_offset_type out_end = p->second;
5324 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5327 size_t out_chunk_size =
5328 convert_types<size_t>(out_end - out_start + 1);
5330 gold_assert(out_chunk_size == in_chunk_size
5331 && in_end < in_max && out_end < out_max);
5333 memcpy(this->section_contents_ + out_start,
5334 original_contents + in_start,
5336 out_start += out_chunk_size;
5338 in_start += in_chunk_size;
5342 // Given an input OBJECT, an input section index SHNDX within that
5343 // object, and an OFFSET relative to the start of that input
5344 // section, return whether or not the corresponding offset within
5345 // the output section is known. If this function returns true, it
5346 // sets *POUTPUT to the output offset. The value -1 indicates that
5347 // this input offset is being discarded.
5350 Arm_exidx_merged_section::do_output_offset(
5351 const Relobj* relobj,
5353 section_offset_type offset,
5354 section_offset_type* poutput) const
5356 // We only handle offsets for the original EXIDX input section.
5357 if (relobj != this->exidx_input_section_.relobj()
5358 || shndx != this->exidx_input_section_.shndx())
5361 section_offset_type section_size =
5362 convert_types<section_offset_type>(this->exidx_input_section_.size());
5363 if (offset < 0 || offset >= section_size)
5364 // Input offset is out of valid range.
5368 // We need to look up the section offset map to determine the output
5369 // offset. Find the reference point in map that is first offset
5370 // bigger than or equal to this offset.
5371 Arm_exidx_section_offset_map::const_iterator p =
5372 this->section_offset_map_.lower_bound(offset);
5374 // The section offset maps are build such that this should not happen if
5375 // input offset is in the valid range.
5376 gold_assert(p != this->section_offset_map_.end());
5378 // We need to check if this is dropped.
5379 section_offset_type ref = p->first;
5380 section_offset_type mapped_ref = p->second;
5382 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
5383 // Offset is present in output.
5384 *poutput = mapped_ref + (offset - ref);
5386 // Offset is discarded owing to EXIDX entry merging.
5393 // Write this to output file OF.
5396 Arm_exidx_merged_section::do_write(Output_file* of)
5398 off_t offset = this->offset();
5399 const section_size_type oview_size = this->data_size();
5400 unsigned char* const oview = of->get_output_view(offset, oview_size);
5402 Output_section* os = this->relobj()->output_section(this->shndx());
5403 gold_assert(os != NULL);
5405 memcpy(oview, this->section_contents_, oview_size);
5406 of->write_output_view(this->offset(), oview_size, oview);
5409 // Arm_exidx_fixup methods.
5411 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5412 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5413 // points to the end of the last seen EXIDX section.
5416 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5418 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5419 && this->last_input_section_ != NULL)
5421 Relobj* relobj = this->last_input_section_->relobj();
5422 unsigned int text_shndx = this->last_input_section_->link();
5423 Arm_exidx_cantunwind* cantunwind =
5424 new Arm_exidx_cantunwind(relobj, text_shndx);
5425 this->exidx_output_section_->add_output_section_data(cantunwind);
5426 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5430 // Process an EXIDX section entry in input. Return whether this entry
5431 // can be deleted in the output. SECOND_WORD in the second word of the
5435 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5438 if (second_word == elfcpp::EXIDX_CANTUNWIND)
5440 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5441 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5442 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5444 else if ((second_word & 0x80000000) != 0)
5446 // Inlined unwinding data. Merge if equal to previous.
5447 delete_entry = (merge_exidx_entries_
5448 && this->last_unwind_type_ == UT_INLINED_ENTRY
5449 && this->last_inlined_entry_ == second_word);
5450 this->last_unwind_type_ = UT_INLINED_ENTRY;
5451 this->last_inlined_entry_ = second_word;
5455 // Normal table entry. In theory we could merge these too,
5456 // but duplicate entries are likely to be much less common.
5457 delete_entry = false;
5458 this->last_unwind_type_ = UT_NORMAL_ENTRY;
5460 return delete_entry;
5463 // Update the current section offset map during EXIDX section fix-up.
5464 // If there is no map, create one. INPUT_OFFSET is the offset of a
5465 // reference point, DELETED_BYTES is the number of deleted by in the
5466 // section so far. If DELETE_ENTRY is true, the reference point and
5467 // all offsets after the previous reference point are discarded.
5470 Arm_exidx_fixup::update_offset_map(
5471 section_offset_type input_offset,
5472 section_size_type deleted_bytes,
5475 if (this->section_offset_map_ == NULL)
5476 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5477 section_offset_type output_offset;
5479 output_offset = Arm_exidx_input_section::invalid_offset;
5481 output_offset = input_offset - deleted_bytes;
5482 (*this->section_offset_map_)[input_offset] = output_offset;
5485 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5486 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5487 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5488 // If some entries are merged, also store a pointer to a newly created
5489 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5490 // owns the map and is responsible for releasing it after use.
5492 template<bool big_endian>
5494 Arm_exidx_fixup::process_exidx_section(
5495 const Arm_exidx_input_section* exidx_input_section,
5496 const unsigned char* section_contents,
5497 section_size_type section_size,
5498 Arm_exidx_section_offset_map** psection_offset_map)
5500 Relobj* relobj = exidx_input_section->relobj();
5501 unsigned shndx = exidx_input_section->shndx();
5503 if ((section_size % 8) != 0)
5505 // Something is wrong with this section. Better not touch it.
5506 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5507 relobj->name().c_str(), shndx);
5508 this->last_input_section_ = exidx_input_section;
5509 this->last_unwind_type_ = UT_NONE;
5513 uint32_t deleted_bytes = 0;
5514 bool prev_delete_entry = false;
5515 gold_assert(this->section_offset_map_ == NULL);
5517 for (section_size_type i = 0; i < section_size; i += 8)
5519 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5521 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5522 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5524 bool delete_entry = this->process_exidx_entry(second_word);
5526 // Entry deletion causes changes in output offsets. We use a std::map
5527 // to record these. And entry (x, y) means input offset x
5528 // is mapped to output offset y. If y is invalid_offset, then x is
5529 // dropped in the output. Because of the way std::map::lower_bound
5530 // works, we record the last offset in a region w.r.t to keeping or
5531 // dropping. If there is no entry (x0, y0) for an input offset x0,
5532 // the output offset y0 of it is determined by the output offset y1 of
5533 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5534 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5536 if (delete_entry != prev_delete_entry && i != 0)
5537 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5539 // Update total deleted bytes for this entry.
5543 prev_delete_entry = delete_entry;
5546 // If section offset map is not NULL, make an entry for the end of
5548 if (this->section_offset_map_ != NULL)
5549 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5551 *psection_offset_map = this->section_offset_map_;
5552 this->section_offset_map_ = NULL;
5553 this->last_input_section_ = exidx_input_section;
5555 // Set the first output text section so that we can link the EXIDX output
5556 // section to it. Ignore any EXIDX input section that is completely merged.
5557 if (this->first_output_text_section_ == NULL
5558 && deleted_bytes != section_size)
5560 unsigned int link = exidx_input_section->link();
5561 Output_section* os = relobj->output_section(link);
5562 gold_assert(os != NULL);
5563 this->first_output_text_section_ = os;
5566 return deleted_bytes;
5569 // Arm_output_section methods.
5571 // Create a stub group for input sections from BEGIN to END. OWNER
5572 // points to the input section to be the owner a new stub table.
5574 template<bool big_endian>
5576 Arm_output_section<big_endian>::create_stub_group(
5577 Input_section_list::const_iterator begin,
5578 Input_section_list::const_iterator end,
5579 Input_section_list::const_iterator owner,
5580 Target_arm<big_endian>* target,
5581 std::vector<Output_relaxed_input_section*>* new_relaxed_sections,
5584 // We use a different kind of relaxed section in an EXIDX section.
5585 // The static casting from Output_relaxed_input_section to
5586 // Arm_input_section is invalid in an EXIDX section. We are okay
5587 // because we should not be calling this for an EXIDX section.
5588 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5590 // Currently we convert ordinary input sections into relaxed sections only
5591 // at this point but we may want to support creating relaxed input section
5592 // very early. So we check here to see if owner is already a relaxed
5595 Arm_input_section<big_endian>* arm_input_section;
5596 if (owner->is_relaxed_input_section())
5599 Arm_input_section<big_endian>::as_arm_input_section(
5600 owner->relaxed_input_section());
5604 gold_assert(owner->is_input_section());
5605 // Create a new relaxed input section. We need to lock the original
5607 Task_lock_obj<Object> tl(task, owner->relobj());
5609 target->new_arm_input_section(owner->relobj(), owner->shndx());
5610 new_relaxed_sections->push_back(arm_input_section);
5613 // Create a stub table.
5614 Stub_table<big_endian>* stub_table =
5615 target->new_stub_table(arm_input_section);
5617 arm_input_section->set_stub_table(stub_table);
5619 Input_section_list::const_iterator p = begin;
5620 Input_section_list::const_iterator prev_p;
5622 // Look for input sections or relaxed input sections in [begin ... end].
5625 if (p->is_input_section() || p->is_relaxed_input_section())
5627 // The stub table information for input sections live
5628 // in their objects.
5629 Arm_relobj<big_endian>* arm_relobj =
5630 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5631 arm_relobj->set_stub_table(p->shndx(), stub_table);
5635 while (prev_p != end);
5638 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5639 // of stub groups. We grow a stub group by adding input section until the
5640 // size is just below GROUP_SIZE. The last input section will be converted
5641 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5642 // input section after the stub table, effectively double the group size.
5644 // This is similar to the group_sections() function in elf32-arm.c but is
5645 // implemented differently.
5647 template<bool big_endian>
5649 Arm_output_section<big_endian>::group_sections(
5650 section_size_type group_size,
5651 bool stubs_always_after_branch,
5652 Target_arm<big_endian>* target,
5655 // We only care about sections containing code.
5656 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5659 // States for grouping.
5662 // No group is being built.
5664 // A group is being built but the stub table is not found yet.
5665 // We keep group a stub group until the size is just under GROUP_SIZE.
5666 // The last input section in the group will be used as the stub table.
5667 FINDING_STUB_SECTION,
5668 // A group is being built and we have already found a stub table.
5669 // We enter this state to grow a stub group by adding input section
5670 // after the stub table. This effectively doubles the group size.
5674 // Any newly created relaxed sections are stored here.
5675 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5677 State state = NO_GROUP;
5678 section_size_type off = 0;
5679 section_size_type group_begin_offset = 0;
5680 section_size_type group_end_offset = 0;
5681 section_size_type stub_table_end_offset = 0;
5682 Input_section_list::const_iterator group_begin =
5683 this->input_sections().end();
5684 Input_section_list::const_iterator stub_table =
5685 this->input_sections().end();
5686 Input_section_list::const_iterator group_end = this->input_sections().end();
5687 for (Input_section_list::const_iterator p = this->input_sections().begin();
5688 p != this->input_sections().end();
5691 section_size_type section_begin_offset =
5692 align_address(off, p->addralign());
5693 section_size_type section_end_offset =
5694 section_begin_offset + p->data_size();
5696 // Check to see if we should group the previously seen sections.
5702 case FINDING_STUB_SECTION:
5703 // Adding this section makes the group larger than GROUP_SIZE.
5704 if (section_end_offset - group_begin_offset >= group_size)
5706 if (stubs_always_after_branch)
5708 gold_assert(group_end != this->input_sections().end());
5709 this->create_stub_group(group_begin, group_end, group_end,
5710 target, &new_relaxed_sections,
5716 // But wait, there's more! Input sections up to
5717 // stub_group_size bytes after the stub table can be
5718 // handled by it too.
5719 state = HAS_STUB_SECTION;
5720 stub_table = group_end;
5721 stub_table_end_offset = group_end_offset;
5726 case HAS_STUB_SECTION:
5727 // Adding this section makes the post stub-section group larger
5729 if (section_end_offset - stub_table_end_offset >= group_size)
5731 gold_assert(group_end != this->input_sections().end());
5732 this->create_stub_group(group_begin, group_end, stub_table,
5733 target, &new_relaxed_sections, task);
5742 // If we see an input section and currently there is no group, start
5743 // a new one. Skip any empty sections. We look at the data size
5744 // instead of calling p->relobj()->section_size() to avoid locking.
5745 if ((p->is_input_section() || p->is_relaxed_input_section())
5746 && (p->data_size() != 0))
5748 if (state == NO_GROUP)
5750 state = FINDING_STUB_SECTION;
5752 group_begin_offset = section_begin_offset;
5755 // Keep track of the last input section seen.
5757 group_end_offset = section_end_offset;
5760 off = section_end_offset;
5763 // Create a stub group for any ungrouped sections.
5764 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5766 gold_assert(group_end != this->input_sections().end());
5767 this->create_stub_group(group_begin, group_end,
5768 (state == FINDING_STUB_SECTION
5771 target, &new_relaxed_sections, task);
5774 // Convert input section into relaxed input section in a batch.
5775 if (!new_relaxed_sections.empty())
5776 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5778 // Update the section offsets
5779 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5781 Arm_relobj<big_endian>* arm_relobj =
5782 Arm_relobj<big_endian>::as_arm_relobj(
5783 new_relaxed_sections[i]->relobj());
5784 unsigned int shndx = new_relaxed_sections[i]->shndx();
5785 // Tell Arm_relobj that this input section is converted.
5786 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5790 // Append non empty text sections in this to LIST in ascending
5791 // order of their position in this.
5793 template<bool big_endian>
5795 Arm_output_section<big_endian>::append_text_sections_to_list(
5796 Text_section_list* list)
5798 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5800 for (Input_section_list::const_iterator p = this->input_sections().begin();
5801 p != this->input_sections().end();
5804 // We only care about plain or relaxed input sections. We also
5805 // ignore any merged sections.
5806 if (p->is_input_section() || p->is_relaxed_input_section())
5807 list->push_back(Text_section_list::value_type(p->relobj(),
5812 template<bool big_endian>
5814 Arm_output_section<big_endian>::fix_exidx_coverage(
5816 const Text_section_list& sorted_text_sections,
5817 Symbol_table* symtab,
5818 bool merge_exidx_entries,
5821 // We should only do this for the EXIDX output section.
5822 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5824 // We don't want the relaxation loop to undo these changes, so we discard
5825 // the current saved states and take another one after the fix-up.
5826 this->discard_states();
5828 // Remove all input sections.
5829 uint64_t address = this->address();
5830 typedef std::list<Output_section::Input_section> Input_section_list;
5831 Input_section_list input_sections;
5832 this->reset_address_and_file_offset();
5833 this->get_input_sections(address, std::string(""), &input_sections);
5835 if (!this->input_sections().empty())
5836 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5838 // Go through all the known input sections and record them.
5839 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5840 typedef Unordered_map<Section_id, const Output_section::Input_section*,
5841 Section_id_hash> Text_to_exidx_map;
5842 Text_to_exidx_map text_to_exidx_map;
5843 for (Input_section_list::const_iterator p = input_sections.begin();
5844 p != input_sections.end();
5847 // This should never happen. At this point, we should only see
5848 // plain EXIDX input sections.
5849 gold_assert(!p->is_relaxed_input_section());
5850 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p);
5853 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries);
5855 // Go over the sorted text sections.
5856 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5857 Section_id_set processed_input_sections;
5858 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5859 p != sorted_text_sections.end();
5862 Relobj* relobj = p->first;
5863 unsigned int shndx = p->second;
5865 Arm_relobj<big_endian>* arm_relobj =
5866 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5867 const Arm_exidx_input_section* exidx_input_section =
5868 arm_relobj->exidx_input_section_by_link(shndx);
5870 // If this text section has no EXIDX section or if the EXIDX section
5871 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5872 // of the last seen EXIDX section.
5873 if (exidx_input_section == NULL || exidx_input_section->has_errors())
5875 exidx_fixup.add_exidx_cantunwind_as_needed();
5879 Relobj* exidx_relobj = exidx_input_section->relobj();
5880 unsigned int exidx_shndx = exidx_input_section->shndx();
5881 Section_id sid(exidx_relobj, exidx_shndx);
5882 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid);
5883 if (iter == text_to_exidx_map.end())
5885 // This is odd. We have not seen this EXIDX input section before.
5886 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5887 // issue a warning instead. We assume the user knows what he
5888 // or she is doing. Otherwise, this is an error.
5889 if (layout->script_options()->saw_sections_clause())
5890 gold_warning(_("unwinding may not work because EXIDX input section"
5891 " %u of %s is not in EXIDX output section"),
5892 exidx_shndx, exidx_relobj->name().c_str());
5894 gold_error(_("unwinding may not work because EXIDX input section"
5895 " %u of %s is not in EXIDX output section"),
5896 exidx_shndx, exidx_relobj->name().c_str());
5898 exidx_fixup.add_exidx_cantunwind_as_needed();
5902 // We need to access the contents of the EXIDX section, lock the
5904 Task_lock_obj<Object> tl(task, exidx_relobj);
5905 section_size_type exidx_size;
5906 const unsigned char* exidx_contents =
5907 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false);
5909 // Fix up coverage and append input section to output data list.
5910 Arm_exidx_section_offset_map* section_offset_map = NULL;
5911 uint32_t deleted_bytes =
5912 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5915 §ion_offset_map);
5917 if (deleted_bytes == exidx_input_section->size())
5919 // The whole EXIDX section got merged. Remove it from output.
5920 gold_assert(section_offset_map == NULL);
5921 exidx_relobj->set_output_section(exidx_shndx, NULL);
5923 // All local symbols defined in this input section will be dropped.
5924 // We need to adjust output local symbol count.
5925 arm_relobj->set_output_local_symbol_count_needs_update();
5927 else if (deleted_bytes > 0)
5929 // Some entries are merged. We need to convert this EXIDX input
5930 // section into a relaxed section.
5931 gold_assert(section_offset_map != NULL);
5933 Arm_exidx_merged_section* merged_section =
5934 new Arm_exidx_merged_section(*exidx_input_section,
5935 *section_offset_map, deleted_bytes);
5936 merged_section->build_contents(exidx_contents, exidx_size);
5938 const std::string secname = exidx_relobj->section_name(exidx_shndx);
5939 this->add_relaxed_input_section(layout, merged_section, secname);
5940 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
5942 // All local symbols defined in discarded portions of this input
5943 // section will be dropped. We need to adjust output local symbol
5945 arm_relobj->set_output_local_symbol_count_needs_update();
5949 // Just add back the EXIDX input section.
5950 gold_assert(section_offset_map == NULL);
5951 const Output_section::Input_section* pis = iter->second;
5952 gold_assert(pis->is_input_section());
5953 this->add_script_input_section(*pis);
5956 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
5959 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5960 exidx_fixup.add_exidx_cantunwind_as_needed();
5962 // Remove any known EXIDX input sections that are not processed.
5963 for (Input_section_list::const_iterator p = input_sections.begin();
5964 p != input_sections.end();
5967 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
5968 == processed_input_sections.end())
5970 // We discard a known EXIDX section because its linked
5971 // text section has been folded by ICF. We also discard an
5972 // EXIDX section with error, the output does not matter in this
5973 // case. We do this to avoid triggering asserts.
5974 Arm_relobj<big_endian>* arm_relobj =
5975 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5976 const Arm_exidx_input_section* exidx_input_section =
5977 arm_relobj->exidx_input_section_by_shndx(p->shndx());
5978 gold_assert(exidx_input_section != NULL);
5979 if (!exidx_input_section->has_errors())
5981 unsigned int text_shndx = exidx_input_section->link();
5982 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
5985 // Remove this from link. We also need to recount the
5987 p->relobj()->set_output_section(p->shndx(), NULL);
5988 arm_relobj->set_output_local_symbol_count_needs_update();
5992 // Link exidx output section to the first seen output section and
5993 // set correct entry size.
5994 this->set_link_section(exidx_fixup.first_output_text_section());
5995 this->set_entsize(8);
5997 // Make changes permanent.
5998 this->save_states();
5999 this->set_section_offsets_need_adjustment();
6002 // Link EXIDX output sections to text output sections.
6004 template<bool big_endian>
6006 Arm_output_section<big_endian>::set_exidx_section_link()
6008 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
6009 if (!this->input_sections().empty())
6011 Input_section_list::const_iterator p = this->input_sections().begin();
6012 Arm_relobj<big_endian>* arm_relobj =
6013 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6014 unsigned exidx_shndx = p->shndx();
6015 const Arm_exidx_input_section* exidx_input_section =
6016 arm_relobj->exidx_input_section_by_shndx(exidx_shndx);
6017 gold_assert(exidx_input_section != NULL);
6018 unsigned int text_shndx = exidx_input_section->link();
6019 Output_section* os = arm_relobj->output_section(text_shndx);
6020 this->set_link_section(os);
6024 // Arm_relobj methods.
6026 // Determine if an input section is scannable for stub processing. SHDR is
6027 // the header of the section and SHNDX is the section index. OS is the output
6028 // section for the input section and SYMTAB is the global symbol table used to
6029 // look up ICF information.
6031 template<bool big_endian>
6033 Arm_relobj<big_endian>::section_is_scannable(
6034 const elfcpp::Shdr<32, big_endian>& shdr,
6036 const Output_section* os,
6037 const Symbol_table* symtab)
6039 // Skip any empty sections, unallocated sections or sections whose
6040 // type are not SHT_PROGBITS.
6041 if (shdr.get_sh_size() == 0
6042 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
6043 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
6046 // Skip any discarded or ICF'ed sections.
6047 if (os == NULL || symtab->is_section_folded(this, shndx))
6050 // If this requires special offset handling, check to see if it is
6051 // a relaxed section. If this is not, then it is a merged section that
6052 // we cannot handle.
6053 if (this->is_output_section_offset_invalid(shndx))
6055 const Output_relaxed_input_section* poris =
6056 os->find_relaxed_input_section(this, shndx);
6064 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6065 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6067 template<bool big_endian>
6069 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
6070 const elfcpp::Shdr<32, big_endian>& shdr,
6071 const Relobj::Output_sections& out_sections,
6072 const Symbol_table* symtab,
6073 const unsigned char* pshdrs)
6075 unsigned int sh_type = shdr.get_sh_type();
6076 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
6079 // Ignore empty section.
6080 off_t sh_size = shdr.get_sh_size();
6084 // Ignore reloc section with unexpected symbol table. The
6085 // error will be reported in the final link.
6086 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
6089 unsigned int reloc_size;
6090 if (sh_type == elfcpp::SHT_REL)
6091 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6093 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6095 // Ignore reloc section with unexpected entsize or uneven size.
6096 // The error will be reported in the final link.
6097 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
6100 // Ignore reloc section with bad info. This error will be
6101 // reported in the final link.
6102 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6103 if (index >= this->shnum())
6106 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6107 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
6108 return this->section_is_scannable(text_shdr, index,
6109 out_sections[index], symtab);
6112 // Return the output address of either a plain input section or a relaxed
6113 // input section. SHNDX is the section index. We define and use this
6114 // instead of calling Output_section::output_address because that is slow
6115 // for large output.
6117 template<bool big_endian>
6119 Arm_relobj<big_endian>::simple_input_section_output_address(
6123 if (this->is_output_section_offset_invalid(shndx))
6125 const Output_relaxed_input_section* poris =
6126 os->find_relaxed_input_section(this, shndx);
6127 // We do not handle merged sections here.
6128 gold_assert(poris != NULL);
6129 return poris->address();
6132 return os->address() + this->get_output_section_offset(shndx);
6135 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6136 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6138 template<bool big_endian>
6140 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
6141 const elfcpp::Shdr<32, big_endian>& shdr,
6144 const Symbol_table* symtab)
6146 if (!this->section_is_scannable(shdr, shndx, os, symtab))
6149 // If the section does not cross any 4K-boundaries, it does not need to
6151 Arm_address address = this->simple_input_section_output_address(shndx, os);
6152 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
6158 // Scan a section for Cortex-A8 workaround.
6160 template<bool big_endian>
6162 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
6163 const elfcpp::Shdr<32, big_endian>& shdr,
6166 Target_arm<big_endian>* arm_target)
6168 // Look for the first mapping symbol in this section. It should be
6170 Mapping_symbol_position section_start(shndx, 0);
6171 typename Mapping_symbols_info::const_iterator p =
6172 this->mapping_symbols_info_.lower_bound(section_start);
6174 // There are no mapping symbols for this section. Treat it as a data-only
6175 // section. Issue a warning if section is marked as containing
6177 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
6179 if ((this->section_flags(shndx) & elfcpp::SHF_EXECINSTR) != 0)
6180 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6181 "erratum because it has no mapping symbols."),
6182 shndx, this->name().c_str());
6186 Arm_address output_address =
6187 this->simple_input_section_output_address(shndx, os);
6189 // Get the section contents.
6190 section_size_type input_view_size = 0;
6191 const unsigned char* input_view =
6192 this->section_contents(shndx, &input_view_size, false);
6194 // We need to go through the mapping symbols to determine what to
6195 // scan. There are two reasons. First, we should look at THUMB code and
6196 // THUMB code only. Second, we only want to look at the 4K-page boundary
6197 // to speed up the scanning.
6199 while (p != this->mapping_symbols_info_.end()
6200 && p->first.first == shndx)
6202 typename Mapping_symbols_info::const_iterator next =
6203 this->mapping_symbols_info_.upper_bound(p->first);
6205 // Only scan part of a section with THUMB code.
6206 if (p->second == 't')
6208 // Determine the end of this range.
6209 section_size_type span_start =
6210 convert_to_section_size_type(p->first.second);
6211 section_size_type span_end;
6212 if (next != this->mapping_symbols_info_.end()
6213 && next->first.first == shndx)
6214 span_end = convert_to_section_size_type(next->first.second);
6216 span_end = convert_to_section_size_type(shdr.get_sh_size());
6218 if (((span_start + output_address) & ~0xfffUL)
6219 != ((span_end + output_address - 1) & ~0xfffUL))
6221 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
6222 span_start, span_end,
6232 // Scan relocations for stub generation.
6234 template<bool big_endian>
6236 Arm_relobj<big_endian>::scan_sections_for_stubs(
6237 Target_arm<big_endian>* arm_target,
6238 const Symbol_table* symtab,
6239 const Layout* layout)
6241 unsigned int shnum = this->shnum();
6242 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6244 // Read the section headers.
6245 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6249 // To speed up processing, we set up hash tables for fast lookup of
6250 // input offsets to output addresses.
6251 this->initialize_input_to_output_maps();
6253 const Relobj::Output_sections& out_sections(this->output_sections());
6255 Relocate_info<32, big_endian> relinfo;
6256 relinfo.symtab = symtab;
6257 relinfo.layout = layout;
6258 relinfo.object = this;
6260 // Do relocation stubs scanning.
6261 const unsigned char* p = pshdrs + shdr_size;
6262 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6264 const elfcpp::Shdr<32, big_endian> shdr(p);
6265 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
6268 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6269 Arm_address output_offset = this->get_output_section_offset(index);
6270 Arm_address output_address;
6271 if (output_offset != invalid_address)
6272 output_address = out_sections[index]->address() + output_offset;
6275 // Currently this only happens for a relaxed section.
6276 const Output_relaxed_input_section* poris =
6277 out_sections[index]->find_relaxed_input_section(this, index);
6278 gold_assert(poris != NULL);
6279 output_address = poris->address();
6282 // Get the relocations.
6283 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
6287 // Get the section contents. This does work for the case in which
6288 // we modify the contents of an input section. We need to pass the
6289 // output view under such circumstances.
6290 section_size_type input_view_size = 0;
6291 const unsigned char* input_view =
6292 this->section_contents(index, &input_view_size, false);
6294 relinfo.reloc_shndx = i;
6295 relinfo.data_shndx = index;
6296 unsigned int sh_type = shdr.get_sh_type();
6297 unsigned int reloc_size;
6298 if (sh_type == elfcpp::SHT_REL)
6299 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6301 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6303 Output_section* os = out_sections[index];
6304 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
6305 shdr.get_sh_size() / reloc_size,
6307 output_offset == invalid_address,
6308 input_view, output_address,
6313 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6314 // after its relocation section, if there is one, is processed for
6315 // relocation stubs. Merging this loop with the one above would have been
6316 // complicated since we would have had to make sure that relocation stub
6317 // scanning is done first.
6318 if (arm_target->fix_cortex_a8())
6320 const unsigned char* p = pshdrs + shdr_size;
6321 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6323 const elfcpp::Shdr<32, big_endian> shdr(p);
6324 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
6327 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
6332 // After we've done the relocations, we release the hash tables,
6333 // since we no longer need them.
6334 this->free_input_to_output_maps();
6337 // Count the local symbols. The ARM backend needs to know if a symbol
6338 // is a THUMB function or not. For global symbols, it is easy because
6339 // the Symbol object keeps the ELF symbol type. For local symbol it is
6340 // harder because we cannot access this information. So we override the
6341 // do_count_local_symbol in parent and scan local symbols to mark
6342 // THUMB functions. This is not the most efficient way but I do not want to
6343 // slow down other ports by calling a per symbol target hook inside
6344 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6346 template<bool big_endian>
6348 Arm_relobj<big_endian>::do_count_local_symbols(
6349 Stringpool_template<char>* pool,
6350 Stringpool_template<char>* dynpool)
6352 // We need to fix-up the values of any local symbols whose type are
6355 // Ask parent to count the local symbols.
6356 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool);
6357 const unsigned int loccount = this->local_symbol_count();
6361 // Initialize the thumb function bit-vector.
6362 std::vector<bool> empty_vector(loccount, false);
6363 this->local_symbol_is_thumb_function_.swap(empty_vector);
6365 // Read the symbol table section header.
6366 const unsigned int symtab_shndx = this->symtab_shndx();
6367 elfcpp::Shdr<32, big_endian>
6368 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6369 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6371 // Read the local symbols.
6372 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6373 gold_assert(loccount == symtabshdr.get_sh_info());
6374 off_t locsize = loccount * sym_size;
6375 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6376 locsize, true, true);
6378 // For mapping symbol processing, we need to read the symbol names.
6379 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
6380 if (strtab_shndx >= this->shnum())
6382 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
6386 elfcpp::Shdr<32, big_endian>
6387 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
6388 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
6390 this->error(_("symbol table name section has wrong type: %u"),
6391 static_cast<unsigned int>(strtabshdr.get_sh_type()));
6394 const char* pnames =
6395 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
6396 strtabshdr.get_sh_size(),
6399 // Loop over the local symbols and mark any local symbols pointing
6400 // to THUMB functions.
6402 // Skip the first dummy symbol.
6404 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values =
6405 this->local_values();
6406 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6408 elfcpp::Sym<32, big_endian> sym(psyms);
6409 elfcpp::STT st_type = sym.get_st_type();
6410 Symbol_value<32>& lv((*plocal_values)[i]);
6411 Arm_address input_value = lv.input_value();
6413 // Check to see if this is a mapping symbol.
6414 const char* sym_name = pnames + sym.get_st_name();
6415 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
6418 unsigned int input_shndx =
6419 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary);
6420 gold_assert(is_ordinary);
6422 // Strip of LSB in case this is a THUMB symbol.
6423 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
6424 this->mapping_symbols_info_[msp] = sym_name[1];
6427 if (st_type == elfcpp::STT_ARM_TFUNC
6428 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
6430 // This is a THUMB function. Mark this and canonicalize the
6431 // symbol value by setting LSB.
6432 this->local_symbol_is_thumb_function_[i] = true;
6433 if ((input_value & 1) == 0)
6434 lv.set_input_value(input_value | 1);
6439 // Relocate sections.
6440 template<bool big_endian>
6442 Arm_relobj<big_endian>::do_relocate_sections(
6443 const Symbol_table* symtab,
6444 const Layout* layout,
6445 const unsigned char* pshdrs,
6447 typename Sized_relobj_file<32, big_endian>::Views* pviews)
6449 // Call parent to relocate sections.
6450 Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout,
6451 pshdrs, of, pviews);
6453 // We do not generate stubs if doing a relocatable link.
6454 if (parameters->options().relocatable())
6457 // Relocate stub tables.
6458 unsigned int shnum = this->shnum();
6460 Target_arm<big_endian>* arm_target =
6461 Target_arm<big_endian>::default_target();
6463 Relocate_info<32, big_endian> relinfo;
6464 relinfo.symtab = symtab;
6465 relinfo.layout = layout;
6466 relinfo.object = this;
6468 for (unsigned int i = 1; i < shnum; ++i)
6470 Arm_input_section<big_endian>* arm_input_section =
6471 arm_target->find_arm_input_section(this, i);
6473 if (arm_input_section != NULL
6474 && arm_input_section->is_stub_table_owner()
6475 && !arm_input_section->stub_table()->empty())
6477 // We cannot discard a section if it owns a stub table.
6478 Output_section* os = this->output_section(i);
6479 gold_assert(os != NULL);
6481 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
6482 relinfo.reloc_shdr = NULL;
6483 relinfo.data_shndx = i;
6484 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
6486 gold_assert((*pviews)[i].view != NULL);
6488 // We are passed the output section view. Adjust it to cover the
6490 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6491 gold_assert((stub_table->address() >= (*pviews)[i].address)
6492 && ((stub_table->address() + stub_table->data_size())
6493 <= (*pviews)[i].address + (*pviews)[i].view_size));
6495 off_t offset = stub_table->address() - (*pviews)[i].address;
6496 unsigned char* view = (*pviews)[i].view + offset;
6497 Arm_address address = stub_table->address();
6498 section_size_type view_size = stub_table->data_size();
6500 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6504 // Apply Cortex A8 workaround if applicable.
6505 if (this->section_has_cortex_a8_workaround(i))
6507 unsigned char* view = (*pviews)[i].view;
6508 Arm_address view_address = (*pviews)[i].address;
6509 section_size_type view_size = (*pviews)[i].view_size;
6510 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6512 // Adjust view to cover section.
6513 Output_section* os = this->output_section(i);
6514 gold_assert(os != NULL);
6515 Arm_address section_address =
6516 this->simple_input_section_output_address(i, os);
6517 uint64_t section_size = this->section_size(i);
6519 gold_assert(section_address >= view_address
6520 && ((section_address + section_size)
6521 <= (view_address + view_size)));
6523 unsigned char* section_view = view + (section_address - view_address);
6525 // Apply the Cortex-A8 workaround to the output address range
6526 // corresponding to this input section.
6527 stub_table->apply_cortex_a8_workaround_to_address_range(
6536 // Find the linked text section of an EXIDX section by looking at the first
6537 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6538 // must be linked to its associated code section via the sh_link field of
6539 // its section header. However, some tools are broken and the link is not
6540 // always set. LD just drops such an EXIDX section silently, causing the
6541 // associated code not unwindabled. Here we try a little bit harder to
6542 // discover the linked code section.
6544 // PSHDR points to the section header of a relocation section of an EXIDX
6545 // section. If we can find a linked text section, return true and
6546 // store the text section index in the location PSHNDX. Otherwise
6549 template<bool big_endian>
6551 Arm_relobj<big_endian>::find_linked_text_section(
6552 const unsigned char* pshdr,
6553 const unsigned char* psyms,
6554 unsigned int* pshndx)
6556 elfcpp::Shdr<32, big_endian> shdr(pshdr);
6558 // If there is no relocation, we cannot find the linked text section.
6560 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6561 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6563 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6564 size_t reloc_count = shdr.get_sh_size() / reloc_size;
6566 // Get the relocations.
6567 const unsigned char* prelocs =
6568 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6570 // Find the REL31 relocation for the first word of the first EXIDX entry.
6571 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6573 Arm_address r_offset;
6574 typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6575 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6577 typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6578 r_info = reloc.get_r_info();
6579 r_offset = reloc.get_r_offset();
6583 typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6584 r_info = reloc.get_r_info();
6585 r_offset = reloc.get_r_offset();
6588 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6589 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6592 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6594 || r_sym >= this->local_symbol_count()
6598 // This is the relocation for the first word of the first EXIDX entry.
6599 // We expect to see a local section symbol.
6600 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6601 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6602 if (sym.get_st_type() == elfcpp::STT_SECTION)
6606 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary);
6607 gold_assert(is_ordinary);
6617 // Make an EXIDX input section object for an EXIDX section whose index is
6618 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6619 // is the section index of the linked text section.
6621 template<bool big_endian>
6623 Arm_relobj<big_endian>::make_exidx_input_section(
6625 const elfcpp::Shdr<32, big_endian>& shdr,
6626 unsigned int text_shndx,
6627 const elfcpp::Shdr<32, big_endian>& text_shdr)
6629 // Create an Arm_exidx_input_section object for this EXIDX section.
6630 Arm_exidx_input_section* exidx_input_section =
6631 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6632 shdr.get_sh_addralign(),
6633 text_shdr.get_sh_size());
6635 gold_assert(this->exidx_section_map_[shndx] == NULL);
6636 this->exidx_section_map_[shndx] = exidx_input_section;
6638 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum())
6640 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6641 this->section_name(shndx).c_str(), shndx, text_shndx,
6642 this->name().c_str());
6643 exidx_input_section->set_has_errors();
6645 else if (this->exidx_section_map_[text_shndx] != NULL)
6647 unsigned other_exidx_shndx =
6648 this->exidx_section_map_[text_shndx]->shndx();
6649 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6651 this->section_name(shndx).c_str(), shndx,
6652 this->section_name(other_exidx_shndx).c_str(),
6653 other_exidx_shndx, this->section_name(text_shndx).c_str(),
6654 text_shndx, this->name().c_str());
6655 exidx_input_section->set_has_errors();
6658 this->exidx_section_map_[text_shndx] = exidx_input_section;
6660 // Check section flags of text section.
6661 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0)
6663 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6665 this->section_name(shndx).c_str(), shndx,
6666 this->section_name(text_shndx).c_str(), text_shndx,
6667 this->name().c_str());
6668 exidx_input_section->set_has_errors();
6670 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0)
6671 // I would like to make this an error but currently ld just ignores
6673 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6675 this->section_name(shndx).c_str(), shndx,
6676 this->section_name(text_shndx).c_str(), text_shndx,
6677 this->name().c_str());
6680 // Read the symbol information.
6682 template<bool big_endian>
6684 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6686 // Call parent class to read symbol information.
6687 Sized_relobj_file<32, big_endian>::do_read_symbols(sd);
6689 // If this input file is a binary file, it has no processor
6690 // specific flags and attributes section.
6691 Input_file::Format format = this->input_file()->format();
6692 if (format != Input_file::FORMAT_ELF)
6694 gold_assert(format == Input_file::FORMAT_BINARY);
6695 this->merge_flags_and_attributes_ = false;
6699 // Read processor-specific flags in ELF file header.
6700 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6701 elfcpp::Elf_sizes<32>::ehdr_size,
6703 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6704 this->processor_specific_flags_ = ehdr.get_e_flags();
6706 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6708 std::vector<unsigned int> deferred_exidx_sections;
6709 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6710 const unsigned char* pshdrs = sd->section_headers->data();
6711 const unsigned char* ps = pshdrs + shdr_size;
6712 bool must_merge_flags_and_attributes = false;
6713 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6715 elfcpp::Shdr<32, big_endian> shdr(ps);
6717 // Sometimes an object has no contents except the section name string
6718 // table and an empty symbol table with the undefined symbol. We
6719 // don't want to merge processor-specific flags from such an object.
6720 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB)
6722 // Symbol table is not empty.
6723 const elfcpp::Elf_types<32>::Elf_WXword sym_size =
6724 elfcpp::Elf_sizes<32>::sym_size;
6725 if (shdr.get_sh_size() > sym_size)
6726 must_merge_flags_and_attributes = true;
6728 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB)
6729 // If this is neither an empty symbol table nor a string table,
6731 must_merge_flags_and_attributes = true;
6733 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6735 gold_assert(this->attributes_section_data_ == NULL);
6736 section_offset_type section_offset = shdr.get_sh_offset();
6737 section_size_type section_size =
6738 convert_to_section_size_type(shdr.get_sh_size());
6739 const unsigned char* view =
6740 this->get_view(section_offset, section_size, true, false);
6741 this->attributes_section_data_ =
6742 new Attributes_section_data(view, section_size);
6744 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6746 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6747 if (text_shndx == elfcpp::SHN_UNDEF)
6748 deferred_exidx_sections.push_back(i);
6751 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6752 + text_shndx * shdr_size);
6753 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr);
6755 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6756 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0)
6757 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6758 this->section_name(i).c_str(), this->name().c_str());
6763 if (!must_merge_flags_and_attributes)
6765 gold_assert(deferred_exidx_sections.empty());
6766 this->merge_flags_and_attributes_ = false;
6770 // Some tools are broken and they do not set the link of EXIDX sections.
6771 // We look at the first relocation to figure out the linked sections.
6772 if (!deferred_exidx_sections.empty())
6774 // We need to go over the section headers again to find the mapping
6775 // from sections being relocated to their relocation sections. This is
6776 // a bit inefficient as we could do that in the loop above. However,
6777 // we do not expect any deferred EXIDX sections normally. So we do not
6778 // want to slow down the most common path.
6779 typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
6780 Reloc_map reloc_map;
6781 ps = pshdrs + shdr_size;
6782 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6784 elfcpp::Shdr<32, big_endian> shdr(ps);
6785 elfcpp::Elf_Word sh_type = shdr.get_sh_type();
6786 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
6788 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
6789 if (info_shndx >= this->shnum())
6790 gold_error(_("relocation section %u has invalid info %u"),
6792 Reloc_map::value_type value(info_shndx, i);
6793 std::pair<Reloc_map::iterator, bool> result =
6794 reloc_map.insert(value);
6796 gold_error(_("section %u has multiple relocation sections "
6798 info_shndx, i, reloc_map[info_shndx]);
6802 // Read the symbol table section header.
6803 const unsigned int symtab_shndx = this->symtab_shndx();
6804 elfcpp::Shdr<32, big_endian>
6805 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6806 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6808 // Read the local symbols.
6809 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6810 const unsigned int loccount = this->local_symbol_count();
6811 gold_assert(loccount == symtabshdr.get_sh_info());
6812 off_t locsize = loccount * sym_size;
6813 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6814 locsize, true, true);
6816 // Process the deferred EXIDX sections.
6817 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
6819 unsigned int shndx = deferred_exidx_sections[i];
6820 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
6821 unsigned int text_shndx = elfcpp::SHN_UNDEF;
6822 Reloc_map::const_iterator it = reloc_map.find(shndx);
6823 if (it != reloc_map.end())
6824 find_linked_text_section(pshdrs + it->second * shdr_size,
6825 psyms, &text_shndx);
6826 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6827 + text_shndx * shdr_size);
6828 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr);
6833 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6834 // sections for unwinding. These sections are referenced implicitly by
6835 // text sections linked in the section headers. If we ignore these implicit
6836 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6837 // will be garbage-collected incorrectly. Hence we override the same function
6838 // in the base class to handle these implicit references.
6840 template<bool big_endian>
6842 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6844 Read_relocs_data* rd)
6846 // First, call base class method to process relocations in this object.
6847 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6849 // If --gc-sections is not specified, there is nothing more to do.
6850 // This happens when --icf is used but --gc-sections is not.
6851 if (!parameters->options().gc_sections())
6854 unsigned int shnum = this->shnum();
6855 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6856 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6860 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6861 // to these from the linked text sections.
6862 const unsigned char* ps = pshdrs + shdr_size;
6863 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6865 elfcpp::Shdr<32, big_endian> shdr(ps);
6866 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6868 // Found an .ARM.exidx section, add it to the set of reachable
6869 // sections from its linked text section.
6870 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6871 symtab->gc()->add_reference(this, text_shndx, this, i);
6876 // Update output local symbol count. Owing to EXIDX entry merging, some local
6877 // symbols will be removed in output. Adjust output local symbol count
6878 // accordingly. We can only changed the static output local symbol count. It
6879 // is too late to change the dynamic symbols.
6881 template<bool big_endian>
6883 Arm_relobj<big_endian>::update_output_local_symbol_count()
6885 // Caller should check that this needs updating. We want caller checking
6886 // because output_local_symbol_count_needs_update() is most likely inlined.
6887 gold_assert(this->output_local_symbol_count_needs_update_);
6889 gold_assert(this->symtab_shndx() != -1U);
6890 if (this->symtab_shndx() == 0)
6892 // This object has no symbols. Weird but legal.
6896 // Read the symbol table section header.
6897 const unsigned int symtab_shndx = this->symtab_shndx();
6898 elfcpp::Shdr<32, big_endian>
6899 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6900 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6902 // Read the local symbols.
6903 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6904 const unsigned int loccount = this->local_symbol_count();
6905 gold_assert(loccount == symtabshdr.get_sh_info());
6906 off_t locsize = loccount * sym_size;
6907 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6908 locsize, true, true);
6910 // Loop over the local symbols.
6912 typedef typename Sized_relobj_file<32, big_endian>::Output_sections
6914 const Output_sections& out_sections(this->output_sections());
6915 unsigned int shnum = this->shnum();
6916 unsigned int count = 0;
6917 // Skip the first, dummy, symbol.
6919 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6921 elfcpp::Sym<32, big_endian> sym(psyms);
6923 Symbol_value<32>& lv((*this->local_values())[i]);
6925 // This local symbol was already discarded by do_count_local_symbols.
6926 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry())
6930 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
6935 Output_section* os = out_sections[shndx];
6937 // This local symbol no longer has an output section. Discard it.
6940 lv.set_no_output_symtab_entry();
6944 // Currently we only discard parts of EXIDX input sections.
6945 // We explicitly check for a merged EXIDX input section to avoid
6946 // calling Output_section_data::output_offset unless necessary.
6947 if ((this->get_output_section_offset(shndx) == invalid_address)
6948 && (this->exidx_input_section_by_shndx(shndx) != NULL))
6950 section_offset_type output_offset =
6951 os->output_offset(this, shndx, lv.input_value());
6952 if (output_offset == -1)
6954 // This symbol is defined in a part of an EXIDX input section
6955 // that is discarded due to entry merging.
6956 lv.set_no_output_symtab_entry();
6965 this->set_output_local_symbol_count(count);
6966 this->output_local_symbol_count_needs_update_ = false;
6969 // Arm_dynobj methods.
6971 // Read the symbol information.
6973 template<bool big_endian>
6975 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6977 // Call parent class to read symbol information.
6978 Sized_dynobj<32, big_endian>::do_read_symbols(sd);
6980 // Read processor-specific flags in ELF file header.
6981 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6982 elfcpp::Elf_sizes<32>::ehdr_size,
6984 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6985 this->processor_specific_flags_ = ehdr.get_e_flags();
6987 // Read the attributes section if there is one.
6988 // We read from the end because gas seems to put it near the end of
6989 // the section headers.
6990 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6991 const unsigned char* ps =
6992 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
6993 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
6995 elfcpp::Shdr<32, big_endian> shdr(ps);
6996 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6998 section_offset_type section_offset = shdr.get_sh_offset();
6999 section_size_type section_size =
7000 convert_to_section_size_type(shdr.get_sh_size());
7001 const unsigned char* view =
7002 this->get_view(section_offset, section_size, true, false);
7003 this->attributes_section_data_ =
7004 new Attributes_section_data(view, section_size);
7010 // Stub_addend_reader methods.
7012 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7014 template<bool big_endian>
7015 elfcpp::Elf_types<32>::Elf_Swxword
7016 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
7017 unsigned int r_type,
7018 const unsigned char* view,
7019 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
7021 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
7025 case elfcpp::R_ARM_CALL:
7026 case elfcpp::R_ARM_JUMP24:
7027 case elfcpp::R_ARM_PLT32:
7029 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7030 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7031 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
7032 return utils::sign_extend<26>(val << 2);
7035 case elfcpp::R_ARM_THM_CALL:
7036 case elfcpp::R_ARM_THM_JUMP24:
7037 case elfcpp::R_ARM_THM_XPC22:
7039 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7040 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7041 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7042 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7043 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
7046 case elfcpp::R_ARM_THM_JUMP19:
7048 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7049 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7050 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7051 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7052 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
7060 // Arm_output_data_got methods.
7062 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7063 // The first one is initialized to be 1, which is the module index for
7064 // the main executable and the second one 0. A reloc of the type
7065 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7066 // be applied by gold. GSYM is a global symbol.
7068 template<bool big_endian>
7070 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7071 unsigned int got_type,
7074 if (gsym->has_got_offset(got_type))
7077 // We are doing a static link. Just mark it as belong to module 1,
7079 unsigned int got_offset = this->add_constant(1);
7080 gsym->set_got_offset(got_type, got_offset);
7081 got_offset = this->add_constant(0);
7082 this->static_relocs_.push_back(Static_reloc(got_offset,
7083 elfcpp::R_ARM_TLS_DTPOFF32,
7087 // Same as the above but for a local symbol.
7089 template<bool big_endian>
7091 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7092 unsigned int got_type,
7093 Sized_relobj_file<32, big_endian>* object,
7096 if (object->local_has_got_offset(index, got_type))
7099 // We are doing a static link. Just mark it as belong to module 1,
7101 unsigned int got_offset = this->add_constant(1);
7102 object->set_local_got_offset(index, got_type, got_offset);
7103 got_offset = this->add_constant(0);
7104 this->static_relocs_.push_back(Static_reloc(got_offset,
7105 elfcpp::R_ARM_TLS_DTPOFF32,
7109 template<bool big_endian>
7111 Arm_output_data_got<big_endian>::do_write(Output_file* of)
7113 // Call parent to write out GOT.
7114 Output_data_got<32, big_endian>::do_write(of);
7116 // We are done if there is no fix up.
7117 if (this->static_relocs_.empty())
7120 gold_assert(parameters->doing_static_link());
7122 const off_t offset = this->offset();
7123 const section_size_type oview_size =
7124 convert_to_section_size_type(this->data_size());
7125 unsigned char* const oview = of->get_output_view(offset, oview_size);
7127 Output_segment* tls_segment = this->layout_->tls_segment();
7128 gold_assert(tls_segment != NULL);
7130 // The thread pointer $tp points to the TCB, which is followed by the
7131 // TLS. So we need to adjust $tp relative addressing by this amount.
7132 Arm_address aligned_tcb_size =
7133 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
7135 for (size_t i = 0; i < this->static_relocs_.size(); ++i)
7137 Static_reloc& reloc(this->static_relocs_[i]);
7140 if (!reloc.symbol_is_global())
7142 Sized_relobj_file<32, big_endian>* object = reloc.relobj();
7143 const Symbol_value<32>* psymval =
7144 reloc.relobj()->local_symbol(reloc.index());
7146 // We are doing static linking. Issue an error and skip this
7147 // relocation if the symbol is undefined or in a discarded_section.
7149 unsigned int shndx = psymval->input_shndx(&is_ordinary);
7150 if ((shndx == elfcpp::SHN_UNDEF)
7152 && shndx != elfcpp::SHN_UNDEF
7153 && !object->is_section_included(shndx)
7154 && !this->symbol_table_->is_section_folded(object, shndx)))
7156 gold_error(_("undefined or discarded local symbol %u from "
7157 " object %s in GOT"),
7158 reloc.index(), reloc.relobj()->name().c_str());
7162 value = psymval->value(object, 0);
7166 const Symbol* gsym = reloc.symbol();
7167 gold_assert(gsym != NULL);
7168 if (gsym->is_forwarder())
7169 gsym = this->symbol_table_->resolve_forwards(gsym);
7171 // We are doing static linking. Issue an error and skip this
7172 // relocation if the symbol is undefined or in a discarded_section
7173 // unless it is a weakly_undefined symbol.
7174 if ((gsym->is_defined_in_discarded_section()
7175 || gsym->is_undefined())
7176 && !gsym->is_weak_undefined())
7178 gold_error(_("undefined or discarded symbol %s in GOT"),
7183 if (!gsym->is_weak_undefined())
7185 const Sized_symbol<32>* sym =
7186 static_cast<const Sized_symbol<32>*>(gsym);
7187 value = sym->value();
7193 unsigned got_offset = reloc.got_offset();
7194 gold_assert(got_offset < oview_size);
7196 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7197 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset);
7199 switch (reloc.r_type())
7201 case elfcpp::R_ARM_TLS_DTPOFF32:
7204 case elfcpp::R_ARM_TLS_TPOFF32:
7205 x = value + aligned_tcb_size;
7210 elfcpp::Swap<32, big_endian>::writeval(wv, x);
7213 of->write_output_view(offset, oview_size, oview);
7216 // A class to handle the PLT data.
7218 template<bool big_endian>
7219 class Output_data_plt_arm : public Output_section_data
7222 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
7225 Output_data_plt_arm(Layout*, Output_data_space*);
7227 // Add an entry to the PLT.
7229 add_entry(Symbol* gsym);
7231 // Return the .rel.plt section data.
7232 const Reloc_section*
7234 { return this->rel_; }
7236 // Return the number of PLT entries.
7239 { return this->count_; }
7241 // Return the offset of the first non-reserved PLT entry.
7243 first_plt_entry_offset()
7244 { return sizeof(first_plt_entry); }
7246 // Return the size of a PLT entry.
7248 get_plt_entry_size()
7249 { return sizeof(plt_entry); }
7253 do_adjust_output_section(Output_section* os);
7255 // Write to a map file.
7257 do_print_to_mapfile(Mapfile* mapfile) const
7258 { mapfile->print_output_data(this, _("** PLT")); }
7261 // Template for the first PLT entry.
7262 static const uint32_t first_plt_entry[5];
7264 // Template for subsequent PLT entries.
7265 static const uint32_t plt_entry[3];
7267 // Set the final size.
7269 set_final_data_size()
7271 this->set_data_size(sizeof(first_plt_entry)
7272 + this->count_ * sizeof(plt_entry));
7275 // Write out the PLT data.
7277 do_write(Output_file*);
7279 // The reloc section.
7280 Reloc_section* rel_;
7281 // The .got.plt section.
7282 Output_data_space* got_plt_;
7283 // The number of PLT entries.
7284 unsigned int count_;
7287 // Create the PLT section. The ordinary .got section is an argument,
7288 // since we need to refer to the start. We also create our own .got
7289 // section just for PLT entries.
7291 template<bool big_endian>
7292 Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout,
7293 Output_data_space* got_plt)
7294 : Output_section_data(4), got_plt_(got_plt), count_(0)
7296 this->rel_ = new Reloc_section(false);
7297 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
7298 elfcpp::SHF_ALLOC, this->rel_,
7299 ORDER_DYNAMIC_PLT_RELOCS, false);
7302 template<bool big_endian>
7304 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
7309 // Add an entry to the PLT.
7311 template<bool big_endian>
7313 Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym)
7315 gold_assert(!gsym->has_plt_offset());
7317 // Note that when setting the PLT offset we skip the initial
7318 // reserved PLT entry.
7319 gsym->set_plt_offset((this->count_) * sizeof(plt_entry)
7320 + sizeof(first_plt_entry));
7324 section_offset_type got_offset = this->got_plt_->current_data_size();
7326 // Every PLT entry needs a GOT entry which points back to the PLT
7327 // entry (this will be changed by the dynamic linker, normally
7328 // lazily when the function is called).
7329 this->got_plt_->set_current_data_size(got_offset + 4);
7331 // Every PLT entry needs a reloc.
7332 gsym->set_needs_dynsym_entry();
7333 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
7336 // Note that we don't need to save the symbol. The contents of the
7337 // PLT are independent of which symbols are used. The symbols only
7338 // appear in the relocations.
7342 // FIXME: This is not very flexible. Right now this has only been tested
7343 // on armv5te. If we are to support additional architecture features like
7344 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7346 // The first entry in the PLT.
7347 template<bool big_endian>
7348 const uint32_t Output_data_plt_arm<big_endian>::first_plt_entry[5] =
7350 0xe52de004, // str lr, [sp, #-4]!
7351 0xe59fe004, // ldr lr, [pc, #4]
7352 0xe08fe00e, // add lr, pc, lr
7353 0xe5bef008, // ldr pc, [lr, #8]!
7354 0x00000000, // &GOT[0] - .
7357 // Subsequent entries in the PLT.
7359 template<bool big_endian>
7360 const uint32_t Output_data_plt_arm<big_endian>::plt_entry[3] =
7362 0xe28fc600, // add ip, pc, #0xNN00000
7363 0xe28cca00, // add ip, ip, #0xNN000
7364 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7367 // Write out the PLT. This uses the hand-coded instructions above,
7368 // and adjusts them as needed. This is all specified by the arm ELF
7369 // Processor Supplement.
7371 template<bool big_endian>
7373 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
7375 const off_t offset = this->offset();
7376 const section_size_type oview_size =
7377 convert_to_section_size_type(this->data_size());
7378 unsigned char* const oview = of->get_output_view(offset, oview_size);
7380 const off_t got_file_offset = this->got_plt_->offset();
7381 const section_size_type got_size =
7382 convert_to_section_size_type(this->got_plt_->data_size());
7383 unsigned char* const got_view = of->get_output_view(got_file_offset,
7385 unsigned char* pov = oview;
7387 Arm_address plt_address = this->address();
7388 Arm_address got_address = this->got_plt_->address();
7390 // Write first PLT entry. All but the last word are constants.
7391 const size_t num_first_plt_words = (sizeof(first_plt_entry)
7392 / sizeof(plt_entry[0]));
7393 for (size_t i = 0; i < num_first_plt_words - 1; i++)
7394 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
7395 // Last word in first PLT entry is &GOT[0] - .
7396 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
7397 got_address - (plt_address + 16));
7398 pov += sizeof(first_plt_entry);
7400 unsigned char* got_pov = got_view;
7402 memset(got_pov, 0, 12);
7405 const int rel_size = elfcpp::Elf_sizes<32>::rel_size;
7406 unsigned int plt_offset = sizeof(first_plt_entry);
7407 unsigned int plt_rel_offset = 0;
7408 unsigned int got_offset = 12;
7409 const unsigned int count = this->count_;
7410 for (unsigned int i = 0;
7413 pov += sizeof(plt_entry),
7415 plt_offset += sizeof(plt_entry),
7416 plt_rel_offset += rel_size,
7419 // Set and adjust the PLT entry itself.
7420 int32_t offset = ((got_address + got_offset)
7421 - (plt_address + plt_offset + 8));
7423 gold_assert(offset >= 0 && offset < 0x0fffffff);
7424 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
7425 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
7426 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
7427 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
7428 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
7429 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
7431 // Set the entry in the GOT.
7432 elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address);
7435 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
7436 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
7438 of->write_output_view(offset, oview_size, oview);
7439 of->write_output_view(got_file_offset, got_size, got_view);
7442 // Create a PLT entry for a global symbol.
7444 template<bool big_endian>
7446 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
7449 if (gsym->has_plt_offset())
7452 if (this->plt_ == NULL)
7454 // Create the GOT sections first.
7455 this->got_section(symtab, layout);
7457 this->plt_ = new Output_data_plt_arm<big_endian>(layout, this->got_plt_);
7458 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
7460 | elfcpp::SHF_EXECINSTR),
7461 this->plt_, ORDER_PLT, false);
7463 this->plt_->add_entry(gsym);
7466 // Return the number of entries in the PLT.
7468 template<bool big_endian>
7470 Target_arm<big_endian>::plt_entry_count() const
7472 if (this->plt_ == NULL)
7474 return this->plt_->entry_count();
7477 // Return the offset of the first non-reserved PLT entry.
7479 template<bool big_endian>
7481 Target_arm<big_endian>::first_plt_entry_offset() const
7483 return Output_data_plt_arm<big_endian>::first_plt_entry_offset();
7486 // Return the size of each PLT entry.
7488 template<bool big_endian>
7490 Target_arm<big_endian>::plt_entry_size() const
7492 return Output_data_plt_arm<big_endian>::get_plt_entry_size();
7495 // Get the section to use for TLS_DESC relocations.
7497 template<bool big_endian>
7498 typename Target_arm<big_endian>::Reloc_section*
7499 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const
7501 return this->plt_section()->rel_tls_desc(layout);
7504 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7506 template<bool big_endian>
7508 Target_arm<big_endian>::define_tls_base_symbol(
7509 Symbol_table* symtab,
7512 if (this->tls_base_symbol_defined_)
7515 Output_segment* tls_segment = layout->tls_segment();
7516 if (tls_segment != NULL)
7518 bool is_exec = parameters->options().output_is_executable();
7519 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL,
7520 Symbol_table::PREDEFINED,
7524 elfcpp::STV_HIDDEN, 0,
7526 ? Symbol::SEGMENT_END
7527 : Symbol::SEGMENT_START),
7530 this->tls_base_symbol_defined_ = true;
7533 // Create a GOT entry for the TLS module index.
7535 template<bool big_endian>
7537 Target_arm<big_endian>::got_mod_index_entry(
7538 Symbol_table* symtab,
7540 Sized_relobj_file<32, big_endian>* object)
7542 if (this->got_mod_index_offset_ == -1U)
7544 gold_assert(symtab != NULL && layout != NULL && object != NULL);
7545 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout);
7546 unsigned int got_offset;
7547 if (!parameters->doing_static_link())
7549 got_offset = got->add_constant(0);
7550 Reloc_section* rel_dyn = this->rel_dyn_section(layout);
7551 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got,
7556 // We are doing a static link. Just mark it as belong to module 1,
7558 got_offset = got->add_constant(1);
7561 got->add_constant(0);
7562 this->got_mod_index_offset_ = got_offset;
7564 return this->got_mod_index_offset_;
7567 // Optimize the TLS relocation type based on what we know about the
7568 // symbol. IS_FINAL is true if the final address of this symbol is
7569 // known at link time.
7571 template<bool big_endian>
7572 tls::Tls_optimization
7573 Target_arm<big_endian>::optimize_tls_reloc(bool, int)
7575 // FIXME: Currently we do not do any TLS optimization.
7576 return tls::TLSOPT_NONE;
7579 // Get the Reference_flags for a particular relocation.
7581 template<bool big_endian>
7583 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type)
7587 case elfcpp::R_ARM_NONE:
7588 case elfcpp::R_ARM_V4BX:
7589 case elfcpp::R_ARM_GNU_VTENTRY:
7590 case elfcpp::R_ARM_GNU_VTINHERIT:
7591 // No symbol reference.
7594 case elfcpp::R_ARM_ABS32:
7595 case elfcpp::R_ARM_ABS16:
7596 case elfcpp::R_ARM_ABS12:
7597 case elfcpp::R_ARM_THM_ABS5:
7598 case elfcpp::R_ARM_ABS8:
7599 case elfcpp::R_ARM_BASE_ABS:
7600 case elfcpp::R_ARM_MOVW_ABS_NC:
7601 case elfcpp::R_ARM_MOVT_ABS:
7602 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7603 case elfcpp::R_ARM_THM_MOVT_ABS:
7604 case elfcpp::R_ARM_ABS32_NOI:
7605 return Symbol::ABSOLUTE_REF;
7607 case elfcpp::R_ARM_REL32:
7608 case elfcpp::R_ARM_LDR_PC_G0:
7609 case elfcpp::R_ARM_SBREL32:
7610 case elfcpp::R_ARM_THM_PC8:
7611 case elfcpp::R_ARM_BASE_PREL:
7612 case elfcpp::R_ARM_MOVW_PREL_NC:
7613 case elfcpp::R_ARM_MOVT_PREL:
7614 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7615 case elfcpp::R_ARM_THM_MOVT_PREL:
7616 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7617 case elfcpp::R_ARM_THM_PC12:
7618 case elfcpp::R_ARM_REL32_NOI:
7619 case elfcpp::R_ARM_ALU_PC_G0_NC:
7620 case elfcpp::R_ARM_ALU_PC_G0:
7621 case elfcpp::R_ARM_ALU_PC_G1_NC:
7622 case elfcpp::R_ARM_ALU_PC_G1:
7623 case elfcpp::R_ARM_ALU_PC_G2:
7624 case elfcpp::R_ARM_LDR_PC_G1:
7625 case elfcpp::R_ARM_LDR_PC_G2:
7626 case elfcpp::R_ARM_LDRS_PC_G0:
7627 case elfcpp::R_ARM_LDRS_PC_G1:
7628 case elfcpp::R_ARM_LDRS_PC_G2:
7629 case elfcpp::R_ARM_LDC_PC_G0:
7630 case elfcpp::R_ARM_LDC_PC_G1:
7631 case elfcpp::R_ARM_LDC_PC_G2:
7632 case elfcpp::R_ARM_ALU_SB_G0_NC:
7633 case elfcpp::R_ARM_ALU_SB_G0:
7634 case elfcpp::R_ARM_ALU_SB_G1_NC:
7635 case elfcpp::R_ARM_ALU_SB_G1:
7636 case elfcpp::R_ARM_ALU_SB_G2:
7637 case elfcpp::R_ARM_LDR_SB_G0:
7638 case elfcpp::R_ARM_LDR_SB_G1:
7639 case elfcpp::R_ARM_LDR_SB_G2:
7640 case elfcpp::R_ARM_LDRS_SB_G0:
7641 case elfcpp::R_ARM_LDRS_SB_G1:
7642 case elfcpp::R_ARM_LDRS_SB_G2:
7643 case elfcpp::R_ARM_LDC_SB_G0:
7644 case elfcpp::R_ARM_LDC_SB_G1:
7645 case elfcpp::R_ARM_LDC_SB_G2:
7646 case elfcpp::R_ARM_MOVW_BREL_NC:
7647 case elfcpp::R_ARM_MOVT_BREL:
7648 case elfcpp::R_ARM_MOVW_BREL:
7649 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7650 case elfcpp::R_ARM_THM_MOVT_BREL:
7651 case elfcpp::R_ARM_THM_MOVW_BREL:
7652 case elfcpp::R_ARM_GOTOFF32:
7653 case elfcpp::R_ARM_GOTOFF12:
7654 case elfcpp::R_ARM_SBREL31:
7655 return Symbol::RELATIVE_REF;
7657 case elfcpp::R_ARM_PLT32:
7658 case elfcpp::R_ARM_CALL:
7659 case elfcpp::R_ARM_JUMP24:
7660 case elfcpp::R_ARM_THM_CALL:
7661 case elfcpp::R_ARM_THM_JUMP24:
7662 case elfcpp::R_ARM_THM_JUMP19:
7663 case elfcpp::R_ARM_THM_JUMP6:
7664 case elfcpp::R_ARM_THM_JUMP11:
7665 case elfcpp::R_ARM_THM_JUMP8:
7666 // R_ARM_PREL31 is not used to relocate call/jump instructions but
7667 // in unwind tables. It may point to functions via PLTs.
7668 // So we treat it like call/jump relocations above.
7669 case elfcpp::R_ARM_PREL31:
7670 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
7672 case elfcpp::R_ARM_GOT_BREL:
7673 case elfcpp::R_ARM_GOT_ABS:
7674 case elfcpp::R_ARM_GOT_PREL:
7676 return Symbol::ABSOLUTE_REF;
7678 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
7679 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
7680 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
7681 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
7682 case elfcpp::R_ARM_TLS_LE32: // Local-exec
7683 return Symbol::TLS_REF;
7685 case elfcpp::R_ARM_TARGET1:
7686 case elfcpp::R_ARM_TARGET2:
7687 case elfcpp::R_ARM_COPY:
7688 case elfcpp::R_ARM_GLOB_DAT:
7689 case elfcpp::R_ARM_JUMP_SLOT:
7690 case elfcpp::R_ARM_RELATIVE:
7691 case elfcpp::R_ARM_PC24:
7692 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
7693 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
7694 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
7696 // Not expected. We will give an error later.
7701 // Report an unsupported relocation against a local symbol.
7703 template<bool big_endian>
7705 Target_arm<big_endian>::Scan::unsupported_reloc_local(
7706 Sized_relobj_file<32, big_endian>* object,
7707 unsigned int r_type)
7709 gold_error(_("%s: unsupported reloc %u against local symbol"),
7710 object->name().c_str(), r_type);
7713 // We are about to emit a dynamic relocation of type R_TYPE. If the
7714 // dynamic linker does not support it, issue an error. The GNU linker
7715 // only issues a non-PIC error for an allocated read-only section.
7716 // Here we know the section is allocated, but we don't know that it is
7717 // read-only. But we check for all the relocation types which the
7718 // glibc dynamic linker supports, so it seems appropriate to issue an
7719 // error even if the section is not read-only.
7721 template<bool big_endian>
7723 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
7724 unsigned int r_type)
7728 // These are the relocation types supported by glibc for ARM.
7729 case elfcpp::R_ARM_RELATIVE:
7730 case elfcpp::R_ARM_COPY:
7731 case elfcpp::R_ARM_GLOB_DAT:
7732 case elfcpp::R_ARM_JUMP_SLOT:
7733 case elfcpp::R_ARM_ABS32:
7734 case elfcpp::R_ARM_ABS32_NOI:
7735 case elfcpp::R_ARM_PC24:
7736 // FIXME: The following 3 types are not supported by Android's dynamic
7738 case elfcpp::R_ARM_TLS_DTPMOD32:
7739 case elfcpp::R_ARM_TLS_DTPOFF32:
7740 case elfcpp::R_ARM_TLS_TPOFF32:
7745 // This prevents us from issuing more than one error per reloc
7746 // section. But we can still wind up issuing more than one
7747 // error per object file.
7748 if (this->issued_non_pic_error_)
7750 const Arm_reloc_property* reloc_property =
7751 arm_reloc_property_table->get_reloc_property(r_type);
7752 gold_assert(reloc_property != NULL);
7753 object->error(_("requires unsupported dynamic reloc %s; "
7754 "recompile with -fPIC"),
7755 reloc_property->name().c_str());
7756 this->issued_non_pic_error_ = true;
7760 case elfcpp::R_ARM_NONE:
7765 // Scan a relocation for a local symbol.
7766 // FIXME: This only handles a subset of relocation types used by Android
7767 // on ARM v5te devices.
7769 template<bool big_endian>
7771 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
7774 Sized_relobj_file<32, big_endian>* object,
7775 unsigned int data_shndx,
7776 Output_section* output_section,
7777 const elfcpp::Rel<32, big_endian>& reloc,
7778 unsigned int r_type,
7779 const elfcpp::Sym<32, big_endian>& lsym)
7781 r_type = get_real_reloc_type(r_type);
7784 case elfcpp::R_ARM_NONE:
7785 case elfcpp::R_ARM_V4BX:
7786 case elfcpp::R_ARM_GNU_VTENTRY:
7787 case elfcpp::R_ARM_GNU_VTINHERIT:
7790 case elfcpp::R_ARM_ABS32:
7791 case elfcpp::R_ARM_ABS32_NOI:
7792 // If building a shared library (or a position-independent
7793 // executable), we need to create a dynamic relocation for
7794 // this location. The relocation applied at link time will
7795 // apply the link-time value, so we flag the location with
7796 // an R_ARM_RELATIVE relocation so the dynamic loader can
7797 // relocate it easily.
7798 if (parameters->options().output_is_position_independent())
7800 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7801 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7802 // If we are to add more other reloc types than R_ARM_ABS32,
7803 // we need to add check_non_pic(object, r_type) here.
7804 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
7805 output_section, data_shndx,
7806 reloc.get_r_offset());
7810 case elfcpp::R_ARM_ABS16:
7811 case elfcpp::R_ARM_ABS12:
7812 case elfcpp::R_ARM_THM_ABS5:
7813 case elfcpp::R_ARM_ABS8:
7814 case elfcpp::R_ARM_BASE_ABS:
7815 case elfcpp::R_ARM_MOVW_ABS_NC:
7816 case elfcpp::R_ARM_MOVT_ABS:
7817 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7818 case elfcpp::R_ARM_THM_MOVT_ABS:
7819 // If building a shared library (or a position-independent
7820 // executable), we need to create a dynamic relocation for
7821 // this location. Because the addend needs to remain in the
7822 // data section, we need to be careful not to apply this
7823 // relocation statically.
7824 if (parameters->options().output_is_position_independent())
7826 check_non_pic(object, r_type);
7827 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7828 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7829 if (lsym.get_st_type() != elfcpp::STT_SECTION)
7830 rel_dyn->add_local(object, r_sym, r_type, output_section,
7831 data_shndx, reloc.get_r_offset());
7834 gold_assert(lsym.get_st_value() == 0);
7835 unsigned int shndx = lsym.get_st_shndx();
7837 shndx = object->adjust_sym_shndx(r_sym, shndx,
7840 object->error(_("section symbol %u has bad shndx %u"),
7843 rel_dyn->add_local_section(object, shndx,
7844 r_type, output_section,
7845 data_shndx, reloc.get_r_offset());
7850 case elfcpp::R_ARM_REL32:
7851 case elfcpp::R_ARM_LDR_PC_G0:
7852 case elfcpp::R_ARM_SBREL32:
7853 case elfcpp::R_ARM_THM_CALL:
7854 case elfcpp::R_ARM_THM_PC8:
7855 case elfcpp::R_ARM_BASE_PREL:
7856 case elfcpp::R_ARM_PLT32:
7857 case elfcpp::R_ARM_CALL:
7858 case elfcpp::R_ARM_JUMP24:
7859 case elfcpp::R_ARM_THM_JUMP24:
7860 case elfcpp::R_ARM_SBREL31:
7861 case elfcpp::R_ARM_PREL31:
7862 case elfcpp::R_ARM_MOVW_PREL_NC:
7863 case elfcpp::R_ARM_MOVT_PREL:
7864 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7865 case elfcpp::R_ARM_THM_MOVT_PREL:
7866 case elfcpp::R_ARM_THM_JUMP19:
7867 case elfcpp::R_ARM_THM_JUMP6:
7868 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7869 case elfcpp::R_ARM_THM_PC12:
7870 case elfcpp::R_ARM_REL32_NOI:
7871 case elfcpp::R_ARM_ALU_PC_G0_NC:
7872 case elfcpp::R_ARM_ALU_PC_G0:
7873 case elfcpp::R_ARM_ALU_PC_G1_NC:
7874 case elfcpp::R_ARM_ALU_PC_G1:
7875 case elfcpp::R_ARM_ALU_PC_G2:
7876 case elfcpp::R_ARM_LDR_PC_G1:
7877 case elfcpp::R_ARM_LDR_PC_G2:
7878 case elfcpp::R_ARM_LDRS_PC_G0:
7879 case elfcpp::R_ARM_LDRS_PC_G1:
7880 case elfcpp::R_ARM_LDRS_PC_G2:
7881 case elfcpp::R_ARM_LDC_PC_G0:
7882 case elfcpp::R_ARM_LDC_PC_G1:
7883 case elfcpp::R_ARM_LDC_PC_G2:
7884 case elfcpp::R_ARM_ALU_SB_G0_NC:
7885 case elfcpp::R_ARM_ALU_SB_G0:
7886 case elfcpp::R_ARM_ALU_SB_G1_NC:
7887 case elfcpp::R_ARM_ALU_SB_G1:
7888 case elfcpp::R_ARM_ALU_SB_G2:
7889 case elfcpp::R_ARM_LDR_SB_G0:
7890 case elfcpp::R_ARM_LDR_SB_G1:
7891 case elfcpp::R_ARM_LDR_SB_G2:
7892 case elfcpp::R_ARM_LDRS_SB_G0:
7893 case elfcpp::R_ARM_LDRS_SB_G1:
7894 case elfcpp::R_ARM_LDRS_SB_G2:
7895 case elfcpp::R_ARM_LDC_SB_G0:
7896 case elfcpp::R_ARM_LDC_SB_G1:
7897 case elfcpp::R_ARM_LDC_SB_G2:
7898 case elfcpp::R_ARM_MOVW_BREL_NC:
7899 case elfcpp::R_ARM_MOVT_BREL:
7900 case elfcpp::R_ARM_MOVW_BREL:
7901 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7902 case elfcpp::R_ARM_THM_MOVT_BREL:
7903 case elfcpp::R_ARM_THM_MOVW_BREL:
7904 case elfcpp::R_ARM_THM_JUMP11:
7905 case elfcpp::R_ARM_THM_JUMP8:
7906 // We don't need to do anything for a relative addressing relocation
7907 // against a local symbol if it does not reference the GOT.
7910 case elfcpp::R_ARM_GOTOFF32:
7911 case elfcpp::R_ARM_GOTOFF12:
7912 // We need a GOT section:
7913 target->got_section(symtab, layout);
7916 case elfcpp::R_ARM_GOT_BREL:
7917 case elfcpp::R_ARM_GOT_PREL:
7919 // The symbol requires a GOT entry.
7920 Arm_output_data_got<big_endian>* got =
7921 target->got_section(symtab, layout);
7922 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7923 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
7925 // If we are generating a shared object, we need to add a
7926 // dynamic RELATIVE relocation for this symbol's GOT entry.
7927 if (parameters->options().output_is_position_independent())
7929 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7930 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7931 rel_dyn->add_local_relative(
7932 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
7933 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
7939 case elfcpp::R_ARM_TARGET1:
7940 case elfcpp::R_ARM_TARGET2:
7941 // This should have been mapped to another type already.
7943 case elfcpp::R_ARM_COPY:
7944 case elfcpp::R_ARM_GLOB_DAT:
7945 case elfcpp::R_ARM_JUMP_SLOT:
7946 case elfcpp::R_ARM_RELATIVE:
7947 // These are relocations which should only be seen by the
7948 // dynamic linker, and should never be seen here.
7949 gold_error(_("%s: unexpected reloc %u in object file"),
7950 object->name().c_str(), r_type);
7954 // These are initial TLS relocs, which are expected when
7956 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
7957 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
7958 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
7959 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
7960 case elfcpp::R_ARM_TLS_LE32: // Local-exec
7962 bool output_is_shared = parameters->options().shared();
7963 const tls::Tls_optimization optimized_type
7964 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared,
7968 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
7969 if (optimized_type == tls::TLSOPT_NONE)
7971 // Create a pair of GOT entries for the module index and
7972 // dtv-relative offset.
7973 Arm_output_data_got<big_endian>* got
7974 = target->got_section(symtab, layout);
7975 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7976 unsigned int shndx = lsym.get_st_shndx();
7978 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
7981 object->error(_("local symbol %u has bad shndx %u"),
7986 if (!parameters->doing_static_link())
7987 got->add_local_pair_with_rel(object, r_sym, shndx,
7989 target->rel_dyn_section(layout),
7990 elfcpp::R_ARM_TLS_DTPMOD32, 0);
7992 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR,
7996 // FIXME: TLS optimization not supported yet.
8000 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8001 if (optimized_type == tls::TLSOPT_NONE)
8003 // Create a GOT entry for the module index.
8004 target->got_mod_index_entry(symtab, layout, object);
8007 // FIXME: TLS optimization not supported yet.
8011 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8014 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8015 layout->set_has_static_tls();
8016 if (optimized_type == tls::TLSOPT_NONE)
8018 // Create a GOT entry for the tp-relative offset.
8019 Arm_output_data_got<big_endian>* got
8020 = target->got_section(symtab, layout);
8021 unsigned int r_sym =
8022 elfcpp::elf_r_sym<32>(reloc.get_r_info());
8023 if (!parameters->doing_static_link())
8024 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET,
8025 target->rel_dyn_section(layout),
8026 elfcpp::R_ARM_TLS_TPOFF32);
8027 else if (!object->local_has_got_offset(r_sym,
8028 GOT_TYPE_TLS_OFFSET))
8030 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET);
8031 unsigned int got_offset =
8032 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET);
8033 got->add_static_reloc(got_offset,
8034 elfcpp::R_ARM_TLS_TPOFF32, object,
8039 // FIXME: TLS optimization not supported yet.
8043 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8044 layout->set_has_static_tls();
8045 if (output_is_shared)
8047 // We need to create a dynamic relocation.
8048 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION);
8049 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8050 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8051 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32,
8052 output_section, data_shndx,
8053 reloc.get_r_offset());
8063 case elfcpp::R_ARM_PC24:
8064 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8065 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8066 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8068 unsupported_reloc_local(object, r_type);
8073 // Report an unsupported relocation against a global symbol.
8075 template<bool big_endian>
8077 Target_arm<big_endian>::Scan::unsupported_reloc_global(
8078 Sized_relobj_file<32, big_endian>* object,
8079 unsigned int r_type,
8082 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8083 object->name().c_str(), r_type, gsym->demangled_name().c_str());
8086 template<bool big_endian>
8088 Target_arm<big_endian>::Scan::possible_function_pointer_reloc(
8089 unsigned int r_type)
8093 case elfcpp::R_ARM_PC24:
8094 case elfcpp::R_ARM_THM_CALL:
8095 case elfcpp::R_ARM_PLT32:
8096 case elfcpp::R_ARM_CALL:
8097 case elfcpp::R_ARM_JUMP24:
8098 case elfcpp::R_ARM_THM_JUMP24:
8099 case elfcpp::R_ARM_SBREL31:
8100 case elfcpp::R_ARM_PREL31:
8101 case elfcpp::R_ARM_THM_JUMP19:
8102 case elfcpp::R_ARM_THM_JUMP6:
8103 case elfcpp::R_ARM_THM_JUMP11:
8104 case elfcpp::R_ARM_THM_JUMP8:
8105 // All the relocations above are branches except SBREL31 and PREL31.
8109 // Be conservative and assume this is a function pointer.
8114 template<bool big_endian>
8116 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer(
8119 Target_arm<big_endian>* target,
8120 Sized_relobj_file<32, big_endian>*,
8123 const elfcpp::Rel<32, big_endian>&,
8124 unsigned int r_type,
8125 const elfcpp::Sym<32, big_endian>&)
8127 r_type = target->get_real_reloc_type(r_type);
8128 return possible_function_pointer_reloc(r_type);
8131 template<bool big_endian>
8133 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer(
8136 Target_arm<big_endian>* target,
8137 Sized_relobj_file<32, big_endian>*,
8140 const elfcpp::Rel<32, big_endian>&,
8141 unsigned int r_type,
8144 // GOT is not a function.
8145 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8148 r_type = target->get_real_reloc_type(r_type);
8149 return possible_function_pointer_reloc(r_type);
8152 // Scan a relocation for a global symbol.
8154 template<bool big_endian>
8156 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
8159 Sized_relobj_file<32, big_endian>* object,
8160 unsigned int data_shndx,
8161 Output_section* output_section,
8162 const elfcpp::Rel<32, big_endian>& reloc,
8163 unsigned int r_type,
8166 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8167 // section. We check here to avoid creating a dynamic reloc against
8168 // _GLOBAL_OFFSET_TABLE_.
8169 if (!target->has_got_section()
8170 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8171 target->got_section(symtab, layout);
8173 r_type = get_real_reloc_type(r_type);
8176 case elfcpp::R_ARM_NONE:
8177 case elfcpp::R_ARM_V4BX:
8178 case elfcpp::R_ARM_GNU_VTENTRY:
8179 case elfcpp::R_ARM_GNU_VTINHERIT:
8182 case elfcpp::R_ARM_ABS32:
8183 case elfcpp::R_ARM_ABS16:
8184 case elfcpp::R_ARM_ABS12:
8185 case elfcpp::R_ARM_THM_ABS5:
8186 case elfcpp::R_ARM_ABS8:
8187 case elfcpp::R_ARM_BASE_ABS:
8188 case elfcpp::R_ARM_MOVW_ABS_NC:
8189 case elfcpp::R_ARM_MOVT_ABS:
8190 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8191 case elfcpp::R_ARM_THM_MOVT_ABS:
8192 case elfcpp::R_ARM_ABS32_NOI:
8193 // Absolute addressing relocations.
8195 // Make a PLT entry if necessary.
8196 if (this->symbol_needs_plt_entry(gsym))
8198 target->make_plt_entry(symtab, layout, gsym);
8199 // Since this is not a PC-relative relocation, we may be
8200 // taking the address of a function. In that case we need to
8201 // set the entry in the dynamic symbol table to the address of
8203 if (gsym->is_from_dynobj() && !parameters->options().shared())
8204 gsym->set_needs_dynsym_value();
8206 // Make a dynamic relocation if necessary.
8207 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8209 if (gsym->may_need_copy_reloc())
8211 target->copy_reloc(symtab, layout, object,
8212 data_shndx, output_section, gsym, reloc);
8214 else if ((r_type == elfcpp::R_ARM_ABS32
8215 || r_type == elfcpp::R_ARM_ABS32_NOI)
8216 && gsym->can_use_relative_reloc(false))
8218 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8219 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
8220 output_section, object,
8221 data_shndx, reloc.get_r_offset());
8225 check_non_pic(object, r_type);
8226 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8227 rel_dyn->add_global(gsym, r_type, output_section, object,
8228 data_shndx, reloc.get_r_offset());
8234 case elfcpp::R_ARM_GOTOFF32:
8235 case elfcpp::R_ARM_GOTOFF12:
8236 // We need a GOT section.
8237 target->got_section(symtab, layout);
8240 case elfcpp::R_ARM_REL32:
8241 case elfcpp::R_ARM_LDR_PC_G0:
8242 case elfcpp::R_ARM_SBREL32:
8243 case elfcpp::R_ARM_THM_PC8:
8244 case elfcpp::R_ARM_BASE_PREL:
8245 case elfcpp::R_ARM_MOVW_PREL_NC:
8246 case elfcpp::R_ARM_MOVT_PREL:
8247 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8248 case elfcpp::R_ARM_THM_MOVT_PREL:
8249 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8250 case elfcpp::R_ARM_THM_PC12:
8251 case elfcpp::R_ARM_REL32_NOI:
8252 case elfcpp::R_ARM_ALU_PC_G0_NC:
8253 case elfcpp::R_ARM_ALU_PC_G0:
8254 case elfcpp::R_ARM_ALU_PC_G1_NC:
8255 case elfcpp::R_ARM_ALU_PC_G1:
8256 case elfcpp::R_ARM_ALU_PC_G2:
8257 case elfcpp::R_ARM_LDR_PC_G1:
8258 case elfcpp::R_ARM_LDR_PC_G2:
8259 case elfcpp::R_ARM_LDRS_PC_G0:
8260 case elfcpp::R_ARM_LDRS_PC_G1:
8261 case elfcpp::R_ARM_LDRS_PC_G2:
8262 case elfcpp::R_ARM_LDC_PC_G0:
8263 case elfcpp::R_ARM_LDC_PC_G1:
8264 case elfcpp::R_ARM_LDC_PC_G2:
8265 case elfcpp::R_ARM_ALU_SB_G0_NC:
8266 case elfcpp::R_ARM_ALU_SB_G0:
8267 case elfcpp::R_ARM_ALU_SB_G1_NC:
8268 case elfcpp::R_ARM_ALU_SB_G1:
8269 case elfcpp::R_ARM_ALU_SB_G2:
8270 case elfcpp::R_ARM_LDR_SB_G0:
8271 case elfcpp::R_ARM_LDR_SB_G1:
8272 case elfcpp::R_ARM_LDR_SB_G2:
8273 case elfcpp::R_ARM_LDRS_SB_G0:
8274 case elfcpp::R_ARM_LDRS_SB_G1:
8275 case elfcpp::R_ARM_LDRS_SB_G2:
8276 case elfcpp::R_ARM_LDC_SB_G0:
8277 case elfcpp::R_ARM_LDC_SB_G1:
8278 case elfcpp::R_ARM_LDC_SB_G2:
8279 case elfcpp::R_ARM_MOVW_BREL_NC:
8280 case elfcpp::R_ARM_MOVT_BREL:
8281 case elfcpp::R_ARM_MOVW_BREL:
8282 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8283 case elfcpp::R_ARM_THM_MOVT_BREL:
8284 case elfcpp::R_ARM_THM_MOVW_BREL:
8285 // Relative addressing relocations.
8287 // Make a dynamic relocation if necessary.
8288 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8290 if (target->may_need_copy_reloc(gsym))
8292 target->copy_reloc(symtab, layout, object,
8293 data_shndx, output_section, gsym, reloc);
8297 check_non_pic(object, r_type);
8298 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8299 rel_dyn->add_global(gsym, r_type, output_section, object,
8300 data_shndx, reloc.get_r_offset());
8306 case elfcpp::R_ARM_THM_CALL:
8307 case elfcpp::R_ARM_PLT32:
8308 case elfcpp::R_ARM_CALL:
8309 case elfcpp::R_ARM_JUMP24:
8310 case elfcpp::R_ARM_THM_JUMP24:
8311 case elfcpp::R_ARM_SBREL31:
8312 case elfcpp::R_ARM_PREL31:
8313 case elfcpp::R_ARM_THM_JUMP19:
8314 case elfcpp::R_ARM_THM_JUMP6:
8315 case elfcpp::R_ARM_THM_JUMP11:
8316 case elfcpp::R_ARM_THM_JUMP8:
8317 // All the relocation above are branches except for the PREL31 ones.
8318 // A PREL31 relocation can point to a personality function in a shared
8319 // library. In that case we want to use a PLT because we want to
8320 // call the personality routine and the dynamic linkers we care about
8321 // do not support dynamic PREL31 relocations. An REL31 relocation may
8322 // point to a function whose unwinding behaviour is being described but
8323 // we will not mistakenly generate a PLT for that because we should use
8324 // a local section symbol.
8326 // If the symbol is fully resolved, this is just a relative
8327 // local reloc. Otherwise we need a PLT entry.
8328 if (gsym->final_value_is_known())
8330 // If building a shared library, we can also skip the PLT entry
8331 // if the symbol is defined in the output file and is protected
8333 if (gsym->is_defined()
8334 && !gsym->is_from_dynobj()
8335 && !gsym->is_preemptible())
8337 target->make_plt_entry(symtab, layout, gsym);
8340 case elfcpp::R_ARM_GOT_BREL:
8341 case elfcpp::R_ARM_GOT_ABS:
8342 case elfcpp::R_ARM_GOT_PREL:
8344 // The symbol requires a GOT entry.
8345 Arm_output_data_got<big_endian>* got =
8346 target->got_section(symtab, layout);
8347 if (gsym->final_value_is_known())
8348 got->add_global(gsym, GOT_TYPE_STANDARD);
8351 // If this symbol is not fully resolved, we need to add a
8352 // GOT entry with a dynamic relocation.
8353 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8354 if (gsym->is_from_dynobj()
8355 || gsym->is_undefined()
8356 || gsym->is_preemptible())
8357 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
8358 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
8361 if (got->add_global(gsym, GOT_TYPE_STANDARD))
8362 rel_dyn->add_global_relative(
8363 gsym, elfcpp::R_ARM_RELATIVE, got,
8364 gsym->got_offset(GOT_TYPE_STANDARD));
8370 case elfcpp::R_ARM_TARGET1:
8371 case elfcpp::R_ARM_TARGET2:
8372 // These should have been mapped to other types already.
8374 case elfcpp::R_ARM_COPY:
8375 case elfcpp::R_ARM_GLOB_DAT:
8376 case elfcpp::R_ARM_JUMP_SLOT:
8377 case elfcpp::R_ARM_RELATIVE:
8378 // These are relocations which should only be seen by the
8379 // dynamic linker, and should never be seen here.
8380 gold_error(_("%s: unexpected reloc %u in object file"),
8381 object->name().c_str(), r_type);
8384 // These are initial tls relocs, which are expected when
8386 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8387 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8388 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8389 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8390 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8392 const bool is_final = gsym->final_value_is_known();
8393 const tls::Tls_optimization optimized_type
8394 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
8397 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8398 if (optimized_type == tls::TLSOPT_NONE)
8400 // Create a pair of GOT entries for the module index and
8401 // dtv-relative offset.
8402 Arm_output_data_got<big_endian>* got
8403 = target->got_section(symtab, layout);
8404 if (!parameters->doing_static_link())
8405 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR,
8406 target->rel_dyn_section(layout),
8407 elfcpp::R_ARM_TLS_DTPMOD32,
8408 elfcpp::R_ARM_TLS_DTPOFF32);
8410 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym);
8413 // FIXME: TLS optimization not supported yet.
8417 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8418 if (optimized_type == tls::TLSOPT_NONE)
8420 // Create a GOT entry for the module index.
8421 target->got_mod_index_entry(symtab, layout, object);
8424 // FIXME: TLS optimization not supported yet.
8428 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8431 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8432 layout->set_has_static_tls();
8433 if (optimized_type == tls::TLSOPT_NONE)
8435 // Create a GOT entry for the tp-relative offset.
8436 Arm_output_data_got<big_endian>* got
8437 = target->got_section(symtab, layout);
8438 if (!parameters->doing_static_link())
8439 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET,
8440 target->rel_dyn_section(layout),
8441 elfcpp::R_ARM_TLS_TPOFF32);
8442 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET))
8444 got->add_global(gsym, GOT_TYPE_TLS_OFFSET);
8445 unsigned int got_offset =
8446 gsym->got_offset(GOT_TYPE_TLS_OFFSET);
8447 got->add_static_reloc(got_offset,
8448 elfcpp::R_ARM_TLS_TPOFF32, gsym);
8452 // FIXME: TLS optimization not supported yet.
8456 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8457 layout->set_has_static_tls();
8458 if (parameters->options().shared())
8460 // We need to create a dynamic relocation.
8461 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8462 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32,
8463 output_section, object,
8464 data_shndx, reloc.get_r_offset());
8474 case elfcpp::R_ARM_PC24:
8475 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8476 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8477 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8479 unsupported_reloc_global(object, r_type, gsym);
8484 // Process relocations for gc.
8486 template<bool big_endian>
8488 Target_arm<big_endian>::gc_process_relocs(
8489 Symbol_table* symtab,
8491 Sized_relobj_file<32, big_endian>* object,
8492 unsigned int data_shndx,
8494 const unsigned char* prelocs,
8496 Output_section* output_section,
8497 bool needs_special_offset_handling,
8498 size_t local_symbol_count,
8499 const unsigned char* plocal_symbols)
8501 typedef Target_arm<big_endian> Arm;
8502 typedef typename Target_arm<big_endian>::Scan Scan;
8504 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan,
8505 typename Target_arm::Relocatable_size_for_reloc>(
8514 needs_special_offset_handling,
8519 // Scan relocations for a section.
8521 template<bool big_endian>
8523 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
8525 Sized_relobj_file<32, big_endian>* object,
8526 unsigned int data_shndx,
8527 unsigned int sh_type,
8528 const unsigned char* prelocs,
8530 Output_section* output_section,
8531 bool needs_special_offset_handling,
8532 size_t local_symbol_count,
8533 const unsigned char* plocal_symbols)
8535 typedef typename Target_arm<big_endian>::Scan Scan;
8536 if (sh_type == elfcpp::SHT_RELA)
8538 gold_error(_("%s: unsupported RELA reloc section"),
8539 object->name().c_str());
8543 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
8552 needs_special_offset_handling,
8557 // Finalize the sections.
8559 template<bool big_endian>
8561 Target_arm<big_endian>::do_finalize_sections(
8563 const Input_objects* input_objects,
8564 Symbol_table* symtab)
8566 bool merged_any_attributes = false;
8567 // Merge processor-specific flags.
8568 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
8569 p != input_objects->relobj_end();
8572 Arm_relobj<big_endian>* arm_relobj =
8573 Arm_relobj<big_endian>::as_arm_relobj(*p);
8574 if (arm_relobj->merge_flags_and_attributes())
8576 this->merge_processor_specific_flags(
8578 arm_relobj->processor_specific_flags());
8579 this->merge_object_attributes(arm_relobj->name().c_str(),
8580 arm_relobj->attributes_section_data());
8581 merged_any_attributes = true;
8585 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
8586 p != input_objects->dynobj_end();
8589 Arm_dynobj<big_endian>* arm_dynobj =
8590 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
8591 this->merge_processor_specific_flags(
8593 arm_dynobj->processor_specific_flags());
8594 this->merge_object_attributes(arm_dynobj->name().c_str(),
8595 arm_dynobj->attributes_section_data());
8596 merged_any_attributes = true;
8599 // Create an empty uninitialized attribute section if we still don't have it
8600 // at this moment. This happens if there is no attributes sections in all
8602 if (this->attributes_section_data_ == NULL)
8603 this->attributes_section_data_ = new Attributes_section_data(NULL, 0);
8606 const Object_attribute* cpu_arch_attr =
8607 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
8608 if (cpu_arch_attr->int_value() > elfcpp::TAG_CPU_ARCH_V4)
8609 this->set_may_use_blx(true);
8611 // Check if we need to use Cortex-A8 workaround.
8612 if (parameters->options().user_set_fix_cortex_a8())
8613 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
8616 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8617 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8619 const Object_attribute* cpu_arch_profile_attr =
8620 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
8621 this->fix_cortex_a8_ =
8622 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
8623 && (cpu_arch_profile_attr->int_value() == 'A'
8624 || cpu_arch_profile_attr->int_value() == 0));
8627 // Check if we can use V4BX interworking.
8628 // The V4BX interworking stub contains BX instruction,
8629 // which is not specified for some profiles.
8630 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8631 && !this->may_use_blx())
8632 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8633 "the target profile does not support BX instruction"));
8635 // Fill in some more dynamic tags.
8636 const Reloc_section* rel_plt = (this->plt_ == NULL
8638 : this->plt_->rel_plt());
8639 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
8640 this->rel_dyn_, true, false);
8642 // Emit any relocs we saved in an attempt to avoid generating COPY
8644 if (this->copy_relocs_.any_saved_relocs())
8645 this->copy_relocs_.emit(this->rel_dyn_section(layout));
8647 // Handle the .ARM.exidx section.
8648 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
8650 if (!parameters->options().relocatable())
8652 if (exidx_section != NULL
8653 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX)
8655 // Create __exidx_start and __exidx_end symbols.
8656 symtab->define_in_output_data("__exidx_start", NULL,
8657 Symbol_table::PREDEFINED,
8658 exidx_section, 0, 0, elfcpp::STT_OBJECT,
8659 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN,
8661 symtab->define_in_output_data("__exidx_end", NULL,
8662 Symbol_table::PREDEFINED,
8663 exidx_section, 0, 0, elfcpp::STT_OBJECT,
8664 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN,
8667 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8668 // the .ARM.exidx section.
8669 if (!layout->script_options()->saw_phdrs_clause())
8671 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0,
8674 Output_segment* exidx_segment =
8675 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
8676 exidx_segment->add_output_section_to_nonload(exidx_section,
8682 symtab->define_as_constant("__exidx_start", NULL,
8683 Symbol_table::PREDEFINED,
8684 0, 0, elfcpp::STT_OBJECT,
8685 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
8687 symtab->define_as_constant("__exidx_end", NULL,
8688 Symbol_table::PREDEFINED,
8689 0, 0, elfcpp::STT_OBJECT,
8690 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
8695 // Create an .ARM.attributes section if we have merged any attributes
8697 if (merged_any_attributes)
8699 Output_attributes_section_data* attributes_section =
8700 new Output_attributes_section_data(*this->attributes_section_data_);
8701 layout->add_output_section_data(".ARM.attributes",
8702 elfcpp::SHT_ARM_ATTRIBUTES, 0,
8703 attributes_section, ORDER_INVALID,
8707 // Fix up links in section EXIDX headers.
8708 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
8709 p != layout->section_list().end();
8711 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
8713 Arm_output_section<big_endian>* os =
8714 Arm_output_section<big_endian>::as_arm_output_section(*p);
8715 os->set_exidx_section_link();
8719 // Return whether a direct absolute static relocation needs to be applied.
8720 // In cases where Scan::local() or Scan::global() has created
8721 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8722 // of the relocation is carried in the data, and we must not
8723 // apply the static relocation.
8725 template<bool big_endian>
8727 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
8728 const Sized_symbol<32>* gsym,
8729 unsigned int r_type,
8731 Output_section* output_section)
8733 // If the output section is not allocated, then we didn't call
8734 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8736 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
8739 int ref_flags = Scan::get_reference_flags(r_type);
8741 // For local symbols, we will have created a non-RELATIVE dynamic
8742 // relocation only if (a) the output is position independent,
8743 // (b) the relocation is absolute (not pc- or segment-relative), and
8744 // (c) the relocation is not 32 bits wide.
8746 return !(parameters->options().output_is_position_independent()
8747 && (ref_flags & Symbol::ABSOLUTE_REF)
8750 // For global symbols, we use the same helper routines used in the
8751 // scan pass. If we did not create a dynamic relocation, or if we
8752 // created a RELATIVE dynamic relocation, we should apply the static
8754 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
8755 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
8756 && gsym->can_use_relative_reloc(ref_flags
8757 & Symbol::FUNCTION_CALL);
8758 return !has_dyn || is_rel;
8761 // Perform a relocation.
8763 template<bool big_endian>
8765 Target_arm<big_endian>::Relocate::relocate(
8766 const Relocate_info<32, big_endian>* relinfo,
8768 Output_section* output_section,
8770 const elfcpp::Rel<32, big_endian>& rel,
8771 unsigned int r_type,
8772 const Sized_symbol<32>* gsym,
8773 const Symbol_value<32>* psymval,
8774 unsigned char* view,
8775 Arm_address address,
8776 section_size_type view_size)
8778 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
8780 r_type = get_real_reloc_type(r_type);
8781 const Arm_reloc_property* reloc_property =
8782 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
8783 if (reloc_property == NULL)
8785 std::string reloc_name =
8786 arm_reloc_property_table->reloc_name_in_error_message(r_type);
8787 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
8788 _("cannot relocate %s in object file"),
8789 reloc_name.c_str());
8793 const Arm_relobj<big_endian>* object =
8794 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
8796 // If the final branch target of a relocation is THUMB instruction, this
8797 // is 1. Otherwise it is 0.
8798 Arm_address thumb_bit = 0;
8799 Symbol_value<32> symval;
8800 bool is_weakly_undefined_without_plt = false;
8801 bool have_got_offset = false;
8802 unsigned int got_offset = 0;
8804 // If the relocation uses the GOT entry of a symbol instead of the symbol
8805 // itself, we don't care about whether the symbol is defined or what kind
8807 if (reloc_property->uses_got_entry())
8809 // Get the GOT offset.
8810 // The GOT pointer points to the end of the GOT section.
8811 // We need to subtract the size of the GOT section to get
8812 // the actual offset to use in the relocation.
8813 // TODO: We should move GOT offset computing code in TLS relocations
8817 case elfcpp::R_ARM_GOT_BREL:
8818 case elfcpp::R_ARM_GOT_PREL:
8821 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
8822 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
8823 - target->got_size());
8827 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
8828 gold_assert(object->local_has_got_offset(r_sym,
8829 GOT_TYPE_STANDARD));
8830 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
8831 - target->got_size());
8833 have_got_offset = true;
8840 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
8844 // This is a global symbol. Determine if we use PLT and if the
8845 // final target is THUMB.
8846 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
8848 // This uses a PLT, change the symbol value.
8849 symval.set_output_value(target->plt_section()->address()
8850 + gsym->plt_offset());
8853 else if (gsym->is_weak_undefined())
8855 // This is a weakly undefined symbol and we do not use PLT
8856 // for this relocation. A branch targeting this symbol will
8857 // be converted into an NOP.
8858 is_weakly_undefined_without_plt = true;
8860 else if (gsym->is_undefined() && reloc_property->uses_symbol())
8862 // This relocation uses the symbol value but the symbol is
8863 // undefined. Exit early and have the caller reporting an
8869 // Set thumb bit if symbol:
8870 // -Has type STT_ARM_TFUNC or
8871 // -Has type STT_FUNC, is defined and with LSB in value set.
8873 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
8874 || (gsym->type() == elfcpp::STT_FUNC
8875 && !gsym->is_undefined()
8876 && ((psymval->value(object, 0) & 1) != 0)))
8883 // This is a local symbol. Determine if the final target is THUMB.
8884 // We saved this information when all the local symbols were read.
8885 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
8886 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
8887 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
8892 // This is a fake relocation synthesized for a stub. It does not have
8893 // a real symbol. We just look at the LSB of the symbol value to
8894 // determine if the target is THUMB or not.
8895 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
8898 // Strip LSB if this points to a THUMB target.
8900 && reloc_property->uses_thumb_bit()
8901 && ((psymval->value(object, 0) & 1) != 0))
8903 Arm_address stripped_value =
8904 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
8905 symval.set_output_value(stripped_value);
8909 // To look up relocation stubs, we need to pass the symbol table index of
8911 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
8913 // Get the addressing origin of the output segment defining the
8914 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8915 Arm_address sym_origin = 0;
8916 if (reloc_property->uses_symbol_base())
8918 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
8919 // R_ARM_BASE_ABS with the NULL symbol will give the
8920 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8921 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8922 sym_origin = target->got_plt_section()->address();
8923 else if (gsym == NULL)
8925 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
8926 sym_origin = gsym->output_segment()->vaddr();
8927 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
8928 sym_origin = gsym->output_data()->address();
8930 // TODO: Assumes the segment base to be zero for the global symbols
8931 // till the proper support for the segment-base-relative addressing
8932 // will be implemented. This is consistent with GNU ld.
8935 // For relative addressing relocation, find out the relative address base.
8936 Arm_address relative_address_base = 0;
8937 switch(reloc_property->relative_address_base())
8939 case Arm_reloc_property::RAB_NONE:
8940 // Relocations with relative address bases RAB_TLS and RAB_tp are
8941 // handled by relocate_tls. So we do not need to do anything here.
8942 case Arm_reloc_property::RAB_TLS:
8943 case Arm_reloc_property::RAB_tp:
8945 case Arm_reloc_property::RAB_B_S:
8946 relative_address_base = sym_origin;
8948 case Arm_reloc_property::RAB_GOT_ORG:
8949 relative_address_base = target->got_plt_section()->address();
8951 case Arm_reloc_property::RAB_P:
8952 relative_address_base = address;
8954 case Arm_reloc_property::RAB_Pa:
8955 relative_address_base = address & 0xfffffffcU;
8961 typename Arm_relocate_functions::Status reloc_status =
8962 Arm_relocate_functions::STATUS_OKAY;
8963 bool check_overflow = reloc_property->checks_overflow();
8966 case elfcpp::R_ARM_NONE:
8969 case elfcpp::R_ARM_ABS8:
8970 if (should_apply_static_reloc(gsym, r_type, false, output_section))
8971 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
8974 case elfcpp::R_ARM_ABS12:
8975 if (should_apply_static_reloc(gsym, r_type, false, output_section))
8976 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
8979 case elfcpp::R_ARM_ABS16:
8980 if (should_apply_static_reloc(gsym, r_type, false, output_section))
8981 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
8984 case elfcpp::R_ARM_ABS32:
8985 if (should_apply_static_reloc(gsym, r_type, true, output_section))
8986 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
8990 case elfcpp::R_ARM_ABS32_NOI:
8991 if (should_apply_static_reloc(gsym, r_type, true, output_section))
8992 // No thumb bit for this relocation: (S + A)
8993 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
8997 case elfcpp::R_ARM_MOVW_ABS_NC:
8998 if (should_apply_static_reloc(gsym, r_type, false, output_section))
8999 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
9004 case elfcpp::R_ARM_MOVT_ABS:
9005 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9006 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
9009 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9010 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9011 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
9012 0, thumb_bit, false);
9015 case elfcpp::R_ARM_THM_MOVT_ABS:
9016 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9017 reloc_status = Arm_relocate_functions::thm_movt(view, object,
9021 case elfcpp::R_ARM_MOVW_PREL_NC:
9022 case elfcpp::R_ARM_MOVW_BREL_NC:
9023 case elfcpp::R_ARM_MOVW_BREL:
9025 Arm_relocate_functions::movw(view, object, psymval,
9026 relative_address_base, thumb_bit,
9030 case elfcpp::R_ARM_MOVT_PREL:
9031 case elfcpp::R_ARM_MOVT_BREL:
9033 Arm_relocate_functions::movt(view, object, psymval,
9034 relative_address_base);
9037 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9038 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9039 case elfcpp::R_ARM_THM_MOVW_BREL:
9041 Arm_relocate_functions::thm_movw(view, object, psymval,
9042 relative_address_base,
9043 thumb_bit, check_overflow);
9046 case elfcpp::R_ARM_THM_MOVT_PREL:
9047 case elfcpp::R_ARM_THM_MOVT_BREL:
9049 Arm_relocate_functions::thm_movt(view, object, psymval,
9050 relative_address_base);
9053 case elfcpp::R_ARM_REL32:
9054 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9055 address, thumb_bit);
9058 case elfcpp::R_ARM_THM_ABS5:
9059 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9060 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
9063 // Thumb long branches.
9064 case elfcpp::R_ARM_THM_CALL:
9065 case elfcpp::R_ARM_THM_XPC22:
9066 case elfcpp::R_ARM_THM_JUMP24:
9068 Arm_relocate_functions::thumb_branch_common(
9069 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9070 thumb_bit, is_weakly_undefined_without_plt);
9073 case elfcpp::R_ARM_GOTOFF32:
9075 Arm_address got_origin;
9076 got_origin = target->got_plt_section()->address();
9077 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9078 got_origin, thumb_bit);
9082 case elfcpp::R_ARM_BASE_PREL:
9083 gold_assert(gsym != NULL);
9085 Arm_relocate_functions::base_prel(view, sym_origin, address);
9088 case elfcpp::R_ARM_BASE_ABS:
9089 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9090 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
9093 case elfcpp::R_ARM_GOT_BREL:
9094 gold_assert(have_got_offset);
9095 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
9098 case elfcpp::R_ARM_GOT_PREL:
9099 gold_assert(have_got_offset);
9100 // Get the address origin for GOT PLT, which is allocated right
9101 // after the GOT section, to calculate an absolute address of
9102 // the symbol GOT entry (got_origin + got_offset).
9103 Arm_address got_origin;
9104 got_origin = target->got_plt_section()->address();
9105 reloc_status = Arm_relocate_functions::got_prel(view,
9106 got_origin + got_offset,
9110 case elfcpp::R_ARM_PLT32:
9111 case elfcpp::R_ARM_CALL:
9112 case elfcpp::R_ARM_JUMP24:
9113 case elfcpp::R_ARM_XPC25:
9114 gold_assert(gsym == NULL
9115 || gsym->has_plt_offset()
9116 || gsym->final_value_is_known()
9117 || (gsym->is_defined()
9118 && !gsym->is_from_dynobj()
9119 && !gsym->is_preemptible()));
9121 Arm_relocate_functions::arm_branch_common(
9122 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9123 thumb_bit, is_weakly_undefined_without_plt);
9126 case elfcpp::R_ARM_THM_JUMP19:
9128 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
9132 case elfcpp::R_ARM_THM_JUMP6:
9134 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
9137 case elfcpp::R_ARM_THM_JUMP8:
9139 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
9142 case elfcpp::R_ARM_THM_JUMP11:
9144 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
9147 case elfcpp::R_ARM_PREL31:
9148 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
9149 address, thumb_bit);
9152 case elfcpp::R_ARM_V4BX:
9153 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
9155 const bool is_v4bx_interworking =
9156 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
9158 Arm_relocate_functions::v4bx(relinfo, view, object, address,
9159 is_v4bx_interworking);
9163 case elfcpp::R_ARM_THM_PC8:
9165 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
9168 case elfcpp::R_ARM_THM_PC12:
9170 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
9173 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9175 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
9179 case elfcpp::R_ARM_ALU_PC_G0_NC:
9180 case elfcpp::R_ARM_ALU_PC_G0:
9181 case elfcpp::R_ARM_ALU_PC_G1_NC:
9182 case elfcpp::R_ARM_ALU_PC_G1:
9183 case elfcpp::R_ARM_ALU_PC_G2:
9184 case elfcpp::R_ARM_ALU_SB_G0_NC:
9185 case elfcpp::R_ARM_ALU_SB_G0:
9186 case elfcpp::R_ARM_ALU_SB_G1_NC:
9187 case elfcpp::R_ARM_ALU_SB_G1:
9188 case elfcpp::R_ARM_ALU_SB_G2:
9190 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
9191 reloc_property->group_index(),
9192 relative_address_base,
9193 thumb_bit, check_overflow);
9196 case elfcpp::R_ARM_LDR_PC_G0:
9197 case elfcpp::R_ARM_LDR_PC_G1:
9198 case elfcpp::R_ARM_LDR_PC_G2:
9199 case elfcpp::R_ARM_LDR_SB_G0:
9200 case elfcpp::R_ARM_LDR_SB_G1:
9201 case elfcpp::R_ARM_LDR_SB_G2:
9203 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
9204 reloc_property->group_index(),
9205 relative_address_base);
9208 case elfcpp::R_ARM_LDRS_PC_G0:
9209 case elfcpp::R_ARM_LDRS_PC_G1:
9210 case elfcpp::R_ARM_LDRS_PC_G2:
9211 case elfcpp::R_ARM_LDRS_SB_G0:
9212 case elfcpp::R_ARM_LDRS_SB_G1:
9213 case elfcpp::R_ARM_LDRS_SB_G2:
9215 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
9216 reloc_property->group_index(),
9217 relative_address_base);
9220 case elfcpp::R_ARM_LDC_PC_G0:
9221 case elfcpp::R_ARM_LDC_PC_G1:
9222 case elfcpp::R_ARM_LDC_PC_G2:
9223 case elfcpp::R_ARM_LDC_SB_G0:
9224 case elfcpp::R_ARM_LDC_SB_G1:
9225 case elfcpp::R_ARM_LDC_SB_G2:
9227 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
9228 reloc_property->group_index(),
9229 relative_address_base);
9232 // These are initial tls relocs, which are expected when
9234 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9235 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9236 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9237 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9238 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9240 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval,
9241 view, address, view_size);
9244 // The known and unknown unsupported and/or deprecated relocations.
9245 case elfcpp::R_ARM_PC24:
9246 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9247 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9248 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9250 // Just silently leave the method. We should get an appropriate error
9251 // message in the scan methods.
9255 // Report any errors.
9256 switch (reloc_status)
9258 case Arm_relocate_functions::STATUS_OKAY:
9260 case Arm_relocate_functions::STATUS_OVERFLOW:
9261 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9262 _("relocation overflow in %s"),
9263 reloc_property->name().c_str());
9265 case Arm_relocate_functions::STATUS_BAD_RELOC:
9266 gold_error_at_location(
9270 _("unexpected opcode while processing relocation %s"),
9271 reloc_property->name().c_str());
9280 // Perform a TLS relocation.
9282 template<bool big_endian>
9283 inline typename Arm_relocate_functions<big_endian>::Status
9284 Target_arm<big_endian>::Relocate::relocate_tls(
9285 const Relocate_info<32, big_endian>* relinfo,
9286 Target_arm<big_endian>* target,
9288 const elfcpp::Rel<32, big_endian>& rel,
9289 unsigned int r_type,
9290 const Sized_symbol<32>* gsym,
9291 const Symbol_value<32>* psymval,
9292 unsigned char* view,
9293 elfcpp::Elf_types<32>::Elf_Addr address,
9294 section_size_type /*view_size*/ )
9296 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs;
9297 typedef Relocate_functions<32, big_endian> RelocFuncs;
9298 Output_segment* tls_segment = relinfo->layout->tls_segment();
9300 const Sized_relobj_file<32, big_endian>* object = relinfo->object;
9302 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0);
9304 const bool is_final = (gsym == NULL
9305 ? !parameters->options().shared()
9306 : gsym->final_value_is_known());
9307 const tls::Tls_optimization optimized_type
9308 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
9311 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9313 unsigned int got_type = GOT_TYPE_TLS_PAIR;
9314 unsigned int got_offset;
9317 gold_assert(gsym->has_got_offset(got_type));
9318 got_offset = gsym->got_offset(got_type) - target->got_size();
9322 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9323 gold_assert(object->local_has_got_offset(r_sym, got_type));
9324 got_offset = (object->local_got_offset(r_sym, got_type)
9325 - target->got_size());
9327 if (optimized_type == tls::TLSOPT_NONE)
9329 Arm_address got_entry =
9330 target->got_plt_section()->address() + got_offset;
9332 // Relocate the field with the PC relative offset of the pair of
9334 RelocFuncs::pcrel32(view, got_entry, address);
9335 return ArmRelocFuncs::STATUS_OKAY;
9340 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9341 if (optimized_type == tls::TLSOPT_NONE)
9343 // Relocate the field with the offset of the GOT entry for
9344 // the module index.
9345 unsigned int got_offset;
9346 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL)
9347 - target->got_size());
9348 Arm_address got_entry =
9349 target->got_plt_section()->address() + got_offset;
9351 // Relocate the field with the PC relative offset of the pair of
9353 RelocFuncs::pcrel32(view, got_entry, address);
9354 return ArmRelocFuncs::STATUS_OKAY;
9358 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9359 RelocFuncs::rel32(view, value);
9360 return ArmRelocFuncs::STATUS_OKAY;
9362 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9363 if (optimized_type == tls::TLSOPT_NONE)
9365 // Relocate the field with the offset of the GOT entry for
9366 // the tp-relative offset of the symbol.
9367 unsigned int got_type = GOT_TYPE_TLS_OFFSET;
9368 unsigned int got_offset;
9371 gold_assert(gsym->has_got_offset(got_type));
9372 got_offset = gsym->got_offset(got_type);
9376 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9377 gold_assert(object->local_has_got_offset(r_sym, got_type));
9378 got_offset = object->local_got_offset(r_sym, got_type);
9381 // All GOT offsets are relative to the end of the GOT.
9382 got_offset -= target->got_size();
9384 Arm_address got_entry =
9385 target->got_plt_section()->address() + got_offset;
9387 // Relocate the field with the PC relative offset of the GOT entry.
9388 RelocFuncs::pcrel32(view, got_entry, address);
9389 return ArmRelocFuncs::STATUS_OKAY;
9393 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9394 // If we're creating a shared library, a dynamic relocation will
9395 // have been created for this location, so do not apply it now.
9396 if (!parameters->options().shared())
9398 gold_assert(tls_segment != NULL);
9400 // $tp points to the TCB, which is followed by the TLS, so we
9401 // need to add TCB size to the offset.
9402 Arm_address aligned_tcb_size =
9403 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
9404 RelocFuncs::rel32(view, value + aligned_tcb_size);
9407 return ArmRelocFuncs::STATUS_OKAY;
9413 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9414 _("unsupported reloc %u"),
9416 return ArmRelocFuncs::STATUS_BAD_RELOC;
9419 // Relocate section data.
9421 template<bool big_endian>
9423 Target_arm<big_endian>::relocate_section(
9424 const Relocate_info<32, big_endian>* relinfo,
9425 unsigned int sh_type,
9426 const unsigned char* prelocs,
9428 Output_section* output_section,
9429 bool needs_special_offset_handling,
9430 unsigned char* view,
9431 Arm_address address,
9432 section_size_type view_size,
9433 const Reloc_symbol_changes* reloc_symbol_changes)
9435 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
9436 gold_assert(sh_type == elfcpp::SHT_REL);
9438 // See if we are relocating a relaxed input section. If so, the view
9439 // covers the whole output section and we need to adjust accordingly.
9440 if (needs_special_offset_handling)
9442 const Output_relaxed_input_section* poris =
9443 output_section->find_relaxed_input_section(relinfo->object,
9444 relinfo->data_shndx);
9447 Arm_address section_address = poris->address();
9448 section_size_type section_size = poris->data_size();
9450 gold_assert((section_address >= address)
9451 && ((section_address + section_size)
9452 <= (address + view_size)));
9454 off_t offset = section_address - address;
9457 view_size = section_size;
9461 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
9468 needs_special_offset_handling,
9472 reloc_symbol_changes);
9475 // Return the size of a relocation while scanning during a relocatable
9478 template<bool big_endian>
9480 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
9481 unsigned int r_type,
9484 r_type = get_real_reloc_type(r_type);
9485 const Arm_reloc_property* arp =
9486 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9491 std::string reloc_name =
9492 arm_reloc_property_table->reloc_name_in_error_message(r_type);
9493 gold_error(_("%s: unexpected %s in object file"),
9494 object->name().c_str(), reloc_name.c_str());
9499 // Scan the relocs during a relocatable link.
9501 template<bool big_endian>
9503 Target_arm<big_endian>::scan_relocatable_relocs(
9504 Symbol_table* symtab,
9506 Sized_relobj_file<32, big_endian>* object,
9507 unsigned int data_shndx,
9508 unsigned int sh_type,
9509 const unsigned char* prelocs,
9511 Output_section* output_section,
9512 bool needs_special_offset_handling,
9513 size_t local_symbol_count,
9514 const unsigned char* plocal_symbols,
9515 Relocatable_relocs* rr)
9517 gold_assert(sh_type == elfcpp::SHT_REL);
9519 typedef Arm_scan_relocatable_relocs<big_endian, elfcpp::SHT_REL,
9520 Relocatable_size_for_reloc> Scan_relocatable_relocs;
9522 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
9523 Scan_relocatable_relocs>(
9531 needs_special_offset_handling,
9537 // Relocate a section during a relocatable link.
9539 template<bool big_endian>
9541 Target_arm<big_endian>::relocate_for_relocatable(
9542 const Relocate_info<32, big_endian>* relinfo,
9543 unsigned int sh_type,
9544 const unsigned char* prelocs,
9546 Output_section* output_section,
9547 off_t offset_in_output_section,
9548 const Relocatable_relocs* rr,
9549 unsigned char* view,
9550 Arm_address view_address,
9551 section_size_type view_size,
9552 unsigned char* reloc_view,
9553 section_size_type reloc_view_size)
9555 gold_assert(sh_type == elfcpp::SHT_REL);
9557 gold::relocate_for_relocatable<32, big_endian, elfcpp::SHT_REL>(
9562 offset_in_output_section,
9571 // Perform target-specific processing in a relocatable link. This is
9572 // only used if we use the relocation strategy RELOC_SPECIAL.
9574 template<bool big_endian>
9576 Target_arm<big_endian>::relocate_special_relocatable(
9577 const Relocate_info<32, big_endian>* relinfo,
9578 unsigned int sh_type,
9579 const unsigned char* preloc_in,
9581 Output_section* output_section,
9582 off_t offset_in_output_section,
9583 unsigned char* view,
9584 elfcpp::Elf_types<32>::Elf_Addr view_address,
9586 unsigned char* preloc_out)
9588 // We can only handle REL type relocation sections.
9589 gold_assert(sh_type == elfcpp::SHT_REL);
9591 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype;
9592 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write
9594 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1;
9596 const Arm_relobj<big_endian>* object =
9597 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9598 const unsigned int local_count = object->local_symbol_count();
9600 Reltype reloc(preloc_in);
9601 Reltype_write reloc_write(preloc_out);
9603 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
9604 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9605 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
9607 const Arm_reloc_property* arp =
9608 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9609 gold_assert(arp != NULL);
9611 // Get the new symbol index.
9612 // We only use RELOC_SPECIAL strategy in local relocations.
9613 gold_assert(r_sym < local_count);
9615 // We are adjusting a section symbol. We need to find
9616 // the symbol table index of the section symbol for
9617 // the output section corresponding to input section
9618 // in which this symbol is defined.
9620 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary);
9621 gold_assert(is_ordinary);
9622 Output_section* os = object->output_section(shndx);
9623 gold_assert(os != NULL);
9624 gold_assert(os->needs_symtab_index());
9625 unsigned int new_symndx = os->symtab_index();
9627 // Get the new offset--the location in the output section where
9628 // this relocation should be applied.
9630 Arm_address offset = reloc.get_r_offset();
9631 Arm_address new_offset;
9632 if (offset_in_output_section != invalid_address)
9633 new_offset = offset + offset_in_output_section;
9636 section_offset_type sot_offset =
9637 convert_types<section_offset_type, Arm_address>(offset);
9638 section_offset_type new_sot_offset =
9639 output_section->output_offset(object, relinfo->data_shndx,
9641 gold_assert(new_sot_offset != -1);
9642 new_offset = new_sot_offset;
9645 // In an object file, r_offset is an offset within the section.
9646 // In an executable or dynamic object, generated by
9647 // --emit-relocs, r_offset is an absolute address.
9648 if (!parameters->options().relocatable())
9650 new_offset += view_address;
9651 if (offset_in_output_section != invalid_address)
9652 new_offset -= offset_in_output_section;
9655 reloc_write.put_r_offset(new_offset);
9656 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type));
9658 // Handle the reloc addend.
9659 // The relocation uses a section symbol in the input file.
9660 // We are adjusting it to use a section symbol in the output
9661 // file. The input section symbol refers to some address in
9662 // the input section. We need the relocation in the output
9663 // file to refer to that same address. This adjustment to
9664 // the addend is the same calculation we use for a simple
9665 // absolute relocation for the input section symbol.
9667 const Symbol_value<32>* psymval = object->local_symbol(r_sym);
9669 // Handle THUMB bit.
9670 Symbol_value<32> symval;
9671 Arm_address thumb_bit =
9672 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
9674 && arp->uses_thumb_bit()
9675 && ((psymval->value(object, 0) & 1) != 0))
9677 Arm_address stripped_value =
9678 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
9679 symval.set_output_value(stripped_value);
9683 unsigned char* paddend = view + offset;
9684 typename Arm_relocate_functions<big_endian>::Status reloc_status =
9685 Arm_relocate_functions<big_endian>::STATUS_OKAY;
9688 case elfcpp::R_ARM_ABS8:
9689 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object,
9693 case elfcpp::R_ARM_ABS12:
9694 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object,
9698 case elfcpp::R_ARM_ABS16:
9699 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object,
9703 case elfcpp::R_ARM_THM_ABS5:
9704 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend,
9709 case elfcpp::R_ARM_MOVW_ABS_NC:
9710 case elfcpp::R_ARM_MOVW_PREL_NC:
9711 case elfcpp::R_ARM_MOVW_BREL_NC:
9712 case elfcpp::R_ARM_MOVW_BREL:
9713 reloc_status = Arm_relocate_functions<big_endian>::movw(
9714 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
9717 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9718 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9719 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9720 case elfcpp::R_ARM_THM_MOVW_BREL:
9721 reloc_status = Arm_relocate_functions<big_endian>::thm_movw(
9722 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
9725 case elfcpp::R_ARM_THM_CALL:
9726 case elfcpp::R_ARM_THM_XPC22:
9727 case elfcpp::R_ARM_THM_JUMP24:
9729 Arm_relocate_functions<big_endian>::thumb_branch_common(
9730 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
9734 case elfcpp::R_ARM_PLT32:
9735 case elfcpp::R_ARM_CALL:
9736 case elfcpp::R_ARM_JUMP24:
9737 case elfcpp::R_ARM_XPC25:
9739 Arm_relocate_functions<big_endian>::arm_branch_common(
9740 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
9744 case elfcpp::R_ARM_THM_JUMP19:
9746 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object,
9747 psymval, 0, thumb_bit);
9750 case elfcpp::R_ARM_THM_JUMP6:
9752 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval,
9756 case elfcpp::R_ARM_THM_JUMP8:
9758 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval,
9762 case elfcpp::R_ARM_THM_JUMP11:
9764 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval,
9768 case elfcpp::R_ARM_PREL31:
9770 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0,
9774 case elfcpp::R_ARM_THM_PC8:
9776 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval,
9780 case elfcpp::R_ARM_THM_PC12:
9782 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval,
9786 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9788 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval,
9792 // These relocation truncate relocation results so we cannot handle them
9793 // in a relocatable link.
9794 case elfcpp::R_ARM_MOVT_ABS:
9795 case elfcpp::R_ARM_THM_MOVT_ABS:
9796 case elfcpp::R_ARM_MOVT_PREL:
9797 case elfcpp::R_ARM_MOVT_BREL:
9798 case elfcpp::R_ARM_THM_MOVT_PREL:
9799 case elfcpp::R_ARM_THM_MOVT_BREL:
9800 case elfcpp::R_ARM_ALU_PC_G0_NC:
9801 case elfcpp::R_ARM_ALU_PC_G0:
9802 case elfcpp::R_ARM_ALU_PC_G1_NC:
9803 case elfcpp::R_ARM_ALU_PC_G1:
9804 case elfcpp::R_ARM_ALU_PC_G2:
9805 case elfcpp::R_ARM_ALU_SB_G0_NC:
9806 case elfcpp::R_ARM_ALU_SB_G0:
9807 case elfcpp::R_ARM_ALU_SB_G1_NC:
9808 case elfcpp::R_ARM_ALU_SB_G1:
9809 case elfcpp::R_ARM_ALU_SB_G2:
9810 case elfcpp::R_ARM_LDR_PC_G0:
9811 case elfcpp::R_ARM_LDR_PC_G1:
9812 case elfcpp::R_ARM_LDR_PC_G2:
9813 case elfcpp::R_ARM_LDR_SB_G0:
9814 case elfcpp::R_ARM_LDR_SB_G1:
9815 case elfcpp::R_ARM_LDR_SB_G2:
9816 case elfcpp::R_ARM_LDRS_PC_G0:
9817 case elfcpp::R_ARM_LDRS_PC_G1:
9818 case elfcpp::R_ARM_LDRS_PC_G2:
9819 case elfcpp::R_ARM_LDRS_SB_G0:
9820 case elfcpp::R_ARM_LDRS_SB_G1:
9821 case elfcpp::R_ARM_LDRS_SB_G2:
9822 case elfcpp::R_ARM_LDC_PC_G0:
9823 case elfcpp::R_ARM_LDC_PC_G1:
9824 case elfcpp::R_ARM_LDC_PC_G2:
9825 case elfcpp::R_ARM_LDC_SB_G0:
9826 case elfcpp::R_ARM_LDC_SB_G1:
9827 case elfcpp::R_ARM_LDC_SB_G2:
9828 gold_error(_("cannot handle %s in a relocatable link"),
9829 arp->name().c_str());
9836 // Report any errors.
9837 switch (reloc_status)
9839 case Arm_relocate_functions<big_endian>::STATUS_OKAY:
9841 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW:
9842 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
9843 _("relocation overflow in %s"),
9844 arp->name().c_str());
9846 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC:
9847 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
9848 _("unexpected opcode while processing relocation %s"),
9849 arp->name().c_str());
9856 // Return the value to use for a dynamic symbol which requires special
9857 // treatment. This is how we support equality comparisons of function
9858 // pointers across shared library boundaries, as described in the
9859 // processor specific ABI supplement.
9861 template<bool big_endian>
9863 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
9865 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
9866 return this->plt_section()->address() + gsym->plt_offset();
9869 // Map platform-specific relocs to real relocs
9871 template<bool big_endian>
9873 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type)
9877 case elfcpp::R_ARM_TARGET1:
9878 // This is either R_ARM_ABS32 or R_ARM_REL32;
9879 return elfcpp::R_ARM_ABS32;
9881 case elfcpp::R_ARM_TARGET2:
9882 // This can be any reloc type but usually is R_ARM_GOT_PREL
9883 return elfcpp::R_ARM_GOT_PREL;
9890 // Whether if two EABI versions V1 and V2 are compatible.
9892 template<bool big_endian>
9894 Target_arm<big_endian>::are_eabi_versions_compatible(
9895 elfcpp::Elf_Word v1,
9896 elfcpp::Elf_Word v2)
9898 // v4 and v5 are the same spec before and after it was released,
9899 // so allow mixing them.
9900 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN)
9901 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
9902 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
9908 // Combine FLAGS from an input object called NAME and the processor-specific
9909 // flags in the ELF header of the output. Much of this is adapted from the
9910 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9911 // in bfd/elf32-arm.c.
9913 template<bool big_endian>
9915 Target_arm<big_endian>::merge_processor_specific_flags(
9916 const std::string& name,
9917 elfcpp::Elf_Word flags)
9919 if (this->are_processor_specific_flags_set())
9921 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
9923 // Nothing to merge if flags equal to those in output.
9924 if (flags == out_flags)
9927 // Complain about various flag mismatches.
9928 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
9929 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
9930 if (!this->are_eabi_versions_compatible(version1, version2)
9931 && parameters->options().warn_mismatch())
9932 gold_error(_("Source object %s has EABI version %d but output has "
9933 "EABI version %d."),
9935 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
9936 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
9940 // If the input is the default architecture and had the default
9941 // flags then do not bother setting the flags for the output
9942 // architecture, instead allow future merges to do this. If no
9943 // future merges ever set these flags then they will retain their
9944 // uninitialised values, which surprise surprise, correspond
9945 // to the default values.
9949 // This is the first time, just copy the flags.
9950 // We only copy the EABI version for now.
9951 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
9955 // Adjust ELF file header.
9956 template<bool big_endian>
9958 Target_arm<big_endian>::do_adjust_elf_header(
9959 unsigned char* view,
9962 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
9964 elfcpp::Ehdr<32, big_endian> ehdr(view);
9965 unsigned char e_ident[elfcpp::EI_NIDENT];
9966 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
9968 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
9969 == elfcpp::EF_ARM_EABI_UNKNOWN)
9970 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
9972 e_ident[elfcpp::EI_OSABI] = 0;
9973 e_ident[elfcpp::EI_ABIVERSION] = 0;
9975 // FIXME: Do EF_ARM_BE8 adjustment.
9977 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
9978 oehdr.put_e_ident(e_ident);
9981 // do_make_elf_object to override the same function in the base class.
9982 // We need to use a target-specific sub-class of
9983 // Sized_relobj_file<32, big_endian> to store ARM specific information.
9984 // Hence we need to have our own ELF object creation.
9986 template<bool big_endian>
9988 Target_arm<big_endian>::do_make_elf_object(
9989 const std::string& name,
9990 Input_file* input_file,
9991 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
9993 int et = ehdr.get_e_type();
9994 if (et == elfcpp::ET_REL)
9996 Arm_relobj<big_endian>* obj =
9997 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
10001 else if (et == elfcpp::ET_DYN)
10003 Sized_dynobj<32, big_endian>* obj =
10004 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
10010 gold_error(_("%s: unsupported ELF file type %d"),
10016 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10017 // Returns -1 if no architecture could be read.
10018 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10020 template<bool big_endian>
10022 Target_arm<big_endian>::get_secondary_compatible_arch(
10023 const Attributes_section_data* pasd)
10025 const Object_attribute* known_attributes =
10026 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10028 // Note: the tag and its argument below are uleb128 values, though
10029 // currently-defined values fit in one byte for each.
10030 const std::string& sv =
10031 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
10033 && sv.data()[0] == elfcpp::Tag_CPU_arch
10034 && (sv.data()[1] & 128) != 128)
10035 return sv.data()[1];
10037 // This tag is "safely ignorable", so don't complain if it looks funny.
10041 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10042 // The tag is removed if ARCH is -1.
10043 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10045 template<bool big_endian>
10047 Target_arm<big_endian>::set_secondary_compatible_arch(
10048 Attributes_section_data* pasd,
10051 Object_attribute* known_attributes =
10052 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10056 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
10060 // Note: the tag and its argument below are uleb128 values, though
10061 // currently-defined values fit in one byte for each.
10063 sv[0] = elfcpp::Tag_CPU_arch;
10064 gold_assert(arch != 0);
10068 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
10071 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10073 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10075 template<bool big_endian>
10077 Target_arm<big_endian>::tag_cpu_arch_combine(
10080 int* secondary_compat_out,
10082 int secondary_compat)
10084 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10085 static const int v6t2[] =
10087 T(V6T2), // PRE_V4.
10097 static const int v6k[] =
10110 static const int v7[] =
10124 static const int v6_m[] =
10139 static const int v6s_m[] =
10155 static const int v7e_m[] =
10162 T(V7E_M), // V5TEJ.
10169 T(V7E_M), // V6S_M.
10172 static const int v4t_plus_v6_m[] =
10179 T(V5TEJ), // V5TEJ.
10186 T(V6S_M), // V6S_M.
10187 T(V7E_M), // V7E_M.
10188 T(V4T_PLUS_V6_M) // V4T plus V6_M.
10190 static const int* comb[] =
10198 // Pseudo-architecture.
10202 // Check we've not got a higher architecture than we know about.
10204 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH)
10206 gold_error(_("%s: unknown CPU architecture"), name);
10210 // Override old tag if we have a Tag_also_compatible_with on the output.
10212 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10213 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10214 oldtag = T(V4T_PLUS_V6_M);
10216 // And override the new tag if we have a Tag_also_compatible_with on the
10219 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10220 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10221 newtag = T(V4T_PLUS_V6_M);
10223 // Architectures before V6KZ add features monotonically.
10224 int tagh = std::max(oldtag, newtag);
10225 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
10228 int tagl = std::min(oldtag, newtag);
10229 int result = comb[tagh - T(V6T2)][tagl];
10231 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10232 // as the canonical version.
10233 if (result == T(V4T_PLUS_V6_M))
10236 *secondary_compat_out = T(V6_M);
10239 *secondary_compat_out = -1;
10243 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10244 name, oldtag, newtag);
10252 // Helper to print AEABI enum tag value.
10254 template<bool big_endian>
10256 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
10258 static const char* aeabi_enum_names[] =
10259 { "", "variable-size", "32-bit", "" };
10260 const size_t aeabi_enum_names_size =
10261 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
10263 if (value < aeabi_enum_names_size)
10264 return std::string(aeabi_enum_names[value]);
10268 sprintf(buffer, "<unknown value %u>", value);
10269 return std::string(buffer);
10273 // Return the string value to store in TAG_CPU_name.
10275 template<bool big_endian>
10277 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
10279 static const char* name_table[] = {
10280 // These aren't real CPU names, but we can't guess
10281 // that from the architecture version alone.
10297 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
10299 if (value < name_table_size)
10300 return std::string(name_table[value]);
10304 sprintf(buffer, "<unknown CPU value %u>", value);
10305 return std::string(buffer);
10309 // Merge object attributes from input file called NAME with those of the
10310 // output. The input object attributes are in the object pointed by PASD.
10312 template<bool big_endian>
10314 Target_arm<big_endian>::merge_object_attributes(
10316 const Attributes_section_data* pasd)
10318 // Return if there is no attributes section data.
10322 // If output has no object attributes, just copy.
10323 const int vendor = Object_attribute::OBJ_ATTR_PROC;
10324 if (this->attributes_section_data_ == NULL)
10326 this->attributes_section_data_ = new Attributes_section_data(*pasd);
10327 Object_attribute* out_attr =
10328 this->attributes_section_data_->known_attributes(vendor);
10330 // We do not output objects with Tag_MPextension_use_legacy - we move
10331 // the attribute's value to Tag_MPextension_use. */
10332 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0)
10334 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0
10335 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value()
10336 != out_attr[elfcpp::Tag_MPextension_use].int_value())
10338 gold_error(_("%s has both the current and legacy "
10339 "Tag_MPextension_use attributes"),
10343 out_attr[elfcpp::Tag_MPextension_use] =
10344 out_attr[elfcpp::Tag_MPextension_use_legacy];
10345 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0);
10346 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0);
10352 const Object_attribute* in_attr = pasd->known_attributes(vendor);
10353 Object_attribute* out_attr =
10354 this->attributes_section_data_->known_attributes(vendor);
10356 // This needs to happen before Tag_ABI_FP_number_model is merged. */
10357 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
10358 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
10360 // Ignore mismatches if the object doesn't use floating point. */
10361 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0)
10362 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
10363 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
10364 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0
10365 && parameters->options().warn_mismatch())
10366 gold_error(_("%s uses VFP register arguments, output does not"),
10370 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
10372 // Merge this attribute with existing attributes.
10375 case elfcpp::Tag_CPU_raw_name:
10376 case elfcpp::Tag_CPU_name:
10377 // These are merged after Tag_CPU_arch.
10380 case elfcpp::Tag_ABI_optimization_goals:
10381 case elfcpp::Tag_ABI_FP_optimization_goals:
10382 // Use the first value seen.
10385 case elfcpp::Tag_CPU_arch:
10387 unsigned int saved_out_attr = out_attr->int_value();
10388 // Merge Tag_CPU_arch and Tag_also_compatible_with.
10389 int secondary_compat =
10390 this->get_secondary_compatible_arch(pasd);
10391 int secondary_compat_out =
10392 this->get_secondary_compatible_arch(
10393 this->attributes_section_data_);
10394 out_attr[i].set_int_value(
10395 tag_cpu_arch_combine(name, out_attr[i].int_value(),
10396 &secondary_compat_out,
10397 in_attr[i].int_value(),
10398 secondary_compat));
10399 this->set_secondary_compatible_arch(this->attributes_section_data_,
10400 secondary_compat_out);
10402 // Merge Tag_CPU_name and Tag_CPU_raw_name.
10403 if (out_attr[i].int_value() == saved_out_attr)
10404 ; // Leave the names alone.
10405 else if (out_attr[i].int_value() == in_attr[i].int_value())
10407 // The output architecture has been changed to match the
10408 // input architecture. Use the input names.
10409 out_attr[elfcpp::Tag_CPU_name].set_string_value(
10410 in_attr[elfcpp::Tag_CPU_name].string_value());
10411 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
10412 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
10416 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
10417 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
10420 // If we still don't have a value for Tag_CPU_name,
10421 // make one up now. Tag_CPU_raw_name remains blank.
10422 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
10424 const std::string cpu_name =
10425 this->tag_cpu_name_value(out_attr[i].int_value());
10426 // FIXME: If we see an unknown CPU, this will be set
10427 // to "<unknown CPU n>", where n is the attribute value.
10428 // This is different from BFD, which leaves the name alone.
10429 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
10434 case elfcpp::Tag_ARM_ISA_use:
10435 case elfcpp::Tag_THUMB_ISA_use:
10436 case elfcpp::Tag_WMMX_arch:
10437 case elfcpp::Tag_Advanced_SIMD_arch:
10438 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10439 case elfcpp::Tag_ABI_FP_rounding:
10440 case elfcpp::Tag_ABI_FP_exceptions:
10441 case elfcpp::Tag_ABI_FP_user_exceptions:
10442 case elfcpp::Tag_ABI_FP_number_model:
10443 case elfcpp::Tag_VFP_HP_extension:
10444 case elfcpp::Tag_CPU_unaligned_access:
10445 case elfcpp::Tag_T2EE_use:
10446 case elfcpp::Tag_Virtualization_use:
10447 case elfcpp::Tag_MPextension_use:
10448 // Use the largest value specified.
10449 if (in_attr[i].int_value() > out_attr[i].int_value())
10450 out_attr[i].set_int_value(in_attr[i].int_value());
10453 case elfcpp::Tag_ABI_align8_preserved:
10454 case elfcpp::Tag_ABI_PCS_RO_data:
10455 // Use the smallest value specified.
10456 if (in_attr[i].int_value() < out_attr[i].int_value())
10457 out_attr[i].set_int_value(in_attr[i].int_value());
10460 case elfcpp::Tag_ABI_align8_needed:
10461 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
10462 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
10463 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
10466 // This error message should be enabled once all non-conforming
10467 // binaries in the toolchain have had the attributes set
10469 // gold_error(_("output 8-byte data alignment conflicts with %s"),
10473 case elfcpp::Tag_ABI_FP_denormal:
10474 case elfcpp::Tag_ABI_PCS_GOT_use:
10476 // These tags have 0 = don't care, 1 = strong requirement,
10477 // 2 = weak requirement.
10478 static const int order_021[3] = {0, 2, 1};
10480 // Use the "greatest" from the sequence 0, 2, 1, or the largest
10481 // value if greater than 2 (for future-proofing).
10482 if ((in_attr[i].int_value() > 2
10483 && in_attr[i].int_value() > out_attr[i].int_value())
10484 || (in_attr[i].int_value() <= 2
10485 && out_attr[i].int_value() <= 2
10486 && (order_021[in_attr[i].int_value()]
10487 > order_021[out_attr[i].int_value()])))
10488 out_attr[i].set_int_value(in_attr[i].int_value());
10492 case elfcpp::Tag_CPU_arch_profile:
10493 if (out_attr[i].int_value() != in_attr[i].int_value())
10495 // 0 will merge with anything.
10496 // 'A' and 'S' merge to 'A'.
10497 // 'R' and 'S' merge to 'R'.
10498 // 'M' and 'A|R|S' is an error.
10499 if (out_attr[i].int_value() == 0
10500 || (out_attr[i].int_value() == 'S'
10501 && (in_attr[i].int_value() == 'A'
10502 || in_attr[i].int_value() == 'R')))
10503 out_attr[i].set_int_value(in_attr[i].int_value());
10504 else if (in_attr[i].int_value() == 0
10505 || (in_attr[i].int_value() == 'S'
10506 && (out_attr[i].int_value() == 'A'
10507 || out_attr[i].int_value() == 'R')))
10509 else if (parameters->options().warn_mismatch())
10512 (_("conflicting architecture profiles %c/%c"),
10513 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
10514 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
10518 case elfcpp::Tag_VFP_arch:
10520 static const struct
10524 } vfp_versions[7] =
10535 // Values greater than 6 aren't defined, so just pick the
10537 if (in_attr[i].int_value() > 6
10538 && in_attr[i].int_value() > out_attr[i].int_value())
10540 *out_attr = *in_attr;
10543 // The output uses the superset of input features
10544 // (ISA version) and registers.
10545 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
10546 vfp_versions[out_attr[i].int_value()].ver);
10547 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
10548 vfp_versions[out_attr[i].int_value()].regs);
10549 // This assumes all possible supersets are also a valid
10552 for (newval = 6; newval > 0; newval--)
10554 if (regs == vfp_versions[newval].regs
10555 && ver == vfp_versions[newval].ver)
10558 out_attr[i].set_int_value(newval);
10561 case elfcpp::Tag_PCS_config:
10562 if (out_attr[i].int_value() == 0)
10563 out_attr[i].set_int_value(in_attr[i].int_value());
10564 else if (in_attr[i].int_value() != 0
10565 && out_attr[i].int_value() != 0
10566 && parameters->options().warn_mismatch())
10568 // It's sometimes ok to mix different configs, so this is only
10570 gold_warning(_("%s: conflicting platform configuration"), name);
10573 case elfcpp::Tag_ABI_PCS_R9_use:
10574 if (in_attr[i].int_value() != out_attr[i].int_value()
10575 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
10576 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused
10577 && parameters->options().warn_mismatch())
10579 gold_error(_("%s: conflicting use of R9"), name);
10581 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
10582 out_attr[i].set_int_value(in_attr[i].int_value());
10584 case elfcpp::Tag_ABI_PCS_RW_data:
10585 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10586 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
10587 != elfcpp::AEABI_R9_SB)
10588 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
10589 != elfcpp::AEABI_R9_unused)
10590 && parameters->options().warn_mismatch())
10592 gold_error(_("%s: SB relative addressing conflicts with use "
10596 // Use the smallest value specified.
10597 if (in_attr[i].int_value() < out_attr[i].int_value())
10598 out_attr[i].set_int_value(in_attr[i].int_value());
10600 case elfcpp::Tag_ABI_PCS_wchar_t:
10601 if (out_attr[i].int_value()
10602 && in_attr[i].int_value()
10603 && out_attr[i].int_value() != in_attr[i].int_value()
10604 && parameters->options().warn_mismatch()
10605 && parameters->options().wchar_size_warning())
10607 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10608 "use %u-byte wchar_t; use of wchar_t values "
10609 "across objects may fail"),
10610 name, in_attr[i].int_value(),
10611 out_attr[i].int_value());
10613 else if (in_attr[i].int_value() && !out_attr[i].int_value())
10614 out_attr[i].set_int_value(in_attr[i].int_value());
10616 case elfcpp::Tag_ABI_enum_size:
10617 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
10619 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
10620 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
10622 // The existing object is compatible with anything.
10623 // Use whatever requirements the new object has.
10624 out_attr[i].set_int_value(in_attr[i].int_value());
10626 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
10627 && out_attr[i].int_value() != in_attr[i].int_value()
10628 && parameters->options().warn_mismatch()
10629 && parameters->options().enum_size_warning())
10631 unsigned int in_value = in_attr[i].int_value();
10632 unsigned int out_value = out_attr[i].int_value();
10633 gold_warning(_("%s uses %s enums yet the output is to use "
10634 "%s enums; use of enum values across objects "
10637 this->aeabi_enum_name(in_value).c_str(),
10638 this->aeabi_enum_name(out_value).c_str());
10642 case elfcpp::Tag_ABI_VFP_args:
10645 case elfcpp::Tag_ABI_WMMX_args:
10646 if (in_attr[i].int_value() != out_attr[i].int_value()
10647 && parameters->options().warn_mismatch())
10649 gold_error(_("%s uses iWMMXt register arguments, output does "
10654 case Object_attribute::Tag_compatibility:
10655 // Merged in target-independent code.
10657 case elfcpp::Tag_ABI_HardFP_use:
10658 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10659 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
10660 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
10661 out_attr[i].set_int_value(3);
10662 else if (in_attr[i].int_value() > out_attr[i].int_value())
10663 out_attr[i].set_int_value(in_attr[i].int_value());
10665 case elfcpp::Tag_ABI_FP_16bit_format:
10666 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
10668 if (in_attr[i].int_value() != out_attr[i].int_value()
10669 && parameters->options().warn_mismatch())
10670 gold_error(_("fp16 format mismatch between %s and output"),
10673 if (in_attr[i].int_value() != 0)
10674 out_attr[i].set_int_value(in_attr[i].int_value());
10677 case elfcpp::Tag_DIV_use:
10678 // This tag is set to zero if we can use UDIV and SDIV in Thumb
10679 // mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10680 // SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10681 // CPU. We will merge as follows: If the input attribute's value
10682 // is one then the output attribute's value remains unchanged. If
10683 // the input attribute's value is zero or two then if the output
10684 // attribute's value is one the output value is set to the input
10685 // value, otherwise the output value must be the same as the
10687 if (in_attr[i].int_value() != 1 && out_attr[i].int_value() != 1)
10689 if (in_attr[i].int_value() != out_attr[i].int_value())
10691 gold_error(_("DIV usage mismatch between %s and output"),
10696 if (in_attr[i].int_value() != 1)
10697 out_attr[i].set_int_value(in_attr[i].int_value());
10701 case elfcpp::Tag_MPextension_use_legacy:
10702 // We don't output objects with Tag_MPextension_use_legacy - we
10703 // move the value to Tag_MPextension_use.
10704 if (in_attr[i].int_value() != 0
10705 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0)
10707 if (in_attr[elfcpp::Tag_MPextension_use].int_value()
10708 != in_attr[i].int_value())
10710 gold_error(_("%s has has both the current and legacy "
10711 "Tag_MPextension_use attributes"),
10716 if (in_attr[i].int_value()
10717 > out_attr[elfcpp::Tag_MPextension_use].int_value())
10718 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i];
10722 case elfcpp::Tag_nodefaults:
10723 // This tag is set if it exists, but the value is unused (and is
10724 // typically zero). We don't actually need to do anything here -
10725 // the merge happens automatically when the type flags are merged
10728 case elfcpp::Tag_also_compatible_with:
10729 // Already done in Tag_CPU_arch.
10731 case elfcpp::Tag_conformance:
10732 // Keep the attribute if it matches. Throw it away otherwise.
10733 // No attribute means no claim to conform.
10734 if (in_attr[i].string_value() != out_attr[i].string_value())
10735 out_attr[i].set_string_value("");
10740 const char* err_object = NULL;
10742 // The "known_obj_attributes" table does contain some undefined
10743 // attributes. Ensure that there are unused.
10744 if (out_attr[i].int_value() != 0
10745 || out_attr[i].string_value() != "")
10746 err_object = "output";
10747 else if (in_attr[i].int_value() != 0
10748 || in_attr[i].string_value() != "")
10751 if (err_object != NULL
10752 && parameters->options().warn_mismatch())
10754 // Attribute numbers >=64 (mod 128) can be safely ignored.
10755 if ((i & 127) < 64)
10756 gold_error(_("%s: unknown mandatory EABI object attribute "
10760 gold_warning(_("%s: unknown EABI object attribute %d"),
10764 // Only pass on attributes that match in both inputs.
10765 if (!in_attr[i].matches(out_attr[i]))
10767 out_attr[i].set_int_value(0);
10768 out_attr[i].set_string_value("");
10773 // If out_attr was copied from in_attr then it won't have a type yet.
10774 if (in_attr[i].type() && !out_attr[i].type())
10775 out_attr[i].set_type(in_attr[i].type());
10778 // Merge Tag_compatibility attributes and any common GNU ones.
10779 this->attributes_section_data_->merge(name, pasd);
10781 // Check for any attributes not known on ARM.
10782 typedef Vendor_object_attributes::Other_attributes Other_attributes;
10783 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
10784 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
10785 Other_attributes* out_other_attributes =
10786 this->attributes_section_data_->other_attributes(vendor);
10787 Other_attributes::iterator out_iter = out_other_attributes->begin();
10789 while (in_iter != in_other_attributes->end()
10790 || out_iter != out_other_attributes->end())
10792 const char* err_object = NULL;
10795 // The tags for each list are in numerical order.
10796 // If the tags are equal, then merge.
10797 if (out_iter != out_other_attributes->end()
10798 && (in_iter == in_other_attributes->end()
10799 || in_iter->first > out_iter->first))
10801 // This attribute only exists in output. We can't merge, and we
10802 // don't know what the tag means, so delete it.
10803 err_object = "output";
10804 err_tag = out_iter->first;
10805 int saved_tag = out_iter->first;
10806 delete out_iter->second;
10807 out_other_attributes->erase(out_iter);
10808 out_iter = out_other_attributes->upper_bound(saved_tag);
10810 else if (in_iter != in_other_attributes->end()
10811 && (out_iter != out_other_attributes->end()
10812 || in_iter->first < out_iter->first))
10814 // This attribute only exists in input. We can't merge, and we
10815 // don't know what the tag means, so ignore it.
10817 err_tag = in_iter->first;
10820 else // The tags are equal.
10822 // As present, all attributes in the list are unknown, and
10823 // therefore can't be merged meaningfully.
10824 err_object = "output";
10825 err_tag = out_iter->first;
10827 // Only pass on attributes that match in both inputs.
10828 if (!in_iter->second->matches(*(out_iter->second)))
10830 // No match. Delete the attribute.
10831 int saved_tag = out_iter->first;
10832 delete out_iter->second;
10833 out_other_attributes->erase(out_iter);
10834 out_iter = out_other_attributes->upper_bound(saved_tag);
10838 // Matched. Keep the attribute and move to the next.
10844 if (err_object && parameters->options().warn_mismatch())
10846 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10847 if ((err_tag & 127) < 64)
10849 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10850 err_object, err_tag);
10854 gold_warning(_("%s: unknown EABI object attribute %d"),
10855 err_object, err_tag);
10861 // Stub-generation methods for Target_arm.
10863 // Make a new Arm_input_section object.
10865 template<bool big_endian>
10866 Arm_input_section<big_endian>*
10867 Target_arm<big_endian>::new_arm_input_section(
10869 unsigned int shndx)
10871 Section_id sid(relobj, shndx);
10873 Arm_input_section<big_endian>* arm_input_section =
10874 new Arm_input_section<big_endian>(relobj, shndx);
10875 arm_input_section->init();
10877 // Register new Arm_input_section in map for look-up.
10878 std::pair<typename Arm_input_section_map::iterator, bool> ins =
10879 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
10881 // Make sure that it we have not created another Arm_input_section
10882 // for this input section already.
10883 gold_assert(ins.second);
10885 return arm_input_section;
10888 // Find the Arm_input_section object corresponding to the SHNDX-th input
10889 // section of RELOBJ.
10891 template<bool big_endian>
10892 Arm_input_section<big_endian>*
10893 Target_arm<big_endian>::find_arm_input_section(
10895 unsigned int shndx) const
10897 Section_id sid(relobj, shndx);
10898 typename Arm_input_section_map::const_iterator p =
10899 this->arm_input_section_map_.find(sid);
10900 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
10903 // Make a new stub table.
10905 template<bool big_endian>
10906 Stub_table<big_endian>*
10907 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
10909 Stub_table<big_endian>* stub_table =
10910 new Stub_table<big_endian>(owner);
10911 this->stub_tables_.push_back(stub_table);
10913 stub_table->set_address(owner->address() + owner->data_size());
10914 stub_table->set_file_offset(owner->offset() + owner->data_size());
10915 stub_table->finalize_data_size();
10920 // Scan a relocation for stub generation.
10922 template<bool big_endian>
10924 Target_arm<big_endian>::scan_reloc_for_stub(
10925 const Relocate_info<32, big_endian>* relinfo,
10926 unsigned int r_type,
10927 const Sized_symbol<32>* gsym,
10928 unsigned int r_sym,
10929 const Symbol_value<32>* psymval,
10930 elfcpp::Elf_types<32>::Elf_Swxword addend,
10931 Arm_address address)
10933 typedef typename Target_arm<big_endian>::Relocate Relocate;
10935 const Arm_relobj<big_endian>* arm_relobj =
10936 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
10938 bool target_is_thumb;
10939 Symbol_value<32> symval;
10942 // This is a global symbol. Determine if we use PLT and if the
10943 // final target is THUMB.
10944 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
10946 // This uses a PLT, change the symbol value.
10947 symval.set_output_value(this->plt_section()->address()
10948 + gsym->plt_offset());
10950 target_is_thumb = false;
10952 else if (gsym->is_undefined())
10953 // There is no need to generate a stub symbol is undefined.
10958 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
10959 || (gsym->type() == elfcpp::STT_FUNC
10960 && !gsym->is_undefined()
10961 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
10966 // This is a local symbol. Determine if the final target is THUMB.
10967 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
10970 // Strip LSB if this points to a THUMB target.
10971 const Arm_reloc_property* reloc_property =
10972 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10973 gold_assert(reloc_property != NULL);
10974 if (target_is_thumb
10975 && reloc_property->uses_thumb_bit()
10976 && ((psymval->value(arm_relobj, 0) & 1) != 0))
10978 Arm_address stripped_value =
10979 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
10980 symval.set_output_value(stripped_value);
10984 // Get the symbol value.
10985 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
10987 // Owing to pipelining, the PC relative branches below actually skip
10988 // two instructions when the branch offset is 0.
10989 Arm_address destination;
10992 case elfcpp::R_ARM_CALL:
10993 case elfcpp::R_ARM_JUMP24:
10994 case elfcpp::R_ARM_PLT32:
10996 destination = value + addend + 8;
10998 case elfcpp::R_ARM_THM_CALL:
10999 case elfcpp::R_ARM_THM_XPC22:
11000 case elfcpp::R_ARM_THM_JUMP24:
11001 case elfcpp::R_ARM_THM_JUMP19:
11003 destination = value + addend + 4;
11006 gold_unreachable();
11009 Reloc_stub* stub = NULL;
11010 Stub_type stub_type =
11011 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
11013 if (stub_type != arm_stub_none)
11015 // Try looking up an existing stub from a stub table.
11016 Stub_table<big_endian>* stub_table =
11017 arm_relobj->stub_table(relinfo->data_shndx);
11018 gold_assert(stub_table != NULL);
11020 // Locate stub by destination.
11021 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
11023 // Create a stub if there is not one already
11024 stub = stub_table->find_reloc_stub(stub_key);
11027 // create a new stub and add it to stub table.
11028 stub = this->stub_factory().make_reloc_stub(stub_type);
11029 stub_table->add_reloc_stub(stub, stub_key);
11032 // Record the destination address.
11033 stub->set_destination_address(destination
11034 | (target_is_thumb ? 1 : 0));
11037 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11038 if (this->fix_cortex_a8_
11039 && (r_type == elfcpp::R_ARM_THM_JUMP24
11040 || r_type == elfcpp::R_ARM_THM_JUMP19
11041 || r_type == elfcpp::R_ARM_THM_CALL
11042 || r_type == elfcpp::R_ARM_THM_XPC22)
11043 && (address & 0xfffU) == 0xffeU)
11045 // Found a candidate. Note we haven't checked the destination is
11046 // within 4K here: if we do so (and don't create a record) we can't
11047 // tell that a branch should have been relocated when scanning later.
11048 this->cortex_a8_relocs_info_[address] =
11049 new Cortex_a8_reloc(stub, r_type,
11050 destination | (target_is_thumb ? 1 : 0));
11054 // This function scans a relocation sections for stub generation.
11055 // The template parameter Relocate must be a class type which provides
11056 // a single function, relocate(), which implements the machine
11057 // specific part of a relocation.
11059 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11060 // SHT_REL or SHT_RELA.
11062 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11063 // of relocs. OUTPUT_SECTION is the output section.
11064 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11065 // mapped to output offsets.
11067 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11068 // VIEW_SIZE is the size. These refer to the input section, unless
11069 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11070 // the output section.
11072 template<bool big_endian>
11073 template<int sh_type>
11075 Target_arm<big_endian>::scan_reloc_section_for_stubs(
11076 const Relocate_info<32, big_endian>* relinfo,
11077 const unsigned char* prelocs,
11078 size_t reloc_count,
11079 Output_section* output_section,
11080 bool needs_special_offset_handling,
11081 const unsigned char* view,
11082 elfcpp::Elf_types<32>::Elf_Addr view_address,
11085 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
11086 const int reloc_size =
11087 Reloc_types<sh_type, 32, big_endian>::reloc_size;
11089 Arm_relobj<big_endian>* arm_object =
11090 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11091 unsigned int local_count = arm_object->local_symbol_count();
11093 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
11095 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
11097 Reltype reloc(prelocs);
11099 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
11100 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
11101 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
11103 r_type = this->get_real_reloc_type(r_type);
11105 // Only a few relocation types need stubs.
11106 if ((r_type != elfcpp::R_ARM_CALL)
11107 && (r_type != elfcpp::R_ARM_JUMP24)
11108 && (r_type != elfcpp::R_ARM_PLT32)
11109 && (r_type != elfcpp::R_ARM_THM_CALL)
11110 && (r_type != elfcpp::R_ARM_THM_XPC22)
11111 && (r_type != elfcpp::R_ARM_THM_JUMP24)
11112 && (r_type != elfcpp::R_ARM_THM_JUMP19)
11113 && (r_type != elfcpp::R_ARM_V4BX))
11116 section_offset_type offset =
11117 convert_to_section_size_type(reloc.get_r_offset());
11119 if (needs_special_offset_handling)
11121 offset = output_section->output_offset(relinfo->object,
11122 relinfo->data_shndx,
11128 // Create a v4bx stub if --fix-v4bx-interworking is used.
11129 if (r_type == elfcpp::R_ARM_V4BX)
11131 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING)
11133 // Get the BX instruction.
11134 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
11135 const Valtype* wv =
11136 reinterpret_cast<const Valtype*>(view + offset);
11137 elfcpp::Elf_types<32>::Elf_Swxword insn =
11138 elfcpp::Swap<32, big_endian>::readval(wv);
11139 const uint32_t reg = (insn & 0xf);
11143 // Try looking up an existing stub from a stub table.
11144 Stub_table<big_endian>* stub_table =
11145 arm_object->stub_table(relinfo->data_shndx);
11146 gold_assert(stub_table != NULL);
11148 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
11150 // create a new stub and add it to stub table.
11151 Arm_v4bx_stub* stub =
11152 this->stub_factory().make_arm_v4bx_stub(reg);
11153 gold_assert(stub != NULL);
11154 stub_table->add_arm_v4bx_stub(stub);
11162 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
11163 elfcpp::Elf_types<32>::Elf_Swxword addend =
11164 stub_addend_reader(r_type, view + offset, reloc);
11166 const Sized_symbol<32>* sym;
11168 Symbol_value<32> symval;
11169 const Symbol_value<32> *psymval;
11170 bool is_defined_in_discarded_section;
11171 unsigned int shndx;
11172 if (r_sym < local_count)
11175 psymval = arm_object->local_symbol(r_sym);
11177 // If the local symbol belongs to a section we are discarding,
11178 // and that section is a debug section, try to find the
11179 // corresponding kept section and map this symbol to its
11180 // counterpart in the kept section. The symbol must not
11181 // correspond to a section we are folding.
11183 shndx = psymval->input_shndx(&is_ordinary);
11184 is_defined_in_discarded_section =
11186 && shndx != elfcpp::SHN_UNDEF
11187 && !arm_object->is_section_included(shndx)
11188 && !relinfo->symtab->is_section_folded(arm_object, shndx));
11190 // We need to compute the would-be final value of this local
11192 if (!is_defined_in_discarded_section)
11194 typedef Sized_relobj_file<32, big_endian> ObjType;
11195 typename ObjType::Compute_final_local_value_status status =
11196 arm_object->compute_final_local_value(r_sym, psymval, &symval,
11198 if (status == ObjType::CFLV_OK)
11200 // Currently we cannot handle a branch to a target in
11201 // a merged section. If this is the case, issue an error
11202 // and also free the merge symbol value.
11203 if (!symval.has_output_value())
11205 const std::string& section_name =
11206 arm_object->section_name(shndx);
11207 arm_object->error(_("cannot handle branch to local %u "
11208 "in a merged section %s"),
11209 r_sym, section_name.c_str());
11215 // We cannot determine the final value.
11222 const Symbol* gsym;
11223 gsym = arm_object->global_symbol(r_sym);
11224 gold_assert(gsym != NULL);
11225 if (gsym->is_forwarder())
11226 gsym = relinfo->symtab->resolve_forwards(gsym);
11228 sym = static_cast<const Sized_symbol<32>*>(gsym);
11229 if (sym->has_symtab_index() && sym->symtab_index() != -1U)
11230 symval.set_output_symtab_index(sym->symtab_index());
11232 symval.set_no_output_symtab_entry();
11234 // We need to compute the would-be final value of this global
11236 const Symbol_table* symtab = relinfo->symtab;
11237 const Sized_symbol<32>* sized_symbol =
11238 symtab->get_sized_symbol<32>(gsym);
11239 Symbol_table::Compute_final_value_status status;
11240 Arm_address value =
11241 symtab->compute_final_value<32>(sized_symbol, &status);
11243 // Skip this if the symbol has not output section.
11244 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
11246 symval.set_output_value(value);
11248 if (gsym->type() == elfcpp::STT_TLS)
11249 symval.set_is_tls_symbol();
11250 else if (gsym->type() == elfcpp::STT_GNU_IFUNC)
11251 symval.set_is_ifunc_symbol();
11254 is_defined_in_discarded_section =
11255 (gsym->is_defined_in_discarded_section()
11256 && gsym->is_undefined());
11260 Symbol_value<32> symval2;
11261 if (is_defined_in_discarded_section)
11263 if (comdat_behavior == CB_UNDETERMINED)
11265 std::string name = arm_object->section_name(relinfo->data_shndx);
11266 comdat_behavior = get_comdat_behavior(name.c_str());
11268 if (comdat_behavior == CB_PRETEND)
11270 // FIXME: This case does not work for global symbols.
11271 // We have no place to store the original section index.
11272 // Fortunately this does not matter for comdat sections,
11273 // only for sections explicitly discarded by a linker
11276 typename elfcpp::Elf_types<32>::Elf_Addr value =
11277 arm_object->map_to_kept_section(shndx, &found);
11279 symval2.set_output_value(value + psymval->input_value());
11281 symval2.set_output_value(0);
11285 if (comdat_behavior == CB_WARNING)
11286 gold_warning_at_location(relinfo, i, offset,
11287 _("relocation refers to discarded "
11289 symval2.set_output_value(0);
11291 symval2.set_no_output_symtab_entry();
11292 psymval = &symval2;
11295 // If symbol is a section symbol, we don't know the actual type of
11296 // destination. Give up.
11297 if (psymval->is_section_symbol())
11300 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
11301 addend, view_address + offset);
11305 // Scan an input section for stub generation.
11307 template<bool big_endian>
11309 Target_arm<big_endian>::scan_section_for_stubs(
11310 const Relocate_info<32, big_endian>* relinfo,
11311 unsigned int sh_type,
11312 const unsigned char* prelocs,
11313 size_t reloc_count,
11314 Output_section* output_section,
11315 bool needs_special_offset_handling,
11316 const unsigned char* view,
11317 Arm_address view_address,
11318 section_size_type view_size)
11320 if (sh_type == elfcpp::SHT_REL)
11321 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
11326 needs_special_offset_handling,
11330 else if (sh_type == elfcpp::SHT_RELA)
11331 // We do not support RELA type relocations yet. This is provided for
11333 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
11338 needs_special_offset_handling,
11343 gold_unreachable();
11346 // Group input sections for stub generation.
11348 // We group input sections in an output section so that the total size,
11349 // including any padding space due to alignment is smaller than GROUP_SIZE
11350 // unless the only input section in group is bigger than GROUP_SIZE already.
11351 // Then an ARM stub table is created to follow the last input section
11352 // in group. For each group an ARM stub table is created an is placed
11353 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11354 // extend the group after the stub table.
11356 template<bool big_endian>
11358 Target_arm<big_endian>::group_sections(
11360 section_size_type group_size,
11361 bool stubs_always_after_branch,
11364 // Group input sections and insert stub table
11365 Layout::Section_list section_list;
11366 layout->get_allocated_sections(§ion_list);
11367 for (Layout::Section_list::const_iterator p = section_list.begin();
11368 p != section_list.end();
11371 Arm_output_section<big_endian>* output_section =
11372 Arm_output_section<big_endian>::as_arm_output_section(*p);
11373 output_section->group_sections(group_size, stubs_always_after_branch,
11378 // Relaxation hook. This is where we do stub generation.
11380 template<bool big_endian>
11382 Target_arm<big_endian>::do_relax(
11384 const Input_objects* input_objects,
11385 Symbol_table* symtab,
11389 // No need to generate stubs if this is a relocatable link.
11390 gold_assert(!parameters->options().relocatable());
11392 // If this is the first pass, we need to group input sections into
11394 bool done_exidx_fixup = false;
11395 typedef typename Stub_table_list::iterator Stub_table_iterator;
11398 // Determine the stub group size. The group size is the absolute
11399 // value of the parameter --stub-group-size. If --stub-group-size
11400 // is passed a negative value, we restrict stubs to be always after
11401 // the stubbed branches.
11402 int32_t stub_group_size_param =
11403 parameters->options().stub_group_size();
11404 bool stubs_always_after_branch = stub_group_size_param < 0;
11405 section_size_type stub_group_size = abs(stub_group_size_param);
11407 if (stub_group_size == 1)
11410 // Thumb branch range is +-4MB has to be used as the default
11411 // maximum size (a given section can contain both ARM and Thumb
11412 // code, so the worst case has to be taken into account). If we are
11413 // fixing cortex-a8 errata, the branch range has to be even smaller,
11414 // since wide conditional branch has a range of +-1MB only.
11416 // This value is 48K less than that, which allows for 4096
11417 // 12-byte stubs. If we exceed that, then we will fail to link.
11418 // The user will have to relink with an explicit group size
11420 stub_group_size = 4145152;
11423 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11424 // page as the first half of a 32-bit branch straddling two 4K pages.
11425 // This is a crude way of enforcing that. In addition, long conditional
11426 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11427 // erratum, limit the group size to (1M - 12k) to avoid unreachable
11428 // cortex-A8 stubs from long conditional branches.
11429 if (this->fix_cortex_a8_)
11431 stubs_always_after_branch = true;
11432 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12);
11433 stub_group_size = std::max(stub_group_size, cortex_a8_group_size);
11436 group_sections(layout, stub_group_size, stubs_always_after_branch, task);
11438 // Also fix .ARM.exidx section coverage.
11439 Arm_output_section<big_endian>* exidx_output_section = NULL;
11440 for (Layout::Section_list::const_iterator p =
11441 layout->section_list().begin();
11442 p != layout->section_list().end();
11444 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
11446 if (exidx_output_section == NULL)
11447 exidx_output_section =
11448 Arm_output_section<big_endian>::as_arm_output_section(*p);
11450 // We cannot handle this now.
11451 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11452 "non-relocatable link"),
11453 exidx_output_section->name(),
11457 if (exidx_output_section != NULL)
11459 this->fix_exidx_coverage(layout, input_objects, exidx_output_section,
11461 done_exidx_fixup = true;
11466 // If this is not the first pass, addresses and file offsets have
11467 // been reset at this point, set them here.
11468 for (Stub_table_iterator sp = this->stub_tables_.begin();
11469 sp != this->stub_tables_.end();
11472 Arm_input_section<big_endian>* owner = (*sp)->owner();
11473 off_t off = align_address(owner->original_size(),
11474 (*sp)->addralign());
11475 (*sp)->set_address_and_file_offset(owner->address() + off,
11476 owner->offset() + off);
11480 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
11481 // beginning of each relaxation pass, just blow away all the stubs.
11482 // Alternatively, we could selectively remove only the stubs and reloc
11483 // information for code sections that have moved since the last pass.
11484 // That would require more book-keeping.
11485 if (this->fix_cortex_a8_)
11487 // Clear all Cortex-A8 reloc information.
11488 for (typename Cortex_a8_relocs_info::const_iterator p =
11489 this->cortex_a8_relocs_info_.begin();
11490 p != this->cortex_a8_relocs_info_.end();
11493 this->cortex_a8_relocs_info_.clear();
11495 // Remove all Cortex-A8 stubs.
11496 for (Stub_table_iterator sp = this->stub_tables_.begin();
11497 sp != this->stub_tables_.end();
11499 (*sp)->remove_all_cortex_a8_stubs();
11502 // Scan relocs for relocation stubs
11503 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
11504 op != input_objects->relobj_end();
11507 Arm_relobj<big_endian>* arm_relobj =
11508 Arm_relobj<big_endian>::as_arm_relobj(*op);
11509 // Lock the object so we can read from it. This is only called
11510 // single-threaded from Layout::finalize, so it is OK to lock.
11511 Task_lock_obj<Object> tl(task, arm_relobj);
11512 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
11515 // Check all stub tables to see if any of them have their data sizes
11516 // or addresses alignments changed. These are the only things that
11518 bool any_stub_table_changed = false;
11519 Unordered_set<const Output_section*> sections_needing_adjustment;
11520 for (Stub_table_iterator sp = this->stub_tables_.begin();
11521 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
11524 if ((*sp)->update_data_size_and_addralign())
11526 // Update data size of stub table owner.
11527 Arm_input_section<big_endian>* owner = (*sp)->owner();
11528 uint64_t address = owner->address();
11529 off_t offset = owner->offset();
11530 owner->reset_address_and_file_offset();
11531 owner->set_address_and_file_offset(address, offset);
11533 sections_needing_adjustment.insert(owner->output_section());
11534 any_stub_table_changed = true;
11538 // Output_section_data::output_section() returns a const pointer but we
11539 // need to update output sections, so we record all output sections needing
11540 // update above and scan the sections here to find out what sections need
11542 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
11543 p != layout->section_list().end();
11546 if (sections_needing_adjustment.find(*p)
11547 != sections_needing_adjustment.end())
11548 (*p)->set_section_offsets_need_adjustment();
11551 // Stop relaxation if no EXIDX fix-up and no stub table change.
11552 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
11554 // Finalize the stubs in the last relaxation pass.
11555 if (!continue_relaxation)
11557 for (Stub_table_iterator sp = this->stub_tables_.begin();
11558 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
11560 (*sp)->finalize_stubs();
11562 // Update output local symbol counts of objects if necessary.
11563 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
11564 op != input_objects->relobj_end();
11567 Arm_relobj<big_endian>* arm_relobj =
11568 Arm_relobj<big_endian>::as_arm_relobj(*op);
11570 // Update output local symbol counts. We need to discard local
11571 // symbols defined in parts of input sections that are discarded by
11573 if (arm_relobj->output_local_symbol_count_needs_update())
11575 // We need to lock the object's file to update it.
11576 Task_lock_obj<Object> tl(task, arm_relobj);
11577 arm_relobj->update_output_local_symbol_count();
11582 return continue_relaxation;
11585 // Relocate a stub.
11587 template<bool big_endian>
11589 Target_arm<big_endian>::relocate_stub(
11591 const Relocate_info<32, big_endian>* relinfo,
11592 Output_section* output_section,
11593 unsigned char* view,
11594 Arm_address address,
11595 section_size_type view_size)
11598 const Stub_template* stub_template = stub->stub_template();
11599 for (size_t i = 0; i < stub_template->reloc_count(); i++)
11601 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
11602 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
11604 unsigned int r_type = insn->r_type();
11605 section_size_type reloc_offset = stub_template->reloc_offset(i);
11606 section_size_type reloc_size = insn->size();
11607 gold_assert(reloc_offset + reloc_size <= view_size);
11609 // This is the address of the stub destination.
11610 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
11611 Symbol_value<32> symval;
11612 symval.set_output_value(target);
11614 // Synthesize a fake reloc just in case. We don't have a symbol so
11616 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
11617 memset(reloc_buffer, 0, sizeof(reloc_buffer));
11618 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
11619 reloc_write.put_r_offset(reloc_offset);
11620 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
11621 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
11623 relocate.relocate(relinfo, this, output_section,
11624 this->fake_relnum_for_stubs, rel, r_type,
11625 NULL, &symval, view + reloc_offset,
11626 address + reloc_offset, reloc_size);
11630 // Determine whether an object attribute tag takes an integer, a
11633 template<bool big_endian>
11635 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
11637 if (tag == Object_attribute::Tag_compatibility)
11638 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11639 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
11640 else if (tag == elfcpp::Tag_nodefaults)
11641 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11642 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
11643 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
11644 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
11646 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
11648 return ((tag & 1) != 0
11649 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11650 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
11653 // Reorder attributes.
11655 // The ABI defines that Tag_conformance should be emitted first, and that
11656 // Tag_nodefaults should be second (if either is defined). This sets those
11657 // two positions, and bumps up the position of all the remaining tags to
11660 template<bool big_endian>
11662 Target_arm<big_endian>::do_attributes_order(int num) const
11664 // Reorder the known object attributes in output. We want to move
11665 // Tag_conformance to position 4 and Tag_conformance to position 5
11666 // and shift everything between 4 .. Tag_conformance - 1 to make room.
11668 return elfcpp::Tag_conformance;
11670 return elfcpp::Tag_nodefaults;
11671 if ((num - 2) < elfcpp::Tag_nodefaults)
11673 if ((num - 1) < elfcpp::Tag_conformance)
11678 // Scan a span of THUMB code for Cortex-A8 erratum.
11680 template<bool big_endian>
11682 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
11683 Arm_relobj<big_endian>* arm_relobj,
11684 unsigned int shndx,
11685 section_size_type span_start,
11686 section_size_type span_end,
11687 const unsigned char* view,
11688 Arm_address address)
11690 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11692 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11693 // The branch target is in the same 4KB region as the
11694 // first half of the branch.
11695 // The instruction before the branch is a 32-bit
11696 // length non-branch instruction.
11697 section_size_type i = span_start;
11698 bool last_was_32bit = false;
11699 bool last_was_branch = false;
11700 while (i < span_end)
11702 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
11703 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
11704 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
11705 bool is_blx = false, is_b = false;
11706 bool is_bl = false, is_bcc = false;
11708 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
11711 // Load the rest of the insn (in manual-friendly order).
11712 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
11714 // Encoding T4: B<c>.W.
11715 is_b = (insn & 0xf800d000U) == 0xf0009000U;
11716 // Encoding T1: BL<c>.W.
11717 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
11718 // Encoding T2: BLX<c>.W.
11719 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
11720 // Encoding T3: B<c>.W (not permitted in IT block).
11721 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
11722 && (insn & 0x07f00000U) != 0x03800000U);
11725 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
11727 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11728 // page boundary and it follows 32-bit non-branch instruction,
11729 // we need to work around.
11730 if (is_32bit_branch
11731 && ((address + i) & 0xfffU) == 0xffeU
11733 && !last_was_branch)
11735 // Check to see if there is a relocation stub for this branch.
11736 bool force_target_arm = false;
11737 bool force_target_thumb = false;
11738 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
11739 Cortex_a8_relocs_info::const_iterator p =
11740 this->cortex_a8_relocs_info_.find(address + i);
11742 if (p != this->cortex_a8_relocs_info_.end())
11744 cortex_a8_reloc = p->second;
11745 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
11747 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
11748 && !target_is_thumb)
11749 force_target_arm = true;
11750 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
11751 && target_is_thumb)
11752 force_target_thumb = true;
11756 Stub_type stub_type = arm_stub_none;
11758 // Check if we have an offending branch instruction.
11759 uint16_t upper_insn = (insn >> 16) & 0xffffU;
11760 uint16_t lower_insn = insn & 0xffffU;
11761 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
11763 if (cortex_a8_reloc != NULL
11764 && cortex_a8_reloc->reloc_stub() != NULL)
11765 // We've already made a stub for this instruction, e.g.
11766 // it's a long branch or a Thumb->ARM stub. Assume that
11767 // stub will suffice to work around the A8 erratum (see
11768 // setting of always_after_branch above).
11772 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
11774 stub_type = arm_stub_a8_veneer_b_cond;
11776 else if (is_b || is_bl || is_blx)
11778 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
11783 stub_type = (is_blx
11784 ? arm_stub_a8_veneer_blx
11786 ? arm_stub_a8_veneer_bl
11787 : arm_stub_a8_veneer_b));
11790 if (stub_type != arm_stub_none)
11792 Arm_address pc_for_insn = address + i + 4;
11794 // The original instruction is a BL, but the target is
11795 // an ARM instruction. If we were not making a stub,
11796 // the BL would have been converted to a BLX. Use the
11797 // BLX stub instead in that case.
11798 if (this->may_use_blx() && force_target_arm
11799 && stub_type == arm_stub_a8_veneer_bl)
11801 stub_type = arm_stub_a8_veneer_blx;
11805 // Conversely, if the original instruction was
11806 // BLX but the target is Thumb mode, use the BL stub.
11807 else if (force_target_thumb
11808 && stub_type == arm_stub_a8_veneer_blx)
11810 stub_type = arm_stub_a8_veneer_bl;
11818 // If we found a relocation, use the proper destination,
11819 // not the offset in the (unrelocated) instruction.
11820 // Note this is always done if we switched the stub type above.
11821 if (cortex_a8_reloc != NULL)
11822 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
11824 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
11826 // Add a new stub if destination address in in the same page.
11827 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
11829 Cortex_a8_stub* stub =
11830 this->stub_factory_.make_cortex_a8_stub(stub_type,
11834 Stub_table<big_endian>* stub_table =
11835 arm_relobj->stub_table(shndx);
11836 gold_assert(stub_table != NULL);
11837 stub_table->add_cortex_a8_stub(address + i, stub);
11842 i += insn_32bit ? 4 : 2;
11843 last_was_32bit = insn_32bit;
11844 last_was_branch = is_32bit_branch;
11848 // Apply the Cortex-A8 workaround.
11850 template<bool big_endian>
11852 Target_arm<big_endian>::apply_cortex_a8_workaround(
11853 const Cortex_a8_stub* stub,
11854 Arm_address stub_address,
11855 unsigned char* insn_view,
11856 Arm_address insn_address)
11858 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
11859 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
11860 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
11861 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
11862 off_t branch_offset = stub_address - (insn_address + 4);
11864 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
11865 switch (stub->stub_template()->type())
11867 case arm_stub_a8_veneer_b_cond:
11868 // For a conditional branch, we re-write it to be an unconditional
11869 // branch to the stub. We use the THUMB-2 encoding here.
11870 upper_insn = 0xf000U;
11871 lower_insn = 0xb800U;
11873 case arm_stub_a8_veneer_b:
11874 case arm_stub_a8_veneer_bl:
11875 case arm_stub_a8_veneer_blx:
11876 if ((lower_insn & 0x5000U) == 0x4000U)
11877 // For a BLX instruction, make sure that the relocation is
11878 // rounded up to a word boundary. This follows the semantics of
11879 // the instruction which specifies that bit 1 of the target
11880 // address will come from bit 1 of the base address.
11881 branch_offset = (branch_offset + 2) & ~3;
11883 // Put BRANCH_OFFSET back into the insn.
11884 gold_assert(!utils::has_overflow<25>(branch_offset));
11885 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
11886 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
11890 gold_unreachable();
11893 // Put the relocated value back in the object file:
11894 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
11895 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
11898 template<bool big_endian>
11899 class Target_selector_arm : public Target_selector
11902 Target_selector_arm()
11903 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
11904 (big_endian ? "elf32-bigarm" : "elf32-littlearm"))
11908 do_instantiate_target()
11909 { return new Target_arm<big_endian>(); }
11912 // Fix .ARM.exidx section coverage.
11914 template<bool big_endian>
11916 Target_arm<big_endian>::fix_exidx_coverage(
11918 const Input_objects* input_objects,
11919 Arm_output_section<big_endian>* exidx_section,
11920 Symbol_table* symtab,
11923 // We need to look at all the input sections in output in ascending
11924 // order of of output address. We do that by building a sorted list
11925 // of output sections by addresses. Then we looks at the output sections
11926 // in order. The input sections in an output section are already sorted
11927 // by addresses within the output section.
11929 typedef std::set<Output_section*, output_section_address_less_than>
11930 Sorted_output_section_list;
11931 Sorted_output_section_list sorted_output_sections;
11933 // Find out all the output sections of input sections pointed by
11934 // EXIDX input sections.
11935 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
11936 p != input_objects->relobj_end();
11939 Arm_relobj<big_endian>* arm_relobj =
11940 Arm_relobj<big_endian>::as_arm_relobj(*p);
11941 std::vector<unsigned int> shndx_list;
11942 arm_relobj->get_exidx_shndx_list(&shndx_list);
11943 for (size_t i = 0; i < shndx_list.size(); ++i)
11945 const Arm_exidx_input_section* exidx_input_section =
11946 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]);
11947 gold_assert(exidx_input_section != NULL);
11948 if (!exidx_input_section->has_errors())
11950 unsigned int text_shndx = exidx_input_section->link();
11951 Output_section* os = arm_relobj->output_section(text_shndx);
11952 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0)
11953 sorted_output_sections.insert(os);
11958 // Go over the output sections in ascending order of output addresses.
11959 typedef typename Arm_output_section<big_endian>::Text_section_list
11961 Text_section_list sorted_text_sections;
11962 for (typename Sorted_output_section_list::iterator p =
11963 sorted_output_sections.begin();
11964 p != sorted_output_sections.end();
11967 Arm_output_section<big_endian>* arm_output_section =
11968 Arm_output_section<big_endian>::as_arm_output_section(*p);
11969 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
11972 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab,
11973 merge_exidx_entries(), task);
11976 Target_selector_arm<false> target_selector_arm;
11977 Target_selector_arm<true> target_selector_armbe;
11979 } // End anonymous namespace.