1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
59 template<bool big_endian>
60 class Output_data_plt_arm;
62 template<bool big_endian>
65 template<bool big_endian>
66 class Arm_input_section;
68 class Arm_exidx_cantunwind;
70 class Arm_exidx_merged_section;
72 class Arm_exidx_fixup;
74 template<bool big_endian>
75 class Arm_output_section;
77 class Arm_exidx_input_section;
79 template<bool big_endian>
82 template<bool big_endian>
86 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
88 // Maximum branch offsets for ARM, THUMB and THUMB2.
89 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
90 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
91 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
92 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
93 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
94 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
96 // The arm target class.
98 // This is a very simple port of gold for ARM-EABI. It is intended for
99 // supporting Android only for the time being.
102 // - Support the following relocation types as needed:
104 // R_ARM_LDR_SBREL_11_0_NC
105 // R_ARM_ALU_SBREL_19_12_NC
106 // R_ARM_ALU_SBREL_27_20_CK
122 // - Make PLTs more flexible for different architecture features like
124 // There are probably a lot more.
126 // Instruction template class. This class is similar to the insn_sequence
127 // struct in bfd/elf32-arm.c.
132 // Types of instruction templates.
136 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
137 // templates with class-specific semantics. Currently this is used
138 // only by the Cortex_a8_stub class for handling condition codes in
139 // conditional branches.
140 THUMB16_SPECIAL_TYPE,
146 // Factory methods to create instruction templates in different formats.
148 static const Insn_template
149 thumb16_insn(uint32_t data)
150 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
152 // A Thumb conditional branch, in which the proper condition is inserted
153 // when we build the stub.
154 static const Insn_template
155 thumb16_bcond_insn(uint32_t data)
156 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
158 static const Insn_template
159 thumb32_insn(uint32_t data)
160 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
162 static const Insn_template
163 thumb32_b_insn(uint32_t data, int reloc_addend)
165 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
169 static const Insn_template
170 arm_insn(uint32_t data)
171 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
173 static const Insn_template
174 arm_rel_insn(unsigned data, int reloc_addend)
175 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
177 static const Insn_template
178 data_word(unsigned data, unsigned int r_type, int reloc_addend)
179 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
181 // Accessors. This class is used for read-only objects so no modifiers
186 { return this->data_; }
188 // Return the instruction sequence type of this.
191 { return this->type_; }
193 // Return the ARM relocation type of this.
196 { return this->r_type_; }
200 { return this->reloc_addend_; }
202 // Return size of instruction template in bytes.
206 // Return byte-alignment of instruction template.
211 // We make the constructor private to ensure that only the factory
214 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
215 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
218 // Instruction specific data. This is used to store information like
219 // some of the instruction bits.
221 // Instruction template type.
223 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
224 unsigned int r_type_;
225 // Relocation addend.
226 int32_t reloc_addend_;
229 // Macro for generating code to stub types. One entry per long/short
233 DEF_STUB(long_branch_any_any) \
234 DEF_STUB(long_branch_v4t_arm_thumb) \
235 DEF_STUB(long_branch_thumb_only) \
236 DEF_STUB(long_branch_v4t_thumb_thumb) \
237 DEF_STUB(long_branch_v4t_thumb_arm) \
238 DEF_STUB(short_branch_v4t_thumb_arm) \
239 DEF_STUB(long_branch_any_arm_pic) \
240 DEF_STUB(long_branch_any_thumb_pic) \
241 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
242 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
243 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
244 DEF_STUB(long_branch_thumb_only_pic) \
245 DEF_STUB(a8_veneer_b_cond) \
246 DEF_STUB(a8_veneer_b) \
247 DEF_STUB(a8_veneer_bl) \
248 DEF_STUB(a8_veneer_blx) \
249 DEF_STUB(v4_veneer_bx)
253 #define DEF_STUB(x) arm_stub_##x,
259 // First reloc stub type.
260 arm_stub_reloc_first = arm_stub_long_branch_any_any,
261 // Last reloc stub type.
262 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
264 // First Cortex-A8 stub type.
265 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
266 // Last Cortex-A8 stub type.
267 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
270 arm_stub_type_last = arm_stub_v4_veneer_bx
274 // Stub template class. Templates are meant to be read-only objects.
275 // A stub template for a stub type contains all read-only attributes
276 // common to all stubs of the same type.
281 Stub_template(Stub_type, const Insn_template*, size_t);
289 { return this->type_; }
291 // Return an array of instruction templates.
294 { return this->insns_; }
296 // Return size of template in number of instructions.
299 { return this->insn_count_; }
301 // Return size of template in bytes.
304 { return this->size_; }
306 // Return alignment of the stub template.
309 { return this->alignment_; }
311 // Return whether entry point is in thumb mode.
313 entry_in_thumb_mode() const
314 { return this->entry_in_thumb_mode_; }
316 // Return number of relocations in this template.
319 { return this->relocs_.size(); }
321 // Return index of the I-th instruction with relocation.
323 reloc_insn_index(size_t i) const
325 gold_assert(i < this->relocs_.size());
326 return this->relocs_[i].first;
329 // Return the offset of the I-th instruction with relocation from the
330 // beginning of the stub.
332 reloc_offset(size_t i) const
334 gold_assert(i < this->relocs_.size());
335 return this->relocs_[i].second;
339 // This contains information about an instruction template with a relocation
340 // and its offset from start of stub.
341 typedef std::pair<size_t, section_size_type> Reloc;
343 // A Stub_template may not be copied. We want to share templates as much
345 Stub_template(const Stub_template&);
346 Stub_template& operator=(const Stub_template&);
350 // Points to an array of Insn_templates.
351 const Insn_template* insns_;
352 // Number of Insn_templates in insns_[].
354 // Size of templated instructions in bytes.
356 // Alignment of templated instructions.
358 // Flag to indicate if entry is in thumb mode.
359 bool entry_in_thumb_mode_;
360 // A table of reloc instruction indices and offsets. We can find these by
361 // looking at the instruction templates but we pre-compute and then stash
362 // them here for speed.
363 std::vector<Reloc> relocs_;
367 // A class for code stubs. This is a base class for different type of
368 // stubs used in the ARM target.
374 static const section_offset_type invalid_offset =
375 static_cast<section_offset_type>(-1);
378 Stub(const Stub_template* stub_template)
379 : stub_template_(stub_template), offset_(invalid_offset)
386 // Return the stub template.
388 stub_template() const
389 { return this->stub_template_; }
391 // Return offset of code stub from beginning of its containing stub table.
395 gold_assert(this->offset_ != invalid_offset);
396 return this->offset_;
399 // Set offset of code stub from beginning of its containing stub table.
401 set_offset(section_offset_type offset)
402 { this->offset_ = offset; }
404 // Return the relocation target address of the i-th relocation in the
405 // stub. This must be defined in a child class.
407 reloc_target(size_t i)
408 { return this->do_reloc_target(i); }
410 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
412 write(unsigned char* view, section_size_type view_size, bool big_endian)
413 { this->do_write(view, view_size, big_endian); }
415 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
416 // for the i-th instruction.
418 thumb16_special(size_t i)
419 { return this->do_thumb16_special(i); }
422 // This must be defined in the child class.
424 do_reloc_target(size_t) = 0;
426 // This may be overridden in the child class.
428 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
431 this->do_fixed_endian_write<true>(view, view_size);
433 this->do_fixed_endian_write<false>(view, view_size);
436 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
437 // instruction template.
439 do_thumb16_special(size_t)
440 { gold_unreachable(); }
443 // A template to implement do_write.
444 template<bool big_endian>
446 do_fixed_endian_write(unsigned char*, section_size_type);
449 const Stub_template* stub_template_;
450 // Offset within the section of containing this stub.
451 section_offset_type offset_;
454 // Reloc stub class. These are stubs we use to fix up relocation because
455 // of limited branch ranges.
457 class Reloc_stub : public Stub
460 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
461 // We assume we never jump to this address.
462 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
464 // Return destination address.
466 destination_address() const
468 gold_assert(this->destination_address_ != this->invalid_address);
469 return this->destination_address_;
472 // Set destination address.
474 set_destination_address(Arm_address address)
476 gold_assert(address != this->invalid_address);
477 this->destination_address_ = address;
480 // Reset destination address.
482 reset_destination_address()
483 { this->destination_address_ = this->invalid_address; }
485 // Determine stub type for a branch of a relocation of R_TYPE going
486 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
487 // the branch target is a thumb instruction. TARGET is used for look
488 // up ARM-specific linker settings.
490 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
491 Arm_address branch_target, bool target_is_thumb);
493 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
494 // and an addend. Since we treat global and local symbol differently, we
495 // use a Symbol object for a global symbol and a object-index pair for
500 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
501 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
502 // and R_SYM must not be invalid_index.
503 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
504 unsigned int r_sym, int32_t addend)
505 : stub_type_(stub_type), addend_(addend)
509 this->r_sym_ = Reloc_stub::invalid_index;
510 this->u_.symbol = symbol;
514 gold_assert(relobj != NULL && r_sym != invalid_index);
515 this->r_sym_ = r_sym;
516 this->u_.relobj = relobj;
523 // Accessors: Keys are meant to be read-only object so no modifiers are
529 { return this->stub_type_; }
531 // Return the local symbol index or invalid_index.
534 { return this->r_sym_; }
536 // Return the symbol if there is one.
539 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
541 // Return the relobj if there is one.
544 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
546 // Whether this equals to another key k.
548 eq(const Key& k) const
550 return ((this->stub_type_ == k.stub_type_)
551 && (this->r_sym_ == k.r_sym_)
552 && ((this->r_sym_ != Reloc_stub::invalid_index)
553 ? (this->u_.relobj == k.u_.relobj)
554 : (this->u_.symbol == k.u_.symbol))
555 && (this->addend_ == k.addend_));
558 // Return a hash value.
562 return (this->stub_type_
564 ^ gold::string_hash<char>(
565 (this->r_sym_ != Reloc_stub::invalid_index)
566 ? this->u_.relobj->name().c_str()
567 : this->u_.symbol->name())
571 // Functors for STL associative containers.
575 operator()(const Key& k) const
576 { return k.hash_value(); }
582 operator()(const Key& k1, const Key& k2) const
583 { return k1.eq(k2); }
586 // Name of key. This is mainly for debugging.
592 Stub_type stub_type_;
593 // If this is a local symbol, this is the index in the defining object.
594 // Otherwise, it is invalid_index for a global symbol.
596 // If r_sym_ is invalid index. This points to a global symbol.
597 // Otherwise, this points a relobj. We used the unsized and target
598 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
599 // Arm_relobj. This is done to avoid making the stub class a template
600 // as most of the stub machinery is endianity-neutral. However, it
601 // may require a bit of casting done by users of this class.
604 const Symbol* symbol;
605 const Relobj* relobj;
607 // Addend associated with a reloc.
612 // Reloc_stubs are created via a stub factory. So these are protected.
613 Reloc_stub(const Stub_template* stub_template)
614 : Stub(stub_template), destination_address_(invalid_address)
620 friend class Stub_factory;
622 // Return the relocation target address of the i-th relocation in the
625 do_reloc_target(size_t i)
627 // All reloc stub have only one relocation.
629 return this->destination_address_;
633 // Address of destination.
634 Arm_address destination_address_;
637 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
638 // THUMB branch that meets the following conditions:
640 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
641 // branch address is 0xffe.
642 // 2. The branch target address is in the same page as the first word of the
644 // 3. The branch follows a 32-bit instruction which is not a branch.
646 // To do the fix up, we need to store the address of the branch instruction
647 // and its target at least. We also need to store the original branch
648 // instruction bits for the condition code in a conditional branch. The
649 // condition code is used in a special instruction template. We also want
650 // to identify input sections needing Cortex-A8 workaround quickly. We store
651 // extra information about object and section index of the code section
652 // containing a branch being fixed up. The information is used to mark
653 // the code section when we finalize the Cortex-A8 stubs.
656 class Cortex_a8_stub : public Stub
662 // Return the object of the code section containing the branch being fixed
666 { return this->relobj_; }
668 // Return the section index of the code section containing the branch being
672 { return this->shndx_; }
674 // Return the source address of stub. This is the address of the original
675 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
678 source_address() const
679 { return this->source_address_; }
681 // Return the destination address of the stub. This is the branch taken
682 // address of the original branch instruction. LSB is 1 if it is a THUMB
683 // instruction address.
685 destination_address() const
686 { return this->destination_address_; }
688 // Return the instruction being fixed up.
690 original_insn() const
691 { return this->original_insn_; }
694 // Cortex_a8_stubs are created via a stub factory. So these are protected.
695 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
696 unsigned int shndx, Arm_address source_address,
697 Arm_address destination_address, uint32_t original_insn)
698 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
699 source_address_(source_address | 1U),
700 destination_address_(destination_address),
701 original_insn_(original_insn)
704 friend class Stub_factory;
706 // Return the relocation target address of the i-th relocation in the
709 do_reloc_target(size_t i)
711 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
713 // The conditional branch veneer has two relocations.
715 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
719 // All other Cortex-A8 stubs have only one relocation.
721 return this->destination_address_;
725 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
727 do_thumb16_special(size_t);
730 // Object of the code section containing the branch being fixed up.
732 // Section index of the code section containing the branch begin fixed up.
734 // Source address of original branch.
735 Arm_address source_address_;
736 // Destination address of the original branch.
737 Arm_address destination_address_;
738 // Original branch instruction. This is needed for copying the condition
739 // code from a condition branch to its stub.
740 uint32_t original_insn_;
743 // ARMv4 BX Rx branch relocation stub class.
744 class Arm_v4bx_stub : public Stub
750 // Return the associated register.
753 { return this->reg_; }
756 // Arm V4BX stubs are created via a stub factory. So these are protected.
757 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
758 : Stub(stub_template), reg_(reg)
761 friend class Stub_factory;
763 // Return the relocation target address of the i-th relocation in the
766 do_reloc_target(size_t)
767 { gold_unreachable(); }
769 // This may be overridden in the child class.
771 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
774 this->do_fixed_endian_v4bx_write<true>(view, view_size);
776 this->do_fixed_endian_v4bx_write<false>(view, view_size);
780 // A template to implement do_write.
781 template<bool big_endian>
783 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
785 const Insn_template* insns = this->stub_template()->insns();
786 elfcpp::Swap<32, big_endian>::writeval(view,
788 + (this->reg_ << 16)));
789 view += insns[0].size();
790 elfcpp::Swap<32, big_endian>::writeval(view,
791 (insns[1].data() + this->reg_));
792 view += insns[1].size();
793 elfcpp::Swap<32, big_endian>::writeval(view,
794 (insns[2].data() + this->reg_));
797 // A register index (r0-r14), which is associated with the stub.
801 // Stub factory class.
806 // Return the unique instance of this class.
807 static const Stub_factory&
810 static Stub_factory singleton;
814 // Make a relocation stub.
816 make_reloc_stub(Stub_type stub_type) const
818 gold_assert(stub_type >= arm_stub_reloc_first
819 && stub_type <= arm_stub_reloc_last);
820 return new Reloc_stub(this->stub_templates_[stub_type]);
823 // Make a Cortex-A8 stub.
825 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
826 Arm_address source, Arm_address destination,
827 uint32_t original_insn) const
829 gold_assert(stub_type >= arm_stub_cortex_a8_first
830 && stub_type <= arm_stub_cortex_a8_last);
831 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
832 source, destination, original_insn);
835 // Make an ARM V4BX relocation stub.
836 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
838 make_arm_v4bx_stub(uint32_t reg) const
840 gold_assert(reg < 0xf);
841 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
846 // Constructor and destructor are protected since we only return a single
847 // instance created in Stub_factory::get_instance().
851 // A Stub_factory may not be copied since it is a singleton.
852 Stub_factory(const Stub_factory&);
853 Stub_factory& operator=(Stub_factory&);
855 // Stub templates. These are initialized in the constructor.
856 const Stub_template* stub_templates_[arm_stub_type_last+1];
859 // A class to hold stubs for the ARM target.
861 template<bool big_endian>
862 class Stub_table : public Output_data
865 Stub_table(Arm_input_section<big_endian>* owner)
866 : Output_data(), owner_(owner), reloc_stubs_(), cortex_a8_stubs_(),
867 arm_v4bx_stubs_(0xf), prev_data_size_(0), prev_addralign_(1)
873 // Owner of this stub table.
874 Arm_input_section<big_endian>*
876 { return this->owner_; }
878 // Whether this stub table is empty.
882 return (this->reloc_stubs_.empty()
883 && this->cortex_a8_stubs_.empty()
884 && this->arm_v4bx_stubs_.empty());
887 // Return the current data size.
889 current_data_size() const
890 { return this->current_data_size_for_child(); }
892 // Add a STUB with using KEY. Caller is reponsible for avoid adding
893 // if already a STUB with the same key has been added.
895 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
897 const Stub_template* stub_template = stub->stub_template();
898 gold_assert(stub_template->type() == key.stub_type());
899 this->reloc_stubs_[key] = stub;
902 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
903 // Caller is reponsible for avoid adding if already a STUB with the same
904 // address has been added.
906 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
908 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
909 this->cortex_a8_stubs_.insert(value);
912 // Add an ARM V4BX relocation stub. A register index will be retrieved
915 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
917 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
918 this->arm_v4bx_stubs_[stub->reg()] = stub;
921 // Remove all Cortex-A8 stubs.
923 remove_all_cortex_a8_stubs();
925 // Look up a relocation stub using KEY. Return NULL if there is none.
927 find_reloc_stub(const Reloc_stub::Key& key) const
929 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
930 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
933 // Look up an arm v4bx relocation stub using the register index.
934 // Return NULL if there is none.
936 find_arm_v4bx_stub(const uint32_t reg) const
938 gold_assert(reg < 0xf);
939 return this->arm_v4bx_stubs_[reg];
942 // Relocate stubs in this stub table.
944 relocate_stubs(const Relocate_info<32, big_endian>*,
945 Target_arm<big_endian>*, Output_section*,
946 unsigned char*, Arm_address, section_size_type);
948 // Update data size and alignment at the end of a relaxation pass. Return
949 // true if either data size or alignment is different from that of the
950 // previous relaxation pass.
952 update_data_size_and_addralign();
954 // Finalize stubs. Set the offsets of all stubs and mark input sections
955 // needing the Cortex-A8 workaround.
959 // Apply Cortex-A8 workaround to an address range.
961 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
962 unsigned char*, Arm_address,
966 // Write out section contents.
968 do_write(Output_file*);
970 // Return the required alignment.
973 { return this->prev_addralign_; }
975 // Reset address and file offset.
977 do_reset_address_and_file_offset()
978 { this->set_current_data_size_for_child(this->prev_data_size_); }
980 // Set final data size.
982 set_final_data_size()
983 { this->set_data_size(this->current_data_size()); }
986 // Relocate one stub.
988 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
989 Target_arm<big_endian>*, Output_section*,
990 unsigned char*, Arm_address, section_size_type);
992 // Unordered map of relocation stubs.
994 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
995 Reloc_stub::Key::equal_to>
998 // List of Cortex-A8 stubs ordered by addresses of branches being
999 // fixed up in output.
1000 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1001 // List of Arm V4BX relocation stubs ordered by associated registers.
1002 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1004 // Owner of this stub table.
1005 Arm_input_section<big_endian>* owner_;
1006 // The relocation stubs.
1007 Reloc_stub_map reloc_stubs_;
1008 // The cortex_a8_stubs.
1009 Cortex_a8_stub_list cortex_a8_stubs_;
1010 // The Arm V4BX relocation stubs.
1011 Arm_v4bx_stub_list arm_v4bx_stubs_;
1012 // data size of this in the previous pass.
1013 off_t prev_data_size_;
1014 // address alignment of this in the previous pass.
1015 uint64_t prev_addralign_;
1018 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1019 // we add to the end of an EXIDX input section that goes into the output.
1021 class Arm_exidx_cantunwind : public Output_section_data
1024 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1025 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1028 // Return the object containing the section pointed by this.
1031 { return this->relobj_; }
1033 // Return the section index of the section pointed by this.
1036 { return this->shndx_; }
1040 do_write(Output_file* of)
1042 if (parameters->target().is_big_endian())
1043 this->do_fixed_endian_write<true>(of);
1045 this->do_fixed_endian_write<false>(of);
1049 // Implement do_write for a given endianity.
1050 template<bool big_endian>
1052 do_fixed_endian_write(Output_file*);
1054 // The object containing the section pointed by this.
1056 // The section index of the section pointed by this.
1057 unsigned int shndx_;
1060 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1061 // Offset map is used to map input section offset within the EXIDX section
1062 // to the output offset from the start of this EXIDX section.
1064 typedef std::map<section_offset_type, section_offset_type>
1065 Arm_exidx_section_offset_map;
1067 // Arm_exidx_merged_section class. This represents an EXIDX input section
1068 // with some of its entries merged.
1070 class Arm_exidx_merged_section : public Output_relaxed_input_section
1073 // Constructor for Arm_exidx_merged_section.
1074 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1075 // SECTION_OFFSET_MAP points to a section offset map describing how
1076 // parts of the input section are mapped to output. DELETED_BYTES is
1077 // the number of bytes deleted from the EXIDX input section.
1078 Arm_exidx_merged_section(
1079 const Arm_exidx_input_section& exidx_input_section,
1080 const Arm_exidx_section_offset_map& section_offset_map,
1081 uint32_t deleted_bytes);
1083 // Return the original EXIDX input section.
1084 const Arm_exidx_input_section&
1085 exidx_input_section() const
1086 { return this->exidx_input_section_; }
1088 // Return the section offset map.
1089 const Arm_exidx_section_offset_map&
1090 section_offset_map() const
1091 { return this->section_offset_map_; }
1094 // Write merged section into file OF.
1096 do_write(Output_file* of);
1099 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1100 section_offset_type*) const;
1103 // Original EXIDX input section.
1104 const Arm_exidx_input_section& exidx_input_section_;
1105 // Section offset map.
1106 const Arm_exidx_section_offset_map& section_offset_map_;
1109 // A class to wrap an ordinary input section containing executable code.
1111 template<bool big_endian>
1112 class Arm_input_section : public Output_relaxed_input_section
1115 Arm_input_section(Relobj* relobj, unsigned int shndx)
1116 : Output_relaxed_input_section(relobj, shndx, 1),
1117 original_addralign_(1), original_size_(0), stub_table_(NULL)
1120 ~Arm_input_section()
1127 // Whether this is a stub table owner.
1129 is_stub_table_owner() const
1130 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1132 // Return the stub table.
1133 Stub_table<big_endian>*
1135 { return this->stub_table_; }
1137 // Set the stub_table.
1139 set_stub_table(Stub_table<big_endian>* stub_table)
1140 { this->stub_table_ = stub_table; }
1142 // Downcast a base pointer to an Arm_input_section pointer. This is
1143 // not type-safe but we only use Arm_input_section not the base class.
1144 static Arm_input_section<big_endian>*
1145 as_arm_input_section(Output_relaxed_input_section* poris)
1146 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1149 // Write data to output file.
1151 do_write(Output_file*);
1153 // Return required alignment of this.
1155 do_addralign() const
1157 if (this->is_stub_table_owner())
1158 return std::max(this->stub_table_->addralign(),
1159 this->original_addralign_);
1161 return this->original_addralign_;
1164 // Finalize data size.
1166 set_final_data_size();
1168 // Reset address and file offset.
1170 do_reset_address_and_file_offset();
1174 do_output_offset(const Relobj* object, unsigned int shndx,
1175 section_offset_type offset,
1176 section_offset_type* poutput) const
1178 if ((object == this->relobj())
1179 && (shndx == this->shndx())
1181 && (convert_types<uint64_t, section_offset_type>(offset)
1182 <= this->original_size_))
1192 // Copying is not allowed.
1193 Arm_input_section(const Arm_input_section&);
1194 Arm_input_section& operator=(const Arm_input_section&);
1196 // Address alignment of the original input section.
1197 uint64_t original_addralign_;
1198 // Section size of the original input section.
1199 uint64_t original_size_;
1201 Stub_table<big_endian>* stub_table_;
1204 // Arm_exidx_fixup class. This is used to define a number of methods
1205 // and keep states for fixing up EXIDX coverage.
1207 class Arm_exidx_fixup
1210 Arm_exidx_fixup(Output_section* exidx_output_section)
1211 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1212 last_inlined_entry_(0), last_input_section_(NULL),
1213 section_offset_map_(NULL), first_output_text_section_(NULL)
1217 { delete this->section_offset_map_; }
1219 // Process an EXIDX section for entry merging. Return number of bytes to
1220 // be deleted in output. If parts of the input EXIDX section are merged
1221 // a heap allocated Arm_exidx_section_offset_map is store in the located
1222 // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for
1224 template<bool big_endian>
1226 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1227 Arm_exidx_section_offset_map** psection_offset_map);
1229 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1230 // input section, if there is not one already.
1232 add_exidx_cantunwind_as_needed();
1234 // Return the output section for the text section which is linked to the
1235 // first exidx input in output.
1237 first_output_text_section() const
1238 { return this->first_output_text_section_; }
1241 // Copying is not allowed.
1242 Arm_exidx_fixup(const Arm_exidx_fixup&);
1243 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1245 // Type of EXIDX unwind entry.
1250 // EXIDX_CANTUNWIND.
1251 UT_EXIDX_CANTUNWIND,
1258 // Process an EXIDX entry. We only care about the second word of the
1259 // entry. Return true if the entry can be deleted.
1261 process_exidx_entry(uint32_t second_word);
1263 // Update the current section offset map during EXIDX section fix-up.
1264 // If there is no map, create one. INPUT_OFFSET is the offset of a
1265 // reference point, DELETED_BYTES is the number of deleted by in the
1266 // section so far. If DELETE_ENTRY is true, the reference point and
1267 // all offsets after the previous reference point are discarded.
1269 update_offset_map(section_offset_type input_offset,
1270 section_size_type deleted_bytes, bool delete_entry);
1272 // EXIDX output section.
1273 Output_section* exidx_output_section_;
1274 // Unwind type of the last EXIDX entry processed.
1275 Unwind_type last_unwind_type_;
1276 // Last seen inlined EXIDX entry.
1277 uint32_t last_inlined_entry_;
1278 // Last processed EXIDX input section.
1279 const Arm_exidx_input_section* last_input_section_;
1280 // Section offset map created in process_exidx_section.
1281 Arm_exidx_section_offset_map* section_offset_map_;
1282 // Output section for the text section which is linked to the first exidx
1284 Output_section* first_output_text_section_;
1287 // Arm output section class. This is defined mainly to add a number of
1288 // stub generation methods.
1290 template<bool big_endian>
1291 class Arm_output_section : public Output_section
1294 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1296 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1297 elfcpp::Elf_Xword flags)
1298 : Output_section(name, type, flags)
1301 ~Arm_output_section()
1304 // Group input sections for stub generation.
1306 group_sections(section_size_type, bool, Target_arm<big_endian>*);
1308 // Downcast a base pointer to an Arm_output_section pointer. This is
1309 // not type-safe but we only use Arm_output_section not the base class.
1310 static Arm_output_section<big_endian>*
1311 as_arm_output_section(Output_section* os)
1312 { return static_cast<Arm_output_section<big_endian>*>(os); }
1314 // Append all input text sections in this into LIST.
1316 append_text_sections_to_list(Text_section_list* list);
1318 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1319 // is a list of text input sections sorted in ascending order of their
1320 // output addresses.
1322 fix_exidx_coverage(const Text_section_list& sorted_text_section,
1323 Symbol_table* symtab);
1327 typedef Output_section::Input_section Input_section;
1328 typedef Output_section::Input_section_list Input_section_list;
1330 // Create a stub group.
1331 void create_stub_group(Input_section_list::const_iterator,
1332 Input_section_list::const_iterator,
1333 Input_section_list::const_iterator,
1334 Target_arm<big_endian>*,
1335 std::vector<Output_relaxed_input_section*>*);
1338 // Arm_exidx_input_section class. This represents an EXIDX input section.
1340 class Arm_exidx_input_section
1343 static const section_offset_type invalid_offset =
1344 static_cast<section_offset_type>(-1);
1346 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1347 unsigned int link, uint32_t size, uint32_t addralign)
1348 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1349 addralign_(addralign)
1352 ~Arm_exidx_input_section()
1355 // Accessors: This is a read-only class.
1357 // Return the object containing this EXIDX input section.
1360 { return this->relobj_; }
1362 // Return the section index of this EXIDX input section.
1365 { return this->shndx_; }
1367 // Return the section index of linked text section in the same object.
1370 { return this->link_; }
1372 // Return size of the EXIDX input section.
1375 { return this->size_; }
1377 // Reutnr address alignment of EXIDX input section.
1380 { return this->addralign_; }
1383 // Object containing this.
1385 // Section index of this.
1386 unsigned int shndx_;
1387 // text section linked to this in the same object.
1389 // Size of this. For ARM 32-bit is sufficient.
1391 // Address alignment of this. For ARM 32-bit is sufficient.
1392 uint32_t addralign_;
1395 // Arm_relobj class.
1397 template<bool big_endian>
1398 class Arm_relobj : public Sized_relobj<32, big_endian>
1401 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1403 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1404 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1405 : Sized_relobj<32, big_endian>(name, input_file, offset, ehdr),
1406 stub_tables_(), local_symbol_is_thumb_function_(),
1407 attributes_section_data_(NULL), mapping_symbols_info_(),
1408 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1409 output_local_symbol_count_needs_update_(false)
1413 { delete this->attributes_section_data_; }
1415 // Return the stub table of the SHNDX-th section if there is one.
1416 Stub_table<big_endian>*
1417 stub_table(unsigned int shndx) const
1419 gold_assert(shndx < this->stub_tables_.size());
1420 return this->stub_tables_[shndx];
1423 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1425 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1427 gold_assert(shndx < this->stub_tables_.size());
1428 this->stub_tables_[shndx] = stub_table;
1431 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1432 // index. This is only valid after do_count_local_symbol is called.
1434 local_symbol_is_thumb_function(unsigned int r_sym) const
1436 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1437 return this->local_symbol_is_thumb_function_[r_sym];
1440 // Scan all relocation sections for stub generation.
1442 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1445 // Convert regular input section with index SHNDX to a relaxed section.
1447 convert_input_section_to_relaxed_section(unsigned shndx)
1449 // The stubs have relocations and we need to process them after writing
1450 // out the stubs. So relocation now must follow section write.
1451 this->set_section_offset(shndx, -1ULL);
1452 this->set_relocs_must_follow_section_writes();
1455 // Downcast a base pointer to an Arm_relobj pointer. This is
1456 // not type-safe but we only use Arm_relobj not the base class.
1457 static Arm_relobj<big_endian>*
1458 as_arm_relobj(Relobj* relobj)
1459 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1461 // Processor-specific flags in ELF file header. This is valid only after
1464 processor_specific_flags() const
1465 { return this->processor_specific_flags_; }
1467 // Attribute section data This is the contents of the .ARM.attribute section
1469 const Attributes_section_data*
1470 attributes_section_data() const
1471 { return this->attributes_section_data_; }
1473 // Mapping symbol location.
1474 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1476 // Functor for STL container.
1477 struct Mapping_symbol_position_less
1480 operator()(const Mapping_symbol_position& p1,
1481 const Mapping_symbol_position& p2) const
1483 return (p1.first < p2.first
1484 || (p1.first == p2.first && p1.second < p2.second));
1488 // We only care about the first character of a mapping symbol, so
1489 // we only store that instead of the whole symbol name.
1490 typedef std::map<Mapping_symbol_position, char,
1491 Mapping_symbol_position_less> Mapping_symbols_info;
1493 // Whether a section contains any Cortex-A8 workaround.
1495 section_has_cortex_a8_workaround(unsigned int shndx) const
1497 return (this->section_has_cortex_a8_workaround_ != NULL
1498 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1501 // Mark a section that has Cortex-A8 workaround.
1503 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1505 if (this->section_has_cortex_a8_workaround_ == NULL)
1506 this->section_has_cortex_a8_workaround_ =
1507 new std::vector<bool>(this->shnum(), false);
1508 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1511 // Return the EXIDX section of an text section with index SHNDX or NULL
1512 // if the text section has no associated EXIDX section.
1513 const Arm_exidx_input_section*
1514 exidx_input_section_by_link(unsigned int shndx) const
1516 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1517 return ((p != this->exidx_section_map_.end()
1518 && p->second->link() == shndx)
1523 // Return the EXIDX section with index SHNDX or NULL if there is none.
1524 const Arm_exidx_input_section*
1525 exidx_input_section_by_shndx(unsigned shndx) const
1527 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1528 return ((p != this->exidx_section_map_.end()
1529 && p->second->shndx() == shndx)
1534 // Whether output local symbol count needs updating.
1536 output_local_symbol_count_needs_update() const
1537 { return this->output_local_symbol_count_needs_update_; }
1539 // Set output_local_symbol_count_needs_update flag to be true.
1541 set_output_local_symbol_count_needs_update()
1542 { this->output_local_symbol_count_needs_update_ = true; }
1544 // Update output local symbol count at the end of relaxation.
1546 update_output_local_symbol_count();
1549 // Post constructor setup.
1553 // Call parent's setup method.
1554 Sized_relobj<32, big_endian>::do_setup();
1556 // Initialize look-up tables.
1557 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1558 this->stub_tables_.swap(empty_stub_table_list);
1561 // Count the local symbols.
1563 do_count_local_symbols(Stringpool_template<char>*,
1564 Stringpool_template<char>*);
1567 do_relocate_sections(const Symbol_table* symtab, const Layout* layout,
1568 const unsigned char* pshdrs,
1569 typename Sized_relobj<32, big_endian>::Views* pivews);
1571 // Read the symbol information.
1573 do_read_symbols(Read_symbols_data* sd);
1575 // Process relocs for garbage collection.
1577 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1581 // Whether a section needs to be scanned for relocation stubs.
1583 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1584 const Relobj::Output_sections&,
1585 const Symbol_table *, const unsigned char*);
1587 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1589 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1590 unsigned int, Output_section*,
1591 const Symbol_table *);
1593 // Scan a section for the Cortex-A8 erratum.
1595 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1596 unsigned int, Output_section*,
1597 Target_arm<big_endian>*);
1599 // Make a new Arm_exidx_input_section object for EXIDX section with
1600 // index SHNDX and section header SHDR.
1602 make_exidx_input_section(unsigned int shndx,
1603 const elfcpp::Shdr<32, big_endian>& shdr);
1605 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1606 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1609 // List of stub tables.
1610 Stub_table_list stub_tables_;
1611 // Bit vector to tell if a local symbol is a thumb function or not.
1612 // This is only valid after do_count_local_symbol is called.
1613 std::vector<bool> local_symbol_is_thumb_function_;
1614 // processor-specific flags in ELF file header.
1615 elfcpp::Elf_Word processor_specific_flags_;
1616 // Object attributes if there is an .ARM.attributes section or NULL.
1617 Attributes_section_data* attributes_section_data_;
1618 // Mapping symbols information.
1619 Mapping_symbols_info mapping_symbols_info_;
1620 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1621 std::vector<bool>* section_has_cortex_a8_workaround_;
1622 // Map a text section to its associated .ARM.exidx section, if there is one.
1623 Exidx_section_map exidx_section_map_;
1624 // Whether output local symbol count needs updating.
1625 bool output_local_symbol_count_needs_update_;
1628 // Arm_dynobj class.
1630 template<bool big_endian>
1631 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1634 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1635 const elfcpp::Ehdr<32, big_endian>& ehdr)
1636 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1637 processor_specific_flags_(0), attributes_section_data_(NULL)
1641 { delete this->attributes_section_data_; }
1643 // Downcast a base pointer to an Arm_relobj pointer. This is
1644 // not type-safe but we only use Arm_relobj not the base class.
1645 static Arm_dynobj<big_endian>*
1646 as_arm_dynobj(Dynobj* dynobj)
1647 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1649 // Processor-specific flags in ELF file header. This is valid only after
1652 processor_specific_flags() const
1653 { return this->processor_specific_flags_; }
1655 // Attributes section data.
1656 const Attributes_section_data*
1657 attributes_section_data() const
1658 { return this->attributes_section_data_; }
1661 // Read the symbol information.
1663 do_read_symbols(Read_symbols_data* sd);
1666 // processor-specific flags in ELF file header.
1667 elfcpp::Elf_Word processor_specific_flags_;
1668 // Object attributes if there is an .ARM.attributes section or NULL.
1669 Attributes_section_data* attributes_section_data_;
1672 // Functor to read reloc addends during stub generation.
1674 template<int sh_type, bool big_endian>
1675 struct Stub_addend_reader
1677 // Return the addend for a relocation of a particular type. Depending
1678 // on whether this is a REL or RELA relocation, read the addend from a
1679 // view or from a Reloc object.
1680 elfcpp::Elf_types<32>::Elf_Swxword
1682 unsigned int /* r_type */,
1683 const unsigned char* /* view */,
1684 const typename Reloc_types<sh_type,
1685 32, big_endian>::Reloc& /* reloc */) const;
1688 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1690 template<bool big_endian>
1691 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1693 elfcpp::Elf_types<32>::Elf_Swxword
1696 const unsigned char*,
1697 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1700 // Specialized Stub_addend_reader for RELA type relocation sections.
1701 // We currently do not handle RELA type relocation sections but it is trivial
1702 // to implement the addend reader. This is provided for completeness and to
1703 // make it easier to add support for RELA relocation sections in the future.
1705 template<bool big_endian>
1706 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1708 elfcpp::Elf_types<32>::Elf_Swxword
1711 const unsigned char*,
1712 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1713 big_endian>::Reloc& reloc) const
1714 { return reloc.get_r_addend(); }
1717 // Cortex_a8_reloc class. We keep record of relocation that may need
1718 // the Cortex-A8 erratum workaround.
1720 class Cortex_a8_reloc
1723 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1724 Arm_address destination)
1725 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1731 // Accessors: This is a read-only class.
1733 // Return the relocation stub associated with this relocation if there is
1737 { return this->reloc_stub_; }
1739 // Return the relocation type.
1742 { return this->r_type_; }
1744 // Return the destination address of the relocation. LSB stores the THUMB
1748 { return this->destination_; }
1751 // Associated relocation stub if there is one, or NULL.
1752 const Reloc_stub* reloc_stub_;
1754 unsigned int r_type_;
1755 // Destination address of this relocation. LSB is used to distinguish
1757 Arm_address destination_;
1760 // Utilities for manipulating integers of up to 32-bits
1764 // Sign extend an n-bit unsigned integer stored in an uint32_t into
1765 // an int32_t. NO_BITS must be between 1 to 32.
1766 template<int no_bits>
1767 static inline int32_t
1768 sign_extend(uint32_t bits)
1770 gold_assert(no_bits >= 0 && no_bits <= 32);
1772 return static_cast<int32_t>(bits);
1773 uint32_t mask = (~((uint32_t) 0)) >> (32 - no_bits);
1775 uint32_t top_bit = 1U << (no_bits - 1);
1776 int32_t as_signed = static_cast<int32_t>(bits);
1777 return (bits & top_bit) ? as_signed + (-top_bit * 2) : as_signed;
1780 // Detects overflow of an NO_BITS integer stored in a uint32_t.
1781 template<int no_bits>
1783 has_overflow(uint32_t bits)
1785 gold_assert(no_bits >= 0 && no_bits <= 32);
1788 int32_t max = (1 << (no_bits - 1)) - 1;
1789 int32_t min = -(1 << (no_bits - 1));
1790 int32_t as_signed = static_cast<int32_t>(bits);
1791 return as_signed > max || as_signed < min;
1794 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
1795 // fits in the given number of bits as either a signed or unsigned value.
1796 // For example, has_signed_unsigned_overflow<8> would check
1797 // -128 <= bits <= 255
1798 template<int no_bits>
1800 has_signed_unsigned_overflow(uint32_t bits)
1802 gold_assert(no_bits >= 2 && no_bits <= 32);
1805 int32_t max = static_cast<int32_t>((1U << no_bits) - 1);
1806 int32_t min = -(1 << (no_bits - 1));
1807 int32_t as_signed = static_cast<int32_t>(bits);
1808 return as_signed > max || as_signed < min;
1811 // Select bits from A and B using bits in MASK. For each n in [0..31],
1812 // the n-th bit in the result is chosen from the n-th bits of A and B.
1813 // A zero selects A and a one selects B.
1814 static inline uint32_t
1815 bit_select(uint32_t a, uint32_t b, uint32_t mask)
1816 { return (a & ~mask) | (b & mask); }
1819 template<bool big_endian>
1820 class Target_arm : public Sized_target<32, big_endian>
1823 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
1826 // When were are relocating a stub, we pass this as the relocation number.
1827 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
1830 : Sized_target<32, big_endian>(&arm_info),
1831 got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL),
1832 copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL), stub_tables_(),
1833 stub_factory_(Stub_factory::get_instance()), may_use_blx_(false),
1834 should_force_pic_veneer_(false), arm_input_section_map_(),
1835 attributes_section_data_(NULL), fix_cortex_a8_(false),
1836 cortex_a8_relocs_info_()
1839 // Whether we can use BLX.
1842 { return this->may_use_blx_; }
1844 // Set use-BLX flag.
1846 set_may_use_blx(bool value)
1847 { this->may_use_blx_ = value; }
1849 // Whether we force PCI branch veneers.
1851 should_force_pic_veneer() const
1852 { return this->should_force_pic_veneer_; }
1854 // Set PIC veneer flag.
1856 set_should_force_pic_veneer(bool value)
1857 { this->should_force_pic_veneer_ = value; }
1859 // Whether we use THUMB-2 instructions.
1861 using_thumb2() const
1863 Object_attribute* attr =
1864 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1865 int arch = attr->int_value();
1866 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
1869 // Whether we use THUMB/THUMB-2 instructions only.
1871 using_thumb_only() const
1873 Object_attribute* attr =
1874 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1875 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
1876 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
1878 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
1879 return attr->int_value() == 'M';
1882 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
1884 may_use_arm_nop() const
1886 Object_attribute* attr =
1887 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1888 int arch = attr->int_value();
1889 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1890 || arch == elfcpp::TAG_CPU_ARCH_V6K
1891 || arch == elfcpp::TAG_CPU_ARCH_V7
1892 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1895 // Whether we have THUMB-2 NOP.W instruction.
1897 may_use_thumb2_nop() const
1899 Object_attribute* attr =
1900 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1901 int arch = attr->int_value();
1902 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1903 || arch == elfcpp::TAG_CPU_ARCH_V7
1904 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1907 // Process the relocations to determine unreferenced sections for
1908 // garbage collection.
1910 gc_process_relocs(Symbol_table* symtab,
1912 Sized_relobj<32, big_endian>* object,
1913 unsigned int data_shndx,
1914 unsigned int sh_type,
1915 const unsigned char* prelocs,
1917 Output_section* output_section,
1918 bool needs_special_offset_handling,
1919 size_t local_symbol_count,
1920 const unsigned char* plocal_symbols);
1922 // Scan the relocations to look for symbol adjustments.
1924 scan_relocs(Symbol_table* symtab,
1926 Sized_relobj<32, big_endian>* object,
1927 unsigned int data_shndx,
1928 unsigned int sh_type,
1929 const unsigned char* prelocs,
1931 Output_section* output_section,
1932 bool needs_special_offset_handling,
1933 size_t local_symbol_count,
1934 const unsigned char* plocal_symbols);
1936 // Finalize the sections.
1938 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
1940 // Return the value to use for a dynamic symbol which requires special
1943 do_dynsym_value(const Symbol*) const;
1945 // Relocate a section.
1947 relocate_section(const Relocate_info<32, big_endian>*,
1948 unsigned int sh_type,
1949 const unsigned char* prelocs,
1951 Output_section* output_section,
1952 bool needs_special_offset_handling,
1953 unsigned char* view,
1954 Arm_address view_address,
1955 section_size_type view_size,
1956 const Reloc_symbol_changes*);
1958 // Scan the relocs during a relocatable link.
1960 scan_relocatable_relocs(Symbol_table* symtab,
1962 Sized_relobj<32, big_endian>* object,
1963 unsigned int data_shndx,
1964 unsigned int sh_type,
1965 const unsigned char* prelocs,
1967 Output_section* output_section,
1968 bool needs_special_offset_handling,
1969 size_t local_symbol_count,
1970 const unsigned char* plocal_symbols,
1971 Relocatable_relocs*);
1973 // Relocate a section during a relocatable link.
1975 relocate_for_relocatable(const Relocate_info<32, big_endian>*,
1976 unsigned int sh_type,
1977 const unsigned char* prelocs,
1979 Output_section* output_section,
1980 off_t offset_in_output_section,
1981 const Relocatable_relocs*,
1982 unsigned char* view,
1983 Arm_address view_address,
1984 section_size_type view_size,
1985 unsigned char* reloc_view,
1986 section_size_type reloc_view_size);
1988 // Return whether SYM is defined by the ABI.
1990 do_is_defined_by_abi(Symbol* sym) const
1991 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
1993 // Return the size of the GOT section.
1997 gold_assert(this->got_ != NULL);
1998 return this->got_->data_size();
2001 // Map platform-specific reloc types
2003 get_real_reloc_type (unsigned int r_type);
2006 // Methods to support stub-generations.
2009 // Return the stub factory
2011 stub_factory() const
2012 { return this->stub_factory_; }
2014 // Make a new Arm_input_section object.
2015 Arm_input_section<big_endian>*
2016 new_arm_input_section(Relobj*, unsigned int);
2018 // Find the Arm_input_section object corresponding to the SHNDX-th input
2019 // section of RELOBJ.
2020 Arm_input_section<big_endian>*
2021 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2023 // Make a new Stub_table
2024 Stub_table<big_endian>*
2025 new_stub_table(Arm_input_section<big_endian>*);
2027 // Scan a section for stub generation.
2029 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2030 const unsigned char*, size_t, Output_section*,
2031 bool, const unsigned char*, Arm_address,
2036 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2037 Output_section*, unsigned char*, Arm_address,
2040 // Get the default ARM target.
2041 static Target_arm<big_endian>*
2044 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2045 && parameters->target().is_big_endian() == big_endian);
2046 return static_cast<Target_arm<big_endian>*>(
2047 parameters->sized_target<32, big_endian>());
2050 // Whether relocation type uses LSB to distinguish THUMB addresses.
2052 reloc_uses_thumb_bit(unsigned int r_type);
2054 // Whether NAME belongs to a mapping symbol.
2056 is_mapping_symbol_name(const char* name)
2060 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2061 && (name[2] == '\0' || name[2] == '.'));
2064 // Whether we work around the Cortex-A8 erratum.
2066 fix_cortex_a8() const
2067 { return this->fix_cortex_a8_; }
2069 // Whether we fix R_ARM_V4BX relocation.
2071 // 1 - replace with MOV instruction (armv4 target)
2072 // 2 - make interworking veneer (>= armv4t targets only)
2073 General_options::Fix_v4bx
2075 { return parameters->options().fix_v4bx(); }
2077 // Scan a span of THUMB code section for Cortex-A8 erratum.
2079 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2080 section_size_type, section_size_type,
2081 const unsigned char*, Arm_address);
2083 // Apply Cortex-A8 workaround to a branch.
2085 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2086 unsigned char*, Arm_address);
2089 // Make an ELF object.
2091 do_make_elf_object(const std::string&, Input_file*, off_t,
2092 const elfcpp::Ehdr<32, big_endian>& ehdr);
2095 do_make_elf_object(const std::string&, Input_file*, off_t,
2096 const elfcpp::Ehdr<32, !big_endian>&)
2097 { gold_unreachable(); }
2100 do_make_elf_object(const std::string&, Input_file*, off_t,
2101 const elfcpp::Ehdr<64, false>&)
2102 { gold_unreachable(); }
2105 do_make_elf_object(const std::string&, Input_file*, off_t,
2106 const elfcpp::Ehdr<64, true>&)
2107 { gold_unreachable(); }
2109 // Make an output section.
2111 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2112 elfcpp::Elf_Xword flags)
2113 { return new Arm_output_section<big_endian>(name, type, flags); }
2116 do_adjust_elf_header(unsigned char* view, int len) const;
2118 // We only need to generate stubs, and hence perform relaxation if we are
2119 // not doing relocatable linking.
2121 do_may_relax() const
2122 { return !parameters->options().relocatable(); }
2125 do_relax(int, const Input_objects*, Symbol_table*, Layout*);
2127 // Determine whether an object attribute tag takes an integer, a
2130 do_attribute_arg_type(int tag) const;
2132 // Reorder tags during output.
2134 do_attributes_order(int num) const;
2137 // The class which scans relocations.
2142 : issued_non_pic_error_(false)
2146 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2147 Sized_relobj<32, big_endian>* object,
2148 unsigned int data_shndx,
2149 Output_section* output_section,
2150 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2151 const elfcpp::Sym<32, big_endian>& lsym);
2154 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2155 Sized_relobj<32, big_endian>* object,
2156 unsigned int data_shndx,
2157 Output_section* output_section,
2158 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2163 unsupported_reloc_local(Sized_relobj<32, big_endian>*,
2164 unsigned int r_type);
2167 unsupported_reloc_global(Sized_relobj<32, big_endian>*,
2168 unsigned int r_type, Symbol*);
2171 check_non_pic(Relobj*, unsigned int r_type);
2173 // Almost identical to Symbol::needs_plt_entry except that it also
2174 // handles STT_ARM_TFUNC.
2176 symbol_needs_plt_entry(const Symbol* sym)
2178 // An undefined symbol from an executable does not need a PLT entry.
2179 if (sym->is_undefined() && !parameters->options().shared())
2182 return (!parameters->doing_static_link()
2183 && (sym->type() == elfcpp::STT_FUNC
2184 || sym->type() == elfcpp::STT_ARM_TFUNC)
2185 && (sym->is_from_dynobj()
2186 || sym->is_undefined()
2187 || sym->is_preemptible()));
2190 // Whether we have issued an error about a non-PIC compilation.
2191 bool issued_non_pic_error_;
2194 // The class which implements relocation.
2204 // Return whether the static relocation needs to be applied.
2206 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2209 Output_section* output_section);
2211 // Do a relocation. Return false if the caller should not issue
2212 // any warnings about this relocation.
2214 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2215 Output_section*, size_t relnum,
2216 const elfcpp::Rel<32, big_endian>&,
2217 unsigned int r_type, const Sized_symbol<32>*,
2218 const Symbol_value<32>*,
2219 unsigned char*, Arm_address,
2222 // Return whether we want to pass flag NON_PIC_REF for this
2223 // reloc. This means the relocation type accesses a symbol not via
2226 reloc_is_non_pic (unsigned int r_type)
2230 // These relocation types reference GOT or PLT entries explicitly.
2231 case elfcpp::R_ARM_GOT_BREL:
2232 case elfcpp::R_ARM_GOT_ABS:
2233 case elfcpp::R_ARM_GOT_PREL:
2234 case elfcpp::R_ARM_GOT_BREL12:
2235 case elfcpp::R_ARM_PLT32_ABS:
2236 case elfcpp::R_ARM_TLS_GD32:
2237 case elfcpp::R_ARM_TLS_LDM32:
2238 case elfcpp::R_ARM_TLS_IE32:
2239 case elfcpp::R_ARM_TLS_IE12GP:
2241 // These relocate types may use PLT entries.
2242 case elfcpp::R_ARM_CALL:
2243 case elfcpp::R_ARM_THM_CALL:
2244 case elfcpp::R_ARM_JUMP24:
2245 case elfcpp::R_ARM_THM_JUMP24:
2246 case elfcpp::R_ARM_THM_JUMP19:
2247 case elfcpp::R_ARM_PLT32:
2248 case elfcpp::R_ARM_THM_XPC22:
2256 // Return whether we need to calculate the addressing origin of
2257 // the output segment defining the symbol - B(S).
2259 reloc_needs_sym_origin(unsigned int r_type)
2263 case elfcpp::R_ARM_SBREL32:
2264 case elfcpp::R_ARM_BASE_PREL:
2265 case elfcpp::R_ARM_BASE_ABS:
2266 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
2267 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
2268 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
2269 case elfcpp::R_ARM_SBREL31:
2270 case elfcpp::R_ARM_ALU_SB_G0_NC:
2271 case elfcpp::R_ARM_ALU_SB_G0:
2272 case elfcpp::R_ARM_ALU_SB_G1_NC:
2273 case elfcpp::R_ARM_ALU_SB_G1:
2274 case elfcpp::R_ARM_ALU_SB_G2:
2275 case elfcpp::R_ARM_LDR_SB_G0:
2276 case elfcpp::R_ARM_LDR_SB_G1:
2277 case elfcpp::R_ARM_LDR_SB_G2:
2278 case elfcpp::R_ARM_LDRS_SB_G0:
2279 case elfcpp::R_ARM_LDRS_SB_G1:
2280 case elfcpp::R_ARM_LDRS_SB_G2:
2281 case elfcpp::R_ARM_LDC_SB_G0:
2282 case elfcpp::R_ARM_LDC_SB_G1:
2283 case elfcpp::R_ARM_LDC_SB_G2:
2284 case elfcpp::R_ARM_MOVW_BREL_NC:
2285 case elfcpp::R_ARM_MOVT_BREL:
2286 case elfcpp::R_ARM_MOVW_BREL:
2287 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
2288 case elfcpp::R_ARM_THM_MOVT_BREL:
2289 case elfcpp::R_ARM_THM_MOVW_BREL:
2298 // A class which returns the size required for a relocation type,
2299 // used while scanning relocs during a relocatable link.
2300 class Relocatable_size_for_reloc
2304 get_size_for_reloc(unsigned int, Relobj*);
2307 // Get the GOT section, creating it if necessary.
2308 Output_data_got<32, big_endian>*
2309 got_section(Symbol_table*, Layout*);
2311 // Get the GOT PLT section.
2313 got_plt_section() const
2315 gold_assert(this->got_plt_ != NULL);
2316 return this->got_plt_;
2319 // Create a PLT entry for a global symbol.
2321 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2323 // Get the PLT section.
2324 const Output_data_plt_arm<big_endian>*
2327 gold_assert(this->plt_ != NULL);
2331 // Get the dynamic reloc section, creating it if necessary.
2333 rel_dyn_section(Layout*);
2335 // Return true if the symbol may need a COPY relocation.
2336 // References from an executable object to non-function symbols
2337 // defined in a dynamic object may need a COPY relocation.
2339 may_need_copy_reloc(Symbol* gsym)
2341 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2342 && gsym->may_need_copy_reloc());
2345 // Add a potential copy relocation.
2347 copy_reloc(Symbol_table* symtab, Layout* layout,
2348 Sized_relobj<32, big_endian>* object,
2349 unsigned int shndx, Output_section* output_section,
2350 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2352 this->copy_relocs_.copy_reloc(symtab, layout,
2353 symtab->get_sized_symbol<32>(sym),
2354 object, shndx, output_section, reloc,
2355 this->rel_dyn_section(layout));
2358 // Whether two EABI versions are compatible.
2360 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2362 // Merge processor-specific flags from input object and those in the ELF
2363 // header of the output.
2365 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2367 // Get the secondary compatible architecture.
2369 get_secondary_compatible_arch(const Attributes_section_data*);
2371 // Set the secondary compatible architecture.
2373 set_secondary_compatible_arch(Attributes_section_data*, int);
2376 tag_cpu_arch_combine(const char*, int, int*, int, int);
2378 // Helper to print AEABI enum tag value.
2380 aeabi_enum_name(unsigned int);
2382 // Return string value for TAG_CPU_name.
2384 tag_cpu_name_value(unsigned int);
2386 // Merge object attributes from input object and those in the output.
2388 merge_object_attributes(const char*, const Attributes_section_data*);
2390 // Helper to get an AEABI object attribute
2392 get_aeabi_object_attribute(int tag) const
2394 Attributes_section_data* pasd = this->attributes_section_data_;
2395 gold_assert(pasd != NULL);
2396 Object_attribute* attr =
2397 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2398 gold_assert(attr != NULL);
2403 // Methods to support stub-generations.
2406 // Group input sections for stub generation.
2408 group_sections(Layout*, section_size_type, bool);
2410 // Scan a relocation for stub generation.
2412 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2413 const Sized_symbol<32>*, unsigned int,
2414 const Symbol_value<32>*,
2415 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2417 // Scan a relocation section for stub.
2418 template<int sh_type>
2420 scan_reloc_section_for_stubs(
2421 const Relocate_info<32, big_endian>* relinfo,
2422 const unsigned char* prelocs,
2424 Output_section* output_section,
2425 bool needs_special_offset_handling,
2426 const unsigned char* view,
2427 elfcpp::Elf_types<32>::Elf_Addr view_address,
2430 // Fix .ARM.exidx section coverage.
2432 fix_exidx_coverage(Layout*, Arm_output_section<big_endian>*, Symbol_table*);
2434 // Functors for STL set.
2435 struct output_section_address_less_than
2438 operator()(const Output_section* s1, const Output_section* s2) const
2439 { return s1->address() < s2->address(); }
2442 // Information about this specific target which we pass to the
2443 // general Target structure.
2444 static const Target::Target_info arm_info;
2446 // The types of GOT entries needed for this platform.
2449 GOT_TYPE_STANDARD = 0 // GOT entry for a regular symbol
2452 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2454 // Map input section to Arm_input_section.
2455 typedef Unordered_map<Section_id,
2456 Arm_input_section<big_endian>*,
2458 Arm_input_section_map;
2460 // Map output addresses to relocs for Cortex-A8 erratum.
2461 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2462 Cortex_a8_relocs_info;
2465 Output_data_got<32, big_endian>* got_;
2467 Output_data_plt_arm<big_endian>* plt_;
2468 // The GOT PLT section.
2469 Output_data_space* got_plt_;
2470 // The dynamic reloc section.
2471 Reloc_section* rel_dyn_;
2472 // Relocs saved to avoid a COPY reloc.
2473 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2474 // Space for variables copied with a COPY reloc.
2475 Output_data_space* dynbss_;
2476 // Vector of Stub_tables created.
2477 Stub_table_list stub_tables_;
2479 const Stub_factory &stub_factory_;
2480 // Whether we can use BLX.
2482 // Whether we force PIC branch veneers.
2483 bool should_force_pic_veneer_;
2484 // Map for locating Arm_input_sections.
2485 Arm_input_section_map arm_input_section_map_;
2486 // Attributes section data in output.
2487 Attributes_section_data* attributes_section_data_;
2488 // Whether we want to fix code for Cortex-A8 erratum.
2489 bool fix_cortex_a8_;
2490 // Map addresses to relocs for Cortex-A8 erratum.
2491 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2494 template<bool big_endian>
2495 const Target::Target_info Target_arm<big_endian>::arm_info =
2498 big_endian, // is_big_endian
2499 elfcpp::EM_ARM, // machine_code
2500 false, // has_make_symbol
2501 false, // has_resolve
2502 false, // has_code_fill
2503 true, // is_default_stack_executable
2505 "/usr/lib/libc.so.1", // dynamic_linker
2506 0x8000, // default_text_segment_address
2507 0x1000, // abi_pagesize (overridable by -z max-page-size)
2508 0x1000, // common_pagesize (overridable by -z common-page-size)
2509 elfcpp::SHN_UNDEF, // small_common_shndx
2510 elfcpp::SHN_UNDEF, // large_common_shndx
2511 0, // small_common_section_flags
2512 0, // large_common_section_flags
2513 ".ARM.attributes", // attributes_section
2514 "aeabi" // attributes_vendor
2517 // Arm relocate functions class
2520 template<bool big_endian>
2521 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
2526 STATUS_OKAY, // No error during relocation.
2527 STATUS_OVERFLOW, // Relocation oveflow.
2528 STATUS_BAD_RELOC // Relocation cannot be applied.
2532 typedef Relocate_functions<32, big_endian> Base;
2533 typedef Arm_relocate_functions<big_endian> This;
2535 // Encoding of imm16 argument for movt and movw ARM instructions
2538 // imm16 := imm4 | imm12
2540 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2541 // +-------+---------------+-------+-------+-----------------------+
2542 // | | |imm4 | |imm12 |
2543 // +-------+---------------+-------+-------+-----------------------+
2545 // Extract the relocation addend from VAL based on the ARM
2546 // instruction encoding described above.
2547 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2548 extract_arm_movw_movt_addend(
2549 typename elfcpp::Swap<32, big_endian>::Valtype val)
2551 // According to the Elf ABI for ARM Architecture the immediate
2552 // field is sign-extended to form the addend.
2553 return utils::sign_extend<16>(((val >> 4) & 0xf000) | (val & 0xfff));
2556 // Insert X into VAL based on the ARM instruction encoding described
2558 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2559 insert_val_arm_movw_movt(
2560 typename elfcpp::Swap<32, big_endian>::Valtype val,
2561 typename elfcpp::Swap<32, big_endian>::Valtype x)
2565 val |= (x & 0xf000) << 4;
2569 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2572 // imm16 := imm4 | i | imm3 | imm8
2574 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2575 // +---------+-+-----------+-------++-+-----+-------+---------------+
2576 // | |i| |imm4 || |imm3 | |imm8 |
2577 // +---------+-+-----------+-------++-+-----+-------+---------------+
2579 // Extract the relocation addend from VAL based on the Thumb2
2580 // instruction encoding described above.
2581 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2582 extract_thumb_movw_movt_addend(
2583 typename elfcpp::Swap<32, big_endian>::Valtype val)
2585 // According to the Elf ABI for ARM Architecture the immediate
2586 // field is sign-extended to form the addend.
2587 return utils::sign_extend<16>(((val >> 4) & 0xf000)
2588 | ((val >> 15) & 0x0800)
2589 | ((val >> 4) & 0x0700)
2593 // Insert X into VAL based on the Thumb2 instruction encoding
2595 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2596 insert_val_thumb_movw_movt(
2597 typename elfcpp::Swap<32, big_endian>::Valtype val,
2598 typename elfcpp::Swap<32, big_endian>::Valtype x)
2601 val |= (x & 0xf000) << 4;
2602 val |= (x & 0x0800) << 15;
2603 val |= (x & 0x0700) << 4;
2604 val |= (x & 0x00ff);
2608 // Calculate the smallest constant Kn for the specified residual.
2609 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2611 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
2617 // Determine the most significant bit in the residual and
2618 // align the resulting value to a 2-bit boundary.
2619 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
2621 // The desired shift is now (msb - 6), or zero, whichever
2623 return (((msb - 6) < 0) ? 0 : (msb - 6));
2626 // Calculate the final residual for the specified group index.
2627 // If the passed group index is less than zero, the method will return
2628 // the value of the specified residual without any change.
2629 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2630 static typename elfcpp::Swap<32, big_endian>::Valtype
2631 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2634 for (int n = 0; n <= group; n++)
2636 // Calculate which part of the value to mask.
2637 uint32_t shift = calc_grp_kn(residual);
2638 // Calculate the residual for the next time around.
2639 residual &= ~(residual & (0xff << shift));
2645 // Calculate the value of Gn for the specified group index.
2646 // We return it in the form of an encoded constant-and-rotation.
2647 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2648 static typename elfcpp::Swap<32, big_endian>::Valtype
2649 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2652 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
2655 for (int n = 0; n <= group; n++)
2657 // Calculate which part of the value to mask.
2658 shift = calc_grp_kn(residual);
2659 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
2660 gn = residual & (0xff << shift);
2661 // Calculate the residual for the next time around.
2664 // Return Gn in the form of an encoded constant-and-rotation.
2665 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
2669 // Handle ARM long branches.
2670 static typename This::Status
2671 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2672 unsigned char *, const Sized_symbol<32>*,
2673 const Arm_relobj<big_endian>*, unsigned int,
2674 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2676 // Handle THUMB long branches.
2677 static typename This::Status
2678 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2679 unsigned char *, const Sized_symbol<32>*,
2680 const Arm_relobj<big_endian>*, unsigned int,
2681 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2684 // Return the branch offset of a 32-bit THUMB branch.
2685 static inline int32_t
2686 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2688 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
2689 // involving the J1 and J2 bits.
2690 uint32_t s = (upper_insn & (1U << 10)) >> 10;
2691 uint32_t upper = upper_insn & 0x3ffU;
2692 uint32_t lower = lower_insn & 0x7ffU;
2693 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
2694 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
2695 uint32_t i1 = j1 ^ s ? 0 : 1;
2696 uint32_t i2 = j2 ^ s ? 0 : 1;
2698 return utils::sign_extend<25>((s << 24) | (i1 << 23) | (i2 << 22)
2699 | (upper << 12) | (lower << 1));
2702 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
2703 // UPPER_INSN is the original upper instruction of the branch. Caller is
2704 // responsible for overflow checking and BLX offset adjustment.
2705 static inline uint16_t
2706 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
2708 uint32_t s = offset < 0 ? 1 : 0;
2709 uint32_t bits = static_cast<uint32_t>(offset);
2710 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
2713 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
2714 // LOWER_INSN is the original lower instruction of the branch. Caller is
2715 // responsible for overflow checking and BLX offset adjustment.
2716 static inline uint16_t
2717 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
2719 uint32_t s = offset < 0 ? 1 : 0;
2720 uint32_t bits = static_cast<uint32_t>(offset);
2721 return ((lower_insn & ~0x2fffU)
2722 | ((((bits >> 23) & 1) ^ !s) << 13)
2723 | ((((bits >> 22) & 1) ^ !s) << 11)
2724 | ((bits >> 1) & 0x7ffU));
2727 // Return the branch offset of a 32-bit THUMB conditional branch.
2728 static inline int32_t
2729 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2731 uint32_t s = (upper_insn & 0x0400U) >> 10;
2732 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
2733 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
2734 uint32_t lower = (lower_insn & 0x07ffU);
2735 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
2737 return utils::sign_extend<21>((upper << 12) | (lower << 1));
2740 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
2741 // instruction. UPPER_INSN is the original upper instruction of the branch.
2742 // Caller is responsible for overflow checking.
2743 static inline uint16_t
2744 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
2746 uint32_t s = offset < 0 ? 1 : 0;
2747 uint32_t bits = static_cast<uint32_t>(offset);
2748 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
2751 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
2752 // instruction. LOWER_INSN is the original lower instruction of the branch.
2753 // Caller is reponsible for overflow checking.
2754 static inline uint16_t
2755 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
2757 uint32_t bits = static_cast<uint32_t>(offset);
2758 uint32_t j2 = (bits & 0x00080000U) >> 19;
2759 uint32_t j1 = (bits & 0x00040000U) >> 18;
2760 uint32_t lo = (bits & 0x00000ffeU) >> 1;
2762 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
2765 // R_ARM_ABS8: S + A
2766 static inline typename This::Status
2767 abs8(unsigned char *view,
2768 const Sized_relobj<32, big_endian>* object,
2769 const Symbol_value<32>* psymval)
2771 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
2772 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2773 Valtype* wv = reinterpret_cast<Valtype*>(view);
2774 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
2775 Reltype addend = utils::sign_extend<8>(val);
2776 Reltype x = psymval->value(object, addend);
2777 val = utils::bit_select(val, x, 0xffU);
2778 elfcpp::Swap<8, big_endian>::writeval(wv, val);
2779 return (utils::has_signed_unsigned_overflow<8>(x)
2780 ? This::STATUS_OVERFLOW
2781 : This::STATUS_OKAY);
2784 // R_ARM_THM_ABS5: S + A
2785 static inline typename This::Status
2786 thm_abs5(unsigned char *view,
2787 const Sized_relobj<32, big_endian>* object,
2788 const Symbol_value<32>* psymval)
2790 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2791 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2792 Valtype* wv = reinterpret_cast<Valtype*>(view);
2793 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2794 Reltype addend = (val & 0x7e0U) >> 6;
2795 Reltype x = psymval->value(object, addend);
2796 val = utils::bit_select(val, x << 6, 0x7e0U);
2797 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2798 return (utils::has_overflow<5>(x)
2799 ? This::STATUS_OVERFLOW
2800 : This::STATUS_OKAY);
2803 // R_ARM_ABS12: S + A
2804 static inline typename This::Status
2805 abs12(unsigned char *view,
2806 const Sized_relobj<32, big_endian>* object,
2807 const Symbol_value<32>* psymval)
2809 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2810 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2811 Valtype* wv = reinterpret_cast<Valtype*>(view);
2812 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2813 Reltype addend = val & 0x0fffU;
2814 Reltype x = psymval->value(object, addend);
2815 val = utils::bit_select(val, x, 0x0fffU);
2816 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2817 return (utils::has_overflow<12>(x)
2818 ? This::STATUS_OVERFLOW
2819 : This::STATUS_OKAY);
2822 // R_ARM_ABS16: S + A
2823 static inline typename This::Status
2824 abs16(unsigned char *view,
2825 const Sized_relobj<32, big_endian>* object,
2826 const Symbol_value<32>* psymval)
2828 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2829 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2830 Valtype* wv = reinterpret_cast<Valtype*>(view);
2831 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2832 Reltype addend = utils::sign_extend<16>(val);
2833 Reltype x = psymval->value(object, addend);
2834 val = utils::bit_select(val, x, 0xffffU);
2835 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2836 return (utils::has_signed_unsigned_overflow<16>(x)
2837 ? This::STATUS_OVERFLOW
2838 : This::STATUS_OKAY);
2841 // R_ARM_ABS32: (S + A) | T
2842 static inline typename This::Status
2843 abs32(unsigned char *view,
2844 const Sized_relobj<32, big_endian>* object,
2845 const Symbol_value<32>* psymval,
2846 Arm_address thumb_bit)
2848 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2849 Valtype* wv = reinterpret_cast<Valtype*>(view);
2850 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2851 Valtype x = psymval->value(object, addend) | thumb_bit;
2852 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2853 return This::STATUS_OKAY;
2856 // R_ARM_REL32: (S + A) | T - P
2857 static inline typename This::Status
2858 rel32(unsigned char *view,
2859 const Sized_relobj<32, big_endian>* object,
2860 const Symbol_value<32>* psymval,
2861 Arm_address address,
2862 Arm_address thumb_bit)
2864 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2865 Valtype* wv = reinterpret_cast<Valtype*>(view);
2866 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2867 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2868 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2869 return This::STATUS_OKAY;
2872 // R_ARM_THM_JUMP24: (S + A) | T - P
2873 static typename This::Status
2874 thm_jump19(unsigned char *view, const Arm_relobj<big_endian>* object,
2875 const Symbol_value<32>* psymval, Arm_address address,
2876 Arm_address thumb_bit);
2878 // R_ARM_THM_JUMP6: S + A – P
2879 static inline typename This::Status
2880 thm_jump6(unsigned char *view,
2881 const Sized_relobj<32, big_endian>* object,
2882 const Symbol_value<32>* psymval,
2883 Arm_address address)
2885 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2886 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2887 Valtype* wv = reinterpret_cast<Valtype*>(view);
2888 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2889 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
2890 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
2891 Reltype x = (psymval->value(object, addend) - address);
2892 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
2893 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2894 // CZB does only forward jumps.
2895 return ((x > 0x007e)
2896 ? This::STATUS_OVERFLOW
2897 : This::STATUS_OKAY);
2900 // R_ARM_THM_JUMP8: S + A – P
2901 static inline typename This::Status
2902 thm_jump8(unsigned char *view,
2903 const Sized_relobj<32, big_endian>* object,
2904 const Symbol_value<32>* psymval,
2905 Arm_address address)
2907 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2908 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2909 Valtype* wv = reinterpret_cast<Valtype*>(view);
2910 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2911 Reltype addend = utils::sign_extend<8>((val & 0x00ff) << 1);
2912 Reltype x = (psymval->value(object, addend) - address);
2913 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xff00) | ((x & 0x01fe) >> 1));
2914 return (utils::has_overflow<8>(x)
2915 ? This::STATUS_OVERFLOW
2916 : This::STATUS_OKAY);
2919 // R_ARM_THM_JUMP11: S + A – P
2920 static inline typename This::Status
2921 thm_jump11(unsigned char *view,
2922 const Sized_relobj<32, big_endian>* object,
2923 const Symbol_value<32>* psymval,
2924 Arm_address address)
2926 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2927 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2928 Valtype* wv = reinterpret_cast<Valtype*>(view);
2929 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2930 Reltype addend = utils::sign_extend<11>((val & 0x07ff) << 1);
2931 Reltype x = (psymval->value(object, addend) - address);
2932 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xf800) | ((x & 0x0ffe) >> 1));
2933 return (utils::has_overflow<11>(x)
2934 ? This::STATUS_OVERFLOW
2935 : This::STATUS_OKAY);
2938 // R_ARM_BASE_PREL: B(S) + A - P
2939 static inline typename This::Status
2940 base_prel(unsigned char* view,
2942 Arm_address address)
2944 Base::rel32(view, origin - address);
2948 // R_ARM_BASE_ABS: B(S) + A
2949 static inline typename This::Status
2950 base_abs(unsigned char* view,
2953 Base::rel32(view, origin);
2957 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
2958 static inline typename This::Status
2959 got_brel(unsigned char* view,
2960 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
2962 Base::rel32(view, got_offset);
2963 return This::STATUS_OKAY;
2966 // R_ARM_GOT_PREL: GOT(S) + A - P
2967 static inline typename This::Status
2968 got_prel(unsigned char *view,
2969 Arm_address got_entry,
2970 Arm_address address)
2972 Base::rel32(view, got_entry - address);
2973 return This::STATUS_OKAY;
2976 // R_ARM_PREL: (S + A) | T - P
2977 static inline typename This::Status
2978 prel31(unsigned char *view,
2979 const Sized_relobj<32, big_endian>* object,
2980 const Symbol_value<32>* psymval,
2981 Arm_address address,
2982 Arm_address thumb_bit)
2984 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2985 Valtype* wv = reinterpret_cast<Valtype*>(view);
2986 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2987 Valtype addend = utils::sign_extend<31>(val);
2988 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2989 val = utils::bit_select(val, x, 0x7fffffffU);
2990 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2991 return (utils::has_overflow<31>(x) ?
2992 This::STATUS_OVERFLOW : This::STATUS_OKAY);
2995 // R_ARM_MOVW_ABS_NC: (S + A) | T
2996 static inline typename This::Status
2997 movw_abs_nc(unsigned char *view,
2998 const Sized_relobj<32, big_endian>* object,
2999 const Symbol_value<32>* psymval,
3000 Arm_address thumb_bit)
3002 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3003 Valtype* wv = reinterpret_cast<Valtype*>(view);
3004 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3005 Valtype addend = This::extract_arm_movw_movt_addend(val);
3006 Valtype x = psymval->value(object, addend) | thumb_bit;
3007 val = This::insert_val_arm_movw_movt(val, x);
3008 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3009 return This::STATUS_OKAY;
3012 // R_ARM_MOVT_ABS: S + A
3013 static inline typename This::Status
3014 movt_abs(unsigned char *view,
3015 const Sized_relobj<32, big_endian>* object,
3016 const Symbol_value<32>* psymval)
3018 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3019 Valtype* wv = reinterpret_cast<Valtype*>(view);
3020 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3021 Valtype addend = This::extract_arm_movw_movt_addend(val);
3022 Valtype x = psymval->value(object, addend) >> 16;
3023 val = This::insert_val_arm_movw_movt(val, x);
3024 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3025 return This::STATUS_OKAY;
3028 // R_ARM_THM_MOVW_ABS_NC: S + A | T
3029 static inline typename This::Status
3030 thm_movw_abs_nc(unsigned char *view,
3031 const Sized_relobj<32, big_endian>* object,
3032 const Symbol_value<32>* psymval,
3033 Arm_address thumb_bit)
3035 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3036 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3037 Valtype* wv = reinterpret_cast<Valtype*>(view);
3038 Reltype val = ((elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3039 | elfcpp::Swap<16, big_endian>::readval(wv + 1));
3040 Reltype addend = extract_thumb_movw_movt_addend(val);
3041 Reltype x = psymval->value(object, addend) | thumb_bit;
3042 val = This::insert_val_thumb_movw_movt(val, x);
3043 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3044 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3045 return This::STATUS_OKAY;
3048 // R_ARM_THM_MOVT_ABS: S + A
3049 static inline typename This::Status
3050 thm_movt_abs(unsigned char *view,
3051 const Sized_relobj<32, big_endian>* object,
3052 const Symbol_value<32>* psymval)
3054 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3055 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3056 Valtype* wv = reinterpret_cast<Valtype*>(view);
3057 Reltype val = ((elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3058 | elfcpp::Swap<16, big_endian>::readval(wv + 1));
3059 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3060 Reltype x = psymval->value(object, addend) >> 16;
3061 val = This::insert_val_thumb_movw_movt(val, x);
3062 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3063 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3064 return This::STATUS_OKAY;
3067 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3068 // R_ARM_MOVW_BREL_NC: ((S + A) | T) – B(S)
3069 static inline typename This::Status
3070 movw_rel_nc(unsigned char* view,
3071 const Sized_relobj<32, big_endian>* object,
3072 const Symbol_value<32>* psymval,
3073 Arm_address address,
3074 Arm_address thumb_bit)
3076 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3077 Valtype* wv = reinterpret_cast<Valtype*>(view);
3078 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3079 Valtype addend = This::extract_arm_movw_movt_addend(val);
3080 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3081 val = This::insert_val_arm_movw_movt(val, x);
3082 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3083 return This::STATUS_OKAY;
3086 // R_ARM_MOVW_BREL: ((S + A) | T) – B(S)
3087 static inline typename This::Status
3088 movw_rel(unsigned char* view,
3089 const Sized_relobj<32, big_endian>* object,
3090 const Symbol_value<32>* psymval,
3091 Arm_address address,
3092 Arm_address thumb_bit)
3094 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3095 Valtype* wv = reinterpret_cast<Valtype*>(view);
3096 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3097 Valtype addend = This::extract_arm_movw_movt_addend(val);
3098 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3099 val = This::insert_val_arm_movw_movt(val, x);
3100 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3101 return ((x >= 0x10000) ?
3102 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3105 // R_ARM_MOVT_PREL: S + A - P
3106 // R_ARM_MOVT_BREL: S + A – B(S)
3107 static inline typename This::Status
3108 movt_rel(unsigned char* view,
3109 const Sized_relobj<32, big_endian>* object,
3110 const Symbol_value<32>* psymval,
3111 Arm_address address)
3113 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3114 Valtype* wv = reinterpret_cast<Valtype*>(view);
3115 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3116 Valtype addend = This::extract_arm_movw_movt_addend(val);
3117 Valtype x = (psymval->value(object, addend) - address) >> 16;
3118 val = This::insert_val_arm_movw_movt(val, x);
3119 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3120 return This::STATUS_OKAY;
3123 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3124 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) – B(S)
3125 static inline typename This::Status
3126 thm_movw_rel_nc(unsigned char *view,
3127 const Sized_relobj<32, big_endian>* object,
3128 const Symbol_value<32>* psymval,
3129 Arm_address address,
3130 Arm_address thumb_bit)
3132 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3133 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3134 Valtype* wv = reinterpret_cast<Valtype*>(view);
3135 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3136 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3137 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3138 Reltype x = (psymval->value(object, addend) | thumb_bit) - address;
3139 val = This::insert_val_thumb_movw_movt(val, x);
3140 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3141 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3142 return This::STATUS_OKAY;
3145 // R_ARM_THM_MOVW_BREL: ((S + A) | T) – B(S)
3146 static inline typename This::Status
3147 thm_movw_rel(unsigned char *view,
3148 const Sized_relobj<32, big_endian>* object,
3149 const Symbol_value<32>* psymval,
3150 Arm_address address,
3151 Arm_address thumb_bit)
3153 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3154 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3155 Valtype* wv = reinterpret_cast<Valtype*>(view);
3156 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3157 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3158 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3159 Reltype x = (psymval->value(object, addend) | thumb_bit) - address;
3160 val = This::insert_val_thumb_movw_movt(val, x);
3161 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3162 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3163 return ((x >= 0x10000) ?
3164 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3167 // R_ARM_THM_MOVT_PREL: S + A - P
3168 // R_ARM_THM_MOVT_BREL: S + A – B(S)
3169 static inline typename This::Status
3170 thm_movt_rel(unsigned char* view,
3171 const Sized_relobj<32, big_endian>* object,
3172 const Symbol_value<32>* psymval,
3173 Arm_address address)
3175 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3176 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3177 Valtype* wv = reinterpret_cast<Valtype*>(view);
3178 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3179 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3180 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3181 Reltype x = (psymval->value(object, addend) - address) >> 16;
3182 val = This::insert_val_thumb_movw_movt(val, x);
3183 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3184 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3185 return This::STATUS_OKAY;
3188 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3189 static inline typename This::Status
3190 thm_alu11(unsigned char* view,
3191 const Sized_relobj<32, big_endian>* object,
3192 const Symbol_value<32>* psymval,
3193 Arm_address address,
3194 Arm_address thumb_bit)
3196 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3197 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3198 Valtype* wv = reinterpret_cast<Valtype*>(view);
3199 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3200 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3202 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3203 // -----------------------------------------------------------------------
3204 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3205 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3206 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3207 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3208 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3209 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3211 // Determine a sign for the addend.
3212 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3213 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3214 // Thumb2 addend encoding:
3215 // imm12 := i | imm3 | imm8
3216 int32_t addend = (insn & 0xff)
3217 | ((insn & 0x00007000) >> 4)
3218 | ((insn & 0x04000000) >> 15);
3219 // Apply a sign to the added.
3222 int32_t x = (psymval->value(object, addend) | thumb_bit)
3223 - (address & 0xfffffffc);
3224 Reltype val = abs(x);
3225 // Mask out the value and a distinct part of the ADD/SUB opcode
3226 // (bits 7:5 of opword).
3227 insn = (insn & 0xfb0f8f00)
3229 | ((val & 0x700) << 4)
3230 | ((val & 0x800) << 15);
3231 // Set the opcode according to whether the value to go in the
3232 // place is negative.
3236 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3237 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3238 return ((val > 0xfff) ?
3239 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3242 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3243 static inline typename This::Status
3244 thm_pc8(unsigned char* view,
3245 const Sized_relobj<32, big_endian>* object,
3246 const Symbol_value<32>* psymval,
3247 Arm_address address)
3249 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3250 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3251 Valtype* wv = reinterpret_cast<Valtype*>(view);
3252 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3253 Reltype addend = ((insn & 0x00ff) << 2);
3254 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3255 Reltype val = abs(x);
3256 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3258 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3259 return ((val > 0x03fc)
3260 ? This::STATUS_OVERFLOW
3261 : This::STATUS_OKAY);
3264 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3265 static inline typename This::Status
3266 thm_pc12(unsigned char* view,
3267 const Sized_relobj<32, big_endian>* object,
3268 const Symbol_value<32>* psymval,
3269 Arm_address address)
3271 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3272 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3273 Valtype* wv = reinterpret_cast<Valtype*>(view);
3274 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3275 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3276 // Determine a sign for the addend (positive if the U bit is 1).
3277 const int sign = (insn & 0x00800000) ? 1 : -1;
3278 int32_t addend = (insn & 0xfff);
3279 // Apply a sign to the added.
3282 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3283 Reltype val = abs(x);
3284 // Mask out and apply the value and the U bit.
3285 insn = (insn & 0xff7ff000) | (val & 0xfff);
3286 // Set the U bit according to whether the value to go in the
3287 // place is positive.
3291 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3292 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3293 return ((val > 0xfff) ?
3294 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3298 static inline typename This::Status
3299 v4bx(const Relocate_info<32, big_endian>* relinfo,
3300 unsigned char *view,
3301 const Arm_relobj<big_endian>* object,
3302 const Arm_address address,
3303 const bool is_interworking)
3306 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3307 Valtype* wv = reinterpret_cast<Valtype*>(view);
3308 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3310 // Ensure that we have a BX instruction.
3311 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3312 const uint32_t reg = (val & 0xf);
3313 if (is_interworking && reg != 0xf)
3315 Stub_table<big_endian>* stub_table =
3316 object->stub_table(relinfo->data_shndx);
3317 gold_assert(stub_table != NULL);
3319 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3320 gold_assert(stub != NULL);
3322 int32_t veneer_address =
3323 stub_table->address() + stub->offset() - 8 - address;
3324 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3325 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3326 // Replace with a branch to veneer (B <addr>)
3327 val = (val & 0xf0000000) | 0x0a000000
3328 | ((veneer_address >> 2) & 0x00ffffff);
3332 // Preserve Rm (lowest four bits) and the condition code
3333 // (highest four bits). Other bits encode MOV PC,Rm.
3334 val = (val & 0xf000000f) | 0x01a0f000;
3336 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3337 return This::STATUS_OKAY;
3340 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3341 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3342 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3343 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3344 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3345 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3346 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3347 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3348 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3349 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3350 static inline typename This::Status
3351 arm_grp_alu(unsigned char* view,
3352 const Sized_relobj<32, big_endian>* object,
3353 const Symbol_value<32>* psymval,
3355 Arm_address address,
3356 Arm_address thumb_bit,
3357 bool check_overflow)
3359 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3360 Valtype* wv = reinterpret_cast<Valtype*>(view);
3361 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3363 // ALU group relocations are allowed only for the ADD/SUB instructions.
3364 // (0x00800000 - ADD, 0x00400000 - SUB)
3365 const Valtype opcode = insn & 0x01e00000;
3366 if (opcode != 0x00800000 && opcode != 0x00400000)
3367 return This::STATUS_BAD_RELOC;
3369 // Determine a sign for the addend.
3370 const int sign = (opcode == 0x00800000) ? 1 : -1;
3371 // shifter = rotate_imm * 2
3372 const uint32_t shifter = (insn & 0xf00) >> 7;
3373 // Initial addend value.
3374 int32_t addend = insn & 0xff;
3375 // Rotate addend right by shifter.
3376 addend = (addend >> shifter) | (addend << (32 - shifter));
3377 // Apply a sign to the added.
3380 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3381 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3382 // Check for overflow if required
3384 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3385 return This::STATUS_OVERFLOW;
3387 // Mask out the value and the ADD/SUB part of the opcode; take care
3388 // not to destroy the S bit.
3390 // Set the opcode according to whether the value to go in the
3391 // place is negative.
3392 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3393 // Encode the offset (encoded Gn).
3396 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3397 return This::STATUS_OKAY;
3400 // R_ARM_LDR_PC_G0: S + A - P
3401 // R_ARM_LDR_PC_G1: S + A - P
3402 // R_ARM_LDR_PC_G2: S + A - P
3403 // R_ARM_LDR_SB_G0: S + A - B(S)
3404 // R_ARM_LDR_SB_G1: S + A - B(S)
3405 // R_ARM_LDR_SB_G2: S + A - B(S)
3406 static inline typename This::Status
3407 arm_grp_ldr(unsigned char* view,
3408 const Sized_relobj<32, big_endian>* object,
3409 const Symbol_value<32>* psymval,
3411 Arm_address address)
3413 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3414 Valtype* wv = reinterpret_cast<Valtype*>(view);
3415 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3417 const int sign = (insn & 0x00800000) ? 1 : -1;
3418 int32_t addend = (insn & 0xfff) * sign;
3419 int32_t x = (psymval->value(object, addend) - address);
3420 // Calculate the relevant G(n-1) value to obtain this stage residual.
3422 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3423 if (residual >= 0x1000)
3424 return This::STATUS_OVERFLOW;
3426 // Mask out the value and U bit.
3428 // Set the U bit for non-negative values.
3433 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3434 return This::STATUS_OKAY;
3437 // R_ARM_LDRS_PC_G0: S + A - P
3438 // R_ARM_LDRS_PC_G1: S + A - P
3439 // R_ARM_LDRS_PC_G2: S + A - P
3440 // R_ARM_LDRS_SB_G0: S + A - B(S)
3441 // R_ARM_LDRS_SB_G1: S + A - B(S)
3442 // R_ARM_LDRS_SB_G2: S + A - B(S)
3443 static inline typename This::Status
3444 arm_grp_ldrs(unsigned char* view,
3445 const Sized_relobj<32, big_endian>* object,
3446 const Symbol_value<32>* psymval,
3448 Arm_address address)
3450 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3451 Valtype* wv = reinterpret_cast<Valtype*>(view);
3452 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3454 const int sign = (insn & 0x00800000) ? 1 : -1;
3455 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3456 int32_t x = (psymval->value(object, addend) - address);
3457 // Calculate the relevant G(n-1) value to obtain this stage residual.
3459 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3460 if (residual >= 0x100)
3461 return This::STATUS_OVERFLOW;
3463 // Mask out the value and U bit.
3465 // Set the U bit for non-negative values.
3468 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3470 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3471 return This::STATUS_OKAY;
3474 // R_ARM_LDC_PC_G0: S + A - P
3475 // R_ARM_LDC_PC_G1: S + A - P
3476 // R_ARM_LDC_PC_G2: S + A - P
3477 // R_ARM_LDC_SB_G0: S + A - B(S)
3478 // R_ARM_LDC_SB_G1: S + A - B(S)
3479 // R_ARM_LDC_SB_G2: S + A - B(S)
3480 static inline typename This::Status
3481 arm_grp_ldc(unsigned char* view,
3482 const Sized_relobj<32, big_endian>* object,
3483 const Symbol_value<32>* psymval,
3485 Arm_address address)
3487 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3488 Valtype* wv = reinterpret_cast<Valtype*>(view);
3489 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3491 const int sign = (insn & 0x00800000) ? 1 : -1;
3492 int32_t addend = ((insn & 0xff) << 2) * sign;
3493 int32_t x = (psymval->value(object, addend) - address);
3494 // Calculate the relevant G(n-1) value to obtain this stage residual.
3496 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3497 if ((residual & 0x3) != 0 || residual >= 0x400)
3498 return This::STATUS_OVERFLOW;
3500 // Mask out the value and U bit.
3502 // Set the U bit for non-negative values.
3505 insn |= (residual >> 2);
3507 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3508 return This::STATUS_OKAY;
3512 // Relocate ARM long branches. This handles relocation types
3513 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3514 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3515 // undefined and we do not use PLT in this relocation. In such a case,
3516 // the branch is converted into an NOP.
3518 template<bool big_endian>
3519 typename Arm_relocate_functions<big_endian>::Status
3520 Arm_relocate_functions<big_endian>::arm_branch_common(
3521 unsigned int r_type,
3522 const Relocate_info<32, big_endian>* relinfo,
3523 unsigned char *view,
3524 const Sized_symbol<32>* gsym,
3525 const Arm_relobj<big_endian>* object,
3527 const Symbol_value<32>* psymval,
3528 Arm_address address,
3529 Arm_address thumb_bit,
3530 bool is_weakly_undefined_without_plt)
3532 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3533 Valtype* wv = reinterpret_cast<Valtype*>(view);
3534 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3536 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3537 && ((val & 0x0f000000UL) == 0x0a000000UL);
3538 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3539 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3540 && ((val & 0x0f000000UL) == 0x0b000000UL);
3541 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3542 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3544 // Check that the instruction is valid.
3545 if (r_type == elfcpp::R_ARM_CALL)
3547 if (!insn_is_uncond_bl && !insn_is_blx)
3548 return This::STATUS_BAD_RELOC;
3550 else if (r_type == elfcpp::R_ARM_JUMP24)
3552 if (!insn_is_b && !insn_is_cond_bl)
3553 return This::STATUS_BAD_RELOC;
3555 else if (r_type == elfcpp::R_ARM_PLT32)
3557 if (!insn_is_any_branch)
3558 return This::STATUS_BAD_RELOC;
3560 else if (r_type == elfcpp::R_ARM_XPC25)
3562 // FIXME: AAELF document IH0044C does not say much about it other
3563 // than it being obsolete.
3564 if (!insn_is_any_branch)
3565 return This::STATUS_BAD_RELOC;
3570 // A branch to an undefined weak symbol is turned into a jump to
3571 // the next instruction unless a PLT entry will be created.
3572 // Do the same for local undefined symbols.
3573 // The jump to the next instruction is optimized as a NOP depending
3574 // on the architecture.
3575 const Target_arm<big_endian>* arm_target =
3576 Target_arm<big_endian>::default_target();
3577 if (is_weakly_undefined_without_plt)
3579 Valtype cond = val & 0xf0000000U;
3580 if (arm_target->may_use_arm_nop())
3581 val = cond | 0x0320f000;
3583 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3584 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3585 return This::STATUS_OKAY;
3588 Valtype addend = utils::sign_extend<26>(val << 2);
3589 Valtype branch_target = psymval->value(object, addend);
3590 int32_t branch_offset = branch_target - address;
3592 // We need a stub if the branch offset is too large or if we need
3594 bool may_use_blx = arm_target->may_use_blx();
3595 Reloc_stub* stub = NULL;
3596 if ((branch_offset > ARM_MAX_FWD_BRANCH_OFFSET)
3597 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3598 || ((thumb_bit != 0) && !(may_use_blx && r_type == elfcpp::R_ARM_CALL)))
3600 Stub_type stub_type =
3601 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3603 if (stub_type != arm_stub_none)
3605 Stub_table<big_endian>* stub_table =
3606 object->stub_table(relinfo->data_shndx);
3607 gold_assert(stub_table != NULL);
3609 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3610 stub = stub_table->find_reloc_stub(stub_key);
3611 gold_assert(stub != NULL);
3612 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3613 branch_target = stub_table->address() + stub->offset() + addend;
3614 branch_offset = branch_target - address;
3615 gold_assert((branch_offset <= ARM_MAX_FWD_BRANCH_OFFSET)
3616 && (branch_offset >= ARM_MAX_BWD_BRANCH_OFFSET));
3620 // At this point, if we still need to switch mode, the instruction
3621 // must either be a BLX or a BL that can be converted to a BLX.
3625 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
3626 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
3629 val = utils::bit_select(val, (branch_offset >> 2), 0xffffffUL);
3630 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3631 return (utils::has_overflow<26>(branch_offset)
3632 ? This::STATUS_OVERFLOW : This::STATUS_OKAY);
3635 // Relocate THUMB long branches. This handles relocation types
3636 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3637 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3638 // undefined and we do not use PLT in this relocation. In such a case,
3639 // the branch is converted into an NOP.
3641 template<bool big_endian>
3642 typename Arm_relocate_functions<big_endian>::Status
3643 Arm_relocate_functions<big_endian>::thumb_branch_common(
3644 unsigned int r_type,
3645 const Relocate_info<32, big_endian>* relinfo,
3646 unsigned char *view,
3647 const Sized_symbol<32>* gsym,
3648 const Arm_relobj<big_endian>* object,
3650 const Symbol_value<32>* psymval,
3651 Arm_address address,
3652 Arm_address thumb_bit,
3653 bool is_weakly_undefined_without_plt)
3655 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3656 Valtype* wv = reinterpret_cast<Valtype*>(view);
3657 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3658 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3660 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3662 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
3663 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
3665 // Check that the instruction is valid.
3666 if (r_type == elfcpp::R_ARM_THM_CALL)
3668 if (!is_bl_insn && !is_blx_insn)
3669 return This::STATUS_BAD_RELOC;
3671 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
3673 // This cannot be a BLX.
3675 return This::STATUS_BAD_RELOC;
3677 else if (r_type == elfcpp::R_ARM_THM_XPC22)
3679 // Check for Thumb to Thumb call.
3681 return This::STATUS_BAD_RELOC;
3684 gold_warning(_("%s: Thumb BLX instruction targets "
3685 "thumb function '%s'."),
3686 object->name().c_str(),
3687 (gsym ? gsym->name() : "(local)"));
3688 // Convert BLX to BL.
3689 lower_insn |= 0x1000U;
3695 // A branch to an undefined weak symbol is turned into a jump to
3696 // the next instruction unless a PLT entry will be created.
3697 // The jump to the next instruction is optimized as a NOP.W for
3698 // Thumb-2 enabled architectures.
3699 const Target_arm<big_endian>* arm_target =
3700 Target_arm<big_endian>::default_target();
3701 if (is_weakly_undefined_without_plt)
3703 if (arm_target->may_use_thumb2_nop())
3705 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
3706 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
3710 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
3711 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
3713 return This::STATUS_OKAY;
3716 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
3717 Arm_address branch_target = psymval->value(object, addend);
3718 int32_t branch_offset = branch_target - address;
3720 // We need a stub if the branch offset is too large or if we need
3722 bool may_use_blx = arm_target->may_use_blx();
3723 bool thumb2 = arm_target->using_thumb2();
3725 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3726 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3728 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3729 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3730 || ((thumb_bit == 0)
3731 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
3732 || r_type == elfcpp::R_ARM_THM_JUMP24)))
3734 Stub_type stub_type =
3735 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3737 if (stub_type != arm_stub_none)
3739 Stub_table<big_endian>* stub_table =
3740 object->stub_table(relinfo->data_shndx);
3741 gold_assert(stub_table != NULL);
3743 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3744 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
3745 gold_assert(stub != NULL);
3746 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3747 branch_target = stub_table->address() + stub->offset() + addend;
3748 branch_offset = branch_target - address;
3752 // At this point, if we still need to switch mode, the instruction
3753 // must either be a BLX or a BL that can be converted to a BLX.
3756 gold_assert(may_use_blx
3757 && (r_type == elfcpp::R_ARM_THM_CALL
3758 || r_type == elfcpp::R_ARM_THM_XPC22));
3759 // Make sure this is a BLX.
3760 lower_insn &= ~0x1000U;
3764 // Make sure this is a BL.
3765 lower_insn |= 0x1000U;
3768 if ((lower_insn & 0x5000U) == 0x4000U)
3769 // For a BLX instruction, make sure that the relocation is rounded up
3770 // to a word boundary. This follows the semantics of the instruction
3771 // which specifies that bit 1 of the target address will come from bit
3772 // 1 of the base address.
3773 branch_offset = (branch_offset + 2) & ~3;
3775 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
3776 // We use the Thumb-2 encoding, which is safe even if dealing with
3777 // a Thumb-1 instruction by virtue of our overflow check above. */
3778 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
3779 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
3781 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3782 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3785 ? utils::has_overflow<25>(branch_offset)
3786 : utils::has_overflow<23>(branch_offset))
3787 ? This::STATUS_OVERFLOW
3788 : This::STATUS_OKAY);
3791 // Relocate THUMB-2 long conditional branches.
3792 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3793 // undefined and we do not use PLT in this relocation. In such a case,
3794 // the branch is converted into an NOP.
3796 template<bool big_endian>
3797 typename Arm_relocate_functions<big_endian>::Status
3798 Arm_relocate_functions<big_endian>::thm_jump19(
3799 unsigned char *view,
3800 const Arm_relobj<big_endian>* object,
3801 const Symbol_value<32>* psymval,
3802 Arm_address address,
3803 Arm_address thumb_bit)
3805 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3806 Valtype* wv = reinterpret_cast<Valtype*>(view);
3807 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3808 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3809 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
3811 Arm_address branch_target = psymval->value(object, addend);
3812 int32_t branch_offset = branch_target - address;
3814 // ??? Should handle interworking? GCC might someday try to
3815 // use this for tail calls.
3816 // FIXME: We do support thumb entry to PLT yet.
3819 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
3820 return This::STATUS_BAD_RELOC;
3823 // Put RELOCATION back into the insn.
3824 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
3825 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
3827 // Put the relocated value back in the object file:
3828 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3829 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3831 return (utils::has_overflow<21>(branch_offset)
3832 ? This::STATUS_OVERFLOW
3833 : This::STATUS_OKAY);
3836 // Get the GOT section, creating it if necessary.
3838 template<bool big_endian>
3839 Output_data_got<32, big_endian>*
3840 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
3842 if (this->got_ == NULL)
3844 gold_assert(symtab != NULL && layout != NULL);
3846 this->got_ = new Output_data_got<32, big_endian>();
3849 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3851 | elfcpp::SHF_WRITE),
3852 this->got_, false, true, true,
3855 // The old GNU linker creates a .got.plt section. We just
3856 // create another set of data in the .got section. Note that we
3857 // always create a PLT if we create a GOT, although the PLT
3859 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
3860 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3862 | elfcpp::SHF_WRITE),
3863 this->got_plt_, false, false,
3866 // The first three entries are reserved.
3867 this->got_plt_->set_current_data_size(3 * 4);
3869 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
3870 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
3871 Symbol_table::PREDEFINED,
3873 0, 0, elfcpp::STT_OBJECT,
3875 elfcpp::STV_HIDDEN, 0,
3881 // Get the dynamic reloc section, creating it if necessary.
3883 template<bool big_endian>
3884 typename Target_arm<big_endian>::Reloc_section*
3885 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
3887 if (this->rel_dyn_ == NULL)
3889 gold_assert(layout != NULL);
3890 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
3891 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
3892 elfcpp::SHF_ALLOC, this->rel_dyn_, true,
3893 false, false, false);
3895 return this->rel_dyn_;
3898 // Insn_template methods.
3900 // Return byte size of an instruction template.
3903 Insn_template::size() const
3905 switch (this->type())
3908 case THUMB16_SPECIAL_TYPE:
3919 // Return alignment of an instruction template.
3922 Insn_template::alignment() const
3924 switch (this->type())
3927 case THUMB16_SPECIAL_TYPE:
3938 // Stub_template methods.
3940 Stub_template::Stub_template(
3941 Stub_type type, const Insn_template* insns,
3943 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
3944 entry_in_thumb_mode_(false), relocs_()
3948 // Compute byte size and alignment of stub template.
3949 for (size_t i = 0; i < insn_count; i++)
3951 unsigned insn_alignment = insns[i].alignment();
3952 size_t insn_size = insns[i].size();
3953 gold_assert((offset & (insn_alignment - 1)) == 0);
3954 this->alignment_ = std::max(this->alignment_, insn_alignment);
3955 switch (insns[i].type())
3957 case Insn_template::THUMB16_TYPE:
3958 case Insn_template::THUMB16_SPECIAL_TYPE:
3960 this->entry_in_thumb_mode_ = true;
3963 case Insn_template::THUMB32_TYPE:
3964 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
3965 this->relocs_.push_back(Reloc(i, offset));
3967 this->entry_in_thumb_mode_ = true;
3970 case Insn_template::ARM_TYPE:
3971 // Handle cases where the target is encoded within the
3973 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
3974 this->relocs_.push_back(Reloc(i, offset));
3977 case Insn_template::DATA_TYPE:
3978 // Entry point cannot be data.
3979 gold_assert(i != 0);
3980 this->relocs_.push_back(Reloc(i, offset));
3986 offset += insn_size;
3988 this->size_ = offset;
3993 // Template to implement do_write for a specific target endianity.
3995 template<bool big_endian>
3997 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
3999 const Stub_template* stub_template = this->stub_template();
4000 const Insn_template* insns = stub_template->insns();
4002 // FIXME: We do not handle BE8 encoding yet.
4003 unsigned char* pov = view;
4004 for (size_t i = 0; i < stub_template->insn_count(); i++)
4006 switch (insns[i].type())
4008 case Insn_template::THUMB16_TYPE:
4009 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4011 case Insn_template::THUMB16_SPECIAL_TYPE:
4012 elfcpp::Swap<16, big_endian>::writeval(
4014 this->thumb16_special(i));
4016 case Insn_template::THUMB32_TYPE:
4018 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4019 uint32_t lo = insns[i].data() & 0xffff;
4020 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4021 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4024 case Insn_template::ARM_TYPE:
4025 case Insn_template::DATA_TYPE:
4026 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4031 pov += insns[i].size();
4033 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4036 // Reloc_stub::Key methods.
4038 // Dump a Key as a string for debugging.
4041 Reloc_stub::Key::name() const
4043 if (this->r_sym_ == invalid_index)
4045 // Global symbol key name
4046 // <stub-type>:<symbol name>:<addend>.
4047 const std::string sym_name = this->u_.symbol->name();
4048 // We need to print two hex number and two colons. So just add 100 bytes
4049 // to the symbol name size.
4050 size_t len = sym_name.size() + 100;
4051 char* buffer = new char[len];
4052 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4053 sym_name.c_str(), this->addend_);
4054 gold_assert(c > 0 && c < static_cast<int>(len));
4056 return std::string(buffer);
4060 // local symbol key name
4061 // <stub-type>:<object>:<r_sym>:<addend>.
4062 const size_t len = 200;
4064 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4065 this->u_.relobj, this->r_sym_, this->addend_);
4066 gold_assert(c > 0 && c < static_cast<int>(len));
4067 return std::string(buffer);
4071 // Reloc_stub methods.
4073 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4074 // LOCATION to DESTINATION.
4075 // This code is based on the arm_type_of_stub function in
4076 // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub
4080 Reloc_stub::stub_type_for_reloc(
4081 unsigned int r_type,
4082 Arm_address location,
4083 Arm_address destination,
4084 bool target_is_thumb)
4086 Stub_type stub_type = arm_stub_none;
4088 // This is a bit ugly but we want to avoid using a templated class for
4089 // big and little endianities.
4091 bool should_force_pic_veneer;
4094 if (parameters->target().is_big_endian())
4096 const Target_arm<true>* big_endian_target =
4097 Target_arm<true>::default_target();
4098 may_use_blx = big_endian_target->may_use_blx();
4099 should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
4100 thumb2 = big_endian_target->using_thumb2();
4101 thumb_only = big_endian_target->using_thumb_only();
4105 const Target_arm<false>* little_endian_target =
4106 Target_arm<false>::default_target();
4107 may_use_blx = little_endian_target->may_use_blx();
4108 should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
4109 thumb2 = little_endian_target->using_thumb2();
4110 thumb_only = little_endian_target->using_thumb_only();
4113 int64_t branch_offset = (int64_t)destination - location;
4115 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4117 // Handle cases where:
4118 // - this call goes too far (different Thumb/Thumb2 max
4120 // - it's a Thumb->Arm call and blx is not available, or it's a
4121 // Thumb->Arm branch (not bl). A stub is needed in this case.
4123 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4124 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4126 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4127 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4128 || ((!target_is_thumb)
4129 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4130 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4132 if (target_is_thumb)
4137 stub_type = (parameters->options().shared()
4138 || should_force_pic_veneer)
4141 && (r_type == elfcpp::R_ARM_THM_CALL))
4142 // V5T and above. Stub starts with ARM code, so
4143 // we must be able to switch mode before
4144 // reaching it, which is only possible for 'bl'
4145 // (ie R_ARM_THM_CALL relocation).
4146 ? arm_stub_long_branch_any_thumb_pic
4147 // On V4T, use Thumb code only.
4148 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4152 && (r_type == elfcpp::R_ARM_THM_CALL))
4153 ? arm_stub_long_branch_any_any // V5T and above.
4154 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4158 stub_type = (parameters->options().shared()
4159 || should_force_pic_veneer)
4160 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4161 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4168 // FIXME: We should check that the input section is from an
4169 // object that has interwork enabled.
4171 stub_type = (parameters->options().shared()
4172 || should_force_pic_veneer)
4175 && (r_type == elfcpp::R_ARM_THM_CALL))
4176 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4177 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4181 && (r_type == elfcpp::R_ARM_THM_CALL))
4182 ? arm_stub_long_branch_any_any // V5T and above.
4183 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4185 // Handle v4t short branches.
4186 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4187 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4188 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4189 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4193 else if (r_type == elfcpp::R_ARM_CALL
4194 || r_type == elfcpp::R_ARM_JUMP24
4195 || r_type == elfcpp::R_ARM_PLT32)
4197 if (target_is_thumb)
4201 // FIXME: We should check that the input section is from an
4202 // object that has interwork enabled.
4204 // We have an extra 2-bytes reach because of
4205 // the mode change (bit 24 (H) of BLX encoding).
4206 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4207 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4208 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4209 || (r_type == elfcpp::R_ARM_JUMP24)
4210 || (r_type == elfcpp::R_ARM_PLT32))
4212 stub_type = (parameters->options().shared()
4213 || should_force_pic_veneer)
4216 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4217 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4221 ? arm_stub_long_branch_any_any // V5T and above.
4222 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4228 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4229 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4231 stub_type = (parameters->options().shared()
4232 || should_force_pic_veneer)
4233 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4234 : arm_stub_long_branch_any_any; /// non-PIC.
4242 // Cortex_a8_stub methods.
4244 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4245 // I is the position of the instruction template in the stub template.
4248 Cortex_a8_stub::do_thumb16_special(size_t i)
4250 // The only use of this is to copy condition code from a conditional
4251 // branch being worked around to the corresponding conditional branch in
4253 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4255 uint16_t data = this->stub_template()->insns()[i].data();
4256 gold_assert((data & 0xff00U) == 0xd000U);
4257 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4261 // Stub_factory methods.
4263 Stub_factory::Stub_factory()
4265 // The instruction template sequences are declared as static
4266 // objects and initialized first time the constructor runs.
4268 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4269 // to reach the stub if necessary.
4270 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4272 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4273 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4274 // dcd R_ARM_ABS32(X)
4277 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4279 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4281 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4282 Insn_template::arm_insn(0xe12fff1c), // bx ip
4283 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4284 // dcd R_ARM_ABS32(X)
4287 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4288 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4290 Insn_template::thumb16_insn(0xb401), // push {r0}
4291 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4292 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4293 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4294 Insn_template::thumb16_insn(0x4760), // bx ip
4295 Insn_template::thumb16_insn(0xbf00), // nop
4296 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4297 // dcd R_ARM_ABS32(X)
4300 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4302 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4304 Insn_template::thumb16_insn(0x4778), // bx pc
4305 Insn_template::thumb16_insn(0x46c0), // nop
4306 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4307 Insn_template::arm_insn(0xe12fff1c), // bx ip
4308 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4309 // dcd R_ARM_ABS32(X)
4312 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4314 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4316 Insn_template::thumb16_insn(0x4778), // bx pc
4317 Insn_template::thumb16_insn(0x46c0), // nop
4318 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4319 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4320 // dcd R_ARM_ABS32(X)
4323 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4324 // one, when the destination is close enough.
4325 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4327 Insn_template::thumb16_insn(0x4778), // bx pc
4328 Insn_template::thumb16_insn(0x46c0), // nop
4329 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4332 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4333 // blx to reach the stub if necessary.
4334 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4336 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4337 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4338 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4339 // dcd R_ARM_REL32(X-4)
4342 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4343 // blx to reach the stub if necessary. We can not add into pc;
4344 // it is not guaranteed to mode switch (different in ARMv6 and
4346 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4348 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4349 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4350 Insn_template::arm_insn(0xe12fff1c), // bx ip
4351 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4352 // dcd R_ARM_REL32(X)
4355 // V4T ARM -> ARM long branch stub, PIC.
4356 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4358 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4359 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4360 Insn_template::arm_insn(0xe12fff1c), // bx ip
4361 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4362 // dcd R_ARM_REL32(X)
4365 // V4T Thumb -> ARM long branch stub, PIC.
4366 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4368 Insn_template::thumb16_insn(0x4778), // bx pc
4369 Insn_template::thumb16_insn(0x46c0), // nop
4370 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4371 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4372 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4373 // dcd R_ARM_REL32(X)
4376 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4378 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4380 Insn_template::thumb16_insn(0xb401), // push {r0}
4381 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4382 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4383 Insn_template::thumb16_insn(0x4484), // add ip, r0
4384 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4385 Insn_template::thumb16_insn(0x4760), // bx ip
4386 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4387 // dcd R_ARM_REL32(X)
4390 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4392 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4394 Insn_template::thumb16_insn(0x4778), // bx pc
4395 Insn_template::thumb16_insn(0x46c0), // nop
4396 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4397 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4398 Insn_template::arm_insn(0xe12fff1c), // bx ip
4399 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4400 // dcd R_ARM_REL32(X)
4403 // Cortex-A8 erratum-workaround stubs.
4405 // Stub used for conditional branches (which may be beyond +/-1MB away,
4406 // so we can't use a conditional branch to reach this stub).
4413 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4415 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4416 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4417 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4421 // Stub used for b.w and bl.w instructions.
4423 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4425 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4428 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4430 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4433 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4434 // instruction (which switches to ARM mode) to point to this stub. Jump to
4435 // the real destination using an ARM-mode branch.
4436 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4438 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4441 // Stub used to provide an interworking for R_ARM_V4BX relocation
4442 // (bx r[n] instruction).
4443 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4445 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4446 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4447 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4450 // Fill in the stub template look-up table. Stub templates are constructed
4451 // per instance of Stub_factory for fast look-up without locking
4452 // in a thread-enabled environment.
4454 this->stub_templates_[arm_stub_none] =
4455 new Stub_template(arm_stub_none, NULL, 0);
4457 #define DEF_STUB(x) \
4461 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4462 Stub_type type = arm_stub_##x; \
4463 this->stub_templates_[type] = \
4464 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4472 // Stub_table methods.
4474 // Removel all Cortex-A8 stub.
4476 template<bool big_endian>
4478 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4480 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4481 p != this->cortex_a8_stubs_.end();
4484 this->cortex_a8_stubs_.clear();
4487 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4489 template<bool big_endian>
4491 Stub_table<big_endian>::relocate_stub(
4493 const Relocate_info<32, big_endian>* relinfo,
4494 Target_arm<big_endian>* arm_target,
4495 Output_section* output_section,
4496 unsigned char* view,
4497 Arm_address address,
4498 section_size_type view_size)
4500 const Stub_template* stub_template = stub->stub_template();
4501 if (stub_template->reloc_count() != 0)
4503 // Adjust view to cover the stub only.
4504 section_size_type offset = stub->offset();
4505 section_size_type stub_size = stub_template->size();
4506 gold_assert(offset + stub_size <= view_size);
4508 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4509 address + offset, stub_size);
4513 // Relocate all stubs in this stub table.
4515 template<bool big_endian>
4517 Stub_table<big_endian>::relocate_stubs(
4518 const Relocate_info<32, big_endian>* relinfo,
4519 Target_arm<big_endian>* arm_target,
4520 Output_section* output_section,
4521 unsigned char* view,
4522 Arm_address address,
4523 section_size_type view_size)
4525 // If we are passed a view bigger than the stub table's. we need to
4527 gold_assert(address == this->address()
4529 == static_cast<section_size_type>(this->data_size())));
4531 // Relocate all relocation stubs.
4532 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4533 p != this->reloc_stubs_.end();
4535 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4536 address, view_size);
4538 // Relocate all Cortex-A8 stubs.
4539 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4540 p != this->cortex_a8_stubs_.end();
4542 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4543 address, view_size);
4545 // Relocate all ARM V4BX stubs.
4546 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
4547 p != this->arm_v4bx_stubs_.end();
4551 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
4552 address, view_size);
4556 // Write out the stubs to file.
4558 template<bool big_endian>
4560 Stub_table<big_endian>::do_write(Output_file* of)
4562 off_t offset = this->offset();
4563 const section_size_type oview_size =
4564 convert_to_section_size_type(this->data_size());
4565 unsigned char* const oview = of->get_output_view(offset, oview_size);
4567 // Write relocation stubs.
4568 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4569 p != this->reloc_stubs_.end();
4572 Reloc_stub* stub = p->second;
4573 Arm_address address = this->address() + stub->offset();
4575 == align_address(address,
4576 stub->stub_template()->alignment()));
4577 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4581 // Write Cortex-A8 stubs.
4582 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4583 p != this->cortex_a8_stubs_.end();
4586 Cortex_a8_stub* stub = p->second;
4587 Arm_address address = this->address() + stub->offset();
4589 == align_address(address,
4590 stub->stub_template()->alignment()));
4591 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4595 // Write ARM V4BX relocation stubs.
4596 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4597 p != this->arm_v4bx_stubs_.end();
4603 Arm_address address = this->address() + (*p)->offset();
4605 == align_address(address,
4606 (*p)->stub_template()->alignment()));
4607 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
4611 of->write_output_view(this->offset(), oview_size, oview);
4614 // Update the data size and address alignment of the stub table at the end
4615 // of a relaxation pass. Return true if either the data size or the
4616 // alignment changed in this relaxation pass.
4618 template<bool big_endian>
4620 Stub_table<big_endian>::update_data_size_and_addralign()
4623 unsigned addralign = 1;
4625 // Go over all stubs in table to compute data size and address alignment.
4627 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4628 p != this->reloc_stubs_.end();
4631 const Stub_template* stub_template = p->second->stub_template();
4632 addralign = std::max(addralign, stub_template->alignment());
4633 size = (align_address(size, stub_template->alignment())
4634 + stub_template->size());
4637 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4638 p != this->cortex_a8_stubs_.end();
4641 const Stub_template* stub_template = p->second->stub_template();
4642 addralign = std::max(addralign, stub_template->alignment());
4643 size = (align_address(size, stub_template->alignment())
4644 + stub_template->size());
4647 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4648 p != this->arm_v4bx_stubs_.end();
4654 const Stub_template* stub_template = (*p)->stub_template();
4655 addralign = std::max(addralign, stub_template->alignment());
4656 size = (align_address(size, stub_template->alignment())
4657 + stub_template->size());
4660 // Check if either data size or alignment changed in this pass.
4661 // Update prev_data_size_ and prev_addralign_. These will be used
4662 // as the current data size and address alignment for the next pass.
4663 bool changed = size != this->prev_data_size_;
4664 this->prev_data_size_ = size;
4666 if (addralign != this->prev_addralign_)
4668 this->prev_addralign_ = addralign;
4673 // Finalize the stubs. This sets the offsets of the stubs within the stub
4674 // table. It also marks all input sections needing Cortex-A8 workaround.
4676 template<bool big_endian>
4678 Stub_table<big_endian>::finalize_stubs()
4681 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4682 p != this->reloc_stubs_.end();
4685 Reloc_stub* stub = p->second;
4686 const Stub_template* stub_template = stub->stub_template();
4687 uint64_t stub_addralign = stub_template->alignment();
4688 off = align_address(off, stub_addralign);
4689 stub->set_offset(off);
4690 off += stub_template->size();
4693 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4694 p != this->cortex_a8_stubs_.end();
4697 Cortex_a8_stub* stub = p->second;
4698 const Stub_template* stub_template = stub->stub_template();
4699 uint64_t stub_addralign = stub_template->alignment();
4700 off = align_address(off, stub_addralign);
4701 stub->set_offset(off);
4702 off += stub_template->size();
4704 // Mark input section so that we can determine later if a code section
4705 // needs the Cortex-A8 workaround quickly.
4706 Arm_relobj<big_endian>* arm_relobj =
4707 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
4708 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
4711 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4712 p != this->arm_v4bx_stubs_.end();
4718 const Stub_template* stub_template = (*p)->stub_template();
4719 uint64_t stub_addralign = stub_template->alignment();
4720 off = align_address(off, stub_addralign);
4721 (*p)->set_offset(off);
4722 off += stub_template->size();
4725 gold_assert(off <= this->prev_data_size_);
4728 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
4729 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
4730 // of the address range seen by the linker.
4732 template<bool big_endian>
4734 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
4735 Target_arm<big_endian>* arm_target,
4736 unsigned char* view,
4737 Arm_address view_address,
4738 section_size_type view_size)
4740 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
4741 for (Cortex_a8_stub_list::const_iterator p =
4742 this->cortex_a8_stubs_.lower_bound(view_address);
4743 ((p != this->cortex_a8_stubs_.end())
4744 && (p->first < (view_address + view_size)));
4747 // We do not store the THUMB bit in the LSB of either the branch address
4748 // or the stub offset. There is no need to strip the LSB.
4749 Arm_address branch_address = p->first;
4750 const Cortex_a8_stub* stub = p->second;
4751 Arm_address stub_address = this->address() + stub->offset();
4753 // Offset of the branch instruction relative to this view.
4754 section_size_type offset =
4755 convert_to_section_size_type(branch_address - view_address);
4756 gold_assert((offset + 4) <= view_size);
4758 arm_target->apply_cortex_a8_workaround(stub, stub_address,
4759 view + offset, branch_address);
4763 // Arm_input_section methods.
4765 // Initialize an Arm_input_section.
4767 template<bool big_endian>
4769 Arm_input_section<big_endian>::init()
4771 Relobj* relobj = this->relobj();
4772 unsigned int shndx = this->shndx();
4774 // Cache these to speed up size and alignment queries. It is too slow
4775 // to call section_addraglin and section_size every time.
4776 this->original_addralign_ = relobj->section_addralign(shndx);
4777 this->original_size_ = relobj->section_size(shndx);
4779 // We want to make this look like the original input section after
4780 // output sections are finalized.
4781 Output_section* os = relobj->output_section(shndx);
4782 off_t offset = relobj->output_section_offset(shndx);
4783 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
4784 this->set_address(os->address() + offset);
4785 this->set_file_offset(os->offset() + offset);
4787 this->set_current_data_size(this->original_size_);
4788 this->finalize_data_size();
4791 template<bool big_endian>
4793 Arm_input_section<big_endian>::do_write(Output_file* of)
4795 // We have to write out the original section content.
4796 section_size_type section_size;
4797 const unsigned char* section_contents =
4798 this->relobj()->section_contents(this->shndx(), §ion_size, false);
4799 of->write(this->offset(), section_contents, section_size);
4801 // If this owns a stub table and it is not empty, write it.
4802 if (this->is_stub_table_owner() && !this->stub_table_->empty())
4803 this->stub_table_->write(of);
4806 // Finalize data size.
4808 template<bool big_endian>
4810 Arm_input_section<big_endian>::set_final_data_size()
4812 // If this owns a stub table, finalize its data size as well.
4813 if (this->is_stub_table_owner())
4815 uint64_t address = this->address();
4817 // The stub table comes after the original section contents.
4818 address += this->original_size_;
4819 address = align_address(address, this->stub_table_->addralign());
4820 off_t offset = this->offset() + (address - this->address());
4821 this->stub_table_->set_address_and_file_offset(address, offset);
4822 address += this->stub_table_->data_size();
4823 gold_assert(address == this->address() + this->current_data_size());
4826 this->set_data_size(this->current_data_size());
4829 // Reset address and file offset.
4831 template<bool big_endian>
4833 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
4835 // Size of the original input section contents.
4836 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
4838 // If this is a stub table owner, account for the stub table size.
4839 if (this->is_stub_table_owner())
4841 Stub_table<big_endian>* stub_table = this->stub_table_;
4843 // Reset the stub table's address and file offset. The
4844 // current data size for child will be updated after that.
4845 stub_table_->reset_address_and_file_offset();
4846 off = align_address(off, stub_table_->addralign());
4847 off += stub_table->current_data_size();
4850 this->set_current_data_size(off);
4853 // Arm_exidx_cantunwind methods.
4855 // Write this to Output file OF for a fixed endianity.
4857 template<bool big_endian>
4859 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
4861 off_t offset = this->offset();
4862 const section_size_type oview_size = 8;
4863 unsigned char* const oview = of->get_output_view(offset, oview_size);
4865 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
4866 Valtype* wv = reinterpret_cast<Valtype*>(oview);
4868 Output_section* os = this->relobj_->output_section(this->shndx_);
4869 gold_assert(os != NULL);
4871 Arm_relobj<big_endian>* arm_relobj =
4872 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
4873 Arm_address output_offset =
4874 arm_relobj->get_output_section_offset(this->shndx_);
4875 Arm_address section_start;
4876 if(output_offset != Arm_relobj<big_endian>::invalid_address)
4877 section_start = os->address() + output_offset;
4880 // Currently this only happens for a relaxed section.
4881 const Output_relaxed_input_section* poris =
4882 os->find_relaxed_input_section(this->relobj_, this->shndx_);
4883 gold_assert(poris != NULL);
4884 section_start = poris->address();
4887 // We always append this to the end of an EXIDX section.
4888 Arm_address output_address =
4889 section_start + this->relobj_->section_size(this->shndx_);
4891 // Write out the entry. The first word either points to the beginning
4892 // or after the end of a text section. The second word is the special
4893 // EXIDX_CANTUNWIND value.
4894 uint32_t prel31_offset = output_address - this->address();
4895 if (utils::has_overflow<31>(offset))
4896 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
4897 elfcpp::Swap<32, big_endian>::writeval(wv, prel31_offset & 0x7fffffffU);
4898 elfcpp::Swap<32, big_endian>::writeval(wv + 1, elfcpp::EXIDX_CANTUNWIND);
4900 of->write_output_view(this->offset(), oview_size, oview);
4903 // Arm_exidx_merged_section methods.
4905 // Constructor for Arm_exidx_merged_section.
4906 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
4907 // SECTION_OFFSET_MAP points to a section offset map describing how
4908 // parts of the input section are mapped to output. DELETED_BYTES is
4909 // the number of bytes deleted from the EXIDX input section.
4911 Arm_exidx_merged_section::Arm_exidx_merged_section(
4912 const Arm_exidx_input_section& exidx_input_section,
4913 const Arm_exidx_section_offset_map& section_offset_map,
4914 uint32_t deleted_bytes)
4915 : Output_relaxed_input_section(exidx_input_section.relobj(),
4916 exidx_input_section.shndx(),
4917 exidx_input_section.addralign()),
4918 exidx_input_section_(exidx_input_section),
4919 section_offset_map_(section_offset_map)
4921 // Fix size here so that we do not need to implement set_final_data_size.
4922 this->set_data_size(exidx_input_section.size() - deleted_bytes);
4923 this->fix_data_size();
4926 // Given an input OBJECT, an input section index SHNDX within that
4927 // object, and an OFFSET relative to the start of that input
4928 // section, return whether or not the corresponding offset within
4929 // the output section is known. If this function returns true, it
4930 // sets *POUTPUT to the output offset. The value -1 indicates that
4931 // this input offset is being discarded.
4934 Arm_exidx_merged_section::do_output_offset(
4935 const Relobj* relobj,
4937 section_offset_type offset,
4938 section_offset_type* poutput) const
4940 // We only handle offsets for the original EXIDX input section.
4941 if (relobj != this->exidx_input_section_.relobj()
4942 || shndx != this->exidx_input_section_.shndx())
4945 section_offset_type section_size =
4946 convert_types<section_offset_type>(this->exidx_input_section_.size());
4947 if (offset < 0 || offset >= section_size)
4948 // Input offset is out of valid range.
4952 // We need to look up the section offset map to determine the output
4953 // offset. Find the reference point in map that is first offset
4954 // bigger than or equal to this offset.
4955 Arm_exidx_section_offset_map::const_iterator p =
4956 this->section_offset_map_.lower_bound(offset);
4958 // The section offset maps are build such that this should not happen if
4959 // input offset is in the valid range.
4960 gold_assert(p != this->section_offset_map_.end());
4962 // We need to check if this is dropped.
4963 section_offset_type ref = p->first;
4964 section_offset_type mapped_ref = p->second;
4966 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
4967 // Offset is present in output.
4968 *poutput = mapped_ref + (offset - ref);
4970 // Offset is discarded owing to EXIDX entry merging.
4977 // Write this to output file OF.
4980 Arm_exidx_merged_section::do_write(Output_file* of)
4982 // If we retain or discard the whole EXIDX input section, we would
4984 gold_assert(this->data_size() != this->exidx_input_section_.size()
4985 && this->data_size() != 0);
4987 off_t offset = this->offset();
4988 const section_size_type oview_size = this->data_size();
4989 unsigned char* const oview = of->get_output_view(offset, oview_size);
4991 Output_section* os = this->relobj()->output_section(this->shndx());
4992 gold_assert(os != NULL);
4994 // Get contents of EXIDX input section.
4995 section_size_type section_size;
4996 const unsigned char* section_contents =
4997 this->relobj()->section_contents(this->shndx(), §ion_size, false);
4998 gold_assert(section_size == this->exidx_input_section_.size());
5000 // Go over spans of input offsets and write only those that are not
5002 section_offset_type in_start = 0;
5003 section_offset_type out_start = 0;
5004 for(Arm_exidx_section_offset_map::const_iterator p =
5005 this->section_offset_map_.begin();
5006 p != this->section_offset_map_.end();
5009 section_offset_type in_end = p->first;
5010 gold_assert(in_end >= in_start);
5011 section_offset_type out_end = p->second;
5012 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5015 size_t out_chunk_size =
5016 convert_types<size_t>(out_end - out_start + 1);
5017 gold_assert(out_chunk_size == in_chunk_size);
5018 memcpy(oview + out_start, section_contents + in_start,
5020 out_start += out_chunk_size;
5022 in_start += in_chunk_size;
5025 gold_assert(convert_to_section_size_type(out_start) == oview_size);
5026 of->write_output_view(this->offset(), oview_size, oview);
5029 // Arm_exidx_fixup methods.
5031 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5032 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5033 // points to the end of the last seen EXIDX section.
5036 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5038 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5039 && this->last_input_section_ != NULL)
5041 Relobj* relobj = this->last_input_section_->relobj();
5042 unsigned int text_shndx = this->last_input_section_->link();
5043 Arm_exidx_cantunwind* cantunwind =
5044 new Arm_exidx_cantunwind(relobj, text_shndx);
5045 this->exidx_output_section_->add_output_section_data(cantunwind);
5046 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5050 // Process an EXIDX section entry in input. Return whether this entry
5051 // can be deleted in the output. SECOND_WORD in the second word of the
5055 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5058 if (second_word == elfcpp::EXIDX_CANTUNWIND)
5060 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5061 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5062 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5064 else if ((second_word & 0x80000000) != 0)
5066 // Inlined unwinding data. Merge if equal to previous.
5067 delete_entry = (this->last_unwind_type_ == UT_INLINED_ENTRY
5068 && this->last_inlined_entry_ == second_word);
5069 this->last_unwind_type_ = UT_INLINED_ENTRY;
5070 this->last_inlined_entry_ = second_word;
5074 // Normal table entry. In theory we could merge these too,
5075 // but duplicate entries are likely to be much less common.
5076 delete_entry = false;
5077 this->last_unwind_type_ = UT_NORMAL_ENTRY;
5079 return delete_entry;
5082 // Update the current section offset map during EXIDX section fix-up.
5083 // If there is no map, create one. INPUT_OFFSET is the offset of a
5084 // reference point, DELETED_BYTES is the number of deleted by in the
5085 // section so far. If DELETE_ENTRY is true, the reference point and
5086 // all offsets after the previous reference point are discarded.
5089 Arm_exidx_fixup::update_offset_map(
5090 section_offset_type input_offset,
5091 section_size_type deleted_bytes,
5094 if (this->section_offset_map_ == NULL)
5095 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5096 section_offset_type output_offset = (delete_entry
5098 : input_offset - deleted_bytes);
5099 (*this->section_offset_map_)[input_offset] = output_offset;
5102 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5103 // bytes deleted. If some entries are merged, also store a pointer to a newly
5104 // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The
5105 // caller owns the map and is responsible for releasing it after use.
5107 template<bool big_endian>
5109 Arm_exidx_fixup::process_exidx_section(
5110 const Arm_exidx_input_section* exidx_input_section,
5111 Arm_exidx_section_offset_map** psection_offset_map)
5113 Relobj* relobj = exidx_input_section->relobj();
5114 unsigned shndx = exidx_input_section->shndx();
5115 section_size_type section_size;
5116 const unsigned char* section_contents =
5117 relobj->section_contents(shndx, §ion_size, false);
5119 if ((section_size % 8) != 0)
5121 // Something is wrong with this section. Better not touch it.
5122 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5123 relobj->name().c_str(), shndx);
5124 this->last_input_section_ = exidx_input_section;
5125 this->last_unwind_type_ = UT_NONE;
5129 uint32_t deleted_bytes = 0;
5130 bool prev_delete_entry = false;
5131 gold_assert(this->section_offset_map_ == NULL);
5133 for (section_size_type i = 0; i < section_size; i += 8)
5135 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5137 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5138 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5140 bool delete_entry = this->process_exidx_entry(second_word);
5142 // Entry deletion causes changes in output offsets. We use a std::map
5143 // to record these. And entry (x, y) means input offset x
5144 // is mapped to output offset y. If y is invalid_offset, then x is
5145 // dropped in the output. Because of the way std::map::lower_bound
5146 // works, we record the last offset in a region w.r.t to keeping or
5147 // dropping. If there is no entry (x0, y0) for an input offset x0,
5148 // the output offset y0 of it is determined by the output offset y1 of
5149 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5150 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1
5152 if (delete_entry != prev_delete_entry && i != 0)
5153 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5155 // Update total deleted bytes for this entry.
5159 prev_delete_entry = delete_entry;
5162 // If section offset map is not NULL, make an entry for the end of
5164 if (this->section_offset_map_ != NULL)
5165 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5167 *psection_offset_map = this->section_offset_map_;
5168 this->section_offset_map_ = NULL;
5169 this->last_input_section_ = exidx_input_section;
5171 // Set the first output text section so that we can link the EXIDX output
5172 // section to it. Ignore any EXIDX input section that is completely merged.
5173 if (this->first_output_text_section_ == NULL
5174 && deleted_bytes != section_size)
5176 unsigned int link = exidx_input_section->link();
5177 Output_section* os = relobj->output_section(link);
5178 gold_assert(os != NULL);
5179 this->first_output_text_section_ = os;
5182 return deleted_bytes;
5185 // Arm_output_section methods.
5187 // Create a stub group for input sections from BEGIN to END. OWNER
5188 // points to the input section to be the owner a new stub table.
5190 template<bool big_endian>
5192 Arm_output_section<big_endian>::create_stub_group(
5193 Input_section_list::const_iterator begin,
5194 Input_section_list::const_iterator end,
5195 Input_section_list::const_iterator owner,
5196 Target_arm<big_endian>* target,
5197 std::vector<Output_relaxed_input_section*>* new_relaxed_sections)
5199 // We use a different kind of relaxed section in an EXIDX section.
5200 // The static casting from Output_relaxed_input_section to
5201 // Arm_input_section is invalid in an EXIDX section. We are okay
5202 // because we should not be calling this for an EXIDX section.
5203 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5205 // Currently we convert ordinary input sections into relaxed sections only
5206 // at this point but we may want to support creating relaxed input section
5207 // very early. So we check here to see if owner is already a relaxed
5210 Arm_input_section<big_endian>* arm_input_section;
5211 if (owner->is_relaxed_input_section())
5214 Arm_input_section<big_endian>::as_arm_input_section(
5215 owner->relaxed_input_section());
5219 gold_assert(owner->is_input_section());
5220 // Create a new relaxed input section.
5222 target->new_arm_input_section(owner->relobj(), owner->shndx());
5223 new_relaxed_sections->push_back(arm_input_section);
5226 // Create a stub table.
5227 Stub_table<big_endian>* stub_table =
5228 target->new_stub_table(arm_input_section);
5230 arm_input_section->set_stub_table(stub_table);
5232 Input_section_list::const_iterator p = begin;
5233 Input_section_list::const_iterator prev_p;
5235 // Look for input sections or relaxed input sections in [begin ... end].
5238 if (p->is_input_section() || p->is_relaxed_input_section())
5240 // The stub table information for input sections live
5241 // in their objects.
5242 Arm_relobj<big_endian>* arm_relobj =
5243 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5244 arm_relobj->set_stub_table(p->shndx(), stub_table);
5248 while (prev_p != end);
5251 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5252 // of stub groups. We grow a stub group by adding input section until the
5253 // size is just below GROUP_SIZE. The last input section will be converted
5254 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5255 // input section after the stub table, effectively double the group size.
5257 // This is similar to the group_sections() function in elf32-arm.c but is
5258 // implemented differently.
5260 template<bool big_endian>
5262 Arm_output_section<big_endian>::group_sections(
5263 section_size_type group_size,
5264 bool stubs_always_after_branch,
5265 Target_arm<big_endian>* target)
5267 // We only care about sections containing code.
5268 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5271 // States for grouping.
5274 // No group is being built.
5276 // A group is being built but the stub table is not found yet.
5277 // We keep group a stub group until the size is just under GROUP_SIZE.
5278 // The last input section in the group will be used as the stub table.
5279 FINDING_STUB_SECTION,
5280 // A group is being built and we have already found a stub table.
5281 // We enter this state to grow a stub group by adding input section
5282 // after the stub table. This effectively doubles the group size.
5286 // Any newly created relaxed sections are stored here.
5287 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5289 State state = NO_GROUP;
5290 section_size_type off = 0;
5291 section_size_type group_begin_offset = 0;
5292 section_size_type group_end_offset = 0;
5293 section_size_type stub_table_end_offset = 0;
5294 Input_section_list::const_iterator group_begin =
5295 this->input_sections().end();
5296 Input_section_list::const_iterator stub_table =
5297 this->input_sections().end();
5298 Input_section_list::const_iterator group_end = this->input_sections().end();
5299 for (Input_section_list::const_iterator p = this->input_sections().begin();
5300 p != this->input_sections().end();
5303 section_size_type section_begin_offset =
5304 align_address(off, p->addralign());
5305 section_size_type section_end_offset =
5306 section_begin_offset + p->data_size();
5308 // Check to see if we should group the previously seens sections.
5314 case FINDING_STUB_SECTION:
5315 // Adding this section makes the group larger than GROUP_SIZE.
5316 if (section_end_offset - group_begin_offset >= group_size)
5318 if (stubs_always_after_branch)
5320 gold_assert(group_end != this->input_sections().end());
5321 this->create_stub_group(group_begin, group_end, group_end,
5322 target, &new_relaxed_sections);
5327 // But wait, there's more! Input sections up to
5328 // stub_group_size bytes after the stub table can be
5329 // handled by it too.
5330 state = HAS_STUB_SECTION;
5331 stub_table = group_end;
5332 stub_table_end_offset = group_end_offset;
5337 case HAS_STUB_SECTION:
5338 // Adding this section makes the post stub-section group larger
5340 if (section_end_offset - stub_table_end_offset >= group_size)
5342 gold_assert(group_end != this->input_sections().end());
5343 this->create_stub_group(group_begin, group_end, stub_table,
5344 target, &new_relaxed_sections);
5353 // If we see an input section and currently there is no group, start
5354 // a new one. Skip any empty sections.
5355 if ((p->is_input_section() || p->is_relaxed_input_section())
5356 && (p->relobj()->section_size(p->shndx()) != 0))
5358 if (state == NO_GROUP)
5360 state = FINDING_STUB_SECTION;
5362 group_begin_offset = section_begin_offset;
5365 // Keep track of the last input section seen.
5367 group_end_offset = section_end_offset;
5370 off = section_end_offset;
5373 // Create a stub group for any ungrouped sections.
5374 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5376 gold_assert(group_end != this->input_sections().end());
5377 this->create_stub_group(group_begin, group_end,
5378 (state == FINDING_STUB_SECTION
5381 target, &new_relaxed_sections);
5384 // Convert input section into relaxed input section in a batch.
5385 if (!new_relaxed_sections.empty())
5386 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5388 // Update the section offsets
5389 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5391 Arm_relobj<big_endian>* arm_relobj =
5392 Arm_relobj<big_endian>::as_arm_relobj(
5393 new_relaxed_sections[i]->relobj());
5394 unsigned int shndx = new_relaxed_sections[i]->shndx();
5395 // Tell Arm_relobj that this input section is converted.
5396 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5400 // Append non empty text sections in this to LIST in ascending
5401 // order of their position in this.
5403 template<bool big_endian>
5405 Arm_output_section<big_endian>::append_text_sections_to_list(
5406 Text_section_list* list)
5408 // We only care about text sections.
5409 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5412 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5414 for (Input_section_list::const_iterator p = this->input_sections().begin();
5415 p != this->input_sections().end();
5418 // We only care about plain or relaxed input sections. We also
5419 // ignore any merged sections.
5420 if ((p->is_input_section() || p->is_relaxed_input_section())
5421 && p->data_size() != 0)
5422 list->push_back(Text_section_list::value_type(p->relobj(),
5427 template<bool big_endian>
5429 Arm_output_section<big_endian>::fix_exidx_coverage(
5430 const Text_section_list& sorted_text_sections,
5431 Symbol_table* symtab)
5433 // We should only do this for the EXIDX output section.
5434 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5436 // We don't want the relaxation loop to undo these changes, so we discard
5437 // the current saved states and take another one after the fix-up.
5438 this->discard_states();
5440 // Remove all input sections.
5441 uint64_t address = this->address();
5442 typedef std::list<Simple_input_section> Simple_input_section_list;
5443 Simple_input_section_list input_sections;
5444 this->reset_address_and_file_offset();
5445 this->get_input_sections(address, std::string(""), &input_sections);
5447 if (!this->input_sections().empty())
5448 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5450 // Go through all the known input sections and record them.
5451 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5452 Section_id_set known_input_sections;
5453 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5454 p != input_sections.end();
5457 // This should never happen. At this point, we should only see
5458 // plain EXIDX input sections.
5459 gold_assert(!p->is_relaxed_input_section());
5460 known_input_sections.insert(Section_id(p->relobj(), p->shndx()));
5463 Arm_exidx_fixup exidx_fixup(this);
5465 // Go over the sorted text sections.
5466 Section_id_set processed_input_sections;
5467 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5468 p != sorted_text_sections.end();
5471 Relobj* relobj = p->first;
5472 unsigned int shndx = p->second;
5474 Arm_relobj<big_endian>* arm_relobj =
5475 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5476 const Arm_exidx_input_section* exidx_input_section =
5477 arm_relobj->exidx_input_section_by_link(shndx);
5479 // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND
5480 // entry pointing to the end of the last seen EXIDX section.
5481 if (exidx_input_section == NULL)
5483 exidx_fixup.add_exidx_cantunwind_as_needed();
5487 Relobj* exidx_relobj = exidx_input_section->relobj();
5488 unsigned int exidx_shndx = exidx_input_section->shndx();
5489 Section_id sid(exidx_relobj, exidx_shndx);
5490 if (known_input_sections.find(sid) == known_input_sections.end())
5492 // This is odd. We have not seen this EXIDX input section before.
5493 // We cannot do fix-up.
5494 gold_error(_("EXIDX section %u of %s is not in EXIDX output section"),
5495 exidx_shndx, exidx_relobj->name().c_str());
5496 exidx_fixup.add_exidx_cantunwind_as_needed();
5500 // Fix up coverage and append input section to output data list.
5501 Arm_exidx_section_offset_map* section_offset_map = NULL;
5502 uint32_t deleted_bytes =
5503 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5504 §ion_offset_map);
5506 if (deleted_bytes == exidx_input_section->size())
5508 // The whole EXIDX section got merged. Remove it from output.
5509 gold_assert(section_offset_map == NULL);
5510 exidx_relobj->set_output_section(exidx_shndx, NULL);
5512 // All local symbols defined in this input section will be dropped.
5513 // We need to adjust output local symbol count.
5514 arm_relobj->set_output_local_symbol_count_needs_update();
5516 else if (deleted_bytes > 0)
5518 // Some entries are merged. We need to convert this EXIDX input
5519 // section into a relaxed section.
5520 gold_assert(section_offset_map != NULL);
5521 Arm_exidx_merged_section* merged_section =
5522 new Arm_exidx_merged_section(*exidx_input_section,
5523 *section_offset_map, deleted_bytes);
5524 this->add_relaxed_input_section(merged_section);
5525 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
5527 // All local symbols defined in discarded portions of this input
5528 // section will be dropped. We need to adjust output local symbol
5530 arm_relobj->set_output_local_symbol_count_needs_update();
5534 // Just add back the EXIDX input section.
5535 gold_assert(section_offset_map == NULL);
5536 Output_section::Simple_input_section sis(exidx_relobj, exidx_shndx);
5537 this->add_simple_input_section(sis, exidx_input_section->size(),
5538 exidx_input_section->addralign());
5541 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
5544 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5545 exidx_fixup.add_exidx_cantunwind_as_needed();
5547 // Remove any known EXIDX input sections that are not processed.
5548 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5549 p != input_sections.end();
5552 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
5553 == processed_input_sections.end())
5555 // We only discard a known EXIDX section because its linked
5556 // text section has been folded by ICF.
5557 Arm_relobj<big_endian>* arm_relobj =
5558 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5559 const Arm_exidx_input_section* exidx_input_section =
5560 arm_relobj->exidx_input_section_by_shndx(p->shndx());
5561 gold_assert(exidx_input_section != NULL);
5562 unsigned int text_shndx = exidx_input_section->link();
5563 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
5565 // Remove this from link.
5566 p->relobj()->set_output_section(p->shndx(), NULL);
5570 // Link exidx output section to the first seen output section and
5571 // set correct entry size.
5572 this->set_link_section(exidx_fixup.first_output_text_section());
5573 this->set_entsize(8);
5575 // Make changes permanent.
5576 this->save_states();
5577 this->set_section_offsets_need_adjustment();
5580 // Arm_relobj methods.
5582 // Determine if we want to scan the SHNDX-th section for relocation stubs.
5583 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5585 template<bool big_endian>
5587 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
5588 const elfcpp::Shdr<32, big_endian>& shdr,
5589 const Relobj::Output_sections& out_sections,
5590 const Symbol_table *symtab,
5591 const unsigned char* pshdrs)
5593 unsigned int sh_type = shdr.get_sh_type();
5594 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
5597 // Ignore empty section.
5598 off_t sh_size = shdr.get_sh_size();
5602 // Ignore reloc section with bad info. This error will be
5603 // reported in the final link.
5604 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5605 if (index >= this->shnum())
5608 // This relocation section is against a section which we
5609 // discarded or if the section is folded into another
5610 // section due to ICF.
5611 if (out_sections[index] == NULL || symtab->is_section_folded(this, index))
5614 // Check the section to which relocations are applied. Ignore relocations
5615 // to unallocated sections or EXIDX sections.
5616 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5617 const elfcpp::Shdr<32, big_endian> data_shdr(pshdrs + index * shdr_size);
5618 if ((data_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
5619 || data_shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
5622 // Ignore reloc section with unexpected symbol table. The
5623 // error will be reported in the final link.
5624 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
5627 unsigned int reloc_size;
5628 if (sh_type == elfcpp::SHT_REL)
5629 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5631 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5633 // Ignore reloc section with unexpected entsize or uneven size.
5634 // The error will be reported in the final link.
5635 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
5641 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
5642 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5644 template<bool big_endian>
5646 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
5647 const elfcpp::Shdr<32, big_endian>& shdr,
5650 const Symbol_table* symtab)
5652 // We only scan non-empty code sections.
5653 if ((shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0
5654 || shdr.get_sh_size() == 0)
5657 // Ignore discarded or ICF'ed sections.
5658 if (os == NULL || symtab->is_section_folded(this, shndx))
5661 // Find output address of section.
5662 Arm_address address = os->output_address(this, shndx, 0);
5664 // If the section does not cross any 4K-boundaries, it does not need to
5666 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
5672 // Scan a section for Cortex-A8 workaround.
5674 template<bool big_endian>
5676 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
5677 const elfcpp::Shdr<32, big_endian>& shdr,
5680 Target_arm<big_endian>* arm_target)
5682 Arm_address output_address = os->output_address(this, shndx, 0);
5684 // Get the section contents.
5685 section_size_type input_view_size = 0;
5686 const unsigned char* input_view =
5687 this->section_contents(shndx, &input_view_size, false);
5689 // We need to go through the mapping symbols to determine what to
5690 // scan. There are two reasons. First, we should look at THUMB code and
5691 // THUMB code only. Second, we only want to look at the 4K-page boundary
5692 // to speed up the scanning.
5694 // Look for the first mapping symbol in this section. It should be
5696 Mapping_symbol_position section_start(shndx, 0);
5697 typename Mapping_symbols_info::const_iterator p =
5698 this->mapping_symbols_info_.lower_bound(section_start);
5700 if (p == this->mapping_symbols_info_.end()
5701 || p->first != section_start)
5703 gold_warning(_("Cortex-A8 erratum scanning failed because there "
5704 "is no mapping symbols for section %u of %s"),
5705 shndx, this->name().c_str());
5709 while (p != this->mapping_symbols_info_.end()
5710 && p->first.first == shndx)
5712 typename Mapping_symbols_info::const_iterator next =
5713 this->mapping_symbols_info_.upper_bound(p->first);
5715 // Only scan part of a section with THUMB code.
5716 if (p->second == 't')
5718 // Determine the end of this range.
5719 section_size_type span_start =
5720 convert_to_section_size_type(p->first.second);
5721 section_size_type span_end;
5722 if (next != this->mapping_symbols_info_.end()
5723 && next->first.first == shndx)
5724 span_end = convert_to_section_size_type(next->first.second);
5726 span_end = convert_to_section_size_type(shdr.get_sh_size());
5728 if (((span_start + output_address) & ~0xfffUL)
5729 != ((span_end + output_address - 1) & ~0xfffUL))
5731 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
5732 span_start, span_end,
5742 // Scan relocations for stub generation.
5744 template<bool big_endian>
5746 Arm_relobj<big_endian>::scan_sections_for_stubs(
5747 Target_arm<big_endian>* arm_target,
5748 const Symbol_table* symtab,
5749 const Layout* layout)
5751 unsigned int shnum = this->shnum();
5752 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5754 // Read the section headers.
5755 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
5759 // To speed up processing, we set up hash tables for fast lookup of
5760 // input offsets to output addresses.
5761 this->initialize_input_to_output_maps();
5763 const Relobj::Output_sections& out_sections(this->output_sections());
5765 Relocate_info<32, big_endian> relinfo;
5766 relinfo.symtab = symtab;
5767 relinfo.layout = layout;
5768 relinfo.object = this;
5770 // Do relocation stubs scanning.
5771 const unsigned char* p = pshdrs + shdr_size;
5772 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5774 const elfcpp::Shdr<32, big_endian> shdr(p);
5775 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
5778 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5779 Arm_address output_offset = this->get_output_section_offset(index);
5780 Arm_address output_address;
5781 if(output_offset != invalid_address)
5782 output_address = out_sections[index]->address() + output_offset;
5785 // Currently this only happens for a relaxed section.
5786 const Output_relaxed_input_section* poris =
5787 out_sections[index]->find_relaxed_input_section(this, index);
5788 gold_assert(poris != NULL);
5789 output_address = poris->address();
5792 // Get the relocations.
5793 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
5797 // Get the section contents. This does work for the case in which
5798 // we modify the contents of an input section. We need to pass the
5799 // output view under such circumstances.
5800 section_size_type input_view_size = 0;
5801 const unsigned char* input_view =
5802 this->section_contents(index, &input_view_size, false);
5804 relinfo.reloc_shndx = i;
5805 relinfo.data_shndx = index;
5806 unsigned int sh_type = shdr.get_sh_type();
5807 unsigned int reloc_size;
5808 if (sh_type == elfcpp::SHT_REL)
5809 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5811 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5813 Output_section* os = out_sections[index];
5814 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
5815 shdr.get_sh_size() / reloc_size,
5817 output_offset == invalid_address,
5818 input_view, output_address,
5823 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
5824 // after its relocation section, if there is one, is processed for
5825 // relocation stubs. Merging this loop with the one above would have been
5826 // complicated since we would have had to make sure that relocation stub
5827 // scanning is done first.
5828 if (arm_target->fix_cortex_a8())
5830 const unsigned char* p = pshdrs + shdr_size;
5831 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5833 const elfcpp::Shdr<32, big_endian> shdr(p);
5834 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
5837 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
5842 // After we've done the relocations, we release the hash tables,
5843 // since we no longer need them.
5844 this->free_input_to_output_maps();
5847 // Count the local symbols. The ARM backend needs to know if a symbol
5848 // is a THUMB function or not. For global symbols, it is easy because
5849 // the Symbol object keeps the ELF symbol type. For local symbol it is
5850 // harder because we cannot access this information. So we override the
5851 // do_count_local_symbol in parent and scan local symbols to mark
5852 // THUMB functions. This is not the most efficient way but I do not want to
5853 // slow down other ports by calling a per symbol targer hook inside
5854 // Sized_relobj<size, big_endian>::do_count_local_symbols.
5856 template<bool big_endian>
5858 Arm_relobj<big_endian>::do_count_local_symbols(
5859 Stringpool_template<char>* pool,
5860 Stringpool_template<char>* dynpool)
5862 // We need to fix-up the values of any local symbols whose type are
5865 // Ask parent to count the local symbols.
5866 Sized_relobj<32, big_endian>::do_count_local_symbols(pool, dynpool);
5867 const unsigned int loccount = this->local_symbol_count();
5871 // Intialize the thumb function bit-vector.
5872 std::vector<bool> empty_vector(loccount, false);
5873 this->local_symbol_is_thumb_function_.swap(empty_vector);
5875 // Read the symbol table section header.
5876 const unsigned int symtab_shndx = this->symtab_shndx();
5877 elfcpp::Shdr<32, big_endian>
5878 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
5879 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
5881 // Read the local symbols.
5882 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
5883 gold_assert(loccount == symtabshdr.get_sh_info());
5884 off_t locsize = loccount * sym_size;
5885 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
5886 locsize, true, true);
5888 // For mapping symbol processing, we need to read the symbol names.
5889 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
5890 if (strtab_shndx >= this->shnum())
5892 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
5896 elfcpp::Shdr<32, big_endian>
5897 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
5898 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
5900 this->error(_("symbol table name section has wrong type: %u"),
5901 static_cast<unsigned int>(strtabshdr.get_sh_type()));
5904 const char* pnames =
5905 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
5906 strtabshdr.get_sh_size(),
5909 // Loop over the local symbols and mark any local symbols pointing
5910 // to THUMB functions.
5912 // Skip the first dummy symbol.
5914 typename Sized_relobj<32, big_endian>::Local_values* plocal_values =
5915 this->local_values();
5916 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
5918 elfcpp::Sym<32, big_endian> sym(psyms);
5919 elfcpp::STT st_type = sym.get_st_type();
5920 Symbol_value<32>& lv((*plocal_values)[i]);
5921 Arm_address input_value = lv.input_value();
5923 // Check to see if this is a mapping symbol.
5924 const char* sym_name = pnames + sym.get_st_name();
5925 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
5927 unsigned int input_shndx = sym.get_st_shndx();
5929 // Strip of LSB in case this is a THUMB symbol.
5930 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
5931 this->mapping_symbols_info_[msp] = sym_name[1];
5934 if (st_type == elfcpp::STT_ARM_TFUNC
5935 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
5937 // This is a THUMB function. Mark this and canonicalize the
5938 // symbol value by setting LSB.
5939 this->local_symbol_is_thumb_function_[i] = true;
5940 if ((input_value & 1) == 0)
5941 lv.set_input_value(input_value | 1);
5946 // Relocate sections.
5947 template<bool big_endian>
5949 Arm_relobj<big_endian>::do_relocate_sections(
5950 const Symbol_table* symtab,
5951 const Layout* layout,
5952 const unsigned char* pshdrs,
5953 typename Sized_relobj<32, big_endian>::Views* pviews)
5955 // Call parent to relocate sections.
5956 Sized_relobj<32, big_endian>::do_relocate_sections(symtab, layout, pshdrs,
5959 // We do not generate stubs if doing a relocatable link.
5960 if (parameters->options().relocatable())
5963 // Relocate stub tables.
5964 unsigned int shnum = this->shnum();
5966 Target_arm<big_endian>* arm_target =
5967 Target_arm<big_endian>::default_target();
5969 Relocate_info<32, big_endian> relinfo;
5970 relinfo.symtab = symtab;
5971 relinfo.layout = layout;
5972 relinfo.object = this;
5974 for (unsigned int i = 1; i < shnum; ++i)
5976 Arm_input_section<big_endian>* arm_input_section =
5977 arm_target->find_arm_input_section(this, i);
5979 if (arm_input_section != NULL
5980 && arm_input_section->is_stub_table_owner()
5981 && !arm_input_section->stub_table()->empty())
5983 // We cannot discard a section if it owns a stub table.
5984 Output_section* os = this->output_section(i);
5985 gold_assert(os != NULL);
5987 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
5988 relinfo.reloc_shdr = NULL;
5989 relinfo.data_shndx = i;
5990 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
5992 gold_assert((*pviews)[i].view != NULL);
5994 // We are passed the output section view. Adjust it to cover the
5996 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
5997 gold_assert((stub_table->address() >= (*pviews)[i].address)
5998 && ((stub_table->address() + stub_table->data_size())
5999 <= (*pviews)[i].address + (*pviews)[i].view_size));
6001 off_t offset = stub_table->address() - (*pviews)[i].address;
6002 unsigned char* view = (*pviews)[i].view + offset;
6003 Arm_address address = stub_table->address();
6004 section_size_type view_size = stub_table->data_size();
6006 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6010 // Apply Cortex A8 workaround if applicable.
6011 if (this->section_has_cortex_a8_workaround(i))
6013 unsigned char* view = (*pviews)[i].view;
6014 Arm_address view_address = (*pviews)[i].address;
6015 section_size_type view_size = (*pviews)[i].view_size;
6016 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6018 // Adjust view to cover section.
6019 Output_section* os = this->output_section(i);
6020 gold_assert(os != NULL);
6021 Arm_address section_address = os->output_address(this, i, 0);
6022 uint64_t section_size = this->section_size(i);
6024 gold_assert(section_address >= view_address
6025 && ((section_address + section_size)
6026 <= (view_address + view_size)));
6028 unsigned char* section_view = view + (section_address - view_address);
6030 // Apply the Cortex-A8 workaround to the output address range
6031 // corresponding to this input section.
6032 stub_table->apply_cortex_a8_workaround_to_address_range(
6041 // Create a new EXIDX input section object for EXIDX section SHNDX with
6044 template<bool big_endian>
6046 Arm_relobj<big_endian>::make_exidx_input_section(
6048 const elfcpp::Shdr<32, big_endian>& shdr)
6050 // Link .text section to its .ARM.exidx section in the same object.
6051 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6053 // Issue an error and ignore this EXIDX section if it does not point
6054 // to any text section.
6055 if (text_shndx == elfcpp::SHN_UNDEF)
6057 gold_error(_("EXIDX section %u in %s has no linked text section"),
6058 shndx, this->name().c_str());
6062 // Issue an error and ignore this EXIDX section if it points to a text
6063 // section already has an EXIDX section.
6064 if (this->exidx_section_map_[text_shndx] != NULL)
6066 gold_error(_("EXIDX sections %u and %u both link to text section %u "
6068 shndx, this->exidx_section_map_[text_shndx]->shndx(),
6069 text_shndx, this->name().c_str());
6073 // Create an Arm_exidx_input_section object for this EXIDX section.
6074 Arm_exidx_input_section* exidx_input_section =
6075 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6076 shdr.get_sh_addralign());
6077 this->exidx_section_map_[text_shndx] = exidx_input_section;
6079 // Also map the EXIDX section index to this.
6080 gold_assert(this->exidx_section_map_[shndx] == NULL);
6081 this->exidx_section_map_[shndx] = exidx_input_section;
6084 // Read the symbol information.
6086 template<bool big_endian>
6088 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6090 // Call parent class to read symbol information.
6091 Sized_relobj<32, big_endian>::do_read_symbols(sd);
6093 // Read processor-specific flags in ELF file header.
6094 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6095 elfcpp::Elf_sizes<32>::ehdr_size,
6097 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6098 this->processor_specific_flags_ = ehdr.get_e_flags();
6100 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6102 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6103 const unsigned char *ps =
6104 sd->section_headers->data() + shdr_size;
6105 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6107 elfcpp::Shdr<32, big_endian> shdr(ps);
6108 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6110 gold_assert(this->attributes_section_data_ == NULL);
6111 section_offset_type section_offset = shdr.get_sh_offset();
6112 section_size_type section_size =
6113 convert_to_section_size_type(shdr.get_sh_size());
6114 File_view* view = this->get_lasting_view(section_offset,
6115 section_size, true, false);
6116 this->attributes_section_data_ =
6117 new Attributes_section_data(view->data(), section_size);
6119 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6120 this->make_exidx_input_section(i, shdr);
6124 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6125 // sections for unwinding. These sections are referenced implicitly by
6126 // text sections linked in the section headers. If we ignore these implict
6127 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6128 // will be garbage-collected incorrectly. Hence we override the same function
6129 // in the base class to handle these implicit references.
6131 template<bool big_endian>
6133 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6135 Read_relocs_data* rd)
6137 // First, call base class method to process relocations in this object.
6138 Sized_relobj<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6140 unsigned int shnum = this->shnum();
6141 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6142 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6146 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6147 // to these from the linked text sections.
6148 const unsigned char* ps = pshdrs + shdr_size;
6149 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6151 elfcpp::Shdr<32, big_endian> shdr(ps);
6152 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6154 // Found an .ARM.exidx section, add it to the set of reachable
6155 // sections from its linked text section.
6156 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6157 symtab->gc()->add_reference(this, text_shndx, this, i);
6162 // Update output local symbol count. Owing to EXIDX entry merging, some local
6163 // symbols will be removed in output. Adjust output local symbol count
6164 // accordingly. We can only changed the static output local symbol count. It
6165 // is too late to change the dynamic symbols.
6167 template<bool big_endian>
6169 Arm_relobj<big_endian>::update_output_local_symbol_count()
6171 // Caller should check that this needs updating. We want caller checking
6172 // because output_local_symbol_count_needs_update() is most likely inlined.
6173 gold_assert(this->output_local_symbol_count_needs_update_);
6175 gold_assert(this->symtab_shndx() != -1U);
6176 if (this->symtab_shndx() == 0)
6178 // This object has no symbols. Weird but legal.
6182 // Read the symbol table section header.
6183 const unsigned int symtab_shndx = this->symtab_shndx();
6184 elfcpp::Shdr<32, big_endian>
6185 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6186 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6188 // Read the local symbols.
6189 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6190 const unsigned int loccount = this->local_symbol_count();
6191 gold_assert(loccount == symtabshdr.get_sh_info());
6192 off_t locsize = loccount * sym_size;
6193 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6194 locsize, true, true);
6196 // Loop over the local symbols.
6198 typedef typename Sized_relobj<32, big_endian>::Output_sections
6200 const Output_sections& out_sections(this->output_sections());
6201 unsigned int shnum = this->shnum();
6202 unsigned int count = 0;
6203 // Skip the first, dummy, symbol.
6205 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6207 elfcpp::Sym<32, big_endian> sym(psyms);
6209 Symbol_value<32>& lv((*this->local_values())[i]);
6211 // This local symbol was already discarded by do_count_local_symbols.
6212 if (!lv.needs_output_symtab_entry())
6216 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
6221 Output_section* os = out_sections[shndx];
6223 // This local symbol no longer has an output section. Discard it.
6226 lv.set_no_output_symtab_entry();
6230 // Currently we only discard parts of EXIDX input sections.
6231 // We explicitly check for a merged EXIDX input section to avoid
6232 // calling Output_section_data::output_offset unless necessary.
6233 if ((this->get_output_section_offset(shndx) == invalid_address)
6234 && (this->exidx_input_section_by_shndx(shndx) != NULL))
6236 section_offset_type output_offset =
6237 os->output_offset(this, shndx, lv.input_value());
6238 if (output_offset == -1)
6240 // This symbol is defined in a part of an EXIDX input section
6241 // that is discarded due to entry merging.
6242 lv.set_no_output_symtab_entry();
6251 this->set_output_local_symbol_count(count);
6252 this->output_local_symbol_count_needs_update_ = false;
6255 // Arm_dynobj methods.
6257 // Read the symbol information.
6259 template<bool big_endian>
6261 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6263 // Call parent class to read symbol information.
6264 Sized_dynobj<32, big_endian>::do_read_symbols(sd);
6266 // Read processor-specific flags in ELF file header.
6267 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6268 elfcpp::Elf_sizes<32>::ehdr_size,
6270 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6271 this->processor_specific_flags_ = ehdr.get_e_flags();
6273 // Read the attributes section if there is one.
6274 // We read from the end because gas seems to put it near the end of
6275 // the section headers.
6276 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6277 const unsigned char *ps =
6278 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
6279 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
6281 elfcpp::Shdr<32, big_endian> shdr(ps);
6282 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6284 section_offset_type section_offset = shdr.get_sh_offset();
6285 section_size_type section_size =
6286 convert_to_section_size_type(shdr.get_sh_size());
6287 File_view* view = this->get_lasting_view(section_offset,
6288 section_size, true, false);
6289 this->attributes_section_data_ =
6290 new Attributes_section_data(view->data(), section_size);
6296 // Stub_addend_reader methods.
6298 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6300 template<bool big_endian>
6301 elfcpp::Elf_types<32>::Elf_Swxword
6302 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
6303 unsigned int r_type,
6304 const unsigned char* view,
6305 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
6307 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
6311 case elfcpp::R_ARM_CALL:
6312 case elfcpp::R_ARM_JUMP24:
6313 case elfcpp::R_ARM_PLT32:
6315 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
6316 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6317 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
6318 return utils::sign_extend<26>(val << 2);
6321 case elfcpp::R_ARM_THM_CALL:
6322 case elfcpp::R_ARM_THM_JUMP24:
6323 case elfcpp::R_ARM_THM_XPC22:
6325 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6326 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6327 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6328 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6329 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
6332 case elfcpp::R_ARM_THM_JUMP19:
6334 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6335 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6336 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6337 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6338 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
6346 // A class to handle the PLT data.
6348 template<bool big_endian>
6349 class Output_data_plt_arm : public Output_section_data
6352 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
6355 Output_data_plt_arm(Layout*, Output_data_space*);
6357 // Add an entry to the PLT.
6359 add_entry(Symbol* gsym);
6361 // Return the .rel.plt section data.
6362 const Reloc_section*
6364 { return this->rel_; }
6368 do_adjust_output_section(Output_section* os);
6370 // Write to a map file.
6372 do_print_to_mapfile(Mapfile* mapfile) const
6373 { mapfile->print_output_data(this, _("** PLT")); }
6376 // Template for the first PLT entry.
6377 static const uint32_t first_plt_entry[5];
6379 // Template for subsequent PLT entries.
6380 static const uint32_t plt_entry[3];
6382 // Set the final size.
6384 set_final_data_size()
6386 this->set_data_size(sizeof(first_plt_entry)
6387 + this->count_ * sizeof(plt_entry));
6390 // Write out the PLT data.
6392 do_write(Output_file*);
6394 // The reloc section.
6395 Reloc_section* rel_;
6396 // The .got.plt section.
6397 Output_data_space* got_plt_;
6398 // The number of PLT entries.
6399 unsigned int count_;
6402 // Create the PLT section. The ordinary .got section is an argument,
6403 // since we need to refer to the start. We also create our own .got
6404 // section just for PLT entries.
6406 template<bool big_endian>
6407 Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout,
6408 Output_data_space* got_plt)
6409 : Output_section_data(4), got_plt_(got_plt), count_(0)
6411 this->rel_ = new Reloc_section(false);
6412 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
6413 elfcpp::SHF_ALLOC, this->rel_, true, false,
6417 template<bool big_endian>
6419 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
6424 // Add an entry to the PLT.
6426 template<bool big_endian>
6428 Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym)
6430 gold_assert(!gsym->has_plt_offset());
6432 // Note that when setting the PLT offset we skip the initial
6433 // reserved PLT entry.
6434 gsym->set_plt_offset((this->count_) * sizeof(plt_entry)
6435 + sizeof(first_plt_entry));
6439 section_offset_type got_offset = this->got_plt_->current_data_size();
6441 // Every PLT entry needs a GOT entry which points back to the PLT
6442 // entry (this will be changed by the dynamic linker, normally
6443 // lazily when the function is called).
6444 this->got_plt_->set_current_data_size(got_offset + 4);
6446 // Every PLT entry needs a reloc.
6447 gsym->set_needs_dynsym_entry();
6448 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
6451 // Note that we don't need to save the symbol. The contents of the
6452 // PLT are independent of which symbols are used. The symbols only
6453 // appear in the relocations.
6457 // FIXME: This is not very flexible. Right now this has only been tested
6458 // on armv5te. If we are to support additional architecture features like
6459 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
6461 // The first entry in the PLT.
6462 template<bool big_endian>
6463 const uint32_t Output_data_plt_arm<big_endian>::first_plt_entry[5] =
6465 0xe52de004, // str lr, [sp, #-4]!
6466 0xe59fe004, // ldr lr, [pc, #4]
6467 0xe08fe00e, // add lr, pc, lr
6468 0xe5bef008, // ldr pc, [lr, #8]!
6469 0x00000000, // &GOT[0] - .
6472 // Subsequent entries in the PLT.
6474 template<bool big_endian>
6475 const uint32_t Output_data_plt_arm<big_endian>::plt_entry[3] =
6477 0xe28fc600, // add ip, pc, #0xNN00000
6478 0xe28cca00, // add ip, ip, #0xNN000
6479 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
6482 // Write out the PLT. This uses the hand-coded instructions above,
6483 // and adjusts them as needed. This is all specified by the arm ELF
6484 // Processor Supplement.
6486 template<bool big_endian>
6488 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
6490 const off_t offset = this->offset();
6491 const section_size_type oview_size =
6492 convert_to_section_size_type(this->data_size());
6493 unsigned char* const oview = of->get_output_view(offset, oview_size);
6495 const off_t got_file_offset = this->got_plt_->offset();
6496 const section_size_type got_size =
6497 convert_to_section_size_type(this->got_plt_->data_size());
6498 unsigned char* const got_view = of->get_output_view(got_file_offset,
6500 unsigned char* pov = oview;
6502 Arm_address plt_address = this->address();
6503 Arm_address got_address = this->got_plt_->address();
6505 // Write first PLT entry. All but the last word are constants.
6506 const size_t num_first_plt_words = (sizeof(first_plt_entry)
6507 / sizeof(plt_entry[0]));
6508 for (size_t i = 0; i < num_first_plt_words - 1; i++)
6509 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
6510 // Last word in first PLT entry is &GOT[0] - .
6511 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
6512 got_address - (plt_address + 16));
6513 pov += sizeof(first_plt_entry);
6515 unsigned char* got_pov = got_view;
6517 memset(got_pov, 0, 12);
6520 const int rel_size = elfcpp::Elf_sizes<32>::rel_size;
6521 unsigned int plt_offset = sizeof(first_plt_entry);
6522 unsigned int plt_rel_offset = 0;
6523 unsigned int got_offset = 12;
6524 const unsigned int count = this->count_;
6525 for (unsigned int i = 0;
6528 pov += sizeof(plt_entry),
6530 plt_offset += sizeof(plt_entry),
6531 plt_rel_offset += rel_size,
6534 // Set and adjust the PLT entry itself.
6535 int32_t offset = ((got_address + got_offset)
6536 - (plt_address + plt_offset + 8));
6538 gold_assert(offset >= 0 && offset < 0x0fffffff);
6539 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
6540 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
6541 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
6542 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
6543 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
6544 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
6546 // Set the entry in the GOT.
6547 elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address);
6550 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
6551 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
6553 of->write_output_view(offset, oview_size, oview);
6554 of->write_output_view(got_file_offset, got_size, got_view);
6557 // Create a PLT entry for a global symbol.
6559 template<bool big_endian>
6561 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
6564 if (gsym->has_plt_offset())
6567 if (this->plt_ == NULL)
6569 // Create the GOT sections first.
6570 this->got_section(symtab, layout);
6572 this->plt_ = new Output_data_plt_arm<big_endian>(layout, this->got_plt_);
6573 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
6575 | elfcpp::SHF_EXECINSTR),
6576 this->plt_, false, false, false, false);
6578 this->plt_->add_entry(gsym);
6581 // Report an unsupported relocation against a local symbol.
6583 template<bool big_endian>
6585 Target_arm<big_endian>::Scan::unsupported_reloc_local(
6586 Sized_relobj<32, big_endian>* object,
6587 unsigned int r_type)
6589 gold_error(_("%s: unsupported reloc %u against local symbol"),
6590 object->name().c_str(), r_type);
6593 // We are about to emit a dynamic relocation of type R_TYPE. If the
6594 // dynamic linker does not support it, issue an error. The GNU linker
6595 // only issues a non-PIC error for an allocated read-only section.
6596 // Here we know the section is allocated, but we don't know that it is
6597 // read-only. But we check for all the relocation types which the
6598 // glibc dynamic linker supports, so it seems appropriate to issue an
6599 // error even if the section is not read-only.
6601 template<bool big_endian>
6603 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
6604 unsigned int r_type)
6608 // These are the relocation types supported by glibc for ARM.
6609 case elfcpp::R_ARM_RELATIVE:
6610 case elfcpp::R_ARM_COPY:
6611 case elfcpp::R_ARM_GLOB_DAT:
6612 case elfcpp::R_ARM_JUMP_SLOT:
6613 case elfcpp::R_ARM_ABS32:
6614 case elfcpp::R_ARM_ABS32_NOI:
6615 case elfcpp::R_ARM_PC24:
6616 // FIXME: The following 3 types are not supported by Android's dynamic
6618 case elfcpp::R_ARM_TLS_DTPMOD32:
6619 case elfcpp::R_ARM_TLS_DTPOFF32:
6620 case elfcpp::R_ARM_TLS_TPOFF32:
6624 // This prevents us from issuing more than one error per reloc
6625 // section. But we can still wind up issuing more than one
6626 // error per object file.
6627 if (this->issued_non_pic_error_)
6629 object->error(_("requires unsupported dynamic reloc; "
6630 "recompile with -fPIC"));
6631 this->issued_non_pic_error_ = true;
6634 case elfcpp::R_ARM_NONE:
6639 // Scan a relocation for a local symbol.
6640 // FIXME: This only handles a subset of relocation types used by Android
6641 // on ARM v5te devices.
6643 template<bool big_endian>
6645 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
6648 Sized_relobj<32, big_endian>* object,
6649 unsigned int data_shndx,
6650 Output_section* output_section,
6651 const elfcpp::Rel<32, big_endian>& reloc,
6652 unsigned int r_type,
6653 const elfcpp::Sym<32, big_endian>&)
6655 r_type = get_real_reloc_type(r_type);
6658 case elfcpp::R_ARM_NONE:
6661 case elfcpp::R_ARM_ABS32:
6662 case elfcpp::R_ARM_ABS32_NOI:
6663 // If building a shared library (or a position-independent
6664 // executable), we need to create a dynamic relocation for
6665 // this location. The relocation applied at link time will
6666 // apply the link-time value, so we flag the location with
6667 // an R_ARM_RELATIVE relocation so the dynamic loader can
6668 // relocate it easily.
6669 if (parameters->options().output_is_position_independent())
6671 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6672 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6673 // If we are to add more other reloc types than R_ARM_ABS32,
6674 // we need to add check_non_pic(object, r_type) here.
6675 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
6676 output_section, data_shndx,
6677 reloc.get_r_offset());
6681 case elfcpp::R_ARM_REL32:
6682 case elfcpp::R_ARM_THM_CALL:
6683 case elfcpp::R_ARM_CALL:
6684 case elfcpp::R_ARM_PREL31:
6685 case elfcpp::R_ARM_JUMP24:
6686 case elfcpp::R_ARM_THM_JUMP24:
6687 case elfcpp::R_ARM_THM_JUMP19:
6688 case elfcpp::R_ARM_PLT32:
6689 case elfcpp::R_ARM_THM_ABS5:
6690 case elfcpp::R_ARM_ABS8:
6691 case elfcpp::R_ARM_ABS12:
6692 case elfcpp::R_ARM_ABS16:
6693 case elfcpp::R_ARM_BASE_ABS:
6694 case elfcpp::R_ARM_MOVW_ABS_NC:
6695 case elfcpp::R_ARM_MOVT_ABS:
6696 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6697 case elfcpp::R_ARM_THM_MOVT_ABS:
6698 case elfcpp::R_ARM_MOVW_PREL_NC:
6699 case elfcpp::R_ARM_MOVT_PREL:
6700 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
6701 case elfcpp::R_ARM_THM_MOVT_PREL:
6702 case elfcpp::R_ARM_MOVW_BREL_NC:
6703 case elfcpp::R_ARM_MOVT_BREL:
6704 case elfcpp::R_ARM_MOVW_BREL:
6705 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
6706 case elfcpp::R_ARM_THM_MOVT_BREL:
6707 case elfcpp::R_ARM_THM_MOVW_BREL:
6708 case elfcpp::R_ARM_THM_JUMP6:
6709 case elfcpp::R_ARM_THM_JUMP8:
6710 case elfcpp::R_ARM_THM_JUMP11:
6711 case elfcpp::R_ARM_V4BX:
6712 case elfcpp::R_ARM_THM_PC8:
6713 case elfcpp::R_ARM_THM_PC12:
6714 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
6715 case elfcpp::R_ARM_ALU_PC_G0_NC:
6716 case elfcpp::R_ARM_ALU_PC_G0:
6717 case elfcpp::R_ARM_ALU_PC_G1_NC:
6718 case elfcpp::R_ARM_ALU_PC_G1:
6719 case elfcpp::R_ARM_ALU_PC_G2:
6720 case elfcpp::R_ARM_ALU_SB_G0_NC:
6721 case elfcpp::R_ARM_ALU_SB_G0:
6722 case elfcpp::R_ARM_ALU_SB_G1_NC:
6723 case elfcpp::R_ARM_ALU_SB_G1:
6724 case elfcpp::R_ARM_ALU_SB_G2:
6725 case elfcpp::R_ARM_LDR_PC_G0:
6726 case elfcpp::R_ARM_LDR_PC_G1:
6727 case elfcpp::R_ARM_LDR_PC_G2:
6728 case elfcpp::R_ARM_LDR_SB_G0:
6729 case elfcpp::R_ARM_LDR_SB_G1:
6730 case elfcpp::R_ARM_LDR_SB_G2:
6731 case elfcpp::R_ARM_LDRS_PC_G0:
6732 case elfcpp::R_ARM_LDRS_PC_G1:
6733 case elfcpp::R_ARM_LDRS_PC_G2:
6734 case elfcpp::R_ARM_LDRS_SB_G0:
6735 case elfcpp::R_ARM_LDRS_SB_G1:
6736 case elfcpp::R_ARM_LDRS_SB_G2:
6737 case elfcpp::R_ARM_LDC_PC_G0:
6738 case elfcpp::R_ARM_LDC_PC_G1:
6739 case elfcpp::R_ARM_LDC_PC_G2:
6740 case elfcpp::R_ARM_LDC_SB_G0:
6741 case elfcpp::R_ARM_LDC_SB_G1:
6742 case elfcpp::R_ARM_LDC_SB_G2:
6745 case elfcpp::R_ARM_GOTOFF32:
6746 // We need a GOT section:
6747 target->got_section(symtab, layout);
6750 case elfcpp::R_ARM_BASE_PREL:
6751 // FIXME: What about this?
6754 case elfcpp::R_ARM_GOT_BREL:
6755 case elfcpp::R_ARM_GOT_PREL:
6757 // The symbol requires a GOT entry.
6758 Output_data_got<32, big_endian>* got =
6759 target->got_section(symtab, layout);
6760 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6761 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
6763 // If we are generating a shared object, we need to add a
6764 // dynamic RELATIVE relocation for this symbol's GOT entry.
6765 if (parameters->options().output_is_position_independent())
6767 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6768 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6769 rel_dyn->add_local_relative(
6770 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
6771 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
6777 case elfcpp::R_ARM_TARGET1:
6778 // This should have been mapped to another type already.
6780 case elfcpp::R_ARM_COPY:
6781 case elfcpp::R_ARM_GLOB_DAT:
6782 case elfcpp::R_ARM_JUMP_SLOT:
6783 case elfcpp::R_ARM_RELATIVE:
6784 // These are relocations which should only be seen by the
6785 // dynamic linker, and should never be seen here.
6786 gold_error(_("%s: unexpected reloc %u in object file"),
6787 object->name().c_str(), r_type);
6791 unsupported_reloc_local(object, r_type);
6796 // Report an unsupported relocation against a global symbol.
6798 template<bool big_endian>
6800 Target_arm<big_endian>::Scan::unsupported_reloc_global(
6801 Sized_relobj<32, big_endian>* object,
6802 unsigned int r_type,
6805 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
6806 object->name().c_str(), r_type, gsym->demangled_name().c_str());
6809 // Scan a relocation for a global symbol.
6810 // FIXME: This only handles a subset of relocation types used by Android
6811 // on ARM v5te devices.
6813 template<bool big_endian>
6815 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
6818 Sized_relobj<32, big_endian>* object,
6819 unsigned int data_shndx,
6820 Output_section* output_section,
6821 const elfcpp::Rel<32, big_endian>& reloc,
6822 unsigned int r_type,
6825 r_type = get_real_reloc_type(r_type);
6828 case elfcpp::R_ARM_NONE:
6831 case elfcpp::R_ARM_ABS32:
6832 case elfcpp::R_ARM_ABS32_NOI:
6834 // Make a dynamic relocation if necessary.
6835 if (gsym->needs_dynamic_reloc(Symbol::ABSOLUTE_REF))
6837 if (target->may_need_copy_reloc(gsym))
6839 target->copy_reloc(symtab, layout, object,
6840 data_shndx, output_section, gsym, reloc);
6842 else if (gsym->can_use_relative_reloc(false))
6844 // If we are to add more other reloc types than R_ARM_ABS32,
6845 // we need to add check_non_pic(object, r_type) here.
6846 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6847 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
6848 output_section, object,
6849 data_shndx, reloc.get_r_offset());
6853 // If we are to add more other reloc types than R_ARM_ABS32,
6854 // we need to add check_non_pic(object, r_type) here.
6855 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6856 rel_dyn->add_global(gsym, r_type, output_section, object,
6857 data_shndx, reloc.get_r_offset());
6863 case elfcpp::R_ARM_MOVW_ABS_NC:
6864 case elfcpp::R_ARM_MOVT_ABS:
6865 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6866 case elfcpp::R_ARM_THM_MOVT_ABS:
6867 case elfcpp::R_ARM_MOVW_PREL_NC:
6868 case elfcpp::R_ARM_MOVT_PREL:
6869 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
6870 case elfcpp::R_ARM_THM_MOVT_PREL:
6871 case elfcpp::R_ARM_MOVW_BREL_NC:
6872 case elfcpp::R_ARM_MOVT_BREL:
6873 case elfcpp::R_ARM_MOVW_BREL:
6874 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
6875 case elfcpp::R_ARM_THM_MOVT_BREL:
6876 case elfcpp::R_ARM_THM_MOVW_BREL:
6877 case elfcpp::R_ARM_THM_JUMP6:
6878 case elfcpp::R_ARM_THM_JUMP8:
6879 case elfcpp::R_ARM_THM_JUMP11:
6880 case elfcpp::R_ARM_V4BX:
6881 case elfcpp::R_ARM_THM_PC8:
6882 case elfcpp::R_ARM_THM_PC12:
6883 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
6884 case elfcpp::R_ARM_ALU_PC_G0_NC:
6885 case elfcpp::R_ARM_ALU_PC_G0:
6886 case elfcpp::R_ARM_ALU_PC_G1_NC:
6887 case elfcpp::R_ARM_ALU_PC_G1:
6888 case elfcpp::R_ARM_ALU_PC_G2:
6889 case elfcpp::R_ARM_ALU_SB_G0_NC:
6890 case elfcpp::R_ARM_ALU_SB_G0:
6891 case elfcpp::R_ARM_ALU_SB_G1_NC:
6892 case elfcpp::R_ARM_ALU_SB_G1:
6893 case elfcpp::R_ARM_ALU_SB_G2:
6894 case elfcpp::R_ARM_LDR_PC_G0:
6895 case elfcpp::R_ARM_LDR_PC_G1:
6896 case elfcpp::R_ARM_LDR_PC_G2:
6897 case elfcpp::R_ARM_LDR_SB_G0:
6898 case elfcpp::R_ARM_LDR_SB_G1:
6899 case elfcpp::R_ARM_LDR_SB_G2:
6900 case elfcpp::R_ARM_LDRS_PC_G0:
6901 case elfcpp::R_ARM_LDRS_PC_G1:
6902 case elfcpp::R_ARM_LDRS_PC_G2:
6903 case elfcpp::R_ARM_LDRS_SB_G0:
6904 case elfcpp::R_ARM_LDRS_SB_G1:
6905 case elfcpp::R_ARM_LDRS_SB_G2:
6906 case elfcpp::R_ARM_LDC_PC_G0:
6907 case elfcpp::R_ARM_LDC_PC_G1:
6908 case elfcpp::R_ARM_LDC_PC_G2:
6909 case elfcpp::R_ARM_LDC_SB_G0:
6910 case elfcpp::R_ARM_LDC_SB_G1:
6911 case elfcpp::R_ARM_LDC_SB_G2:
6914 case elfcpp::R_ARM_THM_ABS5:
6915 case elfcpp::R_ARM_ABS8:
6916 case elfcpp::R_ARM_ABS12:
6917 case elfcpp::R_ARM_ABS16:
6918 case elfcpp::R_ARM_BASE_ABS:
6920 // No dynamic relocs of this kinds.
6921 // Report the error in case of PIC.
6922 int flags = Symbol::NON_PIC_REF;
6923 if (gsym->type() == elfcpp::STT_FUNC
6924 || gsym->type() == elfcpp::STT_ARM_TFUNC)
6925 flags |= Symbol::FUNCTION_CALL;
6926 if (gsym->needs_dynamic_reloc(flags))
6927 check_non_pic(object, r_type);
6931 case elfcpp::R_ARM_REL32:
6933 // Make a dynamic relocation if necessary.
6934 int flags = Symbol::NON_PIC_REF;
6935 if (gsym->needs_dynamic_reloc(flags))
6937 if (target->may_need_copy_reloc(gsym))
6939 target->copy_reloc(symtab, layout, object,
6940 data_shndx, output_section, gsym, reloc);
6944 check_non_pic(object, r_type);
6945 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6946 rel_dyn->add_global(gsym, r_type, output_section, object,
6947 data_shndx, reloc.get_r_offset());
6953 case elfcpp::R_ARM_JUMP24:
6954 case elfcpp::R_ARM_THM_JUMP24:
6955 case elfcpp::R_ARM_THM_JUMP19:
6956 case elfcpp::R_ARM_CALL:
6957 case elfcpp::R_ARM_THM_CALL:
6958 case elfcpp::R_ARM_PLT32:
6959 case elfcpp::R_ARM_PREL31:
6960 case elfcpp::R_ARM_PC24:
6961 // If the symbol is fully resolved, this is just a relative
6962 // local reloc. Otherwise we need a PLT entry.
6963 if (gsym->final_value_is_known())
6965 // If building a shared library, we can also skip the PLT entry
6966 // if the symbol is defined in the output file and is protected
6968 if (gsym->is_defined()
6969 && !gsym->is_from_dynobj()
6970 && !gsym->is_preemptible())
6972 target->make_plt_entry(symtab, layout, gsym);
6975 case elfcpp::R_ARM_GOTOFF32:
6976 // We need a GOT section.
6977 target->got_section(symtab, layout);
6980 case elfcpp::R_ARM_BASE_PREL:
6981 // FIXME: What about this?
6984 case elfcpp::R_ARM_GOT_BREL:
6985 case elfcpp::R_ARM_GOT_PREL:
6987 // The symbol requires a GOT entry.
6988 Output_data_got<32, big_endian>* got =
6989 target->got_section(symtab, layout);
6990 if (gsym->final_value_is_known())
6991 got->add_global(gsym, GOT_TYPE_STANDARD);
6994 // If this symbol is not fully resolved, we need to add a
6995 // GOT entry with a dynamic relocation.
6996 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6997 if (gsym->is_from_dynobj()
6998 || gsym->is_undefined()
6999 || gsym->is_preemptible())
7000 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
7001 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
7004 if (got->add_global(gsym, GOT_TYPE_STANDARD))
7005 rel_dyn->add_global_relative(
7006 gsym, elfcpp::R_ARM_RELATIVE, got,
7007 gsym->got_offset(GOT_TYPE_STANDARD));
7013 case elfcpp::R_ARM_TARGET1:
7014 // This should have been mapped to another type already.
7016 case elfcpp::R_ARM_COPY:
7017 case elfcpp::R_ARM_GLOB_DAT:
7018 case elfcpp::R_ARM_JUMP_SLOT:
7019 case elfcpp::R_ARM_RELATIVE:
7020 // These are relocations which should only be seen by the
7021 // dynamic linker, and should never be seen here.
7022 gold_error(_("%s: unexpected reloc %u in object file"),
7023 object->name().c_str(), r_type);
7027 unsupported_reloc_global(object, r_type, gsym);
7032 // Process relocations for gc.
7034 template<bool big_endian>
7036 Target_arm<big_endian>::gc_process_relocs(Symbol_table* symtab,
7038 Sized_relobj<32, big_endian>* object,
7039 unsigned int data_shndx,
7041 const unsigned char* prelocs,
7043 Output_section* output_section,
7044 bool needs_special_offset_handling,
7045 size_t local_symbol_count,
7046 const unsigned char* plocal_symbols)
7048 typedef Target_arm<big_endian> Arm;
7049 typedef typename Target_arm<big_endian>::Scan Scan;
7051 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan>(
7060 needs_special_offset_handling,
7065 // Scan relocations for a section.
7067 template<bool big_endian>
7069 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
7071 Sized_relobj<32, big_endian>* object,
7072 unsigned int data_shndx,
7073 unsigned int sh_type,
7074 const unsigned char* prelocs,
7076 Output_section* output_section,
7077 bool needs_special_offset_handling,
7078 size_t local_symbol_count,
7079 const unsigned char* plocal_symbols)
7081 typedef typename Target_arm<big_endian>::Scan Scan;
7082 if (sh_type == elfcpp::SHT_RELA)
7084 gold_error(_("%s: unsupported RELA reloc section"),
7085 object->name().c_str());
7089 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
7098 needs_special_offset_handling,
7103 // Finalize the sections.
7105 template<bool big_endian>
7107 Target_arm<big_endian>::do_finalize_sections(
7109 const Input_objects* input_objects,
7110 Symbol_table* symtab)
7112 // Merge processor-specific flags.
7113 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
7114 p != input_objects->relobj_end();
7117 Arm_relobj<big_endian>* arm_relobj =
7118 Arm_relobj<big_endian>::as_arm_relobj(*p);
7119 this->merge_processor_specific_flags(
7121 arm_relobj->processor_specific_flags());
7122 this->merge_object_attributes(arm_relobj->name().c_str(),
7123 arm_relobj->attributes_section_data());
7127 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
7128 p != input_objects->dynobj_end();
7131 Arm_dynobj<big_endian>* arm_dynobj =
7132 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
7133 this->merge_processor_specific_flags(
7135 arm_dynobj->processor_specific_flags());
7136 this->merge_object_attributes(arm_dynobj->name().c_str(),
7137 arm_dynobj->attributes_section_data());
7141 const Object_attribute* cpu_arch_attr =
7142 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
7143 if (cpu_arch_attr->int_value() > elfcpp::TAG_CPU_ARCH_V4)
7144 this->set_may_use_blx(true);
7146 // Check if we need to use Cortex-A8 workaround.
7147 if (parameters->options().user_set_fix_cortex_a8())
7148 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
7151 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
7152 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
7154 const Object_attribute* cpu_arch_profile_attr =
7155 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
7156 this->fix_cortex_a8_ =
7157 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
7158 && (cpu_arch_profile_attr->int_value() == 'A'
7159 || cpu_arch_profile_attr->int_value() == 0));
7162 // Check if we can use V4BX interworking.
7163 // The V4BX interworking stub contains BX instruction,
7164 // which is not specified for some profiles.
7165 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
7166 && !this->may_use_blx())
7167 gold_error(_("unable to provide V4BX reloc interworking fix up; "
7168 "the target profile does not support BX instruction"));
7170 // Fill in some more dynamic tags.
7171 const Reloc_section* rel_plt = (this->plt_ == NULL
7173 : this->plt_->rel_plt());
7174 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
7175 this->rel_dyn_, true);
7177 // Emit any relocs we saved in an attempt to avoid generating COPY
7179 if (this->copy_relocs_.any_saved_relocs())
7180 this->copy_relocs_.emit(this->rel_dyn_section(layout));
7182 // Handle the .ARM.exidx section.
7183 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
7184 if (exidx_section != NULL
7185 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX
7186 && !parameters->options().relocatable())
7188 // Create __exidx_start and __exdix_end symbols.
7189 symtab->define_in_output_data("__exidx_start", NULL,
7190 Symbol_table::PREDEFINED,
7191 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7192 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7194 symtab->define_in_output_data("__exidx_end", NULL,
7195 Symbol_table::PREDEFINED,
7196 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7197 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7200 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
7201 // the .ARM.exidx section.
7202 if (!layout->script_options()->saw_phdrs_clause())
7204 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, 0)
7206 Output_segment* exidx_segment =
7207 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
7208 exidx_segment->add_output_section(exidx_section, elfcpp::PF_R,
7213 // Create an .ARM.attributes section if there is not one already.
7214 Output_attributes_section_data* attributes_section =
7215 new Output_attributes_section_data(*this->attributes_section_data_);
7216 layout->add_output_section_data(".ARM.attributes",
7217 elfcpp::SHT_ARM_ATTRIBUTES, 0,
7218 attributes_section, false, false, false,
7222 // Return whether a direct absolute static relocation needs to be applied.
7223 // In cases where Scan::local() or Scan::global() has created
7224 // a dynamic relocation other than R_ARM_RELATIVE, the addend
7225 // of the relocation is carried in the data, and we must not
7226 // apply the static relocation.
7228 template<bool big_endian>
7230 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
7231 const Sized_symbol<32>* gsym,
7234 Output_section* output_section)
7236 // If the output section is not allocated, then we didn't call
7237 // scan_relocs, we didn't create a dynamic reloc, and we must apply
7239 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
7242 // For local symbols, we will have created a non-RELATIVE dynamic
7243 // relocation only if (a) the output is position independent,
7244 // (b) the relocation is absolute (not pc- or segment-relative), and
7245 // (c) the relocation is not 32 bits wide.
7247 return !(parameters->options().output_is_position_independent()
7248 && (ref_flags & Symbol::ABSOLUTE_REF)
7251 // For global symbols, we use the same helper routines used in the
7252 // scan pass. If we did not create a dynamic relocation, or if we
7253 // created a RELATIVE dynamic relocation, we should apply the static
7255 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
7256 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
7257 && gsym->can_use_relative_reloc(ref_flags
7258 & Symbol::FUNCTION_CALL);
7259 return !has_dyn || is_rel;
7262 // Perform a relocation.
7264 template<bool big_endian>
7266 Target_arm<big_endian>::Relocate::relocate(
7267 const Relocate_info<32, big_endian>* relinfo,
7269 Output_section *output_section,
7271 const elfcpp::Rel<32, big_endian>& rel,
7272 unsigned int r_type,
7273 const Sized_symbol<32>* gsym,
7274 const Symbol_value<32>* psymval,
7275 unsigned char* view,
7276 Arm_address address,
7277 section_size_type /* view_size */ )
7279 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
7281 r_type = get_real_reloc_type(r_type);
7283 const Arm_relobj<big_endian>* object =
7284 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
7286 // If the final branch target of a relocation is THUMB instruction, this
7287 // is 1. Otherwise it is 0.
7288 Arm_address thumb_bit = 0;
7289 Symbol_value<32> symval;
7290 bool is_weakly_undefined_without_plt = false;
7291 if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
7295 // This is a global symbol. Determine if we use PLT and if the
7296 // final target is THUMB.
7297 if (gsym->use_plt_offset(reloc_is_non_pic(r_type)))
7299 // This uses a PLT, change the symbol value.
7300 symval.set_output_value(target->plt_section()->address()
7301 + gsym->plt_offset());
7304 else if (gsym->is_weak_undefined())
7306 // This is a weakly undefined symbol and we do not use PLT
7307 // for this relocation. A branch targeting this symbol will
7308 // be converted into an NOP.
7309 is_weakly_undefined_without_plt = true;
7313 // Set thumb bit if symbol:
7314 // -Has type STT_ARM_TFUNC or
7315 // -Has type STT_FUNC, is defined and with LSB in value set.
7317 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
7318 || (gsym->type() == elfcpp::STT_FUNC
7319 && !gsym->is_undefined()
7320 && ((psymval->value(object, 0) & 1) != 0)))
7327 // This is a local symbol. Determine if the final target is THUMB.
7328 // We saved this information when all the local symbols were read.
7329 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
7330 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
7331 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
7336 // This is a fake relocation synthesized for a stub. It does not have
7337 // a real symbol. We just look at the LSB of the symbol value to
7338 // determine if the target is THUMB or not.
7339 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
7342 // Strip LSB if this points to a THUMB target.
7344 && Target_arm<big_endian>::reloc_uses_thumb_bit(r_type)
7345 && ((psymval->value(object, 0) & 1) != 0))
7347 Arm_address stripped_value =
7348 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
7349 symval.set_output_value(stripped_value);
7353 // Get the GOT offset if needed.
7354 // The GOT pointer points to the end of the GOT section.
7355 // We need to subtract the size of the GOT section to get
7356 // the actual offset to use in the relocation.
7357 bool have_got_offset = false;
7358 unsigned int got_offset = 0;
7361 case elfcpp::R_ARM_GOT_BREL:
7362 case elfcpp::R_ARM_GOT_PREL:
7365 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
7366 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
7367 - target->got_size());
7371 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7372 gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_STANDARD));
7373 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
7374 - target->got_size());
7376 have_got_offset = true;
7383 // To look up relocation stubs, we need to pass the symbol table index of
7385 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7387 // Get the addressing origin of the output segment defining the
7388 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
7389 Arm_address sym_origin = 0;
7390 if (Relocate::reloc_needs_sym_origin(r_type))
7392 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
7393 // R_ARM_BASE_ABS with the NULL symbol will give the
7394 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
7395 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
7396 sym_origin = target->got_plt_section()->address();
7397 else if (gsym == NULL)
7399 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
7400 sym_origin = gsym->output_segment()->vaddr();
7401 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
7402 sym_origin = gsym->output_data()->address();
7404 // TODO: Assumes the segment base to be zero for the global symbols
7405 // till the proper support for the segment-base-relative addressing
7406 // will be implemented. This is consistent with GNU ld.
7409 typename Arm_relocate_functions::Status reloc_status =
7410 Arm_relocate_functions::STATUS_OKAY;
7413 case elfcpp::R_ARM_NONE:
7416 case elfcpp::R_ARM_ABS8:
7417 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7419 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
7422 case elfcpp::R_ARM_ABS12:
7423 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7425 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
7428 case elfcpp::R_ARM_ABS16:
7429 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7431 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
7434 case elfcpp::R_ARM_ABS32:
7435 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7437 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7441 case elfcpp::R_ARM_ABS32_NOI:
7442 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7444 // No thumb bit for this relocation: (S + A)
7445 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7449 case elfcpp::R_ARM_MOVW_ABS_NC:
7450 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7452 reloc_status = Arm_relocate_functions::movw_abs_nc(view, object,
7456 gold_error(_("relocation R_ARM_MOVW_ABS_NC cannot be used when making"
7457 "a shared object; recompile with -fPIC"));
7460 case elfcpp::R_ARM_MOVT_ABS:
7461 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7463 reloc_status = Arm_relocate_functions::movt_abs(view, object, psymval);
7465 gold_error(_("relocation R_ARM_MOVT_ABS cannot be used when making"
7466 "a shared object; recompile with -fPIC"));
7469 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7470 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7472 reloc_status = Arm_relocate_functions::thm_movw_abs_nc(view, object,
7476 gold_error(_("relocation R_ARM_THM_MOVW_ABS_NC cannot be used when"
7477 "making a shared object; recompile with -fPIC"));
7480 case elfcpp::R_ARM_THM_MOVT_ABS:
7481 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7483 reloc_status = Arm_relocate_functions::thm_movt_abs(view, object,
7486 gold_error(_("relocation R_ARM_THM_MOVT_ABS cannot be used when"
7487 "making a shared object; recompile with -fPIC"));
7490 case elfcpp::R_ARM_MOVW_PREL_NC:
7491 reloc_status = Arm_relocate_functions::movw_rel_nc(view, object,
7496 case elfcpp::R_ARM_MOVW_BREL_NC:
7497 reloc_status = Arm_relocate_functions::movw_rel_nc(view, object,
7498 psymval, sym_origin,
7502 case elfcpp::R_ARM_MOVW_BREL:
7503 reloc_status = Arm_relocate_functions::movw_rel(view, object,
7504 psymval, sym_origin,
7508 case elfcpp::R_ARM_MOVT_PREL:
7509 reloc_status = Arm_relocate_functions::movt_rel(view, object,
7513 case elfcpp::R_ARM_MOVT_BREL:
7514 reloc_status = Arm_relocate_functions::movt_rel(view, object,
7515 psymval, sym_origin);
7518 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7519 reloc_status = Arm_relocate_functions::thm_movw_rel_nc(view, object,
7524 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7525 reloc_status = Arm_relocate_functions::thm_movw_rel_nc(view, object,
7531 case elfcpp::R_ARM_THM_MOVW_BREL:
7532 reloc_status = Arm_relocate_functions::thm_movw_rel(view, object,
7533 psymval, sym_origin,
7537 case elfcpp::R_ARM_THM_MOVT_PREL:
7538 reloc_status = Arm_relocate_functions::thm_movt_rel(view, object,
7542 case elfcpp::R_ARM_THM_MOVT_BREL:
7543 reloc_status = Arm_relocate_functions::thm_movt_rel(view, object,
7544 psymval, sym_origin);
7547 case elfcpp::R_ARM_REL32:
7548 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7549 address, thumb_bit);
7552 case elfcpp::R_ARM_THM_ABS5:
7553 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7555 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
7558 // Thumb long branches.
7559 case elfcpp::R_ARM_THM_CALL:
7560 case elfcpp::R_ARM_THM_XPC22:
7561 case elfcpp::R_ARM_THM_JUMP24:
7563 Arm_relocate_functions::thumb_branch_common(
7564 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7565 thumb_bit, is_weakly_undefined_without_plt);
7568 case elfcpp::R_ARM_GOTOFF32:
7570 Arm_address got_origin;
7571 got_origin = target->got_plt_section()->address();
7572 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7573 got_origin, thumb_bit);
7577 case elfcpp::R_ARM_BASE_PREL:
7578 gold_assert(gsym != NULL);
7580 Arm_relocate_functions::base_prel(view, sym_origin, address);
7583 case elfcpp::R_ARM_BASE_ABS:
7585 if (!should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7589 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
7593 case elfcpp::R_ARM_GOT_BREL:
7594 gold_assert(have_got_offset);
7595 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
7598 case elfcpp::R_ARM_GOT_PREL:
7599 gold_assert(have_got_offset);
7600 // Get the address origin for GOT PLT, which is allocated right
7601 // after the GOT section, to calculate an absolute address of
7602 // the symbol GOT entry (got_origin + got_offset).
7603 Arm_address got_origin;
7604 got_origin = target->got_plt_section()->address();
7605 reloc_status = Arm_relocate_functions::got_prel(view,
7606 got_origin + got_offset,
7610 case elfcpp::R_ARM_PLT32:
7611 case elfcpp::R_ARM_CALL:
7612 case elfcpp::R_ARM_JUMP24:
7613 case elfcpp::R_ARM_XPC25:
7614 gold_assert(gsym == NULL
7615 || gsym->has_plt_offset()
7616 || gsym->final_value_is_known()
7617 || (gsym->is_defined()
7618 && !gsym->is_from_dynobj()
7619 && !gsym->is_preemptible()));
7621 Arm_relocate_functions::arm_branch_common(
7622 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7623 thumb_bit, is_weakly_undefined_without_plt);
7626 case elfcpp::R_ARM_THM_JUMP19:
7628 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
7632 case elfcpp::R_ARM_THM_JUMP6:
7634 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
7637 case elfcpp::R_ARM_THM_JUMP8:
7639 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
7642 case elfcpp::R_ARM_THM_JUMP11:
7644 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
7647 case elfcpp::R_ARM_PREL31:
7648 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
7649 address, thumb_bit);
7652 case elfcpp::R_ARM_V4BX:
7653 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
7655 const bool is_v4bx_interworking =
7656 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
7658 Arm_relocate_functions::v4bx(relinfo, view, object, address,
7659 is_v4bx_interworking);
7663 case elfcpp::R_ARM_THM_PC8:
7665 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
7668 case elfcpp::R_ARM_THM_PC12:
7670 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
7673 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7675 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
7679 case elfcpp::R_ARM_ALU_PC_G0_NC:
7681 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
7682 address, thumb_bit, false);
7685 case elfcpp::R_ARM_ALU_PC_G0:
7687 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
7688 address, thumb_bit, true);
7691 case elfcpp::R_ARM_ALU_PC_G1_NC:
7693 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
7694 address, thumb_bit, false);
7697 case elfcpp::R_ARM_ALU_PC_G1:
7699 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
7700 address, thumb_bit, true);
7703 case elfcpp::R_ARM_ALU_PC_G2:
7705 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 2,
7706 address, thumb_bit, true);
7709 case elfcpp::R_ARM_ALU_SB_G0_NC:
7711 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
7712 sym_origin, thumb_bit, false);
7715 case elfcpp::R_ARM_ALU_SB_G0:
7717 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
7718 sym_origin, thumb_bit, true);
7721 case elfcpp::R_ARM_ALU_SB_G1_NC:
7723 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
7724 sym_origin, thumb_bit, false);
7727 case elfcpp::R_ARM_ALU_SB_G1:
7729 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
7730 sym_origin, thumb_bit, true);
7733 case elfcpp::R_ARM_ALU_SB_G2:
7735 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 2,
7736 sym_origin, thumb_bit, true);
7739 case elfcpp::R_ARM_LDR_PC_G0:
7741 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 0,
7745 case elfcpp::R_ARM_LDR_PC_G1:
7747 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 1,
7751 case elfcpp::R_ARM_LDR_PC_G2:
7753 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 2,
7757 case elfcpp::R_ARM_LDR_SB_G0:
7759 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 0,
7763 case elfcpp::R_ARM_LDR_SB_G1:
7765 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 1,
7769 case elfcpp::R_ARM_LDR_SB_G2:
7771 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 2,
7775 case elfcpp::R_ARM_LDRS_PC_G0:
7777 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 0,
7781 case elfcpp::R_ARM_LDRS_PC_G1:
7783 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 1,
7787 case elfcpp::R_ARM_LDRS_PC_G2:
7789 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 2,
7793 case elfcpp::R_ARM_LDRS_SB_G0:
7795 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 0,
7799 case elfcpp::R_ARM_LDRS_SB_G1:
7801 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 1,
7805 case elfcpp::R_ARM_LDRS_SB_G2:
7807 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 2,
7811 case elfcpp::R_ARM_LDC_PC_G0:
7813 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 0,
7817 case elfcpp::R_ARM_LDC_PC_G1:
7819 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 1,
7823 case elfcpp::R_ARM_LDC_PC_G2:
7825 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 2,
7829 case elfcpp::R_ARM_LDC_SB_G0:
7831 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 0,
7835 case elfcpp::R_ARM_LDC_SB_G1:
7837 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 1,
7841 case elfcpp::R_ARM_LDC_SB_G2:
7843 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 2,
7847 case elfcpp::R_ARM_TARGET1:
7848 // This should have been mapped to another type already.
7850 case elfcpp::R_ARM_COPY:
7851 case elfcpp::R_ARM_GLOB_DAT:
7852 case elfcpp::R_ARM_JUMP_SLOT:
7853 case elfcpp::R_ARM_RELATIVE:
7854 // These are relocations which should only be seen by the
7855 // dynamic linker, and should never be seen here.
7856 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7857 _("unexpected reloc %u in object file"),
7862 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7863 _("unsupported reloc %u"),
7868 // Report any errors.
7869 switch (reloc_status)
7871 case Arm_relocate_functions::STATUS_OKAY:
7873 case Arm_relocate_functions::STATUS_OVERFLOW:
7874 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7875 _("relocation overflow in relocation %u"),
7878 case Arm_relocate_functions::STATUS_BAD_RELOC:
7879 gold_error_at_location(
7883 _("unexpected opcode while processing relocation %u"),
7893 // Relocate section data.
7895 template<bool big_endian>
7897 Target_arm<big_endian>::relocate_section(
7898 const Relocate_info<32, big_endian>* relinfo,
7899 unsigned int sh_type,
7900 const unsigned char* prelocs,
7902 Output_section* output_section,
7903 bool needs_special_offset_handling,
7904 unsigned char* view,
7905 Arm_address address,
7906 section_size_type view_size,
7907 const Reloc_symbol_changes* reloc_symbol_changes)
7909 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
7910 gold_assert(sh_type == elfcpp::SHT_REL);
7912 Arm_input_section<big_endian>* arm_input_section =
7913 this->find_arm_input_section(relinfo->object, relinfo->data_shndx);
7915 // This is an ARM input section and the view covers the whole output
7917 if (arm_input_section != NULL)
7919 gold_assert(needs_special_offset_handling);
7920 Arm_address section_address = arm_input_section->address();
7921 section_size_type section_size = arm_input_section->data_size();
7923 gold_assert((arm_input_section->address() >= address)
7924 && ((arm_input_section->address()
7925 + arm_input_section->data_size())
7926 <= (address + view_size)));
7928 off_t offset = section_address - address;
7931 view_size = section_size;
7934 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
7941 needs_special_offset_handling,
7945 reloc_symbol_changes);
7948 // Return the size of a relocation while scanning during a relocatable
7951 template<bool big_endian>
7953 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
7954 unsigned int r_type,
7957 r_type = get_real_reloc_type(r_type);
7960 case elfcpp::R_ARM_NONE:
7963 case elfcpp::R_ARM_ABS8:
7966 case elfcpp::R_ARM_ABS16:
7967 case elfcpp::R_ARM_THM_ABS5:
7968 case elfcpp::R_ARM_THM_JUMP6:
7969 case elfcpp::R_ARM_THM_JUMP8:
7970 case elfcpp::R_ARM_THM_JUMP11:
7971 case elfcpp::R_ARM_THM_PC8:
7974 case elfcpp::R_ARM_ABS32:
7975 case elfcpp::R_ARM_ABS32_NOI:
7976 case elfcpp::R_ARM_ABS12:
7977 case elfcpp::R_ARM_BASE_ABS:
7978 case elfcpp::R_ARM_REL32:
7979 case elfcpp::R_ARM_THM_CALL:
7980 case elfcpp::R_ARM_GOTOFF32:
7981 case elfcpp::R_ARM_BASE_PREL:
7982 case elfcpp::R_ARM_GOT_BREL:
7983 case elfcpp::R_ARM_GOT_PREL:
7984 case elfcpp::R_ARM_PLT32:
7985 case elfcpp::R_ARM_CALL:
7986 case elfcpp::R_ARM_JUMP24:
7987 case elfcpp::R_ARM_PREL31:
7988 case elfcpp::R_ARM_MOVW_ABS_NC:
7989 case elfcpp::R_ARM_MOVT_ABS:
7990 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7991 case elfcpp::R_ARM_THM_MOVT_ABS:
7992 case elfcpp::R_ARM_MOVW_PREL_NC:
7993 case elfcpp::R_ARM_MOVT_PREL:
7994 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7995 case elfcpp::R_ARM_THM_MOVT_PREL:
7996 case elfcpp::R_ARM_MOVW_BREL_NC:
7997 case elfcpp::R_ARM_MOVT_BREL:
7998 case elfcpp::R_ARM_MOVW_BREL:
7999 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8000 case elfcpp::R_ARM_THM_MOVT_BREL:
8001 case elfcpp::R_ARM_THM_MOVW_BREL:
8002 case elfcpp::R_ARM_V4BX:
8003 case elfcpp::R_ARM_THM_PC12:
8004 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8005 case elfcpp::R_ARM_ALU_PC_G0_NC:
8006 case elfcpp::R_ARM_ALU_PC_G0:
8007 case elfcpp::R_ARM_ALU_PC_G1_NC:
8008 case elfcpp::R_ARM_ALU_PC_G1:
8009 case elfcpp::R_ARM_ALU_PC_G2:
8010 case elfcpp::R_ARM_ALU_SB_G0_NC:
8011 case elfcpp::R_ARM_ALU_SB_G0:
8012 case elfcpp::R_ARM_ALU_SB_G1_NC:
8013 case elfcpp::R_ARM_ALU_SB_G1:
8014 case elfcpp::R_ARM_ALU_SB_G2:
8015 case elfcpp::R_ARM_LDR_PC_G0:
8016 case elfcpp::R_ARM_LDR_PC_G1:
8017 case elfcpp::R_ARM_LDR_PC_G2:
8018 case elfcpp::R_ARM_LDR_SB_G0:
8019 case elfcpp::R_ARM_LDR_SB_G1:
8020 case elfcpp::R_ARM_LDR_SB_G2:
8021 case elfcpp::R_ARM_LDRS_PC_G0:
8022 case elfcpp::R_ARM_LDRS_PC_G1:
8023 case elfcpp::R_ARM_LDRS_PC_G2:
8024 case elfcpp::R_ARM_LDRS_SB_G0:
8025 case elfcpp::R_ARM_LDRS_SB_G1:
8026 case elfcpp::R_ARM_LDRS_SB_G2:
8027 case elfcpp::R_ARM_LDC_PC_G0:
8028 case elfcpp::R_ARM_LDC_PC_G1:
8029 case elfcpp::R_ARM_LDC_PC_G2:
8030 case elfcpp::R_ARM_LDC_SB_G0:
8031 case elfcpp::R_ARM_LDC_SB_G1:
8032 case elfcpp::R_ARM_LDC_SB_G2:
8035 case elfcpp::R_ARM_TARGET1:
8036 // This should have been mapped to another type already.
8038 case elfcpp::R_ARM_COPY:
8039 case elfcpp::R_ARM_GLOB_DAT:
8040 case elfcpp::R_ARM_JUMP_SLOT:
8041 case elfcpp::R_ARM_RELATIVE:
8042 // These are relocations which should only be seen by the
8043 // dynamic linker, and should never be seen here.
8044 gold_error(_("%s: unexpected reloc %u in object file"),
8045 object->name().c_str(), r_type);
8049 object->error(_("unsupported reloc %u in object file"), r_type);
8054 // Scan the relocs during a relocatable link.
8056 template<bool big_endian>
8058 Target_arm<big_endian>::scan_relocatable_relocs(
8059 Symbol_table* symtab,
8061 Sized_relobj<32, big_endian>* object,
8062 unsigned int data_shndx,
8063 unsigned int sh_type,
8064 const unsigned char* prelocs,
8066 Output_section* output_section,
8067 bool needs_special_offset_handling,
8068 size_t local_symbol_count,
8069 const unsigned char* plocal_symbols,
8070 Relocatable_relocs* rr)
8072 gold_assert(sh_type == elfcpp::SHT_REL);
8074 typedef gold::Default_scan_relocatable_relocs<elfcpp::SHT_REL,
8075 Relocatable_size_for_reloc> Scan_relocatable_relocs;
8077 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
8078 Scan_relocatable_relocs>(
8086 needs_special_offset_handling,
8092 // Relocate a section during a relocatable link.
8094 template<bool big_endian>
8096 Target_arm<big_endian>::relocate_for_relocatable(
8097 const Relocate_info<32, big_endian>* relinfo,
8098 unsigned int sh_type,
8099 const unsigned char* prelocs,
8101 Output_section* output_section,
8102 off_t offset_in_output_section,
8103 const Relocatable_relocs* rr,
8104 unsigned char* view,
8105 Arm_address view_address,
8106 section_size_type view_size,
8107 unsigned char* reloc_view,
8108 section_size_type reloc_view_size)
8110 gold_assert(sh_type == elfcpp::SHT_REL);
8112 gold::relocate_for_relocatable<32, big_endian, elfcpp::SHT_REL>(
8117 offset_in_output_section,
8126 // Return the value to use for a dynamic symbol which requires special
8127 // treatment. This is how we support equality comparisons of function
8128 // pointers across shared library boundaries, as described in the
8129 // processor specific ABI supplement.
8131 template<bool big_endian>
8133 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
8135 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
8136 return this->plt_section()->address() + gsym->plt_offset();
8139 // Map platform-specific relocs to real relocs
8141 template<bool big_endian>
8143 Target_arm<big_endian>::get_real_reloc_type (unsigned int r_type)
8147 case elfcpp::R_ARM_TARGET1:
8148 // This is either R_ARM_ABS32 or R_ARM_REL32;
8149 return elfcpp::R_ARM_ABS32;
8151 case elfcpp::R_ARM_TARGET2:
8152 // This can be any reloc type but ususally is R_ARM_GOT_PREL
8153 return elfcpp::R_ARM_GOT_PREL;
8160 // Whether if two EABI versions V1 and V2 are compatible.
8162 template<bool big_endian>
8164 Target_arm<big_endian>::are_eabi_versions_compatible(
8165 elfcpp::Elf_Word v1,
8166 elfcpp::Elf_Word v2)
8168 // v4 and v5 are the same spec before and after it was released,
8169 // so allow mixing them.
8170 if ((v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
8171 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
8177 // Combine FLAGS from an input object called NAME and the processor-specific
8178 // flags in the ELF header of the output. Much of this is adapted from the
8179 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
8180 // in bfd/elf32-arm.c.
8182 template<bool big_endian>
8184 Target_arm<big_endian>::merge_processor_specific_flags(
8185 const std::string& name,
8186 elfcpp::Elf_Word flags)
8188 if (this->are_processor_specific_flags_set())
8190 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
8192 // Nothing to merge if flags equal to those in output.
8193 if (flags == out_flags)
8196 // Complain about various flag mismatches.
8197 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
8198 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
8199 if (!this->are_eabi_versions_compatible(version1, version2))
8200 gold_error(_("Source object %s has EABI version %d but output has "
8201 "EABI version %d."),
8203 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
8204 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
8208 // If the input is the default architecture and had the default
8209 // flags then do not bother setting the flags for the output
8210 // architecture, instead allow future merges to do this. If no
8211 // future merges ever set these flags then they will retain their
8212 // uninitialised values, which surprise surprise, correspond
8213 // to the default values.
8217 // This is the first time, just copy the flags.
8218 // We only copy the EABI version for now.
8219 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
8223 // Adjust ELF file header.
8224 template<bool big_endian>
8226 Target_arm<big_endian>::do_adjust_elf_header(
8227 unsigned char* view,
8230 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
8232 elfcpp::Ehdr<32, big_endian> ehdr(view);
8233 unsigned char e_ident[elfcpp::EI_NIDENT];
8234 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
8236 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
8237 == elfcpp::EF_ARM_EABI_UNKNOWN)
8238 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
8240 e_ident[elfcpp::EI_OSABI] = 0;
8241 e_ident[elfcpp::EI_ABIVERSION] = 0;
8243 // FIXME: Do EF_ARM_BE8 adjustment.
8245 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
8246 oehdr.put_e_ident(e_ident);
8249 // do_make_elf_object to override the same function in the base class.
8250 // We need to use a target-specific sub-class of Sized_relobj<32, big_endian>
8251 // to store ARM specific information. Hence we need to have our own
8252 // ELF object creation.
8254 template<bool big_endian>
8256 Target_arm<big_endian>::do_make_elf_object(
8257 const std::string& name,
8258 Input_file* input_file,
8259 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
8261 int et = ehdr.get_e_type();
8262 if (et == elfcpp::ET_REL)
8264 Arm_relobj<big_endian>* obj =
8265 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
8269 else if (et == elfcpp::ET_DYN)
8271 Sized_dynobj<32, big_endian>* obj =
8272 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
8278 gold_error(_("%s: unsupported ELF file type %d"),
8284 // Read the architecture from the Tag_also_compatible_with attribute, if any.
8285 // Returns -1 if no architecture could be read.
8286 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
8288 template<bool big_endian>
8290 Target_arm<big_endian>::get_secondary_compatible_arch(
8291 const Attributes_section_data* pasd)
8293 const Object_attribute *known_attributes =
8294 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
8296 // Note: the tag and its argument below are uleb128 values, though
8297 // currently-defined values fit in one byte for each.
8298 const std::string& sv =
8299 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
8301 && sv.data()[0] == elfcpp::Tag_CPU_arch
8302 && (sv.data()[1] & 128) != 128)
8303 return sv.data()[1];
8305 // This tag is "safely ignorable", so don't complain if it looks funny.
8309 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8310 // The tag is removed if ARCH is -1.
8311 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
8313 template<bool big_endian>
8315 Target_arm<big_endian>::set_secondary_compatible_arch(
8316 Attributes_section_data* pasd,
8319 Object_attribute *known_attributes =
8320 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
8324 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
8328 // Note: the tag and its argument below are uleb128 values, though
8329 // currently-defined values fit in one byte for each.
8331 sv[0] = elfcpp::Tag_CPU_arch;
8332 gold_assert(arch != 0);
8336 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
8339 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8341 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
8343 template<bool big_endian>
8345 Target_arm<big_endian>::tag_cpu_arch_combine(
8348 int* secondary_compat_out,
8350 int secondary_compat)
8352 #define T(X) elfcpp::TAG_CPU_ARCH_##X
8353 static const int v6t2[] =
8365 static const int v6k[] =
8378 static const int v7[] =
8392 static const int v6_m[] =
8407 static const int v6s_m[] =
8423 static const int v7e_m[] =
8440 static const int v4t_plus_v6_m[] =
8456 T(V4T_PLUS_V6_M) // V4T plus V6_M.
8458 static const int *comb[] =
8466 // Pseudo-architecture.
8470 // Check we've not got a higher architecture than we know about.
8472 if (oldtag >= elfcpp::MAX_TAG_CPU_ARCH || newtag >= elfcpp::MAX_TAG_CPU_ARCH)
8474 gold_error(_("%s: unknown CPU architecture"), name);
8478 // Override old tag if we have a Tag_also_compatible_with on the output.
8480 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
8481 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
8482 oldtag = T(V4T_PLUS_V6_M);
8484 // And override the new tag if we have a Tag_also_compatible_with on the
8487 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
8488 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
8489 newtag = T(V4T_PLUS_V6_M);
8491 // Architectures before V6KZ add features monotonically.
8492 int tagh = std::max(oldtag, newtag);
8493 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
8496 int tagl = std::min(oldtag, newtag);
8497 int result = comb[tagh - T(V6T2)][tagl];
8499 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8500 // as the canonical version.
8501 if (result == T(V4T_PLUS_V6_M))
8504 *secondary_compat_out = T(V6_M);
8507 *secondary_compat_out = -1;
8511 gold_error(_("%s: conflicting CPU architectures %d/%d"),
8512 name, oldtag, newtag);
8520 // Helper to print AEABI enum tag value.
8522 template<bool big_endian>
8524 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
8526 static const char *aeabi_enum_names[] =
8527 { "", "variable-size", "32-bit", "" };
8528 const size_t aeabi_enum_names_size =
8529 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
8531 if (value < aeabi_enum_names_size)
8532 return std::string(aeabi_enum_names[value]);
8536 sprintf(buffer, "<unknown value %u>", value);
8537 return std::string(buffer);
8541 // Return the string value to store in TAG_CPU_name.
8543 template<bool big_endian>
8545 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
8547 static const char *name_table[] = {
8548 // These aren't real CPU names, but we can't guess
8549 // that from the architecture version alone.
8565 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
8567 if (value < name_table_size)
8568 return std::string(name_table[value]);
8572 sprintf(buffer, "<unknown CPU value %u>", value);
8573 return std::string(buffer);
8577 // Merge object attributes from input file called NAME with those of the
8578 // output. The input object attributes are in the object pointed by PASD.
8580 template<bool big_endian>
8582 Target_arm<big_endian>::merge_object_attributes(
8584 const Attributes_section_data* pasd)
8586 // Return if there is no attributes section data.
8590 // If output has no object attributes, just copy.
8591 if (this->attributes_section_data_ == NULL)
8593 this->attributes_section_data_ = new Attributes_section_data(*pasd);
8597 const int vendor = Object_attribute::OBJ_ATTR_PROC;
8598 const Object_attribute* in_attr = pasd->known_attributes(vendor);
8599 Object_attribute* out_attr =
8600 this->attributes_section_data_->known_attributes(vendor);
8602 // This needs to happen before Tag_ABI_FP_number_model is merged. */
8603 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
8604 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
8606 // Ignore mismatches if the object doesn't use floating point. */
8607 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0)
8608 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
8609 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
8610 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0)
8611 gold_error(_("%s uses VFP register arguments, output does not"),
8615 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
8617 // Merge this attribute with existing attributes.
8620 case elfcpp::Tag_CPU_raw_name:
8621 case elfcpp::Tag_CPU_name:
8622 // These are merged after Tag_CPU_arch.
8625 case elfcpp::Tag_ABI_optimization_goals:
8626 case elfcpp::Tag_ABI_FP_optimization_goals:
8627 // Use the first value seen.
8630 case elfcpp::Tag_CPU_arch:
8632 unsigned int saved_out_attr = out_attr->int_value();
8633 // Merge Tag_CPU_arch and Tag_also_compatible_with.
8634 int secondary_compat =
8635 this->get_secondary_compatible_arch(pasd);
8636 int secondary_compat_out =
8637 this->get_secondary_compatible_arch(
8638 this->attributes_section_data_);
8639 out_attr[i].set_int_value(
8640 tag_cpu_arch_combine(name, out_attr[i].int_value(),
8641 &secondary_compat_out,
8642 in_attr[i].int_value(),
8644 this->set_secondary_compatible_arch(this->attributes_section_data_,
8645 secondary_compat_out);
8647 // Merge Tag_CPU_name and Tag_CPU_raw_name.
8648 if (out_attr[i].int_value() == saved_out_attr)
8649 ; // Leave the names alone.
8650 else if (out_attr[i].int_value() == in_attr[i].int_value())
8652 // The output architecture has been changed to match the
8653 // input architecture. Use the input names.
8654 out_attr[elfcpp::Tag_CPU_name].set_string_value(
8655 in_attr[elfcpp::Tag_CPU_name].string_value());
8656 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
8657 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
8661 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
8662 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
8665 // If we still don't have a value for Tag_CPU_name,
8666 // make one up now. Tag_CPU_raw_name remains blank.
8667 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
8669 const std::string cpu_name =
8670 this->tag_cpu_name_value(out_attr[i].int_value());
8671 // FIXME: If we see an unknown CPU, this will be set
8672 // to "<unknown CPU n>", where n is the attribute value.
8673 // This is different from BFD, which leaves the name alone.
8674 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
8679 case elfcpp::Tag_ARM_ISA_use:
8680 case elfcpp::Tag_THUMB_ISA_use:
8681 case elfcpp::Tag_WMMX_arch:
8682 case elfcpp::Tag_Advanced_SIMD_arch:
8683 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
8684 case elfcpp::Tag_ABI_FP_rounding:
8685 case elfcpp::Tag_ABI_FP_exceptions:
8686 case elfcpp::Tag_ABI_FP_user_exceptions:
8687 case elfcpp::Tag_ABI_FP_number_model:
8688 case elfcpp::Tag_VFP_HP_extension:
8689 case elfcpp::Tag_CPU_unaligned_access:
8690 case elfcpp::Tag_T2EE_use:
8691 case elfcpp::Tag_Virtualization_use:
8692 case elfcpp::Tag_MPextension_use:
8693 // Use the largest value specified.
8694 if (in_attr[i].int_value() > out_attr[i].int_value())
8695 out_attr[i].set_int_value(in_attr[i].int_value());
8698 case elfcpp::Tag_ABI_align8_preserved:
8699 case elfcpp::Tag_ABI_PCS_RO_data:
8700 // Use the smallest value specified.
8701 if (in_attr[i].int_value() < out_attr[i].int_value())
8702 out_attr[i].set_int_value(in_attr[i].int_value());
8705 case elfcpp::Tag_ABI_align8_needed:
8706 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
8707 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
8708 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
8711 // This error message should be enabled once all non-conformant
8712 // binaries in the toolchain have had the attributes set
8714 // gold_error(_("output 8-byte data alignment conflicts with %s"),
8718 case elfcpp::Tag_ABI_FP_denormal:
8719 case elfcpp::Tag_ABI_PCS_GOT_use:
8721 // These tags have 0 = don't care, 1 = strong requirement,
8722 // 2 = weak requirement.
8723 static const int order_021[3] = {0, 2, 1};
8725 // Use the "greatest" from the sequence 0, 2, 1, or the largest
8726 // value if greater than 2 (for future-proofing).
8727 if ((in_attr[i].int_value() > 2
8728 && in_attr[i].int_value() > out_attr[i].int_value())
8729 || (in_attr[i].int_value() <= 2
8730 && out_attr[i].int_value() <= 2
8731 && (order_021[in_attr[i].int_value()]
8732 > order_021[out_attr[i].int_value()])))
8733 out_attr[i].set_int_value(in_attr[i].int_value());
8737 case elfcpp::Tag_CPU_arch_profile:
8738 if (out_attr[i].int_value() != in_attr[i].int_value())
8740 // 0 will merge with anything.
8741 // 'A' and 'S' merge to 'A'.
8742 // 'R' and 'S' merge to 'R'.
8743 // 'M' and 'A|R|S' is an error.
8744 if (out_attr[i].int_value() == 0
8745 || (out_attr[i].int_value() == 'S'
8746 && (in_attr[i].int_value() == 'A'
8747 || in_attr[i].int_value() == 'R')))
8748 out_attr[i].set_int_value(in_attr[i].int_value());
8749 else if (in_attr[i].int_value() == 0
8750 || (in_attr[i].int_value() == 'S'
8751 && (out_attr[i].int_value() == 'A'
8752 || out_attr[i].int_value() == 'R')))
8757 (_("conflicting architecture profiles %c/%c"),
8758 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
8759 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
8763 case elfcpp::Tag_VFP_arch:
8780 // Values greater than 6 aren't defined, so just pick the
8782 if (in_attr[i].int_value() > 6
8783 && in_attr[i].int_value() > out_attr[i].int_value())
8785 *out_attr = *in_attr;
8788 // The output uses the superset of input features
8789 // (ISA version) and registers.
8790 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
8791 vfp_versions[out_attr[i].int_value()].ver);
8792 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
8793 vfp_versions[out_attr[i].int_value()].regs);
8794 // This assumes all possible supersets are also a valid
8797 for (newval = 6; newval > 0; newval--)
8799 if (regs == vfp_versions[newval].regs
8800 && ver == vfp_versions[newval].ver)
8803 out_attr[i].set_int_value(newval);
8806 case elfcpp::Tag_PCS_config:
8807 if (out_attr[i].int_value() == 0)
8808 out_attr[i].set_int_value(in_attr[i].int_value());
8809 else if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8811 // It's sometimes ok to mix different configs, so this is only
8813 gold_warning(_("%s: conflicting platform configuration"), name);
8816 case elfcpp::Tag_ABI_PCS_R9_use:
8817 if (in_attr[i].int_value() != out_attr[i].int_value()
8818 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
8819 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused)
8821 gold_error(_("%s: conflicting use of R9"), name);
8823 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
8824 out_attr[i].set_int_value(in_attr[i].int_value());
8826 case elfcpp::Tag_ABI_PCS_RW_data:
8827 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
8828 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8829 != elfcpp::AEABI_R9_SB)
8830 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8831 != elfcpp::AEABI_R9_unused))
8833 gold_error(_("%s: SB relative addressing conflicts with use "
8837 // Use the smallest value specified.
8838 if (in_attr[i].int_value() < out_attr[i].int_value())
8839 out_attr[i].set_int_value(in_attr[i].int_value());
8841 case elfcpp::Tag_ABI_PCS_wchar_t:
8842 // FIXME: Make it possible to turn off this warning.
8843 if (out_attr[i].int_value()
8844 && in_attr[i].int_value()
8845 && out_attr[i].int_value() != in_attr[i].int_value())
8847 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
8848 "use %u-byte wchar_t; use of wchar_t values "
8849 "across objects may fail"),
8850 name, in_attr[i].int_value(),
8851 out_attr[i].int_value());
8853 else if (in_attr[i].int_value() && !out_attr[i].int_value())
8854 out_attr[i].set_int_value(in_attr[i].int_value());
8856 case elfcpp::Tag_ABI_enum_size:
8857 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
8859 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
8860 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
8862 // The existing object is compatible with anything.
8863 // Use whatever requirements the new object has.
8864 out_attr[i].set_int_value(in_attr[i].int_value());
8866 // FIXME: Make it possible to turn off this warning.
8867 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
8868 && out_attr[i].int_value() != in_attr[i].int_value())
8870 unsigned int in_value = in_attr[i].int_value();
8871 unsigned int out_value = out_attr[i].int_value();
8872 gold_warning(_("%s uses %s enums yet the output is to use "
8873 "%s enums; use of enum values across objects "
8876 this->aeabi_enum_name(in_value).c_str(),
8877 this->aeabi_enum_name(out_value).c_str());
8881 case elfcpp::Tag_ABI_VFP_args:
8884 case elfcpp::Tag_ABI_WMMX_args:
8885 if (in_attr[i].int_value() != out_attr[i].int_value())
8887 gold_error(_("%s uses iWMMXt register arguments, output does "
8892 case Object_attribute::Tag_compatibility:
8893 // Merged in target-independent code.
8895 case elfcpp::Tag_ABI_HardFP_use:
8896 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
8897 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
8898 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
8899 out_attr[i].set_int_value(3);
8900 else if (in_attr[i].int_value() > out_attr[i].int_value())
8901 out_attr[i].set_int_value(in_attr[i].int_value());
8903 case elfcpp::Tag_ABI_FP_16bit_format:
8904 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8906 if (in_attr[i].int_value() != out_attr[i].int_value())
8907 gold_error(_("fp16 format mismatch between %s and output"),
8910 if (in_attr[i].int_value() != 0)
8911 out_attr[i].set_int_value(in_attr[i].int_value());
8914 case elfcpp::Tag_nodefaults:
8915 // This tag is set if it exists, but the value is unused (and is
8916 // typically zero). We don't actually need to do anything here -
8917 // the merge happens automatically when the type flags are merged
8920 case elfcpp::Tag_also_compatible_with:
8921 // Already done in Tag_CPU_arch.
8923 case elfcpp::Tag_conformance:
8924 // Keep the attribute if it matches. Throw it away otherwise.
8925 // No attribute means no claim to conform.
8926 if (in_attr[i].string_value() != out_attr[i].string_value())
8927 out_attr[i].set_string_value("");
8932 const char* err_object = NULL;
8934 // The "known_obj_attributes" table does contain some undefined
8935 // attributes. Ensure that there are unused.
8936 if (out_attr[i].int_value() != 0
8937 || out_attr[i].string_value() != "")
8938 err_object = "output";
8939 else if (in_attr[i].int_value() != 0
8940 || in_attr[i].string_value() != "")
8943 if (err_object != NULL)
8945 // Attribute numbers >=64 (mod 128) can be safely ignored.
8947 gold_error(_("%s: unknown mandatory EABI object attribute "
8951 gold_warning(_("%s: unknown EABI object attribute %d"),
8955 // Only pass on attributes that match in both inputs.
8956 if (!in_attr[i].matches(out_attr[i]))
8958 out_attr[i].set_int_value(0);
8959 out_attr[i].set_string_value("");
8964 // If out_attr was copied from in_attr then it won't have a type yet.
8965 if (in_attr[i].type() && !out_attr[i].type())
8966 out_attr[i].set_type(in_attr[i].type());
8969 // Merge Tag_compatibility attributes and any common GNU ones.
8970 this->attributes_section_data_->merge(name, pasd);
8972 // Check for any attributes not known on ARM.
8973 typedef Vendor_object_attributes::Other_attributes Other_attributes;
8974 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
8975 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
8976 Other_attributes* out_other_attributes =
8977 this->attributes_section_data_->other_attributes(vendor);
8978 Other_attributes::iterator out_iter = out_other_attributes->begin();
8980 while (in_iter != in_other_attributes->end()
8981 || out_iter != out_other_attributes->end())
8983 const char* err_object = NULL;
8986 // The tags for each list are in numerical order.
8987 // If the tags are equal, then merge.
8988 if (out_iter != out_other_attributes->end()
8989 && (in_iter == in_other_attributes->end()
8990 || in_iter->first > out_iter->first))
8992 // This attribute only exists in output. We can't merge, and we
8993 // don't know what the tag means, so delete it.
8994 err_object = "output";
8995 err_tag = out_iter->first;
8996 int saved_tag = out_iter->first;
8997 delete out_iter->second;
8998 out_other_attributes->erase(out_iter);
8999 out_iter = out_other_attributes->upper_bound(saved_tag);
9001 else if (in_iter != in_other_attributes->end()
9002 && (out_iter != out_other_attributes->end()
9003 || in_iter->first < out_iter->first))
9005 // This attribute only exists in input. We can't merge, and we
9006 // don't know what the tag means, so ignore it.
9008 err_tag = in_iter->first;
9011 else // The tags are equal.
9013 // As present, all attributes in the list are unknown, and
9014 // therefore can't be merged meaningfully.
9015 err_object = "output";
9016 err_tag = out_iter->first;
9018 // Only pass on attributes that match in both inputs.
9019 if (!in_iter->second->matches(*(out_iter->second)))
9021 // No match. Delete the attribute.
9022 int saved_tag = out_iter->first;
9023 delete out_iter->second;
9024 out_other_attributes->erase(out_iter);
9025 out_iter = out_other_attributes->upper_bound(saved_tag);
9029 // Matched. Keep the attribute and move to the next.
9037 // Attribute numbers >=64 (mod 128) can be safely ignored. */
9038 if ((err_tag & 127) < 64)
9040 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
9041 err_object, err_tag);
9045 gold_warning(_("%s: unknown EABI object attribute %d"),
9046 err_object, err_tag);
9052 // Return whether a relocation type used the LSB to distinguish THUMB
9054 template<bool big_endian>
9056 Target_arm<big_endian>::reloc_uses_thumb_bit(unsigned int r_type)
9060 case elfcpp::R_ARM_PC24:
9061 case elfcpp::R_ARM_ABS32:
9062 case elfcpp::R_ARM_REL32:
9063 case elfcpp::R_ARM_SBREL32:
9064 case elfcpp::R_ARM_THM_CALL:
9065 case elfcpp::R_ARM_GLOB_DAT:
9066 case elfcpp::R_ARM_JUMP_SLOT:
9067 case elfcpp::R_ARM_GOTOFF32:
9068 case elfcpp::R_ARM_PLT32:
9069 case elfcpp::R_ARM_CALL:
9070 case elfcpp::R_ARM_JUMP24:
9071 case elfcpp::R_ARM_THM_JUMP24:
9072 case elfcpp::R_ARM_SBREL31:
9073 case elfcpp::R_ARM_PREL31:
9074 case elfcpp::R_ARM_MOVW_ABS_NC:
9075 case elfcpp::R_ARM_MOVW_PREL_NC:
9076 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9077 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9078 case elfcpp::R_ARM_THM_JUMP19:
9079 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9080 case elfcpp::R_ARM_ALU_PC_G0_NC:
9081 case elfcpp::R_ARM_ALU_PC_G0:
9082 case elfcpp::R_ARM_ALU_PC_G1_NC:
9083 case elfcpp::R_ARM_ALU_PC_G1:
9084 case elfcpp::R_ARM_ALU_PC_G2:
9085 case elfcpp::R_ARM_ALU_SB_G0_NC:
9086 case elfcpp::R_ARM_ALU_SB_G0:
9087 case elfcpp::R_ARM_ALU_SB_G1_NC:
9088 case elfcpp::R_ARM_ALU_SB_G1:
9089 case elfcpp::R_ARM_ALU_SB_G2:
9090 case elfcpp::R_ARM_MOVW_BREL_NC:
9091 case elfcpp::R_ARM_MOVW_BREL:
9092 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9093 case elfcpp::R_ARM_THM_MOVW_BREL:
9100 // Stub-generation methods for Target_arm.
9102 // Make a new Arm_input_section object.
9104 template<bool big_endian>
9105 Arm_input_section<big_endian>*
9106 Target_arm<big_endian>::new_arm_input_section(
9110 Section_id sid(relobj, shndx);
9112 Arm_input_section<big_endian>* arm_input_section =
9113 new Arm_input_section<big_endian>(relobj, shndx);
9114 arm_input_section->init();
9116 // Register new Arm_input_section in map for look-up.
9117 std::pair<typename Arm_input_section_map::iterator, bool> ins =
9118 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
9120 // Make sure that it we have not created another Arm_input_section
9121 // for this input section already.
9122 gold_assert(ins.second);
9124 return arm_input_section;
9127 // Find the Arm_input_section object corresponding to the SHNDX-th input
9128 // section of RELOBJ.
9130 template<bool big_endian>
9131 Arm_input_section<big_endian>*
9132 Target_arm<big_endian>::find_arm_input_section(
9134 unsigned int shndx) const
9136 Section_id sid(relobj, shndx);
9137 typename Arm_input_section_map::const_iterator p =
9138 this->arm_input_section_map_.find(sid);
9139 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
9142 // Make a new stub table.
9144 template<bool big_endian>
9145 Stub_table<big_endian>*
9146 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
9148 Stub_table<big_endian>* stub_table =
9149 new Stub_table<big_endian>(owner);
9150 this->stub_tables_.push_back(stub_table);
9152 stub_table->set_address(owner->address() + owner->data_size());
9153 stub_table->set_file_offset(owner->offset() + owner->data_size());
9154 stub_table->finalize_data_size();
9159 // Scan a relocation for stub generation.
9161 template<bool big_endian>
9163 Target_arm<big_endian>::scan_reloc_for_stub(
9164 const Relocate_info<32, big_endian>* relinfo,
9165 unsigned int r_type,
9166 const Sized_symbol<32>* gsym,
9168 const Symbol_value<32>* psymval,
9169 elfcpp::Elf_types<32>::Elf_Swxword addend,
9170 Arm_address address)
9172 typedef typename Target_arm<big_endian>::Relocate Relocate;
9174 const Arm_relobj<big_endian>* arm_relobj =
9175 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9177 if (r_type == elfcpp::R_ARM_V4BX)
9179 const uint32_t reg = (addend & 0xf);
9180 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9183 // Try looking up an existing stub from a stub table.
9184 Stub_table<big_endian>* stub_table =
9185 arm_relobj->stub_table(relinfo->data_shndx);
9186 gold_assert(stub_table != NULL);
9188 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
9190 // create a new stub and add it to stub table.
9191 Arm_v4bx_stub* stub =
9192 this->stub_factory().make_arm_v4bx_stub(reg);
9193 gold_assert(stub != NULL);
9194 stub_table->add_arm_v4bx_stub(stub);
9201 bool target_is_thumb;
9202 Symbol_value<32> symval;
9205 // This is a global symbol. Determine if we use PLT and if the
9206 // final target is THUMB.
9207 if (gsym->use_plt_offset(Relocate::reloc_is_non_pic(r_type)))
9209 // This uses a PLT, change the symbol value.
9210 symval.set_output_value(this->plt_section()->address()
9211 + gsym->plt_offset());
9213 target_is_thumb = false;
9215 else if (gsym->is_undefined())
9216 // There is no need to generate a stub symbol is undefined.
9221 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
9222 || (gsym->type() == elfcpp::STT_FUNC
9223 && !gsym->is_undefined()
9224 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
9229 // This is a local symbol. Determine if the final target is THUMB.
9230 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
9233 // Strip LSB if this points to a THUMB target.
9235 && Target_arm<big_endian>::reloc_uses_thumb_bit(r_type)
9236 && ((psymval->value(arm_relobj, 0) & 1) != 0))
9238 Arm_address stripped_value =
9239 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
9240 symval.set_output_value(stripped_value);
9244 // Get the symbol value.
9245 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
9247 // Owing to pipelining, the PC relative branches below actually skip
9248 // two instructions when the branch offset is 0.
9249 Arm_address destination;
9252 case elfcpp::R_ARM_CALL:
9253 case elfcpp::R_ARM_JUMP24:
9254 case elfcpp::R_ARM_PLT32:
9256 destination = value + addend + 8;
9258 case elfcpp::R_ARM_THM_CALL:
9259 case elfcpp::R_ARM_THM_XPC22:
9260 case elfcpp::R_ARM_THM_JUMP24:
9261 case elfcpp::R_ARM_THM_JUMP19:
9263 destination = value + addend + 4;
9269 Reloc_stub* stub = NULL;
9270 Stub_type stub_type =
9271 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
9273 if (stub_type != arm_stub_none)
9275 // Try looking up an existing stub from a stub table.
9276 Stub_table<big_endian>* stub_table =
9277 arm_relobj->stub_table(relinfo->data_shndx);
9278 gold_assert(stub_table != NULL);
9280 // Locate stub by destination.
9281 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
9283 // Create a stub if there is not one already
9284 stub = stub_table->find_reloc_stub(stub_key);
9287 // create a new stub and add it to stub table.
9288 stub = this->stub_factory().make_reloc_stub(stub_type);
9289 stub_table->add_reloc_stub(stub, stub_key);
9292 // Record the destination address.
9293 stub->set_destination_address(destination
9294 | (target_is_thumb ? 1 : 0));
9297 // For Cortex-A8, we need to record a relocation at 4K page boundary.
9298 if (this->fix_cortex_a8_
9299 && (r_type == elfcpp::R_ARM_THM_JUMP24
9300 || r_type == elfcpp::R_ARM_THM_JUMP19
9301 || r_type == elfcpp::R_ARM_THM_CALL
9302 || r_type == elfcpp::R_ARM_THM_XPC22)
9303 && (address & 0xfffU) == 0xffeU)
9305 // Found a candidate. Note we haven't checked the destination is
9306 // within 4K here: if we do so (and don't create a record) we can't
9307 // tell that a branch should have been relocated when scanning later.
9308 this->cortex_a8_relocs_info_[address] =
9309 new Cortex_a8_reloc(stub, r_type,
9310 destination | (target_is_thumb ? 1 : 0));
9314 // This function scans a relocation sections for stub generation.
9315 // The template parameter Relocate must be a class type which provides
9316 // a single function, relocate(), which implements the machine
9317 // specific part of a relocation.
9319 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
9320 // SHT_REL or SHT_RELA.
9322 // PRELOCS points to the relocation data. RELOC_COUNT is the number
9323 // of relocs. OUTPUT_SECTION is the output section.
9324 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
9325 // mapped to output offsets.
9327 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
9328 // VIEW_SIZE is the size. These refer to the input section, unless
9329 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
9330 // the output section.
9332 template<bool big_endian>
9333 template<int sh_type>
9335 Target_arm<big_endian>::scan_reloc_section_for_stubs(
9336 const Relocate_info<32, big_endian>* relinfo,
9337 const unsigned char* prelocs,
9339 Output_section* output_section,
9340 bool needs_special_offset_handling,
9341 const unsigned char* view,
9342 elfcpp::Elf_types<32>::Elf_Addr view_address,
9345 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
9346 const int reloc_size =
9347 Reloc_types<sh_type, 32, big_endian>::reloc_size;
9349 Arm_relobj<big_endian>* arm_object =
9350 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9351 unsigned int local_count = arm_object->local_symbol_count();
9353 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
9355 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
9357 Reltype reloc(prelocs);
9359 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
9360 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9361 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
9363 r_type = this->get_real_reloc_type(r_type);
9365 // Only a few relocation types need stubs.
9366 if ((r_type != elfcpp::R_ARM_CALL)
9367 && (r_type != elfcpp::R_ARM_JUMP24)
9368 && (r_type != elfcpp::R_ARM_PLT32)
9369 && (r_type != elfcpp::R_ARM_THM_CALL)
9370 && (r_type != elfcpp::R_ARM_THM_XPC22)
9371 && (r_type != elfcpp::R_ARM_THM_JUMP24)
9372 && (r_type != elfcpp::R_ARM_THM_JUMP19)
9373 && (r_type != elfcpp::R_ARM_V4BX))
9376 section_offset_type offset =
9377 convert_to_section_size_type(reloc.get_r_offset());
9379 if (needs_special_offset_handling)
9381 offset = output_section->output_offset(relinfo->object,
9382 relinfo->data_shndx,
9388 if (r_type == elfcpp::R_ARM_V4BX)
9390 // Get the BX instruction.
9391 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
9392 const Valtype* wv = reinterpret_cast<const Valtype*>(view + offset);
9393 elfcpp::Elf_types<32>::Elf_Swxword insn =
9394 elfcpp::Swap<32, big_endian>::readval(wv);
9395 this->scan_reloc_for_stub(relinfo, r_type, NULL, 0, NULL,
9401 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
9402 elfcpp::Elf_types<32>::Elf_Swxword addend =
9403 stub_addend_reader(r_type, view + offset, reloc);
9405 const Sized_symbol<32>* sym;
9407 Symbol_value<32> symval;
9408 const Symbol_value<32> *psymval;
9409 if (r_sym < local_count)
9412 psymval = arm_object->local_symbol(r_sym);
9414 // If the local symbol belongs to a section we are discarding,
9415 // and that section is a debug section, try to find the
9416 // corresponding kept section and map this symbol to its
9417 // counterpart in the kept section. The symbol must not
9418 // correspond to a section we are folding.
9420 unsigned int shndx = psymval->input_shndx(&is_ordinary);
9422 && shndx != elfcpp::SHN_UNDEF
9423 && !arm_object->is_section_included(shndx)
9424 && !(relinfo->symtab->is_section_folded(arm_object, shndx)))
9426 if (comdat_behavior == CB_UNDETERMINED)
9429 arm_object->section_name(relinfo->data_shndx);
9430 comdat_behavior = get_comdat_behavior(name.c_str());
9432 if (comdat_behavior == CB_PRETEND)
9435 typename elfcpp::Elf_types<32>::Elf_Addr value =
9436 arm_object->map_to_kept_section(shndx, &found);
9438 symval.set_output_value(value + psymval->input_value());
9440 symval.set_output_value(0);
9444 symval.set_output_value(0);
9446 symval.set_no_output_symtab_entry();
9452 const Symbol* gsym = arm_object->global_symbol(r_sym);
9453 gold_assert(gsym != NULL);
9454 if (gsym->is_forwarder())
9455 gsym = relinfo->symtab->resolve_forwards(gsym);
9457 sym = static_cast<const Sized_symbol<32>*>(gsym);
9458 if (sym->has_symtab_index())
9459 symval.set_output_symtab_index(sym->symtab_index());
9461 symval.set_no_output_symtab_entry();
9463 // We need to compute the would-be final value of this global
9465 const Symbol_table* symtab = relinfo->symtab;
9466 const Sized_symbol<32>* sized_symbol =
9467 symtab->get_sized_symbol<32>(gsym);
9468 Symbol_table::Compute_final_value_status status;
9470 symtab->compute_final_value<32>(sized_symbol, &status);
9472 // Skip this if the symbol has not output section.
9473 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
9476 symval.set_output_value(value);
9480 // If symbol is a section symbol, we don't know the actual type of
9481 // destination. Give up.
9482 if (psymval->is_section_symbol())
9485 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
9486 addend, view_address + offset);
9490 // Scan an input section for stub generation.
9492 template<bool big_endian>
9494 Target_arm<big_endian>::scan_section_for_stubs(
9495 const Relocate_info<32, big_endian>* relinfo,
9496 unsigned int sh_type,
9497 const unsigned char* prelocs,
9499 Output_section* output_section,
9500 bool needs_special_offset_handling,
9501 const unsigned char* view,
9502 Arm_address view_address,
9503 section_size_type view_size)
9505 if (sh_type == elfcpp::SHT_REL)
9506 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
9511 needs_special_offset_handling,
9515 else if (sh_type == elfcpp::SHT_RELA)
9516 // We do not support RELA type relocations yet. This is provided for
9518 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
9523 needs_special_offset_handling,
9531 // Group input sections for stub generation.
9533 // We goup input sections in an output sections so that the total size,
9534 // including any padding space due to alignment is smaller than GROUP_SIZE
9535 // unless the only input section in group is bigger than GROUP_SIZE already.
9536 // Then an ARM stub table is created to follow the last input section
9537 // in group. For each group an ARM stub table is created an is placed
9538 // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further
9539 // extend the group after the stub table.
9541 template<bool big_endian>
9543 Target_arm<big_endian>::group_sections(
9545 section_size_type group_size,
9546 bool stubs_always_after_branch)
9548 // Group input sections and insert stub table
9549 Layout::Section_list section_list;
9550 layout->get_allocated_sections(§ion_list);
9551 for (Layout::Section_list::const_iterator p = section_list.begin();
9552 p != section_list.end();
9555 Arm_output_section<big_endian>* output_section =
9556 Arm_output_section<big_endian>::as_arm_output_section(*p);
9557 output_section->group_sections(group_size, stubs_always_after_branch,
9562 // Relaxation hook. This is where we do stub generation.
9564 template<bool big_endian>
9566 Target_arm<big_endian>::do_relax(
9568 const Input_objects* input_objects,
9569 Symbol_table* symtab,
9572 // No need to generate stubs if this is a relocatable link.
9573 gold_assert(!parameters->options().relocatable());
9575 // If this is the first pass, we need to group input sections into
9577 bool done_exidx_fixup = false;
9580 // Determine the stub group size. The group size is the absolute
9581 // value of the parameter --stub-group-size. If --stub-group-size
9582 // is passed a negative value, we restict stubs to be always after
9583 // the stubbed branches.
9584 int32_t stub_group_size_param =
9585 parameters->options().stub_group_size();
9586 bool stubs_always_after_branch = stub_group_size_param < 0;
9587 section_size_type stub_group_size = abs(stub_group_size_param);
9589 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
9590 // page as the first half of a 32-bit branch straddling two 4K pages.
9591 // This is a crude way of enforcing that.
9592 if (this->fix_cortex_a8_)
9593 stubs_always_after_branch = true;
9595 if (stub_group_size == 1)
9598 // Thumb branch range is +-4MB has to be used as the default
9599 // maximum size (a given section can contain both ARM and Thumb
9600 // code, so the worst case has to be taken into account).
9602 // This value is 24K less than that, which allows for 2025
9603 // 12-byte stubs. If we exceed that, then we will fail to link.
9604 // The user will have to relink with an explicit group size
9606 stub_group_size = 4170000;
9609 group_sections(layout, stub_group_size, stubs_always_after_branch);
9611 // Also fix .ARM.exidx section coverage.
9612 Output_section* os = layout->find_output_section(".ARM.exidx");
9613 if (os != NULL && os->type() == elfcpp::SHT_ARM_EXIDX)
9615 Arm_output_section<big_endian>* exidx_output_section =
9616 Arm_output_section<big_endian>::as_arm_output_section(os);
9617 this->fix_exidx_coverage(layout, exidx_output_section, symtab);
9618 done_exidx_fixup = true;
9622 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
9623 // beginning of each relaxation pass, just blow away all the stubs.
9624 // Alternatively, we could selectively remove only the stubs and reloc
9625 // information for code sections that have moved since the last pass.
9626 // That would require more book-keeping.
9627 typedef typename Stub_table_list::iterator Stub_table_iterator;
9628 if (this->fix_cortex_a8_)
9630 // Clear all Cortex-A8 reloc information.
9631 for (typename Cortex_a8_relocs_info::const_iterator p =
9632 this->cortex_a8_relocs_info_.begin();
9633 p != this->cortex_a8_relocs_info_.end();
9636 this->cortex_a8_relocs_info_.clear();
9638 // Remove all Cortex-A8 stubs.
9639 for (Stub_table_iterator sp = this->stub_tables_.begin();
9640 sp != this->stub_tables_.end();
9642 (*sp)->remove_all_cortex_a8_stubs();
9645 // Scan relocs for relocation stubs
9646 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9647 op != input_objects->relobj_end();
9650 Arm_relobj<big_endian>* arm_relobj =
9651 Arm_relobj<big_endian>::as_arm_relobj(*op);
9652 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
9655 // Check all stub tables to see if any of them have their data sizes
9656 // or addresses alignments changed. These are the only things that
9658 bool any_stub_table_changed = false;
9659 Unordered_set<const Output_section*> sections_needing_adjustment;
9660 for (Stub_table_iterator sp = this->stub_tables_.begin();
9661 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9664 if ((*sp)->update_data_size_and_addralign())
9666 // Update data size of stub table owner.
9667 Arm_input_section<big_endian>* owner = (*sp)->owner();
9668 uint64_t address = owner->address();
9669 off_t offset = owner->offset();
9670 owner->reset_address_and_file_offset();
9671 owner->set_address_and_file_offset(address, offset);
9673 sections_needing_adjustment.insert(owner->output_section());
9674 any_stub_table_changed = true;
9678 // Output_section_data::output_section() returns a const pointer but we
9679 // need to update output sections, so we record all output sections needing
9680 // update above and scan the sections here to find out what sections need
9682 for(Layout::Section_list::const_iterator p = layout->section_list().begin();
9683 p != layout->section_list().end();
9686 if (sections_needing_adjustment.find(*p)
9687 != sections_needing_adjustment.end())
9688 (*p)->set_section_offsets_need_adjustment();
9691 // Stop relaxation if no EXIDX fix-up and no stub table change.
9692 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
9694 // Finalize the stubs in the last relaxation pass.
9695 if (!continue_relaxation)
9697 for (Stub_table_iterator sp = this->stub_tables_.begin();
9698 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9700 (*sp)->finalize_stubs();
9702 // Update output local symbol counts of objects if necessary.
9703 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9704 op != input_objects->relobj_end();
9707 Arm_relobj<big_endian>* arm_relobj =
9708 Arm_relobj<big_endian>::as_arm_relobj(*op);
9710 // Update output local symbol counts. We need to discard local
9711 // symbols defined in parts of input sections that are discarded by
9713 if (arm_relobj->output_local_symbol_count_needs_update())
9714 arm_relobj->update_output_local_symbol_count();
9718 return continue_relaxation;
9723 template<bool big_endian>
9725 Target_arm<big_endian>::relocate_stub(
9727 const Relocate_info<32, big_endian>* relinfo,
9728 Output_section* output_section,
9729 unsigned char* view,
9730 Arm_address address,
9731 section_size_type view_size)
9734 const Stub_template* stub_template = stub->stub_template();
9735 for (size_t i = 0; i < stub_template->reloc_count(); i++)
9737 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
9738 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
9740 unsigned int r_type = insn->r_type();
9741 section_size_type reloc_offset = stub_template->reloc_offset(i);
9742 section_size_type reloc_size = insn->size();
9743 gold_assert(reloc_offset + reloc_size <= view_size);
9745 // This is the address of the stub destination.
9746 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
9747 Symbol_value<32> symval;
9748 symval.set_output_value(target);
9750 // Synthesize a fake reloc just in case. We don't have a symbol so
9752 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
9753 memset(reloc_buffer, 0, sizeof(reloc_buffer));
9754 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
9755 reloc_write.put_r_offset(reloc_offset);
9756 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
9757 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
9759 relocate.relocate(relinfo, this, output_section,
9760 this->fake_relnum_for_stubs, rel, r_type,
9761 NULL, &symval, view + reloc_offset,
9762 address + reloc_offset, reloc_size);
9766 // Determine whether an object attribute tag takes an integer, a
9769 template<bool big_endian>
9771 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
9773 if (tag == Object_attribute::Tag_compatibility)
9774 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9775 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
9776 else if (tag == elfcpp::Tag_nodefaults)
9777 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9778 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
9779 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
9780 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
9782 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
9784 return ((tag & 1) != 0
9785 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
9786 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
9789 // Reorder attributes.
9791 // The ABI defines that Tag_conformance should be emitted first, and that
9792 // Tag_nodefaults should be second (if either is defined). This sets those
9793 // two positions, and bumps up the position of all the remaining tags to
9796 template<bool big_endian>
9798 Target_arm<big_endian>::do_attributes_order(int num) const
9800 // Reorder the known object attributes in output. We want to move
9801 // Tag_conformance to position 4 and Tag_conformance to position 5
9802 // and shift eveything between 4 .. Tag_conformance - 1 to make room.
9804 return elfcpp::Tag_conformance;
9806 return elfcpp::Tag_nodefaults;
9807 if ((num - 2) < elfcpp::Tag_nodefaults)
9809 if ((num - 1) < elfcpp::Tag_conformance)
9814 // Scan a span of THUMB code for Cortex-A8 erratum.
9816 template<bool big_endian>
9818 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
9819 Arm_relobj<big_endian>* arm_relobj,
9821 section_size_type span_start,
9822 section_size_type span_end,
9823 const unsigned char* view,
9824 Arm_address address)
9826 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
9828 // The opcode is BLX.W, BL.W, B.W, Bcc.W
9829 // The branch target is in the same 4KB region as the
9830 // first half of the branch.
9831 // The instruction before the branch is a 32-bit
9832 // length non-branch instruction.
9833 section_size_type i = span_start;
9834 bool last_was_32bit = false;
9835 bool last_was_branch = false;
9836 while (i < span_end)
9838 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
9839 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
9840 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
9841 bool is_blx = false, is_b = false;
9842 bool is_bl = false, is_bcc = false;
9844 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
9847 // Load the rest of the insn (in manual-friendly order).
9848 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
9850 // Encoding T4: B<c>.W.
9851 is_b = (insn & 0xf800d000U) == 0xf0009000U;
9852 // Encoding T1: BL<c>.W.
9853 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
9854 // Encoding T2: BLX<c>.W.
9855 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
9856 // Encoding T3: B<c>.W (not permitted in IT block).
9857 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
9858 && (insn & 0x07f00000U) != 0x03800000U);
9861 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
9863 // If this instruction is a 32-bit THUMB branch that crosses a 4K
9864 // page boundary and it follows 32-bit non-branch instruction,
9865 // we need to work around.
9867 && ((address + i) & 0xfffU) == 0xffeU
9869 && !last_was_branch)
9871 // Check to see if there is a relocation stub for this branch.
9872 bool force_target_arm = false;
9873 bool force_target_thumb = false;
9874 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
9875 Cortex_a8_relocs_info::const_iterator p =
9876 this->cortex_a8_relocs_info_.find(address + i);
9878 if (p != this->cortex_a8_relocs_info_.end())
9880 cortex_a8_reloc = p->second;
9881 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
9883 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9884 && !target_is_thumb)
9885 force_target_arm = true;
9886 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9888 force_target_thumb = true;
9892 Stub_type stub_type = arm_stub_none;
9894 // Check if we have an offending branch instruction.
9895 uint16_t upper_insn = (insn >> 16) & 0xffffU;
9896 uint16_t lower_insn = insn & 0xffffU;
9897 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
9899 if (cortex_a8_reloc != NULL
9900 && cortex_a8_reloc->reloc_stub() != NULL)
9901 // We've already made a stub for this instruction, e.g.
9902 // it's a long branch or a Thumb->ARM stub. Assume that
9903 // stub will suffice to work around the A8 erratum (see
9904 // setting of always_after_branch above).
9908 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
9910 stub_type = arm_stub_a8_veneer_b_cond;
9912 else if (is_b || is_bl || is_blx)
9914 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
9920 ? arm_stub_a8_veneer_blx
9922 ? arm_stub_a8_veneer_bl
9923 : arm_stub_a8_veneer_b));
9926 if (stub_type != arm_stub_none)
9928 Arm_address pc_for_insn = address + i + 4;
9930 // The original instruction is a BL, but the target is
9931 // an ARM instruction. If we were not making a stub,
9932 // the BL would have been converted to a BLX. Use the
9933 // BLX stub instead in that case.
9934 if (this->may_use_blx() && force_target_arm
9935 && stub_type == arm_stub_a8_veneer_bl)
9937 stub_type = arm_stub_a8_veneer_blx;
9941 // Conversely, if the original instruction was
9942 // BLX but the target is Thumb mode, use the BL stub.
9943 else if (force_target_thumb
9944 && stub_type == arm_stub_a8_veneer_blx)
9946 stub_type = arm_stub_a8_veneer_bl;
9954 // If we found a relocation, use the proper destination,
9955 // not the offset in the (unrelocated) instruction.
9956 // Note this is always done if we switched the stub type above.
9957 if (cortex_a8_reloc != NULL)
9958 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
9960 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
9962 // Add a new stub if destination address in in the same page.
9963 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
9965 Cortex_a8_stub* stub =
9966 this->stub_factory_.make_cortex_a8_stub(stub_type,
9970 Stub_table<big_endian>* stub_table =
9971 arm_relobj->stub_table(shndx);
9972 gold_assert(stub_table != NULL);
9973 stub_table->add_cortex_a8_stub(address + i, stub);
9978 i += insn_32bit ? 4 : 2;
9979 last_was_32bit = insn_32bit;
9980 last_was_branch = is_32bit_branch;
9984 // Apply the Cortex-A8 workaround.
9986 template<bool big_endian>
9988 Target_arm<big_endian>::apply_cortex_a8_workaround(
9989 const Cortex_a8_stub* stub,
9990 Arm_address stub_address,
9991 unsigned char* insn_view,
9992 Arm_address insn_address)
9994 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
9995 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
9996 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
9997 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
9998 off_t branch_offset = stub_address - (insn_address + 4);
10000 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
10001 switch (stub->stub_template()->type())
10003 case arm_stub_a8_veneer_b_cond:
10004 gold_assert(!utils::has_overflow<21>(branch_offset));
10005 upper_insn = RelocFuncs::thumb32_cond_branch_upper(upper_insn,
10007 lower_insn = RelocFuncs::thumb32_cond_branch_lower(lower_insn,
10011 case arm_stub_a8_veneer_b:
10012 case arm_stub_a8_veneer_bl:
10013 case arm_stub_a8_veneer_blx:
10014 if ((lower_insn & 0x5000U) == 0x4000U)
10015 // For a BLX instruction, make sure that the relocation is
10016 // rounded up to a word boundary. This follows the semantics of
10017 // the instruction which specifies that bit 1 of the target
10018 // address will come from bit 1 of the base address.
10019 branch_offset = (branch_offset + 2) & ~3;
10021 // Put BRANCH_OFFSET back into the insn.
10022 gold_assert(!utils::has_overflow<25>(branch_offset));
10023 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
10024 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
10028 gold_unreachable();
10031 // Put the relocated value back in the object file:
10032 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
10033 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
10036 template<bool big_endian>
10037 class Target_selector_arm : public Target_selector
10040 Target_selector_arm()
10041 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
10042 (big_endian ? "elf32-bigarm" : "elf32-littlearm"))
10046 do_instantiate_target()
10047 { return new Target_arm<big_endian>(); }
10050 // Fix .ARM.exidx section coverage.
10052 template<bool big_endian>
10054 Target_arm<big_endian>::fix_exidx_coverage(
10056 Arm_output_section<big_endian>* exidx_section,
10057 Symbol_table* symtab)
10059 // We need to look at all the input sections in output in ascending
10060 // order of of output address. We do that by building a sorted list
10061 // of output sections by addresses. Then we looks at the output sections
10062 // in order. The input sections in an output section are already sorted
10063 // by addresses within the output section.
10065 typedef std::set<Output_section*, output_section_address_less_than>
10066 Sorted_output_section_list;
10067 Sorted_output_section_list sorted_output_sections;
10068 Layout::Section_list section_list;
10069 layout->get_allocated_sections(§ion_list);
10070 for (Layout::Section_list::const_iterator p = section_list.begin();
10071 p != section_list.end();
10074 // We only care about output sections that contain executable code.
10075 if (((*p)->flags() & elfcpp::SHF_EXECINSTR) != 0)
10076 sorted_output_sections.insert(*p);
10079 // Go over the output sections in ascending order of output addresses.
10080 typedef typename Arm_output_section<big_endian>::Text_section_list
10082 Text_section_list sorted_text_sections;
10083 for(typename Sorted_output_section_list::iterator p =
10084 sorted_output_sections.begin();
10085 p != sorted_output_sections.end();
10088 Arm_output_section<big_endian>* arm_output_section =
10089 Arm_output_section<big_endian>::as_arm_output_section(*p);
10090 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
10093 exidx_section->fix_exidx_coverage(sorted_text_sections, symtab);
10096 Target_selector_arm<false> target_selector_arm;
10097 Target_selector_arm<true> target_selector_armbe;
10099 } // End anonymous namespace.