1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian>
61 class Output_data_plt_arm;
63 template<bool big_endian>
66 template<bool big_endian>
67 class Arm_input_section;
69 class Arm_exidx_cantunwind;
71 class Arm_exidx_merged_section;
73 class Arm_exidx_fixup;
75 template<bool big_endian>
76 class Arm_output_section;
78 class Arm_exidx_input_section;
80 template<bool big_endian>
83 template<bool big_endian>
87 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
89 // Maximum branch offsets for ARM, THUMB and THUMB2.
90 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
91 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
92 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
93 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
94 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
95 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
97 // The arm target class.
99 // This is a very simple port of gold for ARM-EABI. It is intended for
100 // supporting Android only for the time being.
103 // - Implement all static relocation types documented in arm-reloc.def.
104 // - Make PLTs more flexible for different architecture features like
106 // There are probably a lot more.
108 // Ideally we would like to avoid using global variables but this is used
109 // very in many places and sometimes in loops. If we use a function
110 // returning a static instance of Arm_reloc_property_table, it will very
111 // slow in an threaded environment since the static instance needs to be
112 // locked. The pointer is below initialized in the
113 // Target::do_select_as_default_target() hook so that we do not spend time
114 // building the table if we are not linking ARM objects.
116 // An alternative is to to process the information in arm-reloc.def in
117 // compilation time and generate a representation of it in PODs only. That
118 // way we can avoid initialization when the linker starts.
120 Arm_reloc_property_table *arm_reloc_property_table = NULL;
122 // Instruction template class. This class is similar to the insn_sequence
123 // struct in bfd/elf32-arm.c.
128 // Types of instruction templates.
132 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
133 // templates with class-specific semantics. Currently this is used
134 // only by the Cortex_a8_stub class for handling condition codes in
135 // conditional branches.
136 THUMB16_SPECIAL_TYPE,
142 // Factory methods to create instruction templates in different formats.
144 static const Insn_template
145 thumb16_insn(uint32_t data)
146 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
148 // A Thumb conditional branch, in which the proper condition is inserted
149 // when we build the stub.
150 static const Insn_template
151 thumb16_bcond_insn(uint32_t data)
152 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
154 static const Insn_template
155 thumb32_insn(uint32_t data)
156 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
158 static const Insn_template
159 thumb32_b_insn(uint32_t data, int reloc_addend)
161 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
165 static const Insn_template
166 arm_insn(uint32_t data)
167 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
169 static const Insn_template
170 arm_rel_insn(unsigned data, int reloc_addend)
171 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
173 static const Insn_template
174 data_word(unsigned data, unsigned int r_type, int reloc_addend)
175 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
177 // Accessors. This class is used for read-only objects so no modifiers
182 { return this->data_; }
184 // Return the instruction sequence type of this.
187 { return this->type_; }
189 // Return the ARM relocation type of this.
192 { return this->r_type_; }
196 { return this->reloc_addend_; }
198 // Return size of instruction template in bytes.
202 // Return byte-alignment of instruction template.
207 // We make the constructor private to ensure that only the factory
210 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
211 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
214 // Instruction specific data. This is used to store information like
215 // some of the instruction bits.
217 // Instruction template type.
219 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
220 unsigned int r_type_;
221 // Relocation addend.
222 int32_t reloc_addend_;
225 // Macro for generating code to stub types. One entry per long/short
229 DEF_STUB(long_branch_any_any) \
230 DEF_STUB(long_branch_v4t_arm_thumb) \
231 DEF_STUB(long_branch_thumb_only) \
232 DEF_STUB(long_branch_v4t_thumb_thumb) \
233 DEF_STUB(long_branch_v4t_thumb_arm) \
234 DEF_STUB(short_branch_v4t_thumb_arm) \
235 DEF_STUB(long_branch_any_arm_pic) \
236 DEF_STUB(long_branch_any_thumb_pic) \
237 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
238 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
239 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
240 DEF_STUB(long_branch_thumb_only_pic) \
241 DEF_STUB(a8_veneer_b_cond) \
242 DEF_STUB(a8_veneer_b) \
243 DEF_STUB(a8_veneer_bl) \
244 DEF_STUB(a8_veneer_blx) \
245 DEF_STUB(v4_veneer_bx)
249 #define DEF_STUB(x) arm_stub_##x,
255 // First reloc stub type.
256 arm_stub_reloc_first = arm_stub_long_branch_any_any,
257 // Last reloc stub type.
258 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
260 // First Cortex-A8 stub type.
261 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
262 // Last Cortex-A8 stub type.
263 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
266 arm_stub_type_last = arm_stub_v4_veneer_bx
270 // Stub template class. Templates are meant to be read-only objects.
271 // A stub template for a stub type contains all read-only attributes
272 // common to all stubs of the same type.
277 Stub_template(Stub_type, const Insn_template*, size_t);
285 { return this->type_; }
287 // Return an array of instruction templates.
290 { return this->insns_; }
292 // Return size of template in number of instructions.
295 { return this->insn_count_; }
297 // Return size of template in bytes.
300 { return this->size_; }
302 // Return alignment of the stub template.
305 { return this->alignment_; }
307 // Return whether entry point is in thumb mode.
309 entry_in_thumb_mode() const
310 { return this->entry_in_thumb_mode_; }
312 // Return number of relocations in this template.
315 { return this->relocs_.size(); }
317 // Return index of the I-th instruction with relocation.
319 reloc_insn_index(size_t i) const
321 gold_assert(i < this->relocs_.size());
322 return this->relocs_[i].first;
325 // Return the offset of the I-th instruction with relocation from the
326 // beginning of the stub.
328 reloc_offset(size_t i) const
330 gold_assert(i < this->relocs_.size());
331 return this->relocs_[i].second;
335 // This contains information about an instruction template with a relocation
336 // and its offset from start of stub.
337 typedef std::pair<size_t, section_size_type> Reloc;
339 // A Stub_template may not be copied. We want to share templates as much
341 Stub_template(const Stub_template&);
342 Stub_template& operator=(const Stub_template&);
346 // Points to an array of Insn_templates.
347 const Insn_template* insns_;
348 // Number of Insn_templates in insns_[].
350 // Size of templated instructions in bytes.
352 // Alignment of templated instructions.
354 // Flag to indicate if entry is in thumb mode.
355 bool entry_in_thumb_mode_;
356 // A table of reloc instruction indices and offsets. We can find these by
357 // looking at the instruction templates but we pre-compute and then stash
358 // them here for speed.
359 std::vector<Reloc> relocs_;
363 // A class for code stubs. This is a base class for different type of
364 // stubs used in the ARM target.
370 static const section_offset_type invalid_offset =
371 static_cast<section_offset_type>(-1);
374 Stub(const Stub_template* stub_template)
375 : stub_template_(stub_template), offset_(invalid_offset)
382 // Return the stub template.
384 stub_template() const
385 { return this->stub_template_; }
387 // Return offset of code stub from beginning of its containing stub table.
391 gold_assert(this->offset_ != invalid_offset);
392 return this->offset_;
395 // Set offset of code stub from beginning of its containing stub table.
397 set_offset(section_offset_type offset)
398 { this->offset_ = offset; }
400 // Return the relocation target address of the i-th relocation in the
401 // stub. This must be defined in a child class.
403 reloc_target(size_t i)
404 { return this->do_reloc_target(i); }
406 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
408 write(unsigned char* view, section_size_type view_size, bool big_endian)
409 { this->do_write(view, view_size, big_endian); }
411 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
412 // for the i-th instruction.
414 thumb16_special(size_t i)
415 { return this->do_thumb16_special(i); }
418 // This must be defined in the child class.
420 do_reloc_target(size_t) = 0;
422 // This may be overridden in the child class.
424 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
427 this->do_fixed_endian_write<true>(view, view_size);
429 this->do_fixed_endian_write<false>(view, view_size);
432 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
433 // instruction template.
435 do_thumb16_special(size_t)
436 { gold_unreachable(); }
439 // A template to implement do_write.
440 template<bool big_endian>
442 do_fixed_endian_write(unsigned char*, section_size_type);
445 const Stub_template* stub_template_;
446 // Offset within the section of containing this stub.
447 section_offset_type offset_;
450 // Reloc stub class. These are stubs we use to fix up relocation because
451 // of limited branch ranges.
453 class Reloc_stub : public Stub
456 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
457 // We assume we never jump to this address.
458 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
460 // Return destination address.
462 destination_address() const
464 gold_assert(this->destination_address_ != this->invalid_address);
465 return this->destination_address_;
468 // Set destination address.
470 set_destination_address(Arm_address address)
472 gold_assert(address != this->invalid_address);
473 this->destination_address_ = address;
476 // Reset destination address.
478 reset_destination_address()
479 { this->destination_address_ = this->invalid_address; }
481 // Determine stub type for a branch of a relocation of R_TYPE going
482 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
483 // the branch target is a thumb instruction. TARGET is used for look
484 // up ARM-specific linker settings.
486 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
487 Arm_address branch_target, bool target_is_thumb);
489 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
490 // and an addend. Since we treat global and local symbol differently, we
491 // use a Symbol object for a global symbol and a object-index pair for
496 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
497 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
498 // and R_SYM must not be invalid_index.
499 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
500 unsigned int r_sym, int32_t addend)
501 : stub_type_(stub_type), addend_(addend)
505 this->r_sym_ = Reloc_stub::invalid_index;
506 this->u_.symbol = symbol;
510 gold_assert(relobj != NULL && r_sym != invalid_index);
511 this->r_sym_ = r_sym;
512 this->u_.relobj = relobj;
519 // Accessors: Keys are meant to be read-only object so no modifiers are
525 { return this->stub_type_; }
527 // Return the local symbol index or invalid_index.
530 { return this->r_sym_; }
532 // Return the symbol if there is one.
535 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
537 // Return the relobj if there is one.
540 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
542 // Whether this equals to another key k.
544 eq(const Key& k) const
546 return ((this->stub_type_ == k.stub_type_)
547 && (this->r_sym_ == k.r_sym_)
548 && ((this->r_sym_ != Reloc_stub::invalid_index)
549 ? (this->u_.relobj == k.u_.relobj)
550 : (this->u_.symbol == k.u_.symbol))
551 && (this->addend_ == k.addend_));
554 // Return a hash value.
558 return (this->stub_type_
560 ^ gold::string_hash<char>(
561 (this->r_sym_ != Reloc_stub::invalid_index)
562 ? this->u_.relobj->name().c_str()
563 : this->u_.symbol->name())
567 // Functors for STL associative containers.
571 operator()(const Key& k) const
572 { return k.hash_value(); }
578 operator()(const Key& k1, const Key& k2) const
579 { return k1.eq(k2); }
582 // Name of key. This is mainly for debugging.
588 Stub_type stub_type_;
589 // If this is a local symbol, this is the index in the defining object.
590 // Otherwise, it is invalid_index for a global symbol.
592 // If r_sym_ is invalid index. This points to a global symbol.
593 // Otherwise, this points a relobj. We used the unsized and target
594 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
595 // Arm_relobj. This is done to avoid making the stub class a template
596 // as most of the stub machinery is endianity-neutral. However, it
597 // may require a bit of casting done by users of this class.
600 const Symbol* symbol;
601 const Relobj* relobj;
603 // Addend associated with a reloc.
608 // Reloc_stubs are created via a stub factory. So these are protected.
609 Reloc_stub(const Stub_template* stub_template)
610 : Stub(stub_template), destination_address_(invalid_address)
616 friend class Stub_factory;
618 // Return the relocation target address of the i-th relocation in the
621 do_reloc_target(size_t i)
623 // All reloc stub have only one relocation.
625 return this->destination_address_;
629 // Address of destination.
630 Arm_address destination_address_;
633 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
634 // THUMB branch that meets the following conditions:
636 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
637 // branch address is 0xffe.
638 // 2. The branch target address is in the same page as the first word of the
640 // 3. The branch follows a 32-bit instruction which is not a branch.
642 // To do the fix up, we need to store the address of the branch instruction
643 // and its target at least. We also need to store the original branch
644 // instruction bits for the condition code in a conditional branch. The
645 // condition code is used in a special instruction template. We also want
646 // to identify input sections needing Cortex-A8 workaround quickly. We store
647 // extra information about object and section index of the code section
648 // containing a branch being fixed up. The information is used to mark
649 // the code section when we finalize the Cortex-A8 stubs.
652 class Cortex_a8_stub : public Stub
658 // Return the object of the code section containing the branch being fixed
662 { return this->relobj_; }
664 // Return the section index of the code section containing the branch being
668 { return this->shndx_; }
670 // Return the source address of stub. This is the address of the original
671 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
674 source_address() const
675 { return this->source_address_; }
677 // Return the destination address of the stub. This is the branch taken
678 // address of the original branch instruction. LSB is 1 if it is a THUMB
679 // instruction address.
681 destination_address() const
682 { return this->destination_address_; }
684 // Return the instruction being fixed up.
686 original_insn() const
687 { return this->original_insn_; }
690 // Cortex_a8_stubs are created via a stub factory. So these are protected.
691 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
692 unsigned int shndx, Arm_address source_address,
693 Arm_address destination_address, uint32_t original_insn)
694 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
695 source_address_(source_address | 1U),
696 destination_address_(destination_address),
697 original_insn_(original_insn)
700 friend class Stub_factory;
702 // Return the relocation target address of the i-th relocation in the
705 do_reloc_target(size_t i)
707 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
709 // The conditional branch veneer has two relocations.
711 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
715 // All other Cortex-A8 stubs have only one relocation.
717 return this->destination_address_;
721 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
723 do_thumb16_special(size_t);
726 // Object of the code section containing the branch being fixed up.
728 // Section index of the code section containing the branch begin fixed up.
730 // Source address of original branch.
731 Arm_address source_address_;
732 // Destination address of the original branch.
733 Arm_address destination_address_;
734 // Original branch instruction. This is needed for copying the condition
735 // code from a condition branch to its stub.
736 uint32_t original_insn_;
739 // ARMv4 BX Rx branch relocation stub class.
740 class Arm_v4bx_stub : public Stub
746 // Return the associated register.
749 { return this->reg_; }
752 // Arm V4BX stubs are created via a stub factory. So these are protected.
753 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
754 : Stub(stub_template), reg_(reg)
757 friend class Stub_factory;
759 // Return the relocation target address of the i-th relocation in the
762 do_reloc_target(size_t)
763 { gold_unreachable(); }
765 // This may be overridden in the child class.
767 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
770 this->do_fixed_endian_v4bx_write<true>(view, view_size);
772 this->do_fixed_endian_v4bx_write<false>(view, view_size);
776 // A template to implement do_write.
777 template<bool big_endian>
779 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
781 const Insn_template* insns = this->stub_template()->insns();
782 elfcpp::Swap<32, big_endian>::writeval(view,
784 + (this->reg_ << 16)));
785 view += insns[0].size();
786 elfcpp::Swap<32, big_endian>::writeval(view,
787 (insns[1].data() + this->reg_));
788 view += insns[1].size();
789 elfcpp::Swap<32, big_endian>::writeval(view,
790 (insns[2].data() + this->reg_));
793 // A register index (r0-r14), which is associated with the stub.
797 // Stub factory class.
802 // Return the unique instance of this class.
803 static const Stub_factory&
806 static Stub_factory singleton;
810 // Make a relocation stub.
812 make_reloc_stub(Stub_type stub_type) const
814 gold_assert(stub_type >= arm_stub_reloc_first
815 && stub_type <= arm_stub_reloc_last);
816 return new Reloc_stub(this->stub_templates_[stub_type]);
819 // Make a Cortex-A8 stub.
821 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
822 Arm_address source, Arm_address destination,
823 uint32_t original_insn) const
825 gold_assert(stub_type >= arm_stub_cortex_a8_first
826 && stub_type <= arm_stub_cortex_a8_last);
827 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
828 source, destination, original_insn);
831 // Make an ARM V4BX relocation stub.
832 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
834 make_arm_v4bx_stub(uint32_t reg) const
836 gold_assert(reg < 0xf);
837 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
842 // Constructor and destructor are protected since we only return a single
843 // instance created in Stub_factory::get_instance().
847 // A Stub_factory may not be copied since it is a singleton.
848 Stub_factory(const Stub_factory&);
849 Stub_factory& operator=(Stub_factory&);
851 // Stub templates. These are initialized in the constructor.
852 const Stub_template* stub_templates_[arm_stub_type_last+1];
855 // A class to hold stubs for the ARM target.
857 template<bool big_endian>
858 class Stub_table : public Output_data
861 Stub_table(Arm_input_section<big_endian>* owner)
862 : Output_data(), owner_(owner), reloc_stubs_(), cortex_a8_stubs_(),
863 arm_v4bx_stubs_(0xf), prev_data_size_(0), prev_addralign_(1)
869 // Owner of this stub table.
870 Arm_input_section<big_endian>*
872 { return this->owner_; }
874 // Whether this stub table is empty.
878 return (this->reloc_stubs_.empty()
879 && this->cortex_a8_stubs_.empty()
880 && this->arm_v4bx_stubs_.empty());
883 // Return the current data size.
885 current_data_size() const
886 { return this->current_data_size_for_child(); }
888 // Add a STUB with using KEY. Caller is reponsible for avoid adding
889 // if already a STUB with the same key has been added.
891 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
893 const Stub_template* stub_template = stub->stub_template();
894 gold_assert(stub_template->type() == key.stub_type());
895 this->reloc_stubs_[key] = stub;
898 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
899 // Caller is reponsible for avoid adding if already a STUB with the same
900 // address has been added.
902 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
904 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
905 this->cortex_a8_stubs_.insert(value);
908 // Add an ARM V4BX relocation stub. A register index will be retrieved
911 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
913 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
914 this->arm_v4bx_stubs_[stub->reg()] = stub;
917 // Remove all Cortex-A8 stubs.
919 remove_all_cortex_a8_stubs();
921 // Look up a relocation stub using KEY. Return NULL if there is none.
923 find_reloc_stub(const Reloc_stub::Key& key) const
925 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
926 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
929 // Look up an arm v4bx relocation stub using the register index.
930 // Return NULL if there is none.
932 find_arm_v4bx_stub(const uint32_t reg) const
934 gold_assert(reg < 0xf);
935 return this->arm_v4bx_stubs_[reg];
938 // Relocate stubs in this stub table.
940 relocate_stubs(const Relocate_info<32, big_endian>*,
941 Target_arm<big_endian>*, Output_section*,
942 unsigned char*, Arm_address, section_size_type);
944 // Update data size and alignment at the end of a relaxation pass. Return
945 // true if either data size or alignment is different from that of the
946 // previous relaxation pass.
948 update_data_size_and_addralign();
950 // Finalize stubs. Set the offsets of all stubs and mark input sections
951 // needing the Cortex-A8 workaround.
955 // Apply Cortex-A8 workaround to an address range.
957 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
958 unsigned char*, Arm_address,
962 // Write out section contents.
964 do_write(Output_file*);
966 // Return the required alignment.
969 { return this->prev_addralign_; }
971 // Reset address and file offset.
973 do_reset_address_and_file_offset()
974 { this->set_current_data_size_for_child(this->prev_data_size_); }
976 // Set final data size.
978 set_final_data_size()
979 { this->set_data_size(this->current_data_size()); }
982 // Relocate one stub.
984 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
985 Target_arm<big_endian>*, Output_section*,
986 unsigned char*, Arm_address, section_size_type);
988 // Unordered map of relocation stubs.
990 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
991 Reloc_stub::Key::equal_to>
994 // List of Cortex-A8 stubs ordered by addresses of branches being
995 // fixed up in output.
996 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
997 // List of Arm V4BX relocation stubs ordered by associated registers.
998 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1000 // Owner of this stub table.
1001 Arm_input_section<big_endian>* owner_;
1002 // The relocation stubs.
1003 Reloc_stub_map reloc_stubs_;
1004 // The cortex_a8_stubs.
1005 Cortex_a8_stub_list cortex_a8_stubs_;
1006 // The Arm V4BX relocation stubs.
1007 Arm_v4bx_stub_list arm_v4bx_stubs_;
1008 // data size of this in the previous pass.
1009 off_t prev_data_size_;
1010 // address alignment of this in the previous pass.
1011 uint64_t prev_addralign_;
1014 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1015 // we add to the end of an EXIDX input section that goes into the output.
1017 class Arm_exidx_cantunwind : public Output_section_data
1020 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1021 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1024 // Return the object containing the section pointed by this.
1027 { return this->relobj_; }
1029 // Return the section index of the section pointed by this.
1032 { return this->shndx_; }
1036 do_write(Output_file* of)
1038 if (parameters->target().is_big_endian())
1039 this->do_fixed_endian_write<true>(of);
1041 this->do_fixed_endian_write<false>(of);
1045 // Implement do_write for a given endianity.
1046 template<bool big_endian>
1048 do_fixed_endian_write(Output_file*);
1050 // The object containing the section pointed by this.
1052 // The section index of the section pointed by this.
1053 unsigned int shndx_;
1056 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1057 // Offset map is used to map input section offset within the EXIDX section
1058 // to the output offset from the start of this EXIDX section.
1060 typedef std::map<section_offset_type, section_offset_type>
1061 Arm_exidx_section_offset_map;
1063 // Arm_exidx_merged_section class. This represents an EXIDX input section
1064 // with some of its entries merged.
1066 class Arm_exidx_merged_section : public Output_relaxed_input_section
1069 // Constructor for Arm_exidx_merged_section.
1070 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1071 // SECTION_OFFSET_MAP points to a section offset map describing how
1072 // parts of the input section are mapped to output. DELETED_BYTES is
1073 // the number of bytes deleted from the EXIDX input section.
1074 Arm_exidx_merged_section(
1075 const Arm_exidx_input_section& exidx_input_section,
1076 const Arm_exidx_section_offset_map& section_offset_map,
1077 uint32_t deleted_bytes);
1079 // Return the original EXIDX input section.
1080 const Arm_exidx_input_section&
1081 exidx_input_section() const
1082 { return this->exidx_input_section_; }
1084 // Return the section offset map.
1085 const Arm_exidx_section_offset_map&
1086 section_offset_map() const
1087 { return this->section_offset_map_; }
1090 // Write merged section into file OF.
1092 do_write(Output_file* of);
1095 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1096 section_offset_type*) const;
1099 // Original EXIDX input section.
1100 const Arm_exidx_input_section& exidx_input_section_;
1101 // Section offset map.
1102 const Arm_exidx_section_offset_map& section_offset_map_;
1105 // A class to wrap an ordinary input section containing executable code.
1107 template<bool big_endian>
1108 class Arm_input_section : public Output_relaxed_input_section
1111 Arm_input_section(Relobj* relobj, unsigned int shndx)
1112 : Output_relaxed_input_section(relobj, shndx, 1),
1113 original_addralign_(1), original_size_(0), stub_table_(NULL)
1116 ~Arm_input_section()
1123 // Whether this is a stub table owner.
1125 is_stub_table_owner() const
1126 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1128 // Return the stub table.
1129 Stub_table<big_endian>*
1131 { return this->stub_table_; }
1133 // Set the stub_table.
1135 set_stub_table(Stub_table<big_endian>* stub_table)
1136 { this->stub_table_ = stub_table; }
1138 // Downcast a base pointer to an Arm_input_section pointer. This is
1139 // not type-safe but we only use Arm_input_section not the base class.
1140 static Arm_input_section<big_endian>*
1141 as_arm_input_section(Output_relaxed_input_section* poris)
1142 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1145 // Write data to output file.
1147 do_write(Output_file*);
1149 // Return required alignment of this.
1151 do_addralign() const
1153 if (this->is_stub_table_owner())
1154 return std::max(this->stub_table_->addralign(),
1155 this->original_addralign_);
1157 return this->original_addralign_;
1160 // Finalize data size.
1162 set_final_data_size();
1164 // Reset address and file offset.
1166 do_reset_address_and_file_offset();
1170 do_output_offset(const Relobj* object, unsigned int shndx,
1171 section_offset_type offset,
1172 section_offset_type* poutput) const
1174 if ((object == this->relobj())
1175 && (shndx == this->shndx())
1177 && (convert_types<uint64_t, section_offset_type>(offset)
1178 <= this->original_size_))
1188 // Copying is not allowed.
1189 Arm_input_section(const Arm_input_section&);
1190 Arm_input_section& operator=(const Arm_input_section&);
1192 // Address alignment of the original input section.
1193 uint64_t original_addralign_;
1194 // Section size of the original input section.
1195 uint64_t original_size_;
1197 Stub_table<big_endian>* stub_table_;
1200 // Arm_exidx_fixup class. This is used to define a number of methods
1201 // and keep states for fixing up EXIDX coverage.
1203 class Arm_exidx_fixup
1206 Arm_exidx_fixup(Output_section* exidx_output_section)
1207 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1208 last_inlined_entry_(0), last_input_section_(NULL),
1209 section_offset_map_(NULL), first_output_text_section_(NULL)
1213 { delete this->section_offset_map_; }
1215 // Process an EXIDX section for entry merging. Return number of bytes to
1216 // be deleted in output. If parts of the input EXIDX section are merged
1217 // a heap allocated Arm_exidx_section_offset_map is store in the located
1218 // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for
1220 template<bool big_endian>
1222 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1223 Arm_exidx_section_offset_map** psection_offset_map);
1225 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1226 // input section, if there is not one already.
1228 add_exidx_cantunwind_as_needed();
1230 // Return the output section for the text section which is linked to the
1231 // first exidx input in output.
1233 first_output_text_section() const
1234 { return this->first_output_text_section_; }
1237 // Copying is not allowed.
1238 Arm_exidx_fixup(const Arm_exidx_fixup&);
1239 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1241 // Type of EXIDX unwind entry.
1246 // EXIDX_CANTUNWIND.
1247 UT_EXIDX_CANTUNWIND,
1254 // Process an EXIDX entry. We only care about the second word of the
1255 // entry. Return true if the entry can be deleted.
1257 process_exidx_entry(uint32_t second_word);
1259 // Update the current section offset map during EXIDX section fix-up.
1260 // If there is no map, create one. INPUT_OFFSET is the offset of a
1261 // reference point, DELETED_BYTES is the number of deleted by in the
1262 // section so far. If DELETE_ENTRY is true, the reference point and
1263 // all offsets after the previous reference point are discarded.
1265 update_offset_map(section_offset_type input_offset,
1266 section_size_type deleted_bytes, bool delete_entry);
1268 // EXIDX output section.
1269 Output_section* exidx_output_section_;
1270 // Unwind type of the last EXIDX entry processed.
1271 Unwind_type last_unwind_type_;
1272 // Last seen inlined EXIDX entry.
1273 uint32_t last_inlined_entry_;
1274 // Last processed EXIDX input section.
1275 const Arm_exidx_input_section* last_input_section_;
1276 // Section offset map created in process_exidx_section.
1277 Arm_exidx_section_offset_map* section_offset_map_;
1278 // Output section for the text section which is linked to the first exidx
1280 Output_section* first_output_text_section_;
1283 // Arm output section class. This is defined mainly to add a number of
1284 // stub generation methods.
1286 template<bool big_endian>
1287 class Arm_output_section : public Output_section
1290 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1292 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1293 elfcpp::Elf_Xword flags)
1294 : Output_section(name, type, flags)
1297 ~Arm_output_section()
1300 // Group input sections for stub generation.
1302 group_sections(section_size_type, bool, Target_arm<big_endian>*);
1304 // Downcast a base pointer to an Arm_output_section pointer. This is
1305 // not type-safe but we only use Arm_output_section not the base class.
1306 static Arm_output_section<big_endian>*
1307 as_arm_output_section(Output_section* os)
1308 { return static_cast<Arm_output_section<big_endian>*>(os); }
1310 // Append all input text sections in this into LIST.
1312 append_text_sections_to_list(Text_section_list* list);
1314 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1315 // is a list of text input sections sorted in ascending order of their
1316 // output addresses.
1318 fix_exidx_coverage(const Text_section_list& sorted_text_section,
1319 Symbol_table* symtab);
1323 typedef Output_section::Input_section Input_section;
1324 typedef Output_section::Input_section_list Input_section_list;
1326 // Create a stub group.
1327 void create_stub_group(Input_section_list::const_iterator,
1328 Input_section_list::const_iterator,
1329 Input_section_list::const_iterator,
1330 Target_arm<big_endian>*,
1331 std::vector<Output_relaxed_input_section*>*);
1334 // Arm_exidx_input_section class. This represents an EXIDX input section.
1336 class Arm_exidx_input_section
1339 static const section_offset_type invalid_offset =
1340 static_cast<section_offset_type>(-1);
1342 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1343 unsigned int link, uint32_t size, uint32_t addralign)
1344 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1345 addralign_(addralign)
1348 ~Arm_exidx_input_section()
1351 // Accessors: This is a read-only class.
1353 // Return the object containing this EXIDX input section.
1356 { return this->relobj_; }
1358 // Return the section index of this EXIDX input section.
1361 { return this->shndx_; }
1363 // Return the section index of linked text section in the same object.
1366 { return this->link_; }
1368 // Return size of the EXIDX input section.
1371 { return this->size_; }
1373 // Reutnr address alignment of EXIDX input section.
1376 { return this->addralign_; }
1379 // Object containing this.
1381 // Section index of this.
1382 unsigned int shndx_;
1383 // text section linked to this in the same object.
1385 // Size of this. For ARM 32-bit is sufficient.
1387 // Address alignment of this. For ARM 32-bit is sufficient.
1388 uint32_t addralign_;
1391 // Arm_relobj class.
1393 template<bool big_endian>
1394 class Arm_relobj : public Sized_relobj<32, big_endian>
1397 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1399 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1400 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1401 : Sized_relobj<32, big_endian>(name, input_file, offset, ehdr),
1402 stub_tables_(), local_symbol_is_thumb_function_(),
1403 attributes_section_data_(NULL), mapping_symbols_info_(),
1404 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1405 output_local_symbol_count_needs_update_(false)
1409 { delete this->attributes_section_data_; }
1411 // Return the stub table of the SHNDX-th section if there is one.
1412 Stub_table<big_endian>*
1413 stub_table(unsigned int shndx) const
1415 gold_assert(shndx < this->stub_tables_.size());
1416 return this->stub_tables_[shndx];
1419 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1421 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1423 gold_assert(shndx < this->stub_tables_.size());
1424 this->stub_tables_[shndx] = stub_table;
1427 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1428 // index. This is only valid after do_count_local_symbol is called.
1430 local_symbol_is_thumb_function(unsigned int r_sym) const
1432 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1433 return this->local_symbol_is_thumb_function_[r_sym];
1436 // Scan all relocation sections for stub generation.
1438 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1441 // Convert regular input section with index SHNDX to a relaxed section.
1443 convert_input_section_to_relaxed_section(unsigned shndx)
1445 // The stubs have relocations and we need to process them after writing
1446 // out the stubs. So relocation now must follow section write.
1447 this->set_section_offset(shndx, -1ULL);
1448 this->set_relocs_must_follow_section_writes();
1451 // Downcast a base pointer to an Arm_relobj pointer. This is
1452 // not type-safe but we only use Arm_relobj not the base class.
1453 static Arm_relobj<big_endian>*
1454 as_arm_relobj(Relobj* relobj)
1455 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1457 // Processor-specific flags in ELF file header. This is valid only after
1460 processor_specific_flags() const
1461 { return this->processor_specific_flags_; }
1463 // Attribute section data This is the contents of the .ARM.attribute section
1465 const Attributes_section_data*
1466 attributes_section_data() const
1467 { return this->attributes_section_data_; }
1469 // Mapping symbol location.
1470 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1472 // Functor for STL container.
1473 struct Mapping_symbol_position_less
1476 operator()(const Mapping_symbol_position& p1,
1477 const Mapping_symbol_position& p2) const
1479 return (p1.first < p2.first
1480 || (p1.first == p2.first && p1.second < p2.second));
1484 // We only care about the first character of a mapping symbol, so
1485 // we only store that instead of the whole symbol name.
1486 typedef std::map<Mapping_symbol_position, char,
1487 Mapping_symbol_position_less> Mapping_symbols_info;
1489 // Whether a section contains any Cortex-A8 workaround.
1491 section_has_cortex_a8_workaround(unsigned int shndx) const
1493 return (this->section_has_cortex_a8_workaround_ != NULL
1494 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1497 // Mark a section that has Cortex-A8 workaround.
1499 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1501 if (this->section_has_cortex_a8_workaround_ == NULL)
1502 this->section_has_cortex_a8_workaround_ =
1503 new std::vector<bool>(this->shnum(), false);
1504 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1507 // Return the EXIDX section of an text section with index SHNDX or NULL
1508 // if the text section has no associated EXIDX section.
1509 const Arm_exidx_input_section*
1510 exidx_input_section_by_link(unsigned int shndx) const
1512 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1513 return ((p != this->exidx_section_map_.end()
1514 && p->second->link() == shndx)
1519 // Return the EXIDX section with index SHNDX or NULL if there is none.
1520 const Arm_exidx_input_section*
1521 exidx_input_section_by_shndx(unsigned shndx) const
1523 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1524 return ((p != this->exidx_section_map_.end()
1525 && p->second->shndx() == shndx)
1530 // Whether output local symbol count needs updating.
1532 output_local_symbol_count_needs_update() const
1533 { return this->output_local_symbol_count_needs_update_; }
1535 // Set output_local_symbol_count_needs_update flag to be true.
1537 set_output_local_symbol_count_needs_update()
1538 { this->output_local_symbol_count_needs_update_ = true; }
1540 // Update output local symbol count at the end of relaxation.
1542 update_output_local_symbol_count();
1545 // Post constructor setup.
1549 // Call parent's setup method.
1550 Sized_relobj<32, big_endian>::do_setup();
1552 // Initialize look-up tables.
1553 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1554 this->stub_tables_.swap(empty_stub_table_list);
1557 // Count the local symbols.
1559 do_count_local_symbols(Stringpool_template<char>*,
1560 Stringpool_template<char>*);
1563 do_relocate_sections(const Symbol_table* symtab, const Layout* layout,
1564 const unsigned char* pshdrs,
1565 typename Sized_relobj<32, big_endian>::Views* pivews);
1567 // Read the symbol information.
1569 do_read_symbols(Read_symbols_data* sd);
1571 // Process relocs for garbage collection.
1573 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1577 // Whether a section needs to be scanned for relocation stubs.
1579 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1580 const Relobj::Output_sections&,
1581 const Symbol_table *, const unsigned char*);
1583 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1585 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1586 unsigned int, Output_section*,
1587 const Symbol_table *);
1589 // Scan a section for the Cortex-A8 erratum.
1591 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1592 unsigned int, Output_section*,
1593 Target_arm<big_endian>*);
1595 // Make a new Arm_exidx_input_section object for EXIDX section with
1596 // index SHNDX and section header SHDR.
1598 make_exidx_input_section(unsigned int shndx,
1599 const elfcpp::Shdr<32, big_endian>& shdr);
1601 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1602 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1605 // List of stub tables.
1606 Stub_table_list stub_tables_;
1607 // Bit vector to tell if a local symbol is a thumb function or not.
1608 // This is only valid after do_count_local_symbol is called.
1609 std::vector<bool> local_symbol_is_thumb_function_;
1610 // processor-specific flags in ELF file header.
1611 elfcpp::Elf_Word processor_specific_flags_;
1612 // Object attributes if there is an .ARM.attributes section or NULL.
1613 Attributes_section_data* attributes_section_data_;
1614 // Mapping symbols information.
1615 Mapping_symbols_info mapping_symbols_info_;
1616 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1617 std::vector<bool>* section_has_cortex_a8_workaround_;
1618 // Map a text section to its associated .ARM.exidx section, if there is one.
1619 Exidx_section_map exidx_section_map_;
1620 // Whether output local symbol count needs updating.
1621 bool output_local_symbol_count_needs_update_;
1624 // Arm_dynobj class.
1626 template<bool big_endian>
1627 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1630 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1631 const elfcpp::Ehdr<32, big_endian>& ehdr)
1632 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1633 processor_specific_flags_(0), attributes_section_data_(NULL)
1637 { delete this->attributes_section_data_; }
1639 // Downcast a base pointer to an Arm_relobj pointer. This is
1640 // not type-safe but we only use Arm_relobj not the base class.
1641 static Arm_dynobj<big_endian>*
1642 as_arm_dynobj(Dynobj* dynobj)
1643 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1645 // Processor-specific flags in ELF file header. This is valid only after
1648 processor_specific_flags() const
1649 { return this->processor_specific_flags_; }
1651 // Attributes section data.
1652 const Attributes_section_data*
1653 attributes_section_data() const
1654 { return this->attributes_section_data_; }
1657 // Read the symbol information.
1659 do_read_symbols(Read_symbols_data* sd);
1662 // processor-specific flags in ELF file header.
1663 elfcpp::Elf_Word processor_specific_flags_;
1664 // Object attributes if there is an .ARM.attributes section or NULL.
1665 Attributes_section_data* attributes_section_data_;
1668 // Functor to read reloc addends during stub generation.
1670 template<int sh_type, bool big_endian>
1671 struct Stub_addend_reader
1673 // Return the addend for a relocation of a particular type. Depending
1674 // on whether this is a REL or RELA relocation, read the addend from a
1675 // view or from a Reloc object.
1676 elfcpp::Elf_types<32>::Elf_Swxword
1678 unsigned int /* r_type */,
1679 const unsigned char* /* view */,
1680 const typename Reloc_types<sh_type,
1681 32, big_endian>::Reloc& /* reloc */) const;
1684 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1686 template<bool big_endian>
1687 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1689 elfcpp::Elf_types<32>::Elf_Swxword
1692 const unsigned char*,
1693 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1696 // Specialized Stub_addend_reader for RELA type relocation sections.
1697 // We currently do not handle RELA type relocation sections but it is trivial
1698 // to implement the addend reader. This is provided for completeness and to
1699 // make it easier to add support for RELA relocation sections in the future.
1701 template<bool big_endian>
1702 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1704 elfcpp::Elf_types<32>::Elf_Swxword
1707 const unsigned char*,
1708 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1709 big_endian>::Reloc& reloc) const
1710 { return reloc.get_r_addend(); }
1713 // Cortex_a8_reloc class. We keep record of relocation that may need
1714 // the Cortex-A8 erratum workaround.
1716 class Cortex_a8_reloc
1719 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1720 Arm_address destination)
1721 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1727 // Accessors: This is a read-only class.
1729 // Return the relocation stub associated with this relocation if there is
1733 { return this->reloc_stub_; }
1735 // Return the relocation type.
1738 { return this->r_type_; }
1740 // Return the destination address of the relocation. LSB stores the THUMB
1744 { return this->destination_; }
1747 // Associated relocation stub if there is one, or NULL.
1748 const Reloc_stub* reloc_stub_;
1750 unsigned int r_type_;
1751 // Destination address of this relocation. LSB is used to distinguish
1753 Arm_address destination_;
1756 // Utilities for manipulating integers of up to 32-bits
1760 // Sign extend an n-bit unsigned integer stored in an uint32_t into
1761 // an int32_t. NO_BITS must be between 1 to 32.
1762 template<int no_bits>
1763 static inline int32_t
1764 sign_extend(uint32_t bits)
1766 gold_assert(no_bits >= 0 && no_bits <= 32);
1768 return static_cast<int32_t>(bits);
1769 uint32_t mask = (~((uint32_t) 0)) >> (32 - no_bits);
1771 uint32_t top_bit = 1U << (no_bits - 1);
1772 int32_t as_signed = static_cast<int32_t>(bits);
1773 return (bits & top_bit) ? as_signed + (-top_bit * 2) : as_signed;
1776 // Detects overflow of an NO_BITS integer stored in a uint32_t.
1777 template<int no_bits>
1779 has_overflow(uint32_t bits)
1781 gold_assert(no_bits >= 0 && no_bits <= 32);
1784 int32_t max = (1 << (no_bits - 1)) - 1;
1785 int32_t min = -(1 << (no_bits - 1));
1786 int32_t as_signed = static_cast<int32_t>(bits);
1787 return as_signed > max || as_signed < min;
1790 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
1791 // fits in the given number of bits as either a signed or unsigned value.
1792 // For example, has_signed_unsigned_overflow<8> would check
1793 // -128 <= bits <= 255
1794 template<int no_bits>
1796 has_signed_unsigned_overflow(uint32_t bits)
1798 gold_assert(no_bits >= 2 && no_bits <= 32);
1801 int32_t max = static_cast<int32_t>((1U << no_bits) - 1);
1802 int32_t min = -(1 << (no_bits - 1));
1803 int32_t as_signed = static_cast<int32_t>(bits);
1804 return as_signed > max || as_signed < min;
1807 // Select bits from A and B using bits in MASK. For each n in [0..31],
1808 // the n-th bit in the result is chosen from the n-th bits of A and B.
1809 // A zero selects A and a one selects B.
1810 static inline uint32_t
1811 bit_select(uint32_t a, uint32_t b, uint32_t mask)
1812 { return (a & ~mask) | (b & mask); }
1815 template<bool big_endian>
1816 class Target_arm : public Sized_target<32, big_endian>
1819 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
1822 // When were are relocating a stub, we pass this as the relocation number.
1823 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
1826 : Sized_target<32, big_endian>(&arm_info),
1827 got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL),
1828 copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL), stub_tables_(),
1829 stub_factory_(Stub_factory::get_instance()), may_use_blx_(false),
1830 should_force_pic_veneer_(false), arm_input_section_map_(),
1831 attributes_section_data_(NULL), fix_cortex_a8_(false),
1832 cortex_a8_relocs_info_()
1835 // Whether we can use BLX.
1838 { return this->may_use_blx_; }
1840 // Set use-BLX flag.
1842 set_may_use_blx(bool value)
1843 { this->may_use_blx_ = value; }
1845 // Whether we force PCI branch veneers.
1847 should_force_pic_veneer() const
1848 { return this->should_force_pic_veneer_; }
1850 // Set PIC veneer flag.
1852 set_should_force_pic_veneer(bool value)
1853 { this->should_force_pic_veneer_ = value; }
1855 // Whether we use THUMB-2 instructions.
1857 using_thumb2() const
1859 Object_attribute* attr =
1860 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1861 int arch = attr->int_value();
1862 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
1865 // Whether we use THUMB/THUMB-2 instructions only.
1867 using_thumb_only() const
1869 Object_attribute* attr =
1870 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1871 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
1872 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
1874 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
1875 return attr->int_value() == 'M';
1878 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
1880 may_use_arm_nop() const
1882 Object_attribute* attr =
1883 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1884 int arch = attr->int_value();
1885 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1886 || arch == elfcpp::TAG_CPU_ARCH_V6K
1887 || arch == elfcpp::TAG_CPU_ARCH_V7
1888 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1891 // Whether we have THUMB-2 NOP.W instruction.
1893 may_use_thumb2_nop() const
1895 Object_attribute* attr =
1896 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
1897 int arch = attr->int_value();
1898 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
1899 || arch == elfcpp::TAG_CPU_ARCH_V7
1900 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
1903 // Process the relocations to determine unreferenced sections for
1904 // garbage collection.
1906 gc_process_relocs(Symbol_table* symtab,
1908 Sized_relobj<32, big_endian>* object,
1909 unsigned int data_shndx,
1910 unsigned int sh_type,
1911 const unsigned char* prelocs,
1913 Output_section* output_section,
1914 bool needs_special_offset_handling,
1915 size_t local_symbol_count,
1916 const unsigned char* plocal_symbols);
1918 // Scan the relocations to look for symbol adjustments.
1920 scan_relocs(Symbol_table* symtab,
1922 Sized_relobj<32, big_endian>* object,
1923 unsigned int data_shndx,
1924 unsigned int sh_type,
1925 const unsigned char* prelocs,
1927 Output_section* output_section,
1928 bool needs_special_offset_handling,
1929 size_t local_symbol_count,
1930 const unsigned char* plocal_symbols);
1932 // Finalize the sections.
1934 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
1936 // Return the value to use for a dynamic symbol which requires special
1939 do_dynsym_value(const Symbol*) const;
1941 // Relocate a section.
1943 relocate_section(const Relocate_info<32, big_endian>*,
1944 unsigned int sh_type,
1945 const unsigned char* prelocs,
1947 Output_section* output_section,
1948 bool needs_special_offset_handling,
1949 unsigned char* view,
1950 Arm_address view_address,
1951 section_size_type view_size,
1952 const Reloc_symbol_changes*);
1954 // Scan the relocs during a relocatable link.
1956 scan_relocatable_relocs(Symbol_table* symtab,
1958 Sized_relobj<32, big_endian>* object,
1959 unsigned int data_shndx,
1960 unsigned int sh_type,
1961 const unsigned char* prelocs,
1963 Output_section* output_section,
1964 bool needs_special_offset_handling,
1965 size_t local_symbol_count,
1966 const unsigned char* plocal_symbols,
1967 Relocatable_relocs*);
1969 // Relocate a section during a relocatable link.
1971 relocate_for_relocatable(const Relocate_info<32, big_endian>*,
1972 unsigned int sh_type,
1973 const unsigned char* prelocs,
1975 Output_section* output_section,
1976 off_t offset_in_output_section,
1977 const Relocatable_relocs*,
1978 unsigned char* view,
1979 Arm_address view_address,
1980 section_size_type view_size,
1981 unsigned char* reloc_view,
1982 section_size_type reloc_view_size);
1984 // Return whether SYM is defined by the ABI.
1986 do_is_defined_by_abi(Symbol* sym) const
1987 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
1989 // Return the size of the GOT section.
1993 gold_assert(this->got_ != NULL);
1994 return this->got_->data_size();
1997 // Map platform-specific reloc types
1999 get_real_reloc_type (unsigned int r_type);
2002 // Methods to support stub-generations.
2005 // Return the stub factory
2007 stub_factory() const
2008 { return this->stub_factory_; }
2010 // Make a new Arm_input_section object.
2011 Arm_input_section<big_endian>*
2012 new_arm_input_section(Relobj*, unsigned int);
2014 // Find the Arm_input_section object corresponding to the SHNDX-th input
2015 // section of RELOBJ.
2016 Arm_input_section<big_endian>*
2017 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2019 // Make a new Stub_table
2020 Stub_table<big_endian>*
2021 new_stub_table(Arm_input_section<big_endian>*);
2023 // Scan a section for stub generation.
2025 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2026 const unsigned char*, size_t, Output_section*,
2027 bool, const unsigned char*, Arm_address,
2032 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2033 Output_section*, unsigned char*, Arm_address,
2036 // Get the default ARM target.
2037 static Target_arm<big_endian>*
2040 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2041 && parameters->target().is_big_endian() == big_endian);
2042 return static_cast<Target_arm<big_endian>*>(
2043 parameters->sized_target<32, big_endian>());
2046 // Whether relocation type uses LSB to distinguish THUMB addresses.
2048 reloc_uses_thumb_bit(unsigned int r_type);
2050 // Whether NAME belongs to a mapping symbol.
2052 is_mapping_symbol_name(const char* name)
2056 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2057 && (name[2] == '\0' || name[2] == '.'));
2060 // Whether we work around the Cortex-A8 erratum.
2062 fix_cortex_a8() const
2063 { return this->fix_cortex_a8_; }
2065 // Whether we fix R_ARM_V4BX relocation.
2067 // 1 - replace with MOV instruction (armv4 target)
2068 // 2 - make interworking veneer (>= armv4t targets only)
2069 General_options::Fix_v4bx
2071 { return parameters->options().fix_v4bx(); }
2073 // Scan a span of THUMB code section for Cortex-A8 erratum.
2075 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2076 section_size_type, section_size_type,
2077 const unsigned char*, Arm_address);
2079 // Apply Cortex-A8 workaround to a branch.
2081 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2082 unsigned char*, Arm_address);
2085 // Make an ELF object.
2087 do_make_elf_object(const std::string&, Input_file*, off_t,
2088 const elfcpp::Ehdr<32, big_endian>& ehdr);
2091 do_make_elf_object(const std::string&, Input_file*, off_t,
2092 const elfcpp::Ehdr<32, !big_endian>&)
2093 { gold_unreachable(); }
2096 do_make_elf_object(const std::string&, Input_file*, off_t,
2097 const elfcpp::Ehdr<64, false>&)
2098 { gold_unreachable(); }
2101 do_make_elf_object(const std::string&, Input_file*, off_t,
2102 const elfcpp::Ehdr<64, true>&)
2103 { gold_unreachable(); }
2105 // Make an output section.
2107 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2108 elfcpp::Elf_Xword flags)
2109 { return new Arm_output_section<big_endian>(name, type, flags); }
2112 do_adjust_elf_header(unsigned char* view, int len) const;
2114 // We only need to generate stubs, and hence perform relaxation if we are
2115 // not doing relocatable linking.
2117 do_may_relax() const
2118 { return !parameters->options().relocatable(); }
2121 do_relax(int, const Input_objects*, Symbol_table*, Layout*);
2123 // Determine whether an object attribute tag takes an integer, a
2126 do_attribute_arg_type(int tag) const;
2128 // Reorder tags during output.
2130 do_attributes_order(int num) const;
2132 // This is called when the target is selected as the default.
2134 do_select_as_default_target()
2136 // No locking is required since there should only be one default target.
2137 // We cannot have both the big-endian and little-endian ARM targets
2139 gold_assert(arm_reloc_property_table == NULL);
2140 arm_reloc_property_table = new Arm_reloc_property_table();
2144 // The class which scans relocations.
2149 : issued_non_pic_error_(false)
2153 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2154 Sized_relobj<32, big_endian>* object,
2155 unsigned int data_shndx,
2156 Output_section* output_section,
2157 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2158 const elfcpp::Sym<32, big_endian>& lsym);
2161 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2162 Sized_relobj<32, big_endian>* object,
2163 unsigned int data_shndx,
2164 Output_section* output_section,
2165 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2170 unsupported_reloc_local(Sized_relobj<32, big_endian>*,
2171 unsigned int r_type);
2174 unsupported_reloc_global(Sized_relobj<32, big_endian>*,
2175 unsigned int r_type, Symbol*);
2178 check_non_pic(Relobj*, unsigned int r_type);
2180 // Almost identical to Symbol::needs_plt_entry except that it also
2181 // handles STT_ARM_TFUNC.
2183 symbol_needs_plt_entry(const Symbol* sym)
2185 // An undefined symbol from an executable does not need a PLT entry.
2186 if (sym->is_undefined() && !parameters->options().shared())
2189 return (!parameters->doing_static_link()
2190 && (sym->type() == elfcpp::STT_FUNC
2191 || sym->type() == elfcpp::STT_ARM_TFUNC)
2192 && (sym->is_from_dynobj()
2193 || sym->is_undefined()
2194 || sym->is_preemptible()));
2197 // Whether we have issued an error about a non-PIC compilation.
2198 bool issued_non_pic_error_;
2201 // The class which implements relocation.
2211 // Return whether the static relocation needs to be applied.
2213 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2216 Output_section* output_section);
2218 // Do a relocation. Return false if the caller should not issue
2219 // any warnings about this relocation.
2221 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2222 Output_section*, size_t relnum,
2223 const elfcpp::Rel<32, big_endian>&,
2224 unsigned int r_type, const Sized_symbol<32>*,
2225 const Symbol_value<32>*,
2226 unsigned char*, Arm_address,
2229 // Return whether we want to pass flag NON_PIC_REF for this
2230 // reloc. This means the relocation type accesses a symbol not via
2233 reloc_is_non_pic (unsigned int r_type)
2237 // These relocation types reference GOT or PLT entries explicitly.
2238 case elfcpp::R_ARM_GOT_BREL:
2239 case elfcpp::R_ARM_GOT_ABS:
2240 case elfcpp::R_ARM_GOT_PREL:
2241 case elfcpp::R_ARM_GOT_BREL12:
2242 case elfcpp::R_ARM_PLT32_ABS:
2243 case elfcpp::R_ARM_TLS_GD32:
2244 case elfcpp::R_ARM_TLS_LDM32:
2245 case elfcpp::R_ARM_TLS_IE32:
2246 case elfcpp::R_ARM_TLS_IE12GP:
2248 // These relocate types may use PLT entries.
2249 case elfcpp::R_ARM_CALL:
2250 case elfcpp::R_ARM_THM_CALL:
2251 case elfcpp::R_ARM_JUMP24:
2252 case elfcpp::R_ARM_THM_JUMP24:
2253 case elfcpp::R_ARM_THM_JUMP19:
2254 case elfcpp::R_ARM_PLT32:
2255 case elfcpp::R_ARM_THM_XPC22:
2263 // Return whether we need to calculate the addressing origin of
2264 // the output segment defining the symbol - B(S).
2266 reloc_needs_sym_origin(unsigned int r_type)
2270 case elfcpp::R_ARM_SBREL32:
2271 case elfcpp::R_ARM_BASE_PREL:
2272 case elfcpp::R_ARM_BASE_ABS:
2273 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
2274 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
2275 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
2276 case elfcpp::R_ARM_SBREL31:
2277 case elfcpp::R_ARM_ALU_SB_G0_NC:
2278 case elfcpp::R_ARM_ALU_SB_G0:
2279 case elfcpp::R_ARM_ALU_SB_G1_NC:
2280 case elfcpp::R_ARM_ALU_SB_G1:
2281 case elfcpp::R_ARM_ALU_SB_G2:
2282 case elfcpp::R_ARM_LDR_SB_G0:
2283 case elfcpp::R_ARM_LDR_SB_G1:
2284 case elfcpp::R_ARM_LDR_SB_G2:
2285 case elfcpp::R_ARM_LDRS_SB_G0:
2286 case elfcpp::R_ARM_LDRS_SB_G1:
2287 case elfcpp::R_ARM_LDRS_SB_G2:
2288 case elfcpp::R_ARM_LDC_SB_G0:
2289 case elfcpp::R_ARM_LDC_SB_G1:
2290 case elfcpp::R_ARM_LDC_SB_G2:
2291 case elfcpp::R_ARM_MOVW_BREL_NC:
2292 case elfcpp::R_ARM_MOVT_BREL:
2293 case elfcpp::R_ARM_MOVW_BREL:
2294 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
2295 case elfcpp::R_ARM_THM_MOVT_BREL:
2296 case elfcpp::R_ARM_THM_MOVW_BREL:
2305 // A class which returns the size required for a relocation type,
2306 // used while scanning relocs during a relocatable link.
2307 class Relocatable_size_for_reloc
2311 get_size_for_reloc(unsigned int, Relobj*);
2314 // Get the GOT section, creating it if necessary.
2315 Output_data_got<32, big_endian>*
2316 got_section(Symbol_table*, Layout*);
2318 // Get the GOT PLT section.
2320 got_plt_section() const
2322 gold_assert(this->got_plt_ != NULL);
2323 return this->got_plt_;
2326 // Create a PLT entry for a global symbol.
2328 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2330 // Get the PLT section.
2331 const Output_data_plt_arm<big_endian>*
2334 gold_assert(this->plt_ != NULL);
2338 // Get the dynamic reloc section, creating it if necessary.
2340 rel_dyn_section(Layout*);
2342 // Return true if the symbol may need a COPY relocation.
2343 // References from an executable object to non-function symbols
2344 // defined in a dynamic object may need a COPY relocation.
2346 may_need_copy_reloc(Symbol* gsym)
2348 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2349 && gsym->may_need_copy_reloc());
2352 // Add a potential copy relocation.
2354 copy_reloc(Symbol_table* symtab, Layout* layout,
2355 Sized_relobj<32, big_endian>* object,
2356 unsigned int shndx, Output_section* output_section,
2357 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2359 this->copy_relocs_.copy_reloc(symtab, layout,
2360 symtab->get_sized_symbol<32>(sym),
2361 object, shndx, output_section, reloc,
2362 this->rel_dyn_section(layout));
2365 // Whether two EABI versions are compatible.
2367 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2369 // Merge processor-specific flags from input object and those in the ELF
2370 // header of the output.
2372 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2374 // Get the secondary compatible architecture.
2376 get_secondary_compatible_arch(const Attributes_section_data*);
2378 // Set the secondary compatible architecture.
2380 set_secondary_compatible_arch(Attributes_section_data*, int);
2383 tag_cpu_arch_combine(const char*, int, int*, int, int);
2385 // Helper to print AEABI enum tag value.
2387 aeabi_enum_name(unsigned int);
2389 // Return string value for TAG_CPU_name.
2391 tag_cpu_name_value(unsigned int);
2393 // Merge object attributes from input object and those in the output.
2395 merge_object_attributes(const char*, const Attributes_section_data*);
2397 // Helper to get an AEABI object attribute
2399 get_aeabi_object_attribute(int tag) const
2401 Attributes_section_data* pasd = this->attributes_section_data_;
2402 gold_assert(pasd != NULL);
2403 Object_attribute* attr =
2404 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2405 gold_assert(attr != NULL);
2410 // Methods to support stub-generations.
2413 // Group input sections for stub generation.
2415 group_sections(Layout*, section_size_type, bool);
2417 // Scan a relocation for stub generation.
2419 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2420 const Sized_symbol<32>*, unsigned int,
2421 const Symbol_value<32>*,
2422 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2424 // Scan a relocation section for stub.
2425 template<int sh_type>
2427 scan_reloc_section_for_stubs(
2428 const Relocate_info<32, big_endian>* relinfo,
2429 const unsigned char* prelocs,
2431 Output_section* output_section,
2432 bool needs_special_offset_handling,
2433 const unsigned char* view,
2434 elfcpp::Elf_types<32>::Elf_Addr view_address,
2437 // Fix .ARM.exidx section coverage.
2439 fix_exidx_coverage(Layout*, Arm_output_section<big_endian>*, Symbol_table*);
2441 // Functors for STL set.
2442 struct output_section_address_less_than
2445 operator()(const Output_section* s1, const Output_section* s2) const
2446 { return s1->address() < s2->address(); }
2449 // Information about this specific target which we pass to the
2450 // general Target structure.
2451 static const Target::Target_info arm_info;
2453 // The types of GOT entries needed for this platform.
2456 GOT_TYPE_STANDARD = 0 // GOT entry for a regular symbol
2459 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2461 // Map input section to Arm_input_section.
2462 typedef Unordered_map<Section_id,
2463 Arm_input_section<big_endian>*,
2465 Arm_input_section_map;
2467 // Map output addresses to relocs for Cortex-A8 erratum.
2468 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2469 Cortex_a8_relocs_info;
2472 Output_data_got<32, big_endian>* got_;
2474 Output_data_plt_arm<big_endian>* plt_;
2475 // The GOT PLT section.
2476 Output_data_space* got_plt_;
2477 // The dynamic reloc section.
2478 Reloc_section* rel_dyn_;
2479 // Relocs saved to avoid a COPY reloc.
2480 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2481 // Space for variables copied with a COPY reloc.
2482 Output_data_space* dynbss_;
2483 // Vector of Stub_tables created.
2484 Stub_table_list stub_tables_;
2486 const Stub_factory &stub_factory_;
2487 // Whether we can use BLX.
2489 // Whether we force PIC branch veneers.
2490 bool should_force_pic_veneer_;
2491 // Map for locating Arm_input_sections.
2492 Arm_input_section_map arm_input_section_map_;
2493 // Attributes section data in output.
2494 Attributes_section_data* attributes_section_data_;
2495 // Whether we want to fix code for Cortex-A8 erratum.
2496 bool fix_cortex_a8_;
2497 // Map addresses to relocs for Cortex-A8 erratum.
2498 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2501 template<bool big_endian>
2502 const Target::Target_info Target_arm<big_endian>::arm_info =
2505 big_endian, // is_big_endian
2506 elfcpp::EM_ARM, // machine_code
2507 false, // has_make_symbol
2508 false, // has_resolve
2509 false, // has_code_fill
2510 true, // is_default_stack_executable
2512 "/usr/lib/libc.so.1", // dynamic_linker
2513 0x8000, // default_text_segment_address
2514 0x1000, // abi_pagesize (overridable by -z max-page-size)
2515 0x1000, // common_pagesize (overridable by -z common-page-size)
2516 elfcpp::SHN_UNDEF, // small_common_shndx
2517 elfcpp::SHN_UNDEF, // large_common_shndx
2518 0, // small_common_section_flags
2519 0, // large_common_section_flags
2520 ".ARM.attributes", // attributes_section
2521 "aeabi" // attributes_vendor
2524 // Arm relocate functions class
2527 template<bool big_endian>
2528 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
2533 STATUS_OKAY, // No error during relocation.
2534 STATUS_OVERFLOW, // Relocation oveflow.
2535 STATUS_BAD_RELOC // Relocation cannot be applied.
2539 typedef Relocate_functions<32, big_endian> Base;
2540 typedef Arm_relocate_functions<big_endian> This;
2542 // Encoding of imm16 argument for movt and movw ARM instructions
2545 // imm16 := imm4 | imm12
2547 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2548 // +-------+---------------+-------+-------+-----------------------+
2549 // | | |imm4 | |imm12 |
2550 // +-------+---------------+-------+-------+-----------------------+
2552 // Extract the relocation addend from VAL based on the ARM
2553 // instruction encoding described above.
2554 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2555 extract_arm_movw_movt_addend(
2556 typename elfcpp::Swap<32, big_endian>::Valtype val)
2558 // According to the Elf ABI for ARM Architecture the immediate
2559 // field is sign-extended to form the addend.
2560 return utils::sign_extend<16>(((val >> 4) & 0xf000) | (val & 0xfff));
2563 // Insert X into VAL based on the ARM instruction encoding described
2565 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2566 insert_val_arm_movw_movt(
2567 typename elfcpp::Swap<32, big_endian>::Valtype val,
2568 typename elfcpp::Swap<32, big_endian>::Valtype x)
2572 val |= (x & 0xf000) << 4;
2576 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2579 // imm16 := imm4 | i | imm3 | imm8
2581 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2582 // +---------+-+-----------+-------++-+-----+-------+---------------+
2583 // | |i| |imm4 || |imm3 | |imm8 |
2584 // +---------+-+-----------+-------++-+-----+-------+---------------+
2586 // Extract the relocation addend from VAL based on the Thumb2
2587 // instruction encoding described above.
2588 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2589 extract_thumb_movw_movt_addend(
2590 typename elfcpp::Swap<32, big_endian>::Valtype val)
2592 // According to the Elf ABI for ARM Architecture the immediate
2593 // field is sign-extended to form the addend.
2594 return utils::sign_extend<16>(((val >> 4) & 0xf000)
2595 | ((val >> 15) & 0x0800)
2596 | ((val >> 4) & 0x0700)
2600 // Insert X into VAL based on the Thumb2 instruction encoding
2602 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2603 insert_val_thumb_movw_movt(
2604 typename elfcpp::Swap<32, big_endian>::Valtype val,
2605 typename elfcpp::Swap<32, big_endian>::Valtype x)
2608 val |= (x & 0xf000) << 4;
2609 val |= (x & 0x0800) << 15;
2610 val |= (x & 0x0700) << 4;
2611 val |= (x & 0x00ff);
2615 // Calculate the smallest constant Kn for the specified residual.
2616 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2618 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
2624 // Determine the most significant bit in the residual and
2625 // align the resulting value to a 2-bit boundary.
2626 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
2628 // The desired shift is now (msb - 6), or zero, whichever
2630 return (((msb - 6) < 0) ? 0 : (msb - 6));
2633 // Calculate the final residual for the specified group index.
2634 // If the passed group index is less than zero, the method will return
2635 // the value of the specified residual without any change.
2636 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2637 static typename elfcpp::Swap<32, big_endian>::Valtype
2638 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2641 for (int n = 0; n <= group; n++)
2643 // Calculate which part of the value to mask.
2644 uint32_t shift = calc_grp_kn(residual);
2645 // Calculate the residual for the next time around.
2646 residual &= ~(residual & (0xff << shift));
2652 // Calculate the value of Gn for the specified group index.
2653 // We return it in the form of an encoded constant-and-rotation.
2654 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2655 static typename elfcpp::Swap<32, big_endian>::Valtype
2656 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
2659 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
2662 for (int n = 0; n <= group; n++)
2664 // Calculate which part of the value to mask.
2665 shift = calc_grp_kn(residual);
2666 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
2667 gn = residual & (0xff << shift);
2668 // Calculate the residual for the next time around.
2671 // Return Gn in the form of an encoded constant-and-rotation.
2672 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
2676 // Handle ARM long branches.
2677 static typename This::Status
2678 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2679 unsigned char *, const Sized_symbol<32>*,
2680 const Arm_relobj<big_endian>*, unsigned int,
2681 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2683 // Handle THUMB long branches.
2684 static typename This::Status
2685 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
2686 unsigned char *, const Sized_symbol<32>*,
2687 const Arm_relobj<big_endian>*, unsigned int,
2688 const Symbol_value<32>*, Arm_address, Arm_address, bool);
2691 // Return the branch offset of a 32-bit THUMB branch.
2692 static inline int32_t
2693 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2695 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
2696 // involving the J1 and J2 bits.
2697 uint32_t s = (upper_insn & (1U << 10)) >> 10;
2698 uint32_t upper = upper_insn & 0x3ffU;
2699 uint32_t lower = lower_insn & 0x7ffU;
2700 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
2701 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
2702 uint32_t i1 = j1 ^ s ? 0 : 1;
2703 uint32_t i2 = j2 ^ s ? 0 : 1;
2705 return utils::sign_extend<25>((s << 24) | (i1 << 23) | (i2 << 22)
2706 | (upper << 12) | (lower << 1));
2709 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
2710 // UPPER_INSN is the original upper instruction of the branch. Caller is
2711 // responsible for overflow checking and BLX offset adjustment.
2712 static inline uint16_t
2713 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
2715 uint32_t s = offset < 0 ? 1 : 0;
2716 uint32_t bits = static_cast<uint32_t>(offset);
2717 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
2720 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
2721 // LOWER_INSN is the original lower instruction of the branch. Caller is
2722 // responsible for overflow checking and BLX offset adjustment.
2723 static inline uint16_t
2724 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
2726 uint32_t s = offset < 0 ? 1 : 0;
2727 uint32_t bits = static_cast<uint32_t>(offset);
2728 return ((lower_insn & ~0x2fffU)
2729 | ((((bits >> 23) & 1) ^ !s) << 13)
2730 | ((((bits >> 22) & 1) ^ !s) << 11)
2731 | ((bits >> 1) & 0x7ffU));
2734 // Return the branch offset of a 32-bit THUMB conditional branch.
2735 static inline int32_t
2736 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
2738 uint32_t s = (upper_insn & 0x0400U) >> 10;
2739 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
2740 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
2741 uint32_t lower = (lower_insn & 0x07ffU);
2742 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
2744 return utils::sign_extend<21>((upper << 12) | (lower << 1));
2747 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
2748 // instruction. UPPER_INSN is the original upper instruction of the branch.
2749 // Caller is responsible for overflow checking.
2750 static inline uint16_t
2751 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
2753 uint32_t s = offset < 0 ? 1 : 0;
2754 uint32_t bits = static_cast<uint32_t>(offset);
2755 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
2758 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
2759 // instruction. LOWER_INSN is the original lower instruction of the branch.
2760 // Caller is reponsible for overflow checking.
2761 static inline uint16_t
2762 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
2764 uint32_t bits = static_cast<uint32_t>(offset);
2765 uint32_t j2 = (bits & 0x00080000U) >> 19;
2766 uint32_t j1 = (bits & 0x00040000U) >> 18;
2767 uint32_t lo = (bits & 0x00000ffeU) >> 1;
2769 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
2772 // R_ARM_ABS8: S + A
2773 static inline typename This::Status
2774 abs8(unsigned char *view,
2775 const Sized_relobj<32, big_endian>* object,
2776 const Symbol_value<32>* psymval)
2778 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
2779 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2780 Valtype* wv = reinterpret_cast<Valtype*>(view);
2781 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
2782 Reltype addend = utils::sign_extend<8>(val);
2783 Reltype x = psymval->value(object, addend);
2784 val = utils::bit_select(val, x, 0xffU);
2785 elfcpp::Swap<8, big_endian>::writeval(wv, val);
2786 return (utils::has_signed_unsigned_overflow<8>(x)
2787 ? This::STATUS_OVERFLOW
2788 : This::STATUS_OKAY);
2791 // R_ARM_THM_ABS5: S + A
2792 static inline typename This::Status
2793 thm_abs5(unsigned char *view,
2794 const Sized_relobj<32, big_endian>* object,
2795 const Symbol_value<32>* psymval)
2797 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2798 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2799 Valtype* wv = reinterpret_cast<Valtype*>(view);
2800 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2801 Reltype addend = (val & 0x7e0U) >> 6;
2802 Reltype x = psymval->value(object, addend);
2803 val = utils::bit_select(val, x << 6, 0x7e0U);
2804 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2805 return (utils::has_overflow<5>(x)
2806 ? This::STATUS_OVERFLOW
2807 : This::STATUS_OKAY);
2810 // R_ARM_ABS12: S + A
2811 static inline typename This::Status
2812 abs12(unsigned char *view,
2813 const Sized_relobj<32, big_endian>* object,
2814 const Symbol_value<32>* psymval)
2816 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2817 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2818 Valtype* wv = reinterpret_cast<Valtype*>(view);
2819 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2820 Reltype addend = val & 0x0fffU;
2821 Reltype x = psymval->value(object, addend);
2822 val = utils::bit_select(val, x, 0x0fffU);
2823 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2824 return (utils::has_overflow<12>(x)
2825 ? This::STATUS_OVERFLOW
2826 : This::STATUS_OKAY);
2829 // R_ARM_ABS16: S + A
2830 static inline typename This::Status
2831 abs16(unsigned char *view,
2832 const Sized_relobj<32, big_endian>* object,
2833 const Symbol_value<32>* psymval)
2835 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2836 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
2837 Valtype* wv = reinterpret_cast<Valtype*>(view);
2838 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2839 Reltype addend = utils::sign_extend<16>(val);
2840 Reltype x = psymval->value(object, addend);
2841 val = utils::bit_select(val, x, 0xffffU);
2842 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2843 return (utils::has_signed_unsigned_overflow<16>(x)
2844 ? This::STATUS_OVERFLOW
2845 : This::STATUS_OKAY);
2848 // R_ARM_ABS32: (S + A) | T
2849 static inline typename This::Status
2850 abs32(unsigned char *view,
2851 const Sized_relobj<32, big_endian>* object,
2852 const Symbol_value<32>* psymval,
2853 Arm_address thumb_bit)
2855 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2856 Valtype* wv = reinterpret_cast<Valtype*>(view);
2857 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2858 Valtype x = psymval->value(object, addend) | thumb_bit;
2859 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2860 return This::STATUS_OKAY;
2863 // R_ARM_REL32: (S + A) | T - P
2864 static inline typename This::Status
2865 rel32(unsigned char *view,
2866 const Sized_relobj<32, big_endian>* object,
2867 const Symbol_value<32>* psymval,
2868 Arm_address address,
2869 Arm_address thumb_bit)
2871 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2872 Valtype* wv = reinterpret_cast<Valtype*>(view);
2873 Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv);
2874 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2875 elfcpp::Swap<32, big_endian>::writeval(wv, x);
2876 return This::STATUS_OKAY;
2879 // R_ARM_THM_JUMP24: (S + A) | T - P
2880 static typename This::Status
2881 thm_jump19(unsigned char *view, const Arm_relobj<big_endian>* object,
2882 const Symbol_value<32>* psymval, Arm_address address,
2883 Arm_address thumb_bit);
2885 // R_ARM_THM_JUMP6: S + A – P
2886 static inline typename This::Status
2887 thm_jump6(unsigned char *view,
2888 const Sized_relobj<32, big_endian>* object,
2889 const Symbol_value<32>* psymval,
2890 Arm_address address)
2892 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2893 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2894 Valtype* wv = reinterpret_cast<Valtype*>(view);
2895 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2896 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
2897 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
2898 Reltype x = (psymval->value(object, addend) - address);
2899 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
2900 elfcpp::Swap<16, big_endian>::writeval(wv, val);
2901 // CZB does only forward jumps.
2902 return ((x > 0x007e)
2903 ? This::STATUS_OVERFLOW
2904 : This::STATUS_OKAY);
2907 // R_ARM_THM_JUMP8: S + A – P
2908 static inline typename This::Status
2909 thm_jump8(unsigned char *view,
2910 const Sized_relobj<32, big_endian>* object,
2911 const Symbol_value<32>* psymval,
2912 Arm_address address)
2914 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2915 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2916 Valtype* wv = reinterpret_cast<Valtype*>(view);
2917 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2918 Reltype addend = utils::sign_extend<8>((val & 0x00ff) << 1);
2919 Reltype x = (psymval->value(object, addend) - address);
2920 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xff00) | ((x & 0x01fe) >> 1));
2921 return (utils::has_overflow<8>(x)
2922 ? This::STATUS_OVERFLOW
2923 : This::STATUS_OKAY);
2926 // R_ARM_THM_JUMP11: S + A – P
2927 static inline typename This::Status
2928 thm_jump11(unsigned char *view,
2929 const Sized_relobj<32, big_endian>* object,
2930 const Symbol_value<32>* psymval,
2931 Arm_address address)
2933 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
2934 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
2935 Valtype* wv = reinterpret_cast<Valtype*>(view);
2936 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
2937 Reltype addend = utils::sign_extend<11>((val & 0x07ff) << 1);
2938 Reltype x = (psymval->value(object, addend) - address);
2939 elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xf800) | ((x & 0x0ffe) >> 1));
2940 return (utils::has_overflow<11>(x)
2941 ? This::STATUS_OVERFLOW
2942 : This::STATUS_OKAY);
2945 // R_ARM_BASE_PREL: B(S) + A - P
2946 static inline typename This::Status
2947 base_prel(unsigned char* view,
2949 Arm_address address)
2951 Base::rel32(view, origin - address);
2955 // R_ARM_BASE_ABS: B(S) + A
2956 static inline typename This::Status
2957 base_abs(unsigned char* view,
2960 Base::rel32(view, origin);
2964 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
2965 static inline typename This::Status
2966 got_brel(unsigned char* view,
2967 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
2969 Base::rel32(view, got_offset);
2970 return This::STATUS_OKAY;
2973 // R_ARM_GOT_PREL: GOT(S) + A - P
2974 static inline typename This::Status
2975 got_prel(unsigned char *view,
2976 Arm_address got_entry,
2977 Arm_address address)
2979 Base::rel32(view, got_entry - address);
2980 return This::STATUS_OKAY;
2983 // R_ARM_PREL: (S + A) | T - P
2984 static inline typename This::Status
2985 prel31(unsigned char *view,
2986 const Sized_relobj<32, big_endian>* object,
2987 const Symbol_value<32>* psymval,
2988 Arm_address address,
2989 Arm_address thumb_bit)
2991 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
2992 Valtype* wv = reinterpret_cast<Valtype*>(view);
2993 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
2994 Valtype addend = utils::sign_extend<31>(val);
2995 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
2996 val = utils::bit_select(val, x, 0x7fffffffU);
2997 elfcpp::Swap<32, big_endian>::writeval(wv, val);
2998 return (utils::has_overflow<31>(x) ?
2999 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3002 // R_ARM_MOVW_ABS_NC: (S + A) | T
3003 static inline typename This::Status
3004 movw_abs_nc(unsigned char *view,
3005 const Sized_relobj<32, big_endian>* object,
3006 const Symbol_value<32>* psymval,
3007 Arm_address thumb_bit)
3009 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3010 Valtype* wv = reinterpret_cast<Valtype*>(view);
3011 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3012 Valtype addend = This::extract_arm_movw_movt_addend(val);
3013 Valtype x = psymval->value(object, addend) | thumb_bit;
3014 val = This::insert_val_arm_movw_movt(val, x);
3015 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3016 return This::STATUS_OKAY;
3019 // R_ARM_MOVT_ABS: S + A
3020 static inline typename This::Status
3021 movt_abs(unsigned char *view,
3022 const Sized_relobj<32, big_endian>* object,
3023 const Symbol_value<32>* psymval)
3025 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3026 Valtype* wv = reinterpret_cast<Valtype*>(view);
3027 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3028 Valtype addend = This::extract_arm_movw_movt_addend(val);
3029 Valtype x = psymval->value(object, addend) >> 16;
3030 val = This::insert_val_arm_movw_movt(val, x);
3031 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3032 return This::STATUS_OKAY;
3035 // R_ARM_THM_MOVW_ABS_NC: S + A | T
3036 static inline typename This::Status
3037 thm_movw_abs_nc(unsigned char *view,
3038 const Sized_relobj<32, big_endian>* object,
3039 const Symbol_value<32>* psymval,
3040 Arm_address thumb_bit)
3042 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3043 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3044 Valtype* wv = reinterpret_cast<Valtype*>(view);
3045 Reltype val = ((elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3046 | elfcpp::Swap<16, big_endian>::readval(wv + 1));
3047 Reltype addend = extract_thumb_movw_movt_addend(val);
3048 Reltype x = psymval->value(object, addend) | thumb_bit;
3049 val = This::insert_val_thumb_movw_movt(val, x);
3050 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3051 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3052 return This::STATUS_OKAY;
3055 // R_ARM_THM_MOVT_ABS: S + A
3056 static inline typename This::Status
3057 thm_movt_abs(unsigned char *view,
3058 const Sized_relobj<32, big_endian>* object,
3059 const Symbol_value<32>* psymval)
3061 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3062 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3063 Valtype* wv = reinterpret_cast<Valtype*>(view);
3064 Reltype val = ((elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3065 | elfcpp::Swap<16, big_endian>::readval(wv + 1));
3066 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3067 Reltype x = psymval->value(object, addend) >> 16;
3068 val = This::insert_val_thumb_movw_movt(val, x);
3069 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3070 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3071 return This::STATUS_OKAY;
3074 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3075 // R_ARM_MOVW_BREL_NC: ((S + A) | T) – B(S)
3076 static inline typename This::Status
3077 movw_rel_nc(unsigned char* view,
3078 const Sized_relobj<32, big_endian>* object,
3079 const Symbol_value<32>* psymval,
3080 Arm_address address,
3081 Arm_address thumb_bit)
3083 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3084 Valtype* wv = reinterpret_cast<Valtype*>(view);
3085 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3086 Valtype addend = This::extract_arm_movw_movt_addend(val);
3087 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3088 val = This::insert_val_arm_movw_movt(val, x);
3089 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3090 return This::STATUS_OKAY;
3093 // R_ARM_MOVW_BREL: ((S + A) | T) – B(S)
3094 static inline typename This::Status
3095 movw_rel(unsigned char* view,
3096 const Sized_relobj<32, big_endian>* object,
3097 const Symbol_value<32>* psymval,
3098 Arm_address address,
3099 Arm_address thumb_bit)
3101 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3102 Valtype* wv = reinterpret_cast<Valtype*>(view);
3103 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3104 Valtype addend = This::extract_arm_movw_movt_addend(val);
3105 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3106 val = This::insert_val_arm_movw_movt(val, x);
3107 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3108 return ((x >= 0x10000) ?
3109 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3112 // R_ARM_MOVT_PREL: S + A - P
3113 // R_ARM_MOVT_BREL: S + A – B(S)
3114 static inline typename This::Status
3115 movt_rel(unsigned char* view,
3116 const Sized_relobj<32, big_endian>* object,
3117 const Symbol_value<32>* psymval,
3118 Arm_address address)
3120 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3121 Valtype* wv = reinterpret_cast<Valtype*>(view);
3122 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3123 Valtype addend = This::extract_arm_movw_movt_addend(val);
3124 Valtype x = (psymval->value(object, addend) - address) >> 16;
3125 val = This::insert_val_arm_movw_movt(val, x);
3126 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3127 return This::STATUS_OKAY;
3130 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3131 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) – B(S)
3132 static inline typename This::Status
3133 thm_movw_rel_nc(unsigned char *view,
3134 const Sized_relobj<32, big_endian>* object,
3135 const Symbol_value<32>* psymval,
3136 Arm_address address,
3137 Arm_address thumb_bit)
3139 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3140 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3141 Valtype* wv = reinterpret_cast<Valtype*>(view);
3142 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3143 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3144 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3145 Reltype x = (psymval->value(object, addend) | thumb_bit) - address;
3146 val = This::insert_val_thumb_movw_movt(val, x);
3147 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3148 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3149 return This::STATUS_OKAY;
3152 // R_ARM_THM_MOVW_BREL: ((S + A) | T) – B(S)
3153 static inline typename This::Status
3154 thm_movw_rel(unsigned char *view,
3155 const Sized_relobj<32, big_endian>* object,
3156 const Symbol_value<32>* psymval,
3157 Arm_address address,
3158 Arm_address thumb_bit)
3160 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3161 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3162 Valtype* wv = reinterpret_cast<Valtype*>(view);
3163 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3164 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3165 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3166 Reltype x = (psymval->value(object, addend) | thumb_bit) - address;
3167 val = This::insert_val_thumb_movw_movt(val, x);
3168 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3169 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3170 return ((x >= 0x10000) ?
3171 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3174 // R_ARM_THM_MOVT_PREL: S + A - P
3175 // R_ARM_THM_MOVT_BREL: S + A – B(S)
3176 static inline typename This::Status
3177 thm_movt_rel(unsigned char* view,
3178 const Sized_relobj<32, big_endian>* object,
3179 const Symbol_value<32>* psymval,
3180 Arm_address address)
3182 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3183 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3184 Valtype* wv = reinterpret_cast<Valtype*>(view);
3185 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3186 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3187 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3188 Reltype x = (psymval->value(object, addend) - address) >> 16;
3189 val = This::insert_val_thumb_movw_movt(val, x);
3190 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3191 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3192 return This::STATUS_OKAY;
3195 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3196 static inline typename This::Status
3197 thm_alu11(unsigned char* view,
3198 const Sized_relobj<32, big_endian>* object,
3199 const Symbol_value<32>* psymval,
3200 Arm_address address,
3201 Arm_address thumb_bit)
3203 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3204 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3205 Valtype* wv = reinterpret_cast<Valtype*>(view);
3206 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3207 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3209 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3210 // -----------------------------------------------------------------------
3211 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3212 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3213 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3214 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3215 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3216 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3218 // Determine a sign for the addend.
3219 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3220 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3221 // Thumb2 addend encoding:
3222 // imm12 := i | imm3 | imm8
3223 int32_t addend = (insn & 0xff)
3224 | ((insn & 0x00007000) >> 4)
3225 | ((insn & 0x04000000) >> 15);
3226 // Apply a sign to the added.
3229 int32_t x = (psymval->value(object, addend) | thumb_bit)
3230 - (address & 0xfffffffc);
3231 Reltype val = abs(x);
3232 // Mask out the value and a distinct part of the ADD/SUB opcode
3233 // (bits 7:5 of opword).
3234 insn = (insn & 0xfb0f8f00)
3236 | ((val & 0x700) << 4)
3237 | ((val & 0x800) << 15);
3238 // Set the opcode according to whether the value to go in the
3239 // place is negative.
3243 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3244 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3245 return ((val > 0xfff) ?
3246 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3249 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3250 static inline typename This::Status
3251 thm_pc8(unsigned char* view,
3252 const Sized_relobj<32, big_endian>* object,
3253 const Symbol_value<32>* psymval,
3254 Arm_address address)
3256 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3257 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3258 Valtype* wv = reinterpret_cast<Valtype*>(view);
3259 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3260 Reltype addend = ((insn & 0x00ff) << 2);
3261 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3262 Reltype val = abs(x);
3263 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3265 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3266 return ((val > 0x03fc)
3267 ? This::STATUS_OVERFLOW
3268 : This::STATUS_OKAY);
3271 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3272 static inline typename This::Status
3273 thm_pc12(unsigned char* view,
3274 const Sized_relobj<32, big_endian>* object,
3275 const Symbol_value<32>* psymval,
3276 Arm_address address)
3278 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3279 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3280 Valtype* wv = reinterpret_cast<Valtype*>(view);
3281 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3282 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3283 // Determine a sign for the addend (positive if the U bit is 1).
3284 const int sign = (insn & 0x00800000) ? 1 : -1;
3285 int32_t addend = (insn & 0xfff);
3286 // Apply a sign to the added.
3289 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3290 Reltype val = abs(x);
3291 // Mask out and apply the value and the U bit.
3292 insn = (insn & 0xff7ff000) | (val & 0xfff);
3293 // Set the U bit according to whether the value to go in the
3294 // place is positive.
3298 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3299 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3300 return ((val > 0xfff) ?
3301 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3305 static inline typename This::Status
3306 v4bx(const Relocate_info<32, big_endian>* relinfo,
3307 unsigned char *view,
3308 const Arm_relobj<big_endian>* object,
3309 const Arm_address address,
3310 const bool is_interworking)
3313 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3314 Valtype* wv = reinterpret_cast<Valtype*>(view);
3315 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3317 // Ensure that we have a BX instruction.
3318 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3319 const uint32_t reg = (val & 0xf);
3320 if (is_interworking && reg != 0xf)
3322 Stub_table<big_endian>* stub_table =
3323 object->stub_table(relinfo->data_shndx);
3324 gold_assert(stub_table != NULL);
3326 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3327 gold_assert(stub != NULL);
3329 int32_t veneer_address =
3330 stub_table->address() + stub->offset() - 8 - address;
3331 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3332 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3333 // Replace with a branch to veneer (B <addr>)
3334 val = (val & 0xf0000000) | 0x0a000000
3335 | ((veneer_address >> 2) & 0x00ffffff);
3339 // Preserve Rm (lowest four bits) and the condition code
3340 // (highest four bits). Other bits encode MOV PC,Rm.
3341 val = (val & 0xf000000f) | 0x01a0f000;
3343 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3344 return This::STATUS_OKAY;
3347 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3348 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3349 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3350 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3351 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3352 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3353 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3354 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3355 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3356 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3357 static inline typename This::Status
3358 arm_grp_alu(unsigned char* view,
3359 const Sized_relobj<32, big_endian>* object,
3360 const Symbol_value<32>* psymval,
3362 Arm_address address,
3363 Arm_address thumb_bit,
3364 bool check_overflow)
3366 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3367 Valtype* wv = reinterpret_cast<Valtype*>(view);
3368 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3370 // ALU group relocations are allowed only for the ADD/SUB instructions.
3371 // (0x00800000 - ADD, 0x00400000 - SUB)
3372 const Valtype opcode = insn & 0x01e00000;
3373 if (opcode != 0x00800000 && opcode != 0x00400000)
3374 return This::STATUS_BAD_RELOC;
3376 // Determine a sign for the addend.
3377 const int sign = (opcode == 0x00800000) ? 1 : -1;
3378 // shifter = rotate_imm * 2
3379 const uint32_t shifter = (insn & 0xf00) >> 7;
3380 // Initial addend value.
3381 int32_t addend = insn & 0xff;
3382 // Rotate addend right by shifter.
3383 addend = (addend >> shifter) | (addend << (32 - shifter));
3384 // Apply a sign to the added.
3387 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3388 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3389 // Check for overflow if required
3391 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3392 return This::STATUS_OVERFLOW;
3394 // Mask out the value and the ADD/SUB part of the opcode; take care
3395 // not to destroy the S bit.
3397 // Set the opcode according to whether the value to go in the
3398 // place is negative.
3399 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3400 // Encode the offset (encoded Gn).
3403 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3404 return This::STATUS_OKAY;
3407 // R_ARM_LDR_PC_G0: S + A - P
3408 // R_ARM_LDR_PC_G1: S + A - P
3409 // R_ARM_LDR_PC_G2: S + A - P
3410 // R_ARM_LDR_SB_G0: S + A - B(S)
3411 // R_ARM_LDR_SB_G1: S + A - B(S)
3412 // R_ARM_LDR_SB_G2: S + A - B(S)
3413 static inline typename This::Status
3414 arm_grp_ldr(unsigned char* view,
3415 const Sized_relobj<32, big_endian>* object,
3416 const Symbol_value<32>* psymval,
3418 Arm_address address)
3420 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3421 Valtype* wv = reinterpret_cast<Valtype*>(view);
3422 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3424 const int sign = (insn & 0x00800000) ? 1 : -1;
3425 int32_t addend = (insn & 0xfff) * sign;
3426 int32_t x = (psymval->value(object, addend) - address);
3427 // Calculate the relevant G(n-1) value to obtain this stage residual.
3429 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3430 if (residual >= 0x1000)
3431 return This::STATUS_OVERFLOW;
3433 // Mask out the value and U bit.
3435 // Set the U bit for non-negative values.
3440 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3441 return This::STATUS_OKAY;
3444 // R_ARM_LDRS_PC_G0: S + A - P
3445 // R_ARM_LDRS_PC_G1: S + A - P
3446 // R_ARM_LDRS_PC_G2: S + A - P
3447 // R_ARM_LDRS_SB_G0: S + A - B(S)
3448 // R_ARM_LDRS_SB_G1: S + A - B(S)
3449 // R_ARM_LDRS_SB_G2: S + A - B(S)
3450 static inline typename This::Status
3451 arm_grp_ldrs(unsigned char* view,
3452 const Sized_relobj<32, big_endian>* object,
3453 const Symbol_value<32>* psymval,
3455 Arm_address address)
3457 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3458 Valtype* wv = reinterpret_cast<Valtype*>(view);
3459 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3461 const int sign = (insn & 0x00800000) ? 1 : -1;
3462 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3463 int32_t x = (psymval->value(object, addend) - address);
3464 // Calculate the relevant G(n-1) value to obtain this stage residual.
3466 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3467 if (residual >= 0x100)
3468 return This::STATUS_OVERFLOW;
3470 // Mask out the value and U bit.
3472 // Set the U bit for non-negative values.
3475 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3477 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3478 return This::STATUS_OKAY;
3481 // R_ARM_LDC_PC_G0: S + A - P
3482 // R_ARM_LDC_PC_G1: S + A - P
3483 // R_ARM_LDC_PC_G2: S + A - P
3484 // R_ARM_LDC_SB_G0: S + A - B(S)
3485 // R_ARM_LDC_SB_G1: S + A - B(S)
3486 // R_ARM_LDC_SB_G2: S + A - B(S)
3487 static inline typename This::Status
3488 arm_grp_ldc(unsigned char* view,
3489 const Sized_relobj<32, big_endian>* object,
3490 const Symbol_value<32>* psymval,
3492 Arm_address address)
3494 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3495 Valtype* wv = reinterpret_cast<Valtype*>(view);
3496 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3498 const int sign = (insn & 0x00800000) ? 1 : -1;
3499 int32_t addend = ((insn & 0xff) << 2) * sign;
3500 int32_t x = (psymval->value(object, addend) - address);
3501 // Calculate the relevant G(n-1) value to obtain this stage residual.
3503 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3504 if ((residual & 0x3) != 0 || residual >= 0x400)
3505 return This::STATUS_OVERFLOW;
3507 // Mask out the value and U bit.
3509 // Set the U bit for non-negative values.
3512 insn |= (residual >> 2);
3514 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3515 return This::STATUS_OKAY;
3519 // Relocate ARM long branches. This handles relocation types
3520 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3521 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3522 // undefined and we do not use PLT in this relocation. In such a case,
3523 // the branch is converted into an NOP.
3525 template<bool big_endian>
3526 typename Arm_relocate_functions<big_endian>::Status
3527 Arm_relocate_functions<big_endian>::arm_branch_common(
3528 unsigned int r_type,
3529 const Relocate_info<32, big_endian>* relinfo,
3530 unsigned char *view,
3531 const Sized_symbol<32>* gsym,
3532 const Arm_relobj<big_endian>* object,
3534 const Symbol_value<32>* psymval,
3535 Arm_address address,
3536 Arm_address thumb_bit,
3537 bool is_weakly_undefined_without_plt)
3539 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3540 Valtype* wv = reinterpret_cast<Valtype*>(view);
3541 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3543 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3544 && ((val & 0x0f000000UL) == 0x0a000000UL);
3545 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3546 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3547 && ((val & 0x0f000000UL) == 0x0b000000UL);
3548 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3549 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3551 // Check that the instruction is valid.
3552 if (r_type == elfcpp::R_ARM_CALL)
3554 if (!insn_is_uncond_bl && !insn_is_blx)
3555 return This::STATUS_BAD_RELOC;
3557 else if (r_type == elfcpp::R_ARM_JUMP24)
3559 if (!insn_is_b && !insn_is_cond_bl)
3560 return This::STATUS_BAD_RELOC;
3562 else if (r_type == elfcpp::R_ARM_PLT32)
3564 if (!insn_is_any_branch)
3565 return This::STATUS_BAD_RELOC;
3567 else if (r_type == elfcpp::R_ARM_XPC25)
3569 // FIXME: AAELF document IH0044C does not say much about it other
3570 // than it being obsolete.
3571 if (!insn_is_any_branch)
3572 return This::STATUS_BAD_RELOC;
3577 // A branch to an undefined weak symbol is turned into a jump to
3578 // the next instruction unless a PLT entry will be created.
3579 // Do the same for local undefined symbols.
3580 // The jump to the next instruction is optimized as a NOP depending
3581 // on the architecture.
3582 const Target_arm<big_endian>* arm_target =
3583 Target_arm<big_endian>::default_target();
3584 if (is_weakly_undefined_without_plt)
3586 Valtype cond = val & 0xf0000000U;
3587 if (arm_target->may_use_arm_nop())
3588 val = cond | 0x0320f000;
3590 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3591 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3592 return This::STATUS_OKAY;
3595 Valtype addend = utils::sign_extend<26>(val << 2);
3596 Valtype branch_target = psymval->value(object, addend);
3597 int32_t branch_offset = branch_target - address;
3599 // We need a stub if the branch offset is too large or if we need
3601 bool may_use_blx = arm_target->may_use_blx();
3602 Reloc_stub* stub = NULL;
3603 if ((branch_offset > ARM_MAX_FWD_BRANCH_OFFSET)
3604 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3605 || ((thumb_bit != 0) && !(may_use_blx && r_type == elfcpp::R_ARM_CALL)))
3607 Stub_type stub_type =
3608 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3610 if (stub_type != arm_stub_none)
3612 Stub_table<big_endian>* stub_table =
3613 object->stub_table(relinfo->data_shndx);
3614 gold_assert(stub_table != NULL);
3616 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3617 stub = stub_table->find_reloc_stub(stub_key);
3618 gold_assert(stub != NULL);
3619 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3620 branch_target = stub_table->address() + stub->offset() + addend;
3621 branch_offset = branch_target - address;
3622 gold_assert((branch_offset <= ARM_MAX_FWD_BRANCH_OFFSET)
3623 && (branch_offset >= ARM_MAX_BWD_BRANCH_OFFSET));
3627 // At this point, if we still need to switch mode, the instruction
3628 // must either be a BLX or a BL that can be converted to a BLX.
3632 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
3633 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
3636 val = utils::bit_select(val, (branch_offset >> 2), 0xffffffUL);
3637 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3638 return (utils::has_overflow<26>(branch_offset)
3639 ? This::STATUS_OVERFLOW : This::STATUS_OKAY);
3642 // Relocate THUMB long branches. This handles relocation types
3643 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3644 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3645 // undefined and we do not use PLT in this relocation. In such a case,
3646 // the branch is converted into an NOP.
3648 template<bool big_endian>
3649 typename Arm_relocate_functions<big_endian>::Status
3650 Arm_relocate_functions<big_endian>::thumb_branch_common(
3651 unsigned int r_type,
3652 const Relocate_info<32, big_endian>* relinfo,
3653 unsigned char *view,
3654 const Sized_symbol<32>* gsym,
3655 const Arm_relobj<big_endian>* object,
3657 const Symbol_value<32>* psymval,
3658 Arm_address address,
3659 Arm_address thumb_bit,
3660 bool is_weakly_undefined_without_plt)
3662 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3663 Valtype* wv = reinterpret_cast<Valtype*>(view);
3664 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3665 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3667 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3669 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
3670 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
3672 // Check that the instruction is valid.
3673 if (r_type == elfcpp::R_ARM_THM_CALL)
3675 if (!is_bl_insn && !is_blx_insn)
3676 return This::STATUS_BAD_RELOC;
3678 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
3680 // This cannot be a BLX.
3682 return This::STATUS_BAD_RELOC;
3684 else if (r_type == elfcpp::R_ARM_THM_XPC22)
3686 // Check for Thumb to Thumb call.
3688 return This::STATUS_BAD_RELOC;
3691 gold_warning(_("%s: Thumb BLX instruction targets "
3692 "thumb function '%s'."),
3693 object->name().c_str(),
3694 (gsym ? gsym->name() : "(local)"));
3695 // Convert BLX to BL.
3696 lower_insn |= 0x1000U;
3702 // A branch to an undefined weak symbol is turned into a jump to
3703 // the next instruction unless a PLT entry will be created.
3704 // The jump to the next instruction is optimized as a NOP.W for
3705 // Thumb-2 enabled architectures.
3706 const Target_arm<big_endian>* arm_target =
3707 Target_arm<big_endian>::default_target();
3708 if (is_weakly_undefined_without_plt)
3710 if (arm_target->may_use_thumb2_nop())
3712 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
3713 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
3717 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
3718 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
3720 return This::STATUS_OKAY;
3723 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
3724 Arm_address branch_target = psymval->value(object, addend);
3725 int32_t branch_offset = branch_target - address;
3727 // We need a stub if the branch offset is too large or if we need
3729 bool may_use_blx = arm_target->may_use_blx();
3730 bool thumb2 = arm_target->using_thumb2();
3732 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3733 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3735 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3736 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3737 || ((thumb_bit == 0)
3738 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
3739 || r_type == elfcpp::R_ARM_THM_JUMP24)))
3741 Stub_type stub_type =
3742 Reloc_stub::stub_type_for_reloc(r_type, address, branch_target,
3744 if (stub_type != arm_stub_none)
3746 Stub_table<big_endian>* stub_table =
3747 object->stub_table(relinfo->data_shndx);
3748 gold_assert(stub_table != NULL);
3750 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3751 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
3752 gold_assert(stub != NULL);
3753 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3754 branch_target = stub_table->address() + stub->offset() + addend;
3755 branch_offset = branch_target - address;
3759 // At this point, if we still need to switch mode, the instruction
3760 // must either be a BLX or a BL that can be converted to a BLX.
3763 gold_assert(may_use_blx
3764 && (r_type == elfcpp::R_ARM_THM_CALL
3765 || r_type == elfcpp::R_ARM_THM_XPC22));
3766 // Make sure this is a BLX.
3767 lower_insn &= ~0x1000U;
3771 // Make sure this is a BL.
3772 lower_insn |= 0x1000U;
3775 if ((lower_insn & 0x5000U) == 0x4000U)
3776 // For a BLX instruction, make sure that the relocation is rounded up
3777 // to a word boundary. This follows the semantics of the instruction
3778 // which specifies that bit 1 of the target address will come from bit
3779 // 1 of the base address.
3780 branch_offset = (branch_offset + 2) & ~3;
3782 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
3783 // We use the Thumb-2 encoding, which is safe even if dealing with
3784 // a Thumb-1 instruction by virtue of our overflow check above. */
3785 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
3786 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
3788 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3789 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3792 ? utils::has_overflow<25>(branch_offset)
3793 : utils::has_overflow<23>(branch_offset))
3794 ? This::STATUS_OVERFLOW
3795 : This::STATUS_OKAY);
3798 // Relocate THUMB-2 long conditional branches.
3799 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3800 // undefined and we do not use PLT in this relocation. In such a case,
3801 // the branch is converted into an NOP.
3803 template<bool big_endian>
3804 typename Arm_relocate_functions<big_endian>::Status
3805 Arm_relocate_functions<big_endian>::thm_jump19(
3806 unsigned char *view,
3807 const Arm_relobj<big_endian>* object,
3808 const Symbol_value<32>* psymval,
3809 Arm_address address,
3810 Arm_address thumb_bit)
3812 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3813 Valtype* wv = reinterpret_cast<Valtype*>(view);
3814 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3815 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
3816 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
3818 Arm_address branch_target = psymval->value(object, addend);
3819 int32_t branch_offset = branch_target - address;
3821 // ??? Should handle interworking? GCC might someday try to
3822 // use this for tail calls.
3823 // FIXME: We do support thumb entry to PLT yet.
3826 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
3827 return This::STATUS_BAD_RELOC;
3830 // Put RELOCATION back into the insn.
3831 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
3832 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
3834 // Put the relocated value back in the object file:
3835 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
3836 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
3838 return (utils::has_overflow<21>(branch_offset)
3839 ? This::STATUS_OVERFLOW
3840 : This::STATUS_OKAY);
3843 // Get the GOT section, creating it if necessary.
3845 template<bool big_endian>
3846 Output_data_got<32, big_endian>*
3847 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
3849 if (this->got_ == NULL)
3851 gold_assert(symtab != NULL && layout != NULL);
3853 this->got_ = new Output_data_got<32, big_endian>();
3856 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3858 | elfcpp::SHF_WRITE),
3859 this->got_, false, true, true,
3862 // The old GNU linker creates a .got.plt section. We just
3863 // create another set of data in the .got section. Note that we
3864 // always create a PLT if we create a GOT, although the PLT
3866 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
3867 os = layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
3869 | elfcpp::SHF_WRITE),
3870 this->got_plt_, false, false,
3873 // The first three entries are reserved.
3874 this->got_plt_->set_current_data_size(3 * 4);
3876 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
3877 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
3878 Symbol_table::PREDEFINED,
3880 0, 0, elfcpp::STT_OBJECT,
3882 elfcpp::STV_HIDDEN, 0,
3888 // Get the dynamic reloc section, creating it if necessary.
3890 template<bool big_endian>
3891 typename Target_arm<big_endian>::Reloc_section*
3892 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
3894 if (this->rel_dyn_ == NULL)
3896 gold_assert(layout != NULL);
3897 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
3898 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
3899 elfcpp::SHF_ALLOC, this->rel_dyn_, true,
3900 false, false, false);
3902 return this->rel_dyn_;
3905 // Insn_template methods.
3907 // Return byte size of an instruction template.
3910 Insn_template::size() const
3912 switch (this->type())
3915 case THUMB16_SPECIAL_TYPE:
3926 // Return alignment of an instruction template.
3929 Insn_template::alignment() const
3931 switch (this->type())
3934 case THUMB16_SPECIAL_TYPE:
3945 // Stub_template methods.
3947 Stub_template::Stub_template(
3948 Stub_type type, const Insn_template* insns,
3950 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
3951 entry_in_thumb_mode_(false), relocs_()
3955 // Compute byte size and alignment of stub template.
3956 for (size_t i = 0; i < insn_count; i++)
3958 unsigned insn_alignment = insns[i].alignment();
3959 size_t insn_size = insns[i].size();
3960 gold_assert((offset & (insn_alignment - 1)) == 0);
3961 this->alignment_ = std::max(this->alignment_, insn_alignment);
3962 switch (insns[i].type())
3964 case Insn_template::THUMB16_TYPE:
3965 case Insn_template::THUMB16_SPECIAL_TYPE:
3967 this->entry_in_thumb_mode_ = true;
3970 case Insn_template::THUMB32_TYPE:
3971 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
3972 this->relocs_.push_back(Reloc(i, offset));
3974 this->entry_in_thumb_mode_ = true;
3977 case Insn_template::ARM_TYPE:
3978 // Handle cases where the target is encoded within the
3980 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
3981 this->relocs_.push_back(Reloc(i, offset));
3984 case Insn_template::DATA_TYPE:
3985 // Entry point cannot be data.
3986 gold_assert(i != 0);
3987 this->relocs_.push_back(Reloc(i, offset));
3993 offset += insn_size;
3995 this->size_ = offset;
4000 // Template to implement do_write for a specific target endianity.
4002 template<bool big_endian>
4004 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4006 const Stub_template* stub_template = this->stub_template();
4007 const Insn_template* insns = stub_template->insns();
4009 // FIXME: We do not handle BE8 encoding yet.
4010 unsigned char* pov = view;
4011 for (size_t i = 0; i < stub_template->insn_count(); i++)
4013 switch (insns[i].type())
4015 case Insn_template::THUMB16_TYPE:
4016 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4018 case Insn_template::THUMB16_SPECIAL_TYPE:
4019 elfcpp::Swap<16, big_endian>::writeval(
4021 this->thumb16_special(i));
4023 case Insn_template::THUMB32_TYPE:
4025 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4026 uint32_t lo = insns[i].data() & 0xffff;
4027 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4028 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4031 case Insn_template::ARM_TYPE:
4032 case Insn_template::DATA_TYPE:
4033 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4038 pov += insns[i].size();
4040 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4043 // Reloc_stub::Key methods.
4045 // Dump a Key as a string for debugging.
4048 Reloc_stub::Key::name() const
4050 if (this->r_sym_ == invalid_index)
4052 // Global symbol key name
4053 // <stub-type>:<symbol name>:<addend>.
4054 const std::string sym_name = this->u_.symbol->name();
4055 // We need to print two hex number and two colons. So just add 100 bytes
4056 // to the symbol name size.
4057 size_t len = sym_name.size() + 100;
4058 char* buffer = new char[len];
4059 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4060 sym_name.c_str(), this->addend_);
4061 gold_assert(c > 0 && c < static_cast<int>(len));
4063 return std::string(buffer);
4067 // local symbol key name
4068 // <stub-type>:<object>:<r_sym>:<addend>.
4069 const size_t len = 200;
4071 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4072 this->u_.relobj, this->r_sym_, this->addend_);
4073 gold_assert(c > 0 && c < static_cast<int>(len));
4074 return std::string(buffer);
4078 // Reloc_stub methods.
4080 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4081 // LOCATION to DESTINATION.
4082 // This code is based on the arm_type_of_stub function in
4083 // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub
4087 Reloc_stub::stub_type_for_reloc(
4088 unsigned int r_type,
4089 Arm_address location,
4090 Arm_address destination,
4091 bool target_is_thumb)
4093 Stub_type stub_type = arm_stub_none;
4095 // This is a bit ugly but we want to avoid using a templated class for
4096 // big and little endianities.
4098 bool should_force_pic_veneer;
4101 if (parameters->target().is_big_endian())
4103 const Target_arm<true>* big_endian_target =
4104 Target_arm<true>::default_target();
4105 may_use_blx = big_endian_target->may_use_blx();
4106 should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
4107 thumb2 = big_endian_target->using_thumb2();
4108 thumb_only = big_endian_target->using_thumb_only();
4112 const Target_arm<false>* little_endian_target =
4113 Target_arm<false>::default_target();
4114 may_use_blx = little_endian_target->may_use_blx();
4115 should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
4116 thumb2 = little_endian_target->using_thumb2();
4117 thumb_only = little_endian_target->using_thumb_only();
4120 int64_t branch_offset = (int64_t)destination - location;
4122 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4124 // Handle cases where:
4125 // - this call goes too far (different Thumb/Thumb2 max
4127 // - it's a Thumb->Arm call and blx is not available, or it's a
4128 // Thumb->Arm branch (not bl). A stub is needed in this case.
4130 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4131 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4133 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4134 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4135 || ((!target_is_thumb)
4136 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4137 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4139 if (target_is_thumb)
4144 stub_type = (parameters->options().shared()
4145 || should_force_pic_veneer)
4148 && (r_type == elfcpp::R_ARM_THM_CALL))
4149 // V5T and above. Stub starts with ARM code, so
4150 // we must be able to switch mode before
4151 // reaching it, which is only possible for 'bl'
4152 // (ie R_ARM_THM_CALL relocation).
4153 ? arm_stub_long_branch_any_thumb_pic
4154 // On V4T, use Thumb code only.
4155 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4159 && (r_type == elfcpp::R_ARM_THM_CALL))
4160 ? arm_stub_long_branch_any_any // V5T and above.
4161 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4165 stub_type = (parameters->options().shared()
4166 || should_force_pic_veneer)
4167 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4168 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4175 // FIXME: We should check that the input section is from an
4176 // object that has interwork enabled.
4178 stub_type = (parameters->options().shared()
4179 || should_force_pic_veneer)
4182 && (r_type == elfcpp::R_ARM_THM_CALL))
4183 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4184 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4188 && (r_type == elfcpp::R_ARM_THM_CALL))
4189 ? arm_stub_long_branch_any_any // V5T and above.
4190 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4192 // Handle v4t short branches.
4193 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4194 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4195 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4196 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4200 else if (r_type == elfcpp::R_ARM_CALL
4201 || r_type == elfcpp::R_ARM_JUMP24
4202 || r_type == elfcpp::R_ARM_PLT32)
4204 if (target_is_thumb)
4208 // FIXME: We should check that the input section is from an
4209 // object that has interwork enabled.
4211 // We have an extra 2-bytes reach because of
4212 // the mode change (bit 24 (H) of BLX encoding).
4213 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4214 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4215 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4216 || (r_type == elfcpp::R_ARM_JUMP24)
4217 || (r_type == elfcpp::R_ARM_PLT32))
4219 stub_type = (parameters->options().shared()
4220 || should_force_pic_veneer)
4223 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4224 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4228 ? arm_stub_long_branch_any_any // V5T and above.
4229 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4235 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4236 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4238 stub_type = (parameters->options().shared()
4239 || should_force_pic_veneer)
4240 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4241 : arm_stub_long_branch_any_any; /// non-PIC.
4249 // Cortex_a8_stub methods.
4251 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4252 // I is the position of the instruction template in the stub template.
4255 Cortex_a8_stub::do_thumb16_special(size_t i)
4257 // The only use of this is to copy condition code from a conditional
4258 // branch being worked around to the corresponding conditional branch in
4260 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4262 uint16_t data = this->stub_template()->insns()[i].data();
4263 gold_assert((data & 0xff00U) == 0xd000U);
4264 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4268 // Stub_factory methods.
4270 Stub_factory::Stub_factory()
4272 // The instruction template sequences are declared as static
4273 // objects and initialized first time the constructor runs.
4275 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4276 // to reach the stub if necessary.
4277 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4279 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4280 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4281 // dcd R_ARM_ABS32(X)
4284 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4286 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4288 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4289 Insn_template::arm_insn(0xe12fff1c), // bx ip
4290 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4291 // dcd R_ARM_ABS32(X)
4294 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4295 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4297 Insn_template::thumb16_insn(0xb401), // push {r0}
4298 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4299 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4300 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4301 Insn_template::thumb16_insn(0x4760), // bx ip
4302 Insn_template::thumb16_insn(0xbf00), // nop
4303 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4304 // dcd R_ARM_ABS32(X)
4307 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4309 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4311 Insn_template::thumb16_insn(0x4778), // bx pc
4312 Insn_template::thumb16_insn(0x46c0), // nop
4313 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4314 Insn_template::arm_insn(0xe12fff1c), // bx ip
4315 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4316 // dcd R_ARM_ABS32(X)
4319 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4321 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4323 Insn_template::thumb16_insn(0x4778), // bx pc
4324 Insn_template::thumb16_insn(0x46c0), // nop
4325 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4326 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4327 // dcd R_ARM_ABS32(X)
4330 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4331 // one, when the destination is close enough.
4332 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4334 Insn_template::thumb16_insn(0x4778), // bx pc
4335 Insn_template::thumb16_insn(0x46c0), // nop
4336 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4339 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4340 // blx to reach the stub if necessary.
4341 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4343 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4344 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4345 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4346 // dcd R_ARM_REL32(X-4)
4349 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4350 // blx to reach the stub if necessary. We can not add into pc;
4351 // it is not guaranteed to mode switch (different in ARMv6 and
4353 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4355 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4356 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4357 Insn_template::arm_insn(0xe12fff1c), // bx ip
4358 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4359 // dcd R_ARM_REL32(X)
4362 // V4T ARM -> ARM long branch stub, PIC.
4363 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4365 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4366 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4367 Insn_template::arm_insn(0xe12fff1c), // bx ip
4368 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4369 // dcd R_ARM_REL32(X)
4372 // V4T Thumb -> ARM long branch stub, PIC.
4373 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4375 Insn_template::thumb16_insn(0x4778), // bx pc
4376 Insn_template::thumb16_insn(0x46c0), // nop
4377 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4378 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4379 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4380 // dcd R_ARM_REL32(X)
4383 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4385 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4387 Insn_template::thumb16_insn(0xb401), // push {r0}
4388 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4389 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4390 Insn_template::thumb16_insn(0x4484), // add ip, r0
4391 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4392 Insn_template::thumb16_insn(0x4760), // bx ip
4393 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4394 // dcd R_ARM_REL32(X)
4397 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4399 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4401 Insn_template::thumb16_insn(0x4778), // bx pc
4402 Insn_template::thumb16_insn(0x46c0), // nop
4403 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4404 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4405 Insn_template::arm_insn(0xe12fff1c), // bx ip
4406 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4407 // dcd R_ARM_REL32(X)
4410 // Cortex-A8 erratum-workaround stubs.
4412 // Stub used for conditional branches (which may be beyond +/-1MB away,
4413 // so we can't use a conditional branch to reach this stub).
4420 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4422 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4423 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4424 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4428 // Stub used for b.w and bl.w instructions.
4430 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4432 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4435 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4437 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4440 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4441 // instruction (which switches to ARM mode) to point to this stub. Jump to
4442 // the real destination using an ARM-mode branch.
4443 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4445 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4448 // Stub used to provide an interworking for R_ARM_V4BX relocation
4449 // (bx r[n] instruction).
4450 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4452 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4453 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4454 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4457 // Fill in the stub template look-up table. Stub templates are constructed
4458 // per instance of Stub_factory for fast look-up without locking
4459 // in a thread-enabled environment.
4461 this->stub_templates_[arm_stub_none] =
4462 new Stub_template(arm_stub_none, NULL, 0);
4464 #define DEF_STUB(x) \
4468 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4469 Stub_type type = arm_stub_##x; \
4470 this->stub_templates_[type] = \
4471 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4479 // Stub_table methods.
4481 // Removel all Cortex-A8 stub.
4483 template<bool big_endian>
4485 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4487 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4488 p != this->cortex_a8_stubs_.end();
4491 this->cortex_a8_stubs_.clear();
4494 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4496 template<bool big_endian>
4498 Stub_table<big_endian>::relocate_stub(
4500 const Relocate_info<32, big_endian>* relinfo,
4501 Target_arm<big_endian>* arm_target,
4502 Output_section* output_section,
4503 unsigned char* view,
4504 Arm_address address,
4505 section_size_type view_size)
4507 const Stub_template* stub_template = stub->stub_template();
4508 if (stub_template->reloc_count() != 0)
4510 // Adjust view to cover the stub only.
4511 section_size_type offset = stub->offset();
4512 section_size_type stub_size = stub_template->size();
4513 gold_assert(offset + stub_size <= view_size);
4515 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4516 address + offset, stub_size);
4520 // Relocate all stubs in this stub table.
4522 template<bool big_endian>
4524 Stub_table<big_endian>::relocate_stubs(
4525 const Relocate_info<32, big_endian>* relinfo,
4526 Target_arm<big_endian>* arm_target,
4527 Output_section* output_section,
4528 unsigned char* view,
4529 Arm_address address,
4530 section_size_type view_size)
4532 // If we are passed a view bigger than the stub table's. we need to
4534 gold_assert(address == this->address()
4536 == static_cast<section_size_type>(this->data_size())));
4538 // Relocate all relocation stubs.
4539 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4540 p != this->reloc_stubs_.end();
4542 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4543 address, view_size);
4545 // Relocate all Cortex-A8 stubs.
4546 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4547 p != this->cortex_a8_stubs_.end();
4549 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4550 address, view_size);
4552 // Relocate all ARM V4BX stubs.
4553 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
4554 p != this->arm_v4bx_stubs_.end();
4558 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
4559 address, view_size);
4563 // Write out the stubs to file.
4565 template<bool big_endian>
4567 Stub_table<big_endian>::do_write(Output_file* of)
4569 off_t offset = this->offset();
4570 const section_size_type oview_size =
4571 convert_to_section_size_type(this->data_size());
4572 unsigned char* const oview = of->get_output_view(offset, oview_size);
4574 // Write relocation stubs.
4575 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4576 p != this->reloc_stubs_.end();
4579 Reloc_stub* stub = p->second;
4580 Arm_address address = this->address() + stub->offset();
4582 == align_address(address,
4583 stub->stub_template()->alignment()));
4584 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4588 // Write Cortex-A8 stubs.
4589 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4590 p != this->cortex_a8_stubs_.end();
4593 Cortex_a8_stub* stub = p->second;
4594 Arm_address address = this->address() + stub->offset();
4596 == align_address(address,
4597 stub->stub_template()->alignment()));
4598 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4602 // Write ARM V4BX relocation stubs.
4603 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4604 p != this->arm_v4bx_stubs_.end();
4610 Arm_address address = this->address() + (*p)->offset();
4612 == align_address(address,
4613 (*p)->stub_template()->alignment()));
4614 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
4618 of->write_output_view(this->offset(), oview_size, oview);
4621 // Update the data size and address alignment of the stub table at the end
4622 // of a relaxation pass. Return true if either the data size or the
4623 // alignment changed in this relaxation pass.
4625 template<bool big_endian>
4627 Stub_table<big_endian>::update_data_size_and_addralign()
4630 unsigned addralign = 1;
4632 // Go over all stubs in table to compute data size and address alignment.
4634 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4635 p != this->reloc_stubs_.end();
4638 const Stub_template* stub_template = p->second->stub_template();
4639 addralign = std::max(addralign, stub_template->alignment());
4640 size = (align_address(size, stub_template->alignment())
4641 + stub_template->size());
4644 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4645 p != this->cortex_a8_stubs_.end();
4648 const Stub_template* stub_template = p->second->stub_template();
4649 addralign = std::max(addralign, stub_template->alignment());
4650 size = (align_address(size, stub_template->alignment())
4651 + stub_template->size());
4654 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4655 p != this->arm_v4bx_stubs_.end();
4661 const Stub_template* stub_template = (*p)->stub_template();
4662 addralign = std::max(addralign, stub_template->alignment());
4663 size = (align_address(size, stub_template->alignment())
4664 + stub_template->size());
4667 // Check if either data size or alignment changed in this pass.
4668 // Update prev_data_size_ and prev_addralign_. These will be used
4669 // as the current data size and address alignment for the next pass.
4670 bool changed = size != this->prev_data_size_;
4671 this->prev_data_size_ = size;
4673 if (addralign != this->prev_addralign_)
4675 this->prev_addralign_ = addralign;
4680 // Finalize the stubs. This sets the offsets of the stubs within the stub
4681 // table. It also marks all input sections needing Cortex-A8 workaround.
4683 template<bool big_endian>
4685 Stub_table<big_endian>::finalize_stubs()
4688 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4689 p != this->reloc_stubs_.end();
4692 Reloc_stub* stub = p->second;
4693 const Stub_template* stub_template = stub->stub_template();
4694 uint64_t stub_addralign = stub_template->alignment();
4695 off = align_address(off, stub_addralign);
4696 stub->set_offset(off);
4697 off += stub_template->size();
4700 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4701 p != this->cortex_a8_stubs_.end();
4704 Cortex_a8_stub* stub = p->second;
4705 const Stub_template* stub_template = stub->stub_template();
4706 uint64_t stub_addralign = stub_template->alignment();
4707 off = align_address(off, stub_addralign);
4708 stub->set_offset(off);
4709 off += stub_template->size();
4711 // Mark input section so that we can determine later if a code section
4712 // needs the Cortex-A8 workaround quickly.
4713 Arm_relobj<big_endian>* arm_relobj =
4714 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
4715 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
4718 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4719 p != this->arm_v4bx_stubs_.end();
4725 const Stub_template* stub_template = (*p)->stub_template();
4726 uint64_t stub_addralign = stub_template->alignment();
4727 off = align_address(off, stub_addralign);
4728 (*p)->set_offset(off);
4729 off += stub_template->size();
4732 gold_assert(off <= this->prev_data_size_);
4735 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
4736 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
4737 // of the address range seen by the linker.
4739 template<bool big_endian>
4741 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
4742 Target_arm<big_endian>* arm_target,
4743 unsigned char* view,
4744 Arm_address view_address,
4745 section_size_type view_size)
4747 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
4748 for (Cortex_a8_stub_list::const_iterator p =
4749 this->cortex_a8_stubs_.lower_bound(view_address);
4750 ((p != this->cortex_a8_stubs_.end())
4751 && (p->first < (view_address + view_size)));
4754 // We do not store the THUMB bit in the LSB of either the branch address
4755 // or the stub offset. There is no need to strip the LSB.
4756 Arm_address branch_address = p->first;
4757 const Cortex_a8_stub* stub = p->second;
4758 Arm_address stub_address = this->address() + stub->offset();
4760 // Offset of the branch instruction relative to this view.
4761 section_size_type offset =
4762 convert_to_section_size_type(branch_address - view_address);
4763 gold_assert((offset + 4) <= view_size);
4765 arm_target->apply_cortex_a8_workaround(stub, stub_address,
4766 view + offset, branch_address);
4770 // Arm_input_section methods.
4772 // Initialize an Arm_input_section.
4774 template<bool big_endian>
4776 Arm_input_section<big_endian>::init()
4778 Relobj* relobj = this->relobj();
4779 unsigned int shndx = this->shndx();
4781 // Cache these to speed up size and alignment queries. It is too slow
4782 // to call section_addraglin and section_size every time.
4783 this->original_addralign_ = relobj->section_addralign(shndx);
4784 this->original_size_ = relobj->section_size(shndx);
4786 // We want to make this look like the original input section after
4787 // output sections are finalized.
4788 Output_section* os = relobj->output_section(shndx);
4789 off_t offset = relobj->output_section_offset(shndx);
4790 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
4791 this->set_address(os->address() + offset);
4792 this->set_file_offset(os->offset() + offset);
4794 this->set_current_data_size(this->original_size_);
4795 this->finalize_data_size();
4798 template<bool big_endian>
4800 Arm_input_section<big_endian>::do_write(Output_file* of)
4802 // We have to write out the original section content.
4803 section_size_type section_size;
4804 const unsigned char* section_contents =
4805 this->relobj()->section_contents(this->shndx(), §ion_size, false);
4806 of->write(this->offset(), section_contents, section_size);
4808 // If this owns a stub table and it is not empty, write it.
4809 if (this->is_stub_table_owner() && !this->stub_table_->empty())
4810 this->stub_table_->write(of);
4813 // Finalize data size.
4815 template<bool big_endian>
4817 Arm_input_section<big_endian>::set_final_data_size()
4819 // If this owns a stub table, finalize its data size as well.
4820 if (this->is_stub_table_owner())
4822 uint64_t address = this->address();
4824 // The stub table comes after the original section contents.
4825 address += this->original_size_;
4826 address = align_address(address, this->stub_table_->addralign());
4827 off_t offset = this->offset() + (address - this->address());
4828 this->stub_table_->set_address_and_file_offset(address, offset);
4829 address += this->stub_table_->data_size();
4830 gold_assert(address == this->address() + this->current_data_size());
4833 this->set_data_size(this->current_data_size());
4836 // Reset address and file offset.
4838 template<bool big_endian>
4840 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
4842 // Size of the original input section contents.
4843 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
4845 // If this is a stub table owner, account for the stub table size.
4846 if (this->is_stub_table_owner())
4848 Stub_table<big_endian>* stub_table = this->stub_table_;
4850 // Reset the stub table's address and file offset. The
4851 // current data size for child will be updated after that.
4852 stub_table_->reset_address_and_file_offset();
4853 off = align_address(off, stub_table_->addralign());
4854 off += stub_table->current_data_size();
4857 this->set_current_data_size(off);
4860 // Arm_exidx_cantunwind methods.
4862 // Write this to Output file OF for a fixed endianity.
4864 template<bool big_endian>
4866 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
4868 off_t offset = this->offset();
4869 const section_size_type oview_size = 8;
4870 unsigned char* const oview = of->get_output_view(offset, oview_size);
4872 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
4873 Valtype* wv = reinterpret_cast<Valtype*>(oview);
4875 Output_section* os = this->relobj_->output_section(this->shndx_);
4876 gold_assert(os != NULL);
4878 Arm_relobj<big_endian>* arm_relobj =
4879 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
4880 Arm_address output_offset =
4881 arm_relobj->get_output_section_offset(this->shndx_);
4882 Arm_address section_start;
4883 if(output_offset != Arm_relobj<big_endian>::invalid_address)
4884 section_start = os->address() + output_offset;
4887 // Currently this only happens for a relaxed section.
4888 const Output_relaxed_input_section* poris =
4889 os->find_relaxed_input_section(this->relobj_, this->shndx_);
4890 gold_assert(poris != NULL);
4891 section_start = poris->address();
4894 // We always append this to the end of an EXIDX section.
4895 Arm_address output_address =
4896 section_start + this->relobj_->section_size(this->shndx_);
4898 // Write out the entry. The first word either points to the beginning
4899 // or after the end of a text section. The second word is the special
4900 // EXIDX_CANTUNWIND value.
4901 uint32_t prel31_offset = output_address - this->address();
4902 if (utils::has_overflow<31>(offset))
4903 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
4904 elfcpp::Swap<32, big_endian>::writeval(wv, prel31_offset & 0x7fffffffU);
4905 elfcpp::Swap<32, big_endian>::writeval(wv + 1, elfcpp::EXIDX_CANTUNWIND);
4907 of->write_output_view(this->offset(), oview_size, oview);
4910 // Arm_exidx_merged_section methods.
4912 // Constructor for Arm_exidx_merged_section.
4913 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
4914 // SECTION_OFFSET_MAP points to a section offset map describing how
4915 // parts of the input section are mapped to output. DELETED_BYTES is
4916 // the number of bytes deleted from the EXIDX input section.
4918 Arm_exidx_merged_section::Arm_exidx_merged_section(
4919 const Arm_exidx_input_section& exidx_input_section,
4920 const Arm_exidx_section_offset_map& section_offset_map,
4921 uint32_t deleted_bytes)
4922 : Output_relaxed_input_section(exidx_input_section.relobj(),
4923 exidx_input_section.shndx(),
4924 exidx_input_section.addralign()),
4925 exidx_input_section_(exidx_input_section),
4926 section_offset_map_(section_offset_map)
4928 // Fix size here so that we do not need to implement set_final_data_size.
4929 this->set_data_size(exidx_input_section.size() - deleted_bytes);
4930 this->fix_data_size();
4933 // Given an input OBJECT, an input section index SHNDX within that
4934 // object, and an OFFSET relative to the start of that input
4935 // section, return whether or not the corresponding offset within
4936 // the output section is known. If this function returns true, it
4937 // sets *POUTPUT to the output offset. The value -1 indicates that
4938 // this input offset is being discarded.
4941 Arm_exidx_merged_section::do_output_offset(
4942 const Relobj* relobj,
4944 section_offset_type offset,
4945 section_offset_type* poutput) const
4947 // We only handle offsets for the original EXIDX input section.
4948 if (relobj != this->exidx_input_section_.relobj()
4949 || shndx != this->exidx_input_section_.shndx())
4952 section_offset_type section_size =
4953 convert_types<section_offset_type>(this->exidx_input_section_.size());
4954 if (offset < 0 || offset >= section_size)
4955 // Input offset is out of valid range.
4959 // We need to look up the section offset map to determine the output
4960 // offset. Find the reference point in map that is first offset
4961 // bigger than or equal to this offset.
4962 Arm_exidx_section_offset_map::const_iterator p =
4963 this->section_offset_map_.lower_bound(offset);
4965 // The section offset maps are build such that this should not happen if
4966 // input offset is in the valid range.
4967 gold_assert(p != this->section_offset_map_.end());
4969 // We need to check if this is dropped.
4970 section_offset_type ref = p->first;
4971 section_offset_type mapped_ref = p->second;
4973 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
4974 // Offset is present in output.
4975 *poutput = mapped_ref + (offset - ref);
4977 // Offset is discarded owing to EXIDX entry merging.
4984 // Write this to output file OF.
4987 Arm_exidx_merged_section::do_write(Output_file* of)
4989 // If we retain or discard the whole EXIDX input section, we would
4991 gold_assert(this->data_size() != this->exidx_input_section_.size()
4992 && this->data_size() != 0);
4994 off_t offset = this->offset();
4995 const section_size_type oview_size = this->data_size();
4996 unsigned char* const oview = of->get_output_view(offset, oview_size);
4998 Output_section* os = this->relobj()->output_section(this->shndx());
4999 gold_assert(os != NULL);
5001 // Get contents of EXIDX input section.
5002 section_size_type section_size;
5003 const unsigned char* section_contents =
5004 this->relobj()->section_contents(this->shndx(), §ion_size, false);
5005 gold_assert(section_size == this->exidx_input_section_.size());
5007 // Go over spans of input offsets and write only those that are not
5009 section_offset_type in_start = 0;
5010 section_offset_type out_start = 0;
5011 for(Arm_exidx_section_offset_map::const_iterator p =
5012 this->section_offset_map_.begin();
5013 p != this->section_offset_map_.end();
5016 section_offset_type in_end = p->first;
5017 gold_assert(in_end >= in_start);
5018 section_offset_type out_end = p->second;
5019 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5022 size_t out_chunk_size =
5023 convert_types<size_t>(out_end - out_start + 1);
5024 gold_assert(out_chunk_size == in_chunk_size);
5025 memcpy(oview + out_start, section_contents + in_start,
5027 out_start += out_chunk_size;
5029 in_start += in_chunk_size;
5032 gold_assert(convert_to_section_size_type(out_start) == oview_size);
5033 of->write_output_view(this->offset(), oview_size, oview);
5036 // Arm_exidx_fixup methods.
5038 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5039 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5040 // points to the end of the last seen EXIDX section.
5043 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5045 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5046 && this->last_input_section_ != NULL)
5048 Relobj* relobj = this->last_input_section_->relobj();
5049 unsigned int text_shndx = this->last_input_section_->link();
5050 Arm_exidx_cantunwind* cantunwind =
5051 new Arm_exidx_cantunwind(relobj, text_shndx);
5052 this->exidx_output_section_->add_output_section_data(cantunwind);
5053 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5057 // Process an EXIDX section entry in input. Return whether this entry
5058 // can be deleted in the output. SECOND_WORD in the second word of the
5062 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5065 if (second_word == elfcpp::EXIDX_CANTUNWIND)
5067 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5068 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5069 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5071 else if ((second_word & 0x80000000) != 0)
5073 // Inlined unwinding data. Merge if equal to previous.
5074 delete_entry = (this->last_unwind_type_ == UT_INLINED_ENTRY
5075 && this->last_inlined_entry_ == second_word);
5076 this->last_unwind_type_ = UT_INLINED_ENTRY;
5077 this->last_inlined_entry_ = second_word;
5081 // Normal table entry. In theory we could merge these too,
5082 // but duplicate entries are likely to be much less common.
5083 delete_entry = false;
5084 this->last_unwind_type_ = UT_NORMAL_ENTRY;
5086 return delete_entry;
5089 // Update the current section offset map during EXIDX section fix-up.
5090 // If there is no map, create one. INPUT_OFFSET is the offset of a
5091 // reference point, DELETED_BYTES is the number of deleted by in the
5092 // section so far. If DELETE_ENTRY is true, the reference point and
5093 // all offsets after the previous reference point are discarded.
5096 Arm_exidx_fixup::update_offset_map(
5097 section_offset_type input_offset,
5098 section_size_type deleted_bytes,
5101 if (this->section_offset_map_ == NULL)
5102 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5103 section_offset_type output_offset = (delete_entry
5105 : input_offset - deleted_bytes);
5106 (*this->section_offset_map_)[input_offset] = output_offset;
5109 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5110 // bytes deleted. If some entries are merged, also store a pointer to a newly
5111 // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The
5112 // caller owns the map and is responsible for releasing it after use.
5114 template<bool big_endian>
5116 Arm_exidx_fixup::process_exidx_section(
5117 const Arm_exidx_input_section* exidx_input_section,
5118 Arm_exidx_section_offset_map** psection_offset_map)
5120 Relobj* relobj = exidx_input_section->relobj();
5121 unsigned shndx = exidx_input_section->shndx();
5122 section_size_type section_size;
5123 const unsigned char* section_contents =
5124 relobj->section_contents(shndx, §ion_size, false);
5126 if ((section_size % 8) != 0)
5128 // Something is wrong with this section. Better not touch it.
5129 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5130 relobj->name().c_str(), shndx);
5131 this->last_input_section_ = exidx_input_section;
5132 this->last_unwind_type_ = UT_NONE;
5136 uint32_t deleted_bytes = 0;
5137 bool prev_delete_entry = false;
5138 gold_assert(this->section_offset_map_ == NULL);
5140 for (section_size_type i = 0; i < section_size; i += 8)
5142 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5144 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5145 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5147 bool delete_entry = this->process_exidx_entry(second_word);
5149 // Entry deletion causes changes in output offsets. We use a std::map
5150 // to record these. And entry (x, y) means input offset x
5151 // is mapped to output offset y. If y is invalid_offset, then x is
5152 // dropped in the output. Because of the way std::map::lower_bound
5153 // works, we record the last offset in a region w.r.t to keeping or
5154 // dropping. If there is no entry (x0, y0) for an input offset x0,
5155 // the output offset y0 of it is determined by the output offset y1 of
5156 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5157 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1
5159 if (delete_entry != prev_delete_entry && i != 0)
5160 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5162 // Update total deleted bytes for this entry.
5166 prev_delete_entry = delete_entry;
5169 // If section offset map is not NULL, make an entry for the end of
5171 if (this->section_offset_map_ != NULL)
5172 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5174 *psection_offset_map = this->section_offset_map_;
5175 this->section_offset_map_ = NULL;
5176 this->last_input_section_ = exidx_input_section;
5178 // Set the first output text section so that we can link the EXIDX output
5179 // section to it. Ignore any EXIDX input section that is completely merged.
5180 if (this->first_output_text_section_ == NULL
5181 && deleted_bytes != section_size)
5183 unsigned int link = exidx_input_section->link();
5184 Output_section* os = relobj->output_section(link);
5185 gold_assert(os != NULL);
5186 this->first_output_text_section_ = os;
5189 return deleted_bytes;
5192 // Arm_output_section methods.
5194 // Create a stub group for input sections from BEGIN to END. OWNER
5195 // points to the input section to be the owner a new stub table.
5197 template<bool big_endian>
5199 Arm_output_section<big_endian>::create_stub_group(
5200 Input_section_list::const_iterator begin,
5201 Input_section_list::const_iterator end,
5202 Input_section_list::const_iterator owner,
5203 Target_arm<big_endian>* target,
5204 std::vector<Output_relaxed_input_section*>* new_relaxed_sections)
5206 // We use a different kind of relaxed section in an EXIDX section.
5207 // The static casting from Output_relaxed_input_section to
5208 // Arm_input_section is invalid in an EXIDX section. We are okay
5209 // because we should not be calling this for an EXIDX section.
5210 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5212 // Currently we convert ordinary input sections into relaxed sections only
5213 // at this point but we may want to support creating relaxed input section
5214 // very early. So we check here to see if owner is already a relaxed
5217 Arm_input_section<big_endian>* arm_input_section;
5218 if (owner->is_relaxed_input_section())
5221 Arm_input_section<big_endian>::as_arm_input_section(
5222 owner->relaxed_input_section());
5226 gold_assert(owner->is_input_section());
5227 // Create a new relaxed input section.
5229 target->new_arm_input_section(owner->relobj(), owner->shndx());
5230 new_relaxed_sections->push_back(arm_input_section);
5233 // Create a stub table.
5234 Stub_table<big_endian>* stub_table =
5235 target->new_stub_table(arm_input_section);
5237 arm_input_section->set_stub_table(stub_table);
5239 Input_section_list::const_iterator p = begin;
5240 Input_section_list::const_iterator prev_p;
5242 // Look for input sections or relaxed input sections in [begin ... end].
5245 if (p->is_input_section() || p->is_relaxed_input_section())
5247 // The stub table information for input sections live
5248 // in their objects.
5249 Arm_relobj<big_endian>* arm_relobj =
5250 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5251 arm_relobj->set_stub_table(p->shndx(), stub_table);
5255 while (prev_p != end);
5258 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5259 // of stub groups. We grow a stub group by adding input section until the
5260 // size is just below GROUP_SIZE. The last input section will be converted
5261 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5262 // input section after the stub table, effectively double the group size.
5264 // This is similar to the group_sections() function in elf32-arm.c but is
5265 // implemented differently.
5267 template<bool big_endian>
5269 Arm_output_section<big_endian>::group_sections(
5270 section_size_type group_size,
5271 bool stubs_always_after_branch,
5272 Target_arm<big_endian>* target)
5274 // We only care about sections containing code.
5275 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5278 // States for grouping.
5281 // No group is being built.
5283 // A group is being built but the stub table is not found yet.
5284 // We keep group a stub group until the size is just under GROUP_SIZE.
5285 // The last input section in the group will be used as the stub table.
5286 FINDING_STUB_SECTION,
5287 // A group is being built and we have already found a stub table.
5288 // We enter this state to grow a stub group by adding input section
5289 // after the stub table. This effectively doubles the group size.
5293 // Any newly created relaxed sections are stored here.
5294 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5296 State state = NO_GROUP;
5297 section_size_type off = 0;
5298 section_size_type group_begin_offset = 0;
5299 section_size_type group_end_offset = 0;
5300 section_size_type stub_table_end_offset = 0;
5301 Input_section_list::const_iterator group_begin =
5302 this->input_sections().end();
5303 Input_section_list::const_iterator stub_table =
5304 this->input_sections().end();
5305 Input_section_list::const_iterator group_end = this->input_sections().end();
5306 for (Input_section_list::const_iterator p = this->input_sections().begin();
5307 p != this->input_sections().end();
5310 section_size_type section_begin_offset =
5311 align_address(off, p->addralign());
5312 section_size_type section_end_offset =
5313 section_begin_offset + p->data_size();
5315 // Check to see if we should group the previously seens sections.
5321 case FINDING_STUB_SECTION:
5322 // Adding this section makes the group larger than GROUP_SIZE.
5323 if (section_end_offset - group_begin_offset >= group_size)
5325 if (stubs_always_after_branch)
5327 gold_assert(group_end != this->input_sections().end());
5328 this->create_stub_group(group_begin, group_end, group_end,
5329 target, &new_relaxed_sections);
5334 // But wait, there's more! Input sections up to
5335 // stub_group_size bytes after the stub table can be
5336 // handled by it too.
5337 state = HAS_STUB_SECTION;
5338 stub_table = group_end;
5339 stub_table_end_offset = group_end_offset;
5344 case HAS_STUB_SECTION:
5345 // Adding this section makes the post stub-section group larger
5347 if (section_end_offset - stub_table_end_offset >= group_size)
5349 gold_assert(group_end != this->input_sections().end());
5350 this->create_stub_group(group_begin, group_end, stub_table,
5351 target, &new_relaxed_sections);
5360 // If we see an input section and currently there is no group, start
5361 // a new one. Skip any empty sections.
5362 if ((p->is_input_section() || p->is_relaxed_input_section())
5363 && (p->relobj()->section_size(p->shndx()) != 0))
5365 if (state == NO_GROUP)
5367 state = FINDING_STUB_SECTION;
5369 group_begin_offset = section_begin_offset;
5372 // Keep track of the last input section seen.
5374 group_end_offset = section_end_offset;
5377 off = section_end_offset;
5380 // Create a stub group for any ungrouped sections.
5381 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5383 gold_assert(group_end != this->input_sections().end());
5384 this->create_stub_group(group_begin, group_end,
5385 (state == FINDING_STUB_SECTION
5388 target, &new_relaxed_sections);
5391 // Convert input section into relaxed input section in a batch.
5392 if (!new_relaxed_sections.empty())
5393 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5395 // Update the section offsets
5396 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5398 Arm_relobj<big_endian>* arm_relobj =
5399 Arm_relobj<big_endian>::as_arm_relobj(
5400 new_relaxed_sections[i]->relobj());
5401 unsigned int shndx = new_relaxed_sections[i]->shndx();
5402 // Tell Arm_relobj that this input section is converted.
5403 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5407 // Append non empty text sections in this to LIST in ascending
5408 // order of their position in this.
5410 template<bool big_endian>
5412 Arm_output_section<big_endian>::append_text_sections_to_list(
5413 Text_section_list* list)
5415 // We only care about text sections.
5416 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5419 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5421 for (Input_section_list::const_iterator p = this->input_sections().begin();
5422 p != this->input_sections().end();
5425 // We only care about plain or relaxed input sections. We also
5426 // ignore any merged sections.
5427 if ((p->is_input_section() || p->is_relaxed_input_section())
5428 && p->data_size() != 0)
5429 list->push_back(Text_section_list::value_type(p->relobj(),
5434 template<bool big_endian>
5436 Arm_output_section<big_endian>::fix_exidx_coverage(
5437 const Text_section_list& sorted_text_sections,
5438 Symbol_table* symtab)
5440 // We should only do this for the EXIDX output section.
5441 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5443 // We don't want the relaxation loop to undo these changes, so we discard
5444 // the current saved states and take another one after the fix-up.
5445 this->discard_states();
5447 // Remove all input sections.
5448 uint64_t address = this->address();
5449 typedef std::list<Simple_input_section> Simple_input_section_list;
5450 Simple_input_section_list input_sections;
5451 this->reset_address_and_file_offset();
5452 this->get_input_sections(address, std::string(""), &input_sections);
5454 if (!this->input_sections().empty())
5455 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5457 // Go through all the known input sections and record them.
5458 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5459 Section_id_set known_input_sections;
5460 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5461 p != input_sections.end();
5464 // This should never happen. At this point, we should only see
5465 // plain EXIDX input sections.
5466 gold_assert(!p->is_relaxed_input_section());
5467 known_input_sections.insert(Section_id(p->relobj(), p->shndx()));
5470 Arm_exidx_fixup exidx_fixup(this);
5472 // Go over the sorted text sections.
5473 Section_id_set processed_input_sections;
5474 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5475 p != sorted_text_sections.end();
5478 Relobj* relobj = p->first;
5479 unsigned int shndx = p->second;
5481 Arm_relobj<big_endian>* arm_relobj =
5482 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5483 const Arm_exidx_input_section* exidx_input_section =
5484 arm_relobj->exidx_input_section_by_link(shndx);
5486 // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND
5487 // entry pointing to the end of the last seen EXIDX section.
5488 if (exidx_input_section == NULL)
5490 exidx_fixup.add_exidx_cantunwind_as_needed();
5494 Relobj* exidx_relobj = exidx_input_section->relobj();
5495 unsigned int exidx_shndx = exidx_input_section->shndx();
5496 Section_id sid(exidx_relobj, exidx_shndx);
5497 if (known_input_sections.find(sid) == known_input_sections.end())
5499 // This is odd. We have not seen this EXIDX input section before.
5500 // We cannot do fix-up.
5501 gold_error(_("EXIDX section %u of %s is not in EXIDX output section"),
5502 exidx_shndx, exidx_relobj->name().c_str());
5503 exidx_fixup.add_exidx_cantunwind_as_needed();
5507 // Fix up coverage and append input section to output data list.
5508 Arm_exidx_section_offset_map* section_offset_map = NULL;
5509 uint32_t deleted_bytes =
5510 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5511 §ion_offset_map);
5513 if (deleted_bytes == exidx_input_section->size())
5515 // The whole EXIDX section got merged. Remove it from output.
5516 gold_assert(section_offset_map == NULL);
5517 exidx_relobj->set_output_section(exidx_shndx, NULL);
5519 // All local symbols defined in this input section will be dropped.
5520 // We need to adjust output local symbol count.
5521 arm_relobj->set_output_local_symbol_count_needs_update();
5523 else if (deleted_bytes > 0)
5525 // Some entries are merged. We need to convert this EXIDX input
5526 // section into a relaxed section.
5527 gold_assert(section_offset_map != NULL);
5528 Arm_exidx_merged_section* merged_section =
5529 new Arm_exidx_merged_section(*exidx_input_section,
5530 *section_offset_map, deleted_bytes);
5531 this->add_relaxed_input_section(merged_section);
5532 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
5534 // All local symbols defined in discarded portions of this input
5535 // section will be dropped. We need to adjust output local symbol
5537 arm_relobj->set_output_local_symbol_count_needs_update();
5541 // Just add back the EXIDX input section.
5542 gold_assert(section_offset_map == NULL);
5543 Output_section::Simple_input_section sis(exidx_relobj, exidx_shndx);
5544 this->add_simple_input_section(sis, exidx_input_section->size(),
5545 exidx_input_section->addralign());
5548 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
5551 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5552 exidx_fixup.add_exidx_cantunwind_as_needed();
5554 // Remove any known EXIDX input sections that are not processed.
5555 for (Simple_input_section_list::const_iterator p = input_sections.begin();
5556 p != input_sections.end();
5559 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
5560 == processed_input_sections.end())
5562 // We only discard a known EXIDX section because its linked
5563 // text section has been folded by ICF.
5564 Arm_relobj<big_endian>* arm_relobj =
5565 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5566 const Arm_exidx_input_section* exidx_input_section =
5567 arm_relobj->exidx_input_section_by_shndx(p->shndx());
5568 gold_assert(exidx_input_section != NULL);
5569 unsigned int text_shndx = exidx_input_section->link();
5570 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
5572 // Remove this from link.
5573 p->relobj()->set_output_section(p->shndx(), NULL);
5577 // Link exidx output section to the first seen output section and
5578 // set correct entry size.
5579 this->set_link_section(exidx_fixup.first_output_text_section());
5580 this->set_entsize(8);
5582 // Make changes permanent.
5583 this->save_states();
5584 this->set_section_offsets_need_adjustment();
5587 // Arm_relobj methods.
5589 // Determine if we want to scan the SHNDX-th section for relocation stubs.
5590 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5592 template<bool big_endian>
5594 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
5595 const elfcpp::Shdr<32, big_endian>& shdr,
5596 const Relobj::Output_sections& out_sections,
5597 const Symbol_table *symtab,
5598 const unsigned char* pshdrs)
5600 unsigned int sh_type = shdr.get_sh_type();
5601 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
5604 // Ignore empty section.
5605 off_t sh_size = shdr.get_sh_size();
5609 // Ignore reloc section with bad info. This error will be
5610 // reported in the final link.
5611 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5612 if (index >= this->shnum())
5615 // This relocation section is against a section which we
5616 // discarded or if the section is folded into another
5617 // section due to ICF.
5618 if (out_sections[index] == NULL || symtab->is_section_folded(this, index))
5621 // Check the section to which relocations are applied. Ignore relocations
5622 // to unallocated sections or EXIDX sections.
5623 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5624 const elfcpp::Shdr<32, big_endian> data_shdr(pshdrs + index * shdr_size);
5625 if ((data_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
5626 || data_shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
5629 // Ignore reloc section with unexpected symbol table. The
5630 // error will be reported in the final link.
5631 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
5634 unsigned int reloc_size;
5635 if (sh_type == elfcpp::SHT_REL)
5636 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5638 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5640 // Ignore reloc section with unexpected entsize or uneven size.
5641 // The error will be reported in the final link.
5642 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
5648 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
5649 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5651 template<bool big_endian>
5653 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
5654 const elfcpp::Shdr<32, big_endian>& shdr,
5657 const Symbol_table* symtab)
5659 // We only scan non-empty code sections.
5660 if ((shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0
5661 || shdr.get_sh_size() == 0)
5664 // Ignore discarded or ICF'ed sections.
5665 if (os == NULL || symtab->is_section_folded(this, shndx))
5668 // Find output address of section.
5669 Arm_address address = os->output_address(this, shndx, 0);
5671 // If the section does not cross any 4K-boundaries, it does not need to
5673 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
5679 // Scan a section for Cortex-A8 workaround.
5681 template<bool big_endian>
5683 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
5684 const elfcpp::Shdr<32, big_endian>& shdr,
5687 Target_arm<big_endian>* arm_target)
5689 Arm_address output_address = os->output_address(this, shndx, 0);
5691 // Get the section contents.
5692 section_size_type input_view_size = 0;
5693 const unsigned char* input_view =
5694 this->section_contents(shndx, &input_view_size, false);
5696 // We need to go through the mapping symbols to determine what to
5697 // scan. There are two reasons. First, we should look at THUMB code and
5698 // THUMB code only. Second, we only want to look at the 4K-page boundary
5699 // to speed up the scanning.
5701 // Look for the first mapping symbol in this section. It should be
5703 Mapping_symbol_position section_start(shndx, 0);
5704 typename Mapping_symbols_info::const_iterator p =
5705 this->mapping_symbols_info_.lower_bound(section_start);
5707 if (p == this->mapping_symbols_info_.end()
5708 || p->first != section_start)
5710 gold_warning(_("Cortex-A8 erratum scanning failed because there "
5711 "is no mapping symbols for section %u of %s"),
5712 shndx, this->name().c_str());
5716 while (p != this->mapping_symbols_info_.end()
5717 && p->first.first == shndx)
5719 typename Mapping_symbols_info::const_iterator next =
5720 this->mapping_symbols_info_.upper_bound(p->first);
5722 // Only scan part of a section with THUMB code.
5723 if (p->second == 't')
5725 // Determine the end of this range.
5726 section_size_type span_start =
5727 convert_to_section_size_type(p->first.second);
5728 section_size_type span_end;
5729 if (next != this->mapping_symbols_info_.end()
5730 && next->first.first == shndx)
5731 span_end = convert_to_section_size_type(next->first.second);
5733 span_end = convert_to_section_size_type(shdr.get_sh_size());
5735 if (((span_start + output_address) & ~0xfffUL)
5736 != ((span_end + output_address - 1) & ~0xfffUL))
5738 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
5739 span_start, span_end,
5749 // Scan relocations for stub generation.
5751 template<bool big_endian>
5753 Arm_relobj<big_endian>::scan_sections_for_stubs(
5754 Target_arm<big_endian>* arm_target,
5755 const Symbol_table* symtab,
5756 const Layout* layout)
5758 unsigned int shnum = this->shnum();
5759 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
5761 // Read the section headers.
5762 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
5766 // To speed up processing, we set up hash tables for fast lookup of
5767 // input offsets to output addresses.
5768 this->initialize_input_to_output_maps();
5770 const Relobj::Output_sections& out_sections(this->output_sections());
5772 Relocate_info<32, big_endian> relinfo;
5773 relinfo.symtab = symtab;
5774 relinfo.layout = layout;
5775 relinfo.object = this;
5777 // Do relocation stubs scanning.
5778 const unsigned char* p = pshdrs + shdr_size;
5779 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5781 const elfcpp::Shdr<32, big_endian> shdr(p);
5782 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
5785 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
5786 Arm_address output_offset = this->get_output_section_offset(index);
5787 Arm_address output_address;
5788 if(output_offset != invalid_address)
5789 output_address = out_sections[index]->address() + output_offset;
5792 // Currently this only happens for a relaxed section.
5793 const Output_relaxed_input_section* poris =
5794 out_sections[index]->find_relaxed_input_section(this, index);
5795 gold_assert(poris != NULL);
5796 output_address = poris->address();
5799 // Get the relocations.
5800 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
5804 // Get the section contents. This does work for the case in which
5805 // we modify the contents of an input section. We need to pass the
5806 // output view under such circumstances.
5807 section_size_type input_view_size = 0;
5808 const unsigned char* input_view =
5809 this->section_contents(index, &input_view_size, false);
5811 relinfo.reloc_shndx = i;
5812 relinfo.data_shndx = index;
5813 unsigned int sh_type = shdr.get_sh_type();
5814 unsigned int reloc_size;
5815 if (sh_type == elfcpp::SHT_REL)
5816 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
5818 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
5820 Output_section* os = out_sections[index];
5821 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
5822 shdr.get_sh_size() / reloc_size,
5824 output_offset == invalid_address,
5825 input_view, output_address,
5830 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
5831 // after its relocation section, if there is one, is processed for
5832 // relocation stubs. Merging this loop with the one above would have been
5833 // complicated since we would have had to make sure that relocation stub
5834 // scanning is done first.
5835 if (arm_target->fix_cortex_a8())
5837 const unsigned char* p = pshdrs + shdr_size;
5838 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
5840 const elfcpp::Shdr<32, big_endian> shdr(p);
5841 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
5844 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
5849 // After we've done the relocations, we release the hash tables,
5850 // since we no longer need them.
5851 this->free_input_to_output_maps();
5854 // Count the local symbols. The ARM backend needs to know if a symbol
5855 // is a THUMB function or not. For global symbols, it is easy because
5856 // the Symbol object keeps the ELF symbol type. For local symbol it is
5857 // harder because we cannot access this information. So we override the
5858 // do_count_local_symbol in parent and scan local symbols to mark
5859 // THUMB functions. This is not the most efficient way but I do not want to
5860 // slow down other ports by calling a per symbol targer hook inside
5861 // Sized_relobj<size, big_endian>::do_count_local_symbols.
5863 template<bool big_endian>
5865 Arm_relobj<big_endian>::do_count_local_symbols(
5866 Stringpool_template<char>* pool,
5867 Stringpool_template<char>* dynpool)
5869 // We need to fix-up the values of any local symbols whose type are
5872 // Ask parent to count the local symbols.
5873 Sized_relobj<32, big_endian>::do_count_local_symbols(pool, dynpool);
5874 const unsigned int loccount = this->local_symbol_count();
5878 // Intialize the thumb function bit-vector.
5879 std::vector<bool> empty_vector(loccount, false);
5880 this->local_symbol_is_thumb_function_.swap(empty_vector);
5882 // Read the symbol table section header.
5883 const unsigned int symtab_shndx = this->symtab_shndx();
5884 elfcpp::Shdr<32, big_endian>
5885 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
5886 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
5888 // Read the local symbols.
5889 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
5890 gold_assert(loccount == symtabshdr.get_sh_info());
5891 off_t locsize = loccount * sym_size;
5892 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
5893 locsize, true, true);
5895 // For mapping symbol processing, we need to read the symbol names.
5896 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
5897 if (strtab_shndx >= this->shnum())
5899 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
5903 elfcpp::Shdr<32, big_endian>
5904 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
5905 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
5907 this->error(_("symbol table name section has wrong type: %u"),
5908 static_cast<unsigned int>(strtabshdr.get_sh_type()));
5911 const char* pnames =
5912 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
5913 strtabshdr.get_sh_size(),
5916 // Loop over the local symbols and mark any local symbols pointing
5917 // to THUMB functions.
5919 // Skip the first dummy symbol.
5921 typename Sized_relobj<32, big_endian>::Local_values* plocal_values =
5922 this->local_values();
5923 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
5925 elfcpp::Sym<32, big_endian> sym(psyms);
5926 elfcpp::STT st_type = sym.get_st_type();
5927 Symbol_value<32>& lv((*plocal_values)[i]);
5928 Arm_address input_value = lv.input_value();
5930 // Check to see if this is a mapping symbol.
5931 const char* sym_name = pnames + sym.get_st_name();
5932 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
5934 unsigned int input_shndx = sym.get_st_shndx();
5936 // Strip of LSB in case this is a THUMB symbol.
5937 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
5938 this->mapping_symbols_info_[msp] = sym_name[1];
5941 if (st_type == elfcpp::STT_ARM_TFUNC
5942 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
5944 // This is a THUMB function. Mark this and canonicalize the
5945 // symbol value by setting LSB.
5946 this->local_symbol_is_thumb_function_[i] = true;
5947 if ((input_value & 1) == 0)
5948 lv.set_input_value(input_value | 1);
5953 // Relocate sections.
5954 template<bool big_endian>
5956 Arm_relobj<big_endian>::do_relocate_sections(
5957 const Symbol_table* symtab,
5958 const Layout* layout,
5959 const unsigned char* pshdrs,
5960 typename Sized_relobj<32, big_endian>::Views* pviews)
5962 // Call parent to relocate sections.
5963 Sized_relobj<32, big_endian>::do_relocate_sections(symtab, layout, pshdrs,
5966 // We do not generate stubs if doing a relocatable link.
5967 if (parameters->options().relocatable())
5970 // Relocate stub tables.
5971 unsigned int shnum = this->shnum();
5973 Target_arm<big_endian>* arm_target =
5974 Target_arm<big_endian>::default_target();
5976 Relocate_info<32, big_endian> relinfo;
5977 relinfo.symtab = symtab;
5978 relinfo.layout = layout;
5979 relinfo.object = this;
5981 for (unsigned int i = 1; i < shnum; ++i)
5983 Arm_input_section<big_endian>* arm_input_section =
5984 arm_target->find_arm_input_section(this, i);
5986 if (arm_input_section != NULL
5987 && arm_input_section->is_stub_table_owner()
5988 && !arm_input_section->stub_table()->empty())
5990 // We cannot discard a section if it owns a stub table.
5991 Output_section* os = this->output_section(i);
5992 gold_assert(os != NULL);
5994 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
5995 relinfo.reloc_shdr = NULL;
5996 relinfo.data_shndx = i;
5997 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
5999 gold_assert((*pviews)[i].view != NULL);
6001 // We are passed the output section view. Adjust it to cover the
6003 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6004 gold_assert((stub_table->address() >= (*pviews)[i].address)
6005 && ((stub_table->address() + stub_table->data_size())
6006 <= (*pviews)[i].address + (*pviews)[i].view_size));
6008 off_t offset = stub_table->address() - (*pviews)[i].address;
6009 unsigned char* view = (*pviews)[i].view + offset;
6010 Arm_address address = stub_table->address();
6011 section_size_type view_size = stub_table->data_size();
6013 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6017 // Apply Cortex A8 workaround if applicable.
6018 if (this->section_has_cortex_a8_workaround(i))
6020 unsigned char* view = (*pviews)[i].view;
6021 Arm_address view_address = (*pviews)[i].address;
6022 section_size_type view_size = (*pviews)[i].view_size;
6023 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6025 // Adjust view to cover section.
6026 Output_section* os = this->output_section(i);
6027 gold_assert(os != NULL);
6028 Arm_address section_address = os->output_address(this, i, 0);
6029 uint64_t section_size = this->section_size(i);
6031 gold_assert(section_address >= view_address
6032 && ((section_address + section_size)
6033 <= (view_address + view_size)));
6035 unsigned char* section_view = view + (section_address - view_address);
6037 // Apply the Cortex-A8 workaround to the output address range
6038 // corresponding to this input section.
6039 stub_table->apply_cortex_a8_workaround_to_address_range(
6048 // Create a new EXIDX input section object for EXIDX section SHNDX with
6051 template<bool big_endian>
6053 Arm_relobj<big_endian>::make_exidx_input_section(
6055 const elfcpp::Shdr<32, big_endian>& shdr)
6057 // Link .text section to its .ARM.exidx section in the same object.
6058 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6060 // Issue an error and ignore this EXIDX section if it does not point
6061 // to any text section.
6062 if (text_shndx == elfcpp::SHN_UNDEF)
6064 gold_error(_("EXIDX section %u in %s has no linked text section"),
6065 shndx, this->name().c_str());
6069 // Issue an error and ignore this EXIDX section if it points to a text
6070 // section already has an EXIDX section.
6071 if (this->exidx_section_map_[text_shndx] != NULL)
6073 gold_error(_("EXIDX sections %u and %u both link to text section %u "
6075 shndx, this->exidx_section_map_[text_shndx]->shndx(),
6076 text_shndx, this->name().c_str());
6080 // Create an Arm_exidx_input_section object for this EXIDX section.
6081 Arm_exidx_input_section* exidx_input_section =
6082 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6083 shdr.get_sh_addralign());
6084 this->exidx_section_map_[text_shndx] = exidx_input_section;
6086 // Also map the EXIDX section index to this.
6087 gold_assert(this->exidx_section_map_[shndx] == NULL);
6088 this->exidx_section_map_[shndx] = exidx_input_section;
6091 // Read the symbol information.
6093 template<bool big_endian>
6095 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6097 // Call parent class to read symbol information.
6098 Sized_relobj<32, big_endian>::do_read_symbols(sd);
6100 // Read processor-specific flags in ELF file header.
6101 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6102 elfcpp::Elf_sizes<32>::ehdr_size,
6104 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6105 this->processor_specific_flags_ = ehdr.get_e_flags();
6107 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6109 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6110 const unsigned char *ps =
6111 sd->section_headers->data() + shdr_size;
6112 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6114 elfcpp::Shdr<32, big_endian> shdr(ps);
6115 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6117 gold_assert(this->attributes_section_data_ == NULL);
6118 section_offset_type section_offset = shdr.get_sh_offset();
6119 section_size_type section_size =
6120 convert_to_section_size_type(shdr.get_sh_size());
6121 File_view* view = this->get_lasting_view(section_offset,
6122 section_size, true, false);
6123 this->attributes_section_data_ =
6124 new Attributes_section_data(view->data(), section_size);
6126 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6127 this->make_exidx_input_section(i, shdr);
6131 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6132 // sections for unwinding. These sections are referenced implicitly by
6133 // text sections linked in the section headers. If we ignore these implict
6134 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6135 // will be garbage-collected incorrectly. Hence we override the same function
6136 // in the base class to handle these implicit references.
6138 template<bool big_endian>
6140 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6142 Read_relocs_data* rd)
6144 // First, call base class method to process relocations in this object.
6145 Sized_relobj<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6147 unsigned int shnum = this->shnum();
6148 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6149 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6153 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6154 // to these from the linked text sections.
6155 const unsigned char* ps = pshdrs + shdr_size;
6156 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6158 elfcpp::Shdr<32, big_endian> shdr(ps);
6159 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6161 // Found an .ARM.exidx section, add it to the set of reachable
6162 // sections from its linked text section.
6163 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6164 symtab->gc()->add_reference(this, text_shndx, this, i);
6169 // Update output local symbol count. Owing to EXIDX entry merging, some local
6170 // symbols will be removed in output. Adjust output local symbol count
6171 // accordingly. We can only changed the static output local symbol count. It
6172 // is too late to change the dynamic symbols.
6174 template<bool big_endian>
6176 Arm_relobj<big_endian>::update_output_local_symbol_count()
6178 // Caller should check that this needs updating. We want caller checking
6179 // because output_local_symbol_count_needs_update() is most likely inlined.
6180 gold_assert(this->output_local_symbol_count_needs_update_);
6182 gold_assert(this->symtab_shndx() != -1U);
6183 if (this->symtab_shndx() == 0)
6185 // This object has no symbols. Weird but legal.
6189 // Read the symbol table section header.
6190 const unsigned int symtab_shndx = this->symtab_shndx();
6191 elfcpp::Shdr<32, big_endian>
6192 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6193 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6195 // Read the local symbols.
6196 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6197 const unsigned int loccount = this->local_symbol_count();
6198 gold_assert(loccount == symtabshdr.get_sh_info());
6199 off_t locsize = loccount * sym_size;
6200 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6201 locsize, true, true);
6203 // Loop over the local symbols.
6205 typedef typename Sized_relobj<32, big_endian>::Output_sections
6207 const Output_sections& out_sections(this->output_sections());
6208 unsigned int shnum = this->shnum();
6209 unsigned int count = 0;
6210 // Skip the first, dummy, symbol.
6212 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6214 elfcpp::Sym<32, big_endian> sym(psyms);
6216 Symbol_value<32>& lv((*this->local_values())[i]);
6218 // This local symbol was already discarded by do_count_local_symbols.
6219 if (!lv.needs_output_symtab_entry())
6223 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
6228 Output_section* os = out_sections[shndx];
6230 // This local symbol no longer has an output section. Discard it.
6233 lv.set_no_output_symtab_entry();
6237 // Currently we only discard parts of EXIDX input sections.
6238 // We explicitly check for a merged EXIDX input section to avoid
6239 // calling Output_section_data::output_offset unless necessary.
6240 if ((this->get_output_section_offset(shndx) == invalid_address)
6241 && (this->exidx_input_section_by_shndx(shndx) != NULL))
6243 section_offset_type output_offset =
6244 os->output_offset(this, shndx, lv.input_value());
6245 if (output_offset == -1)
6247 // This symbol is defined in a part of an EXIDX input section
6248 // that is discarded due to entry merging.
6249 lv.set_no_output_symtab_entry();
6258 this->set_output_local_symbol_count(count);
6259 this->output_local_symbol_count_needs_update_ = false;
6262 // Arm_dynobj methods.
6264 // Read the symbol information.
6266 template<bool big_endian>
6268 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6270 // Call parent class to read symbol information.
6271 Sized_dynobj<32, big_endian>::do_read_symbols(sd);
6273 // Read processor-specific flags in ELF file header.
6274 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6275 elfcpp::Elf_sizes<32>::ehdr_size,
6277 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6278 this->processor_specific_flags_ = ehdr.get_e_flags();
6280 // Read the attributes section if there is one.
6281 // We read from the end because gas seems to put it near the end of
6282 // the section headers.
6283 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6284 const unsigned char *ps =
6285 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
6286 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
6288 elfcpp::Shdr<32, big_endian> shdr(ps);
6289 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6291 section_offset_type section_offset = shdr.get_sh_offset();
6292 section_size_type section_size =
6293 convert_to_section_size_type(shdr.get_sh_size());
6294 File_view* view = this->get_lasting_view(section_offset,
6295 section_size, true, false);
6296 this->attributes_section_data_ =
6297 new Attributes_section_data(view->data(), section_size);
6303 // Stub_addend_reader methods.
6305 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6307 template<bool big_endian>
6308 elfcpp::Elf_types<32>::Elf_Swxword
6309 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
6310 unsigned int r_type,
6311 const unsigned char* view,
6312 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
6314 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
6318 case elfcpp::R_ARM_CALL:
6319 case elfcpp::R_ARM_JUMP24:
6320 case elfcpp::R_ARM_PLT32:
6322 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
6323 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6324 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
6325 return utils::sign_extend<26>(val << 2);
6328 case elfcpp::R_ARM_THM_CALL:
6329 case elfcpp::R_ARM_THM_JUMP24:
6330 case elfcpp::R_ARM_THM_XPC22:
6332 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6333 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6334 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6335 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6336 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
6339 case elfcpp::R_ARM_THM_JUMP19:
6341 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
6342 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
6343 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
6344 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
6345 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
6353 // A class to handle the PLT data.
6355 template<bool big_endian>
6356 class Output_data_plt_arm : public Output_section_data
6359 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
6362 Output_data_plt_arm(Layout*, Output_data_space*);
6364 // Add an entry to the PLT.
6366 add_entry(Symbol* gsym);
6368 // Return the .rel.plt section data.
6369 const Reloc_section*
6371 { return this->rel_; }
6375 do_adjust_output_section(Output_section* os);
6377 // Write to a map file.
6379 do_print_to_mapfile(Mapfile* mapfile) const
6380 { mapfile->print_output_data(this, _("** PLT")); }
6383 // Template for the first PLT entry.
6384 static const uint32_t first_plt_entry[5];
6386 // Template for subsequent PLT entries.
6387 static const uint32_t plt_entry[3];
6389 // Set the final size.
6391 set_final_data_size()
6393 this->set_data_size(sizeof(first_plt_entry)
6394 + this->count_ * sizeof(plt_entry));
6397 // Write out the PLT data.
6399 do_write(Output_file*);
6401 // The reloc section.
6402 Reloc_section* rel_;
6403 // The .got.plt section.
6404 Output_data_space* got_plt_;
6405 // The number of PLT entries.
6406 unsigned int count_;
6409 // Create the PLT section. The ordinary .got section is an argument,
6410 // since we need to refer to the start. We also create our own .got
6411 // section just for PLT entries.
6413 template<bool big_endian>
6414 Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout,
6415 Output_data_space* got_plt)
6416 : Output_section_data(4), got_plt_(got_plt), count_(0)
6418 this->rel_ = new Reloc_section(false);
6419 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
6420 elfcpp::SHF_ALLOC, this->rel_, true, false,
6424 template<bool big_endian>
6426 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
6431 // Add an entry to the PLT.
6433 template<bool big_endian>
6435 Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym)
6437 gold_assert(!gsym->has_plt_offset());
6439 // Note that when setting the PLT offset we skip the initial
6440 // reserved PLT entry.
6441 gsym->set_plt_offset((this->count_) * sizeof(plt_entry)
6442 + sizeof(first_plt_entry));
6446 section_offset_type got_offset = this->got_plt_->current_data_size();
6448 // Every PLT entry needs a GOT entry which points back to the PLT
6449 // entry (this will be changed by the dynamic linker, normally
6450 // lazily when the function is called).
6451 this->got_plt_->set_current_data_size(got_offset + 4);
6453 // Every PLT entry needs a reloc.
6454 gsym->set_needs_dynsym_entry();
6455 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
6458 // Note that we don't need to save the symbol. The contents of the
6459 // PLT are independent of which symbols are used. The symbols only
6460 // appear in the relocations.
6464 // FIXME: This is not very flexible. Right now this has only been tested
6465 // on armv5te. If we are to support additional architecture features like
6466 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
6468 // The first entry in the PLT.
6469 template<bool big_endian>
6470 const uint32_t Output_data_plt_arm<big_endian>::first_plt_entry[5] =
6472 0xe52de004, // str lr, [sp, #-4]!
6473 0xe59fe004, // ldr lr, [pc, #4]
6474 0xe08fe00e, // add lr, pc, lr
6475 0xe5bef008, // ldr pc, [lr, #8]!
6476 0x00000000, // &GOT[0] - .
6479 // Subsequent entries in the PLT.
6481 template<bool big_endian>
6482 const uint32_t Output_data_plt_arm<big_endian>::plt_entry[3] =
6484 0xe28fc600, // add ip, pc, #0xNN00000
6485 0xe28cca00, // add ip, ip, #0xNN000
6486 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
6489 // Write out the PLT. This uses the hand-coded instructions above,
6490 // and adjusts them as needed. This is all specified by the arm ELF
6491 // Processor Supplement.
6493 template<bool big_endian>
6495 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
6497 const off_t offset = this->offset();
6498 const section_size_type oview_size =
6499 convert_to_section_size_type(this->data_size());
6500 unsigned char* const oview = of->get_output_view(offset, oview_size);
6502 const off_t got_file_offset = this->got_plt_->offset();
6503 const section_size_type got_size =
6504 convert_to_section_size_type(this->got_plt_->data_size());
6505 unsigned char* const got_view = of->get_output_view(got_file_offset,
6507 unsigned char* pov = oview;
6509 Arm_address plt_address = this->address();
6510 Arm_address got_address = this->got_plt_->address();
6512 // Write first PLT entry. All but the last word are constants.
6513 const size_t num_first_plt_words = (sizeof(first_plt_entry)
6514 / sizeof(plt_entry[0]));
6515 for (size_t i = 0; i < num_first_plt_words - 1; i++)
6516 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
6517 // Last word in first PLT entry is &GOT[0] - .
6518 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
6519 got_address - (plt_address + 16));
6520 pov += sizeof(first_plt_entry);
6522 unsigned char* got_pov = got_view;
6524 memset(got_pov, 0, 12);
6527 const int rel_size = elfcpp::Elf_sizes<32>::rel_size;
6528 unsigned int plt_offset = sizeof(first_plt_entry);
6529 unsigned int plt_rel_offset = 0;
6530 unsigned int got_offset = 12;
6531 const unsigned int count = this->count_;
6532 for (unsigned int i = 0;
6535 pov += sizeof(plt_entry),
6537 plt_offset += sizeof(plt_entry),
6538 plt_rel_offset += rel_size,
6541 // Set and adjust the PLT entry itself.
6542 int32_t offset = ((got_address + got_offset)
6543 - (plt_address + plt_offset + 8));
6545 gold_assert(offset >= 0 && offset < 0x0fffffff);
6546 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
6547 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
6548 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
6549 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
6550 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
6551 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
6553 // Set the entry in the GOT.
6554 elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address);
6557 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
6558 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
6560 of->write_output_view(offset, oview_size, oview);
6561 of->write_output_view(got_file_offset, got_size, got_view);
6564 // Create a PLT entry for a global symbol.
6566 template<bool big_endian>
6568 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
6571 if (gsym->has_plt_offset())
6574 if (this->plt_ == NULL)
6576 // Create the GOT sections first.
6577 this->got_section(symtab, layout);
6579 this->plt_ = new Output_data_plt_arm<big_endian>(layout, this->got_plt_);
6580 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
6582 | elfcpp::SHF_EXECINSTR),
6583 this->plt_, false, false, false, false);
6585 this->plt_->add_entry(gsym);
6588 // Report an unsupported relocation against a local symbol.
6590 template<bool big_endian>
6592 Target_arm<big_endian>::Scan::unsupported_reloc_local(
6593 Sized_relobj<32, big_endian>* object,
6594 unsigned int r_type)
6596 gold_error(_("%s: unsupported reloc %u against local symbol"),
6597 object->name().c_str(), r_type);
6600 // We are about to emit a dynamic relocation of type R_TYPE. If the
6601 // dynamic linker does not support it, issue an error. The GNU linker
6602 // only issues a non-PIC error for an allocated read-only section.
6603 // Here we know the section is allocated, but we don't know that it is
6604 // read-only. But we check for all the relocation types which the
6605 // glibc dynamic linker supports, so it seems appropriate to issue an
6606 // error even if the section is not read-only.
6608 template<bool big_endian>
6610 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
6611 unsigned int r_type)
6615 // These are the relocation types supported by glibc for ARM.
6616 case elfcpp::R_ARM_RELATIVE:
6617 case elfcpp::R_ARM_COPY:
6618 case elfcpp::R_ARM_GLOB_DAT:
6619 case elfcpp::R_ARM_JUMP_SLOT:
6620 case elfcpp::R_ARM_ABS32:
6621 case elfcpp::R_ARM_ABS32_NOI:
6622 case elfcpp::R_ARM_PC24:
6623 // FIXME: The following 3 types are not supported by Android's dynamic
6625 case elfcpp::R_ARM_TLS_DTPMOD32:
6626 case elfcpp::R_ARM_TLS_DTPOFF32:
6627 case elfcpp::R_ARM_TLS_TPOFF32:
6631 // This prevents us from issuing more than one error per reloc
6632 // section. But we can still wind up issuing more than one
6633 // error per object file.
6634 if (this->issued_non_pic_error_)
6636 object->error(_("requires unsupported dynamic reloc; "
6637 "recompile with -fPIC"));
6638 this->issued_non_pic_error_ = true;
6641 case elfcpp::R_ARM_NONE:
6646 // Scan a relocation for a local symbol.
6647 // FIXME: This only handles a subset of relocation types used by Android
6648 // on ARM v5te devices.
6650 template<bool big_endian>
6652 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
6655 Sized_relobj<32, big_endian>* object,
6656 unsigned int data_shndx,
6657 Output_section* output_section,
6658 const elfcpp::Rel<32, big_endian>& reloc,
6659 unsigned int r_type,
6660 const elfcpp::Sym<32, big_endian>&)
6662 r_type = get_real_reloc_type(r_type);
6665 case elfcpp::R_ARM_NONE:
6668 case elfcpp::R_ARM_ABS32:
6669 case elfcpp::R_ARM_ABS32_NOI:
6670 // If building a shared library (or a position-independent
6671 // executable), we need to create a dynamic relocation for
6672 // this location. The relocation applied at link time will
6673 // apply the link-time value, so we flag the location with
6674 // an R_ARM_RELATIVE relocation so the dynamic loader can
6675 // relocate it easily.
6676 if (parameters->options().output_is_position_independent())
6678 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6679 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6680 // If we are to add more other reloc types than R_ARM_ABS32,
6681 // we need to add check_non_pic(object, r_type) here.
6682 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
6683 output_section, data_shndx,
6684 reloc.get_r_offset());
6688 case elfcpp::R_ARM_REL32:
6689 case elfcpp::R_ARM_THM_CALL:
6690 case elfcpp::R_ARM_CALL:
6691 case elfcpp::R_ARM_PREL31:
6692 case elfcpp::R_ARM_JUMP24:
6693 case elfcpp::R_ARM_THM_JUMP24:
6694 case elfcpp::R_ARM_THM_JUMP19:
6695 case elfcpp::R_ARM_PLT32:
6696 case elfcpp::R_ARM_THM_ABS5:
6697 case elfcpp::R_ARM_ABS8:
6698 case elfcpp::R_ARM_ABS12:
6699 case elfcpp::R_ARM_ABS16:
6700 case elfcpp::R_ARM_BASE_ABS:
6701 case elfcpp::R_ARM_MOVW_ABS_NC:
6702 case elfcpp::R_ARM_MOVT_ABS:
6703 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6704 case elfcpp::R_ARM_THM_MOVT_ABS:
6705 case elfcpp::R_ARM_MOVW_PREL_NC:
6706 case elfcpp::R_ARM_MOVT_PREL:
6707 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
6708 case elfcpp::R_ARM_THM_MOVT_PREL:
6709 case elfcpp::R_ARM_MOVW_BREL_NC:
6710 case elfcpp::R_ARM_MOVT_BREL:
6711 case elfcpp::R_ARM_MOVW_BREL:
6712 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
6713 case elfcpp::R_ARM_THM_MOVT_BREL:
6714 case elfcpp::R_ARM_THM_MOVW_BREL:
6715 case elfcpp::R_ARM_THM_JUMP6:
6716 case elfcpp::R_ARM_THM_JUMP8:
6717 case elfcpp::R_ARM_THM_JUMP11:
6718 case elfcpp::R_ARM_V4BX:
6719 case elfcpp::R_ARM_THM_PC8:
6720 case elfcpp::R_ARM_THM_PC12:
6721 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
6722 case elfcpp::R_ARM_ALU_PC_G0_NC:
6723 case elfcpp::R_ARM_ALU_PC_G0:
6724 case elfcpp::R_ARM_ALU_PC_G1_NC:
6725 case elfcpp::R_ARM_ALU_PC_G1:
6726 case elfcpp::R_ARM_ALU_PC_G2:
6727 case elfcpp::R_ARM_ALU_SB_G0_NC:
6728 case elfcpp::R_ARM_ALU_SB_G0:
6729 case elfcpp::R_ARM_ALU_SB_G1_NC:
6730 case elfcpp::R_ARM_ALU_SB_G1:
6731 case elfcpp::R_ARM_ALU_SB_G2:
6732 case elfcpp::R_ARM_LDR_PC_G0:
6733 case elfcpp::R_ARM_LDR_PC_G1:
6734 case elfcpp::R_ARM_LDR_PC_G2:
6735 case elfcpp::R_ARM_LDR_SB_G0:
6736 case elfcpp::R_ARM_LDR_SB_G1:
6737 case elfcpp::R_ARM_LDR_SB_G2:
6738 case elfcpp::R_ARM_LDRS_PC_G0:
6739 case elfcpp::R_ARM_LDRS_PC_G1:
6740 case elfcpp::R_ARM_LDRS_PC_G2:
6741 case elfcpp::R_ARM_LDRS_SB_G0:
6742 case elfcpp::R_ARM_LDRS_SB_G1:
6743 case elfcpp::R_ARM_LDRS_SB_G2:
6744 case elfcpp::R_ARM_LDC_PC_G0:
6745 case elfcpp::R_ARM_LDC_PC_G1:
6746 case elfcpp::R_ARM_LDC_PC_G2:
6747 case elfcpp::R_ARM_LDC_SB_G0:
6748 case elfcpp::R_ARM_LDC_SB_G1:
6749 case elfcpp::R_ARM_LDC_SB_G2:
6752 case elfcpp::R_ARM_GOTOFF32:
6753 // We need a GOT section:
6754 target->got_section(symtab, layout);
6757 case elfcpp::R_ARM_BASE_PREL:
6758 // FIXME: What about this?
6761 case elfcpp::R_ARM_GOT_BREL:
6762 case elfcpp::R_ARM_GOT_PREL:
6764 // The symbol requires a GOT entry.
6765 Output_data_got<32, big_endian>* got =
6766 target->got_section(symtab, layout);
6767 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6768 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
6770 // If we are generating a shared object, we need to add a
6771 // dynamic RELATIVE relocation for this symbol's GOT entry.
6772 if (parameters->options().output_is_position_independent())
6774 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6775 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
6776 rel_dyn->add_local_relative(
6777 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
6778 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
6784 case elfcpp::R_ARM_TARGET1:
6785 // This should have been mapped to another type already.
6787 case elfcpp::R_ARM_COPY:
6788 case elfcpp::R_ARM_GLOB_DAT:
6789 case elfcpp::R_ARM_JUMP_SLOT:
6790 case elfcpp::R_ARM_RELATIVE:
6791 // These are relocations which should only be seen by the
6792 // dynamic linker, and should never be seen here.
6793 gold_error(_("%s: unexpected reloc %u in object file"),
6794 object->name().c_str(), r_type);
6798 unsupported_reloc_local(object, r_type);
6803 // Report an unsupported relocation against a global symbol.
6805 template<bool big_endian>
6807 Target_arm<big_endian>::Scan::unsupported_reloc_global(
6808 Sized_relobj<32, big_endian>* object,
6809 unsigned int r_type,
6812 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
6813 object->name().c_str(), r_type, gsym->demangled_name().c_str());
6816 // Scan a relocation for a global symbol.
6817 // FIXME: This only handles a subset of relocation types used by Android
6818 // on ARM v5te devices.
6820 template<bool big_endian>
6822 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
6825 Sized_relobj<32, big_endian>* object,
6826 unsigned int data_shndx,
6827 Output_section* output_section,
6828 const elfcpp::Rel<32, big_endian>& reloc,
6829 unsigned int r_type,
6832 r_type = get_real_reloc_type(r_type);
6835 case elfcpp::R_ARM_NONE:
6838 case elfcpp::R_ARM_ABS32:
6839 case elfcpp::R_ARM_ABS32_NOI:
6841 // Make a dynamic relocation if necessary.
6842 if (gsym->needs_dynamic_reloc(Symbol::ABSOLUTE_REF))
6844 if (target->may_need_copy_reloc(gsym))
6846 target->copy_reloc(symtab, layout, object,
6847 data_shndx, output_section, gsym, reloc);
6849 else if (gsym->can_use_relative_reloc(false))
6851 // If we are to add more other reloc types than R_ARM_ABS32,
6852 // we need to add check_non_pic(object, r_type) here.
6853 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6854 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
6855 output_section, object,
6856 data_shndx, reloc.get_r_offset());
6860 // If we are to add more other reloc types than R_ARM_ABS32,
6861 // we need to add check_non_pic(object, r_type) here.
6862 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6863 rel_dyn->add_global(gsym, r_type, output_section, object,
6864 data_shndx, reloc.get_r_offset());
6870 case elfcpp::R_ARM_MOVW_ABS_NC:
6871 case elfcpp::R_ARM_MOVT_ABS:
6872 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
6873 case elfcpp::R_ARM_THM_MOVT_ABS:
6874 case elfcpp::R_ARM_MOVW_PREL_NC:
6875 case elfcpp::R_ARM_MOVT_PREL:
6876 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
6877 case elfcpp::R_ARM_THM_MOVT_PREL:
6878 case elfcpp::R_ARM_MOVW_BREL_NC:
6879 case elfcpp::R_ARM_MOVT_BREL:
6880 case elfcpp::R_ARM_MOVW_BREL:
6881 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
6882 case elfcpp::R_ARM_THM_MOVT_BREL:
6883 case elfcpp::R_ARM_THM_MOVW_BREL:
6884 case elfcpp::R_ARM_THM_JUMP6:
6885 case elfcpp::R_ARM_THM_JUMP8:
6886 case elfcpp::R_ARM_THM_JUMP11:
6887 case elfcpp::R_ARM_V4BX:
6888 case elfcpp::R_ARM_THM_PC8:
6889 case elfcpp::R_ARM_THM_PC12:
6890 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
6891 case elfcpp::R_ARM_ALU_PC_G0_NC:
6892 case elfcpp::R_ARM_ALU_PC_G0:
6893 case elfcpp::R_ARM_ALU_PC_G1_NC:
6894 case elfcpp::R_ARM_ALU_PC_G1:
6895 case elfcpp::R_ARM_ALU_PC_G2:
6896 case elfcpp::R_ARM_ALU_SB_G0_NC:
6897 case elfcpp::R_ARM_ALU_SB_G0:
6898 case elfcpp::R_ARM_ALU_SB_G1_NC:
6899 case elfcpp::R_ARM_ALU_SB_G1:
6900 case elfcpp::R_ARM_ALU_SB_G2:
6901 case elfcpp::R_ARM_LDR_PC_G0:
6902 case elfcpp::R_ARM_LDR_PC_G1:
6903 case elfcpp::R_ARM_LDR_PC_G2:
6904 case elfcpp::R_ARM_LDR_SB_G0:
6905 case elfcpp::R_ARM_LDR_SB_G1:
6906 case elfcpp::R_ARM_LDR_SB_G2:
6907 case elfcpp::R_ARM_LDRS_PC_G0:
6908 case elfcpp::R_ARM_LDRS_PC_G1:
6909 case elfcpp::R_ARM_LDRS_PC_G2:
6910 case elfcpp::R_ARM_LDRS_SB_G0:
6911 case elfcpp::R_ARM_LDRS_SB_G1:
6912 case elfcpp::R_ARM_LDRS_SB_G2:
6913 case elfcpp::R_ARM_LDC_PC_G0:
6914 case elfcpp::R_ARM_LDC_PC_G1:
6915 case elfcpp::R_ARM_LDC_PC_G2:
6916 case elfcpp::R_ARM_LDC_SB_G0:
6917 case elfcpp::R_ARM_LDC_SB_G1:
6918 case elfcpp::R_ARM_LDC_SB_G2:
6921 case elfcpp::R_ARM_THM_ABS5:
6922 case elfcpp::R_ARM_ABS8:
6923 case elfcpp::R_ARM_ABS12:
6924 case elfcpp::R_ARM_ABS16:
6925 case elfcpp::R_ARM_BASE_ABS:
6927 // No dynamic relocs of this kinds.
6928 // Report the error in case of PIC.
6929 int flags = Symbol::NON_PIC_REF;
6930 if (gsym->type() == elfcpp::STT_FUNC
6931 || gsym->type() == elfcpp::STT_ARM_TFUNC)
6932 flags |= Symbol::FUNCTION_CALL;
6933 if (gsym->needs_dynamic_reloc(flags))
6934 check_non_pic(object, r_type);
6938 case elfcpp::R_ARM_REL32:
6940 // Make a dynamic relocation if necessary.
6941 int flags = Symbol::NON_PIC_REF;
6942 if (gsym->needs_dynamic_reloc(flags))
6944 if (target->may_need_copy_reloc(gsym))
6946 target->copy_reloc(symtab, layout, object,
6947 data_shndx, output_section, gsym, reloc);
6951 check_non_pic(object, r_type);
6952 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
6953 rel_dyn->add_global(gsym, r_type, output_section, object,
6954 data_shndx, reloc.get_r_offset());
6960 case elfcpp::R_ARM_JUMP24:
6961 case elfcpp::R_ARM_THM_JUMP24:
6962 case elfcpp::R_ARM_THM_JUMP19:
6963 case elfcpp::R_ARM_CALL:
6964 case elfcpp::R_ARM_THM_CALL:
6965 case elfcpp::R_ARM_PLT32:
6966 case elfcpp::R_ARM_PREL31:
6967 case elfcpp::R_ARM_PC24:
6968 // If the symbol is fully resolved, this is just a relative
6969 // local reloc. Otherwise we need a PLT entry.
6970 if (gsym->final_value_is_known())
6972 // If building a shared library, we can also skip the PLT entry
6973 // if the symbol is defined in the output file and is protected
6975 if (gsym->is_defined()
6976 && !gsym->is_from_dynobj()
6977 && !gsym->is_preemptible())
6979 target->make_plt_entry(symtab, layout, gsym);
6982 case elfcpp::R_ARM_GOTOFF32:
6983 // We need a GOT section.
6984 target->got_section(symtab, layout);
6987 case elfcpp::R_ARM_BASE_PREL:
6988 // FIXME: What about this?
6991 case elfcpp::R_ARM_GOT_BREL:
6992 case elfcpp::R_ARM_GOT_PREL:
6994 // The symbol requires a GOT entry.
6995 Output_data_got<32, big_endian>* got =
6996 target->got_section(symtab, layout);
6997 if (gsym->final_value_is_known())
6998 got->add_global(gsym, GOT_TYPE_STANDARD);
7001 // If this symbol is not fully resolved, we need to add a
7002 // GOT entry with a dynamic relocation.
7003 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7004 if (gsym->is_from_dynobj()
7005 || gsym->is_undefined()
7006 || gsym->is_preemptible())
7007 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
7008 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
7011 if (got->add_global(gsym, GOT_TYPE_STANDARD))
7012 rel_dyn->add_global_relative(
7013 gsym, elfcpp::R_ARM_RELATIVE, got,
7014 gsym->got_offset(GOT_TYPE_STANDARD));
7020 case elfcpp::R_ARM_TARGET1:
7021 // This should have been mapped to another type already.
7023 case elfcpp::R_ARM_COPY:
7024 case elfcpp::R_ARM_GLOB_DAT:
7025 case elfcpp::R_ARM_JUMP_SLOT:
7026 case elfcpp::R_ARM_RELATIVE:
7027 // These are relocations which should only be seen by the
7028 // dynamic linker, and should never be seen here.
7029 gold_error(_("%s: unexpected reloc %u in object file"),
7030 object->name().c_str(), r_type);
7034 unsupported_reloc_global(object, r_type, gsym);
7039 // Process relocations for gc.
7041 template<bool big_endian>
7043 Target_arm<big_endian>::gc_process_relocs(Symbol_table* symtab,
7045 Sized_relobj<32, big_endian>* object,
7046 unsigned int data_shndx,
7048 const unsigned char* prelocs,
7050 Output_section* output_section,
7051 bool needs_special_offset_handling,
7052 size_t local_symbol_count,
7053 const unsigned char* plocal_symbols)
7055 typedef Target_arm<big_endian> Arm;
7056 typedef typename Target_arm<big_endian>::Scan Scan;
7058 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan>(
7067 needs_special_offset_handling,
7072 // Scan relocations for a section.
7074 template<bool big_endian>
7076 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
7078 Sized_relobj<32, big_endian>* object,
7079 unsigned int data_shndx,
7080 unsigned int sh_type,
7081 const unsigned char* prelocs,
7083 Output_section* output_section,
7084 bool needs_special_offset_handling,
7085 size_t local_symbol_count,
7086 const unsigned char* plocal_symbols)
7088 typedef typename Target_arm<big_endian>::Scan Scan;
7089 if (sh_type == elfcpp::SHT_RELA)
7091 gold_error(_("%s: unsupported RELA reloc section"),
7092 object->name().c_str());
7096 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
7105 needs_special_offset_handling,
7110 // Finalize the sections.
7112 template<bool big_endian>
7114 Target_arm<big_endian>::do_finalize_sections(
7116 const Input_objects* input_objects,
7117 Symbol_table* symtab)
7119 // Merge processor-specific flags.
7120 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
7121 p != input_objects->relobj_end();
7124 Arm_relobj<big_endian>* arm_relobj =
7125 Arm_relobj<big_endian>::as_arm_relobj(*p);
7126 this->merge_processor_specific_flags(
7128 arm_relobj->processor_specific_flags());
7129 this->merge_object_attributes(arm_relobj->name().c_str(),
7130 arm_relobj->attributes_section_data());
7134 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
7135 p != input_objects->dynobj_end();
7138 Arm_dynobj<big_endian>* arm_dynobj =
7139 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
7140 this->merge_processor_specific_flags(
7142 arm_dynobj->processor_specific_flags());
7143 this->merge_object_attributes(arm_dynobj->name().c_str(),
7144 arm_dynobj->attributes_section_data());
7148 const Object_attribute* cpu_arch_attr =
7149 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
7150 if (cpu_arch_attr->int_value() > elfcpp::TAG_CPU_ARCH_V4)
7151 this->set_may_use_blx(true);
7153 // Check if we need to use Cortex-A8 workaround.
7154 if (parameters->options().user_set_fix_cortex_a8())
7155 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
7158 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
7159 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
7161 const Object_attribute* cpu_arch_profile_attr =
7162 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
7163 this->fix_cortex_a8_ =
7164 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
7165 && (cpu_arch_profile_attr->int_value() == 'A'
7166 || cpu_arch_profile_attr->int_value() == 0));
7169 // Check if we can use V4BX interworking.
7170 // The V4BX interworking stub contains BX instruction,
7171 // which is not specified for some profiles.
7172 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
7173 && !this->may_use_blx())
7174 gold_error(_("unable to provide V4BX reloc interworking fix up; "
7175 "the target profile does not support BX instruction"));
7177 // Fill in some more dynamic tags.
7178 const Reloc_section* rel_plt = (this->plt_ == NULL
7180 : this->plt_->rel_plt());
7181 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
7182 this->rel_dyn_, true);
7184 // Emit any relocs we saved in an attempt to avoid generating COPY
7186 if (this->copy_relocs_.any_saved_relocs())
7187 this->copy_relocs_.emit(this->rel_dyn_section(layout));
7189 // Handle the .ARM.exidx section.
7190 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
7191 if (exidx_section != NULL
7192 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX
7193 && !parameters->options().relocatable())
7195 // Create __exidx_start and __exdix_end symbols.
7196 symtab->define_in_output_data("__exidx_start", NULL,
7197 Symbol_table::PREDEFINED,
7198 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7199 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7201 symtab->define_in_output_data("__exidx_end", NULL,
7202 Symbol_table::PREDEFINED,
7203 exidx_section, 0, 0, elfcpp::STT_OBJECT,
7204 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
7207 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
7208 // the .ARM.exidx section.
7209 if (!layout->script_options()->saw_phdrs_clause())
7211 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, 0)
7213 Output_segment* exidx_segment =
7214 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
7215 exidx_segment->add_output_section(exidx_section, elfcpp::PF_R,
7220 // Create an .ARM.attributes section if there is not one already.
7221 Output_attributes_section_data* attributes_section =
7222 new Output_attributes_section_data(*this->attributes_section_data_);
7223 layout->add_output_section_data(".ARM.attributes",
7224 elfcpp::SHT_ARM_ATTRIBUTES, 0,
7225 attributes_section, false, false, false,
7229 // Return whether a direct absolute static relocation needs to be applied.
7230 // In cases where Scan::local() or Scan::global() has created
7231 // a dynamic relocation other than R_ARM_RELATIVE, the addend
7232 // of the relocation is carried in the data, and we must not
7233 // apply the static relocation.
7235 template<bool big_endian>
7237 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
7238 const Sized_symbol<32>* gsym,
7241 Output_section* output_section)
7243 // If the output section is not allocated, then we didn't call
7244 // scan_relocs, we didn't create a dynamic reloc, and we must apply
7246 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
7249 // For local symbols, we will have created a non-RELATIVE dynamic
7250 // relocation only if (a) the output is position independent,
7251 // (b) the relocation is absolute (not pc- or segment-relative), and
7252 // (c) the relocation is not 32 bits wide.
7254 return !(parameters->options().output_is_position_independent()
7255 && (ref_flags & Symbol::ABSOLUTE_REF)
7258 // For global symbols, we use the same helper routines used in the
7259 // scan pass. If we did not create a dynamic relocation, or if we
7260 // created a RELATIVE dynamic relocation, we should apply the static
7262 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
7263 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
7264 && gsym->can_use_relative_reloc(ref_flags
7265 & Symbol::FUNCTION_CALL);
7266 return !has_dyn || is_rel;
7269 // Perform a relocation.
7271 template<bool big_endian>
7273 Target_arm<big_endian>::Relocate::relocate(
7274 const Relocate_info<32, big_endian>* relinfo,
7276 Output_section *output_section,
7278 const elfcpp::Rel<32, big_endian>& rel,
7279 unsigned int r_type,
7280 const Sized_symbol<32>* gsym,
7281 const Symbol_value<32>* psymval,
7282 unsigned char* view,
7283 Arm_address address,
7284 section_size_type /* view_size */ )
7286 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
7288 r_type = get_real_reloc_type(r_type);
7290 const Arm_relobj<big_endian>* object =
7291 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
7293 // If the final branch target of a relocation is THUMB instruction, this
7294 // is 1. Otherwise it is 0.
7295 Arm_address thumb_bit = 0;
7296 Symbol_value<32> symval;
7297 bool is_weakly_undefined_without_plt = false;
7298 if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
7302 // This is a global symbol. Determine if we use PLT and if the
7303 // final target is THUMB.
7304 if (gsym->use_plt_offset(reloc_is_non_pic(r_type)))
7306 // This uses a PLT, change the symbol value.
7307 symval.set_output_value(target->plt_section()->address()
7308 + gsym->plt_offset());
7311 else if (gsym->is_weak_undefined())
7313 // This is a weakly undefined symbol and we do not use PLT
7314 // for this relocation. A branch targeting this symbol will
7315 // be converted into an NOP.
7316 is_weakly_undefined_without_plt = true;
7320 // Set thumb bit if symbol:
7321 // -Has type STT_ARM_TFUNC or
7322 // -Has type STT_FUNC, is defined and with LSB in value set.
7324 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
7325 || (gsym->type() == elfcpp::STT_FUNC
7326 && !gsym->is_undefined()
7327 && ((psymval->value(object, 0) & 1) != 0)))
7334 // This is a local symbol. Determine if the final target is THUMB.
7335 // We saved this information when all the local symbols were read.
7336 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
7337 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
7338 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
7343 // This is a fake relocation synthesized for a stub. It does not have
7344 // a real symbol. We just look at the LSB of the symbol value to
7345 // determine if the target is THUMB or not.
7346 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
7349 // Strip LSB if this points to a THUMB target.
7351 && Target_arm<big_endian>::reloc_uses_thumb_bit(r_type)
7352 && ((psymval->value(object, 0) & 1) != 0))
7354 Arm_address stripped_value =
7355 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
7356 symval.set_output_value(stripped_value);
7360 // Get the GOT offset if needed.
7361 // The GOT pointer points to the end of the GOT section.
7362 // We need to subtract the size of the GOT section to get
7363 // the actual offset to use in the relocation.
7364 bool have_got_offset = false;
7365 unsigned int got_offset = 0;
7368 case elfcpp::R_ARM_GOT_BREL:
7369 case elfcpp::R_ARM_GOT_PREL:
7372 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
7373 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
7374 - target->got_size());
7378 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7379 gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_STANDARD));
7380 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
7381 - target->got_size());
7383 have_got_offset = true;
7390 // To look up relocation stubs, we need to pass the symbol table index of
7392 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
7394 // Get the addressing origin of the output segment defining the
7395 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
7396 Arm_address sym_origin = 0;
7397 if (Relocate::reloc_needs_sym_origin(r_type))
7399 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
7400 // R_ARM_BASE_ABS with the NULL symbol will give the
7401 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
7402 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
7403 sym_origin = target->got_plt_section()->address();
7404 else if (gsym == NULL)
7406 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
7407 sym_origin = gsym->output_segment()->vaddr();
7408 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
7409 sym_origin = gsym->output_data()->address();
7411 // TODO: Assumes the segment base to be zero for the global symbols
7412 // till the proper support for the segment-base-relative addressing
7413 // will be implemented. This is consistent with GNU ld.
7416 typename Arm_relocate_functions::Status reloc_status =
7417 Arm_relocate_functions::STATUS_OKAY;
7420 case elfcpp::R_ARM_NONE:
7423 case elfcpp::R_ARM_ABS8:
7424 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7426 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
7429 case elfcpp::R_ARM_ABS12:
7430 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7432 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
7435 case elfcpp::R_ARM_ABS16:
7436 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7438 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
7441 case elfcpp::R_ARM_ABS32:
7442 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7444 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7448 case elfcpp::R_ARM_ABS32_NOI:
7449 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7451 // No thumb bit for this relocation: (S + A)
7452 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
7456 case elfcpp::R_ARM_MOVW_ABS_NC:
7457 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7459 reloc_status = Arm_relocate_functions::movw_abs_nc(view, object,
7463 gold_error(_("relocation R_ARM_MOVW_ABS_NC cannot be used when making"
7464 "a shared object; recompile with -fPIC"));
7467 case elfcpp::R_ARM_MOVT_ABS:
7468 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7470 reloc_status = Arm_relocate_functions::movt_abs(view, object, psymval);
7472 gold_error(_("relocation R_ARM_MOVT_ABS cannot be used when making"
7473 "a shared object; recompile with -fPIC"));
7476 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7477 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7479 reloc_status = Arm_relocate_functions::thm_movw_abs_nc(view, object,
7483 gold_error(_("relocation R_ARM_THM_MOVW_ABS_NC cannot be used when"
7484 "making a shared object; recompile with -fPIC"));
7487 case elfcpp::R_ARM_THM_MOVT_ABS:
7488 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7490 reloc_status = Arm_relocate_functions::thm_movt_abs(view, object,
7493 gold_error(_("relocation R_ARM_THM_MOVT_ABS cannot be used when"
7494 "making a shared object; recompile with -fPIC"));
7497 case elfcpp::R_ARM_MOVW_PREL_NC:
7498 reloc_status = Arm_relocate_functions::movw_rel_nc(view, object,
7503 case elfcpp::R_ARM_MOVW_BREL_NC:
7504 reloc_status = Arm_relocate_functions::movw_rel_nc(view, object,
7505 psymval, sym_origin,
7509 case elfcpp::R_ARM_MOVW_BREL:
7510 reloc_status = Arm_relocate_functions::movw_rel(view, object,
7511 psymval, sym_origin,
7515 case elfcpp::R_ARM_MOVT_PREL:
7516 reloc_status = Arm_relocate_functions::movt_rel(view, object,
7520 case elfcpp::R_ARM_MOVT_BREL:
7521 reloc_status = Arm_relocate_functions::movt_rel(view, object,
7522 psymval, sym_origin);
7525 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7526 reloc_status = Arm_relocate_functions::thm_movw_rel_nc(view, object,
7531 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7532 reloc_status = Arm_relocate_functions::thm_movw_rel_nc(view, object,
7538 case elfcpp::R_ARM_THM_MOVW_BREL:
7539 reloc_status = Arm_relocate_functions::thm_movw_rel(view, object,
7540 psymval, sym_origin,
7544 case elfcpp::R_ARM_THM_MOVT_PREL:
7545 reloc_status = Arm_relocate_functions::thm_movt_rel(view, object,
7549 case elfcpp::R_ARM_THM_MOVT_BREL:
7550 reloc_status = Arm_relocate_functions::thm_movt_rel(view, object,
7551 psymval, sym_origin);
7554 case elfcpp::R_ARM_REL32:
7555 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7556 address, thumb_bit);
7559 case elfcpp::R_ARM_THM_ABS5:
7560 if (should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, false,
7562 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
7565 // Thumb long branches.
7566 case elfcpp::R_ARM_THM_CALL:
7567 case elfcpp::R_ARM_THM_XPC22:
7568 case elfcpp::R_ARM_THM_JUMP24:
7570 Arm_relocate_functions::thumb_branch_common(
7571 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7572 thumb_bit, is_weakly_undefined_without_plt);
7575 case elfcpp::R_ARM_GOTOFF32:
7577 Arm_address got_origin;
7578 got_origin = target->got_plt_section()->address();
7579 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
7580 got_origin, thumb_bit);
7584 case elfcpp::R_ARM_BASE_PREL:
7585 gold_assert(gsym != NULL);
7587 Arm_relocate_functions::base_prel(view, sym_origin, address);
7590 case elfcpp::R_ARM_BASE_ABS:
7592 if (!should_apply_static_reloc(gsym, Symbol::ABSOLUTE_REF, true,
7596 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
7600 case elfcpp::R_ARM_GOT_BREL:
7601 gold_assert(have_got_offset);
7602 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
7605 case elfcpp::R_ARM_GOT_PREL:
7606 gold_assert(have_got_offset);
7607 // Get the address origin for GOT PLT, which is allocated right
7608 // after the GOT section, to calculate an absolute address of
7609 // the symbol GOT entry (got_origin + got_offset).
7610 Arm_address got_origin;
7611 got_origin = target->got_plt_section()->address();
7612 reloc_status = Arm_relocate_functions::got_prel(view,
7613 got_origin + got_offset,
7617 case elfcpp::R_ARM_PLT32:
7618 case elfcpp::R_ARM_CALL:
7619 case elfcpp::R_ARM_JUMP24:
7620 case elfcpp::R_ARM_XPC25:
7621 gold_assert(gsym == NULL
7622 || gsym->has_plt_offset()
7623 || gsym->final_value_is_known()
7624 || (gsym->is_defined()
7625 && !gsym->is_from_dynobj()
7626 && !gsym->is_preemptible()));
7628 Arm_relocate_functions::arm_branch_common(
7629 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
7630 thumb_bit, is_weakly_undefined_without_plt);
7633 case elfcpp::R_ARM_THM_JUMP19:
7635 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
7639 case elfcpp::R_ARM_THM_JUMP6:
7641 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
7644 case elfcpp::R_ARM_THM_JUMP8:
7646 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
7649 case elfcpp::R_ARM_THM_JUMP11:
7651 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
7654 case elfcpp::R_ARM_PREL31:
7655 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
7656 address, thumb_bit);
7659 case elfcpp::R_ARM_V4BX:
7660 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
7662 const bool is_v4bx_interworking =
7663 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
7665 Arm_relocate_functions::v4bx(relinfo, view, object, address,
7666 is_v4bx_interworking);
7670 case elfcpp::R_ARM_THM_PC8:
7672 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
7675 case elfcpp::R_ARM_THM_PC12:
7677 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
7680 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7682 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
7686 case elfcpp::R_ARM_ALU_PC_G0_NC:
7688 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
7689 address, thumb_bit, false);
7692 case elfcpp::R_ARM_ALU_PC_G0:
7694 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
7695 address, thumb_bit, true);
7698 case elfcpp::R_ARM_ALU_PC_G1_NC:
7700 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
7701 address, thumb_bit, false);
7704 case elfcpp::R_ARM_ALU_PC_G1:
7706 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
7707 address, thumb_bit, true);
7710 case elfcpp::R_ARM_ALU_PC_G2:
7712 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 2,
7713 address, thumb_bit, true);
7716 case elfcpp::R_ARM_ALU_SB_G0_NC:
7718 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
7719 sym_origin, thumb_bit, false);
7722 case elfcpp::R_ARM_ALU_SB_G0:
7724 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
7725 sym_origin, thumb_bit, true);
7728 case elfcpp::R_ARM_ALU_SB_G1_NC:
7730 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
7731 sym_origin, thumb_bit, false);
7734 case elfcpp::R_ARM_ALU_SB_G1:
7736 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
7737 sym_origin, thumb_bit, true);
7740 case elfcpp::R_ARM_ALU_SB_G2:
7742 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 2,
7743 sym_origin, thumb_bit, true);
7746 case elfcpp::R_ARM_LDR_PC_G0:
7748 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 0,
7752 case elfcpp::R_ARM_LDR_PC_G1:
7754 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 1,
7758 case elfcpp::R_ARM_LDR_PC_G2:
7760 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 2,
7764 case elfcpp::R_ARM_LDR_SB_G0:
7766 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 0,
7770 case elfcpp::R_ARM_LDR_SB_G1:
7772 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 1,
7776 case elfcpp::R_ARM_LDR_SB_G2:
7778 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 2,
7782 case elfcpp::R_ARM_LDRS_PC_G0:
7784 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 0,
7788 case elfcpp::R_ARM_LDRS_PC_G1:
7790 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 1,
7794 case elfcpp::R_ARM_LDRS_PC_G2:
7796 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 2,
7800 case elfcpp::R_ARM_LDRS_SB_G0:
7802 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 0,
7806 case elfcpp::R_ARM_LDRS_SB_G1:
7808 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 1,
7812 case elfcpp::R_ARM_LDRS_SB_G2:
7814 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 2,
7818 case elfcpp::R_ARM_LDC_PC_G0:
7820 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 0,
7824 case elfcpp::R_ARM_LDC_PC_G1:
7826 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 1,
7830 case elfcpp::R_ARM_LDC_PC_G2:
7832 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 2,
7836 case elfcpp::R_ARM_LDC_SB_G0:
7838 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 0,
7842 case elfcpp::R_ARM_LDC_SB_G1:
7844 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 1,
7848 case elfcpp::R_ARM_LDC_SB_G2:
7850 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 2,
7854 case elfcpp::R_ARM_TARGET1:
7855 // This should have been mapped to another type already.
7857 case elfcpp::R_ARM_COPY:
7858 case elfcpp::R_ARM_GLOB_DAT:
7859 case elfcpp::R_ARM_JUMP_SLOT:
7860 case elfcpp::R_ARM_RELATIVE:
7861 // These are relocations which should only be seen by the
7862 // dynamic linker, and should never be seen here.
7863 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7864 _("unexpected reloc %u in object file"),
7869 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7870 _("unsupported reloc %u"),
7875 // Report any errors.
7876 switch (reloc_status)
7878 case Arm_relocate_functions::STATUS_OKAY:
7880 case Arm_relocate_functions::STATUS_OVERFLOW:
7881 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
7882 _("relocation overflow in relocation %u"),
7885 case Arm_relocate_functions::STATUS_BAD_RELOC:
7886 gold_error_at_location(
7890 _("unexpected opcode while processing relocation %u"),
7900 // Relocate section data.
7902 template<bool big_endian>
7904 Target_arm<big_endian>::relocate_section(
7905 const Relocate_info<32, big_endian>* relinfo,
7906 unsigned int sh_type,
7907 const unsigned char* prelocs,
7909 Output_section* output_section,
7910 bool needs_special_offset_handling,
7911 unsigned char* view,
7912 Arm_address address,
7913 section_size_type view_size,
7914 const Reloc_symbol_changes* reloc_symbol_changes)
7916 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
7917 gold_assert(sh_type == elfcpp::SHT_REL);
7919 // See if we are relocating a relaxed input section. If so, the view
7920 // covers the whole output section and we need to adjust accordingly.
7921 if (needs_special_offset_handling)
7923 const Output_relaxed_input_section* poris =
7924 output_section->find_relaxed_input_section(relinfo->object,
7925 relinfo->data_shndx);
7928 Arm_address section_address = poris->address();
7929 section_size_type section_size = poris->data_size();
7931 gold_assert((section_address >= address)
7932 && ((section_address + section_size)
7933 <= (address + view_size)));
7935 off_t offset = section_address - address;
7938 view_size = section_size;
7942 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
7949 needs_special_offset_handling,
7953 reloc_symbol_changes);
7956 // Return the size of a relocation while scanning during a relocatable
7959 template<bool big_endian>
7961 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
7962 unsigned int r_type,
7965 r_type = get_real_reloc_type(r_type);
7968 case elfcpp::R_ARM_NONE:
7971 case elfcpp::R_ARM_ABS8:
7974 case elfcpp::R_ARM_ABS16:
7975 case elfcpp::R_ARM_THM_ABS5:
7976 case elfcpp::R_ARM_THM_JUMP6:
7977 case elfcpp::R_ARM_THM_JUMP8:
7978 case elfcpp::R_ARM_THM_JUMP11:
7979 case elfcpp::R_ARM_THM_PC8:
7982 case elfcpp::R_ARM_ABS32:
7983 case elfcpp::R_ARM_ABS32_NOI:
7984 case elfcpp::R_ARM_ABS12:
7985 case elfcpp::R_ARM_BASE_ABS:
7986 case elfcpp::R_ARM_REL32:
7987 case elfcpp::R_ARM_THM_CALL:
7988 case elfcpp::R_ARM_GOTOFF32:
7989 case elfcpp::R_ARM_BASE_PREL:
7990 case elfcpp::R_ARM_GOT_BREL:
7991 case elfcpp::R_ARM_GOT_PREL:
7992 case elfcpp::R_ARM_PLT32:
7993 case elfcpp::R_ARM_CALL:
7994 case elfcpp::R_ARM_JUMP24:
7995 case elfcpp::R_ARM_PREL31:
7996 case elfcpp::R_ARM_MOVW_ABS_NC:
7997 case elfcpp::R_ARM_MOVT_ABS:
7998 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7999 case elfcpp::R_ARM_THM_MOVT_ABS:
8000 case elfcpp::R_ARM_MOVW_PREL_NC:
8001 case elfcpp::R_ARM_MOVT_PREL:
8002 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8003 case elfcpp::R_ARM_THM_MOVT_PREL:
8004 case elfcpp::R_ARM_MOVW_BREL_NC:
8005 case elfcpp::R_ARM_MOVT_BREL:
8006 case elfcpp::R_ARM_MOVW_BREL:
8007 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8008 case elfcpp::R_ARM_THM_MOVT_BREL:
8009 case elfcpp::R_ARM_THM_MOVW_BREL:
8010 case elfcpp::R_ARM_V4BX:
8011 case elfcpp::R_ARM_THM_PC12:
8012 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8013 case elfcpp::R_ARM_ALU_PC_G0_NC:
8014 case elfcpp::R_ARM_ALU_PC_G0:
8015 case elfcpp::R_ARM_ALU_PC_G1_NC:
8016 case elfcpp::R_ARM_ALU_PC_G1:
8017 case elfcpp::R_ARM_ALU_PC_G2:
8018 case elfcpp::R_ARM_ALU_SB_G0_NC:
8019 case elfcpp::R_ARM_ALU_SB_G0:
8020 case elfcpp::R_ARM_ALU_SB_G1_NC:
8021 case elfcpp::R_ARM_ALU_SB_G1:
8022 case elfcpp::R_ARM_ALU_SB_G2:
8023 case elfcpp::R_ARM_LDR_PC_G0:
8024 case elfcpp::R_ARM_LDR_PC_G1:
8025 case elfcpp::R_ARM_LDR_PC_G2:
8026 case elfcpp::R_ARM_LDR_SB_G0:
8027 case elfcpp::R_ARM_LDR_SB_G1:
8028 case elfcpp::R_ARM_LDR_SB_G2:
8029 case elfcpp::R_ARM_LDRS_PC_G0:
8030 case elfcpp::R_ARM_LDRS_PC_G1:
8031 case elfcpp::R_ARM_LDRS_PC_G2:
8032 case elfcpp::R_ARM_LDRS_SB_G0:
8033 case elfcpp::R_ARM_LDRS_SB_G1:
8034 case elfcpp::R_ARM_LDRS_SB_G2:
8035 case elfcpp::R_ARM_LDC_PC_G0:
8036 case elfcpp::R_ARM_LDC_PC_G1:
8037 case elfcpp::R_ARM_LDC_PC_G2:
8038 case elfcpp::R_ARM_LDC_SB_G0:
8039 case elfcpp::R_ARM_LDC_SB_G1:
8040 case elfcpp::R_ARM_LDC_SB_G2:
8043 case elfcpp::R_ARM_TARGET1:
8044 // This should have been mapped to another type already.
8046 case elfcpp::R_ARM_COPY:
8047 case elfcpp::R_ARM_GLOB_DAT:
8048 case elfcpp::R_ARM_JUMP_SLOT:
8049 case elfcpp::R_ARM_RELATIVE:
8050 // These are relocations which should only be seen by the
8051 // dynamic linker, and should never be seen here.
8052 gold_error(_("%s: unexpected reloc %u in object file"),
8053 object->name().c_str(), r_type);
8057 object->error(_("unsupported reloc %u in object file"), r_type);
8062 // Scan the relocs during a relocatable link.
8064 template<bool big_endian>
8066 Target_arm<big_endian>::scan_relocatable_relocs(
8067 Symbol_table* symtab,
8069 Sized_relobj<32, big_endian>* object,
8070 unsigned int data_shndx,
8071 unsigned int sh_type,
8072 const unsigned char* prelocs,
8074 Output_section* output_section,
8075 bool needs_special_offset_handling,
8076 size_t local_symbol_count,
8077 const unsigned char* plocal_symbols,
8078 Relocatable_relocs* rr)
8080 gold_assert(sh_type == elfcpp::SHT_REL);
8082 typedef gold::Default_scan_relocatable_relocs<elfcpp::SHT_REL,
8083 Relocatable_size_for_reloc> Scan_relocatable_relocs;
8085 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
8086 Scan_relocatable_relocs>(
8094 needs_special_offset_handling,
8100 // Relocate a section during a relocatable link.
8102 template<bool big_endian>
8104 Target_arm<big_endian>::relocate_for_relocatable(
8105 const Relocate_info<32, big_endian>* relinfo,
8106 unsigned int sh_type,
8107 const unsigned char* prelocs,
8109 Output_section* output_section,
8110 off_t offset_in_output_section,
8111 const Relocatable_relocs* rr,
8112 unsigned char* view,
8113 Arm_address view_address,
8114 section_size_type view_size,
8115 unsigned char* reloc_view,
8116 section_size_type reloc_view_size)
8118 gold_assert(sh_type == elfcpp::SHT_REL);
8120 gold::relocate_for_relocatable<32, big_endian, elfcpp::SHT_REL>(
8125 offset_in_output_section,
8134 // Return the value to use for a dynamic symbol which requires special
8135 // treatment. This is how we support equality comparisons of function
8136 // pointers across shared library boundaries, as described in the
8137 // processor specific ABI supplement.
8139 template<bool big_endian>
8141 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
8143 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
8144 return this->plt_section()->address() + gsym->plt_offset();
8147 // Map platform-specific relocs to real relocs
8149 template<bool big_endian>
8151 Target_arm<big_endian>::get_real_reloc_type (unsigned int r_type)
8155 case elfcpp::R_ARM_TARGET1:
8156 // This is either R_ARM_ABS32 or R_ARM_REL32;
8157 return elfcpp::R_ARM_ABS32;
8159 case elfcpp::R_ARM_TARGET2:
8160 // This can be any reloc type but ususally is R_ARM_GOT_PREL
8161 return elfcpp::R_ARM_GOT_PREL;
8168 // Whether if two EABI versions V1 and V2 are compatible.
8170 template<bool big_endian>
8172 Target_arm<big_endian>::are_eabi_versions_compatible(
8173 elfcpp::Elf_Word v1,
8174 elfcpp::Elf_Word v2)
8176 // v4 and v5 are the same spec before and after it was released,
8177 // so allow mixing them.
8178 if ((v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
8179 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
8185 // Combine FLAGS from an input object called NAME and the processor-specific
8186 // flags in the ELF header of the output. Much of this is adapted from the
8187 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
8188 // in bfd/elf32-arm.c.
8190 template<bool big_endian>
8192 Target_arm<big_endian>::merge_processor_specific_flags(
8193 const std::string& name,
8194 elfcpp::Elf_Word flags)
8196 if (this->are_processor_specific_flags_set())
8198 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
8200 // Nothing to merge if flags equal to those in output.
8201 if (flags == out_flags)
8204 // Complain about various flag mismatches.
8205 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
8206 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
8207 if (!this->are_eabi_versions_compatible(version1, version2))
8208 gold_error(_("Source object %s has EABI version %d but output has "
8209 "EABI version %d."),
8211 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
8212 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
8216 // If the input is the default architecture and had the default
8217 // flags then do not bother setting the flags for the output
8218 // architecture, instead allow future merges to do this. If no
8219 // future merges ever set these flags then they will retain their
8220 // uninitialised values, which surprise surprise, correspond
8221 // to the default values.
8225 // This is the first time, just copy the flags.
8226 // We only copy the EABI version for now.
8227 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
8231 // Adjust ELF file header.
8232 template<bool big_endian>
8234 Target_arm<big_endian>::do_adjust_elf_header(
8235 unsigned char* view,
8238 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
8240 elfcpp::Ehdr<32, big_endian> ehdr(view);
8241 unsigned char e_ident[elfcpp::EI_NIDENT];
8242 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
8244 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
8245 == elfcpp::EF_ARM_EABI_UNKNOWN)
8246 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
8248 e_ident[elfcpp::EI_OSABI] = 0;
8249 e_ident[elfcpp::EI_ABIVERSION] = 0;
8251 // FIXME: Do EF_ARM_BE8 adjustment.
8253 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
8254 oehdr.put_e_ident(e_ident);
8257 // do_make_elf_object to override the same function in the base class.
8258 // We need to use a target-specific sub-class of Sized_relobj<32, big_endian>
8259 // to store ARM specific information. Hence we need to have our own
8260 // ELF object creation.
8262 template<bool big_endian>
8264 Target_arm<big_endian>::do_make_elf_object(
8265 const std::string& name,
8266 Input_file* input_file,
8267 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
8269 int et = ehdr.get_e_type();
8270 if (et == elfcpp::ET_REL)
8272 Arm_relobj<big_endian>* obj =
8273 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
8277 else if (et == elfcpp::ET_DYN)
8279 Sized_dynobj<32, big_endian>* obj =
8280 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
8286 gold_error(_("%s: unsupported ELF file type %d"),
8292 // Read the architecture from the Tag_also_compatible_with attribute, if any.
8293 // Returns -1 if no architecture could be read.
8294 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
8296 template<bool big_endian>
8298 Target_arm<big_endian>::get_secondary_compatible_arch(
8299 const Attributes_section_data* pasd)
8301 const Object_attribute *known_attributes =
8302 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
8304 // Note: the tag and its argument below are uleb128 values, though
8305 // currently-defined values fit in one byte for each.
8306 const std::string& sv =
8307 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
8309 && sv.data()[0] == elfcpp::Tag_CPU_arch
8310 && (sv.data()[1] & 128) != 128)
8311 return sv.data()[1];
8313 // This tag is "safely ignorable", so don't complain if it looks funny.
8317 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8318 // The tag is removed if ARCH is -1.
8319 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
8321 template<bool big_endian>
8323 Target_arm<big_endian>::set_secondary_compatible_arch(
8324 Attributes_section_data* pasd,
8327 Object_attribute *known_attributes =
8328 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
8332 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
8336 // Note: the tag and its argument below are uleb128 values, though
8337 // currently-defined values fit in one byte for each.
8339 sv[0] = elfcpp::Tag_CPU_arch;
8340 gold_assert(arch != 0);
8344 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
8347 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8349 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
8351 template<bool big_endian>
8353 Target_arm<big_endian>::tag_cpu_arch_combine(
8356 int* secondary_compat_out,
8358 int secondary_compat)
8360 #define T(X) elfcpp::TAG_CPU_ARCH_##X
8361 static const int v6t2[] =
8373 static const int v6k[] =
8386 static const int v7[] =
8400 static const int v6_m[] =
8415 static const int v6s_m[] =
8431 static const int v7e_m[] =
8448 static const int v4t_plus_v6_m[] =
8464 T(V4T_PLUS_V6_M) // V4T plus V6_M.
8466 static const int *comb[] =
8474 // Pseudo-architecture.
8478 // Check we've not got a higher architecture than we know about.
8480 if (oldtag >= elfcpp::MAX_TAG_CPU_ARCH || newtag >= elfcpp::MAX_TAG_CPU_ARCH)
8482 gold_error(_("%s: unknown CPU architecture"), name);
8486 // Override old tag if we have a Tag_also_compatible_with on the output.
8488 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
8489 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
8490 oldtag = T(V4T_PLUS_V6_M);
8492 // And override the new tag if we have a Tag_also_compatible_with on the
8495 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
8496 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
8497 newtag = T(V4T_PLUS_V6_M);
8499 // Architectures before V6KZ add features monotonically.
8500 int tagh = std::max(oldtag, newtag);
8501 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
8504 int tagl = std::min(oldtag, newtag);
8505 int result = comb[tagh - T(V6T2)][tagl];
8507 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8508 // as the canonical version.
8509 if (result == T(V4T_PLUS_V6_M))
8512 *secondary_compat_out = T(V6_M);
8515 *secondary_compat_out = -1;
8519 gold_error(_("%s: conflicting CPU architectures %d/%d"),
8520 name, oldtag, newtag);
8528 // Helper to print AEABI enum tag value.
8530 template<bool big_endian>
8532 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
8534 static const char *aeabi_enum_names[] =
8535 { "", "variable-size", "32-bit", "" };
8536 const size_t aeabi_enum_names_size =
8537 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
8539 if (value < aeabi_enum_names_size)
8540 return std::string(aeabi_enum_names[value]);
8544 sprintf(buffer, "<unknown value %u>", value);
8545 return std::string(buffer);
8549 // Return the string value to store in TAG_CPU_name.
8551 template<bool big_endian>
8553 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
8555 static const char *name_table[] = {
8556 // These aren't real CPU names, but we can't guess
8557 // that from the architecture version alone.
8573 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
8575 if (value < name_table_size)
8576 return std::string(name_table[value]);
8580 sprintf(buffer, "<unknown CPU value %u>", value);
8581 return std::string(buffer);
8585 // Merge object attributes from input file called NAME with those of the
8586 // output. The input object attributes are in the object pointed by PASD.
8588 template<bool big_endian>
8590 Target_arm<big_endian>::merge_object_attributes(
8592 const Attributes_section_data* pasd)
8594 // Return if there is no attributes section data.
8598 // If output has no object attributes, just copy.
8599 if (this->attributes_section_data_ == NULL)
8601 this->attributes_section_data_ = new Attributes_section_data(*pasd);
8605 const int vendor = Object_attribute::OBJ_ATTR_PROC;
8606 const Object_attribute* in_attr = pasd->known_attributes(vendor);
8607 Object_attribute* out_attr =
8608 this->attributes_section_data_->known_attributes(vendor);
8610 // This needs to happen before Tag_ABI_FP_number_model is merged. */
8611 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
8612 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
8614 // Ignore mismatches if the object doesn't use floating point. */
8615 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0)
8616 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
8617 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
8618 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0)
8619 gold_error(_("%s uses VFP register arguments, output does not"),
8623 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
8625 // Merge this attribute with existing attributes.
8628 case elfcpp::Tag_CPU_raw_name:
8629 case elfcpp::Tag_CPU_name:
8630 // These are merged after Tag_CPU_arch.
8633 case elfcpp::Tag_ABI_optimization_goals:
8634 case elfcpp::Tag_ABI_FP_optimization_goals:
8635 // Use the first value seen.
8638 case elfcpp::Tag_CPU_arch:
8640 unsigned int saved_out_attr = out_attr->int_value();
8641 // Merge Tag_CPU_arch and Tag_also_compatible_with.
8642 int secondary_compat =
8643 this->get_secondary_compatible_arch(pasd);
8644 int secondary_compat_out =
8645 this->get_secondary_compatible_arch(
8646 this->attributes_section_data_);
8647 out_attr[i].set_int_value(
8648 tag_cpu_arch_combine(name, out_attr[i].int_value(),
8649 &secondary_compat_out,
8650 in_attr[i].int_value(),
8652 this->set_secondary_compatible_arch(this->attributes_section_data_,
8653 secondary_compat_out);
8655 // Merge Tag_CPU_name and Tag_CPU_raw_name.
8656 if (out_attr[i].int_value() == saved_out_attr)
8657 ; // Leave the names alone.
8658 else if (out_attr[i].int_value() == in_attr[i].int_value())
8660 // The output architecture has been changed to match the
8661 // input architecture. Use the input names.
8662 out_attr[elfcpp::Tag_CPU_name].set_string_value(
8663 in_attr[elfcpp::Tag_CPU_name].string_value());
8664 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
8665 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
8669 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
8670 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
8673 // If we still don't have a value for Tag_CPU_name,
8674 // make one up now. Tag_CPU_raw_name remains blank.
8675 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
8677 const std::string cpu_name =
8678 this->tag_cpu_name_value(out_attr[i].int_value());
8679 // FIXME: If we see an unknown CPU, this will be set
8680 // to "<unknown CPU n>", where n is the attribute value.
8681 // This is different from BFD, which leaves the name alone.
8682 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
8687 case elfcpp::Tag_ARM_ISA_use:
8688 case elfcpp::Tag_THUMB_ISA_use:
8689 case elfcpp::Tag_WMMX_arch:
8690 case elfcpp::Tag_Advanced_SIMD_arch:
8691 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
8692 case elfcpp::Tag_ABI_FP_rounding:
8693 case elfcpp::Tag_ABI_FP_exceptions:
8694 case elfcpp::Tag_ABI_FP_user_exceptions:
8695 case elfcpp::Tag_ABI_FP_number_model:
8696 case elfcpp::Tag_VFP_HP_extension:
8697 case elfcpp::Tag_CPU_unaligned_access:
8698 case elfcpp::Tag_T2EE_use:
8699 case elfcpp::Tag_Virtualization_use:
8700 case elfcpp::Tag_MPextension_use:
8701 // Use the largest value specified.
8702 if (in_attr[i].int_value() > out_attr[i].int_value())
8703 out_attr[i].set_int_value(in_attr[i].int_value());
8706 case elfcpp::Tag_ABI_align8_preserved:
8707 case elfcpp::Tag_ABI_PCS_RO_data:
8708 // Use the smallest value specified.
8709 if (in_attr[i].int_value() < out_attr[i].int_value())
8710 out_attr[i].set_int_value(in_attr[i].int_value());
8713 case elfcpp::Tag_ABI_align8_needed:
8714 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
8715 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
8716 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
8719 // This error message should be enabled once all non-conformant
8720 // binaries in the toolchain have had the attributes set
8722 // gold_error(_("output 8-byte data alignment conflicts with %s"),
8726 case elfcpp::Tag_ABI_FP_denormal:
8727 case elfcpp::Tag_ABI_PCS_GOT_use:
8729 // These tags have 0 = don't care, 1 = strong requirement,
8730 // 2 = weak requirement.
8731 static const int order_021[3] = {0, 2, 1};
8733 // Use the "greatest" from the sequence 0, 2, 1, or the largest
8734 // value if greater than 2 (for future-proofing).
8735 if ((in_attr[i].int_value() > 2
8736 && in_attr[i].int_value() > out_attr[i].int_value())
8737 || (in_attr[i].int_value() <= 2
8738 && out_attr[i].int_value() <= 2
8739 && (order_021[in_attr[i].int_value()]
8740 > order_021[out_attr[i].int_value()])))
8741 out_attr[i].set_int_value(in_attr[i].int_value());
8745 case elfcpp::Tag_CPU_arch_profile:
8746 if (out_attr[i].int_value() != in_attr[i].int_value())
8748 // 0 will merge with anything.
8749 // 'A' and 'S' merge to 'A'.
8750 // 'R' and 'S' merge to 'R'.
8751 // 'M' and 'A|R|S' is an error.
8752 if (out_attr[i].int_value() == 0
8753 || (out_attr[i].int_value() == 'S'
8754 && (in_attr[i].int_value() == 'A'
8755 || in_attr[i].int_value() == 'R')))
8756 out_attr[i].set_int_value(in_attr[i].int_value());
8757 else if (in_attr[i].int_value() == 0
8758 || (in_attr[i].int_value() == 'S'
8759 && (out_attr[i].int_value() == 'A'
8760 || out_attr[i].int_value() == 'R')))
8765 (_("conflicting architecture profiles %c/%c"),
8766 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
8767 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
8771 case elfcpp::Tag_VFP_arch:
8788 // Values greater than 6 aren't defined, so just pick the
8790 if (in_attr[i].int_value() > 6
8791 && in_attr[i].int_value() > out_attr[i].int_value())
8793 *out_attr = *in_attr;
8796 // The output uses the superset of input features
8797 // (ISA version) and registers.
8798 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
8799 vfp_versions[out_attr[i].int_value()].ver);
8800 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
8801 vfp_versions[out_attr[i].int_value()].regs);
8802 // This assumes all possible supersets are also a valid
8805 for (newval = 6; newval > 0; newval--)
8807 if (regs == vfp_versions[newval].regs
8808 && ver == vfp_versions[newval].ver)
8811 out_attr[i].set_int_value(newval);
8814 case elfcpp::Tag_PCS_config:
8815 if (out_attr[i].int_value() == 0)
8816 out_attr[i].set_int_value(in_attr[i].int_value());
8817 else if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8819 // It's sometimes ok to mix different configs, so this is only
8821 gold_warning(_("%s: conflicting platform configuration"), name);
8824 case elfcpp::Tag_ABI_PCS_R9_use:
8825 if (in_attr[i].int_value() != out_attr[i].int_value()
8826 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
8827 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused)
8829 gold_error(_("%s: conflicting use of R9"), name);
8831 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
8832 out_attr[i].set_int_value(in_attr[i].int_value());
8834 case elfcpp::Tag_ABI_PCS_RW_data:
8835 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
8836 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8837 != elfcpp::AEABI_R9_SB)
8838 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
8839 != elfcpp::AEABI_R9_unused))
8841 gold_error(_("%s: SB relative addressing conflicts with use "
8845 // Use the smallest value specified.
8846 if (in_attr[i].int_value() < out_attr[i].int_value())
8847 out_attr[i].set_int_value(in_attr[i].int_value());
8849 case elfcpp::Tag_ABI_PCS_wchar_t:
8850 // FIXME: Make it possible to turn off this warning.
8851 if (out_attr[i].int_value()
8852 && in_attr[i].int_value()
8853 && out_attr[i].int_value() != in_attr[i].int_value())
8855 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
8856 "use %u-byte wchar_t; use of wchar_t values "
8857 "across objects may fail"),
8858 name, in_attr[i].int_value(),
8859 out_attr[i].int_value());
8861 else if (in_attr[i].int_value() && !out_attr[i].int_value())
8862 out_attr[i].set_int_value(in_attr[i].int_value());
8864 case elfcpp::Tag_ABI_enum_size:
8865 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
8867 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
8868 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
8870 // The existing object is compatible with anything.
8871 // Use whatever requirements the new object has.
8872 out_attr[i].set_int_value(in_attr[i].int_value());
8874 // FIXME: Make it possible to turn off this warning.
8875 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
8876 && out_attr[i].int_value() != in_attr[i].int_value())
8878 unsigned int in_value = in_attr[i].int_value();
8879 unsigned int out_value = out_attr[i].int_value();
8880 gold_warning(_("%s uses %s enums yet the output is to use "
8881 "%s enums; use of enum values across objects "
8884 this->aeabi_enum_name(in_value).c_str(),
8885 this->aeabi_enum_name(out_value).c_str());
8889 case elfcpp::Tag_ABI_VFP_args:
8892 case elfcpp::Tag_ABI_WMMX_args:
8893 if (in_attr[i].int_value() != out_attr[i].int_value())
8895 gold_error(_("%s uses iWMMXt register arguments, output does "
8900 case Object_attribute::Tag_compatibility:
8901 // Merged in target-independent code.
8903 case elfcpp::Tag_ABI_HardFP_use:
8904 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
8905 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
8906 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
8907 out_attr[i].set_int_value(3);
8908 else if (in_attr[i].int_value() > out_attr[i].int_value())
8909 out_attr[i].set_int_value(in_attr[i].int_value());
8911 case elfcpp::Tag_ABI_FP_16bit_format:
8912 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
8914 if (in_attr[i].int_value() != out_attr[i].int_value())
8915 gold_error(_("fp16 format mismatch between %s and output"),
8918 if (in_attr[i].int_value() != 0)
8919 out_attr[i].set_int_value(in_attr[i].int_value());
8922 case elfcpp::Tag_nodefaults:
8923 // This tag is set if it exists, but the value is unused (and is
8924 // typically zero). We don't actually need to do anything here -
8925 // the merge happens automatically when the type flags are merged
8928 case elfcpp::Tag_also_compatible_with:
8929 // Already done in Tag_CPU_arch.
8931 case elfcpp::Tag_conformance:
8932 // Keep the attribute if it matches. Throw it away otherwise.
8933 // No attribute means no claim to conform.
8934 if (in_attr[i].string_value() != out_attr[i].string_value())
8935 out_attr[i].set_string_value("");
8940 const char* err_object = NULL;
8942 // The "known_obj_attributes" table does contain some undefined
8943 // attributes. Ensure that there are unused.
8944 if (out_attr[i].int_value() != 0
8945 || out_attr[i].string_value() != "")
8946 err_object = "output";
8947 else if (in_attr[i].int_value() != 0
8948 || in_attr[i].string_value() != "")
8951 if (err_object != NULL)
8953 // Attribute numbers >=64 (mod 128) can be safely ignored.
8955 gold_error(_("%s: unknown mandatory EABI object attribute "
8959 gold_warning(_("%s: unknown EABI object attribute %d"),
8963 // Only pass on attributes that match in both inputs.
8964 if (!in_attr[i].matches(out_attr[i]))
8966 out_attr[i].set_int_value(0);
8967 out_attr[i].set_string_value("");
8972 // If out_attr was copied from in_attr then it won't have a type yet.
8973 if (in_attr[i].type() && !out_attr[i].type())
8974 out_attr[i].set_type(in_attr[i].type());
8977 // Merge Tag_compatibility attributes and any common GNU ones.
8978 this->attributes_section_data_->merge(name, pasd);
8980 // Check for any attributes not known on ARM.
8981 typedef Vendor_object_attributes::Other_attributes Other_attributes;
8982 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
8983 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
8984 Other_attributes* out_other_attributes =
8985 this->attributes_section_data_->other_attributes(vendor);
8986 Other_attributes::iterator out_iter = out_other_attributes->begin();
8988 while (in_iter != in_other_attributes->end()
8989 || out_iter != out_other_attributes->end())
8991 const char* err_object = NULL;
8994 // The tags for each list are in numerical order.
8995 // If the tags are equal, then merge.
8996 if (out_iter != out_other_attributes->end()
8997 && (in_iter == in_other_attributes->end()
8998 || in_iter->first > out_iter->first))
9000 // This attribute only exists in output. We can't merge, and we
9001 // don't know what the tag means, so delete it.
9002 err_object = "output";
9003 err_tag = out_iter->first;
9004 int saved_tag = out_iter->first;
9005 delete out_iter->second;
9006 out_other_attributes->erase(out_iter);
9007 out_iter = out_other_attributes->upper_bound(saved_tag);
9009 else if (in_iter != in_other_attributes->end()
9010 && (out_iter != out_other_attributes->end()
9011 || in_iter->first < out_iter->first))
9013 // This attribute only exists in input. We can't merge, and we
9014 // don't know what the tag means, so ignore it.
9016 err_tag = in_iter->first;
9019 else // The tags are equal.
9021 // As present, all attributes in the list are unknown, and
9022 // therefore can't be merged meaningfully.
9023 err_object = "output";
9024 err_tag = out_iter->first;
9026 // Only pass on attributes that match in both inputs.
9027 if (!in_iter->second->matches(*(out_iter->second)))
9029 // No match. Delete the attribute.
9030 int saved_tag = out_iter->first;
9031 delete out_iter->second;
9032 out_other_attributes->erase(out_iter);
9033 out_iter = out_other_attributes->upper_bound(saved_tag);
9037 // Matched. Keep the attribute and move to the next.
9045 // Attribute numbers >=64 (mod 128) can be safely ignored. */
9046 if ((err_tag & 127) < 64)
9048 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
9049 err_object, err_tag);
9053 gold_warning(_("%s: unknown EABI object attribute %d"),
9054 err_object, err_tag);
9060 // Return whether a relocation type used the LSB to distinguish THUMB
9062 template<bool big_endian>
9064 Target_arm<big_endian>::reloc_uses_thumb_bit(unsigned int r_type)
9068 case elfcpp::R_ARM_PC24:
9069 case elfcpp::R_ARM_ABS32:
9070 case elfcpp::R_ARM_REL32:
9071 case elfcpp::R_ARM_SBREL32:
9072 case elfcpp::R_ARM_THM_CALL:
9073 case elfcpp::R_ARM_GLOB_DAT:
9074 case elfcpp::R_ARM_JUMP_SLOT:
9075 case elfcpp::R_ARM_GOTOFF32:
9076 case elfcpp::R_ARM_PLT32:
9077 case elfcpp::R_ARM_CALL:
9078 case elfcpp::R_ARM_JUMP24:
9079 case elfcpp::R_ARM_THM_JUMP24:
9080 case elfcpp::R_ARM_SBREL31:
9081 case elfcpp::R_ARM_PREL31:
9082 case elfcpp::R_ARM_MOVW_ABS_NC:
9083 case elfcpp::R_ARM_MOVW_PREL_NC:
9084 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9085 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9086 case elfcpp::R_ARM_THM_JUMP19:
9087 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9088 case elfcpp::R_ARM_ALU_PC_G0_NC:
9089 case elfcpp::R_ARM_ALU_PC_G0:
9090 case elfcpp::R_ARM_ALU_PC_G1_NC:
9091 case elfcpp::R_ARM_ALU_PC_G1:
9092 case elfcpp::R_ARM_ALU_PC_G2:
9093 case elfcpp::R_ARM_ALU_SB_G0_NC:
9094 case elfcpp::R_ARM_ALU_SB_G0:
9095 case elfcpp::R_ARM_ALU_SB_G1_NC:
9096 case elfcpp::R_ARM_ALU_SB_G1:
9097 case elfcpp::R_ARM_ALU_SB_G2:
9098 case elfcpp::R_ARM_MOVW_BREL_NC:
9099 case elfcpp::R_ARM_MOVW_BREL:
9100 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9101 case elfcpp::R_ARM_THM_MOVW_BREL:
9108 // Stub-generation methods for Target_arm.
9110 // Make a new Arm_input_section object.
9112 template<bool big_endian>
9113 Arm_input_section<big_endian>*
9114 Target_arm<big_endian>::new_arm_input_section(
9118 Section_id sid(relobj, shndx);
9120 Arm_input_section<big_endian>* arm_input_section =
9121 new Arm_input_section<big_endian>(relobj, shndx);
9122 arm_input_section->init();
9124 // Register new Arm_input_section in map for look-up.
9125 std::pair<typename Arm_input_section_map::iterator, bool> ins =
9126 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
9128 // Make sure that it we have not created another Arm_input_section
9129 // for this input section already.
9130 gold_assert(ins.second);
9132 return arm_input_section;
9135 // Find the Arm_input_section object corresponding to the SHNDX-th input
9136 // section of RELOBJ.
9138 template<bool big_endian>
9139 Arm_input_section<big_endian>*
9140 Target_arm<big_endian>::find_arm_input_section(
9142 unsigned int shndx) const
9144 Section_id sid(relobj, shndx);
9145 typename Arm_input_section_map::const_iterator p =
9146 this->arm_input_section_map_.find(sid);
9147 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
9150 // Make a new stub table.
9152 template<bool big_endian>
9153 Stub_table<big_endian>*
9154 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
9156 Stub_table<big_endian>* stub_table =
9157 new Stub_table<big_endian>(owner);
9158 this->stub_tables_.push_back(stub_table);
9160 stub_table->set_address(owner->address() + owner->data_size());
9161 stub_table->set_file_offset(owner->offset() + owner->data_size());
9162 stub_table->finalize_data_size();
9167 // Scan a relocation for stub generation.
9169 template<bool big_endian>
9171 Target_arm<big_endian>::scan_reloc_for_stub(
9172 const Relocate_info<32, big_endian>* relinfo,
9173 unsigned int r_type,
9174 const Sized_symbol<32>* gsym,
9176 const Symbol_value<32>* psymval,
9177 elfcpp::Elf_types<32>::Elf_Swxword addend,
9178 Arm_address address)
9180 typedef typename Target_arm<big_endian>::Relocate Relocate;
9182 const Arm_relobj<big_endian>* arm_relobj =
9183 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9185 if (r_type == elfcpp::R_ARM_V4BX)
9187 const uint32_t reg = (addend & 0xf);
9188 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9191 // Try looking up an existing stub from a stub table.
9192 Stub_table<big_endian>* stub_table =
9193 arm_relobj->stub_table(relinfo->data_shndx);
9194 gold_assert(stub_table != NULL);
9196 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
9198 // create a new stub and add it to stub table.
9199 Arm_v4bx_stub* stub =
9200 this->stub_factory().make_arm_v4bx_stub(reg);
9201 gold_assert(stub != NULL);
9202 stub_table->add_arm_v4bx_stub(stub);
9209 bool target_is_thumb;
9210 Symbol_value<32> symval;
9213 // This is a global symbol. Determine if we use PLT and if the
9214 // final target is THUMB.
9215 if (gsym->use_plt_offset(Relocate::reloc_is_non_pic(r_type)))
9217 // This uses a PLT, change the symbol value.
9218 symval.set_output_value(this->plt_section()->address()
9219 + gsym->plt_offset());
9221 target_is_thumb = false;
9223 else if (gsym->is_undefined())
9224 // There is no need to generate a stub symbol is undefined.
9229 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
9230 || (gsym->type() == elfcpp::STT_FUNC
9231 && !gsym->is_undefined()
9232 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
9237 // This is a local symbol. Determine if the final target is THUMB.
9238 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
9241 // Strip LSB if this points to a THUMB target.
9243 && Target_arm<big_endian>::reloc_uses_thumb_bit(r_type)
9244 && ((psymval->value(arm_relobj, 0) & 1) != 0))
9246 Arm_address stripped_value =
9247 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
9248 symval.set_output_value(stripped_value);
9252 // Get the symbol value.
9253 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
9255 // Owing to pipelining, the PC relative branches below actually skip
9256 // two instructions when the branch offset is 0.
9257 Arm_address destination;
9260 case elfcpp::R_ARM_CALL:
9261 case elfcpp::R_ARM_JUMP24:
9262 case elfcpp::R_ARM_PLT32:
9264 destination = value + addend + 8;
9266 case elfcpp::R_ARM_THM_CALL:
9267 case elfcpp::R_ARM_THM_XPC22:
9268 case elfcpp::R_ARM_THM_JUMP24:
9269 case elfcpp::R_ARM_THM_JUMP19:
9271 destination = value + addend + 4;
9277 Reloc_stub* stub = NULL;
9278 Stub_type stub_type =
9279 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
9281 if (stub_type != arm_stub_none)
9283 // Try looking up an existing stub from a stub table.
9284 Stub_table<big_endian>* stub_table =
9285 arm_relobj->stub_table(relinfo->data_shndx);
9286 gold_assert(stub_table != NULL);
9288 // Locate stub by destination.
9289 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
9291 // Create a stub if there is not one already
9292 stub = stub_table->find_reloc_stub(stub_key);
9295 // create a new stub and add it to stub table.
9296 stub = this->stub_factory().make_reloc_stub(stub_type);
9297 stub_table->add_reloc_stub(stub, stub_key);
9300 // Record the destination address.
9301 stub->set_destination_address(destination
9302 | (target_is_thumb ? 1 : 0));
9305 // For Cortex-A8, we need to record a relocation at 4K page boundary.
9306 if (this->fix_cortex_a8_
9307 && (r_type == elfcpp::R_ARM_THM_JUMP24
9308 || r_type == elfcpp::R_ARM_THM_JUMP19
9309 || r_type == elfcpp::R_ARM_THM_CALL
9310 || r_type == elfcpp::R_ARM_THM_XPC22)
9311 && (address & 0xfffU) == 0xffeU)
9313 // Found a candidate. Note we haven't checked the destination is
9314 // within 4K here: if we do so (and don't create a record) we can't
9315 // tell that a branch should have been relocated when scanning later.
9316 this->cortex_a8_relocs_info_[address] =
9317 new Cortex_a8_reloc(stub, r_type,
9318 destination | (target_is_thumb ? 1 : 0));
9322 // This function scans a relocation sections for stub generation.
9323 // The template parameter Relocate must be a class type which provides
9324 // a single function, relocate(), which implements the machine
9325 // specific part of a relocation.
9327 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
9328 // SHT_REL or SHT_RELA.
9330 // PRELOCS points to the relocation data. RELOC_COUNT is the number
9331 // of relocs. OUTPUT_SECTION is the output section.
9332 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
9333 // mapped to output offsets.
9335 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
9336 // VIEW_SIZE is the size. These refer to the input section, unless
9337 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
9338 // the output section.
9340 template<bool big_endian>
9341 template<int sh_type>
9343 Target_arm<big_endian>::scan_reloc_section_for_stubs(
9344 const Relocate_info<32, big_endian>* relinfo,
9345 const unsigned char* prelocs,
9347 Output_section* output_section,
9348 bool needs_special_offset_handling,
9349 const unsigned char* view,
9350 elfcpp::Elf_types<32>::Elf_Addr view_address,
9353 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
9354 const int reloc_size =
9355 Reloc_types<sh_type, 32, big_endian>::reloc_size;
9357 Arm_relobj<big_endian>* arm_object =
9358 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9359 unsigned int local_count = arm_object->local_symbol_count();
9361 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
9363 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
9365 Reltype reloc(prelocs);
9367 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
9368 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9369 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
9371 r_type = this->get_real_reloc_type(r_type);
9373 // Only a few relocation types need stubs.
9374 if ((r_type != elfcpp::R_ARM_CALL)
9375 && (r_type != elfcpp::R_ARM_JUMP24)
9376 && (r_type != elfcpp::R_ARM_PLT32)
9377 && (r_type != elfcpp::R_ARM_THM_CALL)
9378 && (r_type != elfcpp::R_ARM_THM_XPC22)
9379 && (r_type != elfcpp::R_ARM_THM_JUMP24)
9380 && (r_type != elfcpp::R_ARM_THM_JUMP19)
9381 && (r_type != elfcpp::R_ARM_V4BX))
9384 section_offset_type offset =
9385 convert_to_section_size_type(reloc.get_r_offset());
9387 if (needs_special_offset_handling)
9389 offset = output_section->output_offset(relinfo->object,
9390 relinfo->data_shndx,
9396 if (r_type == elfcpp::R_ARM_V4BX)
9398 // Get the BX instruction.
9399 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
9400 const Valtype* wv = reinterpret_cast<const Valtype*>(view + offset);
9401 elfcpp::Elf_types<32>::Elf_Swxword insn =
9402 elfcpp::Swap<32, big_endian>::readval(wv);
9403 this->scan_reloc_for_stub(relinfo, r_type, NULL, 0, NULL,
9409 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
9410 elfcpp::Elf_types<32>::Elf_Swxword addend =
9411 stub_addend_reader(r_type, view + offset, reloc);
9413 const Sized_symbol<32>* sym;
9415 Symbol_value<32> symval;
9416 const Symbol_value<32> *psymval;
9417 if (r_sym < local_count)
9420 psymval = arm_object->local_symbol(r_sym);
9422 // If the local symbol belongs to a section we are discarding,
9423 // and that section is a debug section, try to find the
9424 // corresponding kept section and map this symbol to its
9425 // counterpart in the kept section. The symbol must not
9426 // correspond to a section we are folding.
9428 unsigned int shndx = psymval->input_shndx(&is_ordinary);
9430 && shndx != elfcpp::SHN_UNDEF
9431 && !arm_object->is_section_included(shndx)
9432 && !(relinfo->symtab->is_section_folded(arm_object, shndx)))
9434 if (comdat_behavior == CB_UNDETERMINED)
9437 arm_object->section_name(relinfo->data_shndx);
9438 comdat_behavior = get_comdat_behavior(name.c_str());
9440 if (comdat_behavior == CB_PRETEND)
9443 typename elfcpp::Elf_types<32>::Elf_Addr value =
9444 arm_object->map_to_kept_section(shndx, &found);
9446 symval.set_output_value(value + psymval->input_value());
9448 symval.set_output_value(0);
9452 symval.set_output_value(0);
9454 symval.set_no_output_symtab_entry();
9460 const Symbol* gsym = arm_object->global_symbol(r_sym);
9461 gold_assert(gsym != NULL);
9462 if (gsym->is_forwarder())
9463 gsym = relinfo->symtab->resolve_forwards(gsym);
9465 sym = static_cast<const Sized_symbol<32>*>(gsym);
9466 if (sym->has_symtab_index())
9467 symval.set_output_symtab_index(sym->symtab_index());
9469 symval.set_no_output_symtab_entry();
9471 // We need to compute the would-be final value of this global
9473 const Symbol_table* symtab = relinfo->symtab;
9474 const Sized_symbol<32>* sized_symbol =
9475 symtab->get_sized_symbol<32>(gsym);
9476 Symbol_table::Compute_final_value_status status;
9478 symtab->compute_final_value<32>(sized_symbol, &status);
9480 // Skip this if the symbol has not output section.
9481 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
9484 symval.set_output_value(value);
9488 // If symbol is a section symbol, we don't know the actual type of
9489 // destination. Give up.
9490 if (psymval->is_section_symbol())
9493 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
9494 addend, view_address + offset);
9498 // Scan an input section for stub generation.
9500 template<bool big_endian>
9502 Target_arm<big_endian>::scan_section_for_stubs(
9503 const Relocate_info<32, big_endian>* relinfo,
9504 unsigned int sh_type,
9505 const unsigned char* prelocs,
9507 Output_section* output_section,
9508 bool needs_special_offset_handling,
9509 const unsigned char* view,
9510 Arm_address view_address,
9511 section_size_type view_size)
9513 if (sh_type == elfcpp::SHT_REL)
9514 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
9519 needs_special_offset_handling,
9523 else if (sh_type == elfcpp::SHT_RELA)
9524 // We do not support RELA type relocations yet. This is provided for
9526 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
9531 needs_special_offset_handling,
9539 // Group input sections for stub generation.
9541 // We goup input sections in an output sections so that the total size,
9542 // including any padding space due to alignment is smaller than GROUP_SIZE
9543 // unless the only input section in group is bigger than GROUP_SIZE already.
9544 // Then an ARM stub table is created to follow the last input section
9545 // in group. For each group an ARM stub table is created an is placed
9546 // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further
9547 // extend the group after the stub table.
9549 template<bool big_endian>
9551 Target_arm<big_endian>::group_sections(
9553 section_size_type group_size,
9554 bool stubs_always_after_branch)
9556 // Group input sections and insert stub table
9557 Layout::Section_list section_list;
9558 layout->get_allocated_sections(§ion_list);
9559 for (Layout::Section_list::const_iterator p = section_list.begin();
9560 p != section_list.end();
9563 Arm_output_section<big_endian>* output_section =
9564 Arm_output_section<big_endian>::as_arm_output_section(*p);
9565 output_section->group_sections(group_size, stubs_always_after_branch,
9570 // Relaxation hook. This is where we do stub generation.
9572 template<bool big_endian>
9574 Target_arm<big_endian>::do_relax(
9576 const Input_objects* input_objects,
9577 Symbol_table* symtab,
9580 // No need to generate stubs if this is a relocatable link.
9581 gold_assert(!parameters->options().relocatable());
9583 // If this is the first pass, we need to group input sections into
9585 bool done_exidx_fixup = false;
9588 // Determine the stub group size. The group size is the absolute
9589 // value of the parameter --stub-group-size. If --stub-group-size
9590 // is passed a negative value, we restict stubs to be always after
9591 // the stubbed branches.
9592 int32_t stub_group_size_param =
9593 parameters->options().stub_group_size();
9594 bool stubs_always_after_branch = stub_group_size_param < 0;
9595 section_size_type stub_group_size = abs(stub_group_size_param);
9597 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
9598 // page as the first half of a 32-bit branch straddling two 4K pages.
9599 // This is a crude way of enforcing that.
9600 if (this->fix_cortex_a8_)
9601 stubs_always_after_branch = true;
9603 if (stub_group_size == 1)
9606 // Thumb branch range is +-4MB has to be used as the default
9607 // maximum size (a given section can contain both ARM and Thumb
9608 // code, so the worst case has to be taken into account).
9610 // This value is 24K less than that, which allows for 2025
9611 // 12-byte stubs. If we exceed that, then we will fail to link.
9612 // The user will have to relink with an explicit group size
9614 stub_group_size = 4170000;
9617 group_sections(layout, stub_group_size, stubs_always_after_branch);
9619 // Also fix .ARM.exidx section coverage.
9620 Output_section* os = layout->find_output_section(".ARM.exidx");
9621 if (os != NULL && os->type() == elfcpp::SHT_ARM_EXIDX)
9623 Arm_output_section<big_endian>* exidx_output_section =
9624 Arm_output_section<big_endian>::as_arm_output_section(os);
9625 this->fix_exidx_coverage(layout, exidx_output_section, symtab);
9626 done_exidx_fixup = true;
9630 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
9631 // beginning of each relaxation pass, just blow away all the stubs.
9632 // Alternatively, we could selectively remove only the stubs and reloc
9633 // information for code sections that have moved since the last pass.
9634 // That would require more book-keeping.
9635 typedef typename Stub_table_list::iterator Stub_table_iterator;
9636 if (this->fix_cortex_a8_)
9638 // Clear all Cortex-A8 reloc information.
9639 for (typename Cortex_a8_relocs_info::const_iterator p =
9640 this->cortex_a8_relocs_info_.begin();
9641 p != this->cortex_a8_relocs_info_.end();
9644 this->cortex_a8_relocs_info_.clear();
9646 // Remove all Cortex-A8 stubs.
9647 for (Stub_table_iterator sp = this->stub_tables_.begin();
9648 sp != this->stub_tables_.end();
9650 (*sp)->remove_all_cortex_a8_stubs();
9653 // Scan relocs for relocation stubs
9654 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9655 op != input_objects->relobj_end();
9658 Arm_relobj<big_endian>* arm_relobj =
9659 Arm_relobj<big_endian>::as_arm_relobj(*op);
9660 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
9663 // Check all stub tables to see if any of them have their data sizes
9664 // or addresses alignments changed. These are the only things that
9666 bool any_stub_table_changed = false;
9667 Unordered_set<const Output_section*> sections_needing_adjustment;
9668 for (Stub_table_iterator sp = this->stub_tables_.begin();
9669 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9672 if ((*sp)->update_data_size_and_addralign())
9674 // Update data size of stub table owner.
9675 Arm_input_section<big_endian>* owner = (*sp)->owner();
9676 uint64_t address = owner->address();
9677 off_t offset = owner->offset();
9678 owner->reset_address_and_file_offset();
9679 owner->set_address_and_file_offset(address, offset);
9681 sections_needing_adjustment.insert(owner->output_section());
9682 any_stub_table_changed = true;
9686 // Output_section_data::output_section() returns a const pointer but we
9687 // need to update output sections, so we record all output sections needing
9688 // update above and scan the sections here to find out what sections need
9690 for(Layout::Section_list::const_iterator p = layout->section_list().begin();
9691 p != layout->section_list().end();
9694 if (sections_needing_adjustment.find(*p)
9695 != sections_needing_adjustment.end())
9696 (*p)->set_section_offsets_need_adjustment();
9699 // Stop relaxation if no EXIDX fix-up and no stub table change.
9700 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
9702 // Finalize the stubs in the last relaxation pass.
9703 if (!continue_relaxation)
9705 for (Stub_table_iterator sp = this->stub_tables_.begin();
9706 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
9708 (*sp)->finalize_stubs();
9710 // Update output local symbol counts of objects if necessary.
9711 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
9712 op != input_objects->relobj_end();
9715 Arm_relobj<big_endian>* arm_relobj =
9716 Arm_relobj<big_endian>::as_arm_relobj(*op);
9718 // Update output local symbol counts. We need to discard local
9719 // symbols defined in parts of input sections that are discarded by
9721 if (arm_relobj->output_local_symbol_count_needs_update())
9722 arm_relobj->update_output_local_symbol_count();
9726 return continue_relaxation;
9731 template<bool big_endian>
9733 Target_arm<big_endian>::relocate_stub(
9735 const Relocate_info<32, big_endian>* relinfo,
9736 Output_section* output_section,
9737 unsigned char* view,
9738 Arm_address address,
9739 section_size_type view_size)
9742 const Stub_template* stub_template = stub->stub_template();
9743 for (size_t i = 0; i < stub_template->reloc_count(); i++)
9745 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
9746 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
9748 unsigned int r_type = insn->r_type();
9749 section_size_type reloc_offset = stub_template->reloc_offset(i);
9750 section_size_type reloc_size = insn->size();
9751 gold_assert(reloc_offset + reloc_size <= view_size);
9753 // This is the address of the stub destination.
9754 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
9755 Symbol_value<32> symval;
9756 symval.set_output_value(target);
9758 // Synthesize a fake reloc just in case. We don't have a symbol so
9760 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
9761 memset(reloc_buffer, 0, sizeof(reloc_buffer));
9762 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
9763 reloc_write.put_r_offset(reloc_offset);
9764 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
9765 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
9767 relocate.relocate(relinfo, this, output_section,
9768 this->fake_relnum_for_stubs, rel, r_type,
9769 NULL, &symval, view + reloc_offset,
9770 address + reloc_offset, reloc_size);
9774 // Determine whether an object attribute tag takes an integer, a
9777 template<bool big_endian>
9779 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
9781 if (tag == Object_attribute::Tag_compatibility)
9782 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9783 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
9784 else if (tag == elfcpp::Tag_nodefaults)
9785 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9786 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
9787 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
9788 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
9790 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
9792 return ((tag & 1) != 0
9793 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
9794 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
9797 // Reorder attributes.
9799 // The ABI defines that Tag_conformance should be emitted first, and that
9800 // Tag_nodefaults should be second (if either is defined). This sets those
9801 // two positions, and bumps up the position of all the remaining tags to
9804 template<bool big_endian>
9806 Target_arm<big_endian>::do_attributes_order(int num) const
9808 // Reorder the known object attributes in output. We want to move
9809 // Tag_conformance to position 4 and Tag_conformance to position 5
9810 // and shift eveything between 4 .. Tag_conformance - 1 to make room.
9812 return elfcpp::Tag_conformance;
9814 return elfcpp::Tag_nodefaults;
9815 if ((num - 2) < elfcpp::Tag_nodefaults)
9817 if ((num - 1) < elfcpp::Tag_conformance)
9822 // Scan a span of THUMB code for Cortex-A8 erratum.
9824 template<bool big_endian>
9826 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
9827 Arm_relobj<big_endian>* arm_relobj,
9829 section_size_type span_start,
9830 section_size_type span_end,
9831 const unsigned char* view,
9832 Arm_address address)
9834 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
9836 // The opcode is BLX.W, BL.W, B.W, Bcc.W
9837 // The branch target is in the same 4KB region as the
9838 // first half of the branch.
9839 // The instruction before the branch is a 32-bit
9840 // length non-branch instruction.
9841 section_size_type i = span_start;
9842 bool last_was_32bit = false;
9843 bool last_was_branch = false;
9844 while (i < span_end)
9846 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
9847 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
9848 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
9849 bool is_blx = false, is_b = false;
9850 bool is_bl = false, is_bcc = false;
9852 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
9855 // Load the rest of the insn (in manual-friendly order).
9856 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
9858 // Encoding T4: B<c>.W.
9859 is_b = (insn & 0xf800d000U) == 0xf0009000U;
9860 // Encoding T1: BL<c>.W.
9861 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
9862 // Encoding T2: BLX<c>.W.
9863 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
9864 // Encoding T3: B<c>.W (not permitted in IT block).
9865 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
9866 && (insn & 0x07f00000U) != 0x03800000U);
9869 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
9871 // If this instruction is a 32-bit THUMB branch that crosses a 4K
9872 // page boundary and it follows 32-bit non-branch instruction,
9873 // we need to work around.
9875 && ((address + i) & 0xfffU) == 0xffeU
9877 && !last_was_branch)
9879 // Check to see if there is a relocation stub for this branch.
9880 bool force_target_arm = false;
9881 bool force_target_thumb = false;
9882 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
9883 Cortex_a8_relocs_info::const_iterator p =
9884 this->cortex_a8_relocs_info_.find(address + i);
9886 if (p != this->cortex_a8_relocs_info_.end())
9888 cortex_a8_reloc = p->second;
9889 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
9891 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9892 && !target_is_thumb)
9893 force_target_arm = true;
9894 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
9896 force_target_thumb = true;
9900 Stub_type stub_type = arm_stub_none;
9902 // Check if we have an offending branch instruction.
9903 uint16_t upper_insn = (insn >> 16) & 0xffffU;
9904 uint16_t lower_insn = insn & 0xffffU;
9905 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
9907 if (cortex_a8_reloc != NULL
9908 && cortex_a8_reloc->reloc_stub() != NULL)
9909 // We've already made a stub for this instruction, e.g.
9910 // it's a long branch or a Thumb->ARM stub. Assume that
9911 // stub will suffice to work around the A8 erratum (see
9912 // setting of always_after_branch above).
9916 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
9918 stub_type = arm_stub_a8_veneer_b_cond;
9920 else if (is_b || is_bl || is_blx)
9922 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
9928 ? arm_stub_a8_veneer_blx
9930 ? arm_stub_a8_veneer_bl
9931 : arm_stub_a8_veneer_b));
9934 if (stub_type != arm_stub_none)
9936 Arm_address pc_for_insn = address + i + 4;
9938 // The original instruction is a BL, but the target is
9939 // an ARM instruction. If we were not making a stub,
9940 // the BL would have been converted to a BLX. Use the
9941 // BLX stub instead in that case.
9942 if (this->may_use_blx() && force_target_arm
9943 && stub_type == arm_stub_a8_veneer_bl)
9945 stub_type = arm_stub_a8_veneer_blx;
9949 // Conversely, if the original instruction was
9950 // BLX but the target is Thumb mode, use the BL stub.
9951 else if (force_target_thumb
9952 && stub_type == arm_stub_a8_veneer_blx)
9954 stub_type = arm_stub_a8_veneer_bl;
9962 // If we found a relocation, use the proper destination,
9963 // not the offset in the (unrelocated) instruction.
9964 // Note this is always done if we switched the stub type above.
9965 if (cortex_a8_reloc != NULL)
9966 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
9968 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
9970 // Add a new stub if destination address in in the same page.
9971 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
9973 Cortex_a8_stub* stub =
9974 this->stub_factory_.make_cortex_a8_stub(stub_type,
9978 Stub_table<big_endian>* stub_table =
9979 arm_relobj->stub_table(shndx);
9980 gold_assert(stub_table != NULL);
9981 stub_table->add_cortex_a8_stub(address + i, stub);
9986 i += insn_32bit ? 4 : 2;
9987 last_was_32bit = insn_32bit;
9988 last_was_branch = is_32bit_branch;
9992 // Apply the Cortex-A8 workaround.
9994 template<bool big_endian>
9996 Target_arm<big_endian>::apply_cortex_a8_workaround(
9997 const Cortex_a8_stub* stub,
9998 Arm_address stub_address,
9999 unsigned char* insn_view,
10000 Arm_address insn_address)
10002 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
10003 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
10004 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
10005 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
10006 off_t branch_offset = stub_address - (insn_address + 4);
10008 typedef struct Arm_relocate_functions<big_endian> RelocFuncs;
10009 switch (stub->stub_template()->type())
10011 case arm_stub_a8_veneer_b_cond:
10012 gold_assert(!utils::has_overflow<21>(branch_offset));
10013 upper_insn = RelocFuncs::thumb32_cond_branch_upper(upper_insn,
10015 lower_insn = RelocFuncs::thumb32_cond_branch_lower(lower_insn,
10019 case arm_stub_a8_veneer_b:
10020 case arm_stub_a8_veneer_bl:
10021 case arm_stub_a8_veneer_blx:
10022 if ((lower_insn & 0x5000U) == 0x4000U)
10023 // For a BLX instruction, make sure that the relocation is
10024 // rounded up to a word boundary. This follows the semantics of
10025 // the instruction which specifies that bit 1 of the target
10026 // address will come from bit 1 of the base address.
10027 branch_offset = (branch_offset + 2) & ~3;
10029 // Put BRANCH_OFFSET back into the insn.
10030 gold_assert(!utils::has_overflow<25>(branch_offset));
10031 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
10032 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
10036 gold_unreachable();
10039 // Put the relocated value back in the object file:
10040 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
10041 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
10044 template<bool big_endian>
10045 class Target_selector_arm : public Target_selector
10048 Target_selector_arm()
10049 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
10050 (big_endian ? "elf32-bigarm" : "elf32-littlearm"))
10054 do_instantiate_target()
10055 { return new Target_arm<big_endian>(); }
10058 // Fix .ARM.exidx section coverage.
10060 template<bool big_endian>
10062 Target_arm<big_endian>::fix_exidx_coverage(
10064 Arm_output_section<big_endian>* exidx_section,
10065 Symbol_table* symtab)
10067 // We need to look at all the input sections in output in ascending
10068 // order of of output address. We do that by building a sorted list
10069 // of output sections by addresses. Then we looks at the output sections
10070 // in order. The input sections in an output section are already sorted
10071 // by addresses within the output section.
10073 typedef std::set<Output_section*, output_section_address_less_than>
10074 Sorted_output_section_list;
10075 Sorted_output_section_list sorted_output_sections;
10076 Layout::Section_list section_list;
10077 layout->get_allocated_sections(§ion_list);
10078 for (Layout::Section_list::const_iterator p = section_list.begin();
10079 p != section_list.end();
10082 // We only care about output sections that contain executable code.
10083 if (((*p)->flags() & elfcpp::SHF_EXECINSTR) != 0)
10084 sorted_output_sections.insert(*p);
10087 // Go over the output sections in ascending order of output addresses.
10088 typedef typename Arm_output_section<big_endian>::Text_section_list
10090 Text_section_list sorted_text_sections;
10091 for(typename Sorted_output_section_list::iterator p =
10092 sorted_output_sections.begin();
10093 p != sorted_output_sections.end();
10096 Arm_output_section<big_endian>* arm_output_section =
10097 Arm_output_section<big_endian>::as_arm_output_section(*p);
10098 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
10101 exidx_section->fix_exidx_coverage(sorted_text_sections, symtab);
10104 Target_selector_arm<false> target_selector_arm;
10105 Target_selector_arm<true> target_selector_armbe;
10107 } // End anonymous namespace.