1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian>
62 class Output_data_plt_arm;
64 template<bool big_endian>
65 class Output_data_plt_arm_standard;
67 template<bool big_endian>
70 template<bool big_endian>
71 class Arm_input_section;
73 class Arm_exidx_cantunwind;
75 class Arm_exidx_merged_section;
77 class Arm_exidx_fixup;
79 template<bool big_endian>
80 class Arm_output_section;
82 class Arm_exidx_input_section;
84 template<bool big_endian>
87 template<bool big_endian>
88 class Arm_relocate_functions;
90 template<bool big_endian>
91 class Arm_output_data_got;
93 template<bool big_endian>
97 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
99 // Maximum branch offsets for ARM, THUMB and THUMB2.
100 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
101 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
102 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
103 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
104 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
105 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
107 // Thread Control Block size.
108 const size_t ARM_TCB_SIZE = 8;
110 // The arm target class.
112 // This is a very simple port of gold for ARM-EABI. It is intended for
113 // supporting Android only for the time being.
116 // - Implement all static relocation types documented in arm-reloc.def.
117 // - Make PLTs more flexible for different architecture features like
119 // There are probably a lot more.
121 // Ideally we would like to avoid using global variables but this is used
122 // very in many places and sometimes in loops. If we use a function
123 // returning a static instance of Arm_reloc_property_table, it will be very
124 // slow in an threaded environment since the static instance needs to be
125 // locked. The pointer is below initialized in the
126 // Target::do_select_as_default_target() hook so that we do not spend time
127 // building the table if we are not linking ARM objects.
129 // An alternative is to to process the information in arm-reloc.def in
130 // compilation time and generate a representation of it in PODs only. That
131 // way we can avoid initialization when the linker starts.
133 Arm_reloc_property_table* arm_reloc_property_table = NULL;
135 // Instruction template class. This class is similar to the insn_sequence
136 // struct in bfd/elf32-arm.c.
141 // Types of instruction templates.
145 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
146 // templates with class-specific semantics. Currently this is used
147 // only by the Cortex_a8_stub class for handling condition codes in
148 // conditional branches.
149 THUMB16_SPECIAL_TYPE,
155 // Factory methods to create instruction templates in different formats.
157 static const Insn_template
158 thumb16_insn(uint32_t data)
159 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
161 // A Thumb conditional branch, in which the proper condition is inserted
162 // when we build the stub.
163 static const Insn_template
164 thumb16_bcond_insn(uint32_t data)
165 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
167 static const Insn_template
168 thumb32_insn(uint32_t data)
169 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
171 static const Insn_template
172 thumb32_b_insn(uint32_t data, int reloc_addend)
174 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
178 static const Insn_template
179 arm_insn(uint32_t data)
180 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
182 static const Insn_template
183 arm_rel_insn(unsigned data, int reloc_addend)
184 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
186 static const Insn_template
187 data_word(unsigned data, unsigned int r_type, int reloc_addend)
188 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
190 // Accessors. This class is used for read-only objects so no modifiers
195 { return this->data_; }
197 // Return the instruction sequence type of this.
200 { return this->type_; }
202 // Return the ARM relocation type of this.
205 { return this->r_type_; }
209 { return this->reloc_addend_; }
211 // Return size of instruction template in bytes.
215 // Return byte-alignment of instruction template.
220 // We make the constructor private to ensure that only the factory
223 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
224 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
227 // Instruction specific data. This is used to store information like
228 // some of the instruction bits.
230 // Instruction template type.
232 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
233 unsigned int r_type_;
234 // Relocation addend.
235 int32_t reloc_addend_;
238 // Macro for generating code to stub types. One entry per long/short
242 DEF_STUB(long_branch_any_any) \
243 DEF_STUB(long_branch_v4t_arm_thumb) \
244 DEF_STUB(long_branch_thumb_only) \
245 DEF_STUB(long_branch_v4t_thumb_thumb) \
246 DEF_STUB(long_branch_v4t_thumb_arm) \
247 DEF_STUB(short_branch_v4t_thumb_arm) \
248 DEF_STUB(long_branch_any_arm_pic) \
249 DEF_STUB(long_branch_any_thumb_pic) \
250 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
251 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
252 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
253 DEF_STUB(long_branch_thumb_only_pic) \
254 DEF_STUB(a8_veneer_b_cond) \
255 DEF_STUB(a8_veneer_b) \
256 DEF_STUB(a8_veneer_bl) \
257 DEF_STUB(a8_veneer_blx) \
258 DEF_STUB(v4_veneer_bx)
262 #define DEF_STUB(x) arm_stub_##x,
268 // First reloc stub type.
269 arm_stub_reloc_first = arm_stub_long_branch_any_any,
270 // Last reloc stub type.
271 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
273 // First Cortex-A8 stub type.
274 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
275 // Last Cortex-A8 stub type.
276 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
279 arm_stub_type_last = arm_stub_v4_veneer_bx
283 // Stub template class. Templates are meant to be read-only objects.
284 // A stub template for a stub type contains all read-only attributes
285 // common to all stubs of the same type.
290 Stub_template(Stub_type, const Insn_template*, size_t);
298 { return this->type_; }
300 // Return an array of instruction templates.
303 { return this->insns_; }
305 // Return size of template in number of instructions.
308 { return this->insn_count_; }
310 // Return size of template in bytes.
313 { return this->size_; }
315 // Return alignment of the stub template.
318 { return this->alignment_; }
320 // Return whether entry point is in thumb mode.
322 entry_in_thumb_mode() const
323 { return this->entry_in_thumb_mode_; }
325 // Return number of relocations in this template.
328 { return this->relocs_.size(); }
330 // Return index of the I-th instruction with relocation.
332 reloc_insn_index(size_t i) const
334 gold_assert(i < this->relocs_.size());
335 return this->relocs_[i].first;
338 // Return the offset of the I-th instruction with relocation from the
339 // beginning of the stub.
341 reloc_offset(size_t i) const
343 gold_assert(i < this->relocs_.size());
344 return this->relocs_[i].second;
348 // This contains information about an instruction template with a relocation
349 // and its offset from start of stub.
350 typedef std::pair<size_t, section_size_type> Reloc;
352 // A Stub_template may not be copied. We want to share templates as much
354 Stub_template(const Stub_template&);
355 Stub_template& operator=(const Stub_template&);
359 // Points to an array of Insn_templates.
360 const Insn_template* insns_;
361 // Number of Insn_templates in insns_[].
363 // Size of templated instructions in bytes.
365 // Alignment of templated instructions.
367 // Flag to indicate if entry is in thumb mode.
368 bool entry_in_thumb_mode_;
369 // A table of reloc instruction indices and offsets. We can find these by
370 // looking at the instruction templates but we pre-compute and then stash
371 // them here for speed.
372 std::vector<Reloc> relocs_;
376 // A class for code stubs. This is a base class for different type of
377 // stubs used in the ARM target.
383 static const section_offset_type invalid_offset =
384 static_cast<section_offset_type>(-1);
387 Stub(const Stub_template* stub_template)
388 : stub_template_(stub_template), offset_(invalid_offset)
395 // Return the stub template.
397 stub_template() const
398 { return this->stub_template_; }
400 // Return offset of code stub from beginning of its containing stub table.
404 gold_assert(this->offset_ != invalid_offset);
405 return this->offset_;
408 // Set offset of code stub from beginning of its containing stub table.
410 set_offset(section_offset_type offset)
411 { this->offset_ = offset; }
413 // Return the relocation target address of the i-th relocation in the
414 // stub. This must be defined in a child class.
416 reloc_target(size_t i)
417 { return this->do_reloc_target(i); }
419 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
421 write(unsigned char* view, section_size_type view_size, bool big_endian)
422 { this->do_write(view, view_size, big_endian); }
424 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
425 // for the i-th instruction.
427 thumb16_special(size_t i)
428 { return this->do_thumb16_special(i); }
431 // This must be defined in the child class.
433 do_reloc_target(size_t) = 0;
435 // This may be overridden in the child class.
437 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
440 this->do_fixed_endian_write<true>(view, view_size);
442 this->do_fixed_endian_write<false>(view, view_size);
445 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
446 // instruction template.
448 do_thumb16_special(size_t)
449 { gold_unreachable(); }
452 // A template to implement do_write.
453 template<bool big_endian>
455 do_fixed_endian_write(unsigned char*, section_size_type);
458 const Stub_template* stub_template_;
459 // Offset within the section of containing this stub.
460 section_offset_type offset_;
463 // Reloc stub class. These are stubs we use to fix up relocation because
464 // of limited branch ranges.
466 class Reloc_stub : public Stub
469 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
470 // We assume we never jump to this address.
471 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
473 // Return destination address.
475 destination_address() const
477 gold_assert(this->destination_address_ != this->invalid_address);
478 return this->destination_address_;
481 // Set destination address.
483 set_destination_address(Arm_address address)
485 gold_assert(address != this->invalid_address);
486 this->destination_address_ = address;
489 // Reset destination address.
491 reset_destination_address()
492 { this->destination_address_ = this->invalid_address; }
494 // Determine stub type for a branch of a relocation of R_TYPE going
495 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
496 // the branch target is a thumb instruction. TARGET is used for look
497 // up ARM-specific linker settings.
499 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
500 Arm_address branch_target, bool target_is_thumb);
502 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
503 // and an addend. Since we treat global and local symbol differently, we
504 // use a Symbol object for a global symbol and a object-index pair for
509 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
510 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
511 // and R_SYM must not be invalid_index.
512 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
513 unsigned int r_sym, int32_t addend)
514 : stub_type_(stub_type), addend_(addend)
518 this->r_sym_ = Reloc_stub::invalid_index;
519 this->u_.symbol = symbol;
523 gold_assert(relobj != NULL && r_sym != invalid_index);
524 this->r_sym_ = r_sym;
525 this->u_.relobj = relobj;
532 // Accessors: Keys are meant to be read-only object so no modifiers are
538 { return this->stub_type_; }
540 // Return the local symbol index or invalid_index.
543 { return this->r_sym_; }
545 // Return the symbol if there is one.
548 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
550 // Return the relobj if there is one.
553 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
555 // Whether this equals to another key k.
557 eq(const Key& k) const
559 return ((this->stub_type_ == k.stub_type_)
560 && (this->r_sym_ == k.r_sym_)
561 && ((this->r_sym_ != Reloc_stub::invalid_index)
562 ? (this->u_.relobj == k.u_.relobj)
563 : (this->u_.symbol == k.u_.symbol))
564 && (this->addend_ == k.addend_));
567 // Return a hash value.
571 return (this->stub_type_
573 ^ gold::string_hash<char>(
574 (this->r_sym_ != Reloc_stub::invalid_index)
575 ? this->u_.relobj->name().c_str()
576 : this->u_.symbol->name())
580 // Functors for STL associative containers.
584 operator()(const Key& k) const
585 { return k.hash_value(); }
591 operator()(const Key& k1, const Key& k2) const
592 { return k1.eq(k2); }
595 // Name of key. This is mainly for debugging.
601 Stub_type stub_type_;
602 // If this is a local symbol, this is the index in the defining object.
603 // Otherwise, it is invalid_index for a global symbol.
605 // If r_sym_ is an invalid index, this points to a global symbol.
606 // Otherwise, it points to a relobj. We used the unsized and target
607 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
608 // Arm_relobj, in order to avoid making the stub class a template
609 // as most of the stub machinery is endianness-neutral. However, it
610 // may require a bit of casting done by users of this class.
613 const Symbol* symbol;
614 const Relobj* relobj;
616 // Addend associated with a reloc.
621 // Reloc_stubs are created via a stub factory. So these are protected.
622 Reloc_stub(const Stub_template* stub_template)
623 : Stub(stub_template), destination_address_(invalid_address)
629 friend class Stub_factory;
631 // Return the relocation target address of the i-th relocation in the
634 do_reloc_target(size_t i)
636 // All reloc stub have only one relocation.
638 return this->destination_address_;
642 // Address of destination.
643 Arm_address destination_address_;
646 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
647 // THUMB branch that meets the following conditions:
649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
650 // branch address is 0xffe.
651 // 2. The branch target address is in the same page as the first word of the
653 // 3. The branch follows a 32-bit instruction which is not a branch.
655 // To do the fix up, we need to store the address of the branch instruction
656 // and its target at least. We also need to store the original branch
657 // instruction bits for the condition code in a conditional branch. The
658 // condition code is used in a special instruction template. We also want
659 // to identify input sections needing Cortex-A8 workaround quickly. We store
660 // extra information about object and section index of the code section
661 // containing a branch being fixed up. The information is used to mark
662 // the code section when we finalize the Cortex-A8 stubs.
665 class Cortex_a8_stub : public Stub
671 // Return the object of the code section containing the branch being fixed
675 { return this->relobj_; }
677 // Return the section index of the code section containing the branch being
681 { return this->shndx_; }
683 // Return the source address of stub. This is the address of the original
684 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
687 source_address() const
688 { return this->source_address_; }
690 // Return the destination address of the stub. This is the branch taken
691 // address of the original branch instruction. LSB is 1 if it is a THUMB
692 // instruction address.
694 destination_address() const
695 { return this->destination_address_; }
697 // Return the instruction being fixed up.
699 original_insn() const
700 { return this->original_insn_; }
703 // Cortex_a8_stubs are created via a stub factory. So these are protected.
704 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
705 unsigned int shndx, Arm_address source_address,
706 Arm_address destination_address, uint32_t original_insn)
707 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
708 source_address_(source_address | 1U),
709 destination_address_(destination_address),
710 original_insn_(original_insn)
713 friend class Stub_factory;
715 // Return the relocation target address of the i-th relocation in the
718 do_reloc_target(size_t i)
720 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
722 // The conditional branch veneer has two relocations.
724 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
728 // All other Cortex-A8 stubs have only one relocation.
730 return this->destination_address_;
734 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
736 do_thumb16_special(size_t);
739 // Object of the code section containing the branch being fixed up.
741 // Section index of the code section containing the branch begin fixed up.
743 // Source address of original branch.
744 Arm_address source_address_;
745 // Destination address of the original branch.
746 Arm_address destination_address_;
747 // Original branch instruction. This is needed for copying the condition
748 // code from a condition branch to its stub.
749 uint32_t original_insn_;
752 // ARMv4 BX Rx branch relocation stub class.
753 class Arm_v4bx_stub : public Stub
759 // Return the associated register.
762 { return this->reg_; }
765 // Arm V4BX stubs are created via a stub factory. So these are protected.
766 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
767 : Stub(stub_template), reg_(reg)
770 friend class Stub_factory;
772 // Return the relocation target address of the i-th relocation in the
775 do_reloc_target(size_t)
776 { gold_unreachable(); }
778 // This may be overridden in the child class.
780 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
783 this->do_fixed_endian_v4bx_write<true>(view, view_size);
785 this->do_fixed_endian_v4bx_write<false>(view, view_size);
789 // A template to implement do_write.
790 template<bool big_endian>
792 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
794 const Insn_template* insns = this->stub_template()->insns();
795 elfcpp::Swap<32, big_endian>::writeval(view,
797 + (this->reg_ << 16)));
798 view += insns[0].size();
799 elfcpp::Swap<32, big_endian>::writeval(view,
800 (insns[1].data() + this->reg_));
801 view += insns[1].size();
802 elfcpp::Swap<32, big_endian>::writeval(view,
803 (insns[2].data() + this->reg_));
806 // A register index (r0-r14), which is associated with the stub.
810 // Stub factory class.
815 // Return the unique instance of this class.
816 static const Stub_factory&
819 static Stub_factory singleton;
823 // Make a relocation stub.
825 make_reloc_stub(Stub_type stub_type) const
827 gold_assert(stub_type >= arm_stub_reloc_first
828 && stub_type <= arm_stub_reloc_last);
829 return new Reloc_stub(this->stub_templates_[stub_type]);
832 // Make a Cortex-A8 stub.
834 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
835 Arm_address source, Arm_address destination,
836 uint32_t original_insn) const
838 gold_assert(stub_type >= arm_stub_cortex_a8_first
839 && stub_type <= arm_stub_cortex_a8_last);
840 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
841 source, destination, original_insn);
844 // Make an ARM V4BX relocation stub.
845 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
847 make_arm_v4bx_stub(uint32_t reg) const
849 gold_assert(reg < 0xf);
850 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
855 // Constructor and destructor are protected since we only return a single
856 // instance created in Stub_factory::get_instance().
860 // A Stub_factory may not be copied since it is a singleton.
861 Stub_factory(const Stub_factory&);
862 Stub_factory& operator=(Stub_factory&);
864 // Stub templates. These are initialized in the constructor.
865 const Stub_template* stub_templates_[arm_stub_type_last+1];
868 // A class to hold stubs for the ARM target.
870 template<bool big_endian>
871 class Stub_table : public Output_data
874 Stub_table(Arm_input_section<big_endian>* owner)
875 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0),
876 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
877 prev_data_size_(0), prev_addralign_(1)
883 // Owner of this stub table.
884 Arm_input_section<big_endian>*
886 { return this->owner_; }
888 // Whether this stub table is empty.
892 return (this->reloc_stubs_.empty()
893 && this->cortex_a8_stubs_.empty()
894 && this->arm_v4bx_stubs_.empty());
897 // Return the current data size.
899 current_data_size() const
900 { return this->current_data_size_for_child(); }
902 // Add a STUB using KEY. The caller is responsible for avoiding addition
903 // if a STUB with the same key has already been added.
905 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
907 const Stub_template* stub_template = stub->stub_template();
908 gold_assert(stub_template->type() == key.stub_type());
909 this->reloc_stubs_[key] = stub;
911 // Assign stub offset early. We can do this because we never remove
912 // reloc stubs and they are in the beginning of the stub table.
913 uint64_t align = stub_template->alignment();
914 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align);
915 stub->set_offset(this->reloc_stubs_size_);
916 this->reloc_stubs_size_ += stub_template->size();
917 this->reloc_stubs_addralign_ =
918 std::max(this->reloc_stubs_addralign_, align);
921 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
922 // The caller is responsible for avoiding addition if a STUB with the same
923 // address has already been added.
925 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
927 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
928 this->cortex_a8_stubs_.insert(value);
931 // Add an ARM V4BX relocation stub. A register index will be retrieved
934 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
936 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
937 this->arm_v4bx_stubs_[stub->reg()] = stub;
940 // Remove all Cortex-A8 stubs.
942 remove_all_cortex_a8_stubs();
944 // Look up a relocation stub using KEY. Return NULL if there is none.
946 find_reloc_stub(const Reloc_stub::Key& key) const
948 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
949 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
952 // Look up an arm v4bx relocation stub using the register index.
953 // Return NULL if there is none.
955 find_arm_v4bx_stub(const uint32_t reg) const
957 gold_assert(reg < 0xf);
958 return this->arm_v4bx_stubs_[reg];
961 // Relocate stubs in this stub table.
963 relocate_stubs(const Relocate_info<32, big_endian>*,
964 Target_arm<big_endian>*, Output_section*,
965 unsigned char*, Arm_address, section_size_type);
967 // Update data size and alignment at the end of a relaxation pass. Return
968 // true if either data size or alignment is different from that of the
969 // previous relaxation pass.
971 update_data_size_and_addralign();
973 // Finalize stubs. Set the offsets of all stubs and mark input sections
974 // needing the Cortex-A8 workaround.
978 // Apply Cortex-A8 workaround to an address range.
980 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
981 unsigned char*, Arm_address,
985 // Write out section contents.
987 do_write(Output_file*);
989 // Return the required alignment.
992 { return this->prev_addralign_; }
994 // Reset address and file offset.
996 do_reset_address_and_file_offset()
997 { this->set_current_data_size_for_child(this->prev_data_size_); }
999 // Set final data size.
1001 set_final_data_size()
1002 { this->set_data_size(this->current_data_size()); }
1005 // Relocate one stub.
1007 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
1008 Target_arm<big_endian>*, Output_section*,
1009 unsigned char*, Arm_address, section_size_type);
1011 // Unordered map of relocation stubs.
1013 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
1014 Reloc_stub::Key::equal_to>
1017 // List of Cortex-A8 stubs ordered by addresses of branches being
1018 // fixed up in output.
1019 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1020 // List of Arm V4BX relocation stubs ordered by associated registers.
1021 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1023 // Owner of this stub table.
1024 Arm_input_section<big_endian>* owner_;
1025 // The relocation stubs.
1026 Reloc_stub_map reloc_stubs_;
1027 // Size of reloc stubs.
1028 off_t reloc_stubs_size_;
1029 // Maximum address alignment of reloc stubs.
1030 uint64_t reloc_stubs_addralign_;
1031 // The cortex_a8_stubs.
1032 Cortex_a8_stub_list cortex_a8_stubs_;
1033 // The Arm V4BX relocation stubs.
1034 Arm_v4bx_stub_list arm_v4bx_stubs_;
1035 // data size of this in the previous pass.
1036 off_t prev_data_size_;
1037 // address alignment of this in the previous pass.
1038 uint64_t prev_addralign_;
1041 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1042 // we add to the end of an EXIDX input section that goes into the output.
1044 class Arm_exidx_cantunwind : public Output_section_data
1047 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1048 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1051 // Return the object containing the section pointed by this.
1054 { return this->relobj_; }
1056 // Return the section index of the section pointed by this.
1059 { return this->shndx_; }
1063 do_write(Output_file* of)
1065 if (parameters->target().is_big_endian())
1066 this->do_fixed_endian_write<true>(of);
1068 this->do_fixed_endian_write<false>(of);
1071 // Write to a map file.
1073 do_print_to_mapfile(Mapfile* mapfile) const
1074 { mapfile->print_output_data(this, _("** ARM cantunwind")); }
1077 // Implement do_write for a given endianness.
1078 template<bool big_endian>
1080 do_fixed_endian_write(Output_file*);
1082 // The object containing the section pointed by this.
1084 // The section index of the section pointed by this.
1085 unsigned int shndx_;
1088 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1089 // Offset map is used to map input section offset within the EXIDX section
1090 // to the output offset from the start of this EXIDX section.
1092 typedef std::map<section_offset_type, section_offset_type>
1093 Arm_exidx_section_offset_map;
1095 // Arm_exidx_merged_section class. This represents an EXIDX input section
1096 // with some of its entries merged.
1098 class Arm_exidx_merged_section : public Output_relaxed_input_section
1101 // Constructor for Arm_exidx_merged_section.
1102 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1103 // SECTION_OFFSET_MAP points to a section offset map describing how
1104 // parts of the input section are mapped to output. DELETED_BYTES is
1105 // the number of bytes deleted from the EXIDX input section.
1106 Arm_exidx_merged_section(
1107 const Arm_exidx_input_section& exidx_input_section,
1108 const Arm_exidx_section_offset_map& section_offset_map,
1109 uint32_t deleted_bytes);
1111 // Build output contents.
1113 build_contents(const unsigned char*, section_size_type);
1115 // Return the original EXIDX input section.
1116 const Arm_exidx_input_section&
1117 exidx_input_section() const
1118 { return this->exidx_input_section_; }
1120 // Return the section offset map.
1121 const Arm_exidx_section_offset_map&
1122 section_offset_map() const
1123 { return this->section_offset_map_; }
1126 // Write merged section into file OF.
1128 do_write(Output_file* of);
1131 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1132 section_offset_type*) const;
1135 // Original EXIDX input section.
1136 const Arm_exidx_input_section& exidx_input_section_;
1137 // Section offset map.
1138 const Arm_exidx_section_offset_map& section_offset_map_;
1139 // Merged section contents. We need to keep build the merged section
1140 // and save it here to avoid accessing the original EXIDX section when
1141 // we cannot lock the sections' object.
1142 unsigned char* section_contents_;
1145 // A class to wrap an ordinary input section containing executable code.
1147 template<bool big_endian>
1148 class Arm_input_section : public Output_relaxed_input_section
1151 Arm_input_section(Relobj* relobj, unsigned int shndx)
1152 : Output_relaxed_input_section(relobj, shndx, 1),
1153 original_addralign_(1), original_size_(0), stub_table_(NULL),
1154 original_contents_(NULL)
1157 ~Arm_input_section()
1158 { delete[] this->original_contents_; }
1164 // Whether this is a stub table owner.
1166 is_stub_table_owner() const
1167 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1169 // Return the stub table.
1170 Stub_table<big_endian>*
1172 { return this->stub_table_; }
1174 // Set the stub_table.
1176 set_stub_table(Stub_table<big_endian>* stub_table)
1177 { this->stub_table_ = stub_table; }
1179 // Downcast a base pointer to an Arm_input_section pointer. This is
1180 // not type-safe but we only use Arm_input_section not the base class.
1181 static Arm_input_section<big_endian>*
1182 as_arm_input_section(Output_relaxed_input_section* poris)
1183 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1185 // Return the original size of the section.
1187 original_size() const
1188 { return this->original_size_; }
1191 // Write data to output file.
1193 do_write(Output_file*);
1195 // Return required alignment of this.
1197 do_addralign() const
1199 if (this->is_stub_table_owner())
1200 return std::max(this->stub_table_->addralign(),
1201 static_cast<uint64_t>(this->original_addralign_));
1203 return this->original_addralign_;
1206 // Finalize data size.
1208 set_final_data_size();
1210 // Reset address and file offset.
1212 do_reset_address_and_file_offset();
1216 do_output_offset(const Relobj* object, unsigned int shndx,
1217 section_offset_type offset,
1218 section_offset_type* poutput) const
1220 if ((object == this->relobj())
1221 && (shndx == this->shndx())
1224 convert_types<section_offset_type, uint32_t>(this->original_size_)))
1234 // Copying is not allowed.
1235 Arm_input_section(const Arm_input_section&);
1236 Arm_input_section& operator=(const Arm_input_section&);
1238 // Address alignment of the original input section.
1239 uint32_t original_addralign_;
1240 // Section size of the original input section.
1241 uint32_t original_size_;
1243 Stub_table<big_endian>* stub_table_;
1244 // Original section contents. We have to make a copy here since the file
1245 // containing the original section may not be locked when we need to access
1247 unsigned char* original_contents_;
1250 // Arm_exidx_fixup class. This is used to define a number of methods
1251 // and keep states for fixing up EXIDX coverage.
1253 class Arm_exidx_fixup
1256 Arm_exidx_fixup(Output_section* exidx_output_section,
1257 bool merge_exidx_entries = true)
1258 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1259 last_inlined_entry_(0), last_input_section_(NULL),
1260 section_offset_map_(NULL), first_output_text_section_(NULL),
1261 merge_exidx_entries_(merge_exidx_entries)
1265 { delete this->section_offset_map_; }
1267 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1268 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1269 // number of bytes to be deleted in output. If parts of the input EXIDX
1270 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1271 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1272 // responsible for releasing it.
1273 template<bool big_endian>
1275 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1276 const unsigned char* section_contents,
1277 section_size_type section_size,
1278 Arm_exidx_section_offset_map** psection_offset_map);
1280 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1281 // input section, if there is not one already.
1283 add_exidx_cantunwind_as_needed();
1285 // Return the output section for the text section which is linked to the
1286 // first exidx input in output.
1288 first_output_text_section() const
1289 { return this->first_output_text_section_; }
1292 // Copying is not allowed.
1293 Arm_exidx_fixup(const Arm_exidx_fixup&);
1294 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1296 // Type of EXIDX unwind entry.
1301 // EXIDX_CANTUNWIND.
1302 UT_EXIDX_CANTUNWIND,
1309 // Process an EXIDX entry. We only care about the second word of the
1310 // entry. Return true if the entry can be deleted.
1312 process_exidx_entry(uint32_t second_word);
1314 // Update the current section offset map during EXIDX section fix-up.
1315 // If there is no map, create one. INPUT_OFFSET is the offset of a
1316 // reference point, DELETED_BYTES is the number of deleted by in the
1317 // section so far. If DELETE_ENTRY is true, the reference point and
1318 // all offsets after the previous reference point are discarded.
1320 update_offset_map(section_offset_type input_offset,
1321 section_size_type deleted_bytes, bool delete_entry);
1323 // EXIDX output section.
1324 Output_section* exidx_output_section_;
1325 // Unwind type of the last EXIDX entry processed.
1326 Unwind_type last_unwind_type_;
1327 // Last seen inlined EXIDX entry.
1328 uint32_t last_inlined_entry_;
1329 // Last processed EXIDX input section.
1330 const Arm_exidx_input_section* last_input_section_;
1331 // Section offset map created in process_exidx_section.
1332 Arm_exidx_section_offset_map* section_offset_map_;
1333 // Output section for the text section which is linked to the first exidx
1335 Output_section* first_output_text_section_;
1337 bool merge_exidx_entries_;
1340 // Arm output section class. This is defined mainly to add a number of
1341 // stub generation methods.
1343 template<bool big_endian>
1344 class Arm_output_section : public Output_section
1347 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1349 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1350 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1351 elfcpp::Elf_Xword flags)
1352 : Output_section(name, type,
1353 (type == elfcpp::SHT_ARM_EXIDX
1354 ? flags | elfcpp::SHF_LINK_ORDER
1357 if (type == elfcpp::SHT_ARM_EXIDX)
1358 this->set_always_keeps_input_sections();
1361 ~Arm_output_section()
1364 // Group input sections for stub generation.
1366 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*);
1368 // Downcast a base pointer to an Arm_output_section pointer. This is
1369 // not type-safe but we only use Arm_output_section not the base class.
1370 static Arm_output_section<big_endian>*
1371 as_arm_output_section(Output_section* os)
1372 { return static_cast<Arm_output_section<big_endian>*>(os); }
1374 // Append all input text sections in this into LIST.
1376 append_text_sections_to_list(Text_section_list* list);
1378 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1379 // is a list of text input sections sorted in ascending order of their
1380 // output addresses.
1382 fix_exidx_coverage(Layout* layout,
1383 const Text_section_list& sorted_text_section,
1384 Symbol_table* symtab,
1385 bool merge_exidx_entries,
1388 // Link an EXIDX section into its corresponding text section.
1390 set_exidx_section_link();
1394 typedef Output_section::Input_section Input_section;
1395 typedef Output_section::Input_section_list Input_section_list;
1397 // Create a stub group.
1398 void create_stub_group(Input_section_list::const_iterator,
1399 Input_section_list::const_iterator,
1400 Input_section_list::const_iterator,
1401 Target_arm<big_endian>*,
1402 std::vector<Output_relaxed_input_section*>*,
1406 // Arm_exidx_input_section class. This represents an EXIDX input section.
1408 class Arm_exidx_input_section
1411 static const section_offset_type invalid_offset =
1412 static_cast<section_offset_type>(-1);
1414 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1415 unsigned int link, uint32_t size,
1416 uint32_t addralign, uint32_t text_size)
1417 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1418 addralign_(addralign), text_size_(text_size), has_errors_(false)
1421 ~Arm_exidx_input_section()
1424 // Accessors: This is a read-only class.
1426 // Return the object containing this EXIDX input section.
1429 { return this->relobj_; }
1431 // Return the section index of this EXIDX input section.
1434 { return this->shndx_; }
1436 // Return the section index of linked text section in the same object.
1439 { return this->link_; }
1441 // Return size of the EXIDX input section.
1444 { return this->size_; }
1446 // Return address alignment of EXIDX input section.
1449 { return this->addralign_; }
1451 // Return size of the associated text input section.
1454 { return this->text_size_; }
1456 // Whether there are any errors in the EXIDX input section.
1459 { return this->has_errors_; }
1461 // Set has-errors flag.
1464 { this->has_errors_ = true; }
1467 // Object containing this.
1469 // Section index of this.
1470 unsigned int shndx_;
1471 // text section linked to this in the same object.
1473 // Size of this. For ARM 32-bit is sufficient.
1475 // Address alignment of this. For ARM 32-bit is sufficient.
1476 uint32_t addralign_;
1477 // Size of associated text section.
1478 uint32_t text_size_;
1479 // Whether this has any errors.
1483 // Arm_relobj class.
1485 template<bool big_endian>
1486 class Arm_relobj : public Sized_relobj_file<32, big_endian>
1489 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1491 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1492 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1493 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr),
1494 stub_tables_(), local_symbol_is_thumb_function_(),
1495 attributes_section_data_(NULL), mapping_symbols_info_(),
1496 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1497 output_local_symbol_count_needs_update_(false),
1498 merge_flags_and_attributes_(true)
1502 { delete this->attributes_section_data_; }
1504 // Return the stub table of the SHNDX-th section if there is one.
1505 Stub_table<big_endian>*
1506 stub_table(unsigned int shndx) const
1508 gold_assert(shndx < this->stub_tables_.size());
1509 return this->stub_tables_[shndx];
1512 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1514 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1516 gold_assert(shndx < this->stub_tables_.size());
1517 this->stub_tables_[shndx] = stub_table;
1520 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1521 // index. This is only valid after do_count_local_symbol is called.
1523 local_symbol_is_thumb_function(unsigned int r_sym) const
1525 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1526 return this->local_symbol_is_thumb_function_[r_sym];
1529 // Scan all relocation sections for stub generation.
1531 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1534 // Convert regular input section with index SHNDX to a relaxed section.
1536 convert_input_section_to_relaxed_section(unsigned shndx)
1538 // The stubs have relocations and we need to process them after writing
1539 // out the stubs. So relocation now must follow section write.
1540 this->set_section_offset(shndx, -1ULL);
1541 this->set_relocs_must_follow_section_writes();
1544 // Downcast a base pointer to an Arm_relobj pointer. This is
1545 // not type-safe but we only use Arm_relobj not the base class.
1546 static Arm_relobj<big_endian>*
1547 as_arm_relobj(Relobj* relobj)
1548 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1550 // Processor-specific flags in ELF file header. This is valid only after
1553 processor_specific_flags() const
1554 { return this->processor_specific_flags_; }
1556 // Attribute section data This is the contents of the .ARM.attribute section
1558 const Attributes_section_data*
1559 attributes_section_data() const
1560 { return this->attributes_section_data_; }
1562 // Mapping symbol location.
1563 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1565 // Functor for STL container.
1566 struct Mapping_symbol_position_less
1569 operator()(const Mapping_symbol_position& p1,
1570 const Mapping_symbol_position& p2) const
1572 return (p1.first < p2.first
1573 || (p1.first == p2.first && p1.second < p2.second));
1577 // We only care about the first character of a mapping symbol, so
1578 // we only store that instead of the whole symbol name.
1579 typedef std::map<Mapping_symbol_position, char,
1580 Mapping_symbol_position_less> Mapping_symbols_info;
1582 // Whether a section contains any Cortex-A8 workaround.
1584 section_has_cortex_a8_workaround(unsigned int shndx) const
1586 return (this->section_has_cortex_a8_workaround_ != NULL
1587 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1590 // Mark a section that has Cortex-A8 workaround.
1592 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1594 if (this->section_has_cortex_a8_workaround_ == NULL)
1595 this->section_has_cortex_a8_workaround_ =
1596 new std::vector<bool>(this->shnum(), false);
1597 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1600 // Return the EXIDX section of an text section with index SHNDX or NULL
1601 // if the text section has no associated EXIDX section.
1602 const Arm_exidx_input_section*
1603 exidx_input_section_by_link(unsigned int shndx) const
1605 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1606 return ((p != this->exidx_section_map_.end()
1607 && p->second->link() == shndx)
1612 // Return the EXIDX section with index SHNDX or NULL if there is none.
1613 const Arm_exidx_input_section*
1614 exidx_input_section_by_shndx(unsigned shndx) const
1616 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1617 return ((p != this->exidx_section_map_.end()
1618 && p->second->shndx() == shndx)
1623 // Whether output local symbol count needs updating.
1625 output_local_symbol_count_needs_update() const
1626 { return this->output_local_symbol_count_needs_update_; }
1628 // Set output_local_symbol_count_needs_update flag to be true.
1630 set_output_local_symbol_count_needs_update()
1631 { this->output_local_symbol_count_needs_update_ = true; }
1633 // Update output local symbol count at the end of relaxation.
1635 update_output_local_symbol_count();
1637 // Whether we want to merge processor-specific flags and attributes.
1639 merge_flags_and_attributes() const
1640 { return this->merge_flags_and_attributes_; }
1642 // Export list of EXIDX section indices.
1644 get_exidx_shndx_list(std::vector<unsigned int>* list) const
1647 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin();
1648 p != this->exidx_section_map_.end();
1651 if (p->second->shndx() == p->first)
1652 list->push_back(p->first);
1654 // Sort list to make result independent of implementation of map.
1655 std::sort(list->begin(), list->end());
1659 // Post constructor setup.
1663 // Call parent's setup method.
1664 Sized_relobj_file<32, big_endian>::do_setup();
1666 // Initialize look-up tables.
1667 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1668 this->stub_tables_.swap(empty_stub_table_list);
1671 // Count the local symbols.
1673 do_count_local_symbols(Stringpool_template<char>*,
1674 Stringpool_template<char>*);
1677 do_relocate_sections(
1678 const Symbol_table* symtab, const Layout* layout,
1679 const unsigned char* pshdrs, Output_file* of,
1680 typename Sized_relobj_file<32, big_endian>::Views* pivews);
1682 // Read the symbol information.
1684 do_read_symbols(Read_symbols_data* sd);
1686 // Process relocs for garbage collection.
1688 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1692 // Whether a section needs to be scanned for relocation stubs.
1694 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1695 const Relobj::Output_sections&,
1696 const Symbol_table*, const unsigned char*);
1698 // Whether a section is a scannable text section.
1700 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1701 const Output_section*, const Symbol_table*);
1703 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1705 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1706 unsigned int, Output_section*,
1707 const Symbol_table*);
1709 // Scan a section for the Cortex-A8 erratum.
1711 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1712 unsigned int, Output_section*,
1713 Target_arm<big_endian>*);
1715 // Find the linked text section of an EXIDX section by looking at the
1716 // first relocation of the EXIDX section. PSHDR points to the section
1717 // headers of a relocation section and PSYMS points to the local symbols.
1718 // PSHNDX points to a location storing the text section index if found.
1719 // Return whether we can find the linked section.
1721 find_linked_text_section(const unsigned char* pshdr,
1722 const unsigned char* psyms, unsigned int* pshndx);
1725 // Make a new Arm_exidx_input_section object for EXIDX section with
1726 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1727 // index of the linked text section.
1729 make_exidx_input_section(unsigned int shndx,
1730 const elfcpp::Shdr<32, big_endian>& shdr,
1731 unsigned int text_shndx,
1732 const elfcpp::Shdr<32, big_endian>& text_shdr);
1734 // Return the output address of either a plain input section or a
1735 // relaxed input section. SHNDX is the section index.
1737 simple_input_section_output_address(unsigned int, Output_section*);
1739 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1740 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1743 // List of stub tables.
1744 Stub_table_list stub_tables_;
1745 // Bit vector to tell if a local symbol is a thumb function or not.
1746 // This is only valid after do_count_local_symbol is called.
1747 std::vector<bool> local_symbol_is_thumb_function_;
1748 // processor-specific flags in ELF file header.
1749 elfcpp::Elf_Word processor_specific_flags_;
1750 // Object attributes if there is an .ARM.attributes section or NULL.
1751 Attributes_section_data* attributes_section_data_;
1752 // Mapping symbols information.
1753 Mapping_symbols_info mapping_symbols_info_;
1754 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1755 std::vector<bool>* section_has_cortex_a8_workaround_;
1756 // Map a text section to its associated .ARM.exidx section, if there is one.
1757 Exidx_section_map exidx_section_map_;
1758 // Whether output local symbol count needs updating.
1759 bool output_local_symbol_count_needs_update_;
1760 // Whether we merge processor flags and attributes of this object to
1762 bool merge_flags_and_attributes_;
1765 // Arm_dynobj class.
1767 template<bool big_endian>
1768 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1771 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1772 const elfcpp::Ehdr<32, big_endian>& ehdr)
1773 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1774 processor_specific_flags_(0), attributes_section_data_(NULL)
1778 { delete this->attributes_section_data_; }
1780 // Downcast a base pointer to an Arm_relobj pointer. This is
1781 // not type-safe but we only use Arm_relobj not the base class.
1782 static Arm_dynobj<big_endian>*
1783 as_arm_dynobj(Dynobj* dynobj)
1784 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1786 // Processor-specific flags in ELF file header. This is valid only after
1789 processor_specific_flags() const
1790 { return this->processor_specific_flags_; }
1792 // Attributes section data.
1793 const Attributes_section_data*
1794 attributes_section_data() const
1795 { return this->attributes_section_data_; }
1798 // Read the symbol information.
1800 do_read_symbols(Read_symbols_data* sd);
1803 // processor-specific flags in ELF file header.
1804 elfcpp::Elf_Word processor_specific_flags_;
1805 // Object attributes if there is an .ARM.attributes section or NULL.
1806 Attributes_section_data* attributes_section_data_;
1809 // Functor to read reloc addends during stub generation.
1811 template<int sh_type, bool big_endian>
1812 struct Stub_addend_reader
1814 // Return the addend for a relocation of a particular type. Depending
1815 // on whether this is a REL or RELA relocation, read the addend from a
1816 // view or from a Reloc object.
1817 elfcpp::Elf_types<32>::Elf_Swxword
1819 unsigned int /* r_type */,
1820 const unsigned char* /* view */,
1821 const typename Reloc_types<sh_type,
1822 32, big_endian>::Reloc& /* reloc */) const;
1825 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1827 template<bool big_endian>
1828 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1830 elfcpp::Elf_types<32>::Elf_Swxword
1833 const unsigned char*,
1834 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1837 // Specialized Stub_addend_reader for RELA type relocation sections.
1838 // We currently do not handle RELA type relocation sections but it is trivial
1839 // to implement the addend reader. This is provided for completeness and to
1840 // make it easier to add support for RELA relocation sections in the future.
1842 template<bool big_endian>
1843 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1845 elfcpp::Elf_types<32>::Elf_Swxword
1848 const unsigned char*,
1849 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1850 big_endian>::Reloc& reloc) const
1851 { return reloc.get_r_addend(); }
1854 // Cortex_a8_reloc class. We keep record of relocation that may need
1855 // the Cortex-A8 erratum workaround.
1857 class Cortex_a8_reloc
1860 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1861 Arm_address destination)
1862 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1868 // Accessors: This is a read-only class.
1870 // Return the relocation stub associated with this relocation if there is
1874 { return this->reloc_stub_; }
1876 // Return the relocation type.
1879 { return this->r_type_; }
1881 // Return the destination address of the relocation. LSB stores the THUMB
1885 { return this->destination_; }
1888 // Associated relocation stub if there is one, or NULL.
1889 const Reloc_stub* reloc_stub_;
1891 unsigned int r_type_;
1892 // Destination address of this relocation. LSB is used to distinguish
1894 Arm_address destination_;
1897 // Arm_output_data_got class. We derive this from Output_data_got to add
1898 // extra methods to handle TLS relocations in a static link.
1900 template<bool big_endian>
1901 class Arm_output_data_got : public Output_data_got<32, big_endian>
1904 Arm_output_data_got(Symbol_table* symtab, Layout* layout)
1905 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout)
1908 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1909 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1910 // applied in a static link.
1912 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1913 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); }
1915 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1916 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1917 // relocation that needs to be applied in a static link.
1919 add_static_reloc(unsigned int got_offset, unsigned int r_type,
1920 Sized_relobj_file<32, big_endian>* relobj,
1923 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj,
1927 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1928 // The first one is initialized to be 1, which is the module index for
1929 // the main executable and the second one 0. A reloc of the type
1930 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1931 // be applied by gold. GSYM is a global symbol.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym);
1935 // Same as the above but for a local symbol in OBJECT with INDEX.
1937 add_tls_gd32_with_static_reloc(unsigned int got_type,
1938 Sized_relobj_file<32, big_endian>* object,
1939 unsigned int index);
1942 // Write out the GOT table.
1944 do_write(Output_file*);
1947 // This class represent dynamic relocations that need to be applied by
1948 // gold because we are using TLS relocations in a static link.
1952 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1953 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true)
1954 { this->u_.global.symbol = gsym; }
1956 Static_reloc(unsigned int got_offset, unsigned int r_type,
1957 Sized_relobj_file<32, big_endian>* relobj, unsigned int index)
1958 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false)
1960 this->u_.local.relobj = relobj;
1961 this->u_.local.index = index;
1964 // Return the GOT offset.
1967 { return this->got_offset_; }
1972 { return this->r_type_; }
1974 // Whether the symbol is global or not.
1976 symbol_is_global() const
1977 { return this->symbol_is_global_; }
1979 // For a relocation against a global symbol, the global symbol.
1983 gold_assert(this->symbol_is_global_);
1984 return this->u_.global.symbol;
1987 // For a relocation against a local symbol, the defining object.
1988 Sized_relobj_file<32, big_endian>*
1991 gold_assert(!this->symbol_is_global_);
1992 return this->u_.local.relobj;
1995 // For a relocation against a local symbol, the local symbol index.
1999 gold_assert(!this->symbol_is_global_);
2000 return this->u_.local.index;
2004 // GOT offset of the entry to which this relocation is applied.
2005 unsigned int got_offset_;
2006 // Type of relocation.
2007 unsigned int r_type_;
2008 // Whether this relocation is against a global symbol.
2009 bool symbol_is_global_;
2010 // A global or local symbol.
2015 // For a global symbol, the symbol itself.
2020 // For a local symbol, the object defining object.
2021 Sized_relobj_file<32, big_endian>* relobj;
2022 // For a local symbol, the symbol index.
2028 // Symbol table of the output object.
2029 Symbol_table* symbol_table_;
2030 // Layout of the output object.
2032 // Static relocs to be applied to the GOT.
2033 std::vector<Static_reloc> static_relocs_;
2036 // The ARM target has many relocation types with odd-sizes or noncontiguous
2037 // bits. The default handling of relocatable relocation cannot process these
2038 // relocations. So we have to extend the default code.
2040 template<bool big_endian, int sh_type, typename Classify_reloc>
2041 class Arm_scan_relocatable_relocs :
2042 public Default_scan_relocatable_relocs<sh_type, Classify_reloc>
2045 // Return the strategy to use for a local symbol which is a section
2046 // symbol, given the relocation type.
2047 inline Relocatable_relocs::Reloc_strategy
2048 local_section_strategy(unsigned int r_type, Relobj*)
2050 if (sh_type == elfcpp::SHT_RELA)
2051 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA;
2054 if (r_type == elfcpp::R_ARM_TARGET1
2055 || r_type == elfcpp::R_ARM_TARGET2)
2057 const Target_arm<big_endian>* arm_target =
2058 Target_arm<big_endian>::default_target();
2059 r_type = arm_target->get_real_reloc_type(r_type);
2064 // Relocations that write nothing. These exclude R_ARM_TARGET1
2065 // and R_ARM_TARGET2.
2066 case elfcpp::R_ARM_NONE:
2067 case elfcpp::R_ARM_V4BX:
2068 case elfcpp::R_ARM_TLS_GOTDESC:
2069 case elfcpp::R_ARM_TLS_CALL:
2070 case elfcpp::R_ARM_TLS_DESCSEQ:
2071 case elfcpp::R_ARM_THM_TLS_CALL:
2072 case elfcpp::R_ARM_GOTRELAX:
2073 case elfcpp::R_ARM_GNU_VTENTRY:
2074 case elfcpp::R_ARM_GNU_VTINHERIT:
2075 case elfcpp::R_ARM_THM_TLS_DESCSEQ16:
2076 case elfcpp::R_ARM_THM_TLS_DESCSEQ32:
2077 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0;
2078 // These should have been converted to something else above.
2079 case elfcpp::R_ARM_TARGET1:
2080 case elfcpp::R_ARM_TARGET2:
2082 // Relocations that write full 32 bits and
2083 // have alignment of 1.
2084 case elfcpp::R_ARM_ABS32:
2085 case elfcpp::R_ARM_REL32:
2086 case elfcpp::R_ARM_SBREL32:
2087 case elfcpp::R_ARM_GOTOFF32:
2088 case elfcpp::R_ARM_BASE_PREL:
2089 case elfcpp::R_ARM_GOT_BREL:
2090 case elfcpp::R_ARM_BASE_ABS:
2091 case elfcpp::R_ARM_ABS32_NOI:
2092 case elfcpp::R_ARM_REL32_NOI:
2093 case elfcpp::R_ARM_PLT32_ABS:
2094 case elfcpp::R_ARM_GOT_ABS:
2095 case elfcpp::R_ARM_GOT_PREL:
2096 case elfcpp::R_ARM_TLS_GD32:
2097 case elfcpp::R_ARM_TLS_LDM32:
2098 case elfcpp::R_ARM_TLS_LDO32:
2099 case elfcpp::R_ARM_TLS_IE32:
2100 case elfcpp::R_ARM_TLS_LE32:
2101 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED;
2103 // For all other static relocations, return RELOC_SPECIAL.
2104 return Relocatable_relocs::RELOC_SPECIAL;
2110 template<bool big_endian>
2111 class Target_arm : public Sized_target<32, big_endian>
2114 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
2117 // When were are relocating a stub, we pass this as the relocation number.
2118 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
2120 Target_arm(const Target::Target_info* info = &arm_info)
2121 : Sized_target<32, big_endian>(info),
2122 got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL),
2123 copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL),
2124 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2125 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2126 should_force_pic_veneer_(false),
2127 arm_input_section_map_(), attributes_section_data_(NULL),
2128 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2131 // Whether we force PCI branch veneers.
2133 should_force_pic_veneer() const
2134 { return this->should_force_pic_veneer_; }
2136 // Set PIC veneer flag.
2138 set_should_force_pic_veneer(bool value)
2139 { this->should_force_pic_veneer_ = value; }
2141 // Whether we use THUMB-2 instructions.
2143 using_thumb2() const
2145 Object_attribute* attr =
2146 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2147 int arch = attr->int_value();
2148 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
2151 // Whether we use THUMB/THUMB-2 instructions only.
2153 using_thumb_only() const
2155 Object_attribute* attr =
2156 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2158 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2159 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M)
2161 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
2162 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
2164 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
2165 return attr->int_value() == 'M';
2168 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2170 may_use_arm_nop() const
2172 Object_attribute* attr =
2173 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2174 int arch = attr->int_value();
2175 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2176 || arch == elfcpp::TAG_CPU_ARCH_V6K
2177 || arch == elfcpp::TAG_CPU_ARCH_V7
2178 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2181 // Whether we have THUMB-2 NOP.W instruction.
2183 may_use_thumb2_nop() const
2185 Object_attribute* attr =
2186 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2187 int arch = attr->int_value();
2188 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2189 || arch == elfcpp::TAG_CPU_ARCH_V7
2190 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2193 // Whether we have v4T interworking instructions available.
2195 may_use_v4t_interworking() const
2197 Object_attribute* attr =
2198 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2199 int arch = attr->int_value();
2200 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2201 && arch != elfcpp::TAG_CPU_ARCH_V4);
2204 // Whether we have v5T interworking instructions available.
2206 may_use_v5t_interworking() const
2208 Object_attribute* attr =
2209 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2210 int arch = attr->int_value();
2211 if (parameters->options().fix_arm1176())
2212 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2213 || arch == elfcpp::TAG_CPU_ARCH_V7
2214 || arch == elfcpp::TAG_CPU_ARCH_V6_M
2215 || arch == elfcpp::TAG_CPU_ARCH_V6S_M
2216 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2218 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2219 && arch != elfcpp::TAG_CPU_ARCH_V4
2220 && arch != elfcpp::TAG_CPU_ARCH_V4T);
2223 // Process the relocations to determine unreferenced sections for
2224 // garbage collection.
2226 gc_process_relocs(Symbol_table* symtab,
2228 Sized_relobj_file<32, big_endian>* object,
2229 unsigned int data_shndx,
2230 unsigned int sh_type,
2231 const unsigned char* prelocs,
2233 Output_section* output_section,
2234 bool needs_special_offset_handling,
2235 size_t local_symbol_count,
2236 const unsigned char* plocal_symbols);
2238 // Scan the relocations to look for symbol adjustments.
2240 scan_relocs(Symbol_table* symtab,
2242 Sized_relobj_file<32, big_endian>* object,
2243 unsigned int data_shndx,
2244 unsigned int sh_type,
2245 const unsigned char* prelocs,
2247 Output_section* output_section,
2248 bool needs_special_offset_handling,
2249 size_t local_symbol_count,
2250 const unsigned char* plocal_symbols);
2252 // Finalize the sections.
2254 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
2256 // Return the value to use for a dynamic symbol which requires special
2259 do_dynsym_value(const Symbol*) const;
2261 // Relocate a section.
2263 relocate_section(const Relocate_info<32, big_endian>*,
2264 unsigned int sh_type,
2265 const unsigned char* prelocs,
2267 Output_section* output_section,
2268 bool needs_special_offset_handling,
2269 unsigned char* view,
2270 Arm_address view_address,
2271 section_size_type view_size,
2272 const Reloc_symbol_changes*);
2274 // Scan the relocs during a relocatable link.
2276 scan_relocatable_relocs(Symbol_table* symtab,
2278 Sized_relobj_file<32, big_endian>* object,
2279 unsigned int data_shndx,
2280 unsigned int sh_type,
2281 const unsigned char* prelocs,
2283 Output_section* output_section,
2284 bool needs_special_offset_handling,
2285 size_t local_symbol_count,
2286 const unsigned char* plocal_symbols,
2287 Relocatable_relocs*);
2289 // Emit relocations for a section.
2291 relocate_relocs(const Relocate_info<32, big_endian>*,
2292 unsigned int sh_type,
2293 const unsigned char* prelocs,
2295 Output_section* output_section,
2296 typename elfcpp::Elf_types<32>::Elf_Off
2297 offset_in_output_section,
2298 const Relocatable_relocs*,
2299 unsigned char* view,
2300 Arm_address view_address,
2301 section_size_type view_size,
2302 unsigned char* reloc_view,
2303 section_size_type reloc_view_size);
2305 // Perform target-specific processing in a relocatable link. This is
2306 // only used if we use the relocation strategy RELOC_SPECIAL.
2308 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo,
2309 unsigned int sh_type,
2310 const unsigned char* preloc_in,
2312 Output_section* output_section,
2313 typename elfcpp::Elf_types<32>::Elf_Off
2314 offset_in_output_section,
2315 unsigned char* view,
2316 typename elfcpp::Elf_types<32>::Elf_Addr
2318 section_size_type view_size,
2319 unsigned char* preloc_out);
2321 // Return whether SYM is defined by the ABI.
2323 do_is_defined_by_abi(const Symbol* sym) const
2324 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
2326 // Return whether there is a GOT section.
2328 has_got_section() const
2329 { return this->got_ != NULL; }
2331 // Return the size of the GOT section.
2335 gold_assert(this->got_ != NULL);
2336 return this->got_->data_size();
2339 // Return the number of entries in the GOT.
2341 got_entry_count() const
2343 if (!this->has_got_section())
2345 return this->got_size() / 4;
2348 // Return the number of entries in the PLT.
2350 plt_entry_count() const;
2352 // Return the offset of the first non-reserved PLT entry.
2354 first_plt_entry_offset() const;
2356 // Return the size of each PLT entry.
2358 plt_entry_size() const;
2360 // Map platform-specific reloc types
2362 get_real_reloc_type(unsigned int r_type);
2365 // Methods to support stub-generations.
2368 // Return the stub factory
2370 stub_factory() const
2371 { return this->stub_factory_; }
2373 // Make a new Arm_input_section object.
2374 Arm_input_section<big_endian>*
2375 new_arm_input_section(Relobj*, unsigned int);
2377 // Find the Arm_input_section object corresponding to the SHNDX-th input
2378 // section of RELOBJ.
2379 Arm_input_section<big_endian>*
2380 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2382 // Make a new Stub_table
2383 Stub_table<big_endian>*
2384 new_stub_table(Arm_input_section<big_endian>*);
2386 // Scan a section for stub generation.
2388 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2389 const unsigned char*, size_t, Output_section*,
2390 bool, const unsigned char*, Arm_address,
2395 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2396 Output_section*, unsigned char*, Arm_address,
2399 // Get the default ARM target.
2400 static Target_arm<big_endian>*
2403 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2404 && parameters->target().is_big_endian() == big_endian);
2405 return static_cast<Target_arm<big_endian>*>(
2406 parameters->sized_target<32, big_endian>());
2409 // Whether NAME belongs to a mapping symbol.
2411 is_mapping_symbol_name(const char* name)
2415 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2416 && (name[2] == '\0' || name[2] == '.'));
2419 // Whether we work around the Cortex-A8 erratum.
2421 fix_cortex_a8() const
2422 { return this->fix_cortex_a8_; }
2424 // Whether we merge exidx entries in debuginfo.
2426 merge_exidx_entries() const
2427 { return parameters->options().merge_exidx_entries(); }
2429 // Whether we fix R_ARM_V4BX relocation.
2431 // 1 - replace with MOV instruction (armv4 target)
2432 // 2 - make interworking veneer (>= armv4t targets only)
2433 General_options::Fix_v4bx
2435 { return parameters->options().fix_v4bx(); }
2437 // Scan a span of THUMB code section for Cortex-A8 erratum.
2439 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2440 section_size_type, section_size_type,
2441 const unsigned char*, Arm_address);
2443 // Apply Cortex-A8 workaround to a branch.
2445 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2446 unsigned char*, Arm_address);
2449 // Make the PLT-generator object.
2450 Output_data_plt_arm<big_endian>*
2451 make_data_plt(Layout* layout, Output_data_space* got_plt)
2452 { return this->do_make_data_plt(layout, got_plt); }
2454 // Make an ELF object.
2456 do_make_elf_object(const std::string&, Input_file*, off_t,
2457 const elfcpp::Ehdr<32, big_endian>& ehdr);
2460 do_make_elf_object(const std::string&, Input_file*, off_t,
2461 const elfcpp::Ehdr<32, !big_endian>&)
2462 { gold_unreachable(); }
2465 do_make_elf_object(const std::string&, Input_file*, off_t,
2466 const elfcpp::Ehdr<64, false>&)
2467 { gold_unreachable(); }
2470 do_make_elf_object(const std::string&, Input_file*, off_t,
2471 const elfcpp::Ehdr<64, true>&)
2472 { gold_unreachable(); }
2474 // Make an output section.
2476 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2477 elfcpp::Elf_Xword flags)
2478 { return new Arm_output_section<big_endian>(name, type, flags); }
2481 do_adjust_elf_header(unsigned char* view, int len);
2483 // We only need to generate stubs, and hence perform relaxation if we are
2484 // not doing relocatable linking.
2486 do_may_relax() const
2487 { return !parameters->options().relocatable(); }
2490 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*);
2492 // Determine whether an object attribute tag takes an integer, a
2495 do_attribute_arg_type(int tag) const;
2497 // Reorder tags during output.
2499 do_attributes_order(int num) const;
2501 // This is called when the target is selected as the default.
2503 do_select_as_default_target()
2505 // No locking is required since there should only be one default target.
2506 // We cannot have both the big-endian and little-endian ARM targets
2508 gold_assert(arm_reloc_property_table == NULL);
2509 arm_reloc_property_table = new Arm_reloc_property_table();
2512 // Virtual function which is set to return true by a target if
2513 // it can use relocation types to determine if a function's
2514 // pointer is taken.
2516 do_can_check_for_function_pointers() const
2519 // Whether a section called SECTION_NAME may have function pointers to
2520 // sections not eligible for safe ICF folding.
2522 do_section_may_have_icf_unsafe_pointers(const char* section_name) const
2524 return (!is_prefix_of(".ARM.exidx", section_name)
2525 && !is_prefix_of(".ARM.extab", section_name)
2526 && Target::do_section_may_have_icf_unsafe_pointers(section_name));
2530 do_define_standard_symbols(Symbol_table*, Layout*);
2532 virtual Output_data_plt_arm<big_endian>*
2533 do_make_data_plt(Layout* layout, Output_data_space* got_plt)
2535 return new Output_data_plt_arm_standard<big_endian>(layout, got_plt);
2539 // The class which scans relocations.
2544 : issued_non_pic_error_(false)
2548 get_reference_flags(unsigned int r_type);
2551 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2552 Sized_relobj_file<32, big_endian>* object,
2553 unsigned int data_shndx,
2554 Output_section* output_section,
2555 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2556 const elfcpp::Sym<32, big_endian>& lsym,
2560 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2561 Sized_relobj_file<32, big_endian>* object,
2562 unsigned int data_shndx,
2563 Output_section* output_section,
2564 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2568 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2569 Sized_relobj_file<32, big_endian>* ,
2572 const elfcpp::Rel<32, big_endian>& ,
2574 const elfcpp::Sym<32, big_endian>&);
2577 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2578 Sized_relobj_file<32, big_endian>* ,
2581 const elfcpp::Rel<32, big_endian>& ,
2582 unsigned int , Symbol*);
2586 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*,
2587 unsigned int r_type);
2590 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*,
2591 unsigned int r_type, Symbol*);
2594 check_non_pic(Relobj*, unsigned int r_type);
2596 // Almost identical to Symbol::needs_plt_entry except that it also
2597 // handles STT_ARM_TFUNC.
2599 symbol_needs_plt_entry(const Symbol* sym)
2601 // An undefined symbol from an executable does not need a PLT entry.
2602 if (sym->is_undefined() && !parameters->options().shared())
2605 return (!parameters->doing_static_link()
2606 && (sym->type() == elfcpp::STT_FUNC
2607 || sym->type() == elfcpp::STT_ARM_TFUNC)
2608 && (sym->is_from_dynobj()
2609 || sym->is_undefined()
2610 || sym->is_preemptible()));
2614 possible_function_pointer_reloc(unsigned int r_type);
2616 // Whether we have issued an error about a non-PIC compilation.
2617 bool issued_non_pic_error_;
2620 // The class which implements relocation.
2630 // Return whether the static relocation needs to be applied.
2632 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2633 unsigned int r_type,
2635 Output_section* output_section);
2637 // Do a relocation. Return false if the caller should not issue
2638 // any warnings about this relocation.
2640 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2641 Output_section*, size_t relnum,
2642 const elfcpp::Rel<32, big_endian>&,
2643 unsigned int r_type, const Sized_symbol<32>*,
2644 const Symbol_value<32>*,
2645 unsigned char*, Arm_address,
2648 // Return whether we want to pass flag NON_PIC_REF for this
2649 // reloc. This means the relocation type accesses a symbol not via
2652 reloc_is_non_pic(unsigned int r_type)
2656 // These relocation types reference GOT or PLT entries explicitly.
2657 case elfcpp::R_ARM_GOT_BREL:
2658 case elfcpp::R_ARM_GOT_ABS:
2659 case elfcpp::R_ARM_GOT_PREL:
2660 case elfcpp::R_ARM_GOT_BREL12:
2661 case elfcpp::R_ARM_PLT32_ABS:
2662 case elfcpp::R_ARM_TLS_GD32:
2663 case elfcpp::R_ARM_TLS_LDM32:
2664 case elfcpp::R_ARM_TLS_IE32:
2665 case elfcpp::R_ARM_TLS_IE12GP:
2667 // These relocate types may use PLT entries.
2668 case elfcpp::R_ARM_CALL:
2669 case elfcpp::R_ARM_THM_CALL:
2670 case elfcpp::R_ARM_JUMP24:
2671 case elfcpp::R_ARM_THM_JUMP24:
2672 case elfcpp::R_ARM_THM_JUMP19:
2673 case elfcpp::R_ARM_PLT32:
2674 case elfcpp::R_ARM_THM_XPC22:
2675 case elfcpp::R_ARM_PREL31:
2676 case elfcpp::R_ARM_SBREL31:
2685 // Do a TLS relocation.
2686 inline typename Arm_relocate_functions<big_endian>::Status
2687 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*,
2688 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int,
2689 const Sized_symbol<32>*, const Symbol_value<32>*,
2690 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr,
2695 // A class which returns the size required for a relocation type,
2696 // used while scanning relocs during a relocatable link.
2697 class Relocatable_size_for_reloc
2701 get_size_for_reloc(unsigned int, Relobj*);
2704 // Adjust TLS relocation type based on the options and whether this
2705 // is a local symbol.
2706 static tls::Tls_optimization
2707 optimize_tls_reloc(bool is_final, int r_type);
2709 // Get the GOT section, creating it if necessary.
2710 Arm_output_data_got<big_endian>*
2711 got_section(Symbol_table*, Layout*);
2713 // Get the GOT PLT section.
2715 got_plt_section() const
2717 gold_assert(this->got_plt_ != NULL);
2718 return this->got_plt_;
2721 // Create a PLT entry for a global symbol.
2723 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2725 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2727 define_tls_base_symbol(Symbol_table*, Layout*);
2729 // Create a GOT entry for the TLS module index.
2731 got_mod_index_entry(Symbol_table* symtab, Layout* layout,
2732 Sized_relobj_file<32, big_endian>* object);
2734 // Get the PLT section.
2735 const Output_data_plt_arm<big_endian>*
2738 gold_assert(this->plt_ != NULL);
2742 // Get the dynamic reloc section, creating it if necessary.
2744 rel_dyn_section(Layout*);
2746 // Get the section to use for TLS_DESC relocations.
2748 rel_tls_desc_section(Layout*) const;
2750 // Return true if the symbol may need a COPY relocation.
2751 // References from an executable object to non-function symbols
2752 // defined in a dynamic object may need a COPY relocation.
2754 may_need_copy_reloc(Symbol* gsym)
2756 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2757 && gsym->may_need_copy_reloc());
2760 // Add a potential copy relocation.
2762 copy_reloc(Symbol_table* symtab, Layout* layout,
2763 Sized_relobj_file<32, big_endian>* object,
2764 unsigned int shndx, Output_section* output_section,
2765 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2767 this->copy_relocs_.copy_reloc(symtab, layout,
2768 symtab->get_sized_symbol<32>(sym),
2769 object, shndx, output_section, reloc,
2770 this->rel_dyn_section(layout));
2773 // Whether two EABI versions are compatible.
2775 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2777 // Merge processor-specific flags from input object and those in the ELF
2778 // header of the output.
2780 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2782 // Get the secondary compatible architecture.
2784 get_secondary_compatible_arch(const Attributes_section_data*);
2786 // Set the secondary compatible architecture.
2788 set_secondary_compatible_arch(Attributes_section_data*, int);
2791 tag_cpu_arch_combine(const char*, int, int*, int, int);
2793 // Helper to print AEABI enum tag value.
2795 aeabi_enum_name(unsigned int);
2797 // Return string value for TAG_CPU_name.
2799 tag_cpu_name_value(unsigned int);
2801 // Merge object attributes from input object and those in the output.
2803 merge_object_attributes(const char*, const Attributes_section_data*);
2805 // Helper to get an AEABI object attribute
2807 get_aeabi_object_attribute(int tag) const
2809 Attributes_section_data* pasd = this->attributes_section_data_;
2810 gold_assert(pasd != NULL);
2811 Object_attribute* attr =
2812 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2813 gold_assert(attr != NULL);
2818 // Methods to support stub-generations.
2821 // Group input sections for stub generation.
2823 group_sections(Layout*, section_size_type, bool, const Task*);
2825 // Scan a relocation for stub generation.
2827 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2828 const Sized_symbol<32>*, unsigned int,
2829 const Symbol_value<32>*,
2830 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2832 // Scan a relocation section for stub.
2833 template<int sh_type>
2835 scan_reloc_section_for_stubs(
2836 const Relocate_info<32, big_endian>* relinfo,
2837 const unsigned char* prelocs,
2839 Output_section* output_section,
2840 bool needs_special_offset_handling,
2841 const unsigned char* view,
2842 elfcpp::Elf_types<32>::Elf_Addr view_address,
2845 // Fix .ARM.exidx section coverage.
2847 fix_exidx_coverage(Layout*, const Input_objects*,
2848 Arm_output_section<big_endian>*, Symbol_table*,
2851 // Functors for STL set.
2852 struct output_section_address_less_than
2855 operator()(const Output_section* s1, const Output_section* s2) const
2856 { return s1->address() < s2->address(); }
2859 // Information about this specific target which we pass to the
2860 // general Target structure.
2861 static const Target::Target_info arm_info;
2863 // The types of GOT entries needed for this platform.
2864 // These values are exposed to the ABI in an incremental link.
2865 // Do not renumber existing values without changing the version
2866 // number of the .gnu_incremental_inputs section.
2869 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol
2870 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset
2871 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset
2872 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair
2873 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair
2876 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2878 // Map input section to Arm_input_section.
2879 typedef Unordered_map<Section_id,
2880 Arm_input_section<big_endian>*,
2882 Arm_input_section_map;
2884 // Map output addresses to relocs for Cortex-A8 erratum.
2885 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2886 Cortex_a8_relocs_info;
2889 Arm_output_data_got<big_endian>* got_;
2891 Output_data_plt_arm<big_endian>* plt_;
2892 // The GOT PLT section.
2893 Output_data_space* got_plt_;
2894 // The dynamic reloc section.
2895 Reloc_section* rel_dyn_;
2896 // Relocs saved to avoid a COPY reloc.
2897 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2898 // Space for variables copied with a COPY reloc.
2899 Output_data_space* dynbss_;
2900 // Offset of the GOT entry for the TLS module index.
2901 unsigned int got_mod_index_offset_;
2902 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2903 bool tls_base_symbol_defined_;
2904 // Vector of Stub_tables created.
2905 Stub_table_list stub_tables_;
2907 const Stub_factory &stub_factory_;
2908 // Whether we force PIC branch veneers.
2909 bool should_force_pic_veneer_;
2910 // Map for locating Arm_input_sections.
2911 Arm_input_section_map arm_input_section_map_;
2912 // Attributes section data in output.
2913 Attributes_section_data* attributes_section_data_;
2914 // Whether we want to fix code for Cortex-A8 erratum.
2915 bool fix_cortex_a8_;
2916 // Map addresses to relocs for Cortex-A8 erratum.
2917 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2920 template<bool big_endian>
2921 const Target::Target_info Target_arm<big_endian>::arm_info =
2924 big_endian, // is_big_endian
2925 elfcpp::EM_ARM, // machine_code
2926 false, // has_make_symbol
2927 false, // has_resolve
2928 false, // has_code_fill
2929 true, // is_default_stack_executable
2930 false, // can_icf_inline_merge_sections
2932 "/usr/lib/libc.so.1", // dynamic_linker
2933 0x8000, // default_text_segment_address
2934 0x1000, // abi_pagesize (overridable by -z max-page-size)
2935 0x1000, // common_pagesize (overridable by -z common-page-size)
2936 false, // isolate_execinstr
2938 elfcpp::SHN_UNDEF, // small_common_shndx
2939 elfcpp::SHN_UNDEF, // large_common_shndx
2940 0, // small_common_section_flags
2941 0, // large_common_section_flags
2942 ".ARM.attributes", // attributes_section
2943 "aeabi" // attributes_vendor
2946 // Arm relocate functions class
2949 template<bool big_endian>
2950 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
2955 STATUS_OKAY, // No error during relocation.
2956 STATUS_OVERFLOW, // Relocation overflow.
2957 STATUS_BAD_RELOC // Relocation cannot be applied.
2961 typedef Relocate_functions<32, big_endian> Base;
2962 typedef Arm_relocate_functions<big_endian> This;
2964 // Encoding of imm16 argument for movt and movw ARM instructions
2967 // imm16 := imm4 | imm12
2969 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2970 // +-------+---------------+-------+-------+-----------------------+
2971 // | | |imm4 | |imm12 |
2972 // +-------+---------------+-------+-------+-----------------------+
2974 // Extract the relocation addend from VAL based on the ARM
2975 // instruction encoding described above.
2976 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2977 extract_arm_movw_movt_addend(
2978 typename elfcpp::Swap<32, big_endian>::Valtype val)
2980 // According to the Elf ABI for ARM Architecture the immediate
2981 // field is sign-extended to form the addend.
2982 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff));
2985 // Insert X into VAL based on the ARM instruction encoding described
2987 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2988 insert_val_arm_movw_movt(
2989 typename elfcpp::Swap<32, big_endian>::Valtype val,
2990 typename elfcpp::Swap<32, big_endian>::Valtype x)
2994 val |= (x & 0xf000) << 4;
2998 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3001 // imm16 := imm4 | i | imm3 | imm8
3003 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3004 // +---------+-+-----------+-------++-+-----+-------+---------------+
3005 // | |i| |imm4 || |imm3 | |imm8 |
3006 // +---------+-+-----------+-------++-+-----+-------+---------------+
3008 // Extract the relocation addend from VAL based on the Thumb2
3009 // instruction encoding described above.
3010 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3011 extract_thumb_movw_movt_addend(
3012 typename elfcpp::Swap<32, big_endian>::Valtype val)
3014 // According to the Elf ABI for ARM Architecture the immediate
3015 // field is sign-extended to form the addend.
3016 return Bits<16>::sign_extend32(((val >> 4) & 0xf000)
3017 | ((val >> 15) & 0x0800)
3018 | ((val >> 4) & 0x0700)
3022 // Insert X into VAL based on the Thumb2 instruction encoding
3024 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3025 insert_val_thumb_movw_movt(
3026 typename elfcpp::Swap<32, big_endian>::Valtype val,
3027 typename elfcpp::Swap<32, big_endian>::Valtype x)
3030 val |= (x & 0xf000) << 4;
3031 val |= (x & 0x0800) << 15;
3032 val |= (x & 0x0700) << 4;
3033 val |= (x & 0x00ff);
3037 // Calculate the smallest constant Kn for the specified residual.
3038 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3040 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
3046 // Determine the most significant bit in the residual and
3047 // align the resulting value to a 2-bit boundary.
3048 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
3050 // The desired shift is now (msb - 6), or zero, whichever
3052 return (((msb - 6) < 0) ? 0 : (msb - 6));
3055 // Calculate the final residual for the specified group index.
3056 // If the passed group index is less than zero, the method will return
3057 // the value of the specified residual without any change.
3058 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3059 static typename elfcpp::Swap<32, big_endian>::Valtype
3060 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3063 for (int n = 0; n <= group; n++)
3065 // Calculate which part of the value to mask.
3066 uint32_t shift = calc_grp_kn(residual);
3067 // Calculate the residual for the next time around.
3068 residual &= ~(residual & (0xff << shift));
3074 // Calculate the value of Gn for the specified group index.
3075 // We return it in the form of an encoded constant-and-rotation.
3076 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3077 static typename elfcpp::Swap<32, big_endian>::Valtype
3078 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3081 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
3084 for (int n = 0; n <= group; n++)
3086 // Calculate which part of the value to mask.
3087 shift = calc_grp_kn(residual);
3088 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3089 gn = residual & (0xff << shift);
3090 // Calculate the residual for the next time around.
3093 // Return Gn in the form of an encoded constant-and-rotation.
3094 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
3098 // Handle ARM long branches.
3099 static typename This::Status
3100 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3101 unsigned char*, const Sized_symbol<32>*,
3102 const Arm_relobj<big_endian>*, unsigned int,
3103 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3105 // Handle THUMB long branches.
3106 static typename This::Status
3107 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3108 unsigned char*, const Sized_symbol<32>*,
3109 const Arm_relobj<big_endian>*, unsigned int,
3110 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3113 // Return the branch offset of a 32-bit THUMB branch.
3114 static inline int32_t
3115 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3117 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3118 // involving the J1 and J2 bits.
3119 uint32_t s = (upper_insn & (1U << 10)) >> 10;
3120 uint32_t upper = upper_insn & 0x3ffU;
3121 uint32_t lower = lower_insn & 0x7ffU;
3122 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
3123 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
3124 uint32_t i1 = j1 ^ s ? 0 : 1;
3125 uint32_t i2 = j2 ^ s ? 0 : 1;
3127 return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22)
3128 | (upper << 12) | (lower << 1));
3131 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3132 // UPPER_INSN is the original upper instruction of the branch. Caller is
3133 // responsible for overflow checking and BLX offset adjustment.
3134 static inline uint16_t
3135 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
3137 uint32_t s = offset < 0 ? 1 : 0;
3138 uint32_t bits = static_cast<uint32_t>(offset);
3139 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
3142 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3143 // LOWER_INSN is the original lower instruction of the branch. Caller is
3144 // responsible for overflow checking and BLX offset adjustment.
3145 static inline uint16_t
3146 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
3148 uint32_t s = offset < 0 ? 1 : 0;
3149 uint32_t bits = static_cast<uint32_t>(offset);
3150 return ((lower_insn & ~0x2fffU)
3151 | ((((bits >> 23) & 1) ^ !s) << 13)
3152 | ((((bits >> 22) & 1) ^ !s) << 11)
3153 | ((bits >> 1) & 0x7ffU));
3156 // Return the branch offset of a 32-bit THUMB conditional branch.
3157 static inline int32_t
3158 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3160 uint32_t s = (upper_insn & 0x0400U) >> 10;
3161 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
3162 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
3163 uint32_t lower = (lower_insn & 0x07ffU);
3164 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
3166 return Bits<21>::sign_extend32((upper << 12) | (lower << 1));
3169 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3170 // instruction. UPPER_INSN is the original upper instruction of the branch.
3171 // Caller is responsible for overflow checking.
3172 static inline uint16_t
3173 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
3175 uint32_t s = offset < 0 ? 1 : 0;
3176 uint32_t bits = static_cast<uint32_t>(offset);
3177 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
3180 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3181 // instruction. LOWER_INSN is the original lower instruction of the branch.
3182 // The caller is responsible for overflow checking.
3183 static inline uint16_t
3184 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
3186 uint32_t bits = static_cast<uint32_t>(offset);
3187 uint32_t j2 = (bits & 0x00080000U) >> 19;
3188 uint32_t j1 = (bits & 0x00040000U) >> 18;
3189 uint32_t lo = (bits & 0x00000ffeU) >> 1;
3191 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
3194 // R_ARM_ABS8: S + A
3195 static inline typename This::Status
3196 abs8(unsigned char* view,
3197 const Sized_relobj_file<32, big_endian>* object,
3198 const Symbol_value<32>* psymval)
3200 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
3201 Valtype* wv = reinterpret_cast<Valtype*>(view);
3202 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
3203 int32_t addend = Bits<8>::sign_extend32(val);
3204 Arm_address x = psymval->value(object, addend);
3205 val = Bits<32>::bit_select32(val, x, 0xffU);
3206 elfcpp::Swap<8, big_endian>::writeval(wv, val);
3208 // R_ARM_ABS8 permits signed or unsigned results.
3209 return (Bits<8>::has_signed_unsigned_overflow32(x)
3210 ? This::STATUS_OVERFLOW
3211 : This::STATUS_OKAY);
3214 // R_ARM_THM_ABS5: S + A
3215 static inline typename This::Status
3216 thm_abs5(unsigned char* view,
3217 const Sized_relobj_file<32, big_endian>* object,
3218 const Symbol_value<32>* psymval)
3220 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3221 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3222 Valtype* wv = reinterpret_cast<Valtype*>(view);
3223 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3224 Reltype addend = (val & 0x7e0U) >> 6;
3225 Reltype x = psymval->value(object, addend);
3226 val = Bits<32>::bit_select32(val, x << 6, 0x7e0U);
3227 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3228 return (Bits<5>::has_overflow32(x)
3229 ? This::STATUS_OVERFLOW
3230 : This::STATUS_OKAY);
3233 // R_ARM_ABS12: S + A
3234 static inline typename This::Status
3235 abs12(unsigned char* view,
3236 const Sized_relobj_file<32, big_endian>* object,
3237 const Symbol_value<32>* psymval)
3239 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3240 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3241 Valtype* wv = reinterpret_cast<Valtype*>(view);
3242 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3243 Reltype addend = val & 0x0fffU;
3244 Reltype x = psymval->value(object, addend);
3245 val = Bits<32>::bit_select32(val, x, 0x0fffU);
3246 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3247 return (Bits<12>::has_overflow32(x)
3248 ? This::STATUS_OVERFLOW
3249 : This::STATUS_OKAY);
3252 // R_ARM_ABS16: S + A
3253 static inline typename This::Status
3254 abs16(unsigned char* view,
3255 const Sized_relobj_file<32, big_endian>* object,
3256 const Symbol_value<32>* psymval)
3258 typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype;
3259 Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view);
3260 int32_t addend = Bits<16>::sign_extend32(val);
3261 Arm_address x = psymval->value(object, addend);
3262 val = Bits<32>::bit_select32(val, x, 0xffffU);
3263 elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val);
3265 // R_ARM_ABS16 permits signed or unsigned results.
3266 return (Bits<16>::has_signed_unsigned_overflow32(x)
3267 ? This::STATUS_OVERFLOW
3268 : This::STATUS_OKAY);
3271 // R_ARM_ABS32: (S + A) | T
3272 static inline typename This::Status
3273 abs32(unsigned char* view,
3274 const Sized_relobj_file<32, big_endian>* object,
3275 const Symbol_value<32>* psymval,
3276 Arm_address thumb_bit)
3278 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3279 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3280 Valtype x = psymval->value(object, addend) | thumb_bit;
3281 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3282 return This::STATUS_OKAY;
3285 // R_ARM_REL32: (S + A) | T - P
3286 static inline typename This::Status
3287 rel32(unsigned char* view,
3288 const Sized_relobj_file<32, big_endian>* object,
3289 const Symbol_value<32>* psymval,
3290 Arm_address address,
3291 Arm_address thumb_bit)
3293 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3294 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3295 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3296 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3297 return This::STATUS_OKAY;
3300 // R_ARM_THM_JUMP24: (S + A) | T - P
3301 static typename This::Status
3302 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object,
3303 const Symbol_value<32>* psymval, Arm_address address,
3304 Arm_address thumb_bit);
3306 // R_ARM_THM_JUMP6: S + A – P
3307 static inline typename This::Status
3308 thm_jump6(unsigned char* view,
3309 const Sized_relobj_file<32, big_endian>* object,
3310 const Symbol_value<32>* psymval,
3311 Arm_address address)
3313 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3314 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3315 Valtype* wv = reinterpret_cast<Valtype*>(view);
3316 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3317 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3318 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
3319 Reltype x = (psymval->value(object, addend) - address);
3320 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
3321 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3322 // CZB does only forward jumps.
3323 return ((x > 0x007e)
3324 ? This::STATUS_OVERFLOW
3325 : This::STATUS_OKAY);
3328 // R_ARM_THM_JUMP8: S + A – P
3329 static inline typename This::Status
3330 thm_jump8(unsigned char* view,
3331 const Sized_relobj_file<32, big_endian>* object,
3332 const Symbol_value<32>* psymval,
3333 Arm_address address)
3335 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3336 Valtype* wv = reinterpret_cast<Valtype*>(view);
3337 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3338 int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1);
3339 int32_t x = (psymval->value(object, addend) - address);
3340 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00)
3341 | ((x & 0x01fe) >> 1)));
3342 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3343 return (Bits<9>::has_overflow32(x)
3344 ? This::STATUS_OVERFLOW
3345 : This::STATUS_OKAY);
3348 // R_ARM_THM_JUMP11: S + A – P
3349 static inline typename This::Status
3350 thm_jump11(unsigned char* view,
3351 const Sized_relobj_file<32, big_endian>* object,
3352 const Symbol_value<32>* psymval,
3353 Arm_address address)
3355 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3356 Valtype* wv = reinterpret_cast<Valtype*>(view);
3357 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3358 int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1);
3359 int32_t x = (psymval->value(object, addend) - address);
3360 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800)
3361 | ((x & 0x0ffe) >> 1)));
3362 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3363 return (Bits<12>::has_overflow32(x)
3364 ? This::STATUS_OVERFLOW
3365 : This::STATUS_OKAY);
3368 // R_ARM_BASE_PREL: B(S) + A - P
3369 static inline typename This::Status
3370 base_prel(unsigned char* view,
3372 Arm_address address)
3374 Base::rel32(view, origin - address);
3378 // R_ARM_BASE_ABS: B(S) + A
3379 static inline typename This::Status
3380 base_abs(unsigned char* view,
3383 Base::rel32(view, origin);
3387 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3388 static inline typename This::Status
3389 got_brel(unsigned char* view,
3390 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
3392 Base::rel32(view, got_offset);
3393 return This::STATUS_OKAY;
3396 // R_ARM_GOT_PREL: GOT(S) + A - P
3397 static inline typename This::Status
3398 got_prel(unsigned char* view,
3399 Arm_address got_entry,
3400 Arm_address address)
3402 Base::rel32(view, got_entry - address);
3403 return This::STATUS_OKAY;
3406 // R_ARM_PREL: (S + A) | T - P
3407 static inline typename This::Status
3408 prel31(unsigned char* view,
3409 const Sized_relobj_file<32, big_endian>* object,
3410 const Symbol_value<32>* psymval,
3411 Arm_address address,
3412 Arm_address thumb_bit)
3414 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3415 Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3416 Valtype addend = Bits<31>::sign_extend32(val);
3417 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3418 val = Bits<32>::bit_select32(val, x, 0x7fffffffU);
3419 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val);
3420 return (Bits<31>::has_overflow32(x)
3421 ? This::STATUS_OVERFLOW
3422 : This::STATUS_OKAY);
3425 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3426 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3427 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3428 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3429 static inline typename This::Status
3430 movw(unsigned char* view,
3431 const Sized_relobj_file<32, big_endian>* object,
3432 const Symbol_value<32>* psymval,
3433 Arm_address relative_address_base,
3434 Arm_address thumb_bit,
3435 bool check_overflow)
3437 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3438 Valtype* wv = reinterpret_cast<Valtype*>(view);
3439 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3440 Valtype addend = This::extract_arm_movw_movt_addend(val);
3441 Valtype x = ((psymval->value(object, addend) | thumb_bit)
3442 - relative_address_base);
3443 val = This::insert_val_arm_movw_movt(val, x);
3444 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3445 return ((check_overflow && Bits<16>::has_overflow32(x))
3446 ? This::STATUS_OVERFLOW
3447 : This::STATUS_OKAY);
3450 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3451 // R_ARM_MOVT_PREL: S + A - P
3452 // R_ARM_MOVT_BREL: S + A - B(S)
3453 static inline typename This::Status
3454 movt(unsigned char* view,
3455 const Sized_relobj_file<32, big_endian>* object,
3456 const Symbol_value<32>* psymval,
3457 Arm_address relative_address_base)
3459 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3460 Valtype* wv = reinterpret_cast<Valtype*>(view);
3461 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3462 Valtype addend = This::extract_arm_movw_movt_addend(val);
3463 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3464 val = This::insert_val_arm_movw_movt(val, x);
3465 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3466 // FIXME: IHI0044D says that we should check for overflow.
3467 return This::STATUS_OKAY;
3470 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3471 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3472 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3473 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3474 static inline typename This::Status
3475 thm_movw(unsigned char* view,
3476 const Sized_relobj_file<32, big_endian>* object,
3477 const Symbol_value<32>* psymval,
3478 Arm_address relative_address_base,
3479 Arm_address thumb_bit,
3480 bool check_overflow)
3482 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3483 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3484 Valtype* wv = reinterpret_cast<Valtype*>(view);
3485 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3486 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3487 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3489 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3490 val = This::insert_val_thumb_movw_movt(val, x);
3491 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3492 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3493 return ((check_overflow && Bits<16>::has_overflow32(x))
3494 ? This::STATUS_OVERFLOW
3495 : This::STATUS_OKAY);
3498 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3499 // R_ARM_THM_MOVT_PREL: S + A - P
3500 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3501 static inline typename This::Status
3502 thm_movt(unsigned char* view,
3503 const Sized_relobj_file<32, big_endian>* object,
3504 const Symbol_value<32>* psymval,
3505 Arm_address relative_address_base)
3507 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3508 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3509 Valtype* wv = reinterpret_cast<Valtype*>(view);
3510 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3511 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3512 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3513 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3514 val = This::insert_val_thumb_movw_movt(val, x);
3515 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3516 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3517 return This::STATUS_OKAY;
3520 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3521 static inline typename This::Status
3522 thm_alu11(unsigned char* view,
3523 const Sized_relobj_file<32, big_endian>* object,
3524 const Symbol_value<32>* psymval,
3525 Arm_address address,
3526 Arm_address thumb_bit)
3528 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3529 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3530 Valtype* wv = reinterpret_cast<Valtype*>(view);
3531 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3532 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3534 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3535 // -----------------------------------------------------------------------
3536 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3537 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3538 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3539 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3540 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3541 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3543 // Determine a sign for the addend.
3544 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3545 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3546 // Thumb2 addend encoding:
3547 // imm12 := i | imm3 | imm8
3548 int32_t addend = (insn & 0xff)
3549 | ((insn & 0x00007000) >> 4)
3550 | ((insn & 0x04000000) >> 15);
3551 // Apply a sign to the added.
3554 int32_t x = (psymval->value(object, addend) | thumb_bit)
3555 - (address & 0xfffffffc);
3556 Reltype val = abs(x);
3557 // Mask out the value and a distinct part of the ADD/SUB opcode
3558 // (bits 7:5 of opword).
3559 insn = (insn & 0xfb0f8f00)
3561 | ((val & 0x700) << 4)
3562 | ((val & 0x800) << 15);
3563 // Set the opcode according to whether the value to go in the
3564 // place is negative.
3568 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3569 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3570 return ((val > 0xfff) ?
3571 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3574 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3575 static inline typename This::Status
3576 thm_pc8(unsigned char* view,
3577 const Sized_relobj_file<32, big_endian>* object,
3578 const Symbol_value<32>* psymval,
3579 Arm_address address)
3581 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3582 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3583 Valtype* wv = reinterpret_cast<Valtype*>(view);
3584 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3585 Reltype addend = ((insn & 0x00ff) << 2);
3586 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3587 Reltype val = abs(x);
3588 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3590 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3591 return ((val > 0x03fc)
3592 ? This::STATUS_OVERFLOW
3593 : This::STATUS_OKAY);
3596 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3597 static inline typename This::Status
3598 thm_pc12(unsigned char* view,
3599 const Sized_relobj_file<32, big_endian>* object,
3600 const Symbol_value<32>* psymval,
3601 Arm_address address)
3603 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3604 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3605 Valtype* wv = reinterpret_cast<Valtype*>(view);
3606 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3607 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3608 // Determine a sign for the addend (positive if the U bit is 1).
3609 const int sign = (insn & 0x00800000) ? 1 : -1;
3610 int32_t addend = (insn & 0xfff);
3611 // Apply a sign to the added.
3614 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3615 Reltype val = abs(x);
3616 // Mask out and apply the value and the U bit.
3617 insn = (insn & 0xff7ff000) | (val & 0xfff);
3618 // Set the U bit according to whether the value to go in the
3619 // place is positive.
3623 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3624 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3625 return ((val > 0xfff) ?
3626 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3630 static inline typename This::Status
3631 v4bx(const Relocate_info<32, big_endian>* relinfo,
3632 unsigned char* view,
3633 const Arm_relobj<big_endian>* object,
3634 const Arm_address address,
3635 const bool is_interworking)
3638 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3639 Valtype* wv = reinterpret_cast<Valtype*>(view);
3640 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3642 // Ensure that we have a BX instruction.
3643 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3644 const uint32_t reg = (val & 0xf);
3645 if (is_interworking && reg != 0xf)
3647 Stub_table<big_endian>* stub_table =
3648 object->stub_table(relinfo->data_shndx);
3649 gold_assert(stub_table != NULL);
3651 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3652 gold_assert(stub != NULL);
3654 int32_t veneer_address =
3655 stub_table->address() + stub->offset() - 8 - address;
3656 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3657 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3658 // Replace with a branch to veneer (B <addr>)
3659 val = (val & 0xf0000000) | 0x0a000000
3660 | ((veneer_address >> 2) & 0x00ffffff);
3664 // Preserve Rm (lowest four bits) and the condition code
3665 // (highest four bits). Other bits encode MOV PC,Rm.
3666 val = (val & 0xf000000f) | 0x01a0f000;
3668 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3669 return This::STATUS_OKAY;
3672 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3673 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3674 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3675 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3676 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3677 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3678 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3679 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3680 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3681 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3682 static inline typename This::Status
3683 arm_grp_alu(unsigned char* view,
3684 const Sized_relobj_file<32, big_endian>* object,
3685 const Symbol_value<32>* psymval,
3687 Arm_address address,
3688 Arm_address thumb_bit,
3689 bool check_overflow)
3691 gold_assert(group >= 0 && group < 3);
3692 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3693 Valtype* wv = reinterpret_cast<Valtype*>(view);
3694 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3696 // ALU group relocations are allowed only for the ADD/SUB instructions.
3697 // (0x00800000 - ADD, 0x00400000 - SUB)
3698 const Valtype opcode = insn & 0x01e00000;
3699 if (opcode != 0x00800000 && opcode != 0x00400000)
3700 return This::STATUS_BAD_RELOC;
3702 // Determine a sign for the addend.
3703 const int sign = (opcode == 0x00800000) ? 1 : -1;
3704 // shifter = rotate_imm * 2
3705 const uint32_t shifter = (insn & 0xf00) >> 7;
3706 // Initial addend value.
3707 int32_t addend = insn & 0xff;
3708 // Rotate addend right by shifter.
3709 addend = (addend >> shifter) | (addend << (32 - shifter));
3710 // Apply a sign to the added.
3713 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3714 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3715 // Check for overflow if required
3717 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3718 return This::STATUS_OVERFLOW;
3720 // Mask out the value and the ADD/SUB part of the opcode; take care
3721 // not to destroy the S bit.
3723 // Set the opcode according to whether the value to go in the
3724 // place is negative.
3725 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3726 // Encode the offset (encoded Gn).
3729 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3730 return This::STATUS_OKAY;
3733 // R_ARM_LDR_PC_G0: S + A - P
3734 // R_ARM_LDR_PC_G1: S + A - P
3735 // R_ARM_LDR_PC_G2: S + A - P
3736 // R_ARM_LDR_SB_G0: S + A - B(S)
3737 // R_ARM_LDR_SB_G1: S + A - B(S)
3738 // R_ARM_LDR_SB_G2: S + A - B(S)
3739 static inline typename This::Status
3740 arm_grp_ldr(unsigned char* view,
3741 const Sized_relobj_file<32, big_endian>* object,
3742 const Symbol_value<32>* psymval,
3744 Arm_address address)
3746 gold_assert(group >= 0 && group < 3);
3747 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3748 Valtype* wv = reinterpret_cast<Valtype*>(view);
3749 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3751 const int sign = (insn & 0x00800000) ? 1 : -1;
3752 int32_t addend = (insn & 0xfff) * sign;
3753 int32_t x = (psymval->value(object, addend) - address);
3754 // Calculate the relevant G(n-1) value to obtain this stage residual.
3756 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3757 if (residual >= 0x1000)
3758 return This::STATUS_OVERFLOW;
3760 // Mask out the value and U bit.
3762 // Set the U bit for non-negative values.
3767 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3768 return This::STATUS_OKAY;
3771 // R_ARM_LDRS_PC_G0: S + A - P
3772 // R_ARM_LDRS_PC_G1: S + A - P
3773 // R_ARM_LDRS_PC_G2: S + A - P
3774 // R_ARM_LDRS_SB_G0: S + A - B(S)
3775 // R_ARM_LDRS_SB_G1: S + A - B(S)
3776 // R_ARM_LDRS_SB_G2: S + A - B(S)
3777 static inline typename This::Status
3778 arm_grp_ldrs(unsigned char* view,
3779 const Sized_relobj_file<32, big_endian>* object,
3780 const Symbol_value<32>* psymval,
3782 Arm_address address)
3784 gold_assert(group >= 0 && group < 3);
3785 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3786 Valtype* wv = reinterpret_cast<Valtype*>(view);
3787 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3789 const int sign = (insn & 0x00800000) ? 1 : -1;
3790 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3791 int32_t x = (psymval->value(object, addend) - address);
3792 // Calculate the relevant G(n-1) value to obtain this stage residual.
3794 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3795 if (residual >= 0x100)
3796 return This::STATUS_OVERFLOW;
3798 // Mask out the value and U bit.
3800 // Set the U bit for non-negative values.
3803 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3805 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3806 return This::STATUS_OKAY;
3809 // R_ARM_LDC_PC_G0: S + A - P
3810 // R_ARM_LDC_PC_G1: S + A - P
3811 // R_ARM_LDC_PC_G2: S + A - P
3812 // R_ARM_LDC_SB_G0: S + A - B(S)
3813 // R_ARM_LDC_SB_G1: S + A - B(S)
3814 // R_ARM_LDC_SB_G2: S + A - B(S)
3815 static inline typename This::Status
3816 arm_grp_ldc(unsigned char* view,
3817 const Sized_relobj_file<32, big_endian>* object,
3818 const Symbol_value<32>* psymval,
3820 Arm_address address)
3822 gold_assert(group >= 0 && group < 3);
3823 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3824 Valtype* wv = reinterpret_cast<Valtype*>(view);
3825 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3827 const int sign = (insn & 0x00800000) ? 1 : -1;
3828 int32_t addend = ((insn & 0xff) << 2) * sign;
3829 int32_t x = (psymval->value(object, addend) - address);
3830 // Calculate the relevant G(n-1) value to obtain this stage residual.
3832 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3833 if ((residual & 0x3) != 0 || residual >= 0x400)
3834 return This::STATUS_OVERFLOW;
3836 // Mask out the value and U bit.
3838 // Set the U bit for non-negative values.
3841 insn |= (residual >> 2);
3843 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3844 return This::STATUS_OKAY;
3848 // Relocate ARM long branches. This handles relocation types
3849 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3850 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3851 // undefined and we do not use PLT in this relocation. In such a case,
3852 // the branch is converted into an NOP.
3854 template<bool big_endian>
3855 typename Arm_relocate_functions<big_endian>::Status
3856 Arm_relocate_functions<big_endian>::arm_branch_common(
3857 unsigned int r_type,
3858 const Relocate_info<32, big_endian>* relinfo,
3859 unsigned char* view,
3860 const Sized_symbol<32>* gsym,
3861 const Arm_relobj<big_endian>* object,
3863 const Symbol_value<32>* psymval,
3864 Arm_address address,
3865 Arm_address thumb_bit,
3866 bool is_weakly_undefined_without_plt)
3868 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3869 Valtype* wv = reinterpret_cast<Valtype*>(view);
3870 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3872 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3873 && ((val & 0x0f000000UL) == 0x0a000000UL);
3874 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3875 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3876 && ((val & 0x0f000000UL) == 0x0b000000UL);
3877 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3878 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3880 // Check that the instruction is valid.
3881 if (r_type == elfcpp::R_ARM_CALL)
3883 if (!insn_is_uncond_bl && !insn_is_blx)
3884 return This::STATUS_BAD_RELOC;
3886 else if (r_type == elfcpp::R_ARM_JUMP24)
3888 if (!insn_is_b && !insn_is_cond_bl)
3889 return This::STATUS_BAD_RELOC;
3891 else if (r_type == elfcpp::R_ARM_PLT32)
3893 if (!insn_is_any_branch)
3894 return This::STATUS_BAD_RELOC;
3896 else if (r_type == elfcpp::R_ARM_XPC25)
3898 // FIXME: AAELF document IH0044C does not say much about it other
3899 // than it being obsolete.
3900 if (!insn_is_any_branch)
3901 return This::STATUS_BAD_RELOC;
3906 // A branch to an undefined weak symbol is turned into a jump to
3907 // the next instruction unless a PLT entry will be created.
3908 // Do the same for local undefined symbols.
3909 // The jump to the next instruction is optimized as a NOP depending
3910 // on the architecture.
3911 const Target_arm<big_endian>* arm_target =
3912 Target_arm<big_endian>::default_target();
3913 if (is_weakly_undefined_without_plt)
3915 gold_assert(!parameters->options().relocatable());
3916 Valtype cond = val & 0xf0000000U;
3917 if (arm_target->may_use_arm_nop())
3918 val = cond | 0x0320f000;
3920 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3921 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3922 return This::STATUS_OKAY;
3925 Valtype addend = Bits<26>::sign_extend32(val << 2);
3926 Valtype branch_target = psymval->value(object, addend);
3927 int32_t branch_offset = branch_target - address;
3929 // We need a stub if the branch offset is too large or if we need
3931 bool may_use_blx = arm_target->may_use_v5t_interworking();
3932 Reloc_stub* stub = NULL;
3934 if (!parameters->options().relocatable()
3935 && (Bits<26>::has_overflow32(branch_offset)
3936 || ((thumb_bit != 0)
3937 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL))))
3939 Valtype unadjusted_branch_target = psymval->value(object, 0);
3941 Stub_type stub_type =
3942 Reloc_stub::stub_type_for_reloc(r_type, address,
3943 unadjusted_branch_target,
3945 if (stub_type != arm_stub_none)
3947 Stub_table<big_endian>* stub_table =
3948 object->stub_table(relinfo->data_shndx);
3949 gold_assert(stub_table != NULL);
3951 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3952 stub = stub_table->find_reloc_stub(stub_key);
3953 gold_assert(stub != NULL);
3954 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3955 branch_target = stub_table->address() + stub->offset() + addend;
3956 branch_offset = branch_target - address;
3957 gold_assert(!Bits<26>::has_overflow32(branch_offset));
3961 // At this point, if we still need to switch mode, the instruction
3962 // must either be a BLX or a BL that can be converted to a BLX.
3966 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
3967 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
3970 val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL);
3971 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3972 return (Bits<26>::has_overflow32(branch_offset)
3973 ? This::STATUS_OVERFLOW
3974 : This::STATUS_OKAY);
3977 // Relocate THUMB long branches. This handles relocation types
3978 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3979 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3980 // undefined and we do not use PLT in this relocation. In such a case,
3981 // the branch is converted into an NOP.
3983 template<bool big_endian>
3984 typename Arm_relocate_functions<big_endian>::Status
3985 Arm_relocate_functions<big_endian>::thumb_branch_common(
3986 unsigned int r_type,
3987 const Relocate_info<32, big_endian>* relinfo,
3988 unsigned char* view,
3989 const Sized_symbol<32>* gsym,
3990 const Arm_relobj<big_endian>* object,
3992 const Symbol_value<32>* psymval,
3993 Arm_address address,
3994 Arm_address thumb_bit,
3995 bool is_weakly_undefined_without_plt)
3997 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3998 Valtype* wv = reinterpret_cast<Valtype*>(view);
3999 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4000 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4002 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4004 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
4005 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
4007 // Check that the instruction is valid.
4008 if (r_type == elfcpp::R_ARM_THM_CALL)
4010 if (!is_bl_insn && !is_blx_insn)
4011 return This::STATUS_BAD_RELOC;
4013 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
4015 // This cannot be a BLX.
4017 return This::STATUS_BAD_RELOC;
4019 else if (r_type == elfcpp::R_ARM_THM_XPC22)
4021 // Check for Thumb to Thumb call.
4023 return This::STATUS_BAD_RELOC;
4026 gold_warning(_("%s: Thumb BLX instruction targets "
4027 "thumb function '%s'."),
4028 object->name().c_str(),
4029 (gsym ? gsym->name() : "(local)"));
4030 // Convert BLX to BL.
4031 lower_insn |= 0x1000U;
4037 // A branch to an undefined weak symbol is turned into a jump to
4038 // the next instruction unless a PLT entry will be created.
4039 // The jump to the next instruction is optimized as a NOP.W for
4040 // Thumb-2 enabled architectures.
4041 const Target_arm<big_endian>* arm_target =
4042 Target_arm<big_endian>::default_target();
4043 if (is_weakly_undefined_without_plt)
4045 gold_assert(!parameters->options().relocatable());
4046 if (arm_target->may_use_thumb2_nop())
4048 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
4049 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
4053 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
4054 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
4056 return This::STATUS_OKAY;
4059 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
4060 Arm_address branch_target = psymval->value(object, addend);
4062 // For BLX, bit 1 of target address comes from bit 1 of base address.
4063 bool may_use_blx = arm_target->may_use_v5t_interworking();
4064 if (thumb_bit == 0 && may_use_blx)
4065 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4067 int32_t branch_offset = branch_target - address;
4069 // We need a stub if the branch offset is too large or if we need
4071 bool thumb2 = arm_target->using_thumb2();
4072 if (!parameters->options().relocatable()
4073 && ((!thumb2 && Bits<23>::has_overflow32(branch_offset))
4074 || (thumb2 && Bits<25>::has_overflow32(branch_offset))
4075 || ((thumb_bit == 0)
4076 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4077 || r_type == elfcpp::R_ARM_THM_JUMP24))))
4079 Arm_address unadjusted_branch_target = psymval->value(object, 0);
4081 Stub_type stub_type =
4082 Reloc_stub::stub_type_for_reloc(r_type, address,
4083 unadjusted_branch_target,
4086 if (stub_type != arm_stub_none)
4088 Stub_table<big_endian>* stub_table =
4089 object->stub_table(relinfo->data_shndx);
4090 gold_assert(stub_table != NULL);
4092 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4093 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
4094 gold_assert(stub != NULL);
4095 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4096 branch_target = stub_table->address() + stub->offset() + addend;
4097 if (thumb_bit == 0 && may_use_blx)
4098 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4099 branch_offset = branch_target - address;
4103 // At this point, if we still need to switch mode, the instruction
4104 // must either be a BLX or a BL that can be converted to a BLX.
4107 gold_assert(may_use_blx
4108 && (r_type == elfcpp::R_ARM_THM_CALL
4109 || r_type == elfcpp::R_ARM_THM_XPC22));
4110 // Make sure this is a BLX.
4111 lower_insn &= ~0x1000U;
4115 // Make sure this is a BL.
4116 lower_insn |= 0x1000U;
4119 // For a BLX instruction, make sure that the relocation is rounded up
4120 // to a word boundary. This follows the semantics of the instruction
4121 // which specifies that bit 1 of the target address will come from bit
4122 // 1 of the base address.
4123 if ((lower_insn & 0x5000U) == 0x4000U)
4124 gold_assert((branch_offset & 3) == 0);
4126 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4127 // We use the Thumb-2 encoding, which is safe even if dealing with
4128 // a Thumb-1 instruction by virtue of our overflow check above. */
4129 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
4130 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
4132 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4133 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4135 gold_assert(!Bits<25>::has_overflow32(branch_offset));
4138 ? Bits<25>::has_overflow32(branch_offset)
4139 : Bits<23>::has_overflow32(branch_offset))
4140 ? This::STATUS_OVERFLOW
4141 : This::STATUS_OKAY);
4144 // Relocate THUMB-2 long conditional branches.
4145 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4146 // undefined and we do not use PLT in this relocation. In such a case,
4147 // the branch is converted into an NOP.
4149 template<bool big_endian>
4150 typename Arm_relocate_functions<big_endian>::Status
4151 Arm_relocate_functions<big_endian>::thm_jump19(
4152 unsigned char* view,
4153 const Arm_relobj<big_endian>* object,
4154 const Symbol_value<32>* psymval,
4155 Arm_address address,
4156 Arm_address thumb_bit)
4158 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4159 Valtype* wv = reinterpret_cast<Valtype*>(view);
4160 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4161 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4162 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
4164 Arm_address branch_target = psymval->value(object, addend);
4165 int32_t branch_offset = branch_target - address;
4167 // ??? Should handle interworking? GCC might someday try to
4168 // use this for tail calls.
4169 // FIXME: We do support thumb entry to PLT yet.
4172 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4173 return This::STATUS_BAD_RELOC;
4176 // Put RELOCATION back into the insn.
4177 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
4178 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
4180 // Put the relocated value back in the object file:
4181 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4182 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4184 return (Bits<21>::has_overflow32(branch_offset)
4185 ? This::STATUS_OVERFLOW
4186 : This::STATUS_OKAY);
4189 // Get the GOT section, creating it if necessary.
4191 template<bool big_endian>
4192 Arm_output_data_got<big_endian>*
4193 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
4195 if (this->got_ == NULL)
4197 gold_assert(symtab != NULL && layout != NULL);
4199 // When using -z now, we can treat .got as a relro section.
4200 // Without -z now, it is modified after program startup by lazy
4202 bool is_got_relro = parameters->options().now();
4203 Output_section_order got_order = (is_got_relro
4207 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4208 // .got.plt sections in output. The output .got section contains both
4209 // PLT and non-PLT GOT entries.
4210 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout);
4212 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4213 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4214 this->got_, got_order, is_got_relro);
4216 // The old GNU linker creates a .got.plt section. We just
4217 // create another set of data in the .got section. Note that we
4218 // always create a PLT if we create a GOT, although the PLT
4220 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
4221 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4222 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4223 this->got_plt_, got_order, is_got_relro);
4225 // The first three entries are reserved.
4226 this->got_plt_->set_current_data_size(3 * 4);
4228 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4229 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
4230 Symbol_table::PREDEFINED,
4232 0, 0, elfcpp::STT_OBJECT,
4234 elfcpp::STV_HIDDEN, 0,
4240 // Get the dynamic reloc section, creating it if necessary.
4242 template<bool big_endian>
4243 typename Target_arm<big_endian>::Reloc_section*
4244 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
4246 if (this->rel_dyn_ == NULL)
4248 gold_assert(layout != NULL);
4249 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
4250 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4251 elfcpp::SHF_ALLOC, this->rel_dyn_,
4252 ORDER_DYNAMIC_RELOCS, false);
4254 return this->rel_dyn_;
4257 // Insn_template methods.
4259 // Return byte size of an instruction template.
4262 Insn_template::size() const
4264 switch (this->type())
4267 case THUMB16_SPECIAL_TYPE:
4278 // Return alignment of an instruction template.
4281 Insn_template::alignment() const
4283 switch (this->type())
4286 case THUMB16_SPECIAL_TYPE:
4297 // Stub_template methods.
4299 Stub_template::Stub_template(
4300 Stub_type type, const Insn_template* insns,
4302 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
4303 entry_in_thumb_mode_(false), relocs_()
4307 // Compute byte size and alignment of stub template.
4308 for (size_t i = 0; i < insn_count; i++)
4310 unsigned insn_alignment = insns[i].alignment();
4311 size_t insn_size = insns[i].size();
4312 gold_assert((offset & (insn_alignment - 1)) == 0);
4313 this->alignment_ = std::max(this->alignment_, insn_alignment);
4314 switch (insns[i].type())
4316 case Insn_template::THUMB16_TYPE:
4317 case Insn_template::THUMB16_SPECIAL_TYPE:
4319 this->entry_in_thumb_mode_ = true;
4322 case Insn_template::THUMB32_TYPE:
4323 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
4324 this->relocs_.push_back(Reloc(i, offset));
4326 this->entry_in_thumb_mode_ = true;
4329 case Insn_template::ARM_TYPE:
4330 // Handle cases where the target is encoded within the
4332 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
4333 this->relocs_.push_back(Reloc(i, offset));
4336 case Insn_template::DATA_TYPE:
4337 // Entry point cannot be data.
4338 gold_assert(i != 0);
4339 this->relocs_.push_back(Reloc(i, offset));
4345 offset += insn_size;
4347 this->size_ = offset;
4352 // Template to implement do_write for a specific target endianness.
4354 template<bool big_endian>
4356 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4358 const Stub_template* stub_template = this->stub_template();
4359 const Insn_template* insns = stub_template->insns();
4361 // FIXME: We do not handle BE8 encoding yet.
4362 unsigned char* pov = view;
4363 for (size_t i = 0; i < stub_template->insn_count(); i++)
4365 switch (insns[i].type())
4367 case Insn_template::THUMB16_TYPE:
4368 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4370 case Insn_template::THUMB16_SPECIAL_TYPE:
4371 elfcpp::Swap<16, big_endian>::writeval(
4373 this->thumb16_special(i));
4375 case Insn_template::THUMB32_TYPE:
4377 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4378 uint32_t lo = insns[i].data() & 0xffff;
4379 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4380 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4383 case Insn_template::ARM_TYPE:
4384 case Insn_template::DATA_TYPE:
4385 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4390 pov += insns[i].size();
4392 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4395 // Reloc_stub::Key methods.
4397 // Dump a Key as a string for debugging.
4400 Reloc_stub::Key::name() const
4402 if (this->r_sym_ == invalid_index)
4404 // Global symbol key name
4405 // <stub-type>:<symbol name>:<addend>.
4406 const std::string sym_name = this->u_.symbol->name();
4407 // We need to print two hex number and two colons. So just add 100 bytes
4408 // to the symbol name size.
4409 size_t len = sym_name.size() + 100;
4410 char* buffer = new char[len];
4411 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4412 sym_name.c_str(), this->addend_);
4413 gold_assert(c > 0 && c < static_cast<int>(len));
4415 return std::string(buffer);
4419 // local symbol key name
4420 // <stub-type>:<object>:<r_sym>:<addend>.
4421 const size_t len = 200;
4423 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4424 this->u_.relobj, this->r_sym_, this->addend_);
4425 gold_assert(c > 0 && c < static_cast<int>(len));
4426 return std::string(buffer);
4430 // Reloc_stub methods.
4432 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4433 // LOCATION to DESTINATION.
4434 // This code is based on the arm_type_of_stub function in
4435 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4439 Reloc_stub::stub_type_for_reloc(
4440 unsigned int r_type,
4441 Arm_address location,
4442 Arm_address destination,
4443 bool target_is_thumb)
4445 Stub_type stub_type = arm_stub_none;
4447 // This is a bit ugly but we want to avoid using a templated class for
4448 // big and little endianities.
4450 bool should_force_pic_veneer;
4453 if (parameters->target().is_big_endian())
4455 const Target_arm<true>* big_endian_target =
4456 Target_arm<true>::default_target();
4457 may_use_blx = big_endian_target->may_use_v5t_interworking();
4458 should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
4459 thumb2 = big_endian_target->using_thumb2();
4460 thumb_only = big_endian_target->using_thumb_only();
4464 const Target_arm<false>* little_endian_target =
4465 Target_arm<false>::default_target();
4466 may_use_blx = little_endian_target->may_use_v5t_interworking();
4467 should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
4468 thumb2 = little_endian_target->using_thumb2();
4469 thumb_only = little_endian_target->using_thumb_only();
4472 int64_t branch_offset;
4473 bool output_is_position_independent =
4474 parameters->options().output_is_position_independent();
4475 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4477 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4478 // base address (instruction address + 4).
4479 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb)
4480 destination = Bits<32>::bit_select32(destination, location, 0x2);
4481 branch_offset = static_cast<int64_t>(destination) - location;
4483 // Handle cases where:
4484 // - this call goes too far (different Thumb/Thumb2 max
4486 // - it's a Thumb->Arm call and blx is not available, or it's a
4487 // Thumb->Arm branch (not bl). A stub is needed in this case.
4489 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4490 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4492 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4493 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4494 || ((!target_is_thumb)
4495 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4496 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4498 if (target_is_thumb)
4503 stub_type = (output_is_position_independent
4504 || should_force_pic_veneer)
4507 && (r_type == elfcpp::R_ARM_THM_CALL))
4508 // V5T and above. Stub starts with ARM code, so
4509 // we must be able to switch mode before
4510 // reaching it, which is only possible for 'bl'
4511 // (ie R_ARM_THM_CALL relocation).
4512 ? arm_stub_long_branch_any_thumb_pic
4513 // On V4T, use Thumb code only.
4514 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4518 && (r_type == elfcpp::R_ARM_THM_CALL))
4519 ? arm_stub_long_branch_any_any // V5T and above.
4520 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4524 stub_type = (output_is_position_independent
4525 || should_force_pic_veneer)
4526 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4527 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4534 // FIXME: We should check that the input section is from an
4535 // object that has interwork enabled.
4537 stub_type = (output_is_position_independent
4538 || should_force_pic_veneer)
4541 && (r_type == elfcpp::R_ARM_THM_CALL))
4542 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4543 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4547 && (r_type == elfcpp::R_ARM_THM_CALL))
4548 ? arm_stub_long_branch_any_any // V5T and above.
4549 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4551 // Handle v4t short branches.
4552 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4553 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4554 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4555 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4559 else if (r_type == elfcpp::R_ARM_CALL
4560 || r_type == elfcpp::R_ARM_JUMP24
4561 || r_type == elfcpp::R_ARM_PLT32)
4563 branch_offset = static_cast<int64_t>(destination) - location;
4564 if (target_is_thumb)
4568 // FIXME: We should check that the input section is from an
4569 // object that has interwork enabled.
4571 // We have an extra 2-bytes reach because of
4572 // the mode change (bit 24 (H) of BLX encoding).
4573 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4574 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4575 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4576 || (r_type == elfcpp::R_ARM_JUMP24)
4577 || (r_type == elfcpp::R_ARM_PLT32))
4579 stub_type = (output_is_position_independent
4580 || should_force_pic_veneer)
4583 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4584 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4588 ? arm_stub_long_branch_any_any // V5T and above.
4589 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4595 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4596 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4598 stub_type = (output_is_position_independent
4599 || should_force_pic_veneer)
4600 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4601 : arm_stub_long_branch_any_any; /// non-PIC.
4609 // Cortex_a8_stub methods.
4611 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4612 // I is the position of the instruction template in the stub template.
4615 Cortex_a8_stub::do_thumb16_special(size_t i)
4617 // The only use of this is to copy condition code from a conditional
4618 // branch being worked around to the corresponding conditional branch in
4620 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4622 uint16_t data = this->stub_template()->insns()[i].data();
4623 gold_assert((data & 0xff00U) == 0xd000U);
4624 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4628 // Stub_factory methods.
4630 Stub_factory::Stub_factory()
4632 // The instruction template sequences are declared as static
4633 // objects and initialized first time the constructor runs.
4635 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4636 // to reach the stub if necessary.
4637 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4639 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4640 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4641 // dcd R_ARM_ABS32(X)
4644 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4646 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4648 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4649 Insn_template::arm_insn(0xe12fff1c), // bx ip
4650 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4651 // dcd R_ARM_ABS32(X)
4654 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4655 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4657 Insn_template::thumb16_insn(0xb401), // push {r0}
4658 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4659 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4660 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4661 Insn_template::thumb16_insn(0x4760), // bx ip
4662 Insn_template::thumb16_insn(0xbf00), // nop
4663 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4664 // dcd R_ARM_ABS32(X)
4667 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4669 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4671 Insn_template::thumb16_insn(0x4778), // bx pc
4672 Insn_template::thumb16_insn(0x46c0), // nop
4673 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4674 Insn_template::arm_insn(0xe12fff1c), // bx ip
4675 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4676 // dcd R_ARM_ABS32(X)
4679 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4681 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4683 Insn_template::thumb16_insn(0x4778), // bx pc
4684 Insn_template::thumb16_insn(0x46c0), // nop
4685 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4686 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4687 // dcd R_ARM_ABS32(X)
4690 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4691 // one, when the destination is close enough.
4692 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4694 Insn_template::thumb16_insn(0x4778), // bx pc
4695 Insn_template::thumb16_insn(0x46c0), // nop
4696 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4699 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4700 // blx to reach the stub if necessary.
4701 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4703 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4704 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4705 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4706 // dcd R_ARM_REL32(X-4)
4709 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4710 // blx to reach the stub if necessary. We can not add into pc;
4711 // it is not guaranteed to mode switch (different in ARMv6 and
4713 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4715 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4716 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4717 Insn_template::arm_insn(0xe12fff1c), // bx ip
4718 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4719 // dcd R_ARM_REL32(X)
4722 // V4T ARM -> ARM long branch stub, PIC.
4723 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4725 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4726 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4727 Insn_template::arm_insn(0xe12fff1c), // bx ip
4728 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4729 // dcd R_ARM_REL32(X)
4732 // V4T Thumb -> ARM long branch stub, PIC.
4733 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4735 Insn_template::thumb16_insn(0x4778), // bx pc
4736 Insn_template::thumb16_insn(0x46c0), // nop
4737 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4738 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4739 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4740 // dcd R_ARM_REL32(X)
4743 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4745 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4747 Insn_template::thumb16_insn(0xb401), // push {r0}
4748 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4749 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4750 Insn_template::thumb16_insn(0x4484), // add ip, r0
4751 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4752 Insn_template::thumb16_insn(0x4760), // bx ip
4753 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4754 // dcd R_ARM_REL32(X)
4757 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4759 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4761 Insn_template::thumb16_insn(0x4778), // bx pc
4762 Insn_template::thumb16_insn(0x46c0), // nop
4763 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4764 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4765 Insn_template::arm_insn(0xe12fff1c), // bx ip
4766 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4767 // dcd R_ARM_REL32(X)
4770 // Cortex-A8 erratum-workaround stubs.
4772 // Stub used for conditional branches (which may be beyond +/-1MB away,
4773 // so we can't use a conditional branch to reach this stub).
4780 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4782 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4783 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4784 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4788 // Stub used for b.w and bl.w instructions.
4790 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4792 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4795 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4797 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4800 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4801 // instruction (which switches to ARM mode) to point to this stub. Jump to
4802 // the real destination using an ARM-mode branch.
4803 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4805 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4808 // Stub used to provide an interworking for R_ARM_V4BX relocation
4809 // (bx r[n] instruction).
4810 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4812 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4813 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4814 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4817 // Fill in the stub template look-up table. Stub templates are constructed
4818 // per instance of Stub_factory for fast look-up without locking
4819 // in a thread-enabled environment.
4821 this->stub_templates_[arm_stub_none] =
4822 new Stub_template(arm_stub_none, NULL, 0);
4824 #define DEF_STUB(x) \
4828 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4829 Stub_type type = arm_stub_##x; \
4830 this->stub_templates_[type] = \
4831 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4839 // Stub_table methods.
4841 // Remove all Cortex-A8 stub.
4843 template<bool big_endian>
4845 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4847 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4848 p != this->cortex_a8_stubs_.end();
4851 this->cortex_a8_stubs_.clear();
4854 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4856 template<bool big_endian>
4858 Stub_table<big_endian>::relocate_stub(
4860 const Relocate_info<32, big_endian>* relinfo,
4861 Target_arm<big_endian>* arm_target,
4862 Output_section* output_section,
4863 unsigned char* view,
4864 Arm_address address,
4865 section_size_type view_size)
4867 const Stub_template* stub_template = stub->stub_template();
4868 if (stub_template->reloc_count() != 0)
4870 // Adjust view to cover the stub only.
4871 section_size_type offset = stub->offset();
4872 section_size_type stub_size = stub_template->size();
4873 gold_assert(offset + stub_size <= view_size);
4875 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4876 address + offset, stub_size);
4880 // Relocate all stubs in this stub table.
4882 template<bool big_endian>
4884 Stub_table<big_endian>::relocate_stubs(
4885 const Relocate_info<32, big_endian>* relinfo,
4886 Target_arm<big_endian>* arm_target,
4887 Output_section* output_section,
4888 unsigned char* view,
4889 Arm_address address,
4890 section_size_type view_size)
4892 // If we are passed a view bigger than the stub table's. we need to
4894 gold_assert(address == this->address()
4896 == static_cast<section_size_type>(this->data_size())));
4898 // Relocate all relocation stubs.
4899 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4900 p != this->reloc_stubs_.end();
4902 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4903 address, view_size);
4905 // Relocate all Cortex-A8 stubs.
4906 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4907 p != this->cortex_a8_stubs_.end();
4909 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4910 address, view_size);
4912 // Relocate all ARM V4BX stubs.
4913 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
4914 p != this->arm_v4bx_stubs_.end();
4918 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
4919 address, view_size);
4923 // Write out the stubs to file.
4925 template<bool big_endian>
4927 Stub_table<big_endian>::do_write(Output_file* of)
4929 off_t offset = this->offset();
4930 const section_size_type oview_size =
4931 convert_to_section_size_type(this->data_size());
4932 unsigned char* const oview = of->get_output_view(offset, oview_size);
4934 // Write relocation stubs.
4935 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4936 p != this->reloc_stubs_.end();
4939 Reloc_stub* stub = p->second;
4940 Arm_address address = this->address() + stub->offset();
4942 == align_address(address,
4943 stub->stub_template()->alignment()));
4944 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4948 // Write Cortex-A8 stubs.
4949 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4950 p != this->cortex_a8_stubs_.end();
4953 Cortex_a8_stub* stub = p->second;
4954 Arm_address address = this->address() + stub->offset();
4956 == align_address(address,
4957 stub->stub_template()->alignment()));
4958 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4962 // Write ARM V4BX relocation stubs.
4963 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4964 p != this->arm_v4bx_stubs_.end();
4970 Arm_address address = this->address() + (*p)->offset();
4972 == align_address(address,
4973 (*p)->stub_template()->alignment()));
4974 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
4978 of->write_output_view(this->offset(), oview_size, oview);
4981 // Update the data size and address alignment of the stub table at the end
4982 // of a relaxation pass. Return true if either the data size or the
4983 // alignment changed in this relaxation pass.
4985 template<bool big_endian>
4987 Stub_table<big_endian>::update_data_size_and_addralign()
4989 // Go over all stubs in table to compute data size and address alignment.
4990 off_t size = this->reloc_stubs_size_;
4991 unsigned addralign = this->reloc_stubs_addralign_;
4993 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4994 p != this->cortex_a8_stubs_.end();
4997 const Stub_template* stub_template = p->second->stub_template();
4998 addralign = std::max(addralign, stub_template->alignment());
4999 size = (align_address(size, stub_template->alignment())
5000 + stub_template->size());
5003 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5004 p != this->arm_v4bx_stubs_.end();
5010 const Stub_template* stub_template = (*p)->stub_template();
5011 addralign = std::max(addralign, stub_template->alignment());
5012 size = (align_address(size, stub_template->alignment())
5013 + stub_template->size());
5016 // Check if either data size or alignment changed in this pass.
5017 // Update prev_data_size_ and prev_addralign_. These will be used
5018 // as the current data size and address alignment for the next pass.
5019 bool changed = size != this->prev_data_size_;
5020 this->prev_data_size_ = size;
5022 if (addralign != this->prev_addralign_)
5024 this->prev_addralign_ = addralign;
5029 // Finalize the stubs. This sets the offsets of the stubs within the stub
5030 // table. It also marks all input sections needing Cortex-A8 workaround.
5032 template<bool big_endian>
5034 Stub_table<big_endian>::finalize_stubs()
5036 off_t off = this->reloc_stubs_size_;
5037 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5038 p != this->cortex_a8_stubs_.end();
5041 Cortex_a8_stub* stub = p->second;
5042 const Stub_template* stub_template = stub->stub_template();
5043 uint64_t stub_addralign = stub_template->alignment();
5044 off = align_address(off, stub_addralign);
5045 stub->set_offset(off);
5046 off += stub_template->size();
5048 // Mark input section so that we can determine later if a code section
5049 // needs the Cortex-A8 workaround quickly.
5050 Arm_relobj<big_endian>* arm_relobj =
5051 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
5052 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
5055 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5056 p != this->arm_v4bx_stubs_.end();
5062 const Stub_template* stub_template = (*p)->stub_template();
5063 uint64_t stub_addralign = stub_template->alignment();
5064 off = align_address(off, stub_addralign);
5065 (*p)->set_offset(off);
5066 off += stub_template->size();
5069 gold_assert(off <= this->prev_data_size_);
5072 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5073 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5074 // of the address range seen by the linker.
5076 template<bool big_endian>
5078 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
5079 Target_arm<big_endian>* arm_target,
5080 unsigned char* view,
5081 Arm_address view_address,
5082 section_size_type view_size)
5084 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5085 for (Cortex_a8_stub_list::const_iterator p =
5086 this->cortex_a8_stubs_.lower_bound(view_address);
5087 ((p != this->cortex_a8_stubs_.end())
5088 && (p->first < (view_address + view_size)));
5091 // We do not store the THUMB bit in the LSB of either the branch address
5092 // or the stub offset. There is no need to strip the LSB.
5093 Arm_address branch_address = p->first;
5094 const Cortex_a8_stub* stub = p->second;
5095 Arm_address stub_address = this->address() + stub->offset();
5097 // Offset of the branch instruction relative to this view.
5098 section_size_type offset =
5099 convert_to_section_size_type(branch_address - view_address);
5100 gold_assert((offset + 4) <= view_size);
5102 arm_target->apply_cortex_a8_workaround(stub, stub_address,
5103 view + offset, branch_address);
5107 // Arm_input_section methods.
5109 // Initialize an Arm_input_section.
5111 template<bool big_endian>
5113 Arm_input_section<big_endian>::init()
5115 Relobj* relobj = this->relobj();
5116 unsigned int shndx = this->shndx();
5118 // We have to cache original size, alignment and contents to avoid locking
5119 // the original file.
5120 this->original_addralign_ =
5121 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx));
5123 // This is not efficient but we expect only a small number of relaxed
5124 // input sections for stubs.
5125 section_size_type section_size;
5126 const unsigned char* section_contents =
5127 relobj->section_contents(shndx, §ion_size, false);
5128 this->original_size_ =
5129 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx));
5131 gold_assert(this->original_contents_ == NULL);
5132 this->original_contents_ = new unsigned char[section_size];
5133 memcpy(this->original_contents_, section_contents, section_size);
5135 // We want to make this look like the original input section after
5136 // output sections are finalized.
5137 Output_section* os = relobj->output_section(shndx);
5138 off_t offset = relobj->output_section_offset(shndx);
5139 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
5140 this->set_address(os->address() + offset);
5141 this->set_file_offset(os->offset() + offset);
5143 this->set_current_data_size(this->original_size_);
5144 this->finalize_data_size();
5147 template<bool big_endian>
5149 Arm_input_section<big_endian>::do_write(Output_file* of)
5151 // We have to write out the original section content.
5152 gold_assert(this->original_contents_ != NULL);
5153 of->write(this->offset(), this->original_contents_,
5154 this->original_size_);
5156 // If this owns a stub table and it is not empty, write it.
5157 if (this->is_stub_table_owner() && !this->stub_table_->empty())
5158 this->stub_table_->write(of);
5161 // Finalize data size.
5163 template<bool big_endian>
5165 Arm_input_section<big_endian>::set_final_data_size()
5167 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5169 if (this->is_stub_table_owner())
5171 this->stub_table_->finalize_data_size();
5172 off = align_address(off, this->stub_table_->addralign());
5173 off += this->stub_table_->data_size();
5175 this->set_data_size(off);
5178 // Reset address and file offset.
5180 template<bool big_endian>
5182 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
5184 // Size of the original input section contents.
5185 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5187 // If this is a stub table owner, account for the stub table size.
5188 if (this->is_stub_table_owner())
5190 Stub_table<big_endian>* stub_table = this->stub_table_;
5192 // Reset the stub table's address and file offset. The
5193 // current data size for child will be updated after that.
5194 stub_table_->reset_address_and_file_offset();
5195 off = align_address(off, stub_table_->addralign());
5196 off += stub_table->current_data_size();
5199 this->set_current_data_size(off);
5202 // Arm_exidx_cantunwind methods.
5204 // Write this to Output file OF for a fixed endianness.
5206 template<bool big_endian>
5208 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
5210 off_t offset = this->offset();
5211 const section_size_type oview_size = 8;
5212 unsigned char* const oview = of->get_output_view(offset, oview_size);
5214 Output_section* os = this->relobj_->output_section(this->shndx_);
5215 gold_assert(os != NULL);
5217 Arm_relobj<big_endian>* arm_relobj =
5218 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
5219 Arm_address output_offset =
5220 arm_relobj->get_output_section_offset(this->shndx_);
5221 Arm_address section_start;
5222 section_size_type section_size;
5224 // Find out the end of the text section referred by this.
5225 if (output_offset != Arm_relobj<big_endian>::invalid_address)
5227 section_start = os->address() + output_offset;
5228 const Arm_exidx_input_section* exidx_input_section =
5229 arm_relobj->exidx_input_section_by_link(this->shndx_);
5230 gold_assert(exidx_input_section != NULL);
5232 convert_to_section_size_type(exidx_input_section->text_size());
5236 // Currently this only happens for a relaxed section.
5237 const Output_relaxed_input_section* poris =
5238 os->find_relaxed_input_section(this->relobj_, this->shndx_);
5239 gold_assert(poris != NULL);
5240 section_start = poris->address();
5241 section_size = convert_to_section_size_type(poris->data_size());
5244 // We always append this to the end of an EXIDX section.
5245 Arm_address output_address = section_start + section_size;
5247 // Write out the entry. The first word either points to the beginning
5248 // or after the end of a text section. The second word is the special
5249 // EXIDX_CANTUNWIND value.
5250 uint32_t prel31_offset = output_address - this->address();
5251 if (Bits<31>::has_overflow32(offset))
5252 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5253 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview,
5254 prel31_offset & 0x7fffffffU);
5255 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4,
5256 elfcpp::EXIDX_CANTUNWIND);
5258 of->write_output_view(this->offset(), oview_size, oview);
5261 // Arm_exidx_merged_section methods.
5263 // Constructor for Arm_exidx_merged_section.
5264 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5265 // SECTION_OFFSET_MAP points to a section offset map describing how
5266 // parts of the input section are mapped to output. DELETED_BYTES is
5267 // the number of bytes deleted from the EXIDX input section.
5269 Arm_exidx_merged_section::Arm_exidx_merged_section(
5270 const Arm_exidx_input_section& exidx_input_section,
5271 const Arm_exidx_section_offset_map& section_offset_map,
5272 uint32_t deleted_bytes)
5273 : Output_relaxed_input_section(exidx_input_section.relobj(),
5274 exidx_input_section.shndx(),
5275 exidx_input_section.addralign()),
5276 exidx_input_section_(exidx_input_section),
5277 section_offset_map_(section_offset_map)
5279 // If we retain or discard the whole EXIDX input section, we would
5281 gold_assert(deleted_bytes != 0
5282 && deleted_bytes != this->exidx_input_section_.size());
5284 // Fix size here so that we do not need to implement set_final_data_size.
5285 uint32_t size = exidx_input_section.size() - deleted_bytes;
5286 this->set_data_size(size);
5287 this->fix_data_size();
5289 // Allocate buffer for section contents and build contents.
5290 this->section_contents_ = new unsigned char[size];
5293 // Build the contents of a merged EXIDX output section.
5296 Arm_exidx_merged_section::build_contents(
5297 const unsigned char* original_contents,
5298 section_size_type original_size)
5300 // Go over spans of input offsets and write only those that are not
5302 section_offset_type in_start = 0;
5303 section_offset_type out_start = 0;
5304 section_offset_type in_max =
5305 convert_types<section_offset_type>(original_size);
5306 section_offset_type out_max =
5307 convert_types<section_offset_type>(this->data_size());
5308 for (Arm_exidx_section_offset_map::const_iterator p =
5309 this->section_offset_map_.begin();
5310 p != this->section_offset_map_.end();
5313 section_offset_type in_end = p->first;
5314 gold_assert(in_end >= in_start);
5315 section_offset_type out_end = p->second;
5316 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5319 size_t out_chunk_size =
5320 convert_types<size_t>(out_end - out_start + 1);
5322 gold_assert(out_chunk_size == in_chunk_size
5323 && in_end < in_max && out_end < out_max);
5325 memcpy(this->section_contents_ + out_start,
5326 original_contents + in_start,
5328 out_start += out_chunk_size;
5330 in_start += in_chunk_size;
5334 // Given an input OBJECT, an input section index SHNDX within that
5335 // object, and an OFFSET relative to the start of that input
5336 // section, return whether or not the corresponding offset within
5337 // the output section is known. If this function returns true, it
5338 // sets *POUTPUT to the output offset. The value -1 indicates that
5339 // this input offset is being discarded.
5342 Arm_exidx_merged_section::do_output_offset(
5343 const Relobj* relobj,
5345 section_offset_type offset,
5346 section_offset_type* poutput) const
5348 // We only handle offsets for the original EXIDX input section.
5349 if (relobj != this->exidx_input_section_.relobj()
5350 || shndx != this->exidx_input_section_.shndx())
5353 section_offset_type section_size =
5354 convert_types<section_offset_type>(this->exidx_input_section_.size());
5355 if (offset < 0 || offset >= section_size)
5356 // Input offset is out of valid range.
5360 // We need to look up the section offset map to determine the output
5361 // offset. Find the reference point in map that is first offset
5362 // bigger than or equal to this offset.
5363 Arm_exidx_section_offset_map::const_iterator p =
5364 this->section_offset_map_.lower_bound(offset);
5366 // The section offset maps are build such that this should not happen if
5367 // input offset is in the valid range.
5368 gold_assert(p != this->section_offset_map_.end());
5370 // We need to check if this is dropped.
5371 section_offset_type ref = p->first;
5372 section_offset_type mapped_ref = p->second;
5374 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
5375 // Offset is present in output.
5376 *poutput = mapped_ref + (offset - ref);
5378 // Offset is discarded owing to EXIDX entry merging.
5385 // Write this to output file OF.
5388 Arm_exidx_merged_section::do_write(Output_file* of)
5390 off_t offset = this->offset();
5391 const section_size_type oview_size = this->data_size();
5392 unsigned char* const oview = of->get_output_view(offset, oview_size);
5394 Output_section* os = this->relobj()->output_section(this->shndx());
5395 gold_assert(os != NULL);
5397 memcpy(oview, this->section_contents_, oview_size);
5398 of->write_output_view(this->offset(), oview_size, oview);
5401 // Arm_exidx_fixup methods.
5403 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5404 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5405 // points to the end of the last seen EXIDX section.
5408 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5410 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5411 && this->last_input_section_ != NULL)
5413 Relobj* relobj = this->last_input_section_->relobj();
5414 unsigned int text_shndx = this->last_input_section_->link();
5415 Arm_exidx_cantunwind* cantunwind =
5416 new Arm_exidx_cantunwind(relobj, text_shndx);
5417 this->exidx_output_section_->add_output_section_data(cantunwind);
5418 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5422 // Process an EXIDX section entry in input. Return whether this entry
5423 // can be deleted in the output. SECOND_WORD in the second word of the
5427 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5430 if (second_word == elfcpp::EXIDX_CANTUNWIND)
5432 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5433 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5434 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5436 else if ((second_word & 0x80000000) != 0)
5438 // Inlined unwinding data. Merge if equal to previous.
5439 delete_entry = (merge_exidx_entries_
5440 && this->last_unwind_type_ == UT_INLINED_ENTRY
5441 && this->last_inlined_entry_ == second_word);
5442 this->last_unwind_type_ = UT_INLINED_ENTRY;
5443 this->last_inlined_entry_ = second_word;
5447 // Normal table entry. In theory we could merge these too,
5448 // but duplicate entries are likely to be much less common.
5449 delete_entry = false;
5450 this->last_unwind_type_ = UT_NORMAL_ENTRY;
5452 return delete_entry;
5455 // Update the current section offset map during EXIDX section fix-up.
5456 // If there is no map, create one. INPUT_OFFSET is the offset of a
5457 // reference point, DELETED_BYTES is the number of deleted by in the
5458 // section so far. If DELETE_ENTRY is true, the reference point and
5459 // all offsets after the previous reference point are discarded.
5462 Arm_exidx_fixup::update_offset_map(
5463 section_offset_type input_offset,
5464 section_size_type deleted_bytes,
5467 if (this->section_offset_map_ == NULL)
5468 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5469 section_offset_type output_offset;
5471 output_offset = Arm_exidx_input_section::invalid_offset;
5473 output_offset = input_offset - deleted_bytes;
5474 (*this->section_offset_map_)[input_offset] = output_offset;
5477 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5478 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5479 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5480 // If some entries are merged, also store a pointer to a newly created
5481 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5482 // owns the map and is responsible for releasing it after use.
5484 template<bool big_endian>
5486 Arm_exidx_fixup::process_exidx_section(
5487 const Arm_exidx_input_section* exidx_input_section,
5488 const unsigned char* section_contents,
5489 section_size_type section_size,
5490 Arm_exidx_section_offset_map** psection_offset_map)
5492 Relobj* relobj = exidx_input_section->relobj();
5493 unsigned shndx = exidx_input_section->shndx();
5495 if ((section_size % 8) != 0)
5497 // Something is wrong with this section. Better not touch it.
5498 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5499 relobj->name().c_str(), shndx);
5500 this->last_input_section_ = exidx_input_section;
5501 this->last_unwind_type_ = UT_NONE;
5505 uint32_t deleted_bytes = 0;
5506 bool prev_delete_entry = false;
5507 gold_assert(this->section_offset_map_ == NULL);
5509 for (section_size_type i = 0; i < section_size; i += 8)
5511 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5513 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5514 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5516 bool delete_entry = this->process_exidx_entry(second_word);
5518 // Entry deletion causes changes in output offsets. We use a std::map
5519 // to record these. And entry (x, y) means input offset x
5520 // is mapped to output offset y. If y is invalid_offset, then x is
5521 // dropped in the output. Because of the way std::map::lower_bound
5522 // works, we record the last offset in a region w.r.t to keeping or
5523 // dropping. If there is no entry (x0, y0) for an input offset x0,
5524 // the output offset y0 of it is determined by the output offset y1 of
5525 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5526 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5528 if (delete_entry != prev_delete_entry && i != 0)
5529 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5531 // Update total deleted bytes for this entry.
5535 prev_delete_entry = delete_entry;
5538 // If section offset map is not NULL, make an entry for the end of
5540 if (this->section_offset_map_ != NULL)
5541 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5543 *psection_offset_map = this->section_offset_map_;
5544 this->section_offset_map_ = NULL;
5545 this->last_input_section_ = exidx_input_section;
5547 // Set the first output text section so that we can link the EXIDX output
5548 // section to it. Ignore any EXIDX input section that is completely merged.
5549 if (this->first_output_text_section_ == NULL
5550 && deleted_bytes != section_size)
5552 unsigned int link = exidx_input_section->link();
5553 Output_section* os = relobj->output_section(link);
5554 gold_assert(os != NULL);
5555 this->first_output_text_section_ = os;
5558 return deleted_bytes;
5561 // Arm_output_section methods.
5563 // Create a stub group for input sections from BEGIN to END. OWNER
5564 // points to the input section to be the owner a new stub table.
5566 template<bool big_endian>
5568 Arm_output_section<big_endian>::create_stub_group(
5569 Input_section_list::const_iterator begin,
5570 Input_section_list::const_iterator end,
5571 Input_section_list::const_iterator owner,
5572 Target_arm<big_endian>* target,
5573 std::vector<Output_relaxed_input_section*>* new_relaxed_sections,
5576 // We use a different kind of relaxed section in an EXIDX section.
5577 // The static casting from Output_relaxed_input_section to
5578 // Arm_input_section is invalid in an EXIDX section. We are okay
5579 // because we should not be calling this for an EXIDX section.
5580 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5582 // Currently we convert ordinary input sections into relaxed sections only
5583 // at this point but we may want to support creating relaxed input section
5584 // very early. So we check here to see if owner is already a relaxed
5587 Arm_input_section<big_endian>* arm_input_section;
5588 if (owner->is_relaxed_input_section())
5591 Arm_input_section<big_endian>::as_arm_input_section(
5592 owner->relaxed_input_section());
5596 gold_assert(owner->is_input_section());
5597 // Create a new relaxed input section. We need to lock the original
5599 Task_lock_obj<Object> tl(task, owner->relobj());
5601 target->new_arm_input_section(owner->relobj(), owner->shndx());
5602 new_relaxed_sections->push_back(arm_input_section);
5605 // Create a stub table.
5606 Stub_table<big_endian>* stub_table =
5607 target->new_stub_table(arm_input_section);
5609 arm_input_section->set_stub_table(stub_table);
5611 Input_section_list::const_iterator p = begin;
5612 Input_section_list::const_iterator prev_p;
5614 // Look for input sections or relaxed input sections in [begin ... end].
5617 if (p->is_input_section() || p->is_relaxed_input_section())
5619 // The stub table information for input sections live
5620 // in their objects.
5621 Arm_relobj<big_endian>* arm_relobj =
5622 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5623 arm_relobj->set_stub_table(p->shndx(), stub_table);
5627 while (prev_p != end);
5630 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5631 // of stub groups. We grow a stub group by adding input section until the
5632 // size is just below GROUP_SIZE. The last input section will be converted
5633 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5634 // input section after the stub table, effectively double the group size.
5636 // This is similar to the group_sections() function in elf32-arm.c but is
5637 // implemented differently.
5639 template<bool big_endian>
5641 Arm_output_section<big_endian>::group_sections(
5642 section_size_type group_size,
5643 bool stubs_always_after_branch,
5644 Target_arm<big_endian>* target,
5647 // States for grouping.
5650 // No group is being built.
5652 // A group is being built but the stub table is not found yet.
5653 // We keep group a stub group until the size is just under GROUP_SIZE.
5654 // The last input section in the group will be used as the stub table.
5655 FINDING_STUB_SECTION,
5656 // A group is being built and we have already found a stub table.
5657 // We enter this state to grow a stub group by adding input section
5658 // after the stub table. This effectively doubles the group size.
5662 // Any newly created relaxed sections are stored here.
5663 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5665 State state = NO_GROUP;
5666 section_size_type off = 0;
5667 section_size_type group_begin_offset = 0;
5668 section_size_type group_end_offset = 0;
5669 section_size_type stub_table_end_offset = 0;
5670 Input_section_list::const_iterator group_begin =
5671 this->input_sections().end();
5672 Input_section_list::const_iterator stub_table =
5673 this->input_sections().end();
5674 Input_section_list::const_iterator group_end = this->input_sections().end();
5675 for (Input_section_list::const_iterator p = this->input_sections().begin();
5676 p != this->input_sections().end();
5679 section_size_type section_begin_offset =
5680 align_address(off, p->addralign());
5681 section_size_type section_end_offset =
5682 section_begin_offset + p->data_size();
5684 // Check to see if we should group the previously seen sections.
5690 case FINDING_STUB_SECTION:
5691 // Adding this section makes the group larger than GROUP_SIZE.
5692 if (section_end_offset - group_begin_offset >= group_size)
5694 if (stubs_always_after_branch)
5696 gold_assert(group_end != this->input_sections().end());
5697 this->create_stub_group(group_begin, group_end, group_end,
5698 target, &new_relaxed_sections,
5704 // But wait, there's more! Input sections up to
5705 // stub_group_size bytes after the stub table can be
5706 // handled by it too.
5707 state = HAS_STUB_SECTION;
5708 stub_table = group_end;
5709 stub_table_end_offset = group_end_offset;
5714 case HAS_STUB_SECTION:
5715 // Adding this section makes the post stub-section group larger
5717 if (section_end_offset - stub_table_end_offset >= group_size)
5719 gold_assert(group_end != this->input_sections().end());
5720 this->create_stub_group(group_begin, group_end, stub_table,
5721 target, &new_relaxed_sections, task);
5730 // If we see an input section and currently there is no group, start
5731 // a new one. Skip any empty sections. We look at the data size
5732 // instead of calling p->relobj()->section_size() to avoid locking.
5733 if ((p->is_input_section() || p->is_relaxed_input_section())
5734 && (p->data_size() != 0))
5736 if (state == NO_GROUP)
5738 state = FINDING_STUB_SECTION;
5740 group_begin_offset = section_begin_offset;
5743 // Keep track of the last input section seen.
5745 group_end_offset = section_end_offset;
5748 off = section_end_offset;
5751 // Create a stub group for any ungrouped sections.
5752 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5754 gold_assert(group_end != this->input_sections().end());
5755 this->create_stub_group(group_begin, group_end,
5756 (state == FINDING_STUB_SECTION
5759 target, &new_relaxed_sections, task);
5762 // Convert input section into relaxed input section in a batch.
5763 if (!new_relaxed_sections.empty())
5764 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5766 // Update the section offsets
5767 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5769 Arm_relobj<big_endian>* arm_relobj =
5770 Arm_relobj<big_endian>::as_arm_relobj(
5771 new_relaxed_sections[i]->relobj());
5772 unsigned int shndx = new_relaxed_sections[i]->shndx();
5773 // Tell Arm_relobj that this input section is converted.
5774 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5778 // Append non empty text sections in this to LIST in ascending
5779 // order of their position in this.
5781 template<bool big_endian>
5783 Arm_output_section<big_endian>::append_text_sections_to_list(
5784 Text_section_list* list)
5786 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5788 for (Input_section_list::const_iterator p = this->input_sections().begin();
5789 p != this->input_sections().end();
5792 // We only care about plain or relaxed input sections. We also
5793 // ignore any merged sections.
5794 if (p->is_input_section() || p->is_relaxed_input_section())
5795 list->push_back(Text_section_list::value_type(p->relobj(),
5800 template<bool big_endian>
5802 Arm_output_section<big_endian>::fix_exidx_coverage(
5804 const Text_section_list& sorted_text_sections,
5805 Symbol_table* symtab,
5806 bool merge_exidx_entries,
5809 // We should only do this for the EXIDX output section.
5810 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5812 // We don't want the relaxation loop to undo these changes, so we discard
5813 // the current saved states and take another one after the fix-up.
5814 this->discard_states();
5816 // Remove all input sections.
5817 uint64_t address = this->address();
5818 typedef std::list<Output_section::Input_section> Input_section_list;
5819 Input_section_list input_sections;
5820 this->reset_address_and_file_offset();
5821 this->get_input_sections(address, std::string(""), &input_sections);
5823 if (!this->input_sections().empty())
5824 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5826 // Go through all the known input sections and record them.
5827 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5828 typedef Unordered_map<Section_id, const Output_section::Input_section*,
5829 Section_id_hash> Text_to_exidx_map;
5830 Text_to_exidx_map text_to_exidx_map;
5831 for (Input_section_list::const_iterator p = input_sections.begin();
5832 p != input_sections.end();
5835 // This should never happen. At this point, we should only see
5836 // plain EXIDX input sections.
5837 gold_assert(!p->is_relaxed_input_section());
5838 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p);
5841 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries);
5843 // Go over the sorted text sections.
5844 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5845 Section_id_set processed_input_sections;
5846 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5847 p != sorted_text_sections.end();
5850 Relobj* relobj = p->first;
5851 unsigned int shndx = p->second;
5853 Arm_relobj<big_endian>* arm_relobj =
5854 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5855 const Arm_exidx_input_section* exidx_input_section =
5856 arm_relobj->exidx_input_section_by_link(shndx);
5858 // If this text section has no EXIDX section or if the EXIDX section
5859 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5860 // of the last seen EXIDX section.
5861 if (exidx_input_section == NULL || exidx_input_section->has_errors())
5863 exidx_fixup.add_exidx_cantunwind_as_needed();
5867 Relobj* exidx_relobj = exidx_input_section->relobj();
5868 unsigned int exidx_shndx = exidx_input_section->shndx();
5869 Section_id sid(exidx_relobj, exidx_shndx);
5870 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid);
5871 if (iter == text_to_exidx_map.end())
5873 // This is odd. We have not seen this EXIDX input section before.
5874 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5875 // issue a warning instead. We assume the user knows what he
5876 // or she is doing. Otherwise, this is an error.
5877 if (layout->script_options()->saw_sections_clause())
5878 gold_warning(_("unwinding may not work because EXIDX input section"
5879 " %u of %s is not in EXIDX output section"),
5880 exidx_shndx, exidx_relobj->name().c_str());
5882 gold_error(_("unwinding may not work because EXIDX input section"
5883 " %u of %s is not in EXIDX output section"),
5884 exidx_shndx, exidx_relobj->name().c_str());
5886 exidx_fixup.add_exidx_cantunwind_as_needed();
5890 // We need to access the contents of the EXIDX section, lock the
5892 Task_lock_obj<Object> tl(task, exidx_relobj);
5893 section_size_type exidx_size;
5894 const unsigned char* exidx_contents =
5895 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false);
5897 // Fix up coverage and append input section to output data list.
5898 Arm_exidx_section_offset_map* section_offset_map = NULL;
5899 uint32_t deleted_bytes =
5900 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5903 §ion_offset_map);
5905 if (deleted_bytes == exidx_input_section->size())
5907 // The whole EXIDX section got merged. Remove it from output.
5908 gold_assert(section_offset_map == NULL);
5909 exidx_relobj->set_output_section(exidx_shndx, NULL);
5911 // All local symbols defined in this input section will be dropped.
5912 // We need to adjust output local symbol count.
5913 arm_relobj->set_output_local_symbol_count_needs_update();
5915 else if (deleted_bytes > 0)
5917 // Some entries are merged. We need to convert this EXIDX input
5918 // section into a relaxed section.
5919 gold_assert(section_offset_map != NULL);
5921 Arm_exidx_merged_section* merged_section =
5922 new Arm_exidx_merged_section(*exidx_input_section,
5923 *section_offset_map, deleted_bytes);
5924 merged_section->build_contents(exidx_contents, exidx_size);
5926 const std::string secname = exidx_relobj->section_name(exidx_shndx);
5927 this->add_relaxed_input_section(layout, merged_section, secname);
5928 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
5930 // All local symbols defined in discarded portions of this input
5931 // section will be dropped. We need to adjust output local symbol
5933 arm_relobj->set_output_local_symbol_count_needs_update();
5937 // Just add back the EXIDX input section.
5938 gold_assert(section_offset_map == NULL);
5939 const Output_section::Input_section* pis = iter->second;
5940 gold_assert(pis->is_input_section());
5941 this->add_script_input_section(*pis);
5944 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
5947 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5948 exidx_fixup.add_exidx_cantunwind_as_needed();
5950 // Remove any known EXIDX input sections that are not processed.
5951 for (Input_section_list::const_iterator p = input_sections.begin();
5952 p != input_sections.end();
5955 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
5956 == processed_input_sections.end())
5958 // We discard a known EXIDX section because its linked
5959 // text section has been folded by ICF. We also discard an
5960 // EXIDX section with error, the output does not matter in this
5961 // case. We do this to avoid triggering asserts.
5962 Arm_relobj<big_endian>* arm_relobj =
5963 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5964 const Arm_exidx_input_section* exidx_input_section =
5965 arm_relobj->exidx_input_section_by_shndx(p->shndx());
5966 gold_assert(exidx_input_section != NULL);
5967 if (!exidx_input_section->has_errors())
5969 unsigned int text_shndx = exidx_input_section->link();
5970 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
5973 // Remove this from link. We also need to recount the
5975 p->relobj()->set_output_section(p->shndx(), NULL);
5976 arm_relobj->set_output_local_symbol_count_needs_update();
5980 // Link exidx output section to the first seen output section and
5981 // set correct entry size.
5982 this->set_link_section(exidx_fixup.first_output_text_section());
5983 this->set_entsize(8);
5985 // Make changes permanent.
5986 this->save_states();
5987 this->set_section_offsets_need_adjustment();
5990 // Link EXIDX output sections to text output sections.
5992 template<bool big_endian>
5994 Arm_output_section<big_endian>::set_exidx_section_link()
5996 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5997 if (!this->input_sections().empty())
5999 Input_section_list::const_iterator p = this->input_sections().begin();
6000 Arm_relobj<big_endian>* arm_relobj =
6001 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6002 unsigned exidx_shndx = p->shndx();
6003 const Arm_exidx_input_section* exidx_input_section =
6004 arm_relobj->exidx_input_section_by_shndx(exidx_shndx);
6005 gold_assert(exidx_input_section != NULL);
6006 unsigned int text_shndx = exidx_input_section->link();
6007 Output_section* os = arm_relobj->output_section(text_shndx);
6008 this->set_link_section(os);
6012 // Arm_relobj methods.
6014 // Determine if an input section is scannable for stub processing. SHDR is
6015 // the header of the section and SHNDX is the section index. OS is the output
6016 // section for the input section and SYMTAB is the global symbol table used to
6017 // look up ICF information.
6019 template<bool big_endian>
6021 Arm_relobj<big_endian>::section_is_scannable(
6022 const elfcpp::Shdr<32, big_endian>& shdr,
6024 const Output_section* os,
6025 const Symbol_table* symtab)
6027 // Skip any empty sections, unallocated sections or sections whose
6028 // type are not SHT_PROGBITS.
6029 if (shdr.get_sh_size() == 0
6030 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
6031 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
6034 // Skip any discarded or ICF'ed sections.
6035 if (os == NULL || symtab->is_section_folded(this, shndx))
6038 // If this requires special offset handling, check to see if it is
6039 // a relaxed section. If this is not, then it is a merged section that
6040 // we cannot handle.
6041 if (this->is_output_section_offset_invalid(shndx))
6043 const Output_relaxed_input_section* poris =
6044 os->find_relaxed_input_section(this, shndx);
6052 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6053 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6055 template<bool big_endian>
6057 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
6058 const elfcpp::Shdr<32, big_endian>& shdr,
6059 const Relobj::Output_sections& out_sections,
6060 const Symbol_table* symtab,
6061 const unsigned char* pshdrs)
6063 unsigned int sh_type = shdr.get_sh_type();
6064 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
6067 // Ignore empty section.
6068 off_t sh_size = shdr.get_sh_size();
6072 // Ignore reloc section with unexpected symbol table. The
6073 // error will be reported in the final link.
6074 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
6077 unsigned int reloc_size;
6078 if (sh_type == elfcpp::SHT_REL)
6079 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6081 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6083 // Ignore reloc section with unexpected entsize or uneven size.
6084 // The error will be reported in the final link.
6085 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
6088 // Ignore reloc section with bad info. This error will be
6089 // reported in the final link.
6090 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6091 if (index >= this->shnum())
6094 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6095 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
6096 return this->section_is_scannable(text_shdr, index,
6097 out_sections[index], symtab);
6100 // Return the output address of either a plain input section or a relaxed
6101 // input section. SHNDX is the section index. We define and use this
6102 // instead of calling Output_section::output_address because that is slow
6103 // for large output.
6105 template<bool big_endian>
6107 Arm_relobj<big_endian>::simple_input_section_output_address(
6111 if (this->is_output_section_offset_invalid(shndx))
6113 const Output_relaxed_input_section* poris =
6114 os->find_relaxed_input_section(this, shndx);
6115 // We do not handle merged sections here.
6116 gold_assert(poris != NULL);
6117 return poris->address();
6120 return os->address() + this->get_output_section_offset(shndx);
6123 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6124 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6126 template<bool big_endian>
6128 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
6129 const elfcpp::Shdr<32, big_endian>& shdr,
6132 const Symbol_table* symtab)
6134 if (!this->section_is_scannable(shdr, shndx, os, symtab))
6137 // If the section does not cross any 4K-boundaries, it does not need to
6139 Arm_address address = this->simple_input_section_output_address(shndx, os);
6140 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
6146 // Scan a section for Cortex-A8 workaround.
6148 template<bool big_endian>
6150 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
6151 const elfcpp::Shdr<32, big_endian>& shdr,
6154 Target_arm<big_endian>* arm_target)
6156 // Look for the first mapping symbol in this section. It should be
6158 Mapping_symbol_position section_start(shndx, 0);
6159 typename Mapping_symbols_info::const_iterator p =
6160 this->mapping_symbols_info_.lower_bound(section_start);
6162 // There are no mapping symbols for this section. Treat it as a data-only
6163 // section. Issue a warning if section is marked as containing
6165 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
6167 if ((this->section_flags(shndx) & elfcpp::SHF_EXECINSTR) != 0)
6168 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6169 "erratum because it has no mapping symbols."),
6170 shndx, this->name().c_str());
6174 Arm_address output_address =
6175 this->simple_input_section_output_address(shndx, os);
6177 // Get the section contents.
6178 section_size_type input_view_size = 0;
6179 const unsigned char* input_view =
6180 this->section_contents(shndx, &input_view_size, false);
6182 // We need to go through the mapping symbols to determine what to
6183 // scan. There are two reasons. First, we should look at THUMB code and
6184 // THUMB code only. Second, we only want to look at the 4K-page boundary
6185 // to speed up the scanning.
6187 while (p != this->mapping_symbols_info_.end()
6188 && p->first.first == shndx)
6190 typename Mapping_symbols_info::const_iterator next =
6191 this->mapping_symbols_info_.upper_bound(p->first);
6193 // Only scan part of a section with THUMB code.
6194 if (p->second == 't')
6196 // Determine the end of this range.
6197 section_size_type span_start =
6198 convert_to_section_size_type(p->first.second);
6199 section_size_type span_end;
6200 if (next != this->mapping_symbols_info_.end()
6201 && next->first.first == shndx)
6202 span_end = convert_to_section_size_type(next->first.second);
6204 span_end = convert_to_section_size_type(shdr.get_sh_size());
6206 if (((span_start + output_address) & ~0xfffUL)
6207 != ((span_end + output_address - 1) & ~0xfffUL))
6209 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
6210 span_start, span_end,
6220 // Scan relocations for stub generation.
6222 template<bool big_endian>
6224 Arm_relobj<big_endian>::scan_sections_for_stubs(
6225 Target_arm<big_endian>* arm_target,
6226 const Symbol_table* symtab,
6227 const Layout* layout)
6229 unsigned int shnum = this->shnum();
6230 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6232 // Read the section headers.
6233 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6237 // To speed up processing, we set up hash tables for fast lookup of
6238 // input offsets to output addresses.
6239 this->initialize_input_to_output_maps();
6241 const Relobj::Output_sections& out_sections(this->output_sections());
6243 Relocate_info<32, big_endian> relinfo;
6244 relinfo.symtab = symtab;
6245 relinfo.layout = layout;
6246 relinfo.object = this;
6248 // Do relocation stubs scanning.
6249 const unsigned char* p = pshdrs + shdr_size;
6250 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6252 const elfcpp::Shdr<32, big_endian> shdr(p);
6253 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
6256 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6257 Arm_address output_offset = this->get_output_section_offset(index);
6258 Arm_address output_address;
6259 if (output_offset != invalid_address)
6260 output_address = out_sections[index]->address() + output_offset;
6263 // Currently this only happens for a relaxed section.
6264 const Output_relaxed_input_section* poris =
6265 out_sections[index]->find_relaxed_input_section(this, index);
6266 gold_assert(poris != NULL);
6267 output_address = poris->address();
6270 // Get the relocations.
6271 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
6275 // Get the section contents. This does work for the case in which
6276 // we modify the contents of an input section. We need to pass the
6277 // output view under such circumstances.
6278 section_size_type input_view_size = 0;
6279 const unsigned char* input_view =
6280 this->section_contents(index, &input_view_size, false);
6282 relinfo.reloc_shndx = i;
6283 relinfo.data_shndx = index;
6284 unsigned int sh_type = shdr.get_sh_type();
6285 unsigned int reloc_size;
6286 if (sh_type == elfcpp::SHT_REL)
6287 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6289 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6291 Output_section* os = out_sections[index];
6292 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
6293 shdr.get_sh_size() / reloc_size,
6295 output_offset == invalid_address,
6296 input_view, output_address,
6301 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6302 // after its relocation section, if there is one, is processed for
6303 // relocation stubs. Merging this loop with the one above would have been
6304 // complicated since we would have had to make sure that relocation stub
6305 // scanning is done first.
6306 if (arm_target->fix_cortex_a8())
6308 const unsigned char* p = pshdrs + shdr_size;
6309 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6311 const elfcpp::Shdr<32, big_endian> shdr(p);
6312 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
6315 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
6320 // After we've done the relocations, we release the hash tables,
6321 // since we no longer need them.
6322 this->free_input_to_output_maps();
6325 // Count the local symbols. The ARM backend needs to know if a symbol
6326 // is a THUMB function or not. For global symbols, it is easy because
6327 // the Symbol object keeps the ELF symbol type. For local symbol it is
6328 // harder because we cannot access this information. So we override the
6329 // do_count_local_symbol in parent and scan local symbols to mark
6330 // THUMB functions. This is not the most efficient way but I do not want to
6331 // slow down other ports by calling a per symbol target hook inside
6332 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6334 template<bool big_endian>
6336 Arm_relobj<big_endian>::do_count_local_symbols(
6337 Stringpool_template<char>* pool,
6338 Stringpool_template<char>* dynpool)
6340 // We need to fix-up the values of any local symbols whose type are
6343 // Ask parent to count the local symbols.
6344 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool);
6345 const unsigned int loccount = this->local_symbol_count();
6349 // Initialize the thumb function bit-vector.
6350 std::vector<bool> empty_vector(loccount, false);
6351 this->local_symbol_is_thumb_function_.swap(empty_vector);
6353 // Read the symbol table section header.
6354 const unsigned int symtab_shndx = this->symtab_shndx();
6355 elfcpp::Shdr<32, big_endian>
6356 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6357 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6359 // Read the local symbols.
6360 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6361 gold_assert(loccount == symtabshdr.get_sh_info());
6362 off_t locsize = loccount * sym_size;
6363 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6364 locsize, true, true);
6366 // For mapping symbol processing, we need to read the symbol names.
6367 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
6368 if (strtab_shndx >= this->shnum())
6370 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
6374 elfcpp::Shdr<32, big_endian>
6375 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
6376 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
6378 this->error(_("symbol table name section has wrong type: %u"),
6379 static_cast<unsigned int>(strtabshdr.get_sh_type()));
6382 const char* pnames =
6383 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
6384 strtabshdr.get_sh_size(),
6387 // Loop over the local symbols and mark any local symbols pointing
6388 // to THUMB functions.
6390 // Skip the first dummy symbol.
6392 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values =
6393 this->local_values();
6394 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6396 elfcpp::Sym<32, big_endian> sym(psyms);
6397 elfcpp::STT st_type = sym.get_st_type();
6398 Symbol_value<32>& lv((*plocal_values)[i]);
6399 Arm_address input_value = lv.input_value();
6401 // Check to see if this is a mapping symbol.
6402 const char* sym_name = pnames + sym.get_st_name();
6403 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
6406 unsigned int input_shndx =
6407 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary);
6408 gold_assert(is_ordinary);
6410 // Strip of LSB in case this is a THUMB symbol.
6411 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
6412 this->mapping_symbols_info_[msp] = sym_name[1];
6415 if (st_type == elfcpp::STT_ARM_TFUNC
6416 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
6418 // This is a THUMB function. Mark this and canonicalize the
6419 // symbol value by setting LSB.
6420 this->local_symbol_is_thumb_function_[i] = true;
6421 if ((input_value & 1) == 0)
6422 lv.set_input_value(input_value | 1);
6427 // Relocate sections.
6428 template<bool big_endian>
6430 Arm_relobj<big_endian>::do_relocate_sections(
6431 const Symbol_table* symtab,
6432 const Layout* layout,
6433 const unsigned char* pshdrs,
6435 typename Sized_relobj_file<32, big_endian>::Views* pviews)
6437 // Call parent to relocate sections.
6438 Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout,
6439 pshdrs, of, pviews);
6441 // We do not generate stubs if doing a relocatable link.
6442 if (parameters->options().relocatable())
6445 // Relocate stub tables.
6446 unsigned int shnum = this->shnum();
6448 Target_arm<big_endian>* arm_target =
6449 Target_arm<big_endian>::default_target();
6451 Relocate_info<32, big_endian> relinfo;
6452 relinfo.symtab = symtab;
6453 relinfo.layout = layout;
6454 relinfo.object = this;
6456 for (unsigned int i = 1; i < shnum; ++i)
6458 Arm_input_section<big_endian>* arm_input_section =
6459 arm_target->find_arm_input_section(this, i);
6461 if (arm_input_section != NULL
6462 && arm_input_section->is_stub_table_owner()
6463 && !arm_input_section->stub_table()->empty())
6465 // We cannot discard a section if it owns a stub table.
6466 Output_section* os = this->output_section(i);
6467 gold_assert(os != NULL);
6469 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
6470 relinfo.reloc_shdr = NULL;
6471 relinfo.data_shndx = i;
6472 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
6474 gold_assert((*pviews)[i].view != NULL);
6476 // We are passed the output section view. Adjust it to cover the
6478 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6479 gold_assert((stub_table->address() >= (*pviews)[i].address)
6480 && ((stub_table->address() + stub_table->data_size())
6481 <= (*pviews)[i].address + (*pviews)[i].view_size));
6483 off_t offset = stub_table->address() - (*pviews)[i].address;
6484 unsigned char* view = (*pviews)[i].view + offset;
6485 Arm_address address = stub_table->address();
6486 section_size_type view_size = stub_table->data_size();
6488 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6492 // Apply Cortex A8 workaround if applicable.
6493 if (this->section_has_cortex_a8_workaround(i))
6495 unsigned char* view = (*pviews)[i].view;
6496 Arm_address view_address = (*pviews)[i].address;
6497 section_size_type view_size = (*pviews)[i].view_size;
6498 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6500 // Adjust view to cover section.
6501 Output_section* os = this->output_section(i);
6502 gold_assert(os != NULL);
6503 Arm_address section_address =
6504 this->simple_input_section_output_address(i, os);
6505 uint64_t section_size = this->section_size(i);
6507 gold_assert(section_address >= view_address
6508 && ((section_address + section_size)
6509 <= (view_address + view_size)));
6511 unsigned char* section_view = view + (section_address - view_address);
6513 // Apply the Cortex-A8 workaround to the output address range
6514 // corresponding to this input section.
6515 stub_table->apply_cortex_a8_workaround_to_address_range(
6524 // Find the linked text section of an EXIDX section by looking at the first
6525 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6526 // must be linked to its associated code section via the sh_link field of
6527 // its section header. However, some tools are broken and the link is not
6528 // always set. LD just drops such an EXIDX section silently, causing the
6529 // associated code not unwindabled. Here we try a little bit harder to
6530 // discover the linked code section.
6532 // PSHDR points to the section header of a relocation section of an EXIDX
6533 // section. If we can find a linked text section, return true and
6534 // store the text section index in the location PSHNDX. Otherwise
6537 template<bool big_endian>
6539 Arm_relobj<big_endian>::find_linked_text_section(
6540 const unsigned char* pshdr,
6541 const unsigned char* psyms,
6542 unsigned int* pshndx)
6544 elfcpp::Shdr<32, big_endian> shdr(pshdr);
6546 // If there is no relocation, we cannot find the linked text section.
6548 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6549 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6551 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6552 size_t reloc_count = shdr.get_sh_size() / reloc_size;
6554 // Get the relocations.
6555 const unsigned char* prelocs =
6556 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6558 // Find the REL31 relocation for the first word of the first EXIDX entry.
6559 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6561 Arm_address r_offset;
6562 typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6563 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6565 typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6566 r_info = reloc.get_r_info();
6567 r_offset = reloc.get_r_offset();
6571 typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6572 r_info = reloc.get_r_info();
6573 r_offset = reloc.get_r_offset();
6576 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6577 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6580 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6582 || r_sym >= this->local_symbol_count()
6586 // This is the relocation for the first word of the first EXIDX entry.
6587 // We expect to see a local section symbol.
6588 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6589 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6590 if (sym.get_st_type() == elfcpp::STT_SECTION)
6594 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary);
6595 gold_assert(is_ordinary);
6605 // Make an EXIDX input section object for an EXIDX section whose index is
6606 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6607 // is the section index of the linked text section.
6609 template<bool big_endian>
6611 Arm_relobj<big_endian>::make_exidx_input_section(
6613 const elfcpp::Shdr<32, big_endian>& shdr,
6614 unsigned int text_shndx,
6615 const elfcpp::Shdr<32, big_endian>& text_shdr)
6617 // Create an Arm_exidx_input_section object for this EXIDX section.
6618 Arm_exidx_input_section* exidx_input_section =
6619 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6620 shdr.get_sh_addralign(),
6621 text_shdr.get_sh_size());
6623 gold_assert(this->exidx_section_map_[shndx] == NULL);
6624 this->exidx_section_map_[shndx] = exidx_input_section;
6626 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum())
6628 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6629 this->section_name(shndx).c_str(), shndx, text_shndx,
6630 this->name().c_str());
6631 exidx_input_section->set_has_errors();
6633 else if (this->exidx_section_map_[text_shndx] != NULL)
6635 unsigned other_exidx_shndx =
6636 this->exidx_section_map_[text_shndx]->shndx();
6637 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6639 this->section_name(shndx).c_str(), shndx,
6640 this->section_name(other_exidx_shndx).c_str(),
6641 other_exidx_shndx, this->section_name(text_shndx).c_str(),
6642 text_shndx, this->name().c_str());
6643 exidx_input_section->set_has_errors();
6646 this->exidx_section_map_[text_shndx] = exidx_input_section;
6648 // Check section flags of text section.
6649 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0)
6651 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6653 this->section_name(shndx).c_str(), shndx,
6654 this->section_name(text_shndx).c_str(), text_shndx,
6655 this->name().c_str());
6656 exidx_input_section->set_has_errors();
6658 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0)
6659 // I would like to make this an error but currently ld just ignores
6661 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6663 this->section_name(shndx).c_str(), shndx,
6664 this->section_name(text_shndx).c_str(), text_shndx,
6665 this->name().c_str());
6668 // Read the symbol information.
6670 template<bool big_endian>
6672 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6674 // Call parent class to read symbol information.
6675 Sized_relobj_file<32, big_endian>::do_read_symbols(sd);
6677 // If this input file is a binary file, it has no processor
6678 // specific flags and attributes section.
6679 Input_file::Format format = this->input_file()->format();
6680 if (format != Input_file::FORMAT_ELF)
6682 gold_assert(format == Input_file::FORMAT_BINARY);
6683 this->merge_flags_and_attributes_ = false;
6687 // Read processor-specific flags in ELF file header.
6688 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6689 elfcpp::Elf_sizes<32>::ehdr_size,
6691 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6692 this->processor_specific_flags_ = ehdr.get_e_flags();
6694 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6696 std::vector<unsigned int> deferred_exidx_sections;
6697 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6698 const unsigned char* pshdrs = sd->section_headers->data();
6699 const unsigned char* ps = pshdrs + shdr_size;
6700 bool must_merge_flags_and_attributes = false;
6701 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6703 elfcpp::Shdr<32, big_endian> shdr(ps);
6705 // Sometimes an object has no contents except the section name string
6706 // table and an empty symbol table with the undefined symbol. We
6707 // don't want to merge processor-specific flags from such an object.
6708 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB)
6710 // Symbol table is not empty.
6711 const elfcpp::Elf_types<32>::Elf_WXword sym_size =
6712 elfcpp::Elf_sizes<32>::sym_size;
6713 if (shdr.get_sh_size() > sym_size)
6714 must_merge_flags_and_attributes = true;
6716 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB)
6717 // If this is neither an empty symbol table nor a string table,
6719 must_merge_flags_and_attributes = true;
6721 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6723 gold_assert(this->attributes_section_data_ == NULL);
6724 section_offset_type section_offset = shdr.get_sh_offset();
6725 section_size_type section_size =
6726 convert_to_section_size_type(shdr.get_sh_size());
6727 const unsigned char* view =
6728 this->get_view(section_offset, section_size, true, false);
6729 this->attributes_section_data_ =
6730 new Attributes_section_data(view, section_size);
6732 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6734 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6735 if (text_shndx == elfcpp::SHN_UNDEF)
6736 deferred_exidx_sections.push_back(i);
6739 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6740 + text_shndx * shdr_size);
6741 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr);
6743 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6744 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0)
6745 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6746 this->section_name(i).c_str(), this->name().c_str());
6751 if (!must_merge_flags_and_attributes)
6753 gold_assert(deferred_exidx_sections.empty());
6754 this->merge_flags_and_attributes_ = false;
6758 // Some tools are broken and they do not set the link of EXIDX sections.
6759 // We look at the first relocation to figure out the linked sections.
6760 if (!deferred_exidx_sections.empty())
6762 // We need to go over the section headers again to find the mapping
6763 // from sections being relocated to their relocation sections. This is
6764 // a bit inefficient as we could do that in the loop above. However,
6765 // we do not expect any deferred EXIDX sections normally. So we do not
6766 // want to slow down the most common path.
6767 typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
6768 Reloc_map reloc_map;
6769 ps = pshdrs + shdr_size;
6770 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6772 elfcpp::Shdr<32, big_endian> shdr(ps);
6773 elfcpp::Elf_Word sh_type = shdr.get_sh_type();
6774 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
6776 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
6777 if (info_shndx >= this->shnum())
6778 gold_error(_("relocation section %u has invalid info %u"),
6780 Reloc_map::value_type value(info_shndx, i);
6781 std::pair<Reloc_map::iterator, bool> result =
6782 reloc_map.insert(value);
6784 gold_error(_("section %u has multiple relocation sections "
6786 info_shndx, i, reloc_map[info_shndx]);
6790 // Read the symbol table section header.
6791 const unsigned int symtab_shndx = this->symtab_shndx();
6792 elfcpp::Shdr<32, big_endian>
6793 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6794 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6796 // Read the local symbols.
6797 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6798 const unsigned int loccount = this->local_symbol_count();
6799 gold_assert(loccount == symtabshdr.get_sh_info());
6800 off_t locsize = loccount * sym_size;
6801 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6802 locsize, true, true);
6804 // Process the deferred EXIDX sections.
6805 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
6807 unsigned int shndx = deferred_exidx_sections[i];
6808 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
6809 unsigned int text_shndx = elfcpp::SHN_UNDEF;
6810 Reloc_map::const_iterator it = reloc_map.find(shndx);
6811 if (it != reloc_map.end())
6812 find_linked_text_section(pshdrs + it->second * shdr_size,
6813 psyms, &text_shndx);
6814 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6815 + text_shndx * shdr_size);
6816 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr);
6821 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6822 // sections for unwinding. These sections are referenced implicitly by
6823 // text sections linked in the section headers. If we ignore these implicit
6824 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6825 // will be garbage-collected incorrectly. Hence we override the same function
6826 // in the base class to handle these implicit references.
6828 template<bool big_endian>
6830 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6832 Read_relocs_data* rd)
6834 // First, call base class method to process relocations in this object.
6835 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6837 // If --gc-sections is not specified, there is nothing more to do.
6838 // This happens when --icf is used but --gc-sections is not.
6839 if (!parameters->options().gc_sections())
6842 unsigned int shnum = this->shnum();
6843 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6844 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6848 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6849 // to these from the linked text sections.
6850 const unsigned char* ps = pshdrs + shdr_size;
6851 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6853 elfcpp::Shdr<32, big_endian> shdr(ps);
6854 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6856 // Found an .ARM.exidx section, add it to the set of reachable
6857 // sections from its linked text section.
6858 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6859 symtab->gc()->add_reference(this, text_shndx, this, i);
6864 // Update output local symbol count. Owing to EXIDX entry merging, some local
6865 // symbols will be removed in output. Adjust output local symbol count
6866 // accordingly. We can only changed the static output local symbol count. It
6867 // is too late to change the dynamic symbols.
6869 template<bool big_endian>
6871 Arm_relobj<big_endian>::update_output_local_symbol_count()
6873 // Caller should check that this needs updating. We want caller checking
6874 // because output_local_symbol_count_needs_update() is most likely inlined.
6875 gold_assert(this->output_local_symbol_count_needs_update_);
6877 gold_assert(this->symtab_shndx() != -1U);
6878 if (this->symtab_shndx() == 0)
6880 // This object has no symbols. Weird but legal.
6884 // Read the symbol table section header.
6885 const unsigned int symtab_shndx = this->symtab_shndx();
6886 elfcpp::Shdr<32, big_endian>
6887 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6888 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6890 // Read the local symbols.
6891 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6892 const unsigned int loccount = this->local_symbol_count();
6893 gold_assert(loccount == symtabshdr.get_sh_info());
6894 off_t locsize = loccount * sym_size;
6895 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6896 locsize, true, true);
6898 // Loop over the local symbols.
6900 typedef typename Sized_relobj_file<32, big_endian>::Output_sections
6902 const Output_sections& out_sections(this->output_sections());
6903 unsigned int shnum = this->shnum();
6904 unsigned int count = 0;
6905 // Skip the first, dummy, symbol.
6907 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6909 elfcpp::Sym<32, big_endian> sym(psyms);
6911 Symbol_value<32>& lv((*this->local_values())[i]);
6913 // This local symbol was already discarded by do_count_local_symbols.
6914 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry())
6918 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
6923 Output_section* os = out_sections[shndx];
6925 // This local symbol no longer has an output section. Discard it.
6928 lv.set_no_output_symtab_entry();
6932 // Currently we only discard parts of EXIDX input sections.
6933 // We explicitly check for a merged EXIDX input section to avoid
6934 // calling Output_section_data::output_offset unless necessary.
6935 if ((this->get_output_section_offset(shndx) == invalid_address)
6936 && (this->exidx_input_section_by_shndx(shndx) != NULL))
6938 section_offset_type output_offset =
6939 os->output_offset(this, shndx, lv.input_value());
6940 if (output_offset == -1)
6942 // This symbol is defined in a part of an EXIDX input section
6943 // that is discarded due to entry merging.
6944 lv.set_no_output_symtab_entry();
6953 this->set_output_local_symbol_count(count);
6954 this->output_local_symbol_count_needs_update_ = false;
6957 // Arm_dynobj methods.
6959 // Read the symbol information.
6961 template<bool big_endian>
6963 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6965 // Call parent class to read symbol information.
6966 Sized_dynobj<32, big_endian>::do_read_symbols(sd);
6968 // Read processor-specific flags in ELF file header.
6969 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6970 elfcpp::Elf_sizes<32>::ehdr_size,
6972 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6973 this->processor_specific_flags_ = ehdr.get_e_flags();
6975 // Read the attributes section if there is one.
6976 // We read from the end because gas seems to put it near the end of
6977 // the section headers.
6978 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6979 const unsigned char* ps =
6980 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
6981 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
6983 elfcpp::Shdr<32, big_endian> shdr(ps);
6984 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6986 section_offset_type section_offset = shdr.get_sh_offset();
6987 section_size_type section_size =
6988 convert_to_section_size_type(shdr.get_sh_size());
6989 const unsigned char* view =
6990 this->get_view(section_offset, section_size, true, false);
6991 this->attributes_section_data_ =
6992 new Attributes_section_data(view, section_size);
6998 // Stub_addend_reader methods.
7000 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7002 template<bool big_endian>
7003 elfcpp::Elf_types<32>::Elf_Swxword
7004 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
7005 unsigned int r_type,
7006 const unsigned char* view,
7007 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
7009 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
7013 case elfcpp::R_ARM_CALL:
7014 case elfcpp::R_ARM_JUMP24:
7015 case elfcpp::R_ARM_PLT32:
7017 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7018 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7019 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
7020 return Bits<26>::sign_extend32(val << 2);
7023 case elfcpp::R_ARM_THM_CALL:
7024 case elfcpp::R_ARM_THM_JUMP24:
7025 case elfcpp::R_ARM_THM_XPC22:
7027 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7028 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7029 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7030 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7031 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
7034 case elfcpp::R_ARM_THM_JUMP19:
7036 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7037 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7038 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7039 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7040 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
7048 // Arm_output_data_got methods.
7050 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7051 // The first one is initialized to be 1, which is the module index for
7052 // the main executable and the second one 0. A reloc of the type
7053 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7054 // be applied by gold. GSYM is a global symbol.
7056 template<bool big_endian>
7058 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7059 unsigned int got_type,
7062 if (gsym->has_got_offset(got_type))
7065 // We are doing a static link. Just mark it as belong to module 1,
7067 unsigned int got_offset = this->add_constant(1);
7068 gsym->set_got_offset(got_type, got_offset);
7069 got_offset = this->add_constant(0);
7070 this->static_relocs_.push_back(Static_reloc(got_offset,
7071 elfcpp::R_ARM_TLS_DTPOFF32,
7075 // Same as the above but for a local symbol.
7077 template<bool big_endian>
7079 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7080 unsigned int got_type,
7081 Sized_relobj_file<32, big_endian>* object,
7084 if (object->local_has_got_offset(index, got_type))
7087 // We are doing a static link. Just mark it as belong to module 1,
7089 unsigned int got_offset = this->add_constant(1);
7090 object->set_local_got_offset(index, got_type, got_offset);
7091 got_offset = this->add_constant(0);
7092 this->static_relocs_.push_back(Static_reloc(got_offset,
7093 elfcpp::R_ARM_TLS_DTPOFF32,
7097 template<bool big_endian>
7099 Arm_output_data_got<big_endian>::do_write(Output_file* of)
7101 // Call parent to write out GOT.
7102 Output_data_got<32, big_endian>::do_write(of);
7104 // We are done if there is no fix up.
7105 if (this->static_relocs_.empty())
7108 gold_assert(parameters->doing_static_link());
7110 const off_t offset = this->offset();
7111 const section_size_type oview_size =
7112 convert_to_section_size_type(this->data_size());
7113 unsigned char* const oview = of->get_output_view(offset, oview_size);
7115 Output_segment* tls_segment = this->layout_->tls_segment();
7116 gold_assert(tls_segment != NULL);
7118 // The thread pointer $tp points to the TCB, which is followed by the
7119 // TLS. So we need to adjust $tp relative addressing by this amount.
7120 Arm_address aligned_tcb_size =
7121 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
7123 for (size_t i = 0; i < this->static_relocs_.size(); ++i)
7125 Static_reloc& reloc(this->static_relocs_[i]);
7128 if (!reloc.symbol_is_global())
7130 Sized_relobj_file<32, big_endian>* object = reloc.relobj();
7131 const Symbol_value<32>* psymval =
7132 reloc.relobj()->local_symbol(reloc.index());
7134 // We are doing static linking. Issue an error and skip this
7135 // relocation if the symbol is undefined or in a discarded_section.
7137 unsigned int shndx = psymval->input_shndx(&is_ordinary);
7138 if ((shndx == elfcpp::SHN_UNDEF)
7140 && shndx != elfcpp::SHN_UNDEF
7141 && !object->is_section_included(shndx)
7142 && !this->symbol_table_->is_section_folded(object, shndx)))
7144 gold_error(_("undefined or discarded local symbol %u from "
7145 " object %s in GOT"),
7146 reloc.index(), reloc.relobj()->name().c_str());
7150 value = psymval->value(object, 0);
7154 const Symbol* gsym = reloc.symbol();
7155 gold_assert(gsym != NULL);
7156 if (gsym->is_forwarder())
7157 gsym = this->symbol_table_->resolve_forwards(gsym);
7159 // We are doing static linking. Issue an error and skip this
7160 // relocation if the symbol is undefined or in a discarded_section
7161 // unless it is a weakly_undefined symbol.
7162 if ((gsym->is_defined_in_discarded_section()
7163 || gsym->is_undefined())
7164 && !gsym->is_weak_undefined())
7166 gold_error(_("undefined or discarded symbol %s in GOT"),
7171 if (!gsym->is_weak_undefined())
7173 const Sized_symbol<32>* sym =
7174 static_cast<const Sized_symbol<32>*>(gsym);
7175 value = sym->value();
7181 unsigned got_offset = reloc.got_offset();
7182 gold_assert(got_offset < oview_size);
7184 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7185 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset);
7187 switch (reloc.r_type())
7189 case elfcpp::R_ARM_TLS_DTPOFF32:
7192 case elfcpp::R_ARM_TLS_TPOFF32:
7193 x = value + aligned_tcb_size;
7198 elfcpp::Swap<32, big_endian>::writeval(wv, x);
7201 of->write_output_view(offset, oview_size, oview);
7204 // A class to handle the PLT data.
7205 // This is an abstract base class that handles most of the linker details
7206 // but does not know the actual contents of PLT entries. The derived
7207 // classes below fill in those details.
7209 template<bool big_endian>
7210 class Output_data_plt_arm : public Output_section_data
7213 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
7216 Output_data_plt_arm(Layout*, uint64_t addralign, Output_data_space*);
7218 // Add an entry to the PLT.
7220 add_entry(Symbol* gsym);
7222 // Return the .rel.plt section data.
7223 const Reloc_section*
7225 { return this->rel_; }
7227 // Return the number of PLT entries.
7230 { return this->count_; }
7232 // Return the offset of the first non-reserved PLT entry.
7234 first_plt_entry_offset() const
7235 { return this->do_first_plt_entry_offset(); }
7237 // Return the size of a PLT entry.
7239 get_plt_entry_size() const
7240 { return this->do_get_plt_entry_size(); }
7243 // Fill in the first PLT entry.
7245 fill_first_plt_entry(unsigned char* pov,
7246 Arm_address got_address,
7247 Arm_address plt_address)
7248 { this->do_fill_first_plt_entry(pov, got_address, plt_address); }
7251 fill_plt_entry(unsigned char* pov,
7252 Arm_address got_address,
7253 Arm_address plt_address,
7254 unsigned int got_offset,
7255 unsigned int plt_offset)
7256 { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); }
7258 virtual unsigned int
7259 do_first_plt_entry_offset() const = 0;
7261 virtual unsigned int
7262 do_get_plt_entry_size() const = 0;
7265 do_fill_first_plt_entry(unsigned char* pov,
7266 Arm_address got_address,
7267 Arm_address plt_address) = 0;
7270 do_fill_plt_entry(unsigned char* pov,
7271 Arm_address got_address,
7272 Arm_address plt_address,
7273 unsigned int got_offset,
7274 unsigned int plt_offset) = 0;
7277 do_adjust_output_section(Output_section* os);
7279 // Write to a map file.
7281 do_print_to_mapfile(Mapfile* mapfile) const
7282 { mapfile->print_output_data(this, _("** PLT")); }
7285 // Set the final size.
7287 set_final_data_size()
7289 this->set_data_size(this->first_plt_entry_offset()
7290 + this->count_ * this->get_plt_entry_size());
7293 // Write out the PLT data.
7295 do_write(Output_file*);
7297 // The reloc section.
7298 Reloc_section* rel_;
7299 // The .got.plt section.
7300 Output_data_space* got_plt_;
7301 // The number of PLT entries.
7302 unsigned int count_;
7305 // Create the PLT section. The ordinary .got section is an argument,
7306 // since we need to refer to the start. We also create our own .got
7307 // section just for PLT entries.
7309 template<bool big_endian>
7310 Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout,
7312 Output_data_space* got_plt)
7313 : Output_section_data(addralign), got_plt_(got_plt), count_(0)
7315 this->rel_ = new Reloc_section(false);
7316 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
7317 elfcpp::SHF_ALLOC, this->rel_,
7318 ORDER_DYNAMIC_PLT_RELOCS, false);
7321 template<bool big_endian>
7323 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
7328 // Add an entry to the PLT.
7330 template<bool big_endian>
7332 Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym)
7334 gold_assert(!gsym->has_plt_offset());
7336 // Note that when setting the PLT offset we skip the initial
7337 // reserved PLT entry.
7338 gsym->set_plt_offset((this->count_) * this->get_plt_entry_size()
7339 + this->first_plt_entry_offset());
7343 section_offset_type got_offset = this->got_plt_->current_data_size();
7345 // Every PLT entry needs a GOT entry which points back to the PLT
7346 // entry (this will be changed by the dynamic linker, normally
7347 // lazily when the function is called).
7348 this->got_plt_->set_current_data_size(got_offset + 4);
7350 // Every PLT entry needs a reloc.
7351 gsym->set_needs_dynsym_entry();
7352 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
7355 // Note that we don't need to save the symbol. The contents of the
7356 // PLT are independent of which symbols are used. The symbols only
7357 // appear in the relocations.
7360 template<bool big_endian>
7361 class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian>
7364 Output_data_plt_arm_standard(Layout* layout, Output_data_space* got_plt)
7365 : Output_data_plt_arm<big_endian>(layout, 4, got_plt)
7369 // Return the offset of the first non-reserved PLT entry.
7370 virtual unsigned int
7371 do_first_plt_entry_offset() const
7372 { return sizeof(first_plt_entry); }
7374 // Return the size of a PLT entry.
7375 virtual unsigned int
7376 do_get_plt_entry_size() const
7377 { return sizeof(plt_entry); }
7380 do_fill_first_plt_entry(unsigned char* pov,
7381 Arm_address got_address,
7382 Arm_address plt_address);
7385 do_fill_plt_entry(unsigned char* pov,
7386 Arm_address got_address,
7387 Arm_address plt_address,
7388 unsigned int got_offset,
7389 unsigned int plt_offset);
7392 // Template for the first PLT entry.
7393 static const uint32_t first_plt_entry[5];
7395 // Template for subsequent PLT entries.
7396 static const uint32_t plt_entry[3];
7400 // FIXME: This is not very flexible. Right now this has only been tested
7401 // on armv5te. If we are to support additional architecture features like
7402 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7404 // The first entry in the PLT.
7405 template<bool big_endian>
7406 const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] =
7408 0xe52de004, // str lr, [sp, #-4]!
7409 0xe59fe004, // ldr lr, [pc, #4]
7410 0xe08fe00e, // add lr, pc, lr
7411 0xe5bef008, // ldr pc, [lr, #8]!
7412 0x00000000, // &GOT[0] - .
7415 template<bool big_endian>
7417 Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
7419 Arm_address got_address,
7420 Arm_address plt_address)
7422 // Write first PLT entry. All but the last word are constants.
7423 const size_t num_first_plt_words = (sizeof(first_plt_entry)
7424 / sizeof(plt_entry[0]));
7425 for (size_t i = 0; i < num_first_plt_words - 1; i++)
7426 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
7427 // Last word in first PLT entry is &GOT[0] - .
7428 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
7429 got_address - (plt_address + 16));
7432 // Subsequent entries in the PLT.
7434 template<bool big_endian>
7435 const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] =
7437 0xe28fc600, // add ip, pc, #0xNN00000
7438 0xe28cca00, // add ip, ip, #0xNN000
7439 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7442 template<bool big_endian>
7444 Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
7446 Arm_address got_address,
7447 Arm_address plt_address,
7448 unsigned int got_offset,
7449 unsigned int plt_offset)
7451 int32_t offset = ((got_address + got_offset)
7452 - (plt_address + plt_offset + 8));
7454 gold_assert(offset >= 0 && offset < 0x0fffffff);
7455 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
7456 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
7457 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
7458 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
7459 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
7460 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
7463 // Write out the PLT. This uses the hand-coded instructions above,
7464 // and adjusts them as needed. This is all specified by the arm ELF
7465 // Processor Supplement.
7467 template<bool big_endian>
7469 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
7471 const off_t offset = this->offset();
7472 const section_size_type oview_size =
7473 convert_to_section_size_type(this->data_size());
7474 unsigned char* const oview = of->get_output_view(offset, oview_size);
7476 const off_t got_file_offset = this->got_plt_->offset();
7477 const section_size_type got_size =
7478 convert_to_section_size_type(this->got_plt_->data_size());
7479 unsigned char* const got_view = of->get_output_view(got_file_offset,
7481 unsigned char* pov = oview;
7483 Arm_address plt_address = this->address();
7484 Arm_address got_address = this->got_plt_->address();
7486 // Write first PLT entry.
7487 this->fill_first_plt_entry(pov, got_address, plt_address);
7488 pov += this->first_plt_entry_offset();
7490 unsigned char* got_pov = got_view;
7492 memset(got_pov, 0, 12);
7495 unsigned int plt_offset = this->first_plt_entry_offset();
7496 unsigned int got_offset = 12;
7497 const unsigned int count = this->count_;
7498 for (unsigned int i = 0;
7501 pov += this->get_plt_entry_size(),
7503 plt_offset += this->get_plt_entry_size(),
7506 // Set and adjust the PLT entry itself.
7507 this->fill_plt_entry(pov, got_address, plt_address,
7508 got_offset, plt_offset);
7510 // Set the entry in the GOT.
7511 elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address);
7514 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
7515 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
7517 of->write_output_view(offset, oview_size, oview);
7518 of->write_output_view(got_file_offset, got_size, got_view);
7521 // Create a PLT entry for a global symbol.
7523 template<bool big_endian>
7525 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
7528 if (gsym->has_plt_offset())
7531 if (this->plt_ == NULL)
7533 // Create the GOT sections first.
7534 this->got_section(symtab, layout);
7536 this->plt_ = this->make_data_plt(layout, this->got_plt_);
7538 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
7540 | elfcpp::SHF_EXECINSTR),
7541 this->plt_, ORDER_PLT, false);
7543 this->plt_->add_entry(gsym);
7546 // Return the number of entries in the PLT.
7548 template<bool big_endian>
7550 Target_arm<big_endian>::plt_entry_count() const
7552 if (this->plt_ == NULL)
7554 return this->plt_->entry_count();
7557 // Return the offset of the first non-reserved PLT entry.
7559 template<bool big_endian>
7561 Target_arm<big_endian>::first_plt_entry_offset() const
7563 return this->plt_->first_plt_entry_offset();
7566 // Return the size of each PLT entry.
7568 template<bool big_endian>
7570 Target_arm<big_endian>::plt_entry_size() const
7572 return this->plt_->get_plt_entry_size();
7575 // Get the section to use for TLS_DESC relocations.
7577 template<bool big_endian>
7578 typename Target_arm<big_endian>::Reloc_section*
7579 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const
7581 return this->plt_section()->rel_tls_desc(layout);
7584 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7586 template<bool big_endian>
7588 Target_arm<big_endian>::define_tls_base_symbol(
7589 Symbol_table* symtab,
7592 if (this->tls_base_symbol_defined_)
7595 Output_segment* tls_segment = layout->tls_segment();
7596 if (tls_segment != NULL)
7598 bool is_exec = parameters->options().output_is_executable();
7599 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL,
7600 Symbol_table::PREDEFINED,
7604 elfcpp::STV_HIDDEN, 0,
7606 ? Symbol::SEGMENT_END
7607 : Symbol::SEGMENT_START),
7610 this->tls_base_symbol_defined_ = true;
7613 // Create a GOT entry for the TLS module index.
7615 template<bool big_endian>
7617 Target_arm<big_endian>::got_mod_index_entry(
7618 Symbol_table* symtab,
7620 Sized_relobj_file<32, big_endian>* object)
7622 if (this->got_mod_index_offset_ == -1U)
7624 gold_assert(symtab != NULL && layout != NULL && object != NULL);
7625 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout);
7626 unsigned int got_offset;
7627 if (!parameters->doing_static_link())
7629 got_offset = got->add_constant(0);
7630 Reloc_section* rel_dyn = this->rel_dyn_section(layout);
7631 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got,
7636 // We are doing a static link. Just mark it as belong to module 1,
7638 got_offset = got->add_constant(1);
7641 got->add_constant(0);
7642 this->got_mod_index_offset_ = got_offset;
7644 return this->got_mod_index_offset_;
7647 // Optimize the TLS relocation type based on what we know about the
7648 // symbol. IS_FINAL is true if the final address of this symbol is
7649 // known at link time.
7651 template<bool big_endian>
7652 tls::Tls_optimization
7653 Target_arm<big_endian>::optimize_tls_reloc(bool, int)
7655 // FIXME: Currently we do not do any TLS optimization.
7656 return tls::TLSOPT_NONE;
7659 // Get the Reference_flags for a particular relocation.
7661 template<bool big_endian>
7663 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type)
7667 case elfcpp::R_ARM_NONE:
7668 case elfcpp::R_ARM_V4BX:
7669 case elfcpp::R_ARM_GNU_VTENTRY:
7670 case elfcpp::R_ARM_GNU_VTINHERIT:
7671 // No symbol reference.
7674 case elfcpp::R_ARM_ABS32:
7675 case elfcpp::R_ARM_ABS16:
7676 case elfcpp::R_ARM_ABS12:
7677 case elfcpp::R_ARM_THM_ABS5:
7678 case elfcpp::R_ARM_ABS8:
7679 case elfcpp::R_ARM_BASE_ABS:
7680 case elfcpp::R_ARM_MOVW_ABS_NC:
7681 case elfcpp::R_ARM_MOVT_ABS:
7682 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7683 case elfcpp::R_ARM_THM_MOVT_ABS:
7684 case elfcpp::R_ARM_ABS32_NOI:
7685 return Symbol::ABSOLUTE_REF;
7687 case elfcpp::R_ARM_REL32:
7688 case elfcpp::R_ARM_LDR_PC_G0:
7689 case elfcpp::R_ARM_SBREL32:
7690 case elfcpp::R_ARM_THM_PC8:
7691 case elfcpp::R_ARM_BASE_PREL:
7692 case elfcpp::R_ARM_MOVW_PREL_NC:
7693 case elfcpp::R_ARM_MOVT_PREL:
7694 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7695 case elfcpp::R_ARM_THM_MOVT_PREL:
7696 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7697 case elfcpp::R_ARM_THM_PC12:
7698 case elfcpp::R_ARM_REL32_NOI:
7699 case elfcpp::R_ARM_ALU_PC_G0_NC:
7700 case elfcpp::R_ARM_ALU_PC_G0:
7701 case elfcpp::R_ARM_ALU_PC_G1_NC:
7702 case elfcpp::R_ARM_ALU_PC_G1:
7703 case elfcpp::R_ARM_ALU_PC_G2:
7704 case elfcpp::R_ARM_LDR_PC_G1:
7705 case elfcpp::R_ARM_LDR_PC_G2:
7706 case elfcpp::R_ARM_LDRS_PC_G0:
7707 case elfcpp::R_ARM_LDRS_PC_G1:
7708 case elfcpp::R_ARM_LDRS_PC_G2:
7709 case elfcpp::R_ARM_LDC_PC_G0:
7710 case elfcpp::R_ARM_LDC_PC_G1:
7711 case elfcpp::R_ARM_LDC_PC_G2:
7712 case elfcpp::R_ARM_ALU_SB_G0_NC:
7713 case elfcpp::R_ARM_ALU_SB_G0:
7714 case elfcpp::R_ARM_ALU_SB_G1_NC:
7715 case elfcpp::R_ARM_ALU_SB_G1:
7716 case elfcpp::R_ARM_ALU_SB_G2:
7717 case elfcpp::R_ARM_LDR_SB_G0:
7718 case elfcpp::R_ARM_LDR_SB_G1:
7719 case elfcpp::R_ARM_LDR_SB_G2:
7720 case elfcpp::R_ARM_LDRS_SB_G0:
7721 case elfcpp::R_ARM_LDRS_SB_G1:
7722 case elfcpp::R_ARM_LDRS_SB_G2:
7723 case elfcpp::R_ARM_LDC_SB_G0:
7724 case elfcpp::R_ARM_LDC_SB_G1:
7725 case elfcpp::R_ARM_LDC_SB_G2:
7726 case elfcpp::R_ARM_MOVW_BREL_NC:
7727 case elfcpp::R_ARM_MOVT_BREL:
7728 case elfcpp::R_ARM_MOVW_BREL:
7729 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7730 case elfcpp::R_ARM_THM_MOVT_BREL:
7731 case elfcpp::R_ARM_THM_MOVW_BREL:
7732 case elfcpp::R_ARM_GOTOFF32:
7733 case elfcpp::R_ARM_GOTOFF12:
7734 case elfcpp::R_ARM_SBREL31:
7735 return Symbol::RELATIVE_REF;
7737 case elfcpp::R_ARM_PLT32:
7738 case elfcpp::R_ARM_CALL:
7739 case elfcpp::R_ARM_JUMP24:
7740 case elfcpp::R_ARM_THM_CALL:
7741 case elfcpp::R_ARM_THM_JUMP24:
7742 case elfcpp::R_ARM_THM_JUMP19:
7743 case elfcpp::R_ARM_THM_JUMP6:
7744 case elfcpp::R_ARM_THM_JUMP11:
7745 case elfcpp::R_ARM_THM_JUMP8:
7746 // R_ARM_PREL31 is not used to relocate call/jump instructions but
7747 // in unwind tables. It may point to functions via PLTs.
7748 // So we treat it like call/jump relocations above.
7749 case elfcpp::R_ARM_PREL31:
7750 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
7752 case elfcpp::R_ARM_GOT_BREL:
7753 case elfcpp::R_ARM_GOT_ABS:
7754 case elfcpp::R_ARM_GOT_PREL:
7756 return Symbol::ABSOLUTE_REF;
7758 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
7759 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
7760 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
7761 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
7762 case elfcpp::R_ARM_TLS_LE32: // Local-exec
7763 return Symbol::TLS_REF;
7765 case elfcpp::R_ARM_TARGET1:
7766 case elfcpp::R_ARM_TARGET2:
7767 case elfcpp::R_ARM_COPY:
7768 case elfcpp::R_ARM_GLOB_DAT:
7769 case elfcpp::R_ARM_JUMP_SLOT:
7770 case elfcpp::R_ARM_RELATIVE:
7771 case elfcpp::R_ARM_PC24:
7772 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
7773 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
7774 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
7776 // Not expected. We will give an error later.
7781 // Report an unsupported relocation against a local symbol.
7783 template<bool big_endian>
7785 Target_arm<big_endian>::Scan::unsupported_reloc_local(
7786 Sized_relobj_file<32, big_endian>* object,
7787 unsigned int r_type)
7789 gold_error(_("%s: unsupported reloc %u against local symbol"),
7790 object->name().c_str(), r_type);
7793 // We are about to emit a dynamic relocation of type R_TYPE. If the
7794 // dynamic linker does not support it, issue an error. The GNU linker
7795 // only issues a non-PIC error for an allocated read-only section.
7796 // Here we know the section is allocated, but we don't know that it is
7797 // read-only. But we check for all the relocation types which the
7798 // glibc dynamic linker supports, so it seems appropriate to issue an
7799 // error even if the section is not read-only.
7801 template<bool big_endian>
7803 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
7804 unsigned int r_type)
7808 // These are the relocation types supported by glibc for ARM.
7809 case elfcpp::R_ARM_RELATIVE:
7810 case elfcpp::R_ARM_COPY:
7811 case elfcpp::R_ARM_GLOB_DAT:
7812 case elfcpp::R_ARM_JUMP_SLOT:
7813 case elfcpp::R_ARM_ABS32:
7814 case elfcpp::R_ARM_ABS32_NOI:
7815 case elfcpp::R_ARM_PC24:
7816 // FIXME: The following 3 types are not supported by Android's dynamic
7818 case elfcpp::R_ARM_TLS_DTPMOD32:
7819 case elfcpp::R_ARM_TLS_DTPOFF32:
7820 case elfcpp::R_ARM_TLS_TPOFF32:
7825 // This prevents us from issuing more than one error per reloc
7826 // section. But we can still wind up issuing more than one
7827 // error per object file.
7828 if (this->issued_non_pic_error_)
7830 const Arm_reloc_property* reloc_property =
7831 arm_reloc_property_table->get_reloc_property(r_type);
7832 gold_assert(reloc_property != NULL);
7833 object->error(_("requires unsupported dynamic reloc %s; "
7834 "recompile with -fPIC"),
7835 reloc_property->name().c_str());
7836 this->issued_non_pic_error_ = true;
7840 case elfcpp::R_ARM_NONE:
7845 // Scan a relocation for a local symbol.
7846 // FIXME: This only handles a subset of relocation types used by Android
7847 // on ARM v5te devices.
7849 template<bool big_endian>
7851 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
7854 Sized_relobj_file<32, big_endian>* object,
7855 unsigned int data_shndx,
7856 Output_section* output_section,
7857 const elfcpp::Rel<32, big_endian>& reloc,
7858 unsigned int r_type,
7859 const elfcpp::Sym<32, big_endian>& lsym,
7865 r_type = get_real_reloc_type(r_type);
7868 case elfcpp::R_ARM_NONE:
7869 case elfcpp::R_ARM_V4BX:
7870 case elfcpp::R_ARM_GNU_VTENTRY:
7871 case elfcpp::R_ARM_GNU_VTINHERIT:
7874 case elfcpp::R_ARM_ABS32:
7875 case elfcpp::R_ARM_ABS32_NOI:
7876 // If building a shared library (or a position-independent
7877 // executable), we need to create a dynamic relocation for
7878 // this location. The relocation applied at link time will
7879 // apply the link-time value, so we flag the location with
7880 // an R_ARM_RELATIVE relocation so the dynamic loader can
7881 // relocate it easily.
7882 if (parameters->options().output_is_position_independent())
7884 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7885 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7886 // If we are to add more other reloc types than R_ARM_ABS32,
7887 // we need to add check_non_pic(object, r_type) here.
7888 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
7889 output_section, data_shndx,
7890 reloc.get_r_offset());
7894 case elfcpp::R_ARM_ABS16:
7895 case elfcpp::R_ARM_ABS12:
7896 case elfcpp::R_ARM_THM_ABS5:
7897 case elfcpp::R_ARM_ABS8:
7898 case elfcpp::R_ARM_BASE_ABS:
7899 case elfcpp::R_ARM_MOVW_ABS_NC:
7900 case elfcpp::R_ARM_MOVT_ABS:
7901 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7902 case elfcpp::R_ARM_THM_MOVT_ABS:
7903 // If building a shared library (or a position-independent
7904 // executable), we need to create a dynamic relocation for
7905 // this location. Because the addend needs to remain in the
7906 // data section, we need to be careful not to apply this
7907 // relocation statically.
7908 if (parameters->options().output_is_position_independent())
7910 check_non_pic(object, r_type);
7911 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7912 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7913 if (lsym.get_st_type() != elfcpp::STT_SECTION)
7914 rel_dyn->add_local(object, r_sym, r_type, output_section,
7915 data_shndx, reloc.get_r_offset());
7918 gold_assert(lsym.get_st_value() == 0);
7919 unsigned int shndx = lsym.get_st_shndx();
7921 shndx = object->adjust_sym_shndx(r_sym, shndx,
7924 object->error(_("section symbol %u has bad shndx %u"),
7927 rel_dyn->add_local_section(object, shndx,
7928 r_type, output_section,
7929 data_shndx, reloc.get_r_offset());
7934 case elfcpp::R_ARM_REL32:
7935 case elfcpp::R_ARM_LDR_PC_G0:
7936 case elfcpp::R_ARM_SBREL32:
7937 case elfcpp::R_ARM_THM_CALL:
7938 case elfcpp::R_ARM_THM_PC8:
7939 case elfcpp::R_ARM_BASE_PREL:
7940 case elfcpp::R_ARM_PLT32:
7941 case elfcpp::R_ARM_CALL:
7942 case elfcpp::R_ARM_JUMP24:
7943 case elfcpp::R_ARM_THM_JUMP24:
7944 case elfcpp::R_ARM_SBREL31:
7945 case elfcpp::R_ARM_PREL31:
7946 case elfcpp::R_ARM_MOVW_PREL_NC:
7947 case elfcpp::R_ARM_MOVT_PREL:
7948 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7949 case elfcpp::R_ARM_THM_MOVT_PREL:
7950 case elfcpp::R_ARM_THM_JUMP19:
7951 case elfcpp::R_ARM_THM_JUMP6:
7952 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7953 case elfcpp::R_ARM_THM_PC12:
7954 case elfcpp::R_ARM_REL32_NOI:
7955 case elfcpp::R_ARM_ALU_PC_G0_NC:
7956 case elfcpp::R_ARM_ALU_PC_G0:
7957 case elfcpp::R_ARM_ALU_PC_G1_NC:
7958 case elfcpp::R_ARM_ALU_PC_G1:
7959 case elfcpp::R_ARM_ALU_PC_G2:
7960 case elfcpp::R_ARM_LDR_PC_G1:
7961 case elfcpp::R_ARM_LDR_PC_G2:
7962 case elfcpp::R_ARM_LDRS_PC_G0:
7963 case elfcpp::R_ARM_LDRS_PC_G1:
7964 case elfcpp::R_ARM_LDRS_PC_G2:
7965 case elfcpp::R_ARM_LDC_PC_G0:
7966 case elfcpp::R_ARM_LDC_PC_G1:
7967 case elfcpp::R_ARM_LDC_PC_G2:
7968 case elfcpp::R_ARM_ALU_SB_G0_NC:
7969 case elfcpp::R_ARM_ALU_SB_G0:
7970 case elfcpp::R_ARM_ALU_SB_G1_NC:
7971 case elfcpp::R_ARM_ALU_SB_G1:
7972 case elfcpp::R_ARM_ALU_SB_G2:
7973 case elfcpp::R_ARM_LDR_SB_G0:
7974 case elfcpp::R_ARM_LDR_SB_G1:
7975 case elfcpp::R_ARM_LDR_SB_G2:
7976 case elfcpp::R_ARM_LDRS_SB_G0:
7977 case elfcpp::R_ARM_LDRS_SB_G1:
7978 case elfcpp::R_ARM_LDRS_SB_G2:
7979 case elfcpp::R_ARM_LDC_SB_G0:
7980 case elfcpp::R_ARM_LDC_SB_G1:
7981 case elfcpp::R_ARM_LDC_SB_G2:
7982 case elfcpp::R_ARM_MOVW_BREL_NC:
7983 case elfcpp::R_ARM_MOVT_BREL:
7984 case elfcpp::R_ARM_MOVW_BREL:
7985 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7986 case elfcpp::R_ARM_THM_MOVT_BREL:
7987 case elfcpp::R_ARM_THM_MOVW_BREL:
7988 case elfcpp::R_ARM_THM_JUMP11:
7989 case elfcpp::R_ARM_THM_JUMP8:
7990 // We don't need to do anything for a relative addressing relocation
7991 // against a local symbol if it does not reference the GOT.
7994 case elfcpp::R_ARM_GOTOFF32:
7995 case elfcpp::R_ARM_GOTOFF12:
7996 // We need a GOT section:
7997 target->got_section(symtab, layout);
8000 case elfcpp::R_ARM_GOT_BREL:
8001 case elfcpp::R_ARM_GOT_PREL:
8003 // The symbol requires a GOT entry.
8004 Arm_output_data_got<big_endian>* got =
8005 target->got_section(symtab, layout);
8006 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8007 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
8009 // If we are generating a shared object, we need to add a
8010 // dynamic RELATIVE relocation for this symbol's GOT entry.
8011 if (parameters->options().output_is_position_independent())
8013 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8014 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8015 rel_dyn->add_local_relative(
8016 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
8017 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
8023 case elfcpp::R_ARM_TARGET1:
8024 case elfcpp::R_ARM_TARGET2:
8025 // This should have been mapped to another type already.
8027 case elfcpp::R_ARM_COPY:
8028 case elfcpp::R_ARM_GLOB_DAT:
8029 case elfcpp::R_ARM_JUMP_SLOT:
8030 case elfcpp::R_ARM_RELATIVE:
8031 // These are relocations which should only be seen by the
8032 // dynamic linker, and should never be seen here.
8033 gold_error(_("%s: unexpected reloc %u in object file"),
8034 object->name().c_str(), r_type);
8038 // These are initial TLS relocs, which are expected when
8040 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8041 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8042 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8043 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8044 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8046 bool output_is_shared = parameters->options().shared();
8047 const tls::Tls_optimization optimized_type
8048 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared,
8052 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8053 if (optimized_type == tls::TLSOPT_NONE)
8055 // Create a pair of GOT entries for the module index and
8056 // dtv-relative offset.
8057 Arm_output_data_got<big_endian>* got
8058 = target->got_section(symtab, layout);
8059 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8060 unsigned int shndx = lsym.get_st_shndx();
8062 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
8065 object->error(_("local symbol %u has bad shndx %u"),
8070 if (!parameters->doing_static_link())
8071 got->add_local_pair_with_rel(object, r_sym, shndx,
8073 target->rel_dyn_section(layout),
8074 elfcpp::R_ARM_TLS_DTPMOD32);
8076 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR,
8080 // FIXME: TLS optimization not supported yet.
8084 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8085 if (optimized_type == tls::TLSOPT_NONE)
8087 // Create a GOT entry for the module index.
8088 target->got_mod_index_entry(symtab, layout, object);
8091 // FIXME: TLS optimization not supported yet.
8095 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8098 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8099 layout->set_has_static_tls();
8100 if (optimized_type == tls::TLSOPT_NONE)
8102 // Create a GOT entry for the tp-relative offset.
8103 Arm_output_data_got<big_endian>* got
8104 = target->got_section(symtab, layout);
8105 unsigned int r_sym =
8106 elfcpp::elf_r_sym<32>(reloc.get_r_info());
8107 if (!parameters->doing_static_link())
8108 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET,
8109 target->rel_dyn_section(layout),
8110 elfcpp::R_ARM_TLS_TPOFF32);
8111 else if (!object->local_has_got_offset(r_sym,
8112 GOT_TYPE_TLS_OFFSET))
8114 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET);
8115 unsigned int got_offset =
8116 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET);
8117 got->add_static_reloc(got_offset,
8118 elfcpp::R_ARM_TLS_TPOFF32, object,
8123 // FIXME: TLS optimization not supported yet.
8127 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8128 layout->set_has_static_tls();
8129 if (output_is_shared)
8131 // We need to create a dynamic relocation.
8132 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION);
8133 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8134 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8135 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32,
8136 output_section, data_shndx,
8137 reloc.get_r_offset());
8147 case elfcpp::R_ARM_PC24:
8148 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8149 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8150 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8152 unsupported_reloc_local(object, r_type);
8157 // Report an unsupported relocation against a global symbol.
8159 template<bool big_endian>
8161 Target_arm<big_endian>::Scan::unsupported_reloc_global(
8162 Sized_relobj_file<32, big_endian>* object,
8163 unsigned int r_type,
8166 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8167 object->name().c_str(), r_type, gsym->demangled_name().c_str());
8170 template<bool big_endian>
8172 Target_arm<big_endian>::Scan::possible_function_pointer_reloc(
8173 unsigned int r_type)
8177 case elfcpp::R_ARM_PC24:
8178 case elfcpp::R_ARM_THM_CALL:
8179 case elfcpp::R_ARM_PLT32:
8180 case elfcpp::R_ARM_CALL:
8181 case elfcpp::R_ARM_JUMP24:
8182 case elfcpp::R_ARM_THM_JUMP24:
8183 case elfcpp::R_ARM_SBREL31:
8184 case elfcpp::R_ARM_PREL31:
8185 case elfcpp::R_ARM_THM_JUMP19:
8186 case elfcpp::R_ARM_THM_JUMP6:
8187 case elfcpp::R_ARM_THM_JUMP11:
8188 case elfcpp::R_ARM_THM_JUMP8:
8189 // All the relocations above are branches except SBREL31 and PREL31.
8193 // Be conservative and assume this is a function pointer.
8198 template<bool big_endian>
8200 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer(
8203 Target_arm<big_endian>* target,
8204 Sized_relobj_file<32, big_endian>*,
8207 const elfcpp::Rel<32, big_endian>&,
8208 unsigned int r_type,
8209 const elfcpp::Sym<32, big_endian>&)
8211 r_type = target->get_real_reloc_type(r_type);
8212 return possible_function_pointer_reloc(r_type);
8215 template<bool big_endian>
8217 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer(
8220 Target_arm<big_endian>* target,
8221 Sized_relobj_file<32, big_endian>*,
8224 const elfcpp::Rel<32, big_endian>&,
8225 unsigned int r_type,
8228 // GOT is not a function.
8229 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8232 r_type = target->get_real_reloc_type(r_type);
8233 return possible_function_pointer_reloc(r_type);
8236 // Scan a relocation for a global symbol.
8238 template<bool big_endian>
8240 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
8243 Sized_relobj_file<32, big_endian>* object,
8244 unsigned int data_shndx,
8245 Output_section* output_section,
8246 const elfcpp::Rel<32, big_endian>& reloc,
8247 unsigned int r_type,
8250 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8251 // section. We check here to avoid creating a dynamic reloc against
8252 // _GLOBAL_OFFSET_TABLE_.
8253 if (!target->has_got_section()
8254 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8255 target->got_section(symtab, layout);
8257 r_type = get_real_reloc_type(r_type);
8260 case elfcpp::R_ARM_NONE:
8261 case elfcpp::R_ARM_V4BX:
8262 case elfcpp::R_ARM_GNU_VTENTRY:
8263 case elfcpp::R_ARM_GNU_VTINHERIT:
8266 case elfcpp::R_ARM_ABS32:
8267 case elfcpp::R_ARM_ABS16:
8268 case elfcpp::R_ARM_ABS12:
8269 case elfcpp::R_ARM_THM_ABS5:
8270 case elfcpp::R_ARM_ABS8:
8271 case elfcpp::R_ARM_BASE_ABS:
8272 case elfcpp::R_ARM_MOVW_ABS_NC:
8273 case elfcpp::R_ARM_MOVT_ABS:
8274 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8275 case elfcpp::R_ARM_THM_MOVT_ABS:
8276 case elfcpp::R_ARM_ABS32_NOI:
8277 // Absolute addressing relocations.
8279 // Make a PLT entry if necessary.
8280 if (this->symbol_needs_plt_entry(gsym))
8282 target->make_plt_entry(symtab, layout, gsym);
8283 // Since this is not a PC-relative relocation, we may be
8284 // taking the address of a function. In that case we need to
8285 // set the entry in the dynamic symbol table to the address of
8287 if (gsym->is_from_dynobj() && !parameters->options().shared())
8288 gsym->set_needs_dynsym_value();
8290 // Make a dynamic relocation if necessary.
8291 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8293 if (gsym->may_need_copy_reloc())
8295 target->copy_reloc(symtab, layout, object,
8296 data_shndx, output_section, gsym, reloc);
8298 else if ((r_type == elfcpp::R_ARM_ABS32
8299 || r_type == elfcpp::R_ARM_ABS32_NOI)
8300 && gsym->can_use_relative_reloc(false))
8302 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8303 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
8304 output_section, object,
8305 data_shndx, reloc.get_r_offset());
8309 check_non_pic(object, r_type);
8310 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8311 rel_dyn->add_global(gsym, r_type, output_section, object,
8312 data_shndx, reloc.get_r_offset());
8318 case elfcpp::R_ARM_GOTOFF32:
8319 case elfcpp::R_ARM_GOTOFF12:
8320 // We need a GOT section.
8321 target->got_section(symtab, layout);
8324 case elfcpp::R_ARM_REL32:
8325 case elfcpp::R_ARM_LDR_PC_G0:
8326 case elfcpp::R_ARM_SBREL32:
8327 case elfcpp::R_ARM_THM_PC8:
8328 case elfcpp::R_ARM_BASE_PREL:
8329 case elfcpp::R_ARM_MOVW_PREL_NC:
8330 case elfcpp::R_ARM_MOVT_PREL:
8331 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8332 case elfcpp::R_ARM_THM_MOVT_PREL:
8333 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8334 case elfcpp::R_ARM_THM_PC12:
8335 case elfcpp::R_ARM_REL32_NOI:
8336 case elfcpp::R_ARM_ALU_PC_G0_NC:
8337 case elfcpp::R_ARM_ALU_PC_G0:
8338 case elfcpp::R_ARM_ALU_PC_G1_NC:
8339 case elfcpp::R_ARM_ALU_PC_G1:
8340 case elfcpp::R_ARM_ALU_PC_G2:
8341 case elfcpp::R_ARM_LDR_PC_G1:
8342 case elfcpp::R_ARM_LDR_PC_G2:
8343 case elfcpp::R_ARM_LDRS_PC_G0:
8344 case elfcpp::R_ARM_LDRS_PC_G1:
8345 case elfcpp::R_ARM_LDRS_PC_G2:
8346 case elfcpp::R_ARM_LDC_PC_G0:
8347 case elfcpp::R_ARM_LDC_PC_G1:
8348 case elfcpp::R_ARM_LDC_PC_G2:
8349 case elfcpp::R_ARM_ALU_SB_G0_NC:
8350 case elfcpp::R_ARM_ALU_SB_G0:
8351 case elfcpp::R_ARM_ALU_SB_G1_NC:
8352 case elfcpp::R_ARM_ALU_SB_G1:
8353 case elfcpp::R_ARM_ALU_SB_G2:
8354 case elfcpp::R_ARM_LDR_SB_G0:
8355 case elfcpp::R_ARM_LDR_SB_G1:
8356 case elfcpp::R_ARM_LDR_SB_G2:
8357 case elfcpp::R_ARM_LDRS_SB_G0:
8358 case elfcpp::R_ARM_LDRS_SB_G1:
8359 case elfcpp::R_ARM_LDRS_SB_G2:
8360 case elfcpp::R_ARM_LDC_SB_G0:
8361 case elfcpp::R_ARM_LDC_SB_G1:
8362 case elfcpp::R_ARM_LDC_SB_G2:
8363 case elfcpp::R_ARM_MOVW_BREL_NC:
8364 case elfcpp::R_ARM_MOVT_BREL:
8365 case elfcpp::R_ARM_MOVW_BREL:
8366 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8367 case elfcpp::R_ARM_THM_MOVT_BREL:
8368 case elfcpp::R_ARM_THM_MOVW_BREL:
8369 // Relative addressing relocations.
8371 // Make a dynamic relocation if necessary.
8372 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8374 if (target->may_need_copy_reloc(gsym))
8376 target->copy_reloc(symtab, layout, object,
8377 data_shndx, output_section, gsym, reloc);
8381 check_non_pic(object, r_type);
8382 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8383 rel_dyn->add_global(gsym, r_type, output_section, object,
8384 data_shndx, reloc.get_r_offset());
8390 case elfcpp::R_ARM_THM_CALL:
8391 case elfcpp::R_ARM_PLT32:
8392 case elfcpp::R_ARM_CALL:
8393 case elfcpp::R_ARM_JUMP24:
8394 case elfcpp::R_ARM_THM_JUMP24:
8395 case elfcpp::R_ARM_SBREL31:
8396 case elfcpp::R_ARM_PREL31:
8397 case elfcpp::R_ARM_THM_JUMP19:
8398 case elfcpp::R_ARM_THM_JUMP6:
8399 case elfcpp::R_ARM_THM_JUMP11:
8400 case elfcpp::R_ARM_THM_JUMP8:
8401 // All the relocation above are branches except for the PREL31 ones.
8402 // A PREL31 relocation can point to a personality function in a shared
8403 // library. In that case we want to use a PLT because we want to
8404 // call the personality routine and the dynamic linkers we care about
8405 // do not support dynamic PREL31 relocations. An REL31 relocation may
8406 // point to a function whose unwinding behaviour is being described but
8407 // we will not mistakenly generate a PLT for that because we should use
8408 // a local section symbol.
8410 // If the symbol is fully resolved, this is just a relative
8411 // local reloc. Otherwise we need a PLT entry.
8412 if (gsym->final_value_is_known())
8414 // If building a shared library, we can also skip the PLT entry
8415 // if the symbol is defined in the output file and is protected
8417 if (gsym->is_defined()
8418 && !gsym->is_from_dynobj()
8419 && !gsym->is_preemptible())
8421 target->make_plt_entry(symtab, layout, gsym);
8424 case elfcpp::R_ARM_GOT_BREL:
8425 case elfcpp::R_ARM_GOT_ABS:
8426 case elfcpp::R_ARM_GOT_PREL:
8428 // The symbol requires a GOT entry.
8429 Arm_output_data_got<big_endian>* got =
8430 target->got_section(symtab, layout);
8431 if (gsym->final_value_is_known())
8432 got->add_global(gsym, GOT_TYPE_STANDARD);
8435 // If this symbol is not fully resolved, we need to add a
8436 // GOT entry with a dynamic relocation.
8437 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8438 if (gsym->is_from_dynobj()
8439 || gsym->is_undefined()
8440 || gsym->is_preemptible()
8441 || (gsym->visibility() == elfcpp::STV_PROTECTED
8442 && parameters->options().shared()))
8443 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
8444 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
8447 if (got->add_global(gsym, GOT_TYPE_STANDARD))
8448 rel_dyn->add_global_relative(
8449 gsym, elfcpp::R_ARM_RELATIVE, got,
8450 gsym->got_offset(GOT_TYPE_STANDARD));
8456 case elfcpp::R_ARM_TARGET1:
8457 case elfcpp::R_ARM_TARGET2:
8458 // These should have been mapped to other types already.
8460 case elfcpp::R_ARM_COPY:
8461 case elfcpp::R_ARM_GLOB_DAT:
8462 case elfcpp::R_ARM_JUMP_SLOT:
8463 case elfcpp::R_ARM_RELATIVE:
8464 // These are relocations which should only be seen by the
8465 // dynamic linker, and should never be seen here.
8466 gold_error(_("%s: unexpected reloc %u in object file"),
8467 object->name().c_str(), r_type);
8470 // These are initial tls relocs, which are expected when
8472 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8473 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8474 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8475 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8476 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8478 const bool is_final = gsym->final_value_is_known();
8479 const tls::Tls_optimization optimized_type
8480 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
8483 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8484 if (optimized_type == tls::TLSOPT_NONE)
8486 // Create a pair of GOT entries for the module index and
8487 // dtv-relative offset.
8488 Arm_output_data_got<big_endian>* got
8489 = target->got_section(symtab, layout);
8490 if (!parameters->doing_static_link())
8491 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR,
8492 target->rel_dyn_section(layout),
8493 elfcpp::R_ARM_TLS_DTPMOD32,
8494 elfcpp::R_ARM_TLS_DTPOFF32);
8496 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym);
8499 // FIXME: TLS optimization not supported yet.
8503 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8504 if (optimized_type == tls::TLSOPT_NONE)
8506 // Create a GOT entry for the module index.
8507 target->got_mod_index_entry(symtab, layout, object);
8510 // FIXME: TLS optimization not supported yet.
8514 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8517 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8518 layout->set_has_static_tls();
8519 if (optimized_type == tls::TLSOPT_NONE)
8521 // Create a GOT entry for the tp-relative offset.
8522 Arm_output_data_got<big_endian>* got
8523 = target->got_section(symtab, layout);
8524 if (!parameters->doing_static_link())
8525 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET,
8526 target->rel_dyn_section(layout),
8527 elfcpp::R_ARM_TLS_TPOFF32);
8528 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET))
8530 got->add_global(gsym, GOT_TYPE_TLS_OFFSET);
8531 unsigned int got_offset =
8532 gsym->got_offset(GOT_TYPE_TLS_OFFSET);
8533 got->add_static_reloc(got_offset,
8534 elfcpp::R_ARM_TLS_TPOFF32, gsym);
8538 // FIXME: TLS optimization not supported yet.
8542 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8543 layout->set_has_static_tls();
8544 if (parameters->options().shared())
8546 // We need to create a dynamic relocation.
8547 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8548 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32,
8549 output_section, object,
8550 data_shndx, reloc.get_r_offset());
8560 case elfcpp::R_ARM_PC24:
8561 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8562 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8563 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8565 unsupported_reloc_global(object, r_type, gsym);
8570 // Process relocations for gc.
8572 template<bool big_endian>
8574 Target_arm<big_endian>::gc_process_relocs(
8575 Symbol_table* symtab,
8577 Sized_relobj_file<32, big_endian>* object,
8578 unsigned int data_shndx,
8580 const unsigned char* prelocs,
8582 Output_section* output_section,
8583 bool needs_special_offset_handling,
8584 size_t local_symbol_count,
8585 const unsigned char* plocal_symbols)
8587 typedef Target_arm<big_endian> Arm;
8588 typedef typename Target_arm<big_endian>::Scan Scan;
8590 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan,
8591 typename Target_arm::Relocatable_size_for_reloc>(
8600 needs_special_offset_handling,
8605 // Scan relocations for a section.
8607 template<bool big_endian>
8609 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
8611 Sized_relobj_file<32, big_endian>* object,
8612 unsigned int data_shndx,
8613 unsigned int sh_type,
8614 const unsigned char* prelocs,
8616 Output_section* output_section,
8617 bool needs_special_offset_handling,
8618 size_t local_symbol_count,
8619 const unsigned char* plocal_symbols)
8621 typedef typename Target_arm<big_endian>::Scan Scan;
8622 if (sh_type == elfcpp::SHT_RELA)
8624 gold_error(_("%s: unsupported RELA reloc section"),
8625 object->name().c_str());
8629 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
8638 needs_special_offset_handling,
8643 // Finalize the sections.
8645 template<bool big_endian>
8647 Target_arm<big_endian>::do_finalize_sections(
8649 const Input_objects* input_objects,
8652 bool merged_any_attributes = false;
8653 // Merge processor-specific flags.
8654 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
8655 p != input_objects->relobj_end();
8658 Arm_relobj<big_endian>* arm_relobj =
8659 Arm_relobj<big_endian>::as_arm_relobj(*p);
8660 if (arm_relobj->merge_flags_and_attributes())
8662 this->merge_processor_specific_flags(
8664 arm_relobj->processor_specific_flags());
8665 this->merge_object_attributes(arm_relobj->name().c_str(),
8666 arm_relobj->attributes_section_data());
8667 merged_any_attributes = true;
8671 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
8672 p != input_objects->dynobj_end();
8675 Arm_dynobj<big_endian>* arm_dynobj =
8676 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
8677 this->merge_processor_specific_flags(
8679 arm_dynobj->processor_specific_flags());
8680 this->merge_object_attributes(arm_dynobj->name().c_str(),
8681 arm_dynobj->attributes_section_data());
8682 merged_any_attributes = true;
8685 // Create an empty uninitialized attribute section if we still don't have it
8686 // at this moment. This happens if there is no attributes sections in all
8688 if (this->attributes_section_data_ == NULL)
8689 this->attributes_section_data_ = new Attributes_section_data(NULL, 0);
8691 const Object_attribute* cpu_arch_attr =
8692 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
8693 // Check if we need to use Cortex-A8 workaround.
8694 if (parameters->options().user_set_fix_cortex_a8())
8695 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
8698 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8699 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8701 const Object_attribute* cpu_arch_profile_attr =
8702 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
8703 this->fix_cortex_a8_ =
8704 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
8705 && (cpu_arch_profile_attr->int_value() == 'A'
8706 || cpu_arch_profile_attr->int_value() == 0));
8709 // Check if we can use V4BX interworking.
8710 // The V4BX interworking stub contains BX instruction,
8711 // which is not specified for some profiles.
8712 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8713 && !this->may_use_v4t_interworking())
8714 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8715 "the target profile does not support BX instruction"));
8717 // Fill in some more dynamic tags.
8718 const Reloc_section* rel_plt = (this->plt_ == NULL
8720 : this->plt_->rel_plt());
8721 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
8722 this->rel_dyn_, true, false);
8724 // Emit any relocs we saved in an attempt to avoid generating COPY
8726 if (this->copy_relocs_.any_saved_relocs())
8727 this->copy_relocs_.emit(this->rel_dyn_section(layout));
8729 // Handle the .ARM.exidx section.
8730 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
8732 if (!parameters->options().relocatable())
8734 if (exidx_section != NULL
8735 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX)
8737 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8738 // the .ARM.exidx section.
8739 if (!layout->script_options()->saw_phdrs_clause())
8741 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0,
8744 Output_segment* exidx_segment =
8745 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
8746 exidx_segment->add_output_section_to_nonload(exidx_section,
8752 // Create an .ARM.attributes section if we have merged any attributes
8754 if (merged_any_attributes)
8756 Output_attributes_section_data* attributes_section =
8757 new Output_attributes_section_data(*this->attributes_section_data_);
8758 layout->add_output_section_data(".ARM.attributes",
8759 elfcpp::SHT_ARM_ATTRIBUTES, 0,
8760 attributes_section, ORDER_INVALID,
8764 // Fix up links in section EXIDX headers.
8765 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
8766 p != layout->section_list().end();
8768 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
8770 Arm_output_section<big_endian>* os =
8771 Arm_output_section<big_endian>::as_arm_output_section(*p);
8772 os->set_exidx_section_link();
8776 // Return whether a direct absolute static relocation needs to be applied.
8777 // In cases where Scan::local() or Scan::global() has created
8778 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8779 // of the relocation is carried in the data, and we must not
8780 // apply the static relocation.
8782 template<bool big_endian>
8784 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
8785 const Sized_symbol<32>* gsym,
8786 unsigned int r_type,
8788 Output_section* output_section)
8790 // If the output section is not allocated, then we didn't call
8791 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8793 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
8796 int ref_flags = Scan::get_reference_flags(r_type);
8798 // For local symbols, we will have created a non-RELATIVE dynamic
8799 // relocation only if (a) the output is position independent,
8800 // (b) the relocation is absolute (not pc- or segment-relative), and
8801 // (c) the relocation is not 32 bits wide.
8803 return !(parameters->options().output_is_position_independent()
8804 && (ref_flags & Symbol::ABSOLUTE_REF)
8807 // For global symbols, we use the same helper routines used in the
8808 // scan pass. If we did not create a dynamic relocation, or if we
8809 // created a RELATIVE dynamic relocation, we should apply the static
8811 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
8812 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
8813 && gsym->can_use_relative_reloc(ref_flags
8814 & Symbol::FUNCTION_CALL);
8815 return !has_dyn || is_rel;
8818 // Perform a relocation.
8820 template<bool big_endian>
8822 Target_arm<big_endian>::Relocate::relocate(
8823 const Relocate_info<32, big_endian>* relinfo,
8825 Output_section* output_section,
8827 const elfcpp::Rel<32, big_endian>& rel,
8828 unsigned int r_type,
8829 const Sized_symbol<32>* gsym,
8830 const Symbol_value<32>* psymval,
8831 unsigned char* view,
8832 Arm_address address,
8833 section_size_type view_size)
8835 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
8837 r_type = get_real_reloc_type(r_type);
8838 const Arm_reloc_property* reloc_property =
8839 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
8840 if (reloc_property == NULL)
8842 std::string reloc_name =
8843 arm_reloc_property_table->reloc_name_in_error_message(r_type);
8844 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
8845 _("cannot relocate %s in object file"),
8846 reloc_name.c_str());
8850 const Arm_relobj<big_endian>* object =
8851 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
8853 // If the final branch target of a relocation is THUMB instruction, this
8854 // is 1. Otherwise it is 0.
8855 Arm_address thumb_bit = 0;
8856 Symbol_value<32> symval;
8857 bool is_weakly_undefined_without_plt = false;
8858 bool have_got_offset = false;
8859 unsigned int got_offset = 0;
8861 // If the relocation uses the GOT entry of a symbol instead of the symbol
8862 // itself, we don't care about whether the symbol is defined or what kind
8864 if (reloc_property->uses_got_entry())
8866 // Get the GOT offset.
8867 // The GOT pointer points to the end of the GOT section.
8868 // We need to subtract the size of the GOT section to get
8869 // the actual offset to use in the relocation.
8870 // TODO: We should move GOT offset computing code in TLS relocations
8874 case elfcpp::R_ARM_GOT_BREL:
8875 case elfcpp::R_ARM_GOT_PREL:
8878 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
8879 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
8880 - target->got_size());
8884 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
8885 gold_assert(object->local_has_got_offset(r_sym,
8886 GOT_TYPE_STANDARD));
8887 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
8888 - target->got_size());
8890 have_got_offset = true;
8897 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
8901 // This is a global symbol. Determine if we use PLT and if the
8902 // final target is THUMB.
8903 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
8905 // This uses a PLT, change the symbol value.
8906 symval.set_output_value(target->plt_section()->address()
8907 + gsym->plt_offset());
8910 else if (gsym->is_weak_undefined())
8912 // This is a weakly undefined symbol and we do not use PLT
8913 // for this relocation. A branch targeting this symbol will
8914 // be converted into an NOP.
8915 is_weakly_undefined_without_plt = true;
8917 else if (gsym->is_undefined() && reloc_property->uses_symbol())
8919 // This relocation uses the symbol value but the symbol is
8920 // undefined. Exit early and have the caller reporting an
8926 // Set thumb bit if symbol:
8927 // -Has type STT_ARM_TFUNC or
8928 // -Has type STT_FUNC, is defined and with LSB in value set.
8930 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
8931 || (gsym->type() == elfcpp::STT_FUNC
8932 && !gsym->is_undefined()
8933 && ((psymval->value(object, 0) & 1) != 0)))
8940 // This is a local symbol. Determine if the final target is THUMB.
8941 // We saved this information when all the local symbols were read.
8942 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
8943 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
8944 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
8949 // This is a fake relocation synthesized for a stub. It does not have
8950 // a real symbol. We just look at the LSB of the symbol value to
8951 // determine if the target is THUMB or not.
8952 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
8955 // Strip LSB if this points to a THUMB target.
8957 && reloc_property->uses_thumb_bit()
8958 && ((psymval->value(object, 0) & 1) != 0))
8960 Arm_address stripped_value =
8961 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
8962 symval.set_output_value(stripped_value);
8966 // To look up relocation stubs, we need to pass the symbol table index of
8968 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
8970 // Get the addressing origin of the output segment defining the
8971 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8972 Arm_address sym_origin = 0;
8973 if (reloc_property->uses_symbol_base())
8975 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
8976 // R_ARM_BASE_ABS with the NULL symbol will give the
8977 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8978 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8979 sym_origin = target->got_plt_section()->address();
8980 else if (gsym == NULL)
8982 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
8983 sym_origin = gsym->output_segment()->vaddr();
8984 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
8985 sym_origin = gsym->output_data()->address();
8987 // TODO: Assumes the segment base to be zero for the global symbols
8988 // till the proper support for the segment-base-relative addressing
8989 // will be implemented. This is consistent with GNU ld.
8992 // For relative addressing relocation, find out the relative address base.
8993 Arm_address relative_address_base = 0;
8994 switch(reloc_property->relative_address_base())
8996 case Arm_reloc_property::RAB_NONE:
8997 // Relocations with relative address bases RAB_TLS and RAB_tp are
8998 // handled by relocate_tls. So we do not need to do anything here.
8999 case Arm_reloc_property::RAB_TLS:
9000 case Arm_reloc_property::RAB_tp:
9002 case Arm_reloc_property::RAB_B_S:
9003 relative_address_base = sym_origin;
9005 case Arm_reloc_property::RAB_GOT_ORG:
9006 relative_address_base = target->got_plt_section()->address();
9008 case Arm_reloc_property::RAB_P:
9009 relative_address_base = address;
9011 case Arm_reloc_property::RAB_Pa:
9012 relative_address_base = address & 0xfffffffcU;
9018 typename Arm_relocate_functions::Status reloc_status =
9019 Arm_relocate_functions::STATUS_OKAY;
9020 bool check_overflow = reloc_property->checks_overflow();
9023 case elfcpp::R_ARM_NONE:
9026 case elfcpp::R_ARM_ABS8:
9027 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9028 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
9031 case elfcpp::R_ARM_ABS12:
9032 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9033 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
9036 case elfcpp::R_ARM_ABS16:
9037 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9038 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
9041 case elfcpp::R_ARM_ABS32:
9042 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9043 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9047 case elfcpp::R_ARM_ABS32_NOI:
9048 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9049 // No thumb bit for this relocation: (S + A)
9050 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9054 case elfcpp::R_ARM_MOVW_ABS_NC:
9055 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9056 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
9061 case elfcpp::R_ARM_MOVT_ABS:
9062 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9063 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
9066 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9067 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9068 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
9069 0, thumb_bit, false);
9072 case elfcpp::R_ARM_THM_MOVT_ABS:
9073 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9074 reloc_status = Arm_relocate_functions::thm_movt(view, object,
9078 case elfcpp::R_ARM_MOVW_PREL_NC:
9079 case elfcpp::R_ARM_MOVW_BREL_NC:
9080 case elfcpp::R_ARM_MOVW_BREL:
9082 Arm_relocate_functions::movw(view, object, psymval,
9083 relative_address_base, thumb_bit,
9087 case elfcpp::R_ARM_MOVT_PREL:
9088 case elfcpp::R_ARM_MOVT_BREL:
9090 Arm_relocate_functions::movt(view, object, psymval,
9091 relative_address_base);
9094 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9095 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9096 case elfcpp::R_ARM_THM_MOVW_BREL:
9098 Arm_relocate_functions::thm_movw(view, object, psymval,
9099 relative_address_base,
9100 thumb_bit, check_overflow);
9103 case elfcpp::R_ARM_THM_MOVT_PREL:
9104 case elfcpp::R_ARM_THM_MOVT_BREL:
9106 Arm_relocate_functions::thm_movt(view, object, psymval,
9107 relative_address_base);
9110 case elfcpp::R_ARM_REL32:
9111 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9112 address, thumb_bit);
9115 case elfcpp::R_ARM_THM_ABS5:
9116 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9117 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
9120 // Thumb long branches.
9121 case elfcpp::R_ARM_THM_CALL:
9122 case elfcpp::R_ARM_THM_XPC22:
9123 case elfcpp::R_ARM_THM_JUMP24:
9125 Arm_relocate_functions::thumb_branch_common(
9126 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9127 thumb_bit, is_weakly_undefined_without_plt);
9130 case elfcpp::R_ARM_GOTOFF32:
9132 Arm_address got_origin;
9133 got_origin = target->got_plt_section()->address();
9134 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9135 got_origin, thumb_bit);
9139 case elfcpp::R_ARM_BASE_PREL:
9140 gold_assert(gsym != NULL);
9142 Arm_relocate_functions::base_prel(view, sym_origin, address);
9145 case elfcpp::R_ARM_BASE_ABS:
9146 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9147 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
9150 case elfcpp::R_ARM_GOT_BREL:
9151 gold_assert(have_got_offset);
9152 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
9155 case elfcpp::R_ARM_GOT_PREL:
9156 gold_assert(have_got_offset);
9157 // Get the address origin for GOT PLT, which is allocated right
9158 // after the GOT section, to calculate an absolute address of
9159 // the symbol GOT entry (got_origin + got_offset).
9160 Arm_address got_origin;
9161 got_origin = target->got_plt_section()->address();
9162 reloc_status = Arm_relocate_functions::got_prel(view,
9163 got_origin + got_offset,
9167 case elfcpp::R_ARM_PLT32:
9168 case elfcpp::R_ARM_CALL:
9169 case elfcpp::R_ARM_JUMP24:
9170 case elfcpp::R_ARM_XPC25:
9171 gold_assert(gsym == NULL
9172 || gsym->has_plt_offset()
9173 || gsym->final_value_is_known()
9174 || (gsym->is_defined()
9175 && !gsym->is_from_dynobj()
9176 && !gsym->is_preemptible()));
9178 Arm_relocate_functions::arm_branch_common(
9179 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9180 thumb_bit, is_weakly_undefined_without_plt);
9183 case elfcpp::R_ARM_THM_JUMP19:
9185 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
9189 case elfcpp::R_ARM_THM_JUMP6:
9191 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
9194 case elfcpp::R_ARM_THM_JUMP8:
9196 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
9199 case elfcpp::R_ARM_THM_JUMP11:
9201 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
9204 case elfcpp::R_ARM_PREL31:
9205 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
9206 address, thumb_bit);
9209 case elfcpp::R_ARM_V4BX:
9210 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
9212 const bool is_v4bx_interworking =
9213 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
9215 Arm_relocate_functions::v4bx(relinfo, view, object, address,
9216 is_v4bx_interworking);
9220 case elfcpp::R_ARM_THM_PC8:
9222 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
9225 case elfcpp::R_ARM_THM_PC12:
9227 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
9230 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9232 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
9236 case elfcpp::R_ARM_ALU_PC_G0_NC:
9237 case elfcpp::R_ARM_ALU_PC_G0:
9238 case elfcpp::R_ARM_ALU_PC_G1_NC:
9239 case elfcpp::R_ARM_ALU_PC_G1:
9240 case elfcpp::R_ARM_ALU_PC_G2:
9241 case elfcpp::R_ARM_ALU_SB_G0_NC:
9242 case elfcpp::R_ARM_ALU_SB_G0:
9243 case elfcpp::R_ARM_ALU_SB_G1_NC:
9244 case elfcpp::R_ARM_ALU_SB_G1:
9245 case elfcpp::R_ARM_ALU_SB_G2:
9247 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
9248 reloc_property->group_index(),
9249 relative_address_base,
9250 thumb_bit, check_overflow);
9253 case elfcpp::R_ARM_LDR_PC_G0:
9254 case elfcpp::R_ARM_LDR_PC_G1:
9255 case elfcpp::R_ARM_LDR_PC_G2:
9256 case elfcpp::R_ARM_LDR_SB_G0:
9257 case elfcpp::R_ARM_LDR_SB_G1:
9258 case elfcpp::R_ARM_LDR_SB_G2:
9260 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
9261 reloc_property->group_index(),
9262 relative_address_base);
9265 case elfcpp::R_ARM_LDRS_PC_G0:
9266 case elfcpp::R_ARM_LDRS_PC_G1:
9267 case elfcpp::R_ARM_LDRS_PC_G2:
9268 case elfcpp::R_ARM_LDRS_SB_G0:
9269 case elfcpp::R_ARM_LDRS_SB_G1:
9270 case elfcpp::R_ARM_LDRS_SB_G2:
9272 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
9273 reloc_property->group_index(),
9274 relative_address_base);
9277 case elfcpp::R_ARM_LDC_PC_G0:
9278 case elfcpp::R_ARM_LDC_PC_G1:
9279 case elfcpp::R_ARM_LDC_PC_G2:
9280 case elfcpp::R_ARM_LDC_SB_G0:
9281 case elfcpp::R_ARM_LDC_SB_G1:
9282 case elfcpp::R_ARM_LDC_SB_G2:
9284 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
9285 reloc_property->group_index(),
9286 relative_address_base);
9289 // These are initial tls relocs, which are expected when
9291 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9292 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9293 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9294 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9295 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9297 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval,
9298 view, address, view_size);
9301 // The known and unknown unsupported and/or deprecated relocations.
9302 case elfcpp::R_ARM_PC24:
9303 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9304 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9305 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9307 // Just silently leave the method. We should get an appropriate error
9308 // message in the scan methods.
9312 // Report any errors.
9313 switch (reloc_status)
9315 case Arm_relocate_functions::STATUS_OKAY:
9317 case Arm_relocate_functions::STATUS_OVERFLOW:
9318 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9319 _("relocation overflow in %s"),
9320 reloc_property->name().c_str());
9322 case Arm_relocate_functions::STATUS_BAD_RELOC:
9323 gold_error_at_location(
9327 _("unexpected opcode while processing relocation %s"),
9328 reloc_property->name().c_str());
9337 // Perform a TLS relocation.
9339 template<bool big_endian>
9340 inline typename Arm_relocate_functions<big_endian>::Status
9341 Target_arm<big_endian>::Relocate::relocate_tls(
9342 const Relocate_info<32, big_endian>* relinfo,
9343 Target_arm<big_endian>* target,
9345 const elfcpp::Rel<32, big_endian>& rel,
9346 unsigned int r_type,
9347 const Sized_symbol<32>* gsym,
9348 const Symbol_value<32>* psymval,
9349 unsigned char* view,
9350 elfcpp::Elf_types<32>::Elf_Addr address,
9351 section_size_type /*view_size*/ )
9353 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs;
9354 typedef Relocate_functions<32, big_endian> RelocFuncs;
9355 Output_segment* tls_segment = relinfo->layout->tls_segment();
9357 const Sized_relobj_file<32, big_endian>* object = relinfo->object;
9359 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0);
9361 const bool is_final = (gsym == NULL
9362 ? !parameters->options().shared()
9363 : gsym->final_value_is_known());
9364 const tls::Tls_optimization optimized_type
9365 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
9368 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9370 unsigned int got_type = GOT_TYPE_TLS_PAIR;
9371 unsigned int got_offset;
9374 gold_assert(gsym->has_got_offset(got_type));
9375 got_offset = gsym->got_offset(got_type) - target->got_size();
9379 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9380 gold_assert(object->local_has_got_offset(r_sym, got_type));
9381 got_offset = (object->local_got_offset(r_sym, got_type)
9382 - target->got_size());
9384 if (optimized_type == tls::TLSOPT_NONE)
9386 Arm_address got_entry =
9387 target->got_plt_section()->address() + got_offset;
9389 // Relocate the field with the PC relative offset of the pair of
9391 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9392 return ArmRelocFuncs::STATUS_OKAY;
9397 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9398 if (optimized_type == tls::TLSOPT_NONE)
9400 // Relocate the field with the offset of the GOT entry for
9401 // the module index.
9402 unsigned int got_offset;
9403 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL)
9404 - target->got_size());
9405 Arm_address got_entry =
9406 target->got_plt_section()->address() + got_offset;
9408 // Relocate the field with the PC relative offset of the pair of
9410 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9411 return ArmRelocFuncs::STATUS_OKAY;
9415 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9416 RelocFuncs::rel32_unaligned(view, value);
9417 return ArmRelocFuncs::STATUS_OKAY;
9419 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9420 if (optimized_type == tls::TLSOPT_NONE)
9422 // Relocate the field with the offset of the GOT entry for
9423 // the tp-relative offset of the symbol.
9424 unsigned int got_type = GOT_TYPE_TLS_OFFSET;
9425 unsigned int got_offset;
9428 gold_assert(gsym->has_got_offset(got_type));
9429 got_offset = gsym->got_offset(got_type);
9433 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9434 gold_assert(object->local_has_got_offset(r_sym, got_type));
9435 got_offset = object->local_got_offset(r_sym, got_type);
9438 // All GOT offsets are relative to the end of the GOT.
9439 got_offset -= target->got_size();
9441 Arm_address got_entry =
9442 target->got_plt_section()->address() + got_offset;
9444 // Relocate the field with the PC relative offset of the GOT entry.
9445 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9446 return ArmRelocFuncs::STATUS_OKAY;
9450 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9451 // If we're creating a shared library, a dynamic relocation will
9452 // have been created for this location, so do not apply it now.
9453 if (!parameters->options().shared())
9455 gold_assert(tls_segment != NULL);
9457 // $tp points to the TCB, which is followed by the TLS, so we
9458 // need to add TCB size to the offset.
9459 Arm_address aligned_tcb_size =
9460 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
9461 RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size);
9464 return ArmRelocFuncs::STATUS_OKAY;
9470 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9471 _("unsupported reloc %u"),
9473 return ArmRelocFuncs::STATUS_BAD_RELOC;
9476 // Relocate section data.
9478 template<bool big_endian>
9480 Target_arm<big_endian>::relocate_section(
9481 const Relocate_info<32, big_endian>* relinfo,
9482 unsigned int sh_type,
9483 const unsigned char* prelocs,
9485 Output_section* output_section,
9486 bool needs_special_offset_handling,
9487 unsigned char* view,
9488 Arm_address address,
9489 section_size_type view_size,
9490 const Reloc_symbol_changes* reloc_symbol_changes)
9492 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
9493 gold_assert(sh_type == elfcpp::SHT_REL);
9495 // See if we are relocating a relaxed input section. If so, the view
9496 // covers the whole output section and we need to adjust accordingly.
9497 if (needs_special_offset_handling)
9499 const Output_relaxed_input_section* poris =
9500 output_section->find_relaxed_input_section(relinfo->object,
9501 relinfo->data_shndx);
9504 Arm_address section_address = poris->address();
9505 section_size_type section_size = poris->data_size();
9507 gold_assert((section_address >= address)
9508 && ((section_address + section_size)
9509 <= (address + view_size)));
9511 off_t offset = section_address - address;
9514 view_size = section_size;
9518 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
9519 Arm_relocate, gold::Default_comdat_behavior>(
9525 needs_special_offset_handling,
9529 reloc_symbol_changes);
9532 // Return the size of a relocation while scanning during a relocatable
9535 template<bool big_endian>
9537 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
9538 unsigned int r_type,
9541 r_type = get_real_reloc_type(r_type);
9542 const Arm_reloc_property* arp =
9543 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9548 std::string reloc_name =
9549 arm_reloc_property_table->reloc_name_in_error_message(r_type);
9550 gold_error(_("%s: unexpected %s in object file"),
9551 object->name().c_str(), reloc_name.c_str());
9556 // Scan the relocs during a relocatable link.
9558 template<bool big_endian>
9560 Target_arm<big_endian>::scan_relocatable_relocs(
9561 Symbol_table* symtab,
9563 Sized_relobj_file<32, big_endian>* object,
9564 unsigned int data_shndx,
9565 unsigned int sh_type,
9566 const unsigned char* prelocs,
9568 Output_section* output_section,
9569 bool needs_special_offset_handling,
9570 size_t local_symbol_count,
9571 const unsigned char* plocal_symbols,
9572 Relocatable_relocs* rr)
9574 gold_assert(sh_type == elfcpp::SHT_REL);
9576 typedef Arm_scan_relocatable_relocs<big_endian, elfcpp::SHT_REL,
9577 Relocatable_size_for_reloc> Scan_relocatable_relocs;
9579 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
9580 Scan_relocatable_relocs>(
9588 needs_special_offset_handling,
9594 // Emit relocations for a section.
9596 template<bool big_endian>
9598 Target_arm<big_endian>::relocate_relocs(
9599 const Relocate_info<32, big_endian>* relinfo,
9600 unsigned int sh_type,
9601 const unsigned char* prelocs,
9603 Output_section* output_section,
9604 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
9605 const Relocatable_relocs* rr,
9606 unsigned char* view,
9607 Arm_address view_address,
9608 section_size_type view_size,
9609 unsigned char* reloc_view,
9610 section_size_type reloc_view_size)
9612 gold_assert(sh_type == elfcpp::SHT_REL);
9614 gold::relocate_relocs<32, big_endian, elfcpp::SHT_REL>(
9619 offset_in_output_section,
9628 // Perform target-specific processing in a relocatable link. This is
9629 // only used if we use the relocation strategy RELOC_SPECIAL.
9631 template<bool big_endian>
9633 Target_arm<big_endian>::relocate_special_relocatable(
9634 const Relocate_info<32, big_endian>* relinfo,
9635 unsigned int sh_type,
9636 const unsigned char* preloc_in,
9638 Output_section* output_section,
9639 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
9640 unsigned char* view,
9641 elfcpp::Elf_types<32>::Elf_Addr view_address,
9643 unsigned char* preloc_out)
9645 // We can only handle REL type relocation sections.
9646 gold_assert(sh_type == elfcpp::SHT_REL);
9648 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype;
9649 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write
9651 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1;
9653 const Arm_relobj<big_endian>* object =
9654 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9655 const unsigned int local_count = object->local_symbol_count();
9657 Reltype reloc(preloc_in);
9658 Reltype_write reloc_write(preloc_out);
9660 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
9661 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9662 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
9664 const Arm_reloc_property* arp =
9665 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9666 gold_assert(arp != NULL);
9668 // Get the new symbol index.
9669 // We only use RELOC_SPECIAL strategy in local relocations.
9670 gold_assert(r_sym < local_count);
9672 // We are adjusting a section symbol. We need to find
9673 // the symbol table index of the section symbol for
9674 // the output section corresponding to input section
9675 // in which this symbol is defined.
9677 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary);
9678 gold_assert(is_ordinary);
9679 Output_section* os = object->output_section(shndx);
9680 gold_assert(os != NULL);
9681 gold_assert(os->needs_symtab_index());
9682 unsigned int new_symndx = os->symtab_index();
9684 // Get the new offset--the location in the output section where
9685 // this relocation should be applied.
9687 Arm_address offset = reloc.get_r_offset();
9688 Arm_address new_offset;
9689 if (offset_in_output_section != invalid_address)
9690 new_offset = offset + offset_in_output_section;
9693 section_offset_type sot_offset =
9694 convert_types<section_offset_type, Arm_address>(offset);
9695 section_offset_type new_sot_offset =
9696 output_section->output_offset(object, relinfo->data_shndx,
9698 gold_assert(new_sot_offset != -1);
9699 new_offset = new_sot_offset;
9702 // In an object file, r_offset is an offset within the section.
9703 // In an executable or dynamic object, generated by
9704 // --emit-relocs, r_offset is an absolute address.
9705 if (!parameters->options().relocatable())
9707 new_offset += view_address;
9708 if (offset_in_output_section != invalid_address)
9709 new_offset -= offset_in_output_section;
9712 reloc_write.put_r_offset(new_offset);
9713 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type));
9715 // Handle the reloc addend.
9716 // The relocation uses a section symbol in the input file.
9717 // We are adjusting it to use a section symbol in the output
9718 // file. The input section symbol refers to some address in
9719 // the input section. We need the relocation in the output
9720 // file to refer to that same address. This adjustment to
9721 // the addend is the same calculation we use for a simple
9722 // absolute relocation for the input section symbol.
9724 const Symbol_value<32>* psymval = object->local_symbol(r_sym);
9726 // Handle THUMB bit.
9727 Symbol_value<32> symval;
9728 Arm_address thumb_bit =
9729 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
9731 && arp->uses_thumb_bit()
9732 && ((psymval->value(object, 0) & 1) != 0))
9734 Arm_address stripped_value =
9735 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
9736 symval.set_output_value(stripped_value);
9740 unsigned char* paddend = view + offset;
9741 typename Arm_relocate_functions<big_endian>::Status reloc_status =
9742 Arm_relocate_functions<big_endian>::STATUS_OKAY;
9745 case elfcpp::R_ARM_ABS8:
9746 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object,
9750 case elfcpp::R_ARM_ABS12:
9751 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object,
9755 case elfcpp::R_ARM_ABS16:
9756 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object,
9760 case elfcpp::R_ARM_THM_ABS5:
9761 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend,
9766 case elfcpp::R_ARM_MOVW_ABS_NC:
9767 case elfcpp::R_ARM_MOVW_PREL_NC:
9768 case elfcpp::R_ARM_MOVW_BREL_NC:
9769 case elfcpp::R_ARM_MOVW_BREL:
9770 reloc_status = Arm_relocate_functions<big_endian>::movw(
9771 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
9774 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9775 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9776 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9777 case elfcpp::R_ARM_THM_MOVW_BREL:
9778 reloc_status = Arm_relocate_functions<big_endian>::thm_movw(
9779 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
9782 case elfcpp::R_ARM_THM_CALL:
9783 case elfcpp::R_ARM_THM_XPC22:
9784 case elfcpp::R_ARM_THM_JUMP24:
9786 Arm_relocate_functions<big_endian>::thumb_branch_common(
9787 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
9791 case elfcpp::R_ARM_PLT32:
9792 case elfcpp::R_ARM_CALL:
9793 case elfcpp::R_ARM_JUMP24:
9794 case elfcpp::R_ARM_XPC25:
9796 Arm_relocate_functions<big_endian>::arm_branch_common(
9797 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
9801 case elfcpp::R_ARM_THM_JUMP19:
9803 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object,
9804 psymval, 0, thumb_bit);
9807 case elfcpp::R_ARM_THM_JUMP6:
9809 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval,
9813 case elfcpp::R_ARM_THM_JUMP8:
9815 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval,
9819 case elfcpp::R_ARM_THM_JUMP11:
9821 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval,
9825 case elfcpp::R_ARM_PREL31:
9827 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0,
9831 case elfcpp::R_ARM_THM_PC8:
9833 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval,
9837 case elfcpp::R_ARM_THM_PC12:
9839 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval,
9843 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9845 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval,
9849 // These relocation truncate relocation results so we cannot handle them
9850 // in a relocatable link.
9851 case elfcpp::R_ARM_MOVT_ABS:
9852 case elfcpp::R_ARM_THM_MOVT_ABS:
9853 case elfcpp::R_ARM_MOVT_PREL:
9854 case elfcpp::R_ARM_MOVT_BREL:
9855 case elfcpp::R_ARM_THM_MOVT_PREL:
9856 case elfcpp::R_ARM_THM_MOVT_BREL:
9857 case elfcpp::R_ARM_ALU_PC_G0_NC:
9858 case elfcpp::R_ARM_ALU_PC_G0:
9859 case elfcpp::R_ARM_ALU_PC_G1_NC:
9860 case elfcpp::R_ARM_ALU_PC_G1:
9861 case elfcpp::R_ARM_ALU_PC_G2:
9862 case elfcpp::R_ARM_ALU_SB_G0_NC:
9863 case elfcpp::R_ARM_ALU_SB_G0:
9864 case elfcpp::R_ARM_ALU_SB_G1_NC:
9865 case elfcpp::R_ARM_ALU_SB_G1:
9866 case elfcpp::R_ARM_ALU_SB_G2:
9867 case elfcpp::R_ARM_LDR_PC_G0:
9868 case elfcpp::R_ARM_LDR_PC_G1:
9869 case elfcpp::R_ARM_LDR_PC_G2:
9870 case elfcpp::R_ARM_LDR_SB_G0:
9871 case elfcpp::R_ARM_LDR_SB_G1:
9872 case elfcpp::R_ARM_LDR_SB_G2:
9873 case elfcpp::R_ARM_LDRS_PC_G0:
9874 case elfcpp::R_ARM_LDRS_PC_G1:
9875 case elfcpp::R_ARM_LDRS_PC_G2:
9876 case elfcpp::R_ARM_LDRS_SB_G0:
9877 case elfcpp::R_ARM_LDRS_SB_G1:
9878 case elfcpp::R_ARM_LDRS_SB_G2:
9879 case elfcpp::R_ARM_LDC_PC_G0:
9880 case elfcpp::R_ARM_LDC_PC_G1:
9881 case elfcpp::R_ARM_LDC_PC_G2:
9882 case elfcpp::R_ARM_LDC_SB_G0:
9883 case elfcpp::R_ARM_LDC_SB_G1:
9884 case elfcpp::R_ARM_LDC_SB_G2:
9885 gold_error(_("cannot handle %s in a relocatable link"),
9886 arp->name().c_str());
9893 // Report any errors.
9894 switch (reloc_status)
9896 case Arm_relocate_functions<big_endian>::STATUS_OKAY:
9898 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW:
9899 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
9900 _("relocation overflow in %s"),
9901 arp->name().c_str());
9903 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC:
9904 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
9905 _("unexpected opcode while processing relocation %s"),
9906 arp->name().c_str());
9913 // Return the value to use for a dynamic symbol which requires special
9914 // treatment. This is how we support equality comparisons of function
9915 // pointers across shared library boundaries, as described in the
9916 // processor specific ABI supplement.
9918 template<bool big_endian>
9920 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
9922 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
9923 return this->plt_section()->address() + gsym->plt_offset();
9926 // Map platform-specific relocs to real relocs
9928 template<bool big_endian>
9930 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type)
9934 case elfcpp::R_ARM_TARGET1:
9935 // This is either R_ARM_ABS32 or R_ARM_REL32;
9936 return elfcpp::R_ARM_ABS32;
9938 case elfcpp::R_ARM_TARGET2:
9939 // This can be any reloc type but usually is R_ARM_GOT_PREL
9940 return elfcpp::R_ARM_GOT_PREL;
9947 // Whether if two EABI versions V1 and V2 are compatible.
9949 template<bool big_endian>
9951 Target_arm<big_endian>::are_eabi_versions_compatible(
9952 elfcpp::Elf_Word v1,
9953 elfcpp::Elf_Word v2)
9955 // v4 and v5 are the same spec before and after it was released,
9956 // so allow mixing them.
9957 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN)
9958 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
9959 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
9965 // Combine FLAGS from an input object called NAME and the processor-specific
9966 // flags in the ELF header of the output. Much of this is adapted from the
9967 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9968 // in bfd/elf32-arm.c.
9970 template<bool big_endian>
9972 Target_arm<big_endian>::merge_processor_specific_flags(
9973 const std::string& name,
9974 elfcpp::Elf_Word flags)
9976 if (this->are_processor_specific_flags_set())
9978 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
9980 // Nothing to merge if flags equal to those in output.
9981 if (flags == out_flags)
9984 // Complain about various flag mismatches.
9985 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
9986 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
9987 if (!this->are_eabi_versions_compatible(version1, version2)
9988 && parameters->options().warn_mismatch())
9989 gold_error(_("Source object %s has EABI version %d but output has "
9990 "EABI version %d."),
9992 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
9993 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
9997 // If the input is the default architecture and had the default
9998 // flags then do not bother setting the flags for the output
9999 // architecture, instead allow future merges to do this. If no
10000 // future merges ever set these flags then they will retain their
10001 // uninitialised values, which surprise surprise, correspond
10002 // to the default values.
10006 // This is the first time, just copy the flags.
10007 // We only copy the EABI version for now.
10008 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
10012 // Adjust ELF file header.
10013 template<bool big_endian>
10015 Target_arm<big_endian>::do_adjust_elf_header(
10016 unsigned char* view,
10019 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
10021 elfcpp::Ehdr<32, big_endian> ehdr(view);
10022 elfcpp::Elf_Word flags = this->processor_specific_flags();
10023 unsigned char e_ident[elfcpp::EI_NIDENT];
10024 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
10026 if (elfcpp::arm_eabi_version(flags)
10027 == elfcpp::EF_ARM_EABI_UNKNOWN)
10028 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
10030 e_ident[elfcpp::EI_OSABI] = 0;
10031 e_ident[elfcpp::EI_ABIVERSION] = 0;
10033 // FIXME: Do EF_ARM_BE8 adjustment.
10035 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10037 if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5)
10039 elfcpp::Elf_Half type = ehdr.get_e_type();
10040 if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN)
10042 Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args);
10043 if (attr->int_value())
10044 flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD;
10046 flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT;
10047 this->set_processor_specific_flags(flags);
10050 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
10051 oehdr.put_e_ident(e_ident);
10054 // do_make_elf_object to override the same function in the base class.
10055 // We need to use a target-specific sub-class of
10056 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10057 // Hence we need to have our own ELF object creation.
10059 template<bool big_endian>
10061 Target_arm<big_endian>::do_make_elf_object(
10062 const std::string& name,
10063 Input_file* input_file,
10064 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
10066 int et = ehdr.get_e_type();
10067 // ET_EXEC files are valid input for --just-symbols/-R,
10068 // and we treat them as relocatable objects.
10069 if (et == elfcpp::ET_REL
10070 || (et == elfcpp::ET_EXEC && input_file->just_symbols()))
10072 Arm_relobj<big_endian>* obj =
10073 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
10077 else if (et == elfcpp::ET_DYN)
10079 Sized_dynobj<32, big_endian>* obj =
10080 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
10086 gold_error(_("%s: unsupported ELF file type %d"),
10092 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10093 // Returns -1 if no architecture could be read.
10094 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10096 template<bool big_endian>
10098 Target_arm<big_endian>::get_secondary_compatible_arch(
10099 const Attributes_section_data* pasd)
10101 const Object_attribute* known_attributes =
10102 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10104 // Note: the tag and its argument below are uleb128 values, though
10105 // currently-defined values fit in one byte for each.
10106 const std::string& sv =
10107 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
10109 && sv.data()[0] == elfcpp::Tag_CPU_arch
10110 && (sv.data()[1] & 128) != 128)
10111 return sv.data()[1];
10113 // This tag is "safely ignorable", so don't complain if it looks funny.
10117 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10118 // The tag is removed if ARCH is -1.
10119 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10121 template<bool big_endian>
10123 Target_arm<big_endian>::set_secondary_compatible_arch(
10124 Attributes_section_data* pasd,
10127 Object_attribute* known_attributes =
10128 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10132 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
10136 // Note: the tag and its argument below are uleb128 values, though
10137 // currently-defined values fit in one byte for each.
10139 sv[0] = elfcpp::Tag_CPU_arch;
10140 gold_assert(arch != 0);
10144 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
10147 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10149 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10151 template<bool big_endian>
10153 Target_arm<big_endian>::tag_cpu_arch_combine(
10156 int* secondary_compat_out,
10158 int secondary_compat)
10160 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10161 static const int v6t2[] =
10163 T(V6T2), // PRE_V4.
10173 static const int v6k[] =
10186 static const int v7[] =
10200 static const int v6_m[] =
10215 static const int v6s_m[] =
10231 static const int v7e_m[] =
10238 T(V7E_M), // V5TEJ.
10245 T(V7E_M), // V6S_M.
10248 static const int v4t_plus_v6_m[] =
10255 T(V5TEJ), // V5TEJ.
10262 T(V6S_M), // V6S_M.
10263 T(V7E_M), // V7E_M.
10264 T(V4T_PLUS_V6_M) // V4T plus V6_M.
10266 static const int* comb[] =
10274 // Pseudo-architecture.
10278 // Check we've not got a higher architecture than we know about.
10280 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH)
10282 gold_error(_("%s: unknown CPU architecture"), name);
10286 // Override old tag if we have a Tag_also_compatible_with on the output.
10288 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10289 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10290 oldtag = T(V4T_PLUS_V6_M);
10292 // And override the new tag if we have a Tag_also_compatible_with on the
10295 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10296 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10297 newtag = T(V4T_PLUS_V6_M);
10299 // Architectures before V6KZ add features monotonically.
10300 int tagh = std::max(oldtag, newtag);
10301 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
10304 int tagl = std::min(oldtag, newtag);
10305 int result = comb[tagh - T(V6T2)][tagl];
10307 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10308 // as the canonical version.
10309 if (result == T(V4T_PLUS_V6_M))
10312 *secondary_compat_out = T(V6_M);
10315 *secondary_compat_out = -1;
10319 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10320 name, oldtag, newtag);
10328 // Helper to print AEABI enum tag value.
10330 template<bool big_endian>
10332 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
10334 static const char* aeabi_enum_names[] =
10335 { "", "variable-size", "32-bit", "" };
10336 const size_t aeabi_enum_names_size =
10337 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
10339 if (value < aeabi_enum_names_size)
10340 return std::string(aeabi_enum_names[value]);
10344 sprintf(buffer, "<unknown value %u>", value);
10345 return std::string(buffer);
10349 // Return the string value to store in TAG_CPU_name.
10351 template<bool big_endian>
10353 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
10355 static const char* name_table[] = {
10356 // These aren't real CPU names, but we can't guess
10357 // that from the architecture version alone.
10373 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
10375 if (value < name_table_size)
10376 return std::string(name_table[value]);
10380 sprintf(buffer, "<unknown CPU value %u>", value);
10381 return std::string(buffer);
10385 // Merge object attributes from input file called NAME with those of the
10386 // output. The input object attributes are in the object pointed by PASD.
10388 template<bool big_endian>
10390 Target_arm<big_endian>::merge_object_attributes(
10392 const Attributes_section_data* pasd)
10394 // Return if there is no attributes section data.
10398 // If output has no object attributes, just copy.
10399 const int vendor = Object_attribute::OBJ_ATTR_PROC;
10400 if (this->attributes_section_data_ == NULL)
10402 this->attributes_section_data_ = new Attributes_section_data(*pasd);
10403 Object_attribute* out_attr =
10404 this->attributes_section_data_->known_attributes(vendor);
10406 // We do not output objects with Tag_MPextension_use_legacy - we move
10407 // the attribute's value to Tag_MPextension_use. */
10408 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0)
10410 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0
10411 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value()
10412 != out_attr[elfcpp::Tag_MPextension_use].int_value())
10414 gold_error(_("%s has both the current and legacy "
10415 "Tag_MPextension_use attributes"),
10419 out_attr[elfcpp::Tag_MPextension_use] =
10420 out_attr[elfcpp::Tag_MPextension_use_legacy];
10421 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0);
10422 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0);
10428 const Object_attribute* in_attr = pasd->known_attributes(vendor);
10429 Object_attribute* out_attr =
10430 this->attributes_section_data_->known_attributes(vendor);
10432 // This needs to happen before Tag_ABI_FP_number_model is merged. */
10433 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
10434 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
10436 // Ignore mismatches if the object doesn't use floating point. */
10437 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0)
10438 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
10439 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
10440 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0
10441 && parameters->options().warn_mismatch())
10442 gold_error(_("%s uses VFP register arguments, output does not"),
10446 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
10448 // Merge this attribute with existing attributes.
10451 case elfcpp::Tag_CPU_raw_name:
10452 case elfcpp::Tag_CPU_name:
10453 // These are merged after Tag_CPU_arch.
10456 case elfcpp::Tag_ABI_optimization_goals:
10457 case elfcpp::Tag_ABI_FP_optimization_goals:
10458 // Use the first value seen.
10461 case elfcpp::Tag_CPU_arch:
10463 unsigned int saved_out_attr = out_attr->int_value();
10464 // Merge Tag_CPU_arch and Tag_also_compatible_with.
10465 int secondary_compat =
10466 this->get_secondary_compatible_arch(pasd);
10467 int secondary_compat_out =
10468 this->get_secondary_compatible_arch(
10469 this->attributes_section_data_);
10470 out_attr[i].set_int_value(
10471 tag_cpu_arch_combine(name, out_attr[i].int_value(),
10472 &secondary_compat_out,
10473 in_attr[i].int_value(),
10474 secondary_compat));
10475 this->set_secondary_compatible_arch(this->attributes_section_data_,
10476 secondary_compat_out);
10478 // Merge Tag_CPU_name and Tag_CPU_raw_name.
10479 if (out_attr[i].int_value() == saved_out_attr)
10480 ; // Leave the names alone.
10481 else if (out_attr[i].int_value() == in_attr[i].int_value())
10483 // The output architecture has been changed to match the
10484 // input architecture. Use the input names.
10485 out_attr[elfcpp::Tag_CPU_name].set_string_value(
10486 in_attr[elfcpp::Tag_CPU_name].string_value());
10487 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
10488 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
10492 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
10493 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
10496 // If we still don't have a value for Tag_CPU_name,
10497 // make one up now. Tag_CPU_raw_name remains blank.
10498 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
10500 const std::string cpu_name =
10501 this->tag_cpu_name_value(out_attr[i].int_value());
10502 // FIXME: If we see an unknown CPU, this will be set
10503 // to "<unknown CPU n>", where n is the attribute value.
10504 // This is different from BFD, which leaves the name alone.
10505 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
10510 case elfcpp::Tag_ARM_ISA_use:
10511 case elfcpp::Tag_THUMB_ISA_use:
10512 case elfcpp::Tag_WMMX_arch:
10513 case elfcpp::Tag_Advanced_SIMD_arch:
10514 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10515 case elfcpp::Tag_ABI_FP_rounding:
10516 case elfcpp::Tag_ABI_FP_exceptions:
10517 case elfcpp::Tag_ABI_FP_user_exceptions:
10518 case elfcpp::Tag_ABI_FP_number_model:
10519 case elfcpp::Tag_VFP_HP_extension:
10520 case elfcpp::Tag_CPU_unaligned_access:
10521 case elfcpp::Tag_T2EE_use:
10522 case elfcpp::Tag_Virtualization_use:
10523 case elfcpp::Tag_MPextension_use:
10524 // Use the largest value specified.
10525 if (in_attr[i].int_value() > out_attr[i].int_value())
10526 out_attr[i].set_int_value(in_attr[i].int_value());
10529 case elfcpp::Tag_ABI_align8_preserved:
10530 case elfcpp::Tag_ABI_PCS_RO_data:
10531 // Use the smallest value specified.
10532 if (in_attr[i].int_value() < out_attr[i].int_value())
10533 out_attr[i].set_int_value(in_attr[i].int_value());
10536 case elfcpp::Tag_ABI_align8_needed:
10537 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
10538 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
10539 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
10542 // This error message should be enabled once all non-conforming
10543 // binaries in the toolchain have had the attributes set
10545 // gold_error(_("output 8-byte data alignment conflicts with %s"),
10549 case elfcpp::Tag_ABI_FP_denormal:
10550 case elfcpp::Tag_ABI_PCS_GOT_use:
10552 // These tags have 0 = don't care, 1 = strong requirement,
10553 // 2 = weak requirement.
10554 static const int order_021[3] = {0, 2, 1};
10556 // Use the "greatest" from the sequence 0, 2, 1, or the largest
10557 // value if greater than 2 (for future-proofing).
10558 if ((in_attr[i].int_value() > 2
10559 && in_attr[i].int_value() > out_attr[i].int_value())
10560 || (in_attr[i].int_value() <= 2
10561 && out_attr[i].int_value() <= 2
10562 && (order_021[in_attr[i].int_value()]
10563 > order_021[out_attr[i].int_value()])))
10564 out_attr[i].set_int_value(in_attr[i].int_value());
10568 case elfcpp::Tag_CPU_arch_profile:
10569 if (out_attr[i].int_value() != in_attr[i].int_value())
10571 // 0 will merge with anything.
10572 // 'A' and 'S' merge to 'A'.
10573 // 'R' and 'S' merge to 'R'.
10574 // 'M' and 'A|R|S' is an error.
10575 if (out_attr[i].int_value() == 0
10576 || (out_attr[i].int_value() == 'S'
10577 && (in_attr[i].int_value() == 'A'
10578 || in_attr[i].int_value() == 'R')))
10579 out_attr[i].set_int_value(in_attr[i].int_value());
10580 else if (in_attr[i].int_value() == 0
10581 || (in_attr[i].int_value() == 'S'
10582 && (out_attr[i].int_value() == 'A'
10583 || out_attr[i].int_value() == 'R')))
10585 else if (parameters->options().warn_mismatch())
10588 (_("conflicting architecture profiles %c/%c"),
10589 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
10590 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
10594 case elfcpp::Tag_VFP_arch:
10596 static const struct
10600 } vfp_versions[7] =
10611 // Values greater than 6 aren't defined, so just pick the
10613 if (in_attr[i].int_value() > 6
10614 && in_attr[i].int_value() > out_attr[i].int_value())
10616 *out_attr = *in_attr;
10619 // The output uses the superset of input features
10620 // (ISA version) and registers.
10621 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
10622 vfp_versions[out_attr[i].int_value()].ver);
10623 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
10624 vfp_versions[out_attr[i].int_value()].regs);
10625 // This assumes all possible supersets are also a valid
10628 for (newval = 6; newval > 0; newval--)
10630 if (regs == vfp_versions[newval].regs
10631 && ver == vfp_versions[newval].ver)
10634 out_attr[i].set_int_value(newval);
10637 case elfcpp::Tag_PCS_config:
10638 if (out_attr[i].int_value() == 0)
10639 out_attr[i].set_int_value(in_attr[i].int_value());
10640 else if (in_attr[i].int_value() != 0
10641 && out_attr[i].int_value() != 0
10642 && parameters->options().warn_mismatch())
10644 // It's sometimes ok to mix different configs, so this is only
10646 gold_warning(_("%s: conflicting platform configuration"), name);
10649 case elfcpp::Tag_ABI_PCS_R9_use:
10650 if (in_attr[i].int_value() != out_attr[i].int_value()
10651 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
10652 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused
10653 && parameters->options().warn_mismatch())
10655 gold_error(_("%s: conflicting use of R9"), name);
10657 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
10658 out_attr[i].set_int_value(in_attr[i].int_value());
10660 case elfcpp::Tag_ABI_PCS_RW_data:
10661 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10662 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
10663 != elfcpp::AEABI_R9_SB)
10664 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
10665 != elfcpp::AEABI_R9_unused)
10666 && parameters->options().warn_mismatch())
10668 gold_error(_("%s: SB relative addressing conflicts with use "
10672 // Use the smallest value specified.
10673 if (in_attr[i].int_value() < out_attr[i].int_value())
10674 out_attr[i].set_int_value(in_attr[i].int_value());
10676 case elfcpp::Tag_ABI_PCS_wchar_t:
10677 if (out_attr[i].int_value()
10678 && in_attr[i].int_value()
10679 && out_attr[i].int_value() != in_attr[i].int_value()
10680 && parameters->options().warn_mismatch()
10681 && parameters->options().wchar_size_warning())
10683 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10684 "use %u-byte wchar_t; use of wchar_t values "
10685 "across objects may fail"),
10686 name, in_attr[i].int_value(),
10687 out_attr[i].int_value());
10689 else if (in_attr[i].int_value() && !out_attr[i].int_value())
10690 out_attr[i].set_int_value(in_attr[i].int_value());
10692 case elfcpp::Tag_ABI_enum_size:
10693 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
10695 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
10696 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
10698 // The existing object is compatible with anything.
10699 // Use whatever requirements the new object has.
10700 out_attr[i].set_int_value(in_attr[i].int_value());
10702 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
10703 && out_attr[i].int_value() != in_attr[i].int_value()
10704 && parameters->options().warn_mismatch()
10705 && parameters->options().enum_size_warning())
10707 unsigned int in_value = in_attr[i].int_value();
10708 unsigned int out_value = out_attr[i].int_value();
10709 gold_warning(_("%s uses %s enums yet the output is to use "
10710 "%s enums; use of enum values across objects "
10713 this->aeabi_enum_name(in_value).c_str(),
10714 this->aeabi_enum_name(out_value).c_str());
10718 case elfcpp::Tag_ABI_VFP_args:
10721 case elfcpp::Tag_ABI_WMMX_args:
10722 if (in_attr[i].int_value() != out_attr[i].int_value()
10723 && parameters->options().warn_mismatch())
10725 gold_error(_("%s uses iWMMXt register arguments, output does "
10730 case Object_attribute::Tag_compatibility:
10731 // Merged in target-independent code.
10733 case elfcpp::Tag_ABI_HardFP_use:
10734 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10735 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
10736 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
10737 out_attr[i].set_int_value(3);
10738 else if (in_attr[i].int_value() > out_attr[i].int_value())
10739 out_attr[i].set_int_value(in_attr[i].int_value());
10741 case elfcpp::Tag_ABI_FP_16bit_format:
10742 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
10744 if (in_attr[i].int_value() != out_attr[i].int_value()
10745 && parameters->options().warn_mismatch())
10746 gold_error(_("fp16 format mismatch between %s and output"),
10749 if (in_attr[i].int_value() != 0)
10750 out_attr[i].set_int_value(in_attr[i].int_value());
10753 case elfcpp::Tag_DIV_use:
10754 // This tag is set to zero if we can use UDIV and SDIV in Thumb
10755 // mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10756 // SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10757 // CPU. We will merge as follows: If the input attribute's value
10758 // is one then the output attribute's value remains unchanged. If
10759 // the input attribute's value is zero or two then if the output
10760 // attribute's value is one the output value is set to the input
10761 // value, otherwise the output value must be the same as the
10763 if (in_attr[i].int_value() != 1 && out_attr[i].int_value() != 1)
10765 if (in_attr[i].int_value() != out_attr[i].int_value())
10767 gold_error(_("DIV usage mismatch between %s and output"),
10772 if (in_attr[i].int_value() != 1)
10773 out_attr[i].set_int_value(in_attr[i].int_value());
10777 case elfcpp::Tag_MPextension_use_legacy:
10778 // We don't output objects with Tag_MPextension_use_legacy - we
10779 // move the value to Tag_MPextension_use.
10780 if (in_attr[i].int_value() != 0
10781 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0)
10783 if (in_attr[elfcpp::Tag_MPextension_use].int_value()
10784 != in_attr[i].int_value())
10786 gold_error(_("%s has has both the current and legacy "
10787 "Tag_MPextension_use attributes"),
10792 if (in_attr[i].int_value()
10793 > out_attr[elfcpp::Tag_MPextension_use].int_value())
10794 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i];
10798 case elfcpp::Tag_nodefaults:
10799 // This tag is set if it exists, but the value is unused (and is
10800 // typically zero). We don't actually need to do anything here -
10801 // the merge happens automatically when the type flags are merged
10804 case elfcpp::Tag_also_compatible_with:
10805 // Already done in Tag_CPU_arch.
10807 case elfcpp::Tag_conformance:
10808 // Keep the attribute if it matches. Throw it away otherwise.
10809 // No attribute means no claim to conform.
10810 if (in_attr[i].string_value() != out_attr[i].string_value())
10811 out_attr[i].set_string_value("");
10816 const char* err_object = NULL;
10818 // The "known_obj_attributes" table does contain some undefined
10819 // attributes. Ensure that there are unused.
10820 if (out_attr[i].int_value() != 0
10821 || out_attr[i].string_value() != "")
10822 err_object = "output";
10823 else if (in_attr[i].int_value() != 0
10824 || in_attr[i].string_value() != "")
10827 if (err_object != NULL
10828 && parameters->options().warn_mismatch())
10830 // Attribute numbers >=64 (mod 128) can be safely ignored.
10831 if ((i & 127) < 64)
10832 gold_error(_("%s: unknown mandatory EABI object attribute "
10836 gold_warning(_("%s: unknown EABI object attribute %d"),
10840 // Only pass on attributes that match in both inputs.
10841 if (!in_attr[i].matches(out_attr[i]))
10843 out_attr[i].set_int_value(0);
10844 out_attr[i].set_string_value("");
10849 // If out_attr was copied from in_attr then it won't have a type yet.
10850 if (in_attr[i].type() && !out_attr[i].type())
10851 out_attr[i].set_type(in_attr[i].type());
10854 // Merge Tag_compatibility attributes and any common GNU ones.
10855 this->attributes_section_data_->merge(name, pasd);
10857 // Check for any attributes not known on ARM.
10858 typedef Vendor_object_attributes::Other_attributes Other_attributes;
10859 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
10860 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
10861 Other_attributes* out_other_attributes =
10862 this->attributes_section_data_->other_attributes(vendor);
10863 Other_attributes::iterator out_iter = out_other_attributes->begin();
10865 while (in_iter != in_other_attributes->end()
10866 || out_iter != out_other_attributes->end())
10868 const char* err_object = NULL;
10871 // The tags for each list are in numerical order.
10872 // If the tags are equal, then merge.
10873 if (out_iter != out_other_attributes->end()
10874 && (in_iter == in_other_attributes->end()
10875 || in_iter->first > out_iter->first))
10877 // This attribute only exists in output. We can't merge, and we
10878 // don't know what the tag means, so delete it.
10879 err_object = "output";
10880 err_tag = out_iter->first;
10881 int saved_tag = out_iter->first;
10882 delete out_iter->second;
10883 out_other_attributes->erase(out_iter);
10884 out_iter = out_other_attributes->upper_bound(saved_tag);
10886 else if (in_iter != in_other_attributes->end()
10887 && (out_iter != out_other_attributes->end()
10888 || in_iter->first < out_iter->first))
10890 // This attribute only exists in input. We can't merge, and we
10891 // don't know what the tag means, so ignore it.
10893 err_tag = in_iter->first;
10896 else // The tags are equal.
10898 // As present, all attributes in the list are unknown, and
10899 // therefore can't be merged meaningfully.
10900 err_object = "output";
10901 err_tag = out_iter->first;
10903 // Only pass on attributes that match in both inputs.
10904 if (!in_iter->second->matches(*(out_iter->second)))
10906 // No match. Delete the attribute.
10907 int saved_tag = out_iter->first;
10908 delete out_iter->second;
10909 out_other_attributes->erase(out_iter);
10910 out_iter = out_other_attributes->upper_bound(saved_tag);
10914 // Matched. Keep the attribute and move to the next.
10920 if (err_object && parameters->options().warn_mismatch())
10922 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10923 if ((err_tag & 127) < 64)
10925 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10926 err_object, err_tag);
10930 gold_warning(_("%s: unknown EABI object attribute %d"),
10931 err_object, err_tag);
10937 // Stub-generation methods for Target_arm.
10939 // Make a new Arm_input_section object.
10941 template<bool big_endian>
10942 Arm_input_section<big_endian>*
10943 Target_arm<big_endian>::new_arm_input_section(
10945 unsigned int shndx)
10947 Section_id sid(relobj, shndx);
10949 Arm_input_section<big_endian>* arm_input_section =
10950 new Arm_input_section<big_endian>(relobj, shndx);
10951 arm_input_section->init();
10953 // Register new Arm_input_section in map for look-up.
10954 std::pair<typename Arm_input_section_map::iterator, bool> ins =
10955 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
10957 // Make sure that it we have not created another Arm_input_section
10958 // for this input section already.
10959 gold_assert(ins.second);
10961 return arm_input_section;
10964 // Find the Arm_input_section object corresponding to the SHNDX-th input
10965 // section of RELOBJ.
10967 template<bool big_endian>
10968 Arm_input_section<big_endian>*
10969 Target_arm<big_endian>::find_arm_input_section(
10971 unsigned int shndx) const
10973 Section_id sid(relobj, shndx);
10974 typename Arm_input_section_map::const_iterator p =
10975 this->arm_input_section_map_.find(sid);
10976 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
10979 // Make a new stub table.
10981 template<bool big_endian>
10982 Stub_table<big_endian>*
10983 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
10985 Stub_table<big_endian>* stub_table =
10986 new Stub_table<big_endian>(owner);
10987 this->stub_tables_.push_back(stub_table);
10989 stub_table->set_address(owner->address() + owner->data_size());
10990 stub_table->set_file_offset(owner->offset() + owner->data_size());
10991 stub_table->finalize_data_size();
10996 // Scan a relocation for stub generation.
10998 template<bool big_endian>
11000 Target_arm<big_endian>::scan_reloc_for_stub(
11001 const Relocate_info<32, big_endian>* relinfo,
11002 unsigned int r_type,
11003 const Sized_symbol<32>* gsym,
11004 unsigned int r_sym,
11005 const Symbol_value<32>* psymval,
11006 elfcpp::Elf_types<32>::Elf_Swxword addend,
11007 Arm_address address)
11009 const Arm_relobj<big_endian>* arm_relobj =
11010 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11012 bool target_is_thumb;
11013 Symbol_value<32> symval;
11016 // This is a global symbol. Determine if we use PLT and if the
11017 // final target is THUMB.
11018 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
11020 // This uses a PLT, change the symbol value.
11021 symval.set_output_value(this->plt_section()->address()
11022 + gsym->plt_offset());
11024 target_is_thumb = false;
11026 else if (gsym->is_undefined())
11027 // There is no need to generate a stub symbol is undefined.
11032 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
11033 || (gsym->type() == elfcpp::STT_FUNC
11034 && !gsym->is_undefined()
11035 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
11040 // This is a local symbol. Determine if the final target is THUMB.
11041 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
11044 // Strip LSB if this points to a THUMB target.
11045 const Arm_reloc_property* reloc_property =
11046 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
11047 gold_assert(reloc_property != NULL);
11048 if (target_is_thumb
11049 && reloc_property->uses_thumb_bit()
11050 && ((psymval->value(arm_relobj, 0) & 1) != 0))
11052 Arm_address stripped_value =
11053 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
11054 symval.set_output_value(stripped_value);
11058 // Get the symbol value.
11059 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
11061 // Owing to pipelining, the PC relative branches below actually skip
11062 // two instructions when the branch offset is 0.
11063 Arm_address destination;
11066 case elfcpp::R_ARM_CALL:
11067 case elfcpp::R_ARM_JUMP24:
11068 case elfcpp::R_ARM_PLT32:
11070 destination = value + addend + 8;
11072 case elfcpp::R_ARM_THM_CALL:
11073 case elfcpp::R_ARM_THM_XPC22:
11074 case elfcpp::R_ARM_THM_JUMP24:
11075 case elfcpp::R_ARM_THM_JUMP19:
11077 destination = value + addend + 4;
11080 gold_unreachable();
11083 Reloc_stub* stub = NULL;
11084 Stub_type stub_type =
11085 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
11087 if (stub_type != arm_stub_none)
11089 // Try looking up an existing stub from a stub table.
11090 Stub_table<big_endian>* stub_table =
11091 arm_relobj->stub_table(relinfo->data_shndx);
11092 gold_assert(stub_table != NULL);
11094 // Locate stub by destination.
11095 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
11097 // Create a stub if there is not one already
11098 stub = stub_table->find_reloc_stub(stub_key);
11101 // create a new stub and add it to stub table.
11102 stub = this->stub_factory().make_reloc_stub(stub_type);
11103 stub_table->add_reloc_stub(stub, stub_key);
11106 // Record the destination address.
11107 stub->set_destination_address(destination
11108 | (target_is_thumb ? 1 : 0));
11111 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11112 if (this->fix_cortex_a8_
11113 && (r_type == elfcpp::R_ARM_THM_JUMP24
11114 || r_type == elfcpp::R_ARM_THM_JUMP19
11115 || r_type == elfcpp::R_ARM_THM_CALL
11116 || r_type == elfcpp::R_ARM_THM_XPC22)
11117 && (address & 0xfffU) == 0xffeU)
11119 // Found a candidate. Note we haven't checked the destination is
11120 // within 4K here: if we do so (and don't create a record) we can't
11121 // tell that a branch should have been relocated when scanning later.
11122 this->cortex_a8_relocs_info_[address] =
11123 new Cortex_a8_reloc(stub, r_type,
11124 destination | (target_is_thumb ? 1 : 0));
11128 // This function scans a relocation sections for stub generation.
11129 // The template parameter Relocate must be a class type which provides
11130 // a single function, relocate(), which implements the machine
11131 // specific part of a relocation.
11133 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11134 // SHT_REL or SHT_RELA.
11136 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11137 // of relocs. OUTPUT_SECTION is the output section.
11138 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11139 // mapped to output offsets.
11141 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11142 // VIEW_SIZE is the size. These refer to the input section, unless
11143 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11144 // the output section.
11146 template<bool big_endian>
11147 template<int sh_type>
11149 Target_arm<big_endian>::scan_reloc_section_for_stubs(
11150 const Relocate_info<32, big_endian>* relinfo,
11151 const unsigned char* prelocs,
11152 size_t reloc_count,
11153 Output_section* output_section,
11154 bool needs_special_offset_handling,
11155 const unsigned char* view,
11156 elfcpp::Elf_types<32>::Elf_Addr view_address,
11159 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
11160 const int reloc_size =
11161 Reloc_types<sh_type, 32, big_endian>::reloc_size;
11163 Arm_relobj<big_endian>* arm_object =
11164 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11165 unsigned int local_count = arm_object->local_symbol_count();
11167 gold::Default_comdat_behavior default_comdat_behavior;
11168 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
11170 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
11172 Reltype reloc(prelocs);
11174 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
11175 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
11176 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
11178 r_type = this->get_real_reloc_type(r_type);
11180 // Only a few relocation types need stubs.
11181 if ((r_type != elfcpp::R_ARM_CALL)
11182 && (r_type != elfcpp::R_ARM_JUMP24)
11183 && (r_type != elfcpp::R_ARM_PLT32)
11184 && (r_type != elfcpp::R_ARM_THM_CALL)
11185 && (r_type != elfcpp::R_ARM_THM_XPC22)
11186 && (r_type != elfcpp::R_ARM_THM_JUMP24)
11187 && (r_type != elfcpp::R_ARM_THM_JUMP19)
11188 && (r_type != elfcpp::R_ARM_V4BX))
11191 section_offset_type offset =
11192 convert_to_section_size_type(reloc.get_r_offset());
11194 if (needs_special_offset_handling)
11196 offset = output_section->output_offset(relinfo->object,
11197 relinfo->data_shndx,
11203 // Create a v4bx stub if --fix-v4bx-interworking is used.
11204 if (r_type == elfcpp::R_ARM_V4BX)
11206 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING)
11208 // Get the BX instruction.
11209 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
11210 const Valtype* wv =
11211 reinterpret_cast<const Valtype*>(view + offset);
11212 elfcpp::Elf_types<32>::Elf_Swxword insn =
11213 elfcpp::Swap<32, big_endian>::readval(wv);
11214 const uint32_t reg = (insn & 0xf);
11218 // Try looking up an existing stub from a stub table.
11219 Stub_table<big_endian>* stub_table =
11220 arm_object->stub_table(relinfo->data_shndx);
11221 gold_assert(stub_table != NULL);
11223 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
11225 // create a new stub and add it to stub table.
11226 Arm_v4bx_stub* stub =
11227 this->stub_factory().make_arm_v4bx_stub(reg);
11228 gold_assert(stub != NULL);
11229 stub_table->add_arm_v4bx_stub(stub);
11237 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
11238 elfcpp::Elf_types<32>::Elf_Swxword addend =
11239 stub_addend_reader(r_type, view + offset, reloc);
11241 const Sized_symbol<32>* sym;
11243 Symbol_value<32> symval;
11244 const Symbol_value<32> *psymval;
11245 bool is_defined_in_discarded_section;
11246 unsigned int shndx;
11247 if (r_sym < local_count)
11250 psymval = arm_object->local_symbol(r_sym);
11252 // If the local symbol belongs to a section we are discarding,
11253 // and that section is a debug section, try to find the
11254 // corresponding kept section and map this symbol to its
11255 // counterpart in the kept section. The symbol must not
11256 // correspond to a section we are folding.
11258 shndx = psymval->input_shndx(&is_ordinary);
11259 is_defined_in_discarded_section =
11261 && shndx != elfcpp::SHN_UNDEF
11262 && !arm_object->is_section_included(shndx)
11263 && !relinfo->symtab->is_section_folded(arm_object, shndx));
11265 // We need to compute the would-be final value of this local
11267 if (!is_defined_in_discarded_section)
11269 typedef Sized_relobj_file<32, big_endian> ObjType;
11270 typename ObjType::Compute_final_local_value_status status =
11271 arm_object->compute_final_local_value(r_sym, psymval, &symval,
11273 if (status == ObjType::CFLV_OK)
11275 // Currently we cannot handle a branch to a target in
11276 // a merged section. If this is the case, issue an error
11277 // and also free the merge symbol value.
11278 if (!symval.has_output_value())
11280 const std::string& section_name =
11281 arm_object->section_name(shndx);
11282 arm_object->error(_("cannot handle branch to local %u "
11283 "in a merged section %s"),
11284 r_sym, section_name.c_str());
11290 // We cannot determine the final value.
11297 const Symbol* gsym;
11298 gsym = arm_object->global_symbol(r_sym);
11299 gold_assert(gsym != NULL);
11300 if (gsym->is_forwarder())
11301 gsym = relinfo->symtab->resolve_forwards(gsym);
11303 sym = static_cast<const Sized_symbol<32>*>(gsym);
11304 if (sym->has_symtab_index() && sym->symtab_index() != -1U)
11305 symval.set_output_symtab_index(sym->symtab_index());
11307 symval.set_no_output_symtab_entry();
11309 // We need to compute the would-be final value of this global
11311 const Symbol_table* symtab = relinfo->symtab;
11312 const Sized_symbol<32>* sized_symbol =
11313 symtab->get_sized_symbol<32>(gsym);
11314 Symbol_table::Compute_final_value_status status;
11315 Arm_address value =
11316 symtab->compute_final_value<32>(sized_symbol, &status);
11318 // Skip this if the symbol has not output section.
11319 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
11321 symval.set_output_value(value);
11323 if (gsym->type() == elfcpp::STT_TLS)
11324 symval.set_is_tls_symbol();
11325 else if (gsym->type() == elfcpp::STT_GNU_IFUNC)
11326 symval.set_is_ifunc_symbol();
11329 is_defined_in_discarded_section =
11330 (gsym->is_defined_in_discarded_section()
11331 && gsym->is_undefined());
11335 Symbol_value<32> symval2;
11336 if (is_defined_in_discarded_section)
11338 if (comdat_behavior == CB_UNDETERMINED)
11340 std::string name = arm_object->section_name(relinfo->data_shndx);
11341 comdat_behavior = default_comdat_behavior.get(name.c_str());
11343 if (comdat_behavior == CB_PRETEND)
11345 // FIXME: This case does not work for global symbols.
11346 // We have no place to store the original section index.
11347 // Fortunately this does not matter for comdat sections,
11348 // only for sections explicitly discarded by a linker
11351 typename elfcpp::Elf_types<32>::Elf_Addr value =
11352 arm_object->map_to_kept_section(shndx, &found);
11354 symval2.set_output_value(value + psymval->input_value());
11356 symval2.set_output_value(0);
11360 if (comdat_behavior == CB_WARNING)
11361 gold_warning_at_location(relinfo, i, offset,
11362 _("relocation refers to discarded "
11364 symval2.set_output_value(0);
11366 symval2.set_no_output_symtab_entry();
11367 psymval = &symval2;
11370 // If symbol is a section symbol, we don't know the actual type of
11371 // destination. Give up.
11372 if (psymval->is_section_symbol())
11375 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
11376 addend, view_address + offset);
11380 // Scan an input section for stub generation.
11382 template<bool big_endian>
11384 Target_arm<big_endian>::scan_section_for_stubs(
11385 const Relocate_info<32, big_endian>* relinfo,
11386 unsigned int sh_type,
11387 const unsigned char* prelocs,
11388 size_t reloc_count,
11389 Output_section* output_section,
11390 bool needs_special_offset_handling,
11391 const unsigned char* view,
11392 Arm_address view_address,
11393 section_size_type view_size)
11395 if (sh_type == elfcpp::SHT_REL)
11396 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
11401 needs_special_offset_handling,
11405 else if (sh_type == elfcpp::SHT_RELA)
11406 // We do not support RELA type relocations yet. This is provided for
11408 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
11413 needs_special_offset_handling,
11418 gold_unreachable();
11421 // Group input sections for stub generation.
11423 // We group input sections in an output section so that the total size,
11424 // including any padding space due to alignment is smaller than GROUP_SIZE
11425 // unless the only input section in group is bigger than GROUP_SIZE already.
11426 // Then an ARM stub table is created to follow the last input section
11427 // in group. For each group an ARM stub table is created an is placed
11428 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11429 // extend the group after the stub table.
11431 template<bool big_endian>
11433 Target_arm<big_endian>::group_sections(
11435 section_size_type group_size,
11436 bool stubs_always_after_branch,
11439 // Group input sections and insert stub table
11440 Layout::Section_list section_list;
11441 layout->get_executable_sections(§ion_list);
11442 for (Layout::Section_list::const_iterator p = section_list.begin();
11443 p != section_list.end();
11446 Arm_output_section<big_endian>* output_section =
11447 Arm_output_section<big_endian>::as_arm_output_section(*p);
11448 output_section->group_sections(group_size, stubs_always_after_branch,
11453 // Relaxation hook. This is where we do stub generation.
11455 template<bool big_endian>
11457 Target_arm<big_endian>::do_relax(
11459 const Input_objects* input_objects,
11460 Symbol_table* symtab,
11464 // No need to generate stubs if this is a relocatable link.
11465 gold_assert(!parameters->options().relocatable());
11467 // If this is the first pass, we need to group input sections into
11469 bool done_exidx_fixup = false;
11470 typedef typename Stub_table_list::iterator Stub_table_iterator;
11473 // Determine the stub group size. The group size is the absolute
11474 // value of the parameter --stub-group-size. If --stub-group-size
11475 // is passed a negative value, we restrict stubs to be always after
11476 // the stubbed branches.
11477 int32_t stub_group_size_param =
11478 parameters->options().stub_group_size();
11479 bool stubs_always_after_branch = stub_group_size_param < 0;
11480 section_size_type stub_group_size = abs(stub_group_size_param);
11482 if (stub_group_size == 1)
11485 // Thumb branch range is +-4MB has to be used as the default
11486 // maximum size (a given section can contain both ARM and Thumb
11487 // code, so the worst case has to be taken into account). If we are
11488 // fixing cortex-a8 errata, the branch range has to be even smaller,
11489 // since wide conditional branch has a range of +-1MB only.
11491 // This value is 48K less than that, which allows for 4096
11492 // 12-byte stubs. If we exceed that, then we will fail to link.
11493 // The user will have to relink with an explicit group size
11495 stub_group_size = 4145152;
11498 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11499 // page as the first half of a 32-bit branch straddling two 4K pages.
11500 // This is a crude way of enforcing that. In addition, long conditional
11501 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11502 // erratum, limit the group size to (1M - 12k) to avoid unreachable
11503 // cortex-A8 stubs from long conditional branches.
11504 if (this->fix_cortex_a8_)
11506 stubs_always_after_branch = true;
11507 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12);
11508 stub_group_size = std::max(stub_group_size, cortex_a8_group_size);
11511 group_sections(layout, stub_group_size, stubs_always_after_branch, task);
11513 // Also fix .ARM.exidx section coverage.
11514 Arm_output_section<big_endian>* exidx_output_section = NULL;
11515 for (Layout::Section_list::const_iterator p =
11516 layout->section_list().begin();
11517 p != layout->section_list().end();
11519 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
11521 if (exidx_output_section == NULL)
11522 exidx_output_section =
11523 Arm_output_section<big_endian>::as_arm_output_section(*p);
11525 // We cannot handle this now.
11526 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11527 "non-relocatable link"),
11528 exidx_output_section->name(),
11532 if (exidx_output_section != NULL)
11534 this->fix_exidx_coverage(layout, input_objects, exidx_output_section,
11536 done_exidx_fixup = true;
11541 // If this is not the first pass, addresses and file offsets have
11542 // been reset at this point, set them here.
11543 for (Stub_table_iterator sp = this->stub_tables_.begin();
11544 sp != this->stub_tables_.end();
11547 Arm_input_section<big_endian>* owner = (*sp)->owner();
11548 off_t off = align_address(owner->original_size(),
11549 (*sp)->addralign());
11550 (*sp)->set_address_and_file_offset(owner->address() + off,
11551 owner->offset() + off);
11555 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
11556 // beginning of each relaxation pass, just blow away all the stubs.
11557 // Alternatively, we could selectively remove only the stubs and reloc
11558 // information for code sections that have moved since the last pass.
11559 // That would require more book-keeping.
11560 if (this->fix_cortex_a8_)
11562 // Clear all Cortex-A8 reloc information.
11563 for (typename Cortex_a8_relocs_info::const_iterator p =
11564 this->cortex_a8_relocs_info_.begin();
11565 p != this->cortex_a8_relocs_info_.end();
11568 this->cortex_a8_relocs_info_.clear();
11570 // Remove all Cortex-A8 stubs.
11571 for (Stub_table_iterator sp = this->stub_tables_.begin();
11572 sp != this->stub_tables_.end();
11574 (*sp)->remove_all_cortex_a8_stubs();
11577 // Scan relocs for relocation stubs
11578 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
11579 op != input_objects->relobj_end();
11582 Arm_relobj<big_endian>* arm_relobj =
11583 Arm_relobj<big_endian>::as_arm_relobj(*op);
11584 // Lock the object so we can read from it. This is only called
11585 // single-threaded from Layout::finalize, so it is OK to lock.
11586 Task_lock_obj<Object> tl(task, arm_relobj);
11587 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
11590 // Check all stub tables to see if any of them have their data sizes
11591 // or addresses alignments changed. These are the only things that
11593 bool any_stub_table_changed = false;
11594 Unordered_set<const Output_section*> sections_needing_adjustment;
11595 for (Stub_table_iterator sp = this->stub_tables_.begin();
11596 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
11599 if ((*sp)->update_data_size_and_addralign())
11601 // Update data size of stub table owner.
11602 Arm_input_section<big_endian>* owner = (*sp)->owner();
11603 uint64_t address = owner->address();
11604 off_t offset = owner->offset();
11605 owner->reset_address_and_file_offset();
11606 owner->set_address_and_file_offset(address, offset);
11608 sections_needing_adjustment.insert(owner->output_section());
11609 any_stub_table_changed = true;
11613 // Output_section_data::output_section() returns a const pointer but we
11614 // need to update output sections, so we record all output sections needing
11615 // update above and scan the sections here to find out what sections need
11617 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
11618 p != layout->section_list().end();
11621 if (sections_needing_adjustment.find(*p)
11622 != sections_needing_adjustment.end())
11623 (*p)->set_section_offsets_need_adjustment();
11626 // Stop relaxation if no EXIDX fix-up and no stub table change.
11627 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
11629 // Finalize the stubs in the last relaxation pass.
11630 if (!continue_relaxation)
11632 for (Stub_table_iterator sp = this->stub_tables_.begin();
11633 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
11635 (*sp)->finalize_stubs();
11637 // Update output local symbol counts of objects if necessary.
11638 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
11639 op != input_objects->relobj_end();
11642 Arm_relobj<big_endian>* arm_relobj =
11643 Arm_relobj<big_endian>::as_arm_relobj(*op);
11645 // Update output local symbol counts. We need to discard local
11646 // symbols defined in parts of input sections that are discarded by
11648 if (arm_relobj->output_local_symbol_count_needs_update())
11650 // We need to lock the object's file to update it.
11651 Task_lock_obj<Object> tl(task, arm_relobj);
11652 arm_relobj->update_output_local_symbol_count();
11657 return continue_relaxation;
11660 // Relocate a stub.
11662 template<bool big_endian>
11664 Target_arm<big_endian>::relocate_stub(
11666 const Relocate_info<32, big_endian>* relinfo,
11667 Output_section* output_section,
11668 unsigned char* view,
11669 Arm_address address,
11670 section_size_type view_size)
11673 const Stub_template* stub_template = stub->stub_template();
11674 for (size_t i = 0; i < stub_template->reloc_count(); i++)
11676 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
11677 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
11679 unsigned int r_type = insn->r_type();
11680 section_size_type reloc_offset = stub_template->reloc_offset(i);
11681 section_size_type reloc_size = insn->size();
11682 gold_assert(reloc_offset + reloc_size <= view_size);
11684 // This is the address of the stub destination.
11685 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
11686 Symbol_value<32> symval;
11687 symval.set_output_value(target);
11689 // Synthesize a fake reloc just in case. We don't have a symbol so
11691 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
11692 memset(reloc_buffer, 0, sizeof(reloc_buffer));
11693 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
11694 reloc_write.put_r_offset(reloc_offset);
11695 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
11696 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
11698 relocate.relocate(relinfo, this, output_section,
11699 this->fake_relnum_for_stubs, rel, r_type,
11700 NULL, &symval, view + reloc_offset,
11701 address + reloc_offset, reloc_size);
11705 // Determine whether an object attribute tag takes an integer, a
11708 template<bool big_endian>
11710 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
11712 if (tag == Object_attribute::Tag_compatibility)
11713 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11714 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
11715 else if (tag == elfcpp::Tag_nodefaults)
11716 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11717 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
11718 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
11719 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
11721 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
11723 return ((tag & 1) != 0
11724 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11725 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
11728 // Reorder attributes.
11730 // The ABI defines that Tag_conformance should be emitted first, and that
11731 // Tag_nodefaults should be second (if either is defined). This sets those
11732 // two positions, and bumps up the position of all the remaining tags to
11735 template<bool big_endian>
11737 Target_arm<big_endian>::do_attributes_order(int num) const
11739 // Reorder the known object attributes in output. We want to move
11740 // Tag_conformance to position 4 and Tag_conformance to position 5
11741 // and shift everything between 4 .. Tag_conformance - 1 to make room.
11743 return elfcpp::Tag_conformance;
11745 return elfcpp::Tag_nodefaults;
11746 if ((num - 2) < elfcpp::Tag_nodefaults)
11748 if ((num - 1) < elfcpp::Tag_conformance)
11753 // Scan a span of THUMB code for Cortex-A8 erratum.
11755 template<bool big_endian>
11757 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
11758 Arm_relobj<big_endian>* arm_relobj,
11759 unsigned int shndx,
11760 section_size_type span_start,
11761 section_size_type span_end,
11762 const unsigned char* view,
11763 Arm_address address)
11765 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11767 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11768 // The branch target is in the same 4KB region as the
11769 // first half of the branch.
11770 // The instruction before the branch is a 32-bit
11771 // length non-branch instruction.
11772 section_size_type i = span_start;
11773 bool last_was_32bit = false;
11774 bool last_was_branch = false;
11775 while (i < span_end)
11777 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
11778 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
11779 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
11780 bool is_blx = false, is_b = false;
11781 bool is_bl = false, is_bcc = false;
11783 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
11786 // Load the rest of the insn (in manual-friendly order).
11787 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
11789 // Encoding T4: B<c>.W.
11790 is_b = (insn & 0xf800d000U) == 0xf0009000U;
11791 // Encoding T1: BL<c>.W.
11792 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
11793 // Encoding T2: BLX<c>.W.
11794 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
11795 // Encoding T3: B<c>.W (not permitted in IT block).
11796 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
11797 && (insn & 0x07f00000U) != 0x03800000U);
11800 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
11802 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11803 // page boundary and it follows 32-bit non-branch instruction,
11804 // we need to work around.
11805 if (is_32bit_branch
11806 && ((address + i) & 0xfffU) == 0xffeU
11808 && !last_was_branch)
11810 // Check to see if there is a relocation stub for this branch.
11811 bool force_target_arm = false;
11812 bool force_target_thumb = false;
11813 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
11814 Cortex_a8_relocs_info::const_iterator p =
11815 this->cortex_a8_relocs_info_.find(address + i);
11817 if (p != this->cortex_a8_relocs_info_.end())
11819 cortex_a8_reloc = p->second;
11820 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
11822 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
11823 && !target_is_thumb)
11824 force_target_arm = true;
11825 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
11826 && target_is_thumb)
11827 force_target_thumb = true;
11831 Stub_type stub_type = arm_stub_none;
11833 // Check if we have an offending branch instruction.
11834 uint16_t upper_insn = (insn >> 16) & 0xffffU;
11835 uint16_t lower_insn = insn & 0xffffU;
11836 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
11838 if (cortex_a8_reloc != NULL
11839 && cortex_a8_reloc->reloc_stub() != NULL)
11840 // We've already made a stub for this instruction, e.g.
11841 // it's a long branch or a Thumb->ARM stub. Assume that
11842 // stub will suffice to work around the A8 erratum (see
11843 // setting of always_after_branch above).
11847 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
11849 stub_type = arm_stub_a8_veneer_b_cond;
11851 else if (is_b || is_bl || is_blx)
11853 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
11858 stub_type = (is_blx
11859 ? arm_stub_a8_veneer_blx
11861 ? arm_stub_a8_veneer_bl
11862 : arm_stub_a8_veneer_b));
11865 if (stub_type != arm_stub_none)
11867 Arm_address pc_for_insn = address + i + 4;
11869 // The original instruction is a BL, but the target is
11870 // an ARM instruction. If we were not making a stub,
11871 // the BL would have been converted to a BLX. Use the
11872 // BLX stub instead in that case.
11873 if (this->may_use_v5t_interworking() && force_target_arm
11874 && stub_type == arm_stub_a8_veneer_bl)
11876 stub_type = arm_stub_a8_veneer_blx;
11880 // Conversely, if the original instruction was
11881 // BLX but the target is Thumb mode, use the BL stub.
11882 else if (force_target_thumb
11883 && stub_type == arm_stub_a8_veneer_blx)
11885 stub_type = arm_stub_a8_veneer_bl;
11893 // If we found a relocation, use the proper destination,
11894 // not the offset in the (unrelocated) instruction.
11895 // Note this is always done if we switched the stub type above.
11896 if (cortex_a8_reloc != NULL)
11897 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
11899 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
11901 // Add a new stub if destination address in in the same page.
11902 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
11904 Cortex_a8_stub* stub =
11905 this->stub_factory_.make_cortex_a8_stub(stub_type,
11909 Stub_table<big_endian>* stub_table =
11910 arm_relobj->stub_table(shndx);
11911 gold_assert(stub_table != NULL);
11912 stub_table->add_cortex_a8_stub(address + i, stub);
11917 i += insn_32bit ? 4 : 2;
11918 last_was_32bit = insn_32bit;
11919 last_was_branch = is_32bit_branch;
11923 // Apply the Cortex-A8 workaround.
11925 template<bool big_endian>
11927 Target_arm<big_endian>::apply_cortex_a8_workaround(
11928 const Cortex_a8_stub* stub,
11929 Arm_address stub_address,
11930 unsigned char* insn_view,
11931 Arm_address insn_address)
11933 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
11934 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
11935 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
11936 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
11937 off_t branch_offset = stub_address - (insn_address + 4);
11939 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
11940 switch (stub->stub_template()->type())
11942 case arm_stub_a8_veneer_b_cond:
11943 // For a conditional branch, we re-write it to be an unconditional
11944 // branch to the stub. We use the THUMB-2 encoding here.
11945 upper_insn = 0xf000U;
11946 lower_insn = 0xb800U;
11948 case arm_stub_a8_veneer_b:
11949 case arm_stub_a8_veneer_bl:
11950 case arm_stub_a8_veneer_blx:
11951 if ((lower_insn & 0x5000U) == 0x4000U)
11952 // For a BLX instruction, make sure that the relocation is
11953 // rounded up to a word boundary. This follows the semantics of
11954 // the instruction which specifies that bit 1 of the target
11955 // address will come from bit 1 of the base address.
11956 branch_offset = (branch_offset + 2) & ~3;
11958 // Put BRANCH_OFFSET back into the insn.
11959 gold_assert(!Bits<25>::has_overflow32(branch_offset));
11960 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
11961 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
11965 gold_unreachable();
11968 // Put the relocated value back in the object file:
11969 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
11970 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
11973 // Target selector for ARM. Note this is never instantiated directly.
11974 // It's only used in Target_selector_arm_nacl, below.
11976 template<bool big_endian>
11977 class Target_selector_arm : public Target_selector
11980 Target_selector_arm()
11981 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
11982 (big_endian ? "elf32-bigarm" : "elf32-littlearm"),
11983 (big_endian ? "armelfb" : "armelf"))
11987 do_instantiate_target()
11988 { return new Target_arm<big_endian>(); }
11991 // Fix .ARM.exidx section coverage.
11993 template<bool big_endian>
11995 Target_arm<big_endian>::fix_exidx_coverage(
11997 const Input_objects* input_objects,
11998 Arm_output_section<big_endian>* exidx_section,
11999 Symbol_table* symtab,
12002 // We need to look at all the input sections in output in ascending
12003 // order of of output address. We do that by building a sorted list
12004 // of output sections by addresses. Then we looks at the output sections
12005 // in order. The input sections in an output section are already sorted
12006 // by addresses within the output section.
12008 typedef std::set<Output_section*, output_section_address_less_than>
12009 Sorted_output_section_list;
12010 Sorted_output_section_list sorted_output_sections;
12012 // Find out all the output sections of input sections pointed by
12013 // EXIDX input sections.
12014 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
12015 p != input_objects->relobj_end();
12018 Arm_relobj<big_endian>* arm_relobj =
12019 Arm_relobj<big_endian>::as_arm_relobj(*p);
12020 std::vector<unsigned int> shndx_list;
12021 arm_relobj->get_exidx_shndx_list(&shndx_list);
12022 for (size_t i = 0; i < shndx_list.size(); ++i)
12024 const Arm_exidx_input_section* exidx_input_section =
12025 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]);
12026 gold_assert(exidx_input_section != NULL);
12027 if (!exidx_input_section->has_errors())
12029 unsigned int text_shndx = exidx_input_section->link();
12030 Output_section* os = arm_relobj->output_section(text_shndx);
12031 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0)
12032 sorted_output_sections.insert(os);
12037 // Go over the output sections in ascending order of output addresses.
12038 typedef typename Arm_output_section<big_endian>::Text_section_list
12040 Text_section_list sorted_text_sections;
12041 for (typename Sorted_output_section_list::iterator p =
12042 sorted_output_sections.begin();
12043 p != sorted_output_sections.end();
12046 Arm_output_section<big_endian>* arm_output_section =
12047 Arm_output_section<big_endian>::as_arm_output_section(*p);
12048 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
12051 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab,
12052 merge_exidx_entries(), task);
12055 template<bool big_endian>
12057 Target_arm<big_endian>::do_define_standard_symbols(
12058 Symbol_table* symtab,
12061 // Handle the .ARM.exidx section.
12062 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
12064 if (exidx_section != NULL)
12066 // Create __exidx_start and __exidx_end symbols.
12067 symtab->define_in_output_data("__exidx_start",
12069 Symbol_table::PREDEFINED,
12073 elfcpp::STT_NOTYPE,
12074 elfcpp::STB_GLOBAL,
12075 elfcpp::STV_HIDDEN,
12077 false, // offset_is_from_end
12078 true); // only_if_ref
12080 symtab->define_in_output_data("__exidx_end",
12082 Symbol_table::PREDEFINED,
12086 elfcpp::STT_NOTYPE,
12087 elfcpp::STB_GLOBAL,
12088 elfcpp::STV_HIDDEN,
12090 true, // offset_is_from_end
12091 true); // only_if_ref
12095 // Define __exidx_start and __exidx_end even when .ARM.exidx
12096 // section is missing to match ld's behaviour.
12097 symtab->define_as_constant("__exidx_start", NULL,
12098 Symbol_table::PREDEFINED,
12099 0, 0, elfcpp::STT_OBJECT,
12100 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12102 symtab->define_as_constant("__exidx_end", NULL,
12103 Symbol_table::PREDEFINED,
12104 0, 0, elfcpp::STT_OBJECT,
12105 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12110 // NaCl variant. It uses different PLT contents.
12112 template<bool big_endian>
12113 class Output_data_plt_arm_nacl;
12115 template<bool big_endian>
12116 class Target_arm_nacl : public Target_arm<big_endian>
12120 : Target_arm<big_endian>(&arm_nacl_info)
12124 virtual Output_data_plt_arm<big_endian>*
12125 do_make_data_plt(Layout* layout, Output_data_space* got_plt)
12126 { return new Output_data_plt_arm_nacl<big_endian>(layout, got_plt); }
12129 static const Target::Target_info arm_nacl_info;
12132 template<bool big_endian>
12133 const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info =
12136 big_endian, // is_big_endian
12137 elfcpp::EM_ARM, // machine_code
12138 false, // has_make_symbol
12139 false, // has_resolve
12140 false, // has_code_fill
12141 true, // is_default_stack_executable
12142 false, // can_icf_inline_merge_sections
12144 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12145 0x20000, // default_text_segment_address
12146 0x10000, // abi_pagesize (overridable by -z max-page-size)
12147 0x10000, // common_pagesize (overridable by -z common-page-size)
12148 true, // isolate_execinstr
12149 0x10000000, // rosegment_gap
12150 elfcpp::SHN_UNDEF, // small_common_shndx
12151 elfcpp::SHN_UNDEF, // large_common_shndx
12152 0, // small_common_section_flags
12153 0, // large_common_section_flags
12154 ".ARM.attributes", // attributes_section
12155 "aeabi" // attributes_vendor
12158 template<bool big_endian>
12159 class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian>
12162 Output_data_plt_arm_nacl(Layout* layout, Output_data_space* got_plt)
12163 : Output_data_plt_arm<big_endian>(layout, 16, got_plt)
12167 // Return the offset of the first non-reserved PLT entry.
12168 virtual unsigned int
12169 do_first_plt_entry_offset() const
12170 { return sizeof(first_plt_entry); }
12172 // Return the size of a PLT entry.
12173 virtual unsigned int
12174 do_get_plt_entry_size() const
12175 { return sizeof(plt_entry); }
12178 do_fill_first_plt_entry(unsigned char* pov,
12179 Arm_address got_address,
12180 Arm_address plt_address);
12183 do_fill_plt_entry(unsigned char* pov,
12184 Arm_address got_address,
12185 Arm_address plt_address,
12186 unsigned int got_offset,
12187 unsigned int plt_offset);
12190 inline uint32_t arm_movw_immediate(uint32_t value)
12192 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
12195 inline uint32_t arm_movt_immediate(uint32_t value)
12197 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
12200 // Template for the first PLT entry.
12201 static const uint32_t first_plt_entry[16];
12203 // Template for subsequent PLT entries.
12204 static const uint32_t plt_entry[4];
12207 // The first entry in the PLT.
12208 template<bool big_endian>
12209 const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] =
12212 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12213 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12214 0xe08cc00f, // add ip, ip, pc
12215 0xe52dc008, // str ip, [sp, #-8]!
12217 0xe3ccc103, // bic ip, ip, #0xc0000000
12218 0xe59cc000, // ldr ip, [ip]
12219 0xe3ccc13f, // bic ip, ip, #0xc000000f
12220 0xe12fff1c, // bx ip
12226 0xe50dc004, // str ip, [sp, #-4]
12228 0xe3ccc103, // bic ip, ip, #0xc0000000
12229 0xe59cc000, // ldr ip, [ip]
12230 0xe3ccc13f, // bic ip, ip, #0xc000000f
12231 0xe12fff1c, // bx ip
12234 template<bool big_endian>
12236 Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry(
12237 unsigned char* pov,
12238 Arm_address got_address,
12239 Arm_address plt_address)
12241 // Write first PLT entry. All but first two words are constants.
12242 const size_t num_first_plt_words = (sizeof(first_plt_entry)
12243 / sizeof(first_plt_entry[0]));
12245 int32_t got_displacement = got_address + 8 - (plt_address + 16);
12247 elfcpp::Swap<32, big_endian>::writeval
12248 (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement));
12249 elfcpp::Swap<32, big_endian>::writeval
12250 (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement));
12252 for (size_t i = 2; i < num_first_plt_words; ++i)
12253 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
12256 // Subsequent entries in the PLT.
12258 template<bool big_endian>
12259 const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] =
12261 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12262 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12263 0xe08cc00f, // add ip, ip, pc
12264 0xea000000, // b .Lplt_tail
12267 template<bool big_endian>
12269 Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry(
12270 unsigned char* pov,
12271 Arm_address got_address,
12272 Arm_address plt_address,
12273 unsigned int got_offset,
12274 unsigned int plt_offset)
12276 // Calculate the displacement between the PLT slot and the
12277 // common tail that's part of the special initial PLT slot.
12278 int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t))
12279 - (plt_address + plt_offset
12280 + sizeof(plt_entry) + sizeof(uint32_t)));
12281 gold_assert((tail_displacement & 3) == 0);
12282 tail_displacement >>= 2;
12284 gold_assert ((tail_displacement & 0xff000000) == 0
12285 || (-tail_displacement & 0xff000000) == 0);
12287 // Calculate the displacement between the PLT slot and the entry
12288 // in the GOT. The offset accounts for the value produced by
12289 // adding to pc in the penultimate instruction of the PLT stub.
12290 const int32_t got_displacement = (got_address + got_offset
12291 - (plt_address + sizeof(plt_entry)));
12293 elfcpp::Swap<32, big_endian>::writeval
12294 (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement));
12295 elfcpp::Swap<32, big_endian>::writeval
12296 (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement));
12297 elfcpp::Swap<32, big_endian>::writeval
12298 (pov + 8, plt_entry[2]);
12299 elfcpp::Swap<32, big_endian>::writeval
12300 (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff));
12303 // Target selectors.
12305 template<bool big_endian>
12306 class Target_selector_arm_nacl
12307 : public Target_selector_nacl<Target_selector_arm<big_endian>,
12308 Target_arm_nacl<big_endian> >
12311 Target_selector_arm_nacl()
12312 : Target_selector_nacl<Target_selector_arm<big_endian>,
12313 Target_arm_nacl<big_endian> >(
12315 big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12316 big_endian ? "armelfb_nacl" : "armelf_nacl")
12320 Target_selector_arm_nacl<false> target_selector_arm;
12321 Target_selector_arm_nacl<true> target_selector_armbe;
12323 } // End anonymous namespace.