1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2015 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian>
62 class Output_data_plt_arm;
64 template<bool big_endian>
65 class Output_data_plt_arm_standard;
67 template<bool big_endian>
70 template<bool big_endian>
71 class Arm_input_section;
73 class Arm_exidx_cantunwind;
75 class Arm_exidx_merged_section;
77 class Arm_exidx_fixup;
79 template<bool big_endian>
80 class Arm_output_section;
82 class Arm_exidx_input_section;
84 template<bool big_endian>
87 template<bool big_endian>
88 class Arm_relocate_functions;
90 template<bool big_endian>
91 class Arm_output_data_got;
93 template<bool big_endian>
97 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
99 // Maximum branch offsets for ARM, THUMB and THUMB2.
100 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
101 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
102 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
103 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
104 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
105 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
107 // Thread Control Block size.
108 const size_t ARM_TCB_SIZE = 8;
110 // The arm target class.
112 // This is a very simple port of gold for ARM-EABI. It is intended for
113 // supporting Android only for the time being.
116 // - Implement all static relocation types documented in arm-reloc.def.
117 // - Make PLTs more flexible for different architecture features like
119 // There are probably a lot more.
121 // Ideally we would like to avoid using global variables but this is used
122 // very in many places and sometimes in loops. If we use a function
123 // returning a static instance of Arm_reloc_property_table, it will be very
124 // slow in an threaded environment since the static instance needs to be
125 // locked. The pointer is below initialized in the
126 // Target::do_select_as_default_target() hook so that we do not spend time
127 // building the table if we are not linking ARM objects.
129 // An alternative is to to process the information in arm-reloc.def in
130 // compilation time and generate a representation of it in PODs only. That
131 // way we can avoid initialization when the linker starts.
133 Arm_reloc_property_table* arm_reloc_property_table = NULL;
135 // Instruction template class. This class is similar to the insn_sequence
136 // struct in bfd/elf32-arm.c.
141 // Types of instruction templates.
145 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
146 // templates with class-specific semantics. Currently this is used
147 // only by the Cortex_a8_stub class for handling condition codes in
148 // conditional branches.
149 THUMB16_SPECIAL_TYPE,
155 // Factory methods to create instruction templates in different formats.
157 static const Insn_template
158 thumb16_insn(uint32_t data)
159 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
161 // A Thumb conditional branch, in which the proper condition is inserted
162 // when we build the stub.
163 static const Insn_template
164 thumb16_bcond_insn(uint32_t data)
165 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
167 static const Insn_template
168 thumb32_insn(uint32_t data)
169 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
171 static const Insn_template
172 thumb32_b_insn(uint32_t data, int reloc_addend)
174 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
178 static const Insn_template
179 arm_insn(uint32_t data)
180 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
182 static const Insn_template
183 arm_rel_insn(unsigned data, int reloc_addend)
184 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
186 static const Insn_template
187 data_word(unsigned data, unsigned int r_type, int reloc_addend)
188 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
190 // Accessors. This class is used for read-only objects so no modifiers
195 { return this->data_; }
197 // Return the instruction sequence type of this.
200 { return this->type_; }
202 // Return the ARM relocation type of this.
205 { return this->r_type_; }
209 { return this->reloc_addend_; }
211 // Return size of instruction template in bytes.
215 // Return byte-alignment of instruction template.
220 // We make the constructor private to ensure that only the factory
223 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
224 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
227 // Instruction specific data. This is used to store information like
228 // some of the instruction bits.
230 // Instruction template type.
232 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
233 unsigned int r_type_;
234 // Relocation addend.
235 int32_t reloc_addend_;
238 // Macro for generating code to stub types. One entry per long/short
242 DEF_STUB(long_branch_any_any) \
243 DEF_STUB(long_branch_v4t_arm_thumb) \
244 DEF_STUB(long_branch_thumb_only) \
245 DEF_STUB(long_branch_v4t_thumb_thumb) \
246 DEF_STUB(long_branch_v4t_thumb_arm) \
247 DEF_STUB(short_branch_v4t_thumb_arm) \
248 DEF_STUB(long_branch_any_arm_pic) \
249 DEF_STUB(long_branch_any_thumb_pic) \
250 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
251 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
252 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
253 DEF_STUB(long_branch_thumb_only_pic) \
254 DEF_STUB(a8_veneer_b_cond) \
255 DEF_STUB(a8_veneer_b) \
256 DEF_STUB(a8_veneer_bl) \
257 DEF_STUB(a8_veneer_blx) \
258 DEF_STUB(v4_veneer_bx)
262 #define DEF_STUB(x) arm_stub_##x,
268 // First reloc stub type.
269 arm_stub_reloc_first = arm_stub_long_branch_any_any,
270 // Last reloc stub type.
271 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
273 // First Cortex-A8 stub type.
274 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
275 // Last Cortex-A8 stub type.
276 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
279 arm_stub_type_last = arm_stub_v4_veneer_bx
283 // Stub template class. Templates are meant to be read-only objects.
284 // A stub template for a stub type contains all read-only attributes
285 // common to all stubs of the same type.
290 Stub_template(Stub_type, const Insn_template*, size_t);
298 { return this->type_; }
300 // Return an array of instruction templates.
303 { return this->insns_; }
305 // Return size of template in number of instructions.
308 { return this->insn_count_; }
310 // Return size of template in bytes.
313 { return this->size_; }
315 // Return alignment of the stub template.
318 { return this->alignment_; }
320 // Return whether entry point is in thumb mode.
322 entry_in_thumb_mode() const
323 { return this->entry_in_thumb_mode_; }
325 // Return number of relocations in this template.
328 { return this->relocs_.size(); }
330 // Return index of the I-th instruction with relocation.
332 reloc_insn_index(size_t i) const
334 gold_assert(i < this->relocs_.size());
335 return this->relocs_[i].first;
338 // Return the offset of the I-th instruction with relocation from the
339 // beginning of the stub.
341 reloc_offset(size_t i) const
343 gold_assert(i < this->relocs_.size());
344 return this->relocs_[i].second;
348 // This contains information about an instruction template with a relocation
349 // and its offset from start of stub.
350 typedef std::pair<size_t, section_size_type> Reloc;
352 // A Stub_template may not be copied. We want to share templates as much
354 Stub_template(const Stub_template&);
355 Stub_template& operator=(const Stub_template&);
359 // Points to an array of Insn_templates.
360 const Insn_template* insns_;
361 // Number of Insn_templates in insns_[].
363 // Size of templated instructions in bytes.
365 // Alignment of templated instructions.
367 // Flag to indicate if entry is in thumb mode.
368 bool entry_in_thumb_mode_;
369 // A table of reloc instruction indices and offsets. We can find these by
370 // looking at the instruction templates but we pre-compute and then stash
371 // them here for speed.
372 std::vector<Reloc> relocs_;
376 // A class for code stubs. This is a base class for different type of
377 // stubs used in the ARM target.
383 static const section_offset_type invalid_offset =
384 static_cast<section_offset_type>(-1);
387 Stub(const Stub_template* stub_template)
388 : stub_template_(stub_template), offset_(invalid_offset)
395 // Return the stub template.
397 stub_template() const
398 { return this->stub_template_; }
400 // Return offset of code stub from beginning of its containing stub table.
404 gold_assert(this->offset_ != invalid_offset);
405 return this->offset_;
408 // Set offset of code stub from beginning of its containing stub table.
410 set_offset(section_offset_type offset)
411 { this->offset_ = offset; }
413 // Return the relocation target address of the i-th relocation in the
414 // stub. This must be defined in a child class.
416 reloc_target(size_t i)
417 { return this->do_reloc_target(i); }
419 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
421 write(unsigned char* view, section_size_type view_size, bool big_endian)
422 { this->do_write(view, view_size, big_endian); }
424 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
425 // for the i-th instruction.
427 thumb16_special(size_t i)
428 { return this->do_thumb16_special(i); }
431 // This must be defined in the child class.
433 do_reloc_target(size_t) = 0;
435 // This may be overridden in the child class.
437 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
440 this->do_fixed_endian_write<true>(view, view_size);
442 this->do_fixed_endian_write<false>(view, view_size);
445 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
446 // instruction template.
448 do_thumb16_special(size_t)
449 { gold_unreachable(); }
452 // A template to implement do_write.
453 template<bool big_endian>
455 do_fixed_endian_write(unsigned char*, section_size_type);
458 const Stub_template* stub_template_;
459 // Offset within the section of containing this stub.
460 section_offset_type offset_;
463 // Reloc stub class. These are stubs we use to fix up relocation because
464 // of limited branch ranges.
466 class Reloc_stub : public Stub
469 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
470 // We assume we never jump to this address.
471 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
473 // Return destination address.
475 destination_address() const
477 gold_assert(this->destination_address_ != this->invalid_address);
478 return this->destination_address_;
481 // Set destination address.
483 set_destination_address(Arm_address address)
485 gold_assert(address != this->invalid_address);
486 this->destination_address_ = address;
489 // Reset destination address.
491 reset_destination_address()
492 { this->destination_address_ = this->invalid_address; }
494 // Determine stub type for a branch of a relocation of R_TYPE going
495 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
496 // the branch target is a thumb instruction. TARGET is used for look
497 // up ARM-specific linker settings.
499 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
500 Arm_address branch_target, bool target_is_thumb);
502 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
503 // and an addend. Since we treat global and local symbol differently, we
504 // use a Symbol object for a global symbol and a object-index pair for
509 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
510 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
511 // and R_SYM must not be invalid_index.
512 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
513 unsigned int r_sym, int32_t addend)
514 : stub_type_(stub_type), addend_(addend)
518 this->r_sym_ = Reloc_stub::invalid_index;
519 this->u_.symbol = symbol;
523 gold_assert(relobj != NULL && r_sym != invalid_index);
524 this->r_sym_ = r_sym;
525 this->u_.relobj = relobj;
532 // Accessors: Keys are meant to be read-only object so no modifiers are
538 { return this->stub_type_; }
540 // Return the local symbol index or invalid_index.
543 { return this->r_sym_; }
545 // Return the symbol if there is one.
548 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
550 // Return the relobj if there is one.
553 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
555 // Whether this equals to another key k.
557 eq(const Key& k) const
559 return ((this->stub_type_ == k.stub_type_)
560 && (this->r_sym_ == k.r_sym_)
561 && ((this->r_sym_ != Reloc_stub::invalid_index)
562 ? (this->u_.relobj == k.u_.relobj)
563 : (this->u_.symbol == k.u_.symbol))
564 && (this->addend_ == k.addend_));
567 // Return a hash value.
571 return (this->stub_type_
573 ^ gold::string_hash<char>(
574 (this->r_sym_ != Reloc_stub::invalid_index)
575 ? this->u_.relobj->name().c_str()
576 : this->u_.symbol->name())
580 // Functors for STL associative containers.
584 operator()(const Key& k) const
585 { return k.hash_value(); }
591 operator()(const Key& k1, const Key& k2) const
592 { return k1.eq(k2); }
595 // Name of key. This is mainly for debugging.
601 Stub_type stub_type_;
602 // If this is a local symbol, this is the index in the defining object.
603 // Otherwise, it is invalid_index for a global symbol.
605 // If r_sym_ is an invalid index, this points to a global symbol.
606 // Otherwise, it points to a relobj. We used the unsized and target
607 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
608 // Arm_relobj, in order to avoid making the stub class a template
609 // as most of the stub machinery is endianness-neutral. However, it
610 // may require a bit of casting done by users of this class.
613 const Symbol* symbol;
614 const Relobj* relobj;
616 // Addend associated with a reloc.
621 // Reloc_stubs are created via a stub factory. So these are protected.
622 Reloc_stub(const Stub_template* stub_template)
623 : Stub(stub_template), destination_address_(invalid_address)
629 friend class Stub_factory;
631 // Return the relocation target address of the i-th relocation in the
634 do_reloc_target(size_t i)
636 // All reloc stub have only one relocation.
638 return this->destination_address_;
642 // Address of destination.
643 Arm_address destination_address_;
646 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
647 // THUMB branch that meets the following conditions:
649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
650 // branch address is 0xffe.
651 // 2. The branch target address is in the same page as the first word of the
653 // 3. The branch follows a 32-bit instruction which is not a branch.
655 // To do the fix up, we need to store the address of the branch instruction
656 // and its target at least. We also need to store the original branch
657 // instruction bits for the condition code in a conditional branch. The
658 // condition code is used in a special instruction template. We also want
659 // to identify input sections needing Cortex-A8 workaround quickly. We store
660 // extra information about object and section index of the code section
661 // containing a branch being fixed up. The information is used to mark
662 // the code section when we finalize the Cortex-A8 stubs.
665 class Cortex_a8_stub : public Stub
671 // Return the object of the code section containing the branch being fixed
675 { return this->relobj_; }
677 // Return the section index of the code section containing the branch being
681 { return this->shndx_; }
683 // Return the source address of stub. This is the address of the original
684 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
687 source_address() const
688 { return this->source_address_; }
690 // Return the destination address of the stub. This is the branch taken
691 // address of the original branch instruction. LSB is 1 if it is a THUMB
692 // instruction address.
694 destination_address() const
695 { return this->destination_address_; }
697 // Return the instruction being fixed up.
699 original_insn() const
700 { return this->original_insn_; }
703 // Cortex_a8_stubs are created via a stub factory. So these are protected.
704 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
705 unsigned int shndx, Arm_address source_address,
706 Arm_address destination_address, uint32_t original_insn)
707 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
708 source_address_(source_address | 1U),
709 destination_address_(destination_address),
710 original_insn_(original_insn)
713 friend class Stub_factory;
715 // Return the relocation target address of the i-th relocation in the
718 do_reloc_target(size_t i)
720 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
722 // The conditional branch veneer has two relocations.
724 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
728 // All other Cortex-A8 stubs have only one relocation.
730 return this->destination_address_;
734 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
736 do_thumb16_special(size_t);
739 // Object of the code section containing the branch being fixed up.
741 // Section index of the code section containing the branch begin fixed up.
743 // Source address of original branch.
744 Arm_address source_address_;
745 // Destination address of the original branch.
746 Arm_address destination_address_;
747 // Original branch instruction. This is needed for copying the condition
748 // code from a condition branch to its stub.
749 uint32_t original_insn_;
752 // ARMv4 BX Rx branch relocation stub class.
753 class Arm_v4bx_stub : public Stub
759 // Return the associated register.
762 { return this->reg_; }
765 // Arm V4BX stubs are created via a stub factory. So these are protected.
766 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
767 : Stub(stub_template), reg_(reg)
770 friend class Stub_factory;
772 // Return the relocation target address of the i-th relocation in the
775 do_reloc_target(size_t)
776 { gold_unreachable(); }
778 // This may be overridden in the child class.
780 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
783 this->do_fixed_endian_v4bx_write<true>(view, view_size);
785 this->do_fixed_endian_v4bx_write<false>(view, view_size);
789 // A template to implement do_write.
790 template<bool big_endian>
792 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
794 const Insn_template* insns = this->stub_template()->insns();
795 elfcpp::Swap<32, big_endian>::writeval(view,
797 + (this->reg_ << 16)));
798 view += insns[0].size();
799 elfcpp::Swap<32, big_endian>::writeval(view,
800 (insns[1].data() + this->reg_));
801 view += insns[1].size();
802 elfcpp::Swap<32, big_endian>::writeval(view,
803 (insns[2].data() + this->reg_));
806 // A register index (r0-r14), which is associated with the stub.
810 // Stub factory class.
815 // Return the unique instance of this class.
816 static const Stub_factory&
819 static Stub_factory singleton;
823 // Make a relocation stub.
825 make_reloc_stub(Stub_type stub_type) const
827 gold_assert(stub_type >= arm_stub_reloc_first
828 && stub_type <= arm_stub_reloc_last);
829 return new Reloc_stub(this->stub_templates_[stub_type]);
832 // Make a Cortex-A8 stub.
834 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
835 Arm_address source, Arm_address destination,
836 uint32_t original_insn) const
838 gold_assert(stub_type >= arm_stub_cortex_a8_first
839 && stub_type <= arm_stub_cortex_a8_last);
840 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
841 source, destination, original_insn);
844 // Make an ARM V4BX relocation stub.
845 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
847 make_arm_v4bx_stub(uint32_t reg) const
849 gold_assert(reg < 0xf);
850 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
855 // Constructor and destructor are protected since we only return a single
856 // instance created in Stub_factory::get_instance().
860 // A Stub_factory may not be copied since it is a singleton.
861 Stub_factory(const Stub_factory&);
862 Stub_factory& operator=(Stub_factory&);
864 // Stub templates. These are initialized in the constructor.
865 const Stub_template* stub_templates_[arm_stub_type_last+1];
868 // A class to hold stubs for the ARM target.
870 template<bool big_endian>
871 class Stub_table : public Output_data
874 Stub_table(Arm_input_section<big_endian>* owner)
875 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0),
876 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
877 prev_data_size_(0), prev_addralign_(1)
883 // Owner of this stub table.
884 Arm_input_section<big_endian>*
886 { return this->owner_; }
888 // Whether this stub table is empty.
892 return (this->reloc_stubs_.empty()
893 && this->cortex_a8_stubs_.empty()
894 && this->arm_v4bx_stubs_.empty());
897 // Return the current data size.
899 current_data_size() const
900 { return this->current_data_size_for_child(); }
902 // Add a STUB using KEY. The caller is responsible for avoiding addition
903 // if a STUB with the same key has already been added.
905 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
907 const Stub_template* stub_template = stub->stub_template();
908 gold_assert(stub_template->type() == key.stub_type());
909 this->reloc_stubs_[key] = stub;
911 // Assign stub offset early. We can do this because we never remove
912 // reloc stubs and they are in the beginning of the stub table.
913 uint64_t align = stub_template->alignment();
914 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align);
915 stub->set_offset(this->reloc_stubs_size_);
916 this->reloc_stubs_size_ += stub_template->size();
917 this->reloc_stubs_addralign_ =
918 std::max(this->reloc_stubs_addralign_, align);
921 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
922 // The caller is responsible for avoiding addition if a STUB with the same
923 // address has already been added.
925 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
927 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
928 this->cortex_a8_stubs_.insert(value);
931 // Add an ARM V4BX relocation stub. A register index will be retrieved
934 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
936 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
937 this->arm_v4bx_stubs_[stub->reg()] = stub;
940 // Remove all Cortex-A8 stubs.
942 remove_all_cortex_a8_stubs();
944 // Look up a relocation stub using KEY. Return NULL if there is none.
946 find_reloc_stub(const Reloc_stub::Key& key) const
948 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
949 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
952 // Look up an arm v4bx relocation stub using the register index.
953 // Return NULL if there is none.
955 find_arm_v4bx_stub(const uint32_t reg) const
957 gold_assert(reg < 0xf);
958 return this->arm_v4bx_stubs_[reg];
961 // Relocate stubs in this stub table.
963 relocate_stubs(const Relocate_info<32, big_endian>*,
964 Target_arm<big_endian>*, Output_section*,
965 unsigned char*, Arm_address, section_size_type);
967 // Update data size and alignment at the end of a relaxation pass. Return
968 // true if either data size or alignment is different from that of the
969 // previous relaxation pass.
971 update_data_size_and_addralign();
973 // Finalize stubs. Set the offsets of all stubs and mark input sections
974 // needing the Cortex-A8 workaround.
978 // Apply Cortex-A8 workaround to an address range.
980 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
981 unsigned char*, Arm_address,
985 // Write out section contents.
987 do_write(Output_file*);
989 // Return the required alignment.
992 { return this->prev_addralign_; }
994 // Reset address and file offset.
996 do_reset_address_and_file_offset()
997 { this->set_current_data_size_for_child(this->prev_data_size_); }
999 // Set final data size.
1001 set_final_data_size()
1002 { this->set_data_size(this->current_data_size()); }
1005 // Relocate one stub.
1007 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
1008 Target_arm<big_endian>*, Output_section*,
1009 unsigned char*, Arm_address, section_size_type);
1011 // Unordered map of relocation stubs.
1013 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
1014 Reloc_stub::Key::equal_to>
1017 // List of Cortex-A8 stubs ordered by addresses of branches being
1018 // fixed up in output.
1019 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1020 // List of Arm V4BX relocation stubs ordered by associated registers.
1021 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1023 // Owner of this stub table.
1024 Arm_input_section<big_endian>* owner_;
1025 // The relocation stubs.
1026 Reloc_stub_map reloc_stubs_;
1027 // Size of reloc stubs.
1028 off_t reloc_stubs_size_;
1029 // Maximum address alignment of reloc stubs.
1030 uint64_t reloc_stubs_addralign_;
1031 // The cortex_a8_stubs.
1032 Cortex_a8_stub_list cortex_a8_stubs_;
1033 // The Arm V4BX relocation stubs.
1034 Arm_v4bx_stub_list arm_v4bx_stubs_;
1035 // data size of this in the previous pass.
1036 off_t prev_data_size_;
1037 // address alignment of this in the previous pass.
1038 uint64_t prev_addralign_;
1041 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1042 // we add to the end of an EXIDX input section that goes into the output.
1044 class Arm_exidx_cantunwind : public Output_section_data
1047 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1048 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1051 // Return the object containing the section pointed by this.
1054 { return this->relobj_; }
1056 // Return the section index of the section pointed by this.
1059 { return this->shndx_; }
1063 do_write(Output_file* of)
1065 if (parameters->target().is_big_endian())
1066 this->do_fixed_endian_write<true>(of);
1068 this->do_fixed_endian_write<false>(of);
1071 // Write to a map file.
1073 do_print_to_mapfile(Mapfile* mapfile) const
1074 { mapfile->print_output_data(this, _("** ARM cantunwind")); }
1077 // Implement do_write for a given endianness.
1078 template<bool big_endian>
1080 do_fixed_endian_write(Output_file*);
1082 // The object containing the section pointed by this.
1084 // The section index of the section pointed by this.
1085 unsigned int shndx_;
1088 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1089 // Offset map is used to map input section offset within the EXIDX section
1090 // to the output offset from the start of this EXIDX section.
1092 typedef std::map<section_offset_type, section_offset_type>
1093 Arm_exidx_section_offset_map;
1095 // Arm_exidx_merged_section class. This represents an EXIDX input section
1096 // with some of its entries merged.
1098 class Arm_exidx_merged_section : public Output_relaxed_input_section
1101 // Constructor for Arm_exidx_merged_section.
1102 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1103 // SECTION_OFFSET_MAP points to a section offset map describing how
1104 // parts of the input section are mapped to output. DELETED_BYTES is
1105 // the number of bytes deleted from the EXIDX input section.
1106 Arm_exidx_merged_section(
1107 const Arm_exidx_input_section& exidx_input_section,
1108 const Arm_exidx_section_offset_map& section_offset_map,
1109 uint32_t deleted_bytes);
1111 // Build output contents.
1113 build_contents(const unsigned char*, section_size_type);
1115 // Return the original EXIDX input section.
1116 const Arm_exidx_input_section&
1117 exidx_input_section() const
1118 { return this->exidx_input_section_; }
1120 // Return the section offset map.
1121 const Arm_exidx_section_offset_map&
1122 section_offset_map() const
1123 { return this->section_offset_map_; }
1126 // Write merged section into file OF.
1128 do_write(Output_file* of);
1131 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1132 section_offset_type*) const;
1135 // Original EXIDX input section.
1136 const Arm_exidx_input_section& exidx_input_section_;
1137 // Section offset map.
1138 const Arm_exidx_section_offset_map& section_offset_map_;
1139 // Merged section contents. We need to keep build the merged section
1140 // and save it here to avoid accessing the original EXIDX section when
1141 // we cannot lock the sections' object.
1142 unsigned char* section_contents_;
1145 // A class to wrap an ordinary input section containing executable code.
1147 template<bool big_endian>
1148 class Arm_input_section : public Output_relaxed_input_section
1151 Arm_input_section(Relobj* relobj, unsigned int shndx)
1152 : Output_relaxed_input_section(relobj, shndx, 1),
1153 original_addralign_(1), original_size_(0), stub_table_(NULL),
1154 original_contents_(NULL)
1157 ~Arm_input_section()
1158 { delete[] this->original_contents_; }
1164 // Whether this is a stub table owner.
1166 is_stub_table_owner() const
1167 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1169 // Return the stub table.
1170 Stub_table<big_endian>*
1172 { return this->stub_table_; }
1174 // Set the stub_table.
1176 set_stub_table(Stub_table<big_endian>* stub_table)
1177 { this->stub_table_ = stub_table; }
1179 // Downcast a base pointer to an Arm_input_section pointer. This is
1180 // not type-safe but we only use Arm_input_section not the base class.
1181 static Arm_input_section<big_endian>*
1182 as_arm_input_section(Output_relaxed_input_section* poris)
1183 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1185 // Return the original size of the section.
1187 original_size() const
1188 { return this->original_size_; }
1191 // Write data to output file.
1193 do_write(Output_file*);
1195 // Return required alignment of this.
1197 do_addralign() const
1199 if (this->is_stub_table_owner())
1200 return std::max(this->stub_table_->addralign(),
1201 static_cast<uint64_t>(this->original_addralign_));
1203 return this->original_addralign_;
1206 // Finalize data size.
1208 set_final_data_size();
1210 // Reset address and file offset.
1212 do_reset_address_and_file_offset();
1216 do_output_offset(const Relobj* object, unsigned int shndx,
1217 section_offset_type offset,
1218 section_offset_type* poutput) const
1220 if ((object == this->relobj())
1221 && (shndx == this->shndx())
1224 convert_types<section_offset_type, uint32_t>(this->original_size_)))
1234 // Copying is not allowed.
1235 Arm_input_section(const Arm_input_section&);
1236 Arm_input_section& operator=(const Arm_input_section&);
1238 // Address alignment of the original input section.
1239 uint32_t original_addralign_;
1240 // Section size of the original input section.
1241 uint32_t original_size_;
1243 Stub_table<big_endian>* stub_table_;
1244 // Original section contents. We have to make a copy here since the file
1245 // containing the original section may not be locked when we need to access
1247 unsigned char* original_contents_;
1250 // Arm_exidx_fixup class. This is used to define a number of methods
1251 // and keep states for fixing up EXIDX coverage.
1253 class Arm_exidx_fixup
1256 Arm_exidx_fixup(Output_section* exidx_output_section,
1257 bool merge_exidx_entries = true)
1258 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1259 last_inlined_entry_(0), last_input_section_(NULL),
1260 section_offset_map_(NULL), first_output_text_section_(NULL),
1261 merge_exidx_entries_(merge_exidx_entries)
1265 { delete this->section_offset_map_; }
1267 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1268 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1269 // number of bytes to be deleted in output. If parts of the input EXIDX
1270 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1271 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1272 // responsible for releasing it.
1273 template<bool big_endian>
1275 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1276 const unsigned char* section_contents,
1277 section_size_type section_size,
1278 Arm_exidx_section_offset_map** psection_offset_map);
1280 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1281 // input section, if there is not one already.
1283 add_exidx_cantunwind_as_needed();
1285 // Return the output section for the text section which is linked to the
1286 // first exidx input in output.
1288 first_output_text_section() const
1289 { return this->first_output_text_section_; }
1292 // Copying is not allowed.
1293 Arm_exidx_fixup(const Arm_exidx_fixup&);
1294 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1296 // Type of EXIDX unwind entry.
1301 // EXIDX_CANTUNWIND.
1302 UT_EXIDX_CANTUNWIND,
1309 // Process an EXIDX entry. We only care about the second word of the
1310 // entry. Return true if the entry can be deleted.
1312 process_exidx_entry(uint32_t second_word);
1314 // Update the current section offset map during EXIDX section fix-up.
1315 // If there is no map, create one. INPUT_OFFSET is the offset of a
1316 // reference point, DELETED_BYTES is the number of deleted by in the
1317 // section so far. If DELETE_ENTRY is true, the reference point and
1318 // all offsets after the previous reference point are discarded.
1320 update_offset_map(section_offset_type input_offset,
1321 section_size_type deleted_bytes, bool delete_entry);
1323 // EXIDX output section.
1324 Output_section* exidx_output_section_;
1325 // Unwind type of the last EXIDX entry processed.
1326 Unwind_type last_unwind_type_;
1327 // Last seen inlined EXIDX entry.
1328 uint32_t last_inlined_entry_;
1329 // Last processed EXIDX input section.
1330 const Arm_exidx_input_section* last_input_section_;
1331 // Section offset map created in process_exidx_section.
1332 Arm_exidx_section_offset_map* section_offset_map_;
1333 // Output section for the text section which is linked to the first exidx
1335 Output_section* first_output_text_section_;
1337 bool merge_exidx_entries_;
1340 // Arm output section class. This is defined mainly to add a number of
1341 // stub generation methods.
1343 template<bool big_endian>
1344 class Arm_output_section : public Output_section
1347 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1349 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1350 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1351 elfcpp::Elf_Xword flags)
1352 : Output_section(name, type,
1353 (type == elfcpp::SHT_ARM_EXIDX
1354 ? flags | elfcpp::SHF_LINK_ORDER
1357 if (type == elfcpp::SHT_ARM_EXIDX)
1358 this->set_always_keeps_input_sections();
1361 ~Arm_output_section()
1364 // Group input sections for stub generation.
1366 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*);
1368 // Downcast a base pointer to an Arm_output_section pointer. This is
1369 // not type-safe but we only use Arm_output_section not the base class.
1370 static Arm_output_section<big_endian>*
1371 as_arm_output_section(Output_section* os)
1372 { return static_cast<Arm_output_section<big_endian>*>(os); }
1374 // Append all input text sections in this into LIST.
1376 append_text_sections_to_list(Text_section_list* list);
1378 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1379 // is a list of text input sections sorted in ascending order of their
1380 // output addresses.
1382 fix_exidx_coverage(Layout* layout,
1383 const Text_section_list& sorted_text_section,
1384 Symbol_table* symtab,
1385 bool merge_exidx_entries,
1388 // Link an EXIDX section into its corresponding text section.
1390 set_exidx_section_link();
1394 typedef Output_section::Input_section Input_section;
1395 typedef Output_section::Input_section_list Input_section_list;
1397 // Create a stub group.
1398 void create_stub_group(Input_section_list::const_iterator,
1399 Input_section_list::const_iterator,
1400 Input_section_list::const_iterator,
1401 Target_arm<big_endian>*,
1402 std::vector<Output_relaxed_input_section*>*,
1406 // Arm_exidx_input_section class. This represents an EXIDX input section.
1408 class Arm_exidx_input_section
1411 static const section_offset_type invalid_offset =
1412 static_cast<section_offset_type>(-1);
1414 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1415 unsigned int link, uint32_t size,
1416 uint32_t addralign, uint32_t text_size)
1417 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1418 addralign_(addralign), text_size_(text_size), has_errors_(false)
1421 ~Arm_exidx_input_section()
1424 // Accessors: This is a read-only class.
1426 // Return the object containing this EXIDX input section.
1429 { return this->relobj_; }
1431 // Return the section index of this EXIDX input section.
1434 { return this->shndx_; }
1436 // Return the section index of linked text section in the same object.
1439 { return this->link_; }
1441 // Return size of the EXIDX input section.
1444 { return this->size_; }
1446 // Return address alignment of EXIDX input section.
1449 { return this->addralign_; }
1451 // Return size of the associated text input section.
1454 { return this->text_size_; }
1456 // Whether there are any errors in the EXIDX input section.
1459 { return this->has_errors_; }
1461 // Set has-errors flag.
1464 { this->has_errors_ = true; }
1467 // Object containing this.
1469 // Section index of this.
1470 unsigned int shndx_;
1471 // text section linked to this in the same object.
1473 // Size of this. For ARM 32-bit is sufficient.
1475 // Address alignment of this. For ARM 32-bit is sufficient.
1476 uint32_t addralign_;
1477 // Size of associated text section.
1478 uint32_t text_size_;
1479 // Whether this has any errors.
1483 // Arm_relobj class.
1485 template<bool big_endian>
1486 class Arm_relobj : public Sized_relobj_file<32, big_endian>
1489 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1491 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1492 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1493 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr),
1494 stub_tables_(), local_symbol_is_thumb_function_(),
1495 attributes_section_data_(NULL), mapping_symbols_info_(),
1496 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1497 output_local_symbol_count_needs_update_(false),
1498 merge_flags_and_attributes_(true)
1502 { delete this->attributes_section_data_; }
1504 // Return the stub table of the SHNDX-th section if there is one.
1505 Stub_table<big_endian>*
1506 stub_table(unsigned int shndx) const
1508 gold_assert(shndx < this->stub_tables_.size());
1509 return this->stub_tables_[shndx];
1512 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1514 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1516 gold_assert(shndx < this->stub_tables_.size());
1517 this->stub_tables_[shndx] = stub_table;
1520 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1521 // index. This is only valid after do_count_local_symbol is called.
1523 local_symbol_is_thumb_function(unsigned int r_sym) const
1525 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1526 return this->local_symbol_is_thumb_function_[r_sym];
1529 // Scan all relocation sections for stub generation.
1531 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1534 // Convert regular input section with index SHNDX to a relaxed section.
1536 convert_input_section_to_relaxed_section(unsigned shndx)
1538 // The stubs have relocations and we need to process them after writing
1539 // out the stubs. So relocation now must follow section write.
1540 this->set_section_offset(shndx, -1ULL);
1541 this->set_relocs_must_follow_section_writes();
1544 // Downcast a base pointer to an Arm_relobj pointer. This is
1545 // not type-safe but we only use Arm_relobj not the base class.
1546 static Arm_relobj<big_endian>*
1547 as_arm_relobj(Relobj* relobj)
1548 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1550 // Processor-specific flags in ELF file header. This is valid only after
1553 processor_specific_flags() const
1554 { return this->processor_specific_flags_; }
1556 // Attribute section data This is the contents of the .ARM.attribute section
1558 const Attributes_section_data*
1559 attributes_section_data() const
1560 { return this->attributes_section_data_; }
1562 // Mapping symbol location.
1563 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1565 // Functor for STL container.
1566 struct Mapping_symbol_position_less
1569 operator()(const Mapping_symbol_position& p1,
1570 const Mapping_symbol_position& p2) const
1572 return (p1.first < p2.first
1573 || (p1.first == p2.first && p1.second < p2.second));
1577 // We only care about the first character of a mapping symbol, so
1578 // we only store that instead of the whole symbol name.
1579 typedef std::map<Mapping_symbol_position, char,
1580 Mapping_symbol_position_less> Mapping_symbols_info;
1582 // Whether a section contains any Cortex-A8 workaround.
1584 section_has_cortex_a8_workaround(unsigned int shndx) const
1586 return (this->section_has_cortex_a8_workaround_ != NULL
1587 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1590 // Mark a section that has Cortex-A8 workaround.
1592 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1594 if (this->section_has_cortex_a8_workaround_ == NULL)
1595 this->section_has_cortex_a8_workaround_ =
1596 new std::vector<bool>(this->shnum(), false);
1597 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1600 // Return the EXIDX section of an text section with index SHNDX or NULL
1601 // if the text section has no associated EXIDX section.
1602 const Arm_exidx_input_section*
1603 exidx_input_section_by_link(unsigned int shndx) const
1605 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1606 return ((p != this->exidx_section_map_.end()
1607 && p->second->link() == shndx)
1612 // Return the EXIDX section with index SHNDX or NULL if there is none.
1613 const Arm_exidx_input_section*
1614 exidx_input_section_by_shndx(unsigned shndx) const
1616 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1617 return ((p != this->exidx_section_map_.end()
1618 && p->second->shndx() == shndx)
1623 // Whether output local symbol count needs updating.
1625 output_local_symbol_count_needs_update() const
1626 { return this->output_local_symbol_count_needs_update_; }
1628 // Set output_local_symbol_count_needs_update flag to be true.
1630 set_output_local_symbol_count_needs_update()
1631 { this->output_local_symbol_count_needs_update_ = true; }
1633 // Update output local symbol count at the end of relaxation.
1635 update_output_local_symbol_count();
1637 // Whether we want to merge processor-specific flags and attributes.
1639 merge_flags_and_attributes() const
1640 { return this->merge_flags_and_attributes_; }
1642 // Export list of EXIDX section indices.
1644 get_exidx_shndx_list(std::vector<unsigned int>* list) const
1647 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin();
1648 p != this->exidx_section_map_.end();
1651 if (p->second->shndx() == p->first)
1652 list->push_back(p->first);
1654 // Sort list to make result independent of implementation of map.
1655 std::sort(list->begin(), list->end());
1659 // Post constructor setup.
1663 // Call parent's setup method.
1664 Sized_relobj_file<32, big_endian>::do_setup();
1666 // Initialize look-up tables.
1667 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1668 this->stub_tables_.swap(empty_stub_table_list);
1671 // Count the local symbols.
1673 do_count_local_symbols(Stringpool_template<char>*,
1674 Stringpool_template<char>*);
1677 do_relocate_sections(
1678 const Symbol_table* symtab, const Layout* layout,
1679 const unsigned char* pshdrs, Output_file* of,
1680 typename Sized_relobj_file<32, big_endian>::Views* pivews);
1682 // Read the symbol information.
1684 do_read_symbols(Read_symbols_data* sd);
1686 // Process relocs for garbage collection.
1688 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1692 // Whether a section needs to be scanned for relocation stubs.
1694 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1695 const Relobj::Output_sections&,
1696 const Symbol_table*, const unsigned char*);
1698 // Whether a section is a scannable text section.
1700 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1701 const Output_section*, const Symbol_table*);
1703 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1705 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1706 unsigned int, Output_section*,
1707 const Symbol_table*);
1709 // Scan a section for the Cortex-A8 erratum.
1711 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1712 unsigned int, Output_section*,
1713 Target_arm<big_endian>*);
1715 // Find the linked text section of an EXIDX section by looking at the
1716 // first relocation of the EXIDX section. PSHDR points to the section
1717 // headers of a relocation section and PSYMS points to the local symbols.
1718 // PSHNDX points to a location storing the text section index if found.
1719 // Return whether we can find the linked section.
1721 find_linked_text_section(const unsigned char* pshdr,
1722 const unsigned char* psyms, unsigned int* pshndx);
1725 // Make a new Arm_exidx_input_section object for EXIDX section with
1726 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1727 // index of the linked text section.
1729 make_exidx_input_section(unsigned int shndx,
1730 const elfcpp::Shdr<32, big_endian>& shdr,
1731 unsigned int text_shndx,
1732 const elfcpp::Shdr<32, big_endian>& text_shdr);
1734 // Return the output address of either a plain input section or a
1735 // relaxed input section. SHNDX is the section index.
1737 simple_input_section_output_address(unsigned int, Output_section*);
1739 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1740 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1743 // List of stub tables.
1744 Stub_table_list stub_tables_;
1745 // Bit vector to tell if a local symbol is a thumb function or not.
1746 // This is only valid after do_count_local_symbol is called.
1747 std::vector<bool> local_symbol_is_thumb_function_;
1748 // processor-specific flags in ELF file header.
1749 elfcpp::Elf_Word processor_specific_flags_;
1750 // Object attributes if there is an .ARM.attributes section or NULL.
1751 Attributes_section_data* attributes_section_data_;
1752 // Mapping symbols information.
1753 Mapping_symbols_info mapping_symbols_info_;
1754 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1755 std::vector<bool>* section_has_cortex_a8_workaround_;
1756 // Map a text section to its associated .ARM.exidx section, if there is one.
1757 Exidx_section_map exidx_section_map_;
1758 // Whether output local symbol count needs updating.
1759 bool output_local_symbol_count_needs_update_;
1760 // Whether we merge processor flags and attributes of this object to
1762 bool merge_flags_and_attributes_;
1765 // Arm_dynobj class.
1767 template<bool big_endian>
1768 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1771 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1772 const elfcpp::Ehdr<32, big_endian>& ehdr)
1773 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1774 processor_specific_flags_(0), attributes_section_data_(NULL)
1778 { delete this->attributes_section_data_; }
1780 // Downcast a base pointer to an Arm_relobj pointer. This is
1781 // not type-safe but we only use Arm_relobj not the base class.
1782 static Arm_dynobj<big_endian>*
1783 as_arm_dynobj(Dynobj* dynobj)
1784 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1786 // Processor-specific flags in ELF file header. This is valid only after
1789 processor_specific_flags() const
1790 { return this->processor_specific_flags_; }
1792 // Attributes section data.
1793 const Attributes_section_data*
1794 attributes_section_data() const
1795 { return this->attributes_section_data_; }
1798 // Read the symbol information.
1800 do_read_symbols(Read_symbols_data* sd);
1803 // processor-specific flags in ELF file header.
1804 elfcpp::Elf_Word processor_specific_flags_;
1805 // Object attributes if there is an .ARM.attributes section or NULL.
1806 Attributes_section_data* attributes_section_data_;
1809 // Functor to read reloc addends during stub generation.
1811 template<int sh_type, bool big_endian>
1812 struct Stub_addend_reader
1814 // Return the addend for a relocation of a particular type. Depending
1815 // on whether this is a REL or RELA relocation, read the addend from a
1816 // view or from a Reloc object.
1817 elfcpp::Elf_types<32>::Elf_Swxword
1819 unsigned int /* r_type */,
1820 const unsigned char* /* view */,
1821 const typename Reloc_types<sh_type,
1822 32, big_endian>::Reloc& /* reloc */) const;
1825 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1827 template<bool big_endian>
1828 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1830 elfcpp::Elf_types<32>::Elf_Swxword
1833 const unsigned char*,
1834 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1837 // Specialized Stub_addend_reader for RELA type relocation sections.
1838 // We currently do not handle RELA type relocation sections but it is trivial
1839 // to implement the addend reader. This is provided for completeness and to
1840 // make it easier to add support for RELA relocation sections in the future.
1842 template<bool big_endian>
1843 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1845 elfcpp::Elf_types<32>::Elf_Swxword
1848 const unsigned char*,
1849 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1850 big_endian>::Reloc& reloc) const
1851 { return reloc.get_r_addend(); }
1854 // Cortex_a8_reloc class. We keep record of relocation that may need
1855 // the Cortex-A8 erratum workaround.
1857 class Cortex_a8_reloc
1860 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1861 Arm_address destination)
1862 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1868 // Accessors: This is a read-only class.
1870 // Return the relocation stub associated with this relocation if there is
1874 { return this->reloc_stub_; }
1876 // Return the relocation type.
1879 { return this->r_type_; }
1881 // Return the destination address of the relocation. LSB stores the THUMB
1885 { return this->destination_; }
1888 // Associated relocation stub if there is one, or NULL.
1889 const Reloc_stub* reloc_stub_;
1891 unsigned int r_type_;
1892 // Destination address of this relocation. LSB is used to distinguish
1894 Arm_address destination_;
1897 // Arm_output_data_got class. We derive this from Output_data_got to add
1898 // extra methods to handle TLS relocations in a static link.
1900 template<bool big_endian>
1901 class Arm_output_data_got : public Output_data_got<32, big_endian>
1904 Arm_output_data_got(Symbol_table* symtab, Layout* layout)
1905 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout)
1908 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1909 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1910 // applied in a static link.
1912 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1913 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); }
1915 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1916 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1917 // relocation that needs to be applied in a static link.
1919 add_static_reloc(unsigned int got_offset, unsigned int r_type,
1920 Sized_relobj_file<32, big_endian>* relobj,
1923 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj,
1927 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1928 // The first one is initialized to be 1, which is the module index for
1929 // the main executable and the second one 0. A reloc of the type
1930 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1931 // be applied by gold. GSYM is a global symbol.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym);
1935 // Same as the above but for a local symbol in OBJECT with INDEX.
1937 add_tls_gd32_with_static_reloc(unsigned int got_type,
1938 Sized_relobj_file<32, big_endian>* object,
1939 unsigned int index);
1942 // Write out the GOT table.
1944 do_write(Output_file*);
1947 // This class represent dynamic relocations that need to be applied by
1948 // gold because we are using TLS relocations in a static link.
1952 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1953 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true)
1954 { this->u_.global.symbol = gsym; }
1956 Static_reloc(unsigned int got_offset, unsigned int r_type,
1957 Sized_relobj_file<32, big_endian>* relobj, unsigned int index)
1958 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false)
1960 this->u_.local.relobj = relobj;
1961 this->u_.local.index = index;
1964 // Return the GOT offset.
1967 { return this->got_offset_; }
1972 { return this->r_type_; }
1974 // Whether the symbol is global or not.
1976 symbol_is_global() const
1977 { return this->symbol_is_global_; }
1979 // For a relocation against a global symbol, the global symbol.
1983 gold_assert(this->symbol_is_global_);
1984 return this->u_.global.symbol;
1987 // For a relocation against a local symbol, the defining object.
1988 Sized_relobj_file<32, big_endian>*
1991 gold_assert(!this->symbol_is_global_);
1992 return this->u_.local.relobj;
1995 // For a relocation against a local symbol, the local symbol index.
1999 gold_assert(!this->symbol_is_global_);
2000 return this->u_.local.index;
2004 // GOT offset of the entry to which this relocation is applied.
2005 unsigned int got_offset_;
2006 // Type of relocation.
2007 unsigned int r_type_;
2008 // Whether this relocation is against a global symbol.
2009 bool symbol_is_global_;
2010 // A global or local symbol.
2015 // For a global symbol, the symbol itself.
2020 // For a local symbol, the object defining object.
2021 Sized_relobj_file<32, big_endian>* relobj;
2022 // For a local symbol, the symbol index.
2028 // Symbol table of the output object.
2029 Symbol_table* symbol_table_;
2030 // Layout of the output object.
2032 // Static relocs to be applied to the GOT.
2033 std::vector<Static_reloc> static_relocs_;
2036 // The ARM target has many relocation types with odd-sizes or noncontiguous
2037 // bits. The default handling of relocatable relocation cannot process these
2038 // relocations. So we have to extend the default code.
2040 template<bool big_endian, int sh_type, typename Classify_reloc>
2041 class Arm_scan_relocatable_relocs :
2042 public Default_scan_relocatable_relocs<sh_type, Classify_reloc>
2045 // Return the strategy to use for a local symbol which is a section
2046 // symbol, given the relocation type.
2047 inline Relocatable_relocs::Reloc_strategy
2048 local_section_strategy(unsigned int r_type, Relobj*)
2050 if (sh_type == elfcpp::SHT_RELA)
2051 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA;
2054 if (r_type == elfcpp::R_ARM_TARGET1
2055 || r_type == elfcpp::R_ARM_TARGET2)
2057 const Target_arm<big_endian>* arm_target =
2058 Target_arm<big_endian>::default_target();
2059 r_type = arm_target->get_real_reloc_type(r_type);
2064 // Relocations that write nothing. These exclude R_ARM_TARGET1
2065 // and R_ARM_TARGET2.
2066 case elfcpp::R_ARM_NONE:
2067 case elfcpp::R_ARM_V4BX:
2068 case elfcpp::R_ARM_TLS_GOTDESC:
2069 case elfcpp::R_ARM_TLS_CALL:
2070 case elfcpp::R_ARM_TLS_DESCSEQ:
2071 case elfcpp::R_ARM_THM_TLS_CALL:
2072 case elfcpp::R_ARM_GOTRELAX:
2073 case elfcpp::R_ARM_GNU_VTENTRY:
2074 case elfcpp::R_ARM_GNU_VTINHERIT:
2075 case elfcpp::R_ARM_THM_TLS_DESCSEQ16:
2076 case elfcpp::R_ARM_THM_TLS_DESCSEQ32:
2077 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0;
2078 // These should have been converted to something else above.
2079 case elfcpp::R_ARM_TARGET1:
2080 case elfcpp::R_ARM_TARGET2:
2082 // Relocations that write full 32 bits and
2083 // have alignment of 1.
2084 case elfcpp::R_ARM_ABS32:
2085 case elfcpp::R_ARM_REL32:
2086 case elfcpp::R_ARM_SBREL32:
2087 case elfcpp::R_ARM_GOTOFF32:
2088 case elfcpp::R_ARM_BASE_PREL:
2089 case elfcpp::R_ARM_GOT_BREL:
2090 case elfcpp::R_ARM_BASE_ABS:
2091 case elfcpp::R_ARM_ABS32_NOI:
2092 case elfcpp::R_ARM_REL32_NOI:
2093 case elfcpp::R_ARM_PLT32_ABS:
2094 case elfcpp::R_ARM_GOT_ABS:
2095 case elfcpp::R_ARM_GOT_PREL:
2096 case elfcpp::R_ARM_TLS_GD32:
2097 case elfcpp::R_ARM_TLS_LDM32:
2098 case elfcpp::R_ARM_TLS_LDO32:
2099 case elfcpp::R_ARM_TLS_IE32:
2100 case elfcpp::R_ARM_TLS_LE32:
2101 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED;
2103 // For all other static relocations, return RELOC_SPECIAL.
2104 return Relocatable_relocs::RELOC_SPECIAL;
2110 template<bool big_endian>
2111 class Target_arm : public Sized_target<32, big_endian>
2114 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
2117 // When were are relocating a stub, we pass this as the relocation number.
2118 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
2120 Target_arm(const Target::Target_info* info = &arm_info)
2121 : Sized_target<32, big_endian>(info),
2122 got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL),
2123 rel_dyn_(NULL), rel_irelative_(NULL), copy_relocs_(elfcpp::R_ARM_COPY),
2124 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2125 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2126 should_force_pic_veneer_(false),
2127 arm_input_section_map_(), attributes_section_data_(NULL),
2128 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2131 // Whether we force PCI branch veneers.
2133 should_force_pic_veneer() const
2134 { return this->should_force_pic_veneer_; }
2136 // Set PIC veneer flag.
2138 set_should_force_pic_veneer(bool value)
2139 { this->should_force_pic_veneer_ = value; }
2141 // Whether we use THUMB-2 instructions.
2143 using_thumb2() const
2145 Object_attribute* attr =
2146 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2147 int arch = attr->int_value();
2148 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
2151 // Whether we use THUMB/THUMB-2 instructions only.
2153 using_thumb_only() const
2155 Object_attribute* attr =
2156 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2158 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2159 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M)
2161 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
2162 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
2164 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
2165 return attr->int_value() == 'M';
2168 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2170 may_use_arm_nop() const
2172 Object_attribute* attr =
2173 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2174 int arch = attr->int_value();
2175 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2176 || arch == elfcpp::TAG_CPU_ARCH_V6K
2177 || arch == elfcpp::TAG_CPU_ARCH_V7
2178 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2181 // Whether we have THUMB-2 NOP.W instruction.
2183 may_use_thumb2_nop() const
2185 Object_attribute* attr =
2186 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2187 int arch = attr->int_value();
2188 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2189 || arch == elfcpp::TAG_CPU_ARCH_V7
2190 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2193 // Whether we have v4T interworking instructions available.
2195 may_use_v4t_interworking() const
2197 Object_attribute* attr =
2198 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2199 int arch = attr->int_value();
2200 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2201 && arch != elfcpp::TAG_CPU_ARCH_V4);
2204 // Whether we have v5T interworking instructions available.
2206 may_use_v5t_interworking() const
2208 Object_attribute* attr =
2209 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2210 int arch = attr->int_value();
2211 if (parameters->options().fix_arm1176())
2212 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2213 || arch == elfcpp::TAG_CPU_ARCH_V7
2214 || arch == elfcpp::TAG_CPU_ARCH_V6_M
2215 || arch == elfcpp::TAG_CPU_ARCH_V6S_M
2216 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2218 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2219 && arch != elfcpp::TAG_CPU_ARCH_V4
2220 && arch != elfcpp::TAG_CPU_ARCH_V4T);
2223 // Process the relocations to determine unreferenced sections for
2224 // garbage collection.
2226 gc_process_relocs(Symbol_table* symtab,
2228 Sized_relobj_file<32, big_endian>* object,
2229 unsigned int data_shndx,
2230 unsigned int sh_type,
2231 const unsigned char* prelocs,
2233 Output_section* output_section,
2234 bool needs_special_offset_handling,
2235 size_t local_symbol_count,
2236 const unsigned char* plocal_symbols);
2238 // Scan the relocations to look for symbol adjustments.
2240 scan_relocs(Symbol_table* symtab,
2242 Sized_relobj_file<32, big_endian>* object,
2243 unsigned int data_shndx,
2244 unsigned int sh_type,
2245 const unsigned char* prelocs,
2247 Output_section* output_section,
2248 bool needs_special_offset_handling,
2249 size_t local_symbol_count,
2250 const unsigned char* plocal_symbols);
2252 // Finalize the sections.
2254 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
2256 // Return the value to use for a dynamic symbol which requires special
2259 do_dynsym_value(const Symbol*) const;
2261 // Return the plt address for globals. Since we have irelative plt entries,
2262 // address calculation is not as straightforward as plt_address + plt_offset.
2264 do_plt_address_for_global(const Symbol* gsym) const
2265 { return this->plt_section()->address_for_global(gsym); }
2267 // Return the plt address for locals. Since we have irelative plt entries,
2268 // address calculation is not as straightforward as plt_address + plt_offset.
2270 do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const
2271 { return this->plt_section()->address_for_local(relobj, symndx); }
2273 // Relocate a section.
2275 relocate_section(const Relocate_info<32, big_endian>*,
2276 unsigned int sh_type,
2277 const unsigned char* prelocs,
2279 Output_section* output_section,
2280 bool needs_special_offset_handling,
2281 unsigned char* view,
2282 Arm_address view_address,
2283 section_size_type view_size,
2284 const Reloc_symbol_changes*);
2286 // Scan the relocs during a relocatable link.
2288 scan_relocatable_relocs(Symbol_table* symtab,
2290 Sized_relobj_file<32, big_endian>* object,
2291 unsigned int data_shndx,
2292 unsigned int sh_type,
2293 const unsigned char* prelocs,
2295 Output_section* output_section,
2296 bool needs_special_offset_handling,
2297 size_t local_symbol_count,
2298 const unsigned char* plocal_symbols,
2299 Relocatable_relocs*);
2301 // Emit relocations for a section.
2303 relocate_relocs(const Relocate_info<32, big_endian>*,
2304 unsigned int sh_type,
2305 const unsigned char* prelocs,
2307 Output_section* output_section,
2308 typename elfcpp::Elf_types<32>::Elf_Off
2309 offset_in_output_section,
2310 const Relocatable_relocs*,
2311 unsigned char* view,
2312 Arm_address view_address,
2313 section_size_type view_size,
2314 unsigned char* reloc_view,
2315 section_size_type reloc_view_size);
2317 // Perform target-specific processing in a relocatable link. This is
2318 // only used if we use the relocation strategy RELOC_SPECIAL.
2320 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo,
2321 unsigned int sh_type,
2322 const unsigned char* preloc_in,
2324 Output_section* output_section,
2325 typename elfcpp::Elf_types<32>::Elf_Off
2326 offset_in_output_section,
2327 unsigned char* view,
2328 typename elfcpp::Elf_types<32>::Elf_Addr
2330 section_size_type view_size,
2331 unsigned char* preloc_out);
2333 // Return whether SYM is defined by the ABI.
2335 do_is_defined_by_abi(const Symbol* sym) const
2336 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
2338 // Return whether there is a GOT section.
2340 has_got_section() const
2341 { return this->got_ != NULL; }
2343 // Return the size of the GOT section.
2347 gold_assert(this->got_ != NULL);
2348 return this->got_->data_size();
2351 // Return the number of entries in the GOT.
2353 got_entry_count() const
2355 if (!this->has_got_section())
2357 return this->got_size() / 4;
2360 // Return the number of entries in the PLT.
2362 plt_entry_count() const;
2364 // Return the offset of the first non-reserved PLT entry.
2366 first_plt_entry_offset() const;
2368 // Return the size of each PLT entry.
2370 plt_entry_size() const;
2372 // Get the section to use for IRELATIVE relocations, create it if necessary.
2374 rel_irelative_section(Layout*);
2376 // Map platform-specific reloc types
2378 get_real_reloc_type(unsigned int r_type);
2381 // Methods to support stub-generations.
2384 // Return the stub factory
2386 stub_factory() const
2387 { return this->stub_factory_; }
2389 // Make a new Arm_input_section object.
2390 Arm_input_section<big_endian>*
2391 new_arm_input_section(Relobj*, unsigned int);
2393 // Find the Arm_input_section object corresponding to the SHNDX-th input
2394 // section of RELOBJ.
2395 Arm_input_section<big_endian>*
2396 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2398 // Make a new Stub_table
2399 Stub_table<big_endian>*
2400 new_stub_table(Arm_input_section<big_endian>*);
2402 // Scan a section for stub generation.
2404 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2405 const unsigned char*, size_t, Output_section*,
2406 bool, const unsigned char*, Arm_address,
2411 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2412 Output_section*, unsigned char*, Arm_address,
2415 // Get the default ARM target.
2416 static Target_arm<big_endian>*
2419 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2420 && parameters->target().is_big_endian() == big_endian);
2421 return static_cast<Target_arm<big_endian>*>(
2422 parameters->sized_target<32, big_endian>());
2425 // Whether NAME belongs to a mapping symbol.
2427 is_mapping_symbol_name(const char* name)
2431 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2432 && (name[2] == '\0' || name[2] == '.'));
2435 // Whether we work around the Cortex-A8 erratum.
2437 fix_cortex_a8() const
2438 { return this->fix_cortex_a8_; }
2440 // Whether we merge exidx entries in debuginfo.
2442 merge_exidx_entries() const
2443 { return parameters->options().merge_exidx_entries(); }
2445 // Whether we fix R_ARM_V4BX relocation.
2447 // 1 - replace with MOV instruction (armv4 target)
2448 // 2 - make interworking veneer (>= armv4t targets only)
2449 General_options::Fix_v4bx
2451 { return parameters->options().fix_v4bx(); }
2453 // Scan a span of THUMB code section for Cortex-A8 erratum.
2455 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2456 section_size_type, section_size_type,
2457 const unsigned char*, Arm_address);
2459 // Apply Cortex-A8 workaround to a branch.
2461 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2462 unsigned char*, Arm_address);
2465 // Make the PLT-generator object.
2466 Output_data_plt_arm<big_endian>*
2467 make_data_plt(Layout* layout,
2468 Arm_output_data_got<big_endian>* got,
2469 Output_data_space* got_plt,
2470 Output_data_space* got_irelative)
2471 { return this->do_make_data_plt(layout, got, got_plt, got_irelative); }
2473 // Make an ELF object.
2475 do_make_elf_object(const std::string&, Input_file*, off_t,
2476 const elfcpp::Ehdr<32, big_endian>& ehdr);
2479 do_make_elf_object(const std::string&, Input_file*, off_t,
2480 const elfcpp::Ehdr<32, !big_endian>&)
2481 { gold_unreachable(); }
2484 do_make_elf_object(const std::string&, Input_file*, off_t,
2485 const elfcpp::Ehdr<64, false>&)
2486 { gold_unreachable(); }
2489 do_make_elf_object(const std::string&, Input_file*, off_t,
2490 const elfcpp::Ehdr<64, true>&)
2491 { gold_unreachable(); }
2493 // Make an output section.
2495 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2496 elfcpp::Elf_Xword flags)
2497 { return new Arm_output_section<big_endian>(name, type, flags); }
2500 do_adjust_elf_header(unsigned char* view, int len);
2502 // We only need to generate stubs, and hence perform relaxation if we are
2503 // not doing relocatable linking.
2505 do_may_relax() const
2506 { return !parameters->options().relocatable(); }
2509 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*);
2511 // Determine whether an object attribute tag takes an integer, a
2514 do_attribute_arg_type(int tag) const;
2516 // Reorder tags during output.
2518 do_attributes_order(int num) const;
2520 // This is called when the target is selected as the default.
2522 do_select_as_default_target()
2524 // No locking is required since there should only be one default target.
2525 // We cannot have both the big-endian and little-endian ARM targets
2527 gold_assert(arm_reloc_property_table == NULL);
2528 arm_reloc_property_table = new Arm_reloc_property_table();
2531 // Virtual function which is set to return true by a target if
2532 // it can use relocation types to determine if a function's
2533 // pointer is taken.
2535 do_can_check_for_function_pointers() const
2538 // Whether a section called SECTION_NAME may have function pointers to
2539 // sections not eligible for safe ICF folding.
2541 do_section_may_have_icf_unsafe_pointers(const char* section_name) const
2543 return (!is_prefix_of(".ARM.exidx", section_name)
2544 && !is_prefix_of(".ARM.extab", section_name)
2545 && Target::do_section_may_have_icf_unsafe_pointers(section_name));
2549 do_define_standard_symbols(Symbol_table*, Layout*);
2551 virtual Output_data_plt_arm<big_endian>*
2552 do_make_data_plt(Layout* layout,
2553 Arm_output_data_got<big_endian>* got,
2554 Output_data_space* got_plt,
2555 Output_data_space* got_irelative)
2557 gold_assert(got_plt != NULL && got_irelative != NULL);
2558 return new Output_data_plt_arm_standard<big_endian>(
2559 layout, got, got_plt, got_irelative);
2563 // The class which scans relocations.
2568 : issued_non_pic_error_(false)
2572 get_reference_flags(unsigned int r_type);
2575 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2576 Sized_relobj_file<32, big_endian>* object,
2577 unsigned int data_shndx,
2578 Output_section* output_section,
2579 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2580 const elfcpp::Sym<32, big_endian>& lsym,
2584 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2585 Sized_relobj_file<32, big_endian>* object,
2586 unsigned int data_shndx,
2587 Output_section* output_section,
2588 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2592 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2593 Sized_relobj_file<32, big_endian>* ,
2596 const elfcpp::Rel<32, big_endian>& ,
2598 const elfcpp::Sym<32, big_endian>&);
2601 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2602 Sized_relobj_file<32, big_endian>* ,
2605 const elfcpp::Rel<32, big_endian>& ,
2606 unsigned int , Symbol*);
2610 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*,
2611 unsigned int r_type);
2614 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*,
2615 unsigned int r_type, Symbol*);
2618 check_non_pic(Relobj*, unsigned int r_type);
2620 // Almost identical to Symbol::needs_plt_entry except that it also
2621 // handles STT_ARM_TFUNC.
2623 symbol_needs_plt_entry(const Symbol* sym)
2625 // An undefined symbol from an executable does not need a PLT entry.
2626 if (sym->is_undefined() && !parameters->options().shared())
2629 if (sym->type() == elfcpp::STT_GNU_IFUNC)
2632 return (!parameters->doing_static_link()
2633 && (sym->type() == elfcpp::STT_FUNC
2634 || sym->type() == elfcpp::STT_ARM_TFUNC)
2635 && (sym->is_from_dynobj()
2636 || sym->is_undefined()
2637 || sym->is_preemptible()));
2641 possible_function_pointer_reloc(unsigned int r_type);
2643 // Whether a plt entry is needed for ifunc.
2645 reloc_needs_plt_for_ifunc(Sized_relobj_file<32, big_endian>*,
2646 unsigned int r_type);
2648 // Whether we have issued an error about a non-PIC compilation.
2649 bool issued_non_pic_error_;
2652 // The class which implements relocation.
2662 // Return whether the static relocation needs to be applied.
2664 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2665 unsigned int r_type,
2667 Output_section* output_section);
2669 // Do a relocation. Return false if the caller should not issue
2670 // any warnings about this relocation.
2672 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2673 Output_section*, size_t relnum,
2674 const elfcpp::Rel<32, big_endian>&,
2675 unsigned int r_type, const Sized_symbol<32>*,
2676 const Symbol_value<32>*,
2677 unsigned char*, Arm_address,
2680 // Return whether we want to pass flag NON_PIC_REF for this
2681 // reloc. This means the relocation type accesses a symbol not via
2684 reloc_is_non_pic(unsigned int r_type)
2688 // These relocation types reference GOT or PLT entries explicitly.
2689 case elfcpp::R_ARM_GOT_BREL:
2690 case elfcpp::R_ARM_GOT_ABS:
2691 case elfcpp::R_ARM_GOT_PREL:
2692 case elfcpp::R_ARM_GOT_BREL12:
2693 case elfcpp::R_ARM_PLT32_ABS:
2694 case elfcpp::R_ARM_TLS_GD32:
2695 case elfcpp::R_ARM_TLS_LDM32:
2696 case elfcpp::R_ARM_TLS_IE32:
2697 case elfcpp::R_ARM_TLS_IE12GP:
2699 // These relocate types may use PLT entries.
2700 case elfcpp::R_ARM_CALL:
2701 case elfcpp::R_ARM_THM_CALL:
2702 case elfcpp::R_ARM_JUMP24:
2703 case elfcpp::R_ARM_THM_JUMP24:
2704 case elfcpp::R_ARM_THM_JUMP19:
2705 case elfcpp::R_ARM_PLT32:
2706 case elfcpp::R_ARM_THM_XPC22:
2707 case elfcpp::R_ARM_PREL31:
2708 case elfcpp::R_ARM_SBREL31:
2717 // Do a TLS relocation.
2718 inline typename Arm_relocate_functions<big_endian>::Status
2719 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*,
2720 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int,
2721 const Sized_symbol<32>*, const Symbol_value<32>*,
2722 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr,
2727 // A class which returns the size required for a relocation type,
2728 // used while scanning relocs during a relocatable link.
2729 class Relocatable_size_for_reloc
2733 get_size_for_reloc(unsigned int, Relobj*);
2736 // Adjust TLS relocation type based on the options and whether this
2737 // is a local symbol.
2738 static tls::Tls_optimization
2739 optimize_tls_reloc(bool is_final, int r_type);
2741 // Get the GOT section, creating it if necessary.
2742 Arm_output_data_got<big_endian>*
2743 got_section(Symbol_table*, Layout*);
2745 // Get the GOT PLT section.
2747 got_plt_section() const
2749 gold_assert(this->got_plt_ != NULL);
2750 return this->got_plt_;
2753 // Create the PLT section.
2755 make_plt_section(Symbol_table* symtab, Layout* layout);
2757 // Create a PLT entry for a global symbol.
2759 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2761 // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2763 make_local_ifunc_plt_entry(Symbol_table*, Layout*,
2764 Sized_relobj_file<32, big_endian>* relobj,
2765 unsigned int local_sym_index);
2767 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2769 define_tls_base_symbol(Symbol_table*, Layout*);
2771 // Create a GOT entry for the TLS module index.
2773 got_mod_index_entry(Symbol_table* symtab, Layout* layout,
2774 Sized_relobj_file<32, big_endian>* object);
2776 // Get the PLT section.
2777 const Output_data_plt_arm<big_endian>*
2780 gold_assert(this->plt_ != NULL);
2784 // Get the dynamic reloc section, creating it if necessary.
2786 rel_dyn_section(Layout*);
2788 // Get the section to use for TLS_DESC relocations.
2790 rel_tls_desc_section(Layout*) const;
2792 // Return true if the symbol may need a COPY relocation.
2793 // References from an executable object to non-function symbols
2794 // defined in a dynamic object may need a COPY relocation.
2796 may_need_copy_reloc(Symbol* gsym)
2798 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2799 && gsym->may_need_copy_reloc());
2802 // Add a potential copy relocation.
2804 copy_reloc(Symbol_table* symtab, Layout* layout,
2805 Sized_relobj_file<32, big_endian>* object,
2806 unsigned int shndx, Output_section* output_section,
2807 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2809 unsigned int r_type = elfcpp::elf_r_type<32>(reloc.get_r_info());
2810 this->copy_relocs_.copy_reloc(symtab, layout,
2811 symtab->get_sized_symbol<32>(sym),
2812 object, shndx, output_section,
2813 r_type, reloc.get_r_offset(), 0,
2814 this->rel_dyn_section(layout));
2817 // Whether two EABI versions are compatible.
2819 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2821 // Merge processor-specific flags from input object and those in the ELF
2822 // header of the output.
2824 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2826 // Get the secondary compatible architecture.
2828 get_secondary_compatible_arch(const Attributes_section_data*);
2830 // Set the secondary compatible architecture.
2832 set_secondary_compatible_arch(Attributes_section_data*, int);
2835 tag_cpu_arch_combine(const char*, int, int*, int, int);
2837 // Helper to print AEABI enum tag value.
2839 aeabi_enum_name(unsigned int);
2841 // Return string value for TAG_CPU_name.
2843 tag_cpu_name_value(unsigned int);
2845 // Query attributes object to see if integer divide instructions may be
2846 // present in an object.
2848 attributes_accept_div(int arch, int profile,
2849 const Object_attribute* div_attr);
2851 // Query attributes object to see if integer divide instructions are
2852 // forbidden to be in the object. This is not the inverse of
2853 // attributes_accept_div.
2855 attributes_forbid_div(const Object_attribute* div_attr);
2857 // Merge object attributes from input object and those in the output.
2859 merge_object_attributes(const char*, const Attributes_section_data*);
2861 // Helper to get an AEABI object attribute
2863 get_aeabi_object_attribute(int tag) const
2865 Attributes_section_data* pasd = this->attributes_section_data_;
2866 gold_assert(pasd != NULL);
2867 Object_attribute* attr =
2868 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2869 gold_assert(attr != NULL);
2874 // Methods to support stub-generations.
2877 // Group input sections for stub generation.
2879 group_sections(Layout*, section_size_type, bool, const Task*);
2881 // Scan a relocation for stub generation.
2883 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2884 const Sized_symbol<32>*, unsigned int,
2885 const Symbol_value<32>*,
2886 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2888 // Scan a relocation section for stub.
2889 template<int sh_type>
2891 scan_reloc_section_for_stubs(
2892 const Relocate_info<32, big_endian>* relinfo,
2893 const unsigned char* prelocs,
2895 Output_section* output_section,
2896 bool needs_special_offset_handling,
2897 const unsigned char* view,
2898 elfcpp::Elf_types<32>::Elf_Addr view_address,
2901 // Fix .ARM.exidx section coverage.
2903 fix_exidx_coverage(Layout*, const Input_objects*,
2904 Arm_output_section<big_endian>*, Symbol_table*,
2907 // Functors for STL set.
2908 struct output_section_address_less_than
2911 operator()(const Output_section* s1, const Output_section* s2) const
2912 { return s1->address() < s2->address(); }
2915 // Information about this specific target which we pass to the
2916 // general Target structure.
2917 static const Target::Target_info arm_info;
2919 // The types of GOT entries needed for this platform.
2920 // These values are exposed to the ABI in an incremental link.
2921 // Do not renumber existing values without changing the version
2922 // number of the .gnu_incremental_inputs section.
2925 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol
2926 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset
2927 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset
2928 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair
2929 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair
2932 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2934 // Map input section to Arm_input_section.
2935 typedef Unordered_map<Section_id,
2936 Arm_input_section<big_endian>*,
2938 Arm_input_section_map;
2940 // Map output addresses to relocs for Cortex-A8 erratum.
2941 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2942 Cortex_a8_relocs_info;
2945 Arm_output_data_got<big_endian>* got_;
2947 Output_data_plt_arm<big_endian>* plt_;
2948 // The GOT PLT section.
2949 Output_data_space* got_plt_;
2950 // The GOT section for IRELATIVE relocations.
2951 Output_data_space* got_irelative_;
2952 // The dynamic reloc section.
2953 Reloc_section* rel_dyn_;
2954 // The section to use for IRELATIVE relocs.
2955 Reloc_section* rel_irelative_;
2956 // Relocs saved to avoid a COPY reloc.
2957 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2958 // Offset of the GOT entry for the TLS module index.
2959 unsigned int got_mod_index_offset_;
2960 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2961 bool tls_base_symbol_defined_;
2962 // Vector of Stub_tables created.
2963 Stub_table_list stub_tables_;
2965 const Stub_factory &stub_factory_;
2966 // Whether we force PIC branch veneers.
2967 bool should_force_pic_veneer_;
2968 // Map for locating Arm_input_sections.
2969 Arm_input_section_map arm_input_section_map_;
2970 // Attributes section data in output.
2971 Attributes_section_data* attributes_section_data_;
2972 // Whether we want to fix code for Cortex-A8 erratum.
2973 bool fix_cortex_a8_;
2974 // Map addresses to relocs for Cortex-A8 erratum.
2975 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2978 template<bool big_endian>
2979 const Target::Target_info Target_arm<big_endian>::arm_info =
2982 big_endian, // is_big_endian
2983 elfcpp::EM_ARM, // machine_code
2984 false, // has_make_symbol
2985 false, // has_resolve
2986 false, // has_code_fill
2987 true, // is_default_stack_executable
2988 false, // can_icf_inline_merge_sections
2990 "/usr/lib/libc.so.1", // dynamic_linker
2991 0x8000, // default_text_segment_address
2992 0x1000, // abi_pagesize (overridable by -z max-page-size)
2993 0x1000, // common_pagesize (overridable by -z common-page-size)
2994 false, // isolate_execinstr
2996 elfcpp::SHN_UNDEF, // small_common_shndx
2997 elfcpp::SHN_UNDEF, // large_common_shndx
2998 0, // small_common_section_flags
2999 0, // large_common_section_flags
3000 ".ARM.attributes", // attributes_section
3001 "aeabi", // attributes_vendor
3002 "_start", // entry_symbol_name
3003 32, // hash_entry_size
3006 // Arm relocate functions class
3009 template<bool big_endian>
3010 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
3015 STATUS_OKAY, // No error during relocation.
3016 STATUS_OVERFLOW, // Relocation overflow.
3017 STATUS_BAD_RELOC // Relocation cannot be applied.
3021 typedef Relocate_functions<32, big_endian> Base;
3022 typedef Arm_relocate_functions<big_endian> This;
3024 // Encoding of imm16 argument for movt and movw ARM instructions
3027 // imm16 := imm4 | imm12
3029 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3030 // +-------+---------------+-------+-------+-----------------------+
3031 // | | |imm4 | |imm12 |
3032 // +-------+---------------+-------+-------+-----------------------+
3034 // Extract the relocation addend from VAL based on the ARM
3035 // instruction encoding described above.
3036 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3037 extract_arm_movw_movt_addend(
3038 typename elfcpp::Swap<32, big_endian>::Valtype val)
3040 // According to the Elf ABI for ARM Architecture the immediate
3041 // field is sign-extended to form the addend.
3042 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff));
3045 // Insert X into VAL based on the ARM instruction encoding described
3047 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3048 insert_val_arm_movw_movt(
3049 typename elfcpp::Swap<32, big_endian>::Valtype val,
3050 typename elfcpp::Swap<32, big_endian>::Valtype x)
3054 val |= (x & 0xf000) << 4;
3058 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3061 // imm16 := imm4 | i | imm3 | imm8
3063 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3064 // +---------+-+-----------+-------++-+-----+-------+---------------+
3065 // | |i| |imm4 || |imm3 | |imm8 |
3066 // +---------+-+-----------+-------++-+-----+-------+---------------+
3068 // Extract the relocation addend from VAL based on the Thumb2
3069 // instruction encoding described above.
3070 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3071 extract_thumb_movw_movt_addend(
3072 typename elfcpp::Swap<32, big_endian>::Valtype val)
3074 // According to the Elf ABI for ARM Architecture the immediate
3075 // field is sign-extended to form the addend.
3076 return Bits<16>::sign_extend32(((val >> 4) & 0xf000)
3077 | ((val >> 15) & 0x0800)
3078 | ((val >> 4) & 0x0700)
3082 // Insert X into VAL based on the Thumb2 instruction encoding
3084 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3085 insert_val_thumb_movw_movt(
3086 typename elfcpp::Swap<32, big_endian>::Valtype val,
3087 typename elfcpp::Swap<32, big_endian>::Valtype x)
3090 val |= (x & 0xf000) << 4;
3091 val |= (x & 0x0800) << 15;
3092 val |= (x & 0x0700) << 4;
3093 val |= (x & 0x00ff);
3097 // Calculate the smallest constant Kn for the specified residual.
3098 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3100 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
3106 // Determine the most significant bit in the residual and
3107 // align the resulting value to a 2-bit boundary.
3108 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
3110 // The desired shift is now (msb - 6), or zero, whichever
3112 return (((msb - 6) < 0) ? 0 : (msb - 6));
3115 // Calculate the final residual for the specified group index.
3116 // If the passed group index is less than zero, the method will return
3117 // the value of the specified residual without any change.
3118 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3119 static typename elfcpp::Swap<32, big_endian>::Valtype
3120 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3123 for (int n = 0; n <= group; n++)
3125 // Calculate which part of the value to mask.
3126 uint32_t shift = calc_grp_kn(residual);
3127 // Calculate the residual for the next time around.
3128 residual &= ~(residual & (0xff << shift));
3134 // Calculate the value of Gn for the specified group index.
3135 // We return it in the form of an encoded constant-and-rotation.
3136 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3137 static typename elfcpp::Swap<32, big_endian>::Valtype
3138 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3141 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
3144 for (int n = 0; n <= group; n++)
3146 // Calculate which part of the value to mask.
3147 shift = calc_grp_kn(residual);
3148 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3149 gn = residual & (0xff << shift);
3150 // Calculate the residual for the next time around.
3153 // Return Gn in the form of an encoded constant-and-rotation.
3154 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
3158 // Handle ARM long branches.
3159 static typename This::Status
3160 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3161 unsigned char*, const Sized_symbol<32>*,
3162 const Arm_relobj<big_endian>*, unsigned int,
3163 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3165 // Handle THUMB long branches.
3166 static typename This::Status
3167 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3168 unsigned char*, const Sized_symbol<32>*,
3169 const Arm_relobj<big_endian>*, unsigned int,
3170 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3173 // Return the branch offset of a 32-bit THUMB branch.
3174 static inline int32_t
3175 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3177 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3178 // involving the J1 and J2 bits.
3179 uint32_t s = (upper_insn & (1U << 10)) >> 10;
3180 uint32_t upper = upper_insn & 0x3ffU;
3181 uint32_t lower = lower_insn & 0x7ffU;
3182 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
3183 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
3184 uint32_t i1 = j1 ^ s ? 0 : 1;
3185 uint32_t i2 = j2 ^ s ? 0 : 1;
3187 return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22)
3188 | (upper << 12) | (lower << 1));
3191 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3192 // UPPER_INSN is the original upper instruction of the branch. Caller is
3193 // responsible for overflow checking and BLX offset adjustment.
3194 static inline uint16_t
3195 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
3197 uint32_t s = offset < 0 ? 1 : 0;
3198 uint32_t bits = static_cast<uint32_t>(offset);
3199 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
3202 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3203 // LOWER_INSN is the original lower instruction of the branch. Caller is
3204 // responsible for overflow checking and BLX offset adjustment.
3205 static inline uint16_t
3206 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
3208 uint32_t s = offset < 0 ? 1 : 0;
3209 uint32_t bits = static_cast<uint32_t>(offset);
3210 return ((lower_insn & ~0x2fffU)
3211 | ((((bits >> 23) & 1) ^ !s) << 13)
3212 | ((((bits >> 22) & 1) ^ !s) << 11)
3213 | ((bits >> 1) & 0x7ffU));
3216 // Return the branch offset of a 32-bit THUMB conditional branch.
3217 static inline int32_t
3218 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3220 uint32_t s = (upper_insn & 0x0400U) >> 10;
3221 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
3222 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
3223 uint32_t lower = (lower_insn & 0x07ffU);
3224 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
3226 return Bits<21>::sign_extend32((upper << 12) | (lower << 1));
3229 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3230 // instruction. UPPER_INSN is the original upper instruction of the branch.
3231 // Caller is responsible for overflow checking.
3232 static inline uint16_t
3233 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
3235 uint32_t s = offset < 0 ? 1 : 0;
3236 uint32_t bits = static_cast<uint32_t>(offset);
3237 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
3240 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3241 // instruction. LOWER_INSN is the original lower instruction of the branch.
3242 // The caller is responsible for overflow checking.
3243 static inline uint16_t
3244 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
3246 uint32_t bits = static_cast<uint32_t>(offset);
3247 uint32_t j2 = (bits & 0x00080000U) >> 19;
3248 uint32_t j1 = (bits & 0x00040000U) >> 18;
3249 uint32_t lo = (bits & 0x00000ffeU) >> 1;
3251 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
3254 // R_ARM_ABS8: S + A
3255 static inline typename This::Status
3256 abs8(unsigned char* view,
3257 const Sized_relobj_file<32, big_endian>* object,
3258 const Symbol_value<32>* psymval)
3260 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
3261 Valtype* wv = reinterpret_cast<Valtype*>(view);
3262 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
3263 int32_t addend = Bits<8>::sign_extend32(val);
3264 Arm_address x = psymval->value(object, addend);
3265 val = Bits<32>::bit_select32(val, x, 0xffU);
3266 elfcpp::Swap<8, big_endian>::writeval(wv, val);
3268 // R_ARM_ABS8 permits signed or unsigned results.
3269 return (Bits<8>::has_signed_unsigned_overflow32(x)
3270 ? This::STATUS_OVERFLOW
3271 : This::STATUS_OKAY);
3274 // R_ARM_THM_ABS5: S + A
3275 static inline typename This::Status
3276 thm_abs5(unsigned char* view,
3277 const Sized_relobj_file<32, big_endian>* object,
3278 const Symbol_value<32>* psymval)
3280 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3281 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3282 Valtype* wv = reinterpret_cast<Valtype*>(view);
3283 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3284 Reltype addend = (val & 0x7e0U) >> 6;
3285 Reltype x = psymval->value(object, addend);
3286 val = Bits<32>::bit_select32(val, x << 6, 0x7e0U);
3287 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3288 return (Bits<5>::has_overflow32(x)
3289 ? This::STATUS_OVERFLOW
3290 : This::STATUS_OKAY);
3293 // R_ARM_ABS12: S + A
3294 static inline typename This::Status
3295 abs12(unsigned char* view,
3296 const Sized_relobj_file<32, big_endian>* object,
3297 const Symbol_value<32>* psymval)
3299 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3300 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3301 Valtype* wv = reinterpret_cast<Valtype*>(view);
3302 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3303 Reltype addend = val & 0x0fffU;
3304 Reltype x = psymval->value(object, addend);
3305 val = Bits<32>::bit_select32(val, x, 0x0fffU);
3306 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3307 return (Bits<12>::has_overflow32(x)
3308 ? This::STATUS_OVERFLOW
3309 : This::STATUS_OKAY);
3312 // R_ARM_ABS16: S + A
3313 static inline typename This::Status
3314 abs16(unsigned char* view,
3315 const Sized_relobj_file<32, big_endian>* object,
3316 const Symbol_value<32>* psymval)
3318 typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype;
3319 Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view);
3320 int32_t addend = Bits<16>::sign_extend32(val);
3321 Arm_address x = psymval->value(object, addend);
3322 val = Bits<32>::bit_select32(val, x, 0xffffU);
3323 elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val);
3325 // R_ARM_ABS16 permits signed or unsigned results.
3326 return (Bits<16>::has_signed_unsigned_overflow32(x)
3327 ? This::STATUS_OVERFLOW
3328 : This::STATUS_OKAY);
3331 // R_ARM_ABS32: (S + A) | T
3332 static inline typename This::Status
3333 abs32(unsigned char* view,
3334 const Sized_relobj_file<32, big_endian>* object,
3335 const Symbol_value<32>* psymval,
3336 Arm_address thumb_bit)
3338 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3339 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3340 Valtype x = psymval->value(object, addend) | thumb_bit;
3341 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3342 return This::STATUS_OKAY;
3345 // R_ARM_REL32: (S + A) | T - P
3346 static inline typename This::Status
3347 rel32(unsigned char* view,
3348 const Sized_relobj_file<32, big_endian>* object,
3349 const Symbol_value<32>* psymval,
3350 Arm_address address,
3351 Arm_address thumb_bit)
3353 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3354 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3355 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3356 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3357 return This::STATUS_OKAY;
3360 // R_ARM_THM_JUMP24: (S + A) | T - P
3361 static typename This::Status
3362 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object,
3363 const Symbol_value<32>* psymval, Arm_address address,
3364 Arm_address thumb_bit);
3366 // R_ARM_THM_JUMP6: S + A – P
3367 static inline typename This::Status
3368 thm_jump6(unsigned char* view,
3369 const Sized_relobj_file<32, big_endian>* object,
3370 const Symbol_value<32>* psymval,
3371 Arm_address address)
3373 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3374 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3375 Valtype* wv = reinterpret_cast<Valtype*>(view);
3376 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3377 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3378 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
3379 Reltype x = (psymval->value(object, addend) - address);
3380 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
3381 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3382 // CZB does only forward jumps.
3383 return ((x > 0x007e)
3384 ? This::STATUS_OVERFLOW
3385 : This::STATUS_OKAY);
3388 // R_ARM_THM_JUMP8: S + A – P
3389 static inline typename This::Status
3390 thm_jump8(unsigned char* view,
3391 const Sized_relobj_file<32, big_endian>* object,
3392 const Symbol_value<32>* psymval,
3393 Arm_address address)
3395 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3396 Valtype* wv = reinterpret_cast<Valtype*>(view);
3397 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3398 int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1);
3399 int32_t x = (psymval->value(object, addend) - address);
3400 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00)
3401 | ((x & 0x01fe) >> 1)));
3402 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3403 return (Bits<9>::has_overflow32(x)
3404 ? This::STATUS_OVERFLOW
3405 : This::STATUS_OKAY);
3408 // R_ARM_THM_JUMP11: S + A – P
3409 static inline typename This::Status
3410 thm_jump11(unsigned char* view,
3411 const Sized_relobj_file<32, big_endian>* object,
3412 const Symbol_value<32>* psymval,
3413 Arm_address address)
3415 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3416 Valtype* wv = reinterpret_cast<Valtype*>(view);
3417 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3418 int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1);
3419 int32_t x = (psymval->value(object, addend) - address);
3420 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800)
3421 | ((x & 0x0ffe) >> 1)));
3422 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3423 return (Bits<12>::has_overflow32(x)
3424 ? This::STATUS_OVERFLOW
3425 : This::STATUS_OKAY);
3428 // R_ARM_BASE_PREL: B(S) + A - P
3429 static inline typename This::Status
3430 base_prel(unsigned char* view,
3432 Arm_address address)
3434 Base::rel32(view, origin - address);
3438 // R_ARM_BASE_ABS: B(S) + A
3439 static inline typename This::Status
3440 base_abs(unsigned char* view,
3443 Base::rel32(view, origin);
3447 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3448 static inline typename This::Status
3449 got_brel(unsigned char* view,
3450 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
3452 Base::rel32(view, got_offset);
3453 return This::STATUS_OKAY;
3456 // R_ARM_GOT_PREL: GOT(S) + A - P
3457 static inline typename This::Status
3458 got_prel(unsigned char* view,
3459 Arm_address got_entry,
3460 Arm_address address)
3462 Base::rel32(view, got_entry - address);
3463 return This::STATUS_OKAY;
3466 // R_ARM_PREL: (S + A) | T - P
3467 static inline typename This::Status
3468 prel31(unsigned char* view,
3469 const Sized_relobj_file<32, big_endian>* object,
3470 const Symbol_value<32>* psymval,
3471 Arm_address address,
3472 Arm_address thumb_bit)
3474 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3475 Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3476 Valtype addend = Bits<31>::sign_extend32(val);
3477 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3478 val = Bits<32>::bit_select32(val, x, 0x7fffffffU);
3479 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val);
3480 return (Bits<31>::has_overflow32(x)
3481 ? This::STATUS_OVERFLOW
3482 : This::STATUS_OKAY);
3485 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3486 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3487 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3488 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3489 static inline typename This::Status
3490 movw(unsigned char* view,
3491 const Sized_relobj_file<32, big_endian>* object,
3492 const Symbol_value<32>* psymval,
3493 Arm_address relative_address_base,
3494 Arm_address thumb_bit,
3495 bool check_overflow)
3497 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3498 Valtype* wv = reinterpret_cast<Valtype*>(view);
3499 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3500 Valtype addend = This::extract_arm_movw_movt_addend(val);
3501 Valtype x = ((psymval->value(object, addend) | thumb_bit)
3502 - relative_address_base);
3503 val = This::insert_val_arm_movw_movt(val, x);
3504 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3505 return ((check_overflow && Bits<16>::has_overflow32(x))
3506 ? This::STATUS_OVERFLOW
3507 : This::STATUS_OKAY);
3510 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3511 // R_ARM_MOVT_PREL: S + A - P
3512 // R_ARM_MOVT_BREL: S + A - B(S)
3513 static inline typename This::Status
3514 movt(unsigned char* view,
3515 const Sized_relobj_file<32, big_endian>* object,
3516 const Symbol_value<32>* psymval,
3517 Arm_address relative_address_base)
3519 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3520 Valtype* wv = reinterpret_cast<Valtype*>(view);
3521 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3522 Valtype addend = This::extract_arm_movw_movt_addend(val);
3523 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3524 val = This::insert_val_arm_movw_movt(val, x);
3525 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3526 // FIXME: IHI0044D says that we should check for overflow.
3527 return This::STATUS_OKAY;
3530 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3531 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3532 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3533 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3534 static inline typename This::Status
3535 thm_movw(unsigned char* view,
3536 const Sized_relobj_file<32, big_endian>* object,
3537 const Symbol_value<32>* psymval,
3538 Arm_address relative_address_base,
3539 Arm_address thumb_bit,
3540 bool check_overflow)
3542 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3543 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3544 Valtype* wv = reinterpret_cast<Valtype*>(view);
3545 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3546 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3547 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3549 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3550 val = This::insert_val_thumb_movw_movt(val, x);
3551 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3552 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3553 return ((check_overflow && Bits<16>::has_overflow32(x))
3554 ? This::STATUS_OVERFLOW
3555 : This::STATUS_OKAY);
3558 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3559 // R_ARM_THM_MOVT_PREL: S + A - P
3560 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3561 static inline typename This::Status
3562 thm_movt(unsigned char* view,
3563 const Sized_relobj_file<32, big_endian>* object,
3564 const Symbol_value<32>* psymval,
3565 Arm_address relative_address_base)
3567 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3568 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3569 Valtype* wv = reinterpret_cast<Valtype*>(view);
3570 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3571 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3572 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3573 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3574 val = This::insert_val_thumb_movw_movt(val, x);
3575 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3576 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3577 return This::STATUS_OKAY;
3580 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3581 static inline typename This::Status
3582 thm_alu11(unsigned char* view,
3583 const Sized_relobj_file<32, big_endian>* object,
3584 const Symbol_value<32>* psymval,
3585 Arm_address address,
3586 Arm_address thumb_bit)
3588 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3589 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3590 Valtype* wv = reinterpret_cast<Valtype*>(view);
3591 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3592 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3594 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3595 // -----------------------------------------------------------------------
3596 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3597 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3598 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3599 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3600 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3601 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3603 // Determine a sign for the addend.
3604 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3605 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3606 // Thumb2 addend encoding:
3607 // imm12 := i | imm3 | imm8
3608 int32_t addend = (insn & 0xff)
3609 | ((insn & 0x00007000) >> 4)
3610 | ((insn & 0x04000000) >> 15);
3611 // Apply a sign to the added.
3614 int32_t x = (psymval->value(object, addend) | thumb_bit)
3615 - (address & 0xfffffffc);
3616 Reltype val = abs(x);
3617 // Mask out the value and a distinct part of the ADD/SUB opcode
3618 // (bits 7:5 of opword).
3619 insn = (insn & 0xfb0f8f00)
3621 | ((val & 0x700) << 4)
3622 | ((val & 0x800) << 15);
3623 // Set the opcode according to whether the value to go in the
3624 // place is negative.
3628 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3629 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3630 return ((val > 0xfff) ?
3631 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3634 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3635 static inline typename This::Status
3636 thm_pc8(unsigned char* view,
3637 const Sized_relobj_file<32, big_endian>* object,
3638 const Symbol_value<32>* psymval,
3639 Arm_address address)
3641 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3642 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3643 Valtype* wv = reinterpret_cast<Valtype*>(view);
3644 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3645 Reltype addend = ((insn & 0x00ff) << 2);
3646 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3647 Reltype val = abs(x);
3648 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3650 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3651 return ((val > 0x03fc)
3652 ? This::STATUS_OVERFLOW
3653 : This::STATUS_OKAY);
3656 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3657 static inline typename This::Status
3658 thm_pc12(unsigned char* view,
3659 const Sized_relobj_file<32, big_endian>* object,
3660 const Symbol_value<32>* psymval,
3661 Arm_address address)
3663 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3664 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3665 Valtype* wv = reinterpret_cast<Valtype*>(view);
3666 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3667 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3668 // Determine a sign for the addend (positive if the U bit is 1).
3669 const int sign = (insn & 0x00800000) ? 1 : -1;
3670 int32_t addend = (insn & 0xfff);
3671 // Apply a sign to the added.
3674 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3675 Reltype val = abs(x);
3676 // Mask out and apply the value and the U bit.
3677 insn = (insn & 0xff7ff000) | (val & 0xfff);
3678 // Set the U bit according to whether the value to go in the
3679 // place is positive.
3683 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3684 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3685 return ((val > 0xfff) ?
3686 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3690 static inline typename This::Status
3691 v4bx(const Relocate_info<32, big_endian>* relinfo,
3692 unsigned char* view,
3693 const Arm_relobj<big_endian>* object,
3694 const Arm_address address,
3695 const bool is_interworking)
3698 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3699 Valtype* wv = reinterpret_cast<Valtype*>(view);
3700 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3702 // Ensure that we have a BX instruction.
3703 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3704 const uint32_t reg = (val & 0xf);
3705 if (is_interworking && reg != 0xf)
3707 Stub_table<big_endian>* stub_table =
3708 object->stub_table(relinfo->data_shndx);
3709 gold_assert(stub_table != NULL);
3711 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3712 gold_assert(stub != NULL);
3714 int32_t veneer_address =
3715 stub_table->address() + stub->offset() - 8 - address;
3716 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3717 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3718 // Replace with a branch to veneer (B <addr>)
3719 val = (val & 0xf0000000) | 0x0a000000
3720 | ((veneer_address >> 2) & 0x00ffffff);
3724 // Preserve Rm (lowest four bits) and the condition code
3725 // (highest four bits). Other bits encode MOV PC,Rm.
3726 val = (val & 0xf000000f) | 0x01a0f000;
3728 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3729 return This::STATUS_OKAY;
3732 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3733 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3734 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3735 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3736 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3737 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3738 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3739 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3740 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3741 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3742 static inline typename This::Status
3743 arm_grp_alu(unsigned char* view,
3744 const Sized_relobj_file<32, big_endian>* object,
3745 const Symbol_value<32>* psymval,
3747 Arm_address address,
3748 Arm_address thumb_bit,
3749 bool check_overflow)
3751 gold_assert(group >= 0 && group < 3);
3752 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3753 Valtype* wv = reinterpret_cast<Valtype*>(view);
3754 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3756 // ALU group relocations are allowed only for the ADD/SUB instructions.
3757 // (0x00800000 - ADD, 0x00400000 - SUB)
3758 const Valtype opcode = insn & 0x01e00000;
3759 if (opcode != 0x00800000 && opcode != 0x00400000)
3760 return This::STATUS_BAD_RELOC;
3762 // Determine a sign for the addend.
3763 const int sign = (opcode == 0x00800000) ? 1 : -1;
3764 // shifter = rotate_imm * 2
3765 const uint32_t shifter = (insn & 0xf00) >> 7;
3766 // Initial addend value.
3767 int32_t addend = insn & 0xff;
3768 // Rotate addend right by shifter.
3769 addend = (addend >> shifter) | (addend << (32 - shifter));
3770 // Apply a sign to the added.
3773 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3774 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3775 // Check for overflow if required
3777 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3778 return This::STATUS_OVERFLOW;
3780 // Mask out the value and the ADD/SUB part of the opcode; take care
3781 // not to destroy the S bit.
3783 // Set the opcode according to whether the value to go in the
3784 // place is negative.
3785 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3786 // Encode the offset (encoded Gn).
3789 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3790 return This::STATUS_OKAY;
3793 // R_ARM_LDR_PC_G0: S + A - P
3794 // R_ARM_LDR_PC_G1: S + A - P
3795 // R_ARM_LDR_PC_G2: S + A - P
3796 // R_ARM_LDR_SB_G0: S + A - B(S)
3797 // R_ARM_LDR_SB_G1: S + A - B(S)
3798 // R_ARM_LDR_SB_G2: S + A - B(S)
3799 static inline typename This::Status
3800 arm_grp_ldr(unsigned char* view,
3801 const Sized_relobj_file<32, big_endian>* object,
3802 const Symbol_value<32>* psymval,
3804 Arm_address address)
3806 gold_assert(group >= 0 && group < 3);
3807 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3808 Valtype* wv = reinterpret_cast<Valtype*>(view);
3809 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3811 const int sign = (insn & 0x00800000) ? 1 : -1;
3812 int32_t addend = (insn & 0xfff) * sign;
3813 int32_t x = (psymval->value(object, addend) - address);
3814 // Calculate the relevant G(n-1) value to obtain this stage residual.
3816 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3817 if (residual >= 0x1000)
3818 return This::STATUS_OVERFLOW;
3820 // Mask out the value and U bit.
3822 // Set the U bit for non-negative values.
3827 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3828 return This::STATUS_OKAY;
3831 // R_ARM_LDRS_PC_G0: S + A - P
3832 // R_ARM_LDRS_PC_G1: S + A - P
3833 // R_ARM_LDRS_PC_G2: S + A - P
3834 // R_ARM_LDRS_SB_G0: S + A - B(S)
3835 // R_ARM_LDRS_SB_G1: S + A - B(S)
3836 // R_ARM_LDRS_SB_G2: S + A - B(S)
3837 static inline typename This::Status
3838 arm_grp_ldrs(unsigned char* view,
3839 const Sized_relobj_file<32, big_endian>* object,
3840 const Symbol_value<32>* psymval,
3842 Arm_address address)
3844 gold_assert(group >= 0 && group < 3);
3845 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3846 Valtype* wv = reinterpret_cast<Valtype*>(view);
3847 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3849 const int sign = (insn & 0x00800000) ? 1 : -1;
3850 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3851 int32_t x = (psymval->value(object, addend) - address);
3852 // Calculate the relevant G(n-1) value to obtain this stage residual.
3854 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3855 if (residual >= 0x100)
3856 return This::STATUS_OVERFLOW;
3858 // Mask out the value and U bit.
3860 // Set the U bit for non-negative values.
3863 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3865 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3866 return This::STATUS_OKAY;
3869 // R_ARM_LDC_PC_G0: S + A - P
3870 // R_ARM_LDC_PC_G1: S + A - P
3871 // R_ARM_LDC_PC_G2: S + A - P
3872 // R_ARM_LDC_SB_G0: S + A - B(S)
3873 // R_ARM_LDC_SB_G1: S + A - B(S)
3874 // R_ARM_LDC_SB_G2: S + A - B(S)
3875 static inline typename This::Status
3876 arm_grp_ldc(unsigned char* view,
3877 const Sized_relobj_file<32, big_endian>* object,
3878 const Symbol_value<32>* psymval,
3880 Arm_address address)
3882 gold_assert(group >= 0 && group < 3);
3883 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3884 Valtype* wv = reinterpret_cast<Valtype*>(view);
3885 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3887 const int sign = (insn & 0x00800000) ? 1 : -1;
3888 int32_t addend = ((insn & 0xff) << 2) * sign;
3889 int32_t x = (psymval->value(object, addend) - address);
3890 // Calculate the relevant G(n-1) value to obtain this stage residual.
3892 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3893 if ((residual & 0x3) != 0 || residual >= 0x400)
3894 return This::STATUS_OVERFLOW;
3896 // Mask out the value and U bit.
3898 // Set the U bit for non-negative values.
3901 insn |= (residual >> 2);
3903 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3904 return This::STATUS_OKAY;
3908 // Relocate ARM long branches. This handles relocation types
3909 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3910 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3911 // undefined and we do not use PLT in this relocation. In such a case,
3912 // the branch is converted into an NOP.
3914 template<bool big_endian>
3915 typename Arm_relocate_functions<big_endian>::Status
3916 Arm_relocate_functions<big_endian>::arm_branch_common(
3917 unsigned int r_type,
3918 const Relocate_info<32, big_endian>* relinfo,
3919 unsigned char* view,
3920 const Sized_symbol<32>* gsym,
3921 const Arm_relobj<big_endian>* object,
3923 const Symbol_value<32>* psymval,
3924 Arm_address address,
3925 Arm_address thumb_bit,
3926 bool is_weakly_undefined_without_plt)
3928 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3929 Valtype* wv = reinterpret_cast<Valtype*>(view);
3930 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3932 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3933 && ((val & 0x0f000000UL) == 0x0a000000UL);
3934 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3935 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3936 && ((val & 0x0f000000UL) == 0x0b000000UL);
3937 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3938 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3940 // Check that the instruction is valid.
3941 if (r_type == elfcpp::R_ARM_CALL)
3943 if (!insn_is_uncond_bl && !insn_is_blx)
3944 return This::STATUS_BAD_RELOC;
3946 else if (r_type == elfcpp::R_ARM_JUMP24)
3948 if (!insn_is_b && !insn_is_cond_bl)
3949 return This::STATUS_BAD_RELOC;
3951 else if (r_type == elfcpp::R_ARM_PLT32)
3953 if (!insn_is_any_branch)
3954 return This::STATUS_BAD_RELOC;
3956 else if (r_type == elfcpp::R_ARM_XPC25)
3958 // FIXME: AAELF document IH0044C does not say much about it other
3959 // than it being obsolete.
3960 if (!insn_is_any_branch)
3961 return This::STATUS_BAD_RELOC;
3966 // A branch to an undefined weak symbol is turned into a jump to
3967 // the next instruction unless a PLT entry will be created.
3968 // Do the same for local undefined symbols.
3969 // The jump to the next instruction is optimized as a NOP depending
3970 // on the architecture.
3971 const Target_arm<big_endian>* arm_target =
3972 Target_arm<big_endian>::default_target();
3973 if (is_weakly_undefined_without_plt)
3975 gold_assert(!parameters->options().relocatable());
3976 Valtype cond = val & 0xf0000000U;
3977 if (arm_target->may_use_arm_nop())
3978 val = cond | 0x0320f000;
3980 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3981 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3982 return This::STATUS_OKAY;
3985 Valtype addend = Bits<26>::sign_extend32(val << 2);
3986 Valtype branch_target = psymval->value(object, addend);
3987 int32_t branch_offset = branch_target - address;
3989 // We need a stub if the branch offset is too large or if we need
3991 bool may_use_blx = arm_target->may_use_v5t_interworking();
3992 Reloc_stub* stub = NULL;
3994 if (!parameters->options().relocatable()
3995 && (Bits<26>::has_overflow32(branch_offset)
3996 || ((thumb_bit != 0)
3997 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL))))
3999 Valtype unadjusted_branch_target = psymval->value(object, 0);
4001 Stub_type stub_type =
4002 Reloc_stub::stub_type_for_reloc(r_type, address,
4003 unadjusted_branch_target,
4005 if (stub_type != arm_stub_none)
4007 Stub_table<big_endian>* stub_table =
4008 object->stub_table(relinfo->data_shndx);
4009 gold_assert(stub_table != NULL);
4011 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4012 stub = stub_table->find_reloc_stub(stub_key);
4013 gold_assert(stub != NULL);
4014 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4015 branch_target = stub_table->address() + stub->offset() + addend;
4016 branch_offset = branch_target - address;
4017 gold_assert(!Bits<26>::has_overflow32(branch_offset));
4021 // At this point, if we still need to switch mode, the instruction
4022 // must either be a BLX or a BL that can be converted to a BLX.
4026 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
4027 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
4030 val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL);
4031 elfcpp::Swap<32, big_endian>::writeval(wv, val);
4032 return (Bits<26>::has_overflow32(branch_offset)
4033 ? This::STATUS_OVERFLOW
4034 : This::STATUS_OKAY);
4037 // Relocate THUMB long branches. This handles relocation types
4038 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4039 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4040 // undefined and we do not use PLT in this relocation. In such a case,
4041 // the branch is converted into an NOP.
4043 template<bool big_endian>
4044 typename Arm_relocate_functions<big_endian>::Status
4045 Arm_relocate_functions<big_endian>::thumb_branch_common(
4046 unsigned int r_type,
4047 const Relocate_info<32, big_endian>* relinfo,
4048 unsigned char* view,
4049 const Sized_symbol<32>* gsym,
4050 const Arm_relobj<big_endian>* object,
4052 const Symbol_value<32>* psymval,
4053 Arm_address address,
4054 Arm_address thumb_bit,
4055 bool is_weakly_undefined_without_plt)
4057 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4058 Valtype* wv = reinterpret_cast<Valtype*>(view);
4059 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4060 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4062 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4064 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
4065 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
4067 // Check that the instruction is valid.
4068 if (r_type == elfcpp::R_ARM_THM_CALL)
4070 if (!is_bl_insn && !is_blx_insn)
4071 return This::STATUS_BAD_RELOC;
4073 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
4075 // This cannot be a BLX.
4077 return This::STATUS_BAD_RELOC;
4079 else if (r_type == elfcpp::R_ARM_THM_XPC22)
4081 // Check for Thumb to Thumb call.
4083 return This::STATUS_BAD_RELOC;
4086 gold_warning(_("%s: Thumb BLX instruction targets "
4087 "thumb function '%s'."),
4088 object->name().c_str(),
4089 (gsym ? gsym->name() : "(local)"));
4090 // Convert BLX to BL.
4091 lower_insn |= 0x1000U;
4097 // A branch to an undefined weak symbol is turned into a jump to
4098 // the next instruction unless a PLT entry will be created.
4099 // The jump to the next instruction is optimized as a NOP.W for
4100 // Thumb-2 enabled architectures.
4101 const Target_arm<big_endian>* arm_target =
4102 Target_arm<big_endian>::default_target();
4103 if (is_weakly_undefined_without_plt)
4105 gold_assert(!parameters->options().relocatable());
4106 if (arm_target->may_use_thumb2_nop())
4108 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
4109 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
4113 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
4114 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
4116 return This::STATUS_OKAY;
4119 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
4120 Arm_address branch_target = psymval->value(object, addend);
4122 // For BLX, bit 1 of target address comes from bit 1 of base address.
4123 bool may_use_blx = arm_target->may_use_v5t_interworking();
4124 if (thumb_bit == 0 && may_use_blx)
4125 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4127 int32_t branch_offset = branch_target - address;
4129 // We need a stub if the branch offset is too large or if we need
4131 bool thumb2 = arm_target->using_thumb2();
4132 if (!parameters->options().relocatable()
4133 && ((!thumb2 && Bits<23>::has_overflow32(branch_offset))
4134 || (thumb2 && Bits<25>::has_overflow32(branch_offset))
4135 || ((thumb_bit == 0)
4136 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4137 || r_type == elfcpp::R_ARM_THM_JUMP24))))
4139 Arm_address unadjusted_branch_target = psymval->value(object, 0);
4141 Stub_type stub_type =
4142 Reloc_stub::stub_type_for_reloc(r_type, address,
4143 unadjusted_branch_target,
4146 if (stub_type != arm_stub_none)
4148 Stub_table<big_endian>* stub_table =
4149 object->stub_table(relinfo->data_shndx);
4150 gold_assert(stub_table != NULL);
4152 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4153 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
4154 gold_assert(stub != NULL);
4155 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4156 branch_target = stub_table->address() + stub->offset() + addend;
4157 if (thumb_bit == 0 && may_use_blx)
4158 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4159 branch_offset = branch_target - address;
4163 // At this point, if we still need to switch mode, the instruction
4164 // must either be a BLX or a BL that can be converted to a BLX.
4167 gold_assert(may_use_blx
4168 && (r_type == elfcpp::R_ARM_THM_CALL
4169 || r_type == elfcpp::R_ARM_THM_XPC22));
4170 // Make sure this is a BLX.
4171 lower_insn &= ~0x1000U;
4175 // Make sure this is a BL.
4176 lower_insn |= 0x1000U;
4179 // For a BLX instruction, make sure that the relocation is rounded up
4180 // to a word boundary. This follows the semantics of the instruction
4181 // which specifies that bit 1 of the target address will come from bit
4182 // 1 of the base address.
4183 if ((lower_insn & 0x5000U) == 0x4000U)
4184 gold_assert((branch_offset & 3) == 0);
4186 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4187 // We use the Thumb-2 encoding, which is safe even if dealing with
4188 // a Thumb-1 instruction by virtue of our overflow check above. */
4189 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
4190 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
4192 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4193 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4195 gold_assert(!Bits<25>::has_overflow32(branch_offset));
4198 ? Bits<25>::has_overflow32(branch_offset)
4199 : Bits<23>::has_overflow32(branch_offset))
4200 ? This::STATUS_OVERFLOW
4201 : This::STATUS_OKAY);
4204 // Relocate THUMB-2 long conditional branches.
4205 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4206 // undefined and we do not use PLT in this relocation. In such a case,
4207 // the branch is converted into an NOP.
4209 template<bool big_endian>
4210 typename Arm_relocate_functions<big_endian>::Status
4211 Arm_relocate_functions<big_endian>::thm_jump19(
4212 unsigned char* view,
4213 const Arm_relobj<big_endian>* object,
4214 const Symbol_value<32>* psymval,
4215 Arm_address address,
4216 Arm_address thumb_bit)
4218 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4219 Valtype* wv = reinterpret_cast<Valtype*>(view);
4220 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4221 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4222 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
4224 Arm_address branch_target = psymval->value(object, addend);
4225 int32_t branch_offset = branch_target - address;
4227 // ??? Should handle interworking? GCC might someday try to
4228 // use this for tail calls.
4229 // FIXME: We do support thumb entry to PLT yet.
4232 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4233 return This::STATUS_BAD_RELOC;
4236 // Put RELOCATION back into the insn.
4237 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
4238 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
4240 // Put the relocated value back in the object file:
4241 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4242 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4244 return (Bits<21>::has_overflow32(branch_offset)
4245 ? This::STATUS_OVERFLOW
4246 : This::STATUS_OKAY);
4249 // Get the GOT section, creating it if necessary.
4251 template<bool big_endian>
4252 Arm_output_data_got<big_endian>*
4253 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
4255 if (this->got_ == NULL)
4257 gold_assert(symtab != NULL && layout != NULL);
4259 // When using -z now, we can treat .got as a relro section.
4260 // Without -z now, it is modified after program startup by lazy
4262 bool is_got_relro = parameters->options().now();
4263 Output_section_order got_order = (is_got_relro
4267 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4268 // .got.plt sections in output. The output .got section contains both
4269 // PLT and non-PLT GOT entries.
4270 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout);
4272 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4273 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4274 this->got_, got_order, is_got_relro);
4276 // The old GNU linker creates a .got.plt section. We just
4277 // create another set of data in the .got section. Note that we
4278 // always create a PLT if we create a GOT, although the PLT
4280 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
4281 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4282 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4283 this->got_plt_, got_order, is_got_relro);
4285 // The first three entries are reserved.
4286 this->got_plt_->set_current_data_size(3 * 4);
4288 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4289 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
4290 Symbol_table::PREDEFINED,
4292 0, 0, elfcpp::STT_OBJECT,
4294 elfcpp::STV_HIDDEN, 0,
4297 // If there are any IRELATIVE relocations, they get GOT entries
4298 // in .got.plt after the jump slot entries.
4299 this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT");
4300 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4301 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4302 this->got_irelative_,
4303 got_order, is_got_relro);
4309 // Get the dynamic reloc section, creating it if necessary.
4311 template<bool big_endian>
4312 typename Target_arm<big_endian>::Reloc_section*
4313 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
4315 if (this->rel_dyn_ == NULL)
4317 gold_assert(layout != NULL);
4318 // Create both relocation sections in the same place, so as to ensure
4319 // their relative order in the output section.
4320 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
4321 this->rel_irelative_ = new Reloc_section(false);
4322 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4323 elfcpp::SHF_ALLOC, this->rel_dyn_,
4324 ORDER_DYNAMIC_RELOCS, false);
4325 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4326 elfcpp::SHF_ALLOC, this->rel_irelative_,
4327 ORDER_DYNAMIC_RELOCS, false);
4329 return this->rel_dyn_;
4333 // Get the section to use for IRELATIVE relocs, creating it if necessary. These
4334 // go in .rela.dyn, but only after all other dynamic relocations. They need to
4335 // follow the other dynamic relocations so that they can refer to global
4336 // variables initialized by those relocs.
4338 template<bool big_endian>
4339 typename Target_arm<big_endian>::Reloc_section*
4340 Target_arm<big_endian>::rel_irelative_section(Layout* layout)
4342 if (this->rel_irelative_ == NULL)
4344 // Delegate the creation to rel_dyn_section so as to ensure their order in
4345 // the output section.
4346 this->rel_dyn_section(layout);
4347 gold_assert(this->rel_irelative_ != NULL
4348 && (this->rel_dyn_->output_section()
4349 == this->rel_irelative_->output_section()));
4351 return this->rel_irelative_;
4355 // Insn_template methods.
4357 // Return byte size of an instruction template.
4360 Insn_template::size() const
4362 switch (this->type())
4365 case THUMB16_SPECIAL_TYPE:
4376 // Return alignment of an instruction template.
4379 Insn_template::alignment() const
4381 switch (this->type())
4384 case THUMB16_SPECIAL_TYPE:
4395 // Stub_template methods.
4397 Stub_template::Stub_template(
4398 Stub_type type, const Insn_template* insns,
4400 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
4401 entry_in_thumb_mode_(false), relocs_()
4405 // Compute byte size and alignment of stub template.
4406 for (size_t i = 0; i < insn_count; i++)
4408 unsigned insn_alignment = insns[i].alignment();
4409 size_t insn_size = insns[i].size();
4410 gold_assert((offset & (insn_alignment - 1)) == 0);
4411 this->alignment_ = std::max(this->alignment_, insn_alignment);
4412 switch (insns[i].type())
4414 case Insn_template::THUMB16_TYPE:
4415 case Insn_template::THUMB16_SPECIAL_TYPE:
4417 this->entry_in_thumb_mode_ = true;
4420 case Insn_template::THUMB32_TYPE:
4421 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
4422 this->relocs_.push_back(Reloc(i, offset));
4424 this->entry_in_thumb_mode_ = true;
4427 case Insn_template::ARM_TYPE:
4428 // Handle cases where the target is encoded within the
4430 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
4431 this->relocs_.push_back(Reloc(i, offset));
4434 case Insn_template::DATA_TYPE:
4435 // Entry point cannot be data.
4436 gold_assert(i != 0);
4437 this->relocs_.push_back(Reloc(i, offset));
4443 offset += insn_size;
4445 this->size_ = offset;
4450 // Template to implement do_write for a specific target endianness.
4452 template<bool big_endian>
4454 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4456 const Stub_template* stub_template = this->stub_template();
4457 const Insn_template* insns = stub_template->insns();
4459 // FIXME: We do not handle BE8 encoding yet.
4460 unsigned char* pov = view;
4461 for (size_t i = 0; i < stub_template->insn_count(); i++)
4463 switch (insns[i].type())
4465 case Insn_template::THUMB16_TYPE:
4466 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4468 case Insn_template::THUMB16_SPECIAL_TYPE:
4469 elfcpp::Swap<16, big_endian>::writeval(
4471 this->thumb16_special(i));
4473 case Insn_template::THUMB32_TYPE:
4475 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4476 uint32_t lo = insns[i].data() & 0xffff;
4477 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4478 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4481 case Insn_template::ARM_TYPE:
4482 case Insn_template::DATA_TYPE:
4483 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4488 pov += insns[i].size();
4490 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4493 // Reloc_stub::Key methods.
4495 // Dump a Key as a string for debugging.
4498 Reloc_stub::Key::name() const
4500 if (this->r_sym_ == invalid_index)
4502 // Global symbol key name
4503 // <stub-type>:<symbol name>:<addend>.
4504 const std::string sym_name = this->u_.symbol->name();
4505 // We need to print two hex number and two colons. So just add 100 bytes
4506 // to the symbol name size.
4507 size_t len = sym_name.size() + 100;
4508 char* buffer = new char[len];
4509 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4510 sym_name.c_str(), this->addend_);
4511 gold_assert(c > 0 && c < static_cast<int>(len));
4513 return std::string(buffer);
4517 // local symbol key name
4518 // <stub-type>:<object>:<r_sym>:<addend>.
4519 const size_t len = 200;
4521 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4522 this->u_.relobj, this->r_sym_, this->addend_);
4523 gold_assert(c > 0 && c < static_cast<int>(len));
4524 return std::string(buffer);
4528 // Reloc_stub methods.
4530 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4531 // LOCATION to DESTINATION.
4532 // This code is based on the arm_type_of_stub function in
4533 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4537 Reloc_stub::stub_type_for_reloc(
4538 unsigned int r_type,
4539 Arm_address location,
4540 Arm_address destination,
4541 bool target_is_thumb)
4543 Stub_type stub_type = arm_stub_none;
4545 // This is a bit ugly but we want to avoid using a templated class for
4546 // big and little endianities.
4548 bool should_force_pic_veneer = parameters->options().pic_veneer();
4551 if (parameters->target().is_big_endian())
4553 const Target_arm<true>* big_endian_target =
4554 Target_arm<true>::default_target();
4555 may_use_blx = big_endian_target->may_use_v5t_interworking();
4556 should_force_pic_veneer |= big_endian_target->should_force_pic_veneer();
4557 thumb2 = big_endian_target->using_thumb2();
4558 thumb_only = big_endian_target->using_thumb_only();
4562 const Target_arm<false>* little_endian_target =
4563 Target_arm<false>::default_target();
4564 may_use_blx = little_endian_target->may_use_v5t_interworking();
4565 should_force_pic_veneer |=
4566 little_endian_target->should_force_pic_veneer();
4567 thumb2 = little_endian_target->using_thumb2();
4568 thumb_only = little_endian_target->using_thumb_only();
4571 int64_t branch_offset;
4572 bool output_is_position_independent =
4573 parameters->options().output_is_position_independent();
4574 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4576 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4577 // base address (instruction address + 4).
4578 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb)
4579 destination = Bits<32>::bit_select32(destination, location, 0x2);
4580 branch_offset = static_cast<int64_t>(destination) - location;
4582 // Handle cases where:
4583 // - this call goes too far (different Thumb/Thumb2 max
4585 // - it's a Thumb->Arm call and blx is not available, or it's a
4586 // Thumb->Arm branch (not bl). A stub is needed in this case.
4588 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4589 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4591 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4592 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4593 || ((!target_is_thumb)
4594 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4595 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4597 if (target_is_thumb)
4602 stub_type = (output_is_position_independent
4603 || should_force_pic_veneer)
4606 && (r_type == elfcpp::R_ARM_THM_CALL))
4607 // V5T and above. Stub starts with ARM code, so
4608 // we must be able to switch mode before
4609 // reaching it, which is only possible for 'bl'
4610 // (ie R_ARM_THM_CALL relocation).
4611 ? arm_stub_long_branch_any_thumb_pic
4612 // On V4T, use Thumb code only.
4613 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4617 && (r_type == elfcpp::R_ARM_THM_CALL))
4618 ? arm_stub_long_branch_any_any // V5T and above.
4619 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4623 stub_type = (output_is_position_independent
4624 || should_force_pic_veneer)
4625 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4626 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4633 // FIXME: We should check that the input section is from an
4634 // object that has interwork enabled.
4636 stub_type = (output_is_position_independent
4637 || should_force_pic_veneer)
4640 && (r_type == elfcpp::R_ARM_THM_CALL))
4641 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4642 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4646 && (r_type == elfcpp::R_ARM_THM_CALL))
4647 ? arm_stub_long_branch_any_any // V5T and above.
4648 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4650 // Handle v4t short branches.
4651 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4652 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4653 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4654 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4658 else if (r_type == elfcpp::R_ARM_CALL
4659 || r_type == elfcpp::R_ARM_JUMP24
4660 || r_type == elfcpp::R_ARM_PLT32)
4662 branch_offset = static_cast<int64_t>(destination) - location;
4663 if (target_is_thumb)
4667 // FIXME: We should check that the input section is from an
4668 // object that has interwork enabled.
4670 // We have an extra 2-bytes reach because of
4671 // the mode change (bit 24 (H) of BLX encoding).
4672 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4673 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4674 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4675 || (r_type == elfcpp::R_ARM_JUMP24)
4676 || (r_type == elfcpp::R_ARM_PLT32))
4678 stub_type = (output_is_position_independent
4679 || should_force_pic_veneer)
4682 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4683 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4687 ? arm_stub_long_branch_any_any // V5T and above.
4688 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4694 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4695 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4697 stub_type = (output_is_position_independent
4698 || should_force_pic_veneer)
4699 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4700 : arm_stub_long_branch_any_any; /// non-PIC.
4708 // Cortex_a8_stub methods.
4710 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4711 // I is the position of the instruction template in the stub template.
4714 Cortex_a8_stub::do_thumb16_special(size_t i)
4716 // The only use of this is to copy condition code from a conditional
4717 // branch being worked around to the corresponding conditional branch in
4719 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4721 uint16_t data = this->stub_template()->insns()[i].data();
4722 gold_assert((data & 0xff00U) == 0xd000U);
4723 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4727 // Stub_factory methods.
4729 Stub_factory::Stub_factory()
4731 // The instruction template sequences are declared as static
4732 // objects and initialized first time the constructor runs.
4734 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4735 // to reach the stub if necessary.
4736 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4738 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4739 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4740 // dcd R_ARM_ABS32(X)
4743 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4745 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4747 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4748 Insn_template::arm_insn(0xe12fff1c), // bx ip
4749 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4750 // dcd R_ARM_ABS32(X)
4753 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4754 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4756 Insn_template::thumb16_insn(0xb401), // push {r0}
4757 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4758 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4759 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4760 Insn_template::thumb16_insn(0x4760), // bx ip
4761 Insn_template::thumb16_insn(0xbf00), // nop
4762 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4763 // dcd R_ARM_ABS32(X)
4766 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4768 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4770 Insn_template::thumb16_insn(0x4778), // bx pc
4771 Insn_template::thumb16_insn(0x46c0), // nop
4772 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4773 Insn_template::arm_insn(0xe12fff1c), // bx ip
4774 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4775 // dcd R_ARM_ABS32(X)
4778 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4780 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4782 Insn_template::thumb16_insn(0x4778), // bx pc
4783 Insn_template::thumb16_insn(0x46c0), // nop
4784 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4785 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4786 // dcd R_ARM_ABS32(X)
4789 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4790 // one, when the destination is close enough.
4791 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4793 Insn_template::thumb16_insn(0x4778), // bx pc
4794 Insn_template::thumb16_insn(0x46c0), // nop
4795 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4798 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4799 // blx to reach the stub if necessary.
4800 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4802 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4803 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4804 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4805 // dcd R_ARM_REL32(X-4)
4808 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4809 // blx to reach the stub if necessary. We can not add into pc;
4810 // it is not guaranteed to mode switch (different in ARMv6 and
4812 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4814 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4815 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4816 Insn_template::arm_insn(0xe12fff1c), // bx ip
4817 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4818 // dcd R_ARM_REL32(X)
4821 // V4T ARM -> ARM long branch stub, PIC.
4822 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4824 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4825 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4826 Insn_template::arm_insn(0xe12fff1c), // bx ip
4827 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4828 // dcd R_ARM_REL32(X)
4831 // V4T Thumb -> ARM long branch stub, PIC.
4832 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4834 Insn_template::thumb16_insn(0x4778), // bx pc
4835 Insn_template::thumb16_insn(0x46c0), // nop
4836 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4837 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4838 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4839 // dcd R_ARM_REL32(X)
4842 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4844 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4846 Insn_template::thumb16_insn(0xb401), // push {r0}
4847 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4848 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4849 Insn_template::thumb16_insn(0x4484), // add ip, r0
4850 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4851 Insn_template::thumb16_insn(0x4760), // bx ip
4852 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4853 // dcd R_ARM_REL32(X)
4856 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4858 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4860 Insn_template::thumb16_insn(0x4778), // bx pc
4861 Insn_template::thumb16_insn(0x46c0), // nop
4862 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4863 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4864 Insn_template::arm_insn(0xe12fff1c), // bx ip
4865 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4866 // dcd R_ARM_REL32(X)
4869 // Cortex-A8 erratum-workaround stubs.
4871 // Stub used for conditional branches (which may be beyond +/-1MB away,
4872 // so we can't use a conditional branch to reach this stub).
4879 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4881 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4882 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4883 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4887 // Stub used for b.w and bl.w instructions.
4889 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4891 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4894 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4896 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4899 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4900 // instruction (which switches to ARM mode) to point to this stub. Jump to
4901 // the real destination using an ARM-mode branch.
4902 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4904 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4907 // Stub used to provide an interworking for R_ARM_V4BX relocation
4908 // (bx r[n] instruction).
4909 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4911 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4912 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4913 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4916 // Fill in the stub template look-up table. Stub templates are constructed
4917 // per instance of Stub_factory for fast look-up without locking
4918 // in a thread-enabled environment.
4920 this->stub_templates_[arm_stub_none] =
4921 new Stub_template(arm_stub_none, NULL, 0);
4923 #define DEF_STUB(x) \
4927 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4928 Stub_type type = arm_stub_##x; \
4929 this->stub_templates_[type] = \
4930 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4938 // Stub_table methods.
4940 // Remove all Cortex-A8 stub.
4942 template<bool big_endian>
4944 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4946 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4947 p != this->cortex_a8_stubs_.end();
4950 this->cortex_a8_stubs_.clear();
4953 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4955 template<bool big_endian>
4957 Stub_table<big_endian>::relocate_stub(
4959 const Relocate_info<32, big_endian>* relinfo,
4960 Target_arm<big_endian>* arm_target,
4961 Output_section* output_section,
4962 unsigned char* view,
4963 Arm_address address,
4964 section_size_type view_size)
4966 const Stub_template* stub_template = stub->stub_template();
4967 if (stub_template->reloc_count() != 0)
4969 // Adjust view to cover the stub only.
4970 section_size_type offset = stub->offset();
4971 section_size_type stub_size = stub_template->size();
4972 gold_assert(offset + stub_size <= view_size);
4974 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4975 address + offset, stub_size);
4979 // Relocate all stubs in this stub table.
4981 template<bool big_endian>
4983 Stub_table<big_endian>::relocate_stubs(
4984 const Relocate_info<32, big_endian>* relinfo,
4985 Target_arm<big_endian>* arm_target,
4986 Output_section* output_section,
4987 unsigned char* view,
4988 Arm_address address,
4989 section_size_type view_size)
4991 // If we are passed a view bigger than the stub table's. we need to
4993 gold_assert(address == this->address()
4995 == static_cast<section_size_type>(this->data_size())));
4997 // Relocate all relocation stubs.
4998 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4999 p != this->reloc_stubs_.end();
5001 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
5002 address, view_size);
5004 // Relocate all Cortex-A8 stubs.
5005 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
5006 p != this->cortex_a8_stubs_.end();
5008 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
5009 address, view_size);
5011 // Relocate all ARM V4BX stubs.
5012 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
5013 p != this->arm_v4bx_stubs_.end();
5017 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
5018 address, view_size);
5022 // Write out the stubs to file.
5024 template<bool big_endian>
5026 Stub_table<big_endian>::do_write(Output_file* of)
5028 off_t offset = this->offset();
5029 const section_size_type oview_size =
5030 convert_to_section_size_type(this->data_size());
5031 unsigned char* const oview = of->get_output_view(offset, oview_size);
5033 // Write relocation stubs.
5034 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
5035 p != this->reloc_stubs_.end();
5038 Reloc_stub* stub = p->second;
5039 Arm_address address = this->address() + stub->offset();
5041 == align_address(address,
5042 stub->stub_template()->alignment()));
5043 stub->write(oview + stub->offset(), stub->stub_template()->size(),
5047 // Write Cortex-A8 stubs.
5048 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5049 p != this->cortex_a8_stubs_.end();
5052 Cortex_a8_stub* stub = p->second;
5053 Arm_address address = this->address() + stub->offset();
5055 == align_address(address,
5056 stub->stub_template()->alignment()));
5057 stub->write(oview + stub->offset(), stub->stub_template()->size(),
5061 // Write ARM V4BX relocation stubs.
5062 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5063 p != this->arm_v4bx_stubs_.end();
5069 Arm_address address = this->address() + (*p)->offset();
5071 == align_address(address,
5072 (*p)->stub_template()->alignment()));
5073 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
5077 of->write_output_view(this->offset(), oview_size, oview);
5080 // Update the data size and address alignment of the stub table at the end
5081 // of a relaxation pass. Return true if either the data size or the
5082 // alignment changed in this relaxation pass.
5084 template<bool big_endian>
5086 Stub_table<big_endian>::update_data_size_and_addralign()
5088 // Go over all stubs in table to compute data size and address alignment.
5089 off_t size = this->reloc_stubs_size_;
5090 unsigned addralign = this->reloc_stubs_addralign_;
5092 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5093 p != this->cortex_a8_stubs_.end();
5096 const Stub_template* stub_template = p->second->stub_template();
5097 addralign = std::max(addralign, stub_template->alignment());
5098 size = (align_address(size, stub_template->alignment())
5099 + stub_template->size());
5102 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5103 p != this->arm_v4bx_stubs_.end();
5109 const Stub_template* stub_template = (*p)->stub_template();
5110 addralign = std::max(addralign, stub_template->alignment());
5111 size = (align_address(size, stub_template->alignment())
5112 + stub_template->size());
5115 // Check if either data size or alignment changed in this pass.
5116 // Update prev_data_size_ and prev_addralign_. These will be used
5117 // as the current data size and address alignment for the next pass.
5118 bool changed = size != this->prev_data_size_;
5119 this->prev_data_size_ = size;
5121 if (addralign != this->prev_addralign_)
5123 this->prev_addralign_ = addralign;
5128 // Finalize the stubs. This sets the offsets of the stubs within the stub
5129 // table. It also marks all input sections needing Cortex-A8 workaround.
5131 template<bool big_endian>
5133 Stub_table<big_endian>::finalize_stubs()
5135 off_t off = this->reloc_stubs_size_;
5136 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5137 p != this->cortex_a8_stubs_.end();
5140 Cortex_a8_stub* stub = p->second;
5141 const Stub_template* stub_template = stub->stub_template();
5142 uint64_t stub_addralign = stub_template->alignment();
5143 off = align_address(off, stub_addralign);
5144 stub->set_offset(off);
5145 off += stub_template->size();
5147 // Mark input section so that we can determine later if a code section
5148 // needs the Cortex-A8 workaround quickly.
5149 Arm_relobj<big_endian>* arm_relobj =
5150 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
5151 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
5154 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5155 p != this->arm_v4bx_stubs_.end();
5161 const Stub_template* stub_template = (*p)->stub_template();
5162 uint64_t stub_addralign = stub_template->alignment();
5163 off = align_address(off, stub_addralign);
5164 (*p)->set_offset(off);
5165 off += stub_template->size();
5168 gold_assert(off <= this->prev_data_size_);
5171 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5172 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5173 // of the address range seen by the linker.
5175 template<bool big_endian>
5177 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
5178 Target_arm<big_endian>* arm_target,
5179 unsigned char* view,
5180 Arm_address view_address,
5181 section_size_type view_size)
5183 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5184 for (Cortex_a8_stub_list::const_iterator p =
5185 this->cortex_a8_stubs_.lower_bound(view_address);
5186 ((p != this->cortex_a8_stubs_.end())
5187 && (p->first < (view_address + view_size)));
5190 // We do not store the THUMB bit in the LSB of either the branch address
5191 // or the stub offset. There is no need to strip the LSB.
5192 Arm_address branch_address = p->first;
5193 const Cortex_a8_stub* stub = p->second;
5194 Arm_address stub_address = this->address() + stub->offset();
5196 // Offset of the branch instruction relative to this view.
5197 section_size_type offset =
5198 convert_to_section_size_type(branch_address - view_address);
5199 gold_assert((offset + 4) <= view_size);
5201 arm_target->apply_cortex_a8_workaround(stub, stub_address,
5202 view + offset, branch_address);
5206 // Arm_input_section methods.
5208 // Initialize an Arm_input_section.
5210 template<bool big_endian>
5212 Arm_input_section<big_endian>::init()
5214 Relobj* relobj = this->relobj();
5215 unsigned int shndx = this->shndx();
5217 // We have to cache original size, alignment and contents to avoid locking
5218 // the original file.
5219 this->original_addralign_ =
5220 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx));
5222 // This is not efficient but we expect only a small number of relaxed
5223 // input sections for stubs.
5224 section_size_type section_size;
5225 const unsigned char* section_contents =
5226 relobj->section_contents(shndx, §ion_size, false);
5227 this->original_size_ =
5228 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx));
5230 gold_assert(this->original_contents_ == NULL);
5231 this->original_contents_ = new unsigned char[section_size];
5232 memcpy(this->original_contents_, section_contents, section_size);
5234 // We want to make this look like the original input section after
5235 // output sections are finalized.
5236 Output_section* os = relobj->output_section(shndx);
5237 off_t offset = relobj->output_section_offset(shndx);
5238 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
5239 this->set_address(os->address() + offset);
5240 this->set_file_offset(os->offset() + offset);
5242 this->set_current_data_size(this->original_size_);
5243 this->finalize_data_size();
5246 template<bool big_endian>
5248 Arm_input_section<big_endian>::do_write(Output_file* of)
5250 // We have to write out the original section content.
5251 gold_assert(this->original_contents_ != NULL);
5252 of->write(this->offset(), this->original_contents_,
5253 this->original_size_);
5255 // If this owns a stub table and it is not empty, write it.
5256 if (this->is_stub_table_owner() && !this->stub_table_->empty())
5257 this->stub_table_->write(of);
5260 // Finalize data size.
5262 template<bool big_endian>
5264 Arm_input_section<big_endian>::set_final_data_size()
5266 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5268 if (this->is_stub_table_owner())
5270 this->stub_table_->finalize_data_size();
5271 off = align_address(off, this->stub_table_->addralign());
5272 off += this->stub_table_->data_size();
5274 this->set_data_size(off);
5277 // Reset address and file offset.
5279 template<bool big_endian>
5281 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
5283 // Size of the original input section contents.
5284 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5286 // If this is a stub table owner, account for the stub table size.
5287 if (this->is_stub_table_owner())
5289 Stub_table<big_endian>* stub_table = this->stub_table_;
5291 // Reset the stub table's address and file offset. The
5292 // current data size for child will be updated after that.
5293 stub_table_->reset_address_and_file_offset();
5294 off = align_address(off, stub_table_->addralign());
5295 off += stub_table->current_data_size();
5298 this->set_current_data_size(off);
5301 // Arm_exidx_cantunwind methods.
5303 // Write this to Output file OF for a fixed endianness.
5305 template<bool big_endian>
5307 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
5309 off_t offset = this->offset();
5310 const section_size_type oview_size = 8;
5311 unsigned char* const oview = of->get_output_view(offset, oview_size);
5313 Output_section* os = this->relobj_->output_section(this->shndx_);
5314 gold_assert(os != NULL);
5316 Arm_relobj<big_endian>* arm_relobj =
5317 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
5318 Arm_address output_offset =
5319 arm_relobj->get_output_section_offset(this->shndx_);
5320 Arm_address section_start;
5321 section_size_type section_size;
5323 // Find out the end of the text section referred by this.
5324 if (output_offset != Arm_relobj<big_endian>::invalid_address)
5326 section_start = os->address() + output_offset;
5327 const Arm_exidx_input_section* exidx_input_section =
5328 arm_relobj->exidx_input_section_by_link(this->shndx_);
5329 gold_assert(exidx_input_section != NULL);
5331 convert_to_section_size_type(exidx_input_section->text_size());
5335 // Currently this only happens for a relaxed section.
5336 const Output_relaxed_input_section* poris =
5337 os->find_relaxed_input_section(this->relobj_, this->shndx_);
5338 gold_assert(poris != NULL);
5339 section_start = poris->address();
5340 section_size = convert_to_section_size_type(poris->data_size());
5343 // We always append this to the end of an EXIDX section.
5344 Arm_address output_address = section_start + section_size;
5346 // Write out the entry. The first word either points to the beginning
5347 // or after the end of a text section. The second word is the special
5348 // EXIDX_CANTUNWIND value.
5349 uint32_t prel31_offset = output_address - this->address();
5350 if (Bits<31>::has_overflow32(offset))
5351 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5352 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview,
5353 prel31_offset & 0x7fffffffU);
5354 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4,
5355 elfcpp::EXIDX_CANTUNWIND);
5357 of->write_output_view(this->offset(), oview_size, oview);
5360 // Arm_exidx_merged_section methods.
5362 // Constructor for Arm_exidx_merged_section.
5363 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5364 // SECTION_OFFSET_MAP points to a section offset map describing how
5365 // parts of the input section are mapped to output. DELETED_BYTES is
5366 // the number of bytes deleted from the EXIDX input section.
5368 Arm_exidx_merged_section::Arm_exidx_merged_section(
5369 const Arm_exidx_input_section& exidx_input_section,
5370 const Arm_exidx_section_offset_map& section_offset_map,
5371 uint32_t deleted_bytes)
5372 : Output_relaxed_input_section(exidx_input_section.relobj(),
5373 exidx_input_section.shndx(),
5374 exidx_input_section.addralign()),
5375 exidx_input_section_(exidx_input_section),
5376 section_offset_map_(section_offset_map)
5378 // If we retain or discard the whole EXIDX input section, we would
5380 gold_assert(deleted_bytes != 0
5381 && deleted_bytes != this->exidx_input_section_.size());
5383 // Fix size here so that we do not need to implement set_final_data_size.
5384 uint32_t size = exidx_input_section.size() - deleted_bytes;
5385 this->set_data_size(size);
5386 this->fix_data_size();
5388 // Allocate buffer for section contents and build contents.
5389 this->section_contents_ = new unsigned char[size];
5392 // Build the contents of a merged EXIDX output section.
5395 Arm_exidx_merged_section::build_contents(
5396 const unsigned char* original_contents,
5397 section_size_type original_size)
5399 // Go over spans of input offsets and write only those that are not
5401 section_offset_type in_start = 0;
5402 section_offset_type out_start = 0;
5403 section_offset_type in_max =
5404 convert_types<section_offset_type>(original_size);
5405 section_offset_type out_max =
5406 convert_types<section_offset_type>(this->data_size());
5407 for (Arm_exidx_section_offset_map::const_iterator p =
5408 this->section_offset_map_.begin();
5409 p != this->section_offset_map_.end();
5412 section_offset_type in_end = p->first;
5413 gold_assert(in_end >= in_start);
5414 section_offset_type out_end = p->second;
5415 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5418 size_t out_chunk_size =
5419 convert_types<size_t>(out_end - out_start + 1);
5421 gold_assert(out_chunk_size == in_chunk_size
5422 && in_end < in_max && out_end < out_max);
5424 memcpy(this->section_contents_ + out_start,
5425 original_contents + in_start,
5427 out_start += out_chunk_size;
5429 in_start += in_chunk_size;
5433 // Given an input OBJECT, an input section index SHNDX within that
5434 // object, and an OFFSET relative to the start of that input
5435 // section, return whether or not the corresponding offset within
5436 // the output section is known. If this function returns true, it
5437 // sets *POUTPUT to the output offset. The value -1 indicates that
5438 // this input offset is being discarded.
5441 Arm_exidx_merged_section::do_output_offset(
5442 const Relobj* relobj,
5444 section_offset_type offset,
5445 section_offset_type* poutput) const
5447 // We only handle offsets for the original EXIDX input section.
5448 if (relobj != this->exidx_input_section_.relobj()
5449 || shndx != this->exidx_input_section_.shndx())
5452 section_offset_type section_size =
5453 convert_types<section_offset_type>(this->exidx_input_section_.size());
5454 if (offset < 0 || offset >= section_size)
5455 // Input offset is out of valid range.
5459 // We need to look up the section offset map to determine the output
5460 // offset. Find the reference point in map that is first offset
5461 // bigger than or equal to this offset.
5462 Arm_exidx_section_offset_map::const_iterator p =
5463 this->section_offset_map_.lower_bound(offset);
5465 // The section offset maps are build such that this should not happen if
5466 // input offset is in the valid range.
5467 gold_assert(p != this->section_offset_map_.end());
5469 // We need to check if this is dropped.
5470 section_offset_type ref = p->first;
5471 section_offset_type mapped_ref = p->second;
5473 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
5474 // Offset is present in output.
5475 *poutput = mapped_ref + (offset - ref);
5477 // Offset is discarded owing to EXIDX entry merging.
5484 // Write this to output file OF.
5487 Arm_exidx_merged_section::do_write(Output_file* of)
5489 off_t offset = this->offset();
5490 const section_size_type oview_size = this->data_size();
5491 unsigned char* const oview = of->get_output_view(offset, oview_size);
5493 Output_section* os = this->relobj()->output_section(this->shndx());
5494 gold_assert(os != NULL);
5496 memcpy(oview, this->section_contents_, oview_size);
5497 of->write_output_view(this->offset(), oview_size, oview);
5500 // Arm_exidx_fixup methods.
5502 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5503 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5504 // points to the end of the last seen EXIDX section.
5507 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5509 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5510 && this->last_input_section_ != NULL)
5512 Relobj* relobj = this->last_input_section_->relobj();
5513 unsigned int text_shndx = this->last_input_section_->link();
5514 Arm_exidx_cantunwind* cantunwind =
5515 new Arm_exidx_cantunwind(relobj, text_shndx);
5516 this->exidx_output_section_->add_output_section_data(cantunwind);
5517 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5521 // Process an EXIDX section entry in input. Return whether this entry
5522 // can be deleted in the output. SECOND_WORD in the second word of the
5526 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5529 if (second_word == elfcpp::EXIDX_CANTUNWIND)
5531 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5532 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5533 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5535 else if ((second_word & 0x80000000) != 0)
5537 // Inlined unwinding data. Merge if equal to previous.
5538 delete_entry = (merge_exidx_entries_
5539 && this->last_unwind_type_ == UT_INLINED_ENTRY
5540 && this->last_inlined_entry_ == second_word);
5541 this->last_unwind_type_ = UT_INLINED_ENTRY;
5542 this->last_inlined_entry_ = second_word;
5546 // Normal table entry. In theory we could merge these too,
5547 // but duplicate entries are likely to be much less common.
5548 delete_entry = false;
5549 this->last_unwind_type_ = UT_NORMAL_ENTRY;
5551 return delete_entry;
5554 // Update the current section offset map during EXIDX section fix-up.
5555 // If there is no map, create one. INPUT_OFFSET is the offset of a
5556 // reference point, DELETED_BYTES is the number of deleted by in the
5557 // section so far. If DELETE_ENTRY is true, the reference point and
5558 // all offsets after the previous reference point are discarded.
5561 Arm_exidx_fixup::update_offset_map(
5562 section_offset_type input_offset,
5563 section_size_type deleted_bytes,
5566 if (this->section_offset_map_ == NULL)
5567 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5568 section_offset_type output_offset;
5570 output_offset = Arm_exidx_input_section::invalid_offset;
5572 output_offset = input_offset - deleted_bytes;
5573 (*this->section_offset_map_)[input_offset] = output_offset;
5576 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5577 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5578 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5579 // If some entries are merged, also store a pointer to a newly created
5580 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5581 // owns the map and is responsible for releasing it after use.
5583 template<bool big_endian>
5585 Arm_exidx_fixup::process_exidx_section(
5586 const Arm_exidx_input_section* exidx_input_section,
5587 const unsigned char* section_contents,
5588 section_size_type section_size,
5589 Arm_exidx_section_offset_map** psection_offset_map)
5591 Relobj* relobj = exidx_input_section->relobj();
5592 unsigned shndx = exidx_input_section->shndx();
5594 if ((section_size % 8) != 0)
5596 // Something is wrong with this section. Better not touch it.
5597 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5598 relobj->name().c_str(), shndx);
5599 this->last_input_section_ = exidx_input_section;
5600 this->last_unwind_type_ = UT_NONE;
5604 uint32_t deleted_bytes = 0;
5605 bool prev_delete_entry = false;
5606 gold_assert(this->section_offset_map_ == NULL);
5608 for (section_size_type i = 0; i < section_size; i += 8)
5610 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5612 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5613 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5615 bool delete_entry = this->process_exidx_entry(second_word);
5617 // Entry deletion causes changes in output offsets. We use a std::map
5618 // to record these. And entry (x, y) means input offset x
5619 // is mapped to output offset y. If y is invalid_offset, then x is
5620 // dropped in the output. Because of the way std::map::lower_bound
5621 // works, we record the last offset in a region w.r.t to keeping or
5622 // dropping. If there is no entry (x0, y0) for an input offset x0,
5623 // the output offset y0 of it is determined by the output offset y1 of
5624 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5625 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5627 if (delete_entry != prev_delete_entry && i != 0)
5628 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5630 // Update total deleted bytes for this entry.
5634 prev_delete_entry = delete_entry;
5637 // If section offset map is not NULL, make an entry for the end of
5639 if (this->section_offset_map_ != NULL)
5640 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5642 *psection_offset_map = this->section_offset_map_;
5643 this->section_offset_map_ = NULL;
5644 this->last_input_section_ = exidx_input_section;
5646 // Set the first output text section so that we can link the EXIDX output
5647 // section to it. Ignore any EXIDX input section that is completely merged.
5648 if (this->first_output_text_section_ == NULL
5649 && deleted_bytes != section_size)
5651 unsigned int link = exidx_input_section->link();
5652 Output_section* os = relobj->output_section(link);
5653 gold_assert(os != NULL);
5654 this->first_output_text_section_ = os;
5657 return deleted_bytes;
5660 // Arm_output_section methods.
5662 // Create a stub group for input sections from BEGIN to END. OWNER
5663 // points to the input section to be the owner a new stub table.
5665 template<bool big_endian>
5667 Arm_output_section<big_endian>::create_stub_group(
5668 Input_section_list::const_iterator begin,
5669 Input_section_list::const_iterator end,
5670 Input_section_list::const_iterator owner,
5671 Target_arm<big_endian>* target,
5672 std::vector<Output_relaxed_input_section*>* new_relaxed_sections,
5675 // We use a different kind of relaxed section in an EXIDX section.
5676 // The static casting from Output_relaxed_input_section to
5677 // Arm_input_section is invalid in an EXIDX section. We are okay
5678 // because we should not be calling this for an EXIDX section.
5679 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5681 // Currently we convert ordinary input sections into relaxed sections only
5682 // at this point but we may want to support creating relaxed input section
5683 // very early. So we check here to see if owner is already a relaxed
5686 Arm_input_section<big_endian>* arm_input_section;
5687 if (owner->is_relaxed_input_section())
5690 Arm_input_section<big_endian>::as_arm_input_section(
5691 owner->relaxed_input_section());
5695 gold_assert(owner->is_input_section());
5696 // Create a new relaxed input section. We need to lock the original
5698 Task_lock_obj<Object> tl(task, owner->relobj());
5700 target->new_arm_input_section(owner->relobj(), owner->shndx());
5701 new_relaxed_sections->push_back(arm_input_section);
5704 // Create a stub table.
5705 Stub_table<big_endian>* stub_table =
5706 target->new_stub_table(arm_input_section);
5708 arm_input_section->set_stub_table(stub_table);
5710 Input_section_list::const_iterator p = begin;
5711 Input_section_list::const_iterator prev_p;
5713 // Look for input sections or relaxed input sections in [begin ... end].
5716 if (p->is_input_section() || p->is_relaxed_input_section())
5718 // The stub table information for input sections live
5719 // in their objects.
5720 Arm_relobj<big_endian>* arm_relobj =
5721 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5722 arm_relobj->set_stub_table(p->shndx(), stub_table);
5726 while (prev_p != end);
5729 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5730 // of stub groups. We grow a stub group by adding input section until the
5731 // size is just below GROUP_SIZE. The last input section will be converted
5732 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5733 // input section after the stub table, effectively double the group size.
5735 // This is similar to the group_sections() function in elf32-arm.c but is
5736 // implemented differently.
5738 template<bool big_endian>
5740 Arm_output_section<big_endian>::group_sections(
5741 section_size_type group_size,
5742 bool stubs_always_after_branch,
5743 Target_arm<big_endian>* target,
5746 // States for grouping.
5749 // No group is being built.
5751 // A group is being built but the stub table is not found yet.
5752 // We keep group a stub group until the size is just under GROUP_SIZE.
5753 // The last input section in the group will be used as the stub table.
5754 FINDING_STUB_SECTION,
5755 // A group is being built and we have already found a stub table.
5756 // We enter this state to grow a stub group by adding input section
5757 // after the stub table. This effectively doubles the group size.
5761 // Any newly created relaxed sections are stored here.
5762 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5764 State state = NO_GROUP;
5765 section_size_type off = 0;
5766 section_size_type group_begin_offset = 0;
5767 section_size_type group_end_offset = 0;
5768 section_size_type stub_table_end_offset = 0;
5769 Input_section_list::const_iterator group_begin =
5770 this->input_sections().end();
5771 Input_section_list::const_iterator stub_table =
5772 this->input_sections().end();
5773 Input_section_list::const_iterator group_end = this->input_sections().end();
5774 for (Input_section_list::const_iterator p = this->input_sections().begin();
5775 p != this->input_sections().end();
5778 section_size_type section_begin_offset =
5779 align_address(off, p->addralign());
5780 section_size_type section_end_offset =
5781 section_begin_offset + p->data_size();
5783 // Check to see if we should group the previously seen sections.
5789 case FINDING_STUB_SECTION:
5790 // Adding this section makes the group larger than GROUP_SIZE.
5791 if (section_end_offset - group_begin_offset >= group_size)
5793 if (stubs_always_after_branch)
5795 gold_assert(group_end != this->input_sections().end());
5796 this->create_stub_group(group_begin, group_end, group_end,
5797 target, &new_relaxed_sections,
5803 // But wait, there's more! Input sections up to
5804 // stub_group_size bytes after the stub table can be
5805 // handled by it too.
5806 state = HAS_STUB_SECTION;
5807 stub_table = group_end;
5808 stub_table_end_offset = group_end_offset;
5813 case HAS_STUB_SECTION:
5814 // Adding this section makes the post stub-section group larger
5816 if (section_end_offset - stub_table_end_offset >= group_size)
5818 gold_assert(group_end != this->input_sections().end());
5819 this->create_stub_group(group_begin, group_end, stub_table,
5820 target, &new_relaxed_sections, task);
5829 // If we see an input section and currently there is no group, start
5830 // a new one. Skip any empty sections. We look at the data size
5831 // instead of calling p->relobj()->section_size() to avoid locking.
5832 if ((p->is_input_section() || p->is_relaxed_input_section())
5833 && (p->data_size() != 0))
5835 if (state == NO_GROUP)
5837 state = FINDING_STUB_SECTION;
5839 group_begin_offset = section_begin_offset;
5842 // Keep track of the last input section seen.
5844 group_end_offset = section_end_offset;
5847 off = section_end_offset;
5850 // Create a stub group for any ungrouped sections.
5851 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5853 gold_assert(group_end != this->input_sections().end());
5854 this->create_stub_group(group_begin, group_end,
5855 (state == FINDING_STUB_SECTION
5858 target, &new_relaxed_sections, task);
5861 // Convert input section into relaxed input section in a batch.
5862 if (!new_relaxed_sections.empty())
5863 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5865 // Update the section offsets
5866 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5868 Arm_relobj<big_endian>* arm_relobj =
5869 Arm_relobj<big_endian>::as_arm_relobj(
5870 new_relaxed_sections[i]->relobj());
5871 unsigned int shndx = new_relaxed_sections[i]->shndx();
5872 // Tell Arm_relobj that this input section is converted.
5873 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5877 // Append non empty text sections in this to LIST in ascending
5878 // order of their position in this.
5880 template<bool big_endian>
5882 Arm_output_section<big_endian>::append_text_sections_to_list(
5883 Text_section_list* list)
5885 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5887 for (Input_section_list::const_iterator p = this->input_sections().begin();
5888 p != this->input_sections().end();
5891 // We only care about plain or relaxed input sections. We also
5892 // ignore any merged sections.
5893 if (p->is_input_section() || p->is_relaxed_input_section())
5894 list->push_back(Text_section_list::value_type(p->relobj(),
5899 template<bool big_endian>
5901 Arm_output_section<big_endian>::fix_exidx_coverage(
5903 const Text_section_list& sorted_text_sections,
5904 Symbol_table* symtab,
5905 bool merge_exidx_entries,
5908 // We should only do this for the EXIDX output section.
5909 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5911 // We don't want the relaxation loop to undo these changes, so we discard
5912 // the current saved states and take another one after the fix-up.
5913 this->discard_states();
5915 // Remove all input sections.
5916 uint64_t address = this->address();
5917 typedef std::list<Output_section::Input_section> Input_section_list;
5918 Input_section_list input_sections;
5919 this->reset_address_and_file_offset();
5920 this->get_input_sections(address, std::string(""), &input_sections);
5922 if (!this->input_sections().empty())
5923 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5925 // Go through all the known input sections and record them.
5926 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5927 typedef Unordered_map<Section_id, const Output_section::Input_section*,
5928 Section_id_hash> Text_to_exidx_map;
5929 Text_to_exidx_map text_to_exidx_map;
5930 for (Input_section_list::const_iterator p = input_sections.begin();
5931 p != input_sections.end();
5934 // This should never happen. At this point, we should only see
5935 // plain EXIDX input sections.
5936 gold_assert(!p->is_relaxed_input_section());
5937 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p);
5940 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries);
5942 // Go over the sorted text sections.
5943 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5944 Section_id_set processed_input_sections;
5945 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5946 p != sorted_text_sections.end();
5949 Relobj* relobj = p->first;
5950 unsigned int shndx = p->second;
5952 Arm_relobj<big_endian>* arm_relobj =
5953 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5954 const Arm_exidx_input_section* exidx_input_section =
5955 arm_relobj->exidx_input_section_by_link(shndx);
5957 // If this text section has no EXIDX section or if the EXIDX section
5958 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5959 // of the last seen EXIDX section.
5960 if (exidx_input_section == NULL || exidx_input_section->has_errors())
5962 exidx_fixup.add_exidx_cantunwind_as_needed();
5966 Relobj* exidx_relobj = exidx_input_section->relobj();
5967 unsigned int exidx_shndx = exidx_input_section->shndx();
5968 Section_id sid(exidx_relobj, exidx_shndx);
5969 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid);
5970 if (iter == text_to_exidx_map.end())
5972 // This is odd. We have not seen this EXIDX input section before.
5973 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5974 // issue a warning instead. We assume the user knows what he
5975 // or she is doing. Otherwise, this is an error.
5976 if (layout->script_options()->saw_sections_clause())
5977 gold_warning(_("unwinding may not work because EXIDX input section"
5978 " %u of %s is not in EXIDX output section"),
5979 exidx_shndx, exidx_relobj->name().c_str());
5981 gold_error(_("unwinding may not work because EXIDX input section"
5982 " %u of %s is not in EXIDX output section"),
5983 exidx_shndx, exidx_relobj->name().c_str());
5985 exidx_fixup.add_exidx_cantunwind_as_needed();
5989 // We need to access the contents of the EXIDX section, lock the
5991 Task_lock_obj<Object> tl(task, exidx_relobj);
5992 section_size_type exidx_size;
5993 const unsigned char* exidx_contents =
5994 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false);
5996 // Fix up coverage and append input section to output data list.
5997 Arm_exidx_section_offset_map* section_offset_map = NULL;
5998 uint32_t deleted_bytes =
5999 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
6002 §ion_offset_map);
6004 if (deleted_bytes == exidx_input_section->size())
6006 // The whole EXIDX section got merged. Remove it from output.
6007 gold_assert(section_offset_map == NULL);
6008 exidx_relobj->set_output_section(exidx_shndx, NULL);
6010 // All local symbols defined in this input section will be dropped.
6011 // We need to adjust output local symbol count.
6012 arm_relobj->set_output_local_symbol_count_needs_update();
6014 else if (deleted_bytes > 0)
6016 // Some entries are merged. We need to convert this EXIDX input
6017 // section into a relaxed section.
6018 gold_assert(section_offset_map != NULL);
6020 Arm_exidx_merged_section* merged_section =
6021 new Arm_exidx_merged_section(*exidx_input_section,
6022 *section_offset_map, deleted_bytes);
6023 merged_section->build_contents(exidx_contents, exidx_size);
6025 const std::string secname = exidx_relobj->section_name(exidx_shndx);
6026 this->add_relaxed_input_section(layout, merged_section, secname);
6027 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
6029 // All local symbols defined in discarded portions of this input
6030 // section will be dropped. We need to adjust output local symbol
6032 arm_relobj->set_output_local_symbol_count_needs_update();
6036 // Just add back the EXIDX input section.
6037 gold_assert(section_offset_map == NULL);
6038 const Output_section::Input_section* pis = iter->second;
6039 gold_assert(pis->is_input_section());
6040 this->add_script_input_section(*pis);
6043 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
6046 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6047 exidx_fixup.add_exidx_cantunwind_as_needed();
6049 // Remove any known EXIDX input sections that are not processed.
6050 for (Input_section_list::const_iterator p = input_sections.begin();
6051 p != input_sections.end();
6054 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
6055 == processed_input_sections.end())
6057 // We discard a known EXIDX section because its linked
6058 // text section has been folded by ICF. We also discard an
6059 // EXIDX section with error, the output does not matter in this
6060 // case. We do this to avoid triggering asserts.
6061 Arm_relobj<big_endian>* arm_relobj =
6062 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6063 const Arm_exidx_input_section* exidx_input_section =
6064 arm_relobj->exidx_input_section_by_shndx(p->shndx());
6065 gold_assert(exidx_input_section != NULL);
6066 if (!exidx_input_section->has_errors())
6068 unsigned int text_shndx = exidx_input_section->link();
6069 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
6072 // Remove this from link. We also need to recount the
6074 p->relobj()->set_output_section(p->shndx(), NULL);
6075 arm_relobj->set_output_local_symbol_count_needs_update();
6079 // Link exidx output section to the first seen output section and
6080 // set correct entry size.
6081 this->set_link_section(exidx_fixup.first_output_text_section());
6082 this->set_entsize(8);
6084 // Make changes permanent.
6085 this->save_states();
6086 this->set_section_offsets_need_adjustment();
6089 // Link EXIDX output sections to text output sections.
6091 template<bool big_endian>
6093 Arm_output_section<big_endian>::set_exidx_section_link()
6095 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
6096 if (!this->input_sections().empty())
6098 Input_section_list::const_iterator p = this->input_sections().begin();
6099 Arm_relobj<big_endian>* arm_relobj =
6100 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6101 unsigned exidx_shndx = p->shndx();
6102 const Arm_exidx_input_section* exidx_input_section =
6103 arm_relobj->exidx_input_section_by_shndx(exidx_shndx);
6104 gold_assert(exidx_input_section != NULL);
6105 unsigned int text_shndx = exidx_input_section->link();
6106 Output_section* os = arm_relobj->output_section(text_shndx);
6107 this->set_link_section(os);
6111 // Arm_relobj methods.
6113 // Determine if an input section is scannable for stub processing. SHDR is
6114 // the header of the section and SHNDX is the section index. OS is the output
6115 // section for the input section and SYMTAB is the global symbol table used to
6116 // look up ICF information.
6118 template<bool big_endian>
6120 Arm_relobj<big_endian>::section_is_scannable(
6121 const elfcpp::Shdr<32, big_endian>& shdr,
6123 const Output_section* os,
6124 const Symbol_table* symtab)
6126 // Skip any empty sections, unallocated sections or sections whose
6127 // type are not SHT_PROGBITS.
6128 if (shdr.get_sh_size() == 0
6129 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
6130 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
6133 // Skip any discarded or ICF'ed sections.
6134 if (os == NULL || symtab->is_section_folded(this, shndx))
6137 // If this requires special offset handling, check to see if it is
6138 // a relaxed section. If this is not, then it is a merged section that
6139 // we cannot handle.
6140 if (this->is_output_section_offset_invalid(shndx))
6142 const Output_relaxed_input_section* poris =
6143 os->find_relaxed_input_section(this, shndx);
6151 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6152 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6154 template<bool big_endian>
6156 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
6157 const elfcpp::Shdr<32, big_endian>& shdr,
6158 const Relobj::Output_sections& out_sections,
6159 const Symbol_table* symtab,
6160 const unsigned char* pshdrs)
6162 unsigned int sh_type = shdr.get_sh_type();
6163 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
6166 // Ignore empty section.
6167 off_t sh_size = shdr.get_sh_size();
6171 // Ignore reloc section with unexpected symbol table. The
6172 // error will be reported in the final link.
6173 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
6176 unsigned int reloc_size;
6177 if (sh_type == elfcpp::SHT_REL)
6178 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6180 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6182 // Ignore reloc section with unexpected entsize or uneven size.
6183 // The error will be reported in the final link.
6184 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
6187 // Ignore reloc section with bad info. This error will be
6188 // reported in the final link.
6189 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6190 if (index >= this->shnum())
6193 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6194 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
6195 return this->section_is_scannable(text_shdr, index,
6196 out_sections[index], symtab);
6199 // Return the output address of either a plain input section or a relaxed
6200 // input section. SHNDX is the section index. We define and use this
6201 // instead of calling Output_section::output_address because that is slow
6202 // for large output.
6204 template<bool big_endian>
6206 Arm_relobj<big_endian>::simple_input_section_output_address(
6210 if (this->is_output_section_offset_invalid(shndx))
6212 const Output_relaxed_input_section* poris =
6213 os->find_relaxed_input_section(this, shndx);
6214 // We do not handle merged sections here.
6215 gold_assert(poris != NULL);
6216 return poris->address();
6219 return os->address() + this->get_output_section_offset(shndx);
6222 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6223 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6225 template<bool big_endian>
6227 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
6228 const elfcpp::Shdr<32, big_endian>& shdr,
6231 const Symbol_table* symtab)
6233 if (!this->section_is_scannable(shdr, shndx, os, symtab))
6236 // If the section does not cross any 4K-boundaries, it does not need to
6238 Arm_address address = this->simple_input_section_output_address(shndx, os);
6239 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
6245 // Scan a section for Cortex-A8 workaround.
6247 template<bool big_endian>
6249 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
6250 const elfcpp::Shdr<32, big_endian>& shdr,
6253 Target_arm<big_endian>* arm_target)
6255 // Look for the first mapping symbol in this section. It should be
6257 Mapping_symbol_position section_start(shndx, 0);
6258 typename Mapping_symbols_info::const_iterator p =
6259 this->mapping_symbols_info_.lower_bound(section_start);
6261 // There are no mapping symbols for this section. Treat it as a data-only
6263 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
6266 Arm_address output_address =
6267 this->simple_input_section_output_address(shndx, os);
6269 // Get the section contents.
6270 section_size_type input_view_size = 0;
6271 const unsigned char* input_view =
6272 this->section_contents(shndx, &input_view_size, false);
6274 // We need to go through the mapping symbols to determine what to
6275 // scan. There are two reasons. First, we should look at THUMB code and
6276 // THUMB code only. Second, we only want to look at the 4K-page boundary
6277 // to speed up the scanning.
6279 while (p != this->mapping_symbols_info_.end()
6280 && p->first.first == shndx)
6282 typename Mapping_symbols_info::const_iterator next =
6283 this->mapping_symbols_info_.upper_bound(p->first);
6285 // Only scan part of a section with THUMB code.
6286 if (p->second == 't')
6288 // Determine the end of this range.
6289 section_size_type span_start =
6290 convert_to_section_size_type(p->first.second);
6291 section_size_type span_end;
6292 if (next != this->mapping_symbols_info_.end()
6293 && next->first.first == shndx)
6294 span_end = convert_to_section_size_type(next->first.second);
6296 span_end = convert_to_section_size_type(shdr.get_sh_size());
6298 if (((span_start + output_address) & ~0xfffUL)
6299 != ((span_end + output_address - 1) & ~0xfffUL))
6301 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
6302 span_start, span_end,
6312 // Scan relocations for stub generation.
6314 template<bool big_endian>
6316 Arm_relobj<big_endian>::scan_sections_for_stubs(
6317 Target_arm<big_endian>* arm_target,
6318 const Symbol_table* symtab,
6319 const Layout* layout)
6321 unsigned int shnum = this->shnum();
6322 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6324 // Read the section headers.
6325 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6329 // To speed up processing, we set up hash tables for fast lookup of
6330 // input offsets to output addresses.
6331 this->initialize_input_to_output_maps();
6333 const Relobj::Output_sections& out_sections(this->output_sections());
6335 Relocate_info<32, big_endian> relinfo;
6336 relinfo.symtab = symtab;
6337 relinfo.layout = layout;
6338 relinfo.object = this;
6340 // Do relocation stubs scanning.
6341 const unsigned char* p = pshdrs + shdr_size;
6342 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6344 const elfcpp::Shdr<32, big_endian> shdr(p);
6345 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
6348 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6349 Arm_address output_offset = this->get_output_section_offset(index);
6350 Arm_address output_address;
6351 if (output_offset != invalid_address)
6352 output_address = out_sections[index]->address() + output_offset;
6355 // Currently this only happens for a relaxed section.
6356 const Output_relaxed_input_section* poris =
6357 out_sections[index]->find_relaxed_input_section(this, index);
6358 gold_assert(poris != NULL);
6359 output_address = poris->address();
6362 // Get the relocations.
6363 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
6367 // Get the section contents. This does work for the case in which
6368 // we modify the contents of an input section. We need to pass the
6369 // output view under such circumstances.
6370 section_size_type input_view_size = 0;
6371 const unsigned char* input_view =
6372 this->section_contents(index, &input_view_size, false);
6374 relinfo.reloc_shndx = i;
6375 relinfo.data_shndx = index;
6376 unsigned int sh_type = shdr.get_sh_type();
6377 unsigned int reloc_size;
6378 if (sh_type == elfcpp::SHT_REL)
6379 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6381 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6383 Output_section* os = out_sections[index];
6384 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
6385 shdr.get_sh_size() / reloc_size,
6387 output_offset == invalid_address,
6388 input_view, output_address,
6393 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6394 // after its relocation section, if there is one, is processed for
6395 // relocation stubs. Merging this loop with the one above would have been
6396 // complicated since we would have had to make sure that relocation stub
6397 // scanning is done first.
6398 if (arm_target->fix_cortex_a8())
6400 const unsigned char* p = pshdrs + shdr_size;
6401 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6403 const elfcpp::Shdr<32, big_endian> shdr(p);
6404 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
6407 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
6412 // After we've done the relocations, we release the hash tables,
6413 // since we no longer need them.
6414 this->free_input_to_output_maps();
6417 // Count the local symbols. The ARM backend needs to know if a symbol
6418 // is a THUMB function or not. For global symbols, it is easy because
6419 // the Symbol object keeps the ELF symbol type. For local symbol it is
6420 // harder because we cannot access this information. So we override the
6421 // do_count_local_symbol in parent and scan local symbols to mark
6422 // THUMB functions. This is not the most efficient way but I do not want to
6423 // slow down other ports by calling a per symbol target hook inside
6424 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6426 template<bool big_endian>
6428 Arm_relobj<big_endian>::do_count_local_symbols(
6429 Stringpool_template<char>* pool,
6430 Stringpool_template<char>* dynpool)
6432 // We need to fix-up the values of any local symbols whose type are
6435 // Ask parent to count the local symbols.
6436 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool);
6437 const unsigned int loccount = this->local_symbol_count();
6441 // Initialize the thumb function bit-vector.
6442 std::vector<bool> empty_vector(loccount, false);
6443 this->local_symbol_is_thumb_function_.swap(empty_vector);
6445 // Read the symbol table section header.
6446 const unsigned int symtab_shndx = this->symtab_shndx();
6447 elfcpp::Shdr<32, big_endian>
6448 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6449 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6451 // Read the local symbols.
6452 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6453 gold_assert(loccount == symtabshdr.get_sh_info());
6454 off_t locsize = loccount * sym_size;
6455 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6456 locsize, true, true);
6458 // For mapping symbol processing, we need to read the symbol names.
6459 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
6460 if (strtab_shndx >= this->shnum())
6462 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
6466 elfcpp::Shdr<32, big_endian>
6467 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
6468 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
6470 this->error(_("symbol table name section has wrong type: %u"),
6471 static_cast<unsigned int>(strtabshdr.get_sh_type()));
6474 const char* pnames =
6475 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
6476 strtabshdr.get_sh_size(),
6479 // Loop over the local symbols and mark any local symbols pointing
6480 // to THUMB functions.
6482 // Skip the first dummy symbol.
6484 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values =
6485 this->local_values();
6486 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6488 elfcpp::Sym<32, big_endian> sym(psyms);
6489 elfcpp::STT st_type = sym.get_st_type();
6490 Symbol_value<32>& lv((*plocal_values)[i]);
6491 Arm_address input_value = lv.input_value();
6493 // Check to see if this is a mapping symbol.
6494 const char* sym_name = pnames + sym.get_st_name();
6495 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
6498 unsigned int input_shndx =
6499 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary);
6500 gold_assert(is_ordinary);
6502 // Strip of LSB in case this is a THUMB symbol.
6503 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
6504 this->mapping_symbols_info_[msp] = sym_name[1];
6507 if (st_type == elfcpp::STT_ARM_TFUNC
6508 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
6510 // This is a THUMB function. Mark this and canonicalize the
6511 // symbol value by setting LSB.
6512 this->local_symbol_is_thumb_function_[i] = true;
6513 if ((input_value & 1) == 0)
6514 lv.set_input_value(input_value | 1);
6519 // Relocate sections.
6520 template<bool big_endian>
6522 Arm_relobj<big_endian>::do_relocate_sections(
6523 const Symbol_table* symtab,
6524 const Layout* layout,
6525 const unsigned char* pshdrs,
6527 typename Sized_relobj_file<32, big_endian>::Views* pviews)
6529 // Call parent to relocate sections.
6530 Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout,
6531 pshdrs, of, pviews);
6533 // We do not generate stubs if doing a relocatable link.
6534 if (parameters->options().relocatable())
6537 // Relocate stub tables.
6538 unsigned int shnum = this->shnum();
6540 Target_arm<big_endian>* arm_target =
6541 Target_arm<big_endian>::default_target();
6543 Relocate_info<32, big_endian> relinfo;
6544 relinfo.symtab = symtab;
6545 relinfo.layout = layout;
6546 relinfo.object = this;
6548 for (unsigned int i = 1; i < shnum; ++i)
6550 Arm_input_section<big_endian>* arm_input_section =
6551 arm_target->find_arm_input_section(this, i);
6553 if (arm_input_section != NULL
6554 && arm_input_section->is_stub_table_owner()
6555 && !arm_input_section->stub_table()->empty())
6557 // We cannot discard a section if it owns a stub table.
6558 Output_section* os = this->output_section(i);
6559 gold_assert(os != NULL);
6561 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
6562 relinfo.reloc_shdr = NULL;
6563 relinfo.data_shndx = i;
6564 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
6566 gold_assert((*pviews)[i].view != NULL);
6568 // We are passed the output section view. Adjust it to cover the
6570 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6571 gold_assert((stub_table->address() >= (*pviews)[i].address)
6572 && ((stub_table->address() + stub_table->data_size())
6573 <= (*pviews)[i].address + (*pviews)[i].view_size));
6575 off_t offset = stub_table->address() - (*pviews)[i].address;
6576 unsigned char* view = (*pviews)[i].view + offset;
6577 Arm_address address = stub_table->address();
6578 section_size_type view_size = stub_table->data_size();
6580 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6584 // Apply Cortex A8 workaround if applicable.
6585 if (this->section_has_cortex_a8_workaround(i))
6587 unsigned char* view = (*pviews)[i].view;
6588 Arm_address view_address = (*pviews)[i].address;
6589 section_size_type view_size = (*pviews)[i].view_size;
6590 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6592 // Adjust view to cover section.
6593 Output_section* os = this->output_section(i);
6594 gold_assert(os != NULL);
6595 Arm_address section_address =
6596 this->simple_input_section_output_address(i, os);
6597 uint64_t section_size = this->section_size(i);
6599 gold_assert(section_address >= view_address
6600 && ((section_address + section_size)
6601 <= (view_address + view_size)));
6603 unsigned char* section_view = view + (section_address - view_address);
6605 // Apply the Cortex-A8 workaround to the output address range
6606 // corresponding to this input section.
6607 stub_table->apply_cortex_a8_workaround_to_address_range(
6616 // Find the linked text section of an EXIDX section by looking at the first
6617 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6618 // must be linked to its associated code section via the sh_link field of
6619 // its section header. However, some tools are broken and the link is not
6620 // always set. LD just drops such an EXIDX section silently, causing the
6621 // associated code not unwindabled. Here we try a little bit harder to
6622 // discover the linked code section.
6624 // PSHDR points to the section header of a relocation section of an EXIDX
6625 // section. If we can find a linked text section, return true and
6626 // store the text section index in the location PSHNDX. Otherwise
6629 template<bool big_endian>
6631 Arm_relobj<big_endian>::find_linked_text_section(
6632 const unsigned char* pshdr,
6633 const unsigned char* psyms,
6634 unsigned int* pshndx)
6636 elfcpp::Shdr<32, big_endian> shdr(pshdr);
6638 // If there is no relocation, we cannot find the linked text section.
6640 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6641 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6643 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6644 size_t reloc_count = shdr.get_sh_size() / reloc_size;
6646 // Get the relocations.
6647 const unsigned char* prelocs =
6648 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6650 // Find the REL31 relocation for the first word of the first EXIDX entry.
6651 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6653 Arm_address r_offset;
6654 typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6655 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6657 typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6658 r_info = reloc.get_r_info();
6659 r_offset = reloc.get_r_offset();
6663 typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6664 r_info = reloc.get_r_info();
6665 r_offset = reloc.get_r_offset();
6668 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6669 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6672 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6674 || r_sym >= this->local_symbol_count()
6678 // This is the relocation for the first word of the first EXIDX entry.
6679 // We expect to see a local section symbol.
6680 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6681 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6682 if (sym.get_st_type() == elfcpp::STT_SECTION)
6686 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary);
6687 gold_assert(is_ordinary);
6697 // Make an EXIDX input section object for an EXIDX section whose index is
6698 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6699 // is the section index of the linked text section.
6701 template<bool big_endian>
6703 Arm_relobj<big_endian>::make_exidx_input_section(
6705 const elfcpp::Shdr<32, big_endian>& shdr,
6706 unsigned int text_shndx,
6707 const elfcpp::Shdr<32, big_endian>& text_shdr)
6709 // Create an Arm_exidx_input_section object for this EXIDX section.
6710 Arm_exidx_input_section* exidx_input_section =
6711 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6712 shdr.get_sh_addralign(),
6713 text_shdr.get_sh_size());
6715 gold_assert(this->exidx_section_map_[shndx] == NULL);
6716 this->exidx_section_map_[shndx] = exidx_input_section;
6718 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum())
6720 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6721 this->section_name(shndx).c_str(), shndx, text_shndx,
6722 this->name().c_str());
6723 exidx_input_section->set_has_errors();
6725 else if (this->exidx_section_map_[text_shndx] != NULL)
6727 unsigned other_exidx_shndx =
6728 this->exidx_section_map_[text_shndx]->shndx();
6729 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6731 this->section_name(shndx).c_str(), shndx,
6732 this->section_name(other_exidx_shndx).c_str(),
6733 other_exidx_shndx, this->section_name(text_shndx).c_str(),
6734 text_shndx, this->name().c_str());
6735 exidx_input_section->set_has_errors();
6738 this->exidx_section_map_[text_shndx] = exidx_input_section;
6740 // Check section flags of text section.
6741 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0)
6743 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6745 this->section_name(shndx).c_str(), shndx,
6746 this->section_name(text_shndx).c_str(), text_shndx,
6747 this->name().c_str());
6748 exidx_input_section->set_has_errors();
6750 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0)
6751 // I would like to make this an error but currently ld just ignores
6753 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6755 this->section_name(shndx).c_str(), shndx,
6756 this->section_name(text_shndx).c_str(), text_shndx,
6757 this->name().c_str());
6760 // Read the symbol information.
6762 template<bool big_endian>
6764 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6766 // Call parent class to read symbol information.
6767 this->base_read_symbols(sd);
6769 // If this input file is a binary file, it has no processor
6770 // specific flags and attributes section.
6771 Input_file::Format format = this->input_file()->format();
6772 if (format != Input_file::FORMAT_ELF)
6774 gold_assert(format == Input_file::FORMAT_BINARY);
6775 this->merge_flags_and_attributes_ = false;
6779 // Read processor-specific flags in ELF file header.
6780 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6781 elfcpp::Elf_sizes<32>::ehdr_size,
6783 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6784 this->processor_specific_flags_ = ehdr.get_e_flags();
6786 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6788 std::vector<unsigned int> deferred_exidx_sections;
6789 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6790 const unsigned char* pshdrs = sd->section_headers->data();
6791 const unsigned char* ps = pshdrs + shdr_size;
6792 bool must_merge_flags_and_attributes = false;
6793 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6795 elfcpp::Shdr<32, big_endian> shdr(ps);
6797 // Sometimes an object has no contents except the section name string
6798 // table and an empty symbol table with the undefined symbol. We
6799 // don't want to merge processor-specific flags from such an object.
6800 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB)
6802 // Symbol table is not empty.
6803 const elfcpp::Elf_types<32>::Elf_WXword sym_size =
6804 elfcpp::Elf_sizes<32>::sym_size;
6805 if (shdr.get_sh_size() > sym_size)
6806 must_merge_flags_and_attributes = true;
6808 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB)
6809 // If this is neither an empty symbol table nor a string table,
6811 must_merge_flags_and_attributes = true;
6813 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6815 gold_assert(this->attributes_section_data_ == NULL);
6816 section_offset_type section_offset = shdr.get_sh_offset();
6817 section_size_type section_size =
6818 convert_to_section_size_type(shdr.get_sh_size());
6819 const unsigned char* view =
6820 this->get_view(section_offset, section_size, true, false);
6821 this->attributes_section_data_ =
6822 new Attributes_section_data(view, section_size);
6824 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6826 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6827 if (text_shndx == elfcpp::SHN_UNDEF)
6828 deferred_exidx_sections.push_back(i);
6831 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6832 + text_shndx * shdr_size);
6833 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr);
6835 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6836 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0)
6837 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6838 this->section_name(i).c_str(), this->name().c_str());
6843 if (!must_merge_flags_and_attributes)
6845 gold_assert(deferred_exidx_sections.empty());
6846 this->merge_flags_and_attributes_ = false;
6850 // Some tools are broken and they do not set the link of EXIDX sections.
6851 // We look at the first relocation to figure out the linked sections.
6852 if (!deferred_exidx_sections.empty())
6854 // We need to go over the section headers again to find the mapping
6855 // from sections being relocated to their relocation sections. This is
6856 // a bit inefficient as we could do that in the loop above. However,
6857 // we do not expect any deferred EXIDX sections normally. So we do not
6858 // want to slow down the most common path.
6859 typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
6860 Reloc_map reloc_map;
6861 ps = pshdrs + shdr_size;
6862 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6864 elfcpp::Shdr<32, big_endian> shdr(ps);
6865 elfcpp::Elf_Word sh_type = shdr.get_sh_type();
6866 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
6868 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
6869 if (info_shndx >= this->shnum())
6870 gold_error(_("relocation section %u has invalid info %u"),
6872 Reloc_map::value_type value(info_shndx, i);
6873 std::pair<Reloc_map::iterator, bool> result =
6874 reloc_map.insert(value);
6876 gold_error(_("section %u has multiple relocation sections "
6878 info_shndx, i, reloc_map[info_shndx]);
6882 // Read the symbol table section header.
6883 const unsigned int symtab_shndx = this->symtab_shndx();
6884 elfcpp::Shdr<32, big_endian>
6885 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6886 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6888 // Read the local symbols.
6889 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6890 const unsigned int loccount = this->local_symbol_count();
6891 gold_assert(loccount == symtabshdr.get_sh_info());
6892 off_t locsize = loccount * sym_size;
6893 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6894 locsize, true, true);
6896 // Process the deferred EXIDX sections.
6897 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
6899 unsigned int shndx = deferred_exidx_sections[i];
6900 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
6901 unsigned int text_shndx = elfcpp::SHN_UNDEF;
6902 Reloc_map::const_iterator it = reloc_map.find(shndx);
6903 if (it != reloc_map.end())
6904 find_linked_text_section(pshdrs + it->second * shdr_size,
6905 psyms, &text_shndx);
6906 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6907 + text_shndx * shdr_size);
6908 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr);
6913 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6914 // sections for unwinding. These sections are referenced implicitly by
6915 // text sections linked in the section headers. If we ignore these implicit
6916 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6917 // will be garbage-collected incorrectly. Hence we override the same function
6918 // in the base class to handle these implicit references.
6920 template<bool big_endian>
6922 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6924 Read_relocs_data* rd)
6926 // First, call base class method to process relocations in this object.
6927 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6929 // If --gc-sections is not specified, there is nothing more to do.
6930 // This happens when --icf is used but --gc-sections is not.
6931 if (!parameters->options().gc_sections())
6934 unsigned int shnum = this->shnum();
6935 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6936 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6940 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6941 // to these from the linked text sections.
6942 const unsigned char* ps = pshdrs + shdr_size;
6943 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6945 elfcpp::Shdr<32, big_endian> shdr(ps);
6946 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6948 // Found an .ARM.exidx section, add it to the set of reachable
6949 // sections from its linked text section.
6950 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6951 symtab->gc()->add_reference(this, text_shndx, this, i);
6956 // Update output local symbol count. Owing to EXIDX entry merging, some local
6957 // symbols will be removed in output. Adjust output local symbol count
6958 // accordingly. We can only changed the static output local symbol count. It
6959 // is too late to change the dynamic symbols.
6961 template<bool big_endian>
6963 Arm_relobj<big_endian>::update_output_local_symbol_count()
6965 // Caller should check that this needs updating. We want caller checking
6966 // because output_local_symbol_count_needs_update() is most likely inlined.
6967 gold_assert(this->output_local_symbol_count_needs_update_);
6969 gold_assert(this->symtab_shndx() != -1U);
6970 if (this->symtab_shndx() == 0)
6972 // This object has no symbols. Weird but legal.
6976 // Read the symbol table section header.
6977 const unsigned int symtab_shndx = this->symtab_shndx();
6978 elfcpp::Shdr<32, big_endian>
6979 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6980 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6982 // Read the local symbols.
6983 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6984 const unsigned int loccount = this->local_symbol_count();
6985 gold_assert(loccount == symtabshdr.get_sh_info());
6986 off_t locsize = loccount * sym_size;
6987 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6988 locsize, true, true);
6990 // Loop over the local symbols.
6992 typedef typename Sized_relobj_file<32, big_endian>::Output_sections
6994 const Output_sections& out_sections(this->output_sections());
6995 unsigned int shnum = this->shnum();
6996 unsigned int count = 0;
6997 // Skip the first, dummy, symbol.
6999 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
7001 elfcpp::Sym<32, big_endian> sym(psyms);
7003 Symbol_value<32>& lv((*this->local_values())[i]);
7005 // This local symbol was already discarded by do_count_local_symbols.
7006 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry())
7010 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
7015 Output_section* os = out_sections[shndx];
7017 // This local symbol no longer has an output section. Discard it.
7020 lv.set_no_output_symtab_entry();
7024 // Currently we only discard parts of EXIDX input sections.
7025 // We explicitly check for a merged EXIDX input section to avoid
7026 // calling Output_section_data::output_offset unless necessary.
7027 if ((this->get_output_section_offset(shndx) == invalid_address)
7028 && (this->exidx_input_section_by_shndx(shndx) != NULL))
7030 section_offset_type output_offset =
7031 os->output_offset(this, shndx, lv.input_value());
7032 if (output_offset == -1)
7034 // This symbol is defined in a part of an EXIDX input section
7035 // that is discarded due to entry merging.
7036 lv.set_no_output_symtab_entry();
7045 this->set_output_local_symbol_count(count);
7046 this->output_local_symbol_count_needs_update_ = false;
7049 // Arm_dynobj methods.
7051 // Read the symbol information.
7053 template<bool big_endian>
7055 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
7057 // Call parent class to read symbol information.
7058 this->base_read_symbols(sd);
7060 // Read processor-specific flags in ELF file header.
7061 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
7062 elfcpp::Elf_sizes<32>::ehdr_size,
7064 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
7065 this->processor_specific_flags_ = ehdr.get_e_flags();
7067 // Read the attributes section if there is one.
7068 // We read from the end because gas seems to put it near the end of
7069 // the section headers.
7070 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
7071 const unsigned char* ps =
7072 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
7073 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
7075 elfcpp::Shdr<32, big_endian> shdr(ps);
7076 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
7078 section_offset_type section_offset = shdr.get_sh_offset();
7079 section_size_type section_size =
7080 convert_to_section_size_type(shdr.get_sh_size());
7081 const unsigned char* view =
7082 this->get_view(section_offset, section_size, true, false);
7083 this->attributes_section_data_ =
7084 new Attributes_section_data(view, section_size);
7090 // Stub_addend_reader methods.
7092 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7094 template<bool big_endian>
7095 elfcpp::Elf_types<32>::Elf_Swxword
7096 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
7097 unsigned int r_type,
7098 const unsigned char* view,
7099 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
7101 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
7105 case elfcpp::R_ARM_CALL:
7106 case elfcpp::R_ARM_JUMP24:
7107 case elfcpp::R_ARM_PLT32:
7109 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7110 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7111 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
7112 return Bits<26>::sign_extend32(val << 2);
7115 case elfcpp::R_ARM_THM_CALL:
7116 case elfcpp::R_ARM_THM_JUMP24:
7117 case elfcpp::R_ARM_THM_XPC22:
7119 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7120 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7121 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7122 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7123 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
7126 case elfcpp::R_ARM_THM_JUMP19:
7128 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7129 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7130 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7131 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7132 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
7140 // Arm_output_data_got methods.
7142 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7143 // The first one is initialized to be 1, which is the module index for
7144 // the main executable and the second one 0. A reloc of the type
7145 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7146 // be applied by gold. GSYM is a global symbol.
7148 template<bool big_endian>
7150 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7151 unsigned int got_type,
7154 if (gsym->has_got_offset(got_type))
7157 // We are doing a static link. Just mark it as belong to module 1,
7159 unsigned int got_offset = this->add_constant(1);
7160 gsym->set_got_offset(got_type, got_offset);
7161 got_offset = this->add_constant(0);
7162 this->static_relocs_.push_back(Static_reloc(got_offset,
7163 elfcpp::R_ARM_TLS_DTPOFF32,
7167 // Same as the above but for a local symbol.
7169 template<bool big_endian>
7171 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7172 unsigned int got_type,
7173 Sized_relobj_file<32, big_endian>* object,
7176 if (object->local_has_got_offset(index, got_type))
7179 // We are doing a static link. Just mark it as belong to module 1,
7181 unsigned int got_offset = this->add_constant(1);
7182 object->set_local_got_offset(index, got_type, got_offset);
7183 got_offset = this->add_constant(0);
7184 this->static_relocs_.push_back(Static_reloc(got_offset,
7185 elfcpp::R_ARM_TLS_DTPOFF32,
7189 template<bool big_endian>
7191 Arm_output_data_got<big_endian>::do_write(Output_file* of)
7193 // Call parent to write out GOT.
7194 Output_data_got<32, big_endian>::do_write(of);
7196 // We are done if there is no fix up.
7197 if (this->static_relocs_.empty())
7200 gold_assert(parameters->doing_static_link());
7202 const off_t offset = this->offset();
7203 const section_size_type oview_size =
7204 convert_to_section_size_type(this->data_size());
7205 unsigned char* const oview = of->get_output_view(offset, oview_size);
7207 Output_segment* tls_segment = this->layout_->tls_segment();
7208 gold_assert(tls_segment != NULL);
7210 // The thread pointer $tp points to the TCB, which is followed by the
7211 // TLS. So we need to adjust $tp relative addressing by this amount.
7212 Arm_address aligned_tcb_size =
7213 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
7215 for (size_t i = 0; i < this->static_relocs_.size(); ++i)
7217 Static_reloc& reloc(this->static_relocs_[i]);
7220 if (!reloc.symbol_is_global())
7222 Sized_relobj_file<32, big_endian>* object = reloc.relobj();
7223 const Symbol_value<32>* psymval =
7224 reloc.relobj()->local_symbol(reloc.index());
7226 // We are doing static linking. Issue an error and skip this
7227 // relocation if the symbol is undefined or in a discarded_section.
7229 unsigned int shndx = psymval->input_shndx(&is_ordinary);
7230 if ((shndx == elfcpp::SHN_UNDEF)
7232 && shndx != elfcpp::SHN_UNDEF
7233 && !object->is_section_included(shndx)
7234 && !this->symbol_table_->is_section_folded(object, shndx)))
7236 gold_error(_("undefined or discarded local symbol %u from "
7237 " object %s in GOT"),
7238 reloc.index(), reloc.relobj()->name().c_str());
7242 value = psymval->value(object, 0);
7246 const Symbol* gsym = reloc.symbol();
7247 gold_assert(gsym != NULL);
7248 if (gsym->is_forwarder())
7249 gsym = this->symbol_table_->resolve_forwards(gsym);
7251 // We are doing static linking. Issue an error and skip this
7252 // relocation if the symbol is undefined or in a discarded_section
7253 // unless it is a weakly_undefined symbol.
7254 if ((gsym->is_defined_in_discarded_section()
7255 || gsym->is_undefined())
7256 && !gsym->is_weak_undefined())
7258 gold_error(_("undefined or discarded symbol %s in GOT"),
7263 if (!gsym->is_weak_undefined())
7265 const Sized_symbol<32>* sym =
7266 static_cast<const Sized_symbol<32>*>(gsym);
7267 value = sym->value();
7273 unsigned got_offset = reloc.got_offset();
7274 gold_assert(got_offset < oview_size);
7276 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7277 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset);
7279 switch (reloc.r_type())
7281 case elfcpp::R_ARM_TLS_DTPOFF32:
7284 case elfcpp::R_ARM_TLS_TPOFF32:
7285 x = value + aligned_tcb_size;
7290 elfcpp::Swap<32, big_endian>::writeval(wv, x);
7293 of->write_output_view(offset, oview_size, oview);
7296 // A class to handle the PLT data.
7297 // This is an abstract base class that handles most of the linker details
7298 // but does not know the actual contents of PLT entries. The derived
7299 // classes below fill in those details.
7301 template<bool big_endian>
7302 class Output_data_plt_arm : public Output_section_data
7305 // Unlike aarch64, which records symbol value in "addend" field of relocations
7306 // and could be done at the same time an IRelative reloc is created for the
7307 // symbol, arm puts the symbol value into "GOT" table, which, however, is
7308 // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7309 // to keep necessary symbol information for later use in do_write. We usually
7310 // have only a very limited number of ifuncs, so the extra data required here
7313 struct IRelative_data
7315 IRelative_data(Sized_symbol<32>* sized_symbol)
7316 : symbol_is_global_(true)
7318 u_.global = sized_symbol;
7321 IRelative_data(Sized_relobj_file<32, big_endian>* relobj,
7323 : symbol_is_global_(false)
7325 u_.local.relobj = relobj;
7326 u_.local.index = index;
7331 Sized_symbol<32>* global;
7335 Sized_relobj_file<32, big_endian>* relobj;
7340 bool symbol_is_global_;
7343 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
7346 Output_data_plt_arm(Layout* layout, uint64_t addralign,
7347 Arm_output_data_got<big_endian>* got,
7348 Output_data_space* got_plt,
7349 Output_data_space* got_irelative);
7351 // Add an entry to the PLT.
7353 add_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym);
7355 // Add the relocation for a plt entry.
7357 add_relocation(Symbol_table* symtab, Layout* layout,
7358 Symbol* gsym, unsigned int got_offset);
7360 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7362 add_local_ifunc_entry(Symbol_table* symtab, Layout*,
7363 Sized_relobj_file<32, big_endian>* relobj,
7364 unsigned int local_sym_index);
7366 // Return the .rel.plt section data.
7367 const Reloc_section*
7369 { return this->rel_; }
7371 // Return the PLT relocation container for IRELATIVE.
7373 rel_irelative(Symbol_table*, Layout*);
7375 // Return the number of PLT entries.
7378 { return this->count_ + this->irelative_count_; }
7380 // Return the offset of the first non-reserved PLT entry.
7382 first_plt_entry_offset() const
7383 { return this->do_first_plt_entry_offset(); }
7385 // Return the size of a PLT entry.
7387 get_plt_entry_size() const
7388 { return this->do_get_plt_entry_size(); }
7390 // Return the PLT address for globals.
7392 address_for_global(const Symbol*) const;
7394 // Return the PLT address for locals.
7396 address_for_local(const Relobj*, unsigned int symndx) const;
7399 // Fill in the first PLT entry.
7401 fill_first_plt_entry(unsigned char* pov,
7402 Arm_address got_address,
7403 Arm_address plt_address)
7404 { this->do_fill_first_plt_entry(pov, got_address, plt_address); }
7407 fill_plt_entry(unsigned char* pov,
7408 Arm_address got_address,
7409 Arm_address plt_address,
7410 unsigned int got_offset,
7411 unsigned int plt_offset)
7412 { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); }
7414 virtual unsigned int
7415 do_first_plt_entry_offset() const = 0;
7417 virtual unsigned int
7418 do_get_plt_entry_size() const = 0;
7421 do_fill_first_plt_entry(unsigned char* pov,
7422 Arm_address got_address,
7423 Arm_address plt_address) = 0;
7426 do_fill_plt_entry(unsigned char* pov,
7427 Arm_address got_address,
7428 Arm_address plt_address,
7429 unsigned int got_offset,
7430 unsigned int plt_offset) = 0;
7433 do_adjust_output_section(Output_section* os);
7435 // Write to a map file.
7437 do_print_to_mapfile(Mapfile* mapfile) const
7438 { mapfile->print_output_data(this, _("** PLT")); }
7441 // Set the final size.
7443 set_final_data_size()
7445 this->set_data_size(this->first_plt_entry_offset()
7446 + ((this->count_ + this->irelative_count_)
7447 * this->get_plt_entry_size()));
7450 // Write out the PLT data.
7452 do_write(Output_file*);
7454 // Record irelative symbol data.
7455 void insert_irelative_data(const IRelative_data& idata)
7456 { irelative_data_vec_.push_back(idata); }
7458 // The reloc section.
7459 Reloc_section* rel_;
7460 // The IRELATIVE relocs, if necessary. These must follow the
7461 // regular PLT relocations.
7462 Reloc_section* irelative_rel_;
7463 // The .got section.
7464 Arm_output_data_got<big_endian>* got_;
7465 // The .got.plt section.
7466 Output_data_space* got_plt_;
7467 // The part of the .got.plt section used for IRELATIVE relocs.
7468 Output_data_space* got_irelative_;
7469 // The number of PLT entries.
7470 unsigned int count_;
7471 // Number of PLT entries with R_ARM_IRELATIVE relocs. These
7472 // follow the regular PLT entries.
7473 unsigned int irelative_count_;
7474 // Vector for irelative data.
7475 typedef std::vector<IRelative_data> IRelative_data_vec;
7476 IRelative_data_vec irelative_data_vec_;
7479 // Create the PLT section. The ordinary .got section is an argument,
7480 // since we need to refer to the start. We also create our own .got
7481 // section just for PLT entries.
7483 template<bool big_endian>
7484 Output_data_plt_arm<big_endian>::Output_data_plt_arm(
7485 Layout* layout, uint64_t addralign,
7486 Arm_output_data_got<big_endian>* got,
7487 Output_data_space* got_plt,
7488 Output_data_space* got_irelative)
7489 : Output_section_data(addralign), irelative_rel_(NULL),
7490 got_(got), got_plt_(got_plt), got_irelative_(got_irelative),
7491 count_(0), irelative_count_(0)
7493 this->rel_ = new Reloc_section(false);
7494 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
7495 elfcpp::SHF_ALLOC, this->rel_,
7496 ORDER_DYNAMIC_PLT_RELOCS, false);
7499 template<bool big_endian>
7501 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
7506 // Add an entry to the PLT.
7508 template<bool big_endian>
7510 Output_data_plt_arm<big_endian>::add_entry(Symbol_table* symtab,
7514 gold_assert(!gsym->has_plt_offset());
7516 unsigned int* entry_count;
7517 Output_section_data_build* got;
7519 // We have 2 different types of plt entry here, normal and ifunc.
7521 // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7522 // 1st entry offset would be 20, the second 32, third 44 ... etc.
7524 // For ifunc plt, the offset begins with 0. So the first offset would 0,
7525 // second 12, third 24 ... etc.
7527 // IFunc plt entries *always* come after *normal* plt entries.
7529 // Notice, when computing the plt address of a certain symbol, "plt_address +
7530 // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7531 // target->plt_address_for_local() instead.
7533 int begin_offset = 0;
7534 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7535 && gsym->can_use_relative_reloc(false))
7537 entry_count = &this->irelative_count_;
7538 got = this->got_irelative_;
7539 // For irelative plt entries, offset is relative to the end of normal plt
7540 // entries, so it starts from 0.
7542 // Record symbol information.
7543 this->insert_irelative_data(
7544 IRelative_data(symtab->get_sized_symbol<32>(gsym)));
7548 entry_count = &this->count_;
7549 got = this->got_plt_;
7550 // Note that for normal plt entries, when setting the PLT offset we skip
7551 // the initial reserved PLT entry.
7552 begin_offset = this->first_plt_entry_offset();
7555 gsym->set_plt_offset(begin_offset
7556 + (*entry_count) * this->get_plt_entry_size());
7560 section_offset_type got_offset = got->current_data_size();
7562 // Every PLT entry needs a GOT entry which points back to the PLT
7563 // entry (this will be changed by the dynamic linker, normally
7564 // lazily when the function is called).
7565 got->set_current_data_size(got_offset + 4);
7567 // Every PLT entry needs a reloc.
7568 this->add_relocation(symtab, layout, gsym, got_offset);
7570 // Note that we don't need to save the symbol. The contents of the
7571 // PLT are independent of which symbols are used. The symbols only
7572 // appear in the relocations.
7575 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return
7578 template<bool big_endian>
7580 Output_data_plt_arm<big_endian>::add_local_ifunc_entry(
7581 Symbol_table* symtab,
7583 Sized_relobj_file<32, big_endian>* relobj,
7584 unsigned int local_sym_index)
7586 this->insert_irelative_data(IRelative_data(relobj, local_sym_index));
7588 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7589 // no longer correct. Use target->plt_address_for_local() instead.
7590 unsigned int plt_offset = this->irelative_count_ * this->get_plt_entry_size();
7591 ++this->irelative_count_;
7593 section_offset_type got_offset = this->got_irelative_->current_data_size();
7595 // Every PLT entry needs a GOT entry which points back to the PLT
7597 this->got_irelative_->set_current_data_size(got_offset + 4);
7600 // Every PLT entry needs a reloc.
7601 Reloc_section* rel = this->rel_irelative(symtab, layout);
7602 rel->add_symbolless_local_addend(relobj, local_sym_index,
7603 elfcpp::R_ARM_IRELATIVE,
7604 this->got_irelative_, got_offset);
7609 // Add the relocation for a PLT entry.
7611 template<bool big_endian>
7613 Output_data_plt_arm<big_endian>::add_relocation(
7614 Symbol_table* symtab, Layout* layout, Symbol* gsym, unsigned int got_offset)
7616 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7617 && gsym->can_use_relative_reloc(false))
7619 Reloc_section* rel = this->rel_irelative(symtab, layout);
7620 rel->add_symbolless_global_addend(gsym, elfcpp::R_ARM_IRELATIVE,
7621 this->got_irelative_, got_offset);
7625 gsym->set_needs_dynsym_entry();
7626 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
7632 // Create the irelative relocation data.
7634 template<bool big_endian>
7635 typename Output_data_plt_arm<big_endian>::Reloc_section*
7636 Output_data_plt_arm<big_endian>::rel_irelative(Symbol_table* symtab,
7639 if (this->irelative_rel_ == NULL)
7641 // Since irelative relocations goes into 'rel.dyn', we delegate the
7642 // creation of irelative_rel_ to where rel_dyn section gets created.
7643 Target_arm<big_endian>* arm_target =
7644 Target_arm<big_endian>::default_target();
7645 this->irelative_rel_ = arm_target->rel_irelative_section(layout);
7647 // Make sure we have a place for the TLSDESC relocations, in
7648 // case we see any later on.
7649 // this->rel_tlsdesc(layout);
7650 if (parameters->doing_static_link())
7652 // A statically linked executable will only have a .rel.plt section to
7653 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library
7654 // will use these symbols to locate the IRELATIVE relocs at program
7656 symtab->define_in_output_data("__rel_iplt_start", NULL,
7657 Symbol_table::PREDEFINED,
7658 this->irelative_rel_, 0, 0,
7659 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7660 elfcpp::STV_HIDDEN, 0, false, true);
7661 symtab->define_in_output_data("__rel_iplt_end", NULL,
7662 Symbol_table::PREDEFINED,
7663 this->irelative_rel_, 0, 0,
7664 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7665 elfcpp::STV_HIDDEN, 0, true, true);
7668 return this->irelative_rel_;
7672 // Return the PLT address for a global symbol.
7674 template<bool big_endian>
7676 Output_data_plt_arm<big_endian>::address_for_global(const Symbol* gsym) const
7678 uint64_t begin_offset = 0;
7679 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7680 && gsym->can_use_relative_reloc(false))
7682 begin_offset = (this->first_plt_entry_offset() +
7683 this->count_ * this->get_plt_entry_size());
7685 return this->address() + begin_offset + gsym->plt_offset();
7689 // Return the PLT address for a local symbol. These are always
7690 // IRELATIVE relocs.
7692 template<bool big_endian>
7694 Output_data_plt_arm<big_endian>::address_for_local(
7695 const Relobj* object,
7696 unsigned int r_sym) const
7698 return (this->address()
7699 + this->first_plt_entry_offset()
7700 + this->count_ * this->get_plt_entry_size()
7701 + object->local_plt_offset(r_sym));
7705 template<bool big_endian>
7706 class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian>
7709 Output_data_plt_arm_standard(Layout* layout,
7710 Arm_output_data_got<big_endian>* got,
7711 Output_data_space* got_plt,
7712 Output_data_space* got_irelative)
7713 : Output_data_plt_arm<big_endian>(layout, 4, got, got_plt, got_irelative)
7717 // Return the offset of the first non-reserved PLT entry.
7718 virtual unsigned int
7719 do_first_plt_entry_offset() const
7720 { return sizeof(first_plt_entry); }
7722 // Return the size of a PLT entry.
7723 virtual unsigned int
7724 do_get_plt_entry_size() const
7725 { return sizeof(plt_entry); }
7728 do_fill_first_plt_entry(unsigned char* pov,
7729 Arm_address got_address,
7730 Arm_address plt_address);
7733 do_fill_plt_entry(unsigned char* pov,
7734 Arm_address got_address,
7735 Arm_address plt_address,
7736 unsigned int got_offset,
7737 unsigned int plt_offset);
7740 // Template for the first PLT entry.
7741 static const uint32_t first_plt_entry[5];
7743 // Template for subsequent PLT entries.
7744 static const uint32_t plt_entry[3];
7748 // FIXME: This is not very flexible. Right now this has only been tested
7749 // on armv5te. If we are to support additional architecture features like
7750 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7752 // The first entry in the PLT.
7753 template<bool big_endian>
7754 const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] =
7756 0xe52de004, // str lr, [sp, #-4]!
7757 0xe59fe004, // ldr lr, [pc, #4]
7758 0xe08fe00e, // add lr, pc, lr
7759 0xe5bef008, // ldr pc, [lr, #8]!
7760 0x00000000, // &GOT[0] - .
7763 template<bool big_endian>
7765 Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
7767 Arm_address got_address,
7768 Arm_address plt_address)
7770 // Write first PLT entry. All but the last word are constants.
7771 const size_t num_first_plt_words = (sizeof(first_plt_entry)
7772 / sizeof(plt_entry[0]));
7773 for (size_t i = 0; i < num_first_plt_words - 1; i++)
7774 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
7775 // Last word in first PLT entry is &GOT[0] - .
7776 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
7777 got_address - (plt_address + 16));
7780 // Subsequent entries in the PLT.
7782 template<bool big_endian>
7783 const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] =
7785 0xe28fc600, // add ip, pc, #0xNN00000
7786 0xe28cca00, // add ip, ip, #0xNN000
7787 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7790 template<bool big_endian>
7792 Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
7794 Arm_address got_address,
7795 Arm_address plt_address,
7796 unsigned int got_offset,
7797 unsigned int plt_offset)
7799 int32_t offset = ((got_address + got_offset)
7800 - (plt_address + plt_offset + 8));
7802 gold_assert(offset >= 0 && offset < 0x0fffffff);
7803 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
7804 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
7805 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
7806 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
7807 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
7808 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
7811 // Write out the PLT. This uses the hand-coded instructions above,
7812 // and adjusts them as needed. This is all specified by the arm ELF
7813 // Processor Supplement.
7815 template<bool big_endian>
7817 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
7819 const off_t offset = this->offset();
7820 const section_size_type oview_size =
7821 convert_to_section_size_type(this->data_size());
7822 unsigned char* const oview = of->get_output_view(offset, oview_size);
7824 const off_t got_file_offset = this->got_plt_->offset();
7825 gold_assert(got_file_offset + this->got_plt_->data_size()
7826 == this->got_irelative_->offset());
7827 const section_size_type got_size =
7828 convert_to_section_size_type(this->got_plt_->data_size()
7829 + this->got_irelative_->data_size());
7830 unsigned char* const got_view = of->get_output_view(got_file_offset,
7832 unsigned char* pov = oview;
7834 Arm_address plt_address = this->address();
7835 Arm_address got_address = this->got_plt_->address();
7837 // Write first PLT entry.
7838 this->fill_first_plt_entry(pov, got_address, plt_address);
7839 pov += this->first_plt_entry_offset();
7841 unsigned char* got_pov = got_view;
7843 memset(got_pov, 0, 12);
7846 unsigned int plt_offset = this->first_plt_entry_offset();
7847 unsigned int got_offset = 12;
7848 const unsigned int count = this->count_ + this->irelative_count_;
7849 gold_assert(this->irelative_count_ == this->irelative_data_vec_.size());
7850 for (unsigned int i = 0;
7853 pov += this->get_plt_entry_size(),
7855 plt_offset += this->get_plt_entry_size(),
7858 // Set and adjust the PLT entry itself.
7859 this->fill_plt_entry(pov, got_address, plt_address,
7860 got_offset, plt_offset);
7863 if (i < this->count_)
7865 // For non-irelative got entries, the value is the beginning of plt.
7866 value = plt_address;
7870 // For irelative got entries, the value is the (global/local) symbol
7872 const IRelative_data& idata =
7873 this->irelative_data_vec_[i - this->count_];
7874 if (idata.symbol_is_global_)
7876 // Set the entry in the GOT for irelative symbols. The content is
7877 // the address of the ifunc, not the address of plt start.
7878 const Sized_symbol<32>* sized_symbol = idata.u_.global;
7879 gold_assert(sized_symbol->type() == elfcpp::STT_GNU_IFUNC);
7880 value = sized_symbol->value();
7884 value = idata.u_.local.relobj->local_symbol_value(
7885 idata.u_.local.index, 0);
7888 elfcpp::Swap<32, big_endian>::writeval(got_pov, value);
7891 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
7892 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
7894 of->write_output_view(offset, oview_size, oview);
7895 of->write_output_view(got_file_offset, got_size, got_view);
7899 // Create a PLT entry for a global symbol.
7901 template<bool big_endian>
7903 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
7906 if (gsym->has_plt_offset())
7909 if (this->plt_ == NULL)
7910 this->make_plt_section(symtab, layout);
7912 this->plt_->add_entry(symtab, layout, gsym);
7916 // Create the PLT section.
7917 template<bool big_endian>
7919 Target_arm<big_endian>::make_plt_section(
7920 Symbol_table* symtab, Layout* layout)
7922 if (this->plt_ == NULL)
7924 // Create the GOT section first.
7925 this->got_section(symtab, layout);
7927 // GOT for irelatives is create along with got.plt.
7928 gold_assert(this->got_ != NULL
7929 && this->got_plt_ != NULL
7930 && this->got_irelative_ != NULL);
7931 this->plt_ = this->make_data_plt(layout, this->got_, this->got_plt_,
7932 this->got_irelative_);
7934 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
7936 | elfcpp::SHF_EXECINSTR),
7937 this->plt_, ORDER_PLT, false);
7938 symtab->define_in_output_data("$a", NULL,
7939 Symbol_table::PREDEFINED,
7941 0, 0, elfcpp::STT_NOTYPE,
7943 elfcpp::STV_DEFAULT, 0,
7949 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
7951 template<bool big_endian>
7953 Target_arm<big_endian>::make_local_ifunc_plt_entry(
7954 Symbol_table* symtab, Layout* layout,
7955 Sized_relobj_file<32, big_endian>* relobj,
7956 unsigned int local_sym_index)
7958 if (relobj->local_has_plt_offset(local_sym_index))
7960 if (this->plt_ == NULL)
7961 this->make_plt_section(symtab, layout);
7962 unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout,
7965 relobj->set_local_plt_offset(local_sym_index, plt_offset);
7969 // Return the number of entries in the PLT.
7971 template<bool big_endian>
7973 Target_arm<big_endian>::plt_entry_count() const
7975 if (this->plt_ == NULL)
7977 return this->plt_->entry_count();
7980 // Return the offset of the first non-reserved PLT entry.
7982 template<bool big_endian>
7984 Target_arm<big_endian>::first_plt_entry_offset() const
7986 return this->plt_->first_plt_entry_offset();
7989 // Return the size of each PLT entry.
7991 template<bool big_endian>
7993 Target_arm<big_endian>::plt_entry_size() const
7995 return this->plt_->get_plt_entry_size();
7998 // Get the section to use for TLS_DESC relocations.
8000 template<bool big_endian>
8001 typename Target_arm<big_endian>::Reloc_section*
8002 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const
8004 return this->plt_section()->rel_tls_desc(layout);
8007 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8009 template<bool big_endian>
8011 Target_arm<big_endian>::define_tls_base_symbol(
8012 Symbol_table* symtab,
8015 if (this->tls_base_symbol_defined_)
8018 Output_segment* tls_segment = layout->tls_segment();
8019 if (tls_segment != NULL)
8021 bool is_exec = parameters->options().output_is_executable();
8022 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL,
8023 Symbol_table::PREDEFINED,
8027 elfcpp::STV_HIDDEN, 0,
8029 ? Symbol::SEGMENT_END
8030 : Symbol::SEGMENT_START),
8033 this->tls_base_symbol_defined_ = true;
8036 // Create a GOT entry for the TLS module index.
8038 template<bool big_endian>
8040 Target_arm<big_endian>::got_mod_index_entry(
8041 Symbol_table* symtab,
8043 Sized_relobj_file<32, big_endian>* object)
8045 if (this->got_mod_index_offset_ == -1U)
8047 gold_assert(symtab != NULL && layout != NULL && object != NULL);
8048 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout);
8049 unsigned int got_offset;
8050 if (!parameters->doing_static_link())
8052 got_offset = got->add_constant(0);
8053 Reloc_section* rel_dyn = this->rel_dyn_section(layout);
8054 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got,
8059 // We are doing a static link. Just mark it as belong to module 1,
8061 got_offset = got->add_constant(1);
8064 got->add_constant(0);
8065 this->got_mod_index_offset_ = got_offset;
8067 return this->got_mod_index_offset_;
8070 // Optimize the TLS relocation type based on what we know about the
8071 // symbol. IS_FINAL is true if the final address of this symbol is
8072 // known at link time.
8074 template<bool big_endian>
8075 tls::Tls_optimization
8076 Target_arm<big_endian>::optimize_tls_reloc(bool, int)
8078 // FIXME: Currently we do not do any TLS optimization.
8079 return tls::TLSOPT_NONE;
8082 // Get the Reference_flags for a particular relocation.
8084 template<bool big_endian>
8086 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type)
8090 case elfcpp::R_ARM_NONE:
8091 case elfcpp::R_ARM_V4BX:
8092 case elfcpp::R_ARM_GNU_VTENTRY:
8093 case elfcpp::R_ARM_GNU_VTINHERIT:
8094 // No symbol reference.
8097 case elfcpp::R_ARM_ABS32:
8098 case elfcpp::R_ARM_ABS16:
8099 case elfcpp::R_ARM_ABS12:
8100 case elfcpp::R_ARM_THM_ABS5:
8101 case elfcpp::R_ARM_ABS8:
8102 case elfcpp::R_ARM_BASE_ABS:
8103 case elfcpp::R_ARM_MOVW_ABS_NC:
8104 case elfcpp::R_ARM_MOVT_ABS:
8105 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8106 case elfcpp::R_ARM_THM_MOVT_ABS:
8107 case elfcpp::R_ARM_ABS32_NOI:
8108 return Symbol::ABSOLUTE_REF;
8110 case elfcpp::R_ARM_REL32:
8111 case elfcpp::R_ARM_LDR_PC_G0:
8112 case elfcpp::R_ARM_SBREL32:
8113 case elfcpp::R_ARM_THM_PC8:
8114 case elfcpp::R_ARM_BASE_PREL:
8115 case elfcpp::R_ARM_MOVW_PREL_NC:
8116 case elfcpp::R_ARM_MOVT_PREL:
8117 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8118 case elfcpp::R_ARM_THM_MOVT_PREL:
8119 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8120 case elfcpp::R_ARM_THM_PC12:
8121 case elfcpp::R_ARM_REL32_NOI:
8122 case elfcpp::R_ARM_ALU_PC_G0_NC:
8123 case elfcpp::R_ARM_ALU_PC_G0:
8124 case elfcpp::R_ARM_ALU_PC_G1_NC:
8125 case elfcpp::R_ARM_ALU_PC_G1:
8126 case elfcpp::R_ARM_ALU_PC_G2:
8127 case elfcpp::R_ARM_LDR_PC_G1:
8128 case elfcpp::R_ARM_LDR_PC_G2:
8129 case elfcpp::R_ARM_LDRS_PC_G0:
8130 case elfcpp::R_ARM_LDRS_PC_G1:
8131 case elfcpp::R_ARM_LDRS_PC_G2:
8132 case elfcpp::R_ARM_LDC_PC_G0:
8133 case elfcpp::R_ARM_LDC_PC_G1:
8134 case elfcpp::R_ARM_LDC_PC_G2:
8135 case elfcpp::R_ARM_ALU_SB_G0_NC:
8136 case elfcpp::R_ARM_ALU_SB_G0:
8137 case elfcpp::R_ARM_ALU_SB_G1_NC:
8138 case elfcpp::R_ARM_ALU_SB_G1:
8139 case elfcpp::R_ARM_ALU_SB_G2:
8140 case elfcpp::R_ARM_LDR_SB_G0:
8141 case elfcpp::R_ARM_LDR_SB_G1:
8142 case elfcpp::R_ARM_LDR_SB_G2:
8143 case elfcpp::R_ARM_LDRS_SB_G0:
8144 case elfcpp::R_ARM_LDRS_SB_G1:
8145 case elfcpp::R_ARM_LDRS_SB_G2:
8146 case elfcpp::R_ARM_LDC_SB_G0:
8147 case elfcpp::R_ARM_LDC_SB_G1:
8148 case elfcpp::R_ARM_LDC_SB_G2:
8149 case elfcpp::R_ARM_MOVW_BREL_NC:
8150 case elfcpp::R_ARM_MOVT_BREL:
8151 case elfcpp::R_ARM_MOVW_BREL:
8152 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8153 case elfcpp::R_ARM_THM_MOVT_BREL:
8154 case elfcpp::R_ARM_THM_MOVW_BREL:
8155 case elfcpp::R_ARM_GOTOFF32:
8156 case elfcpp::R_ARM_GOTOFF12:
8157 case elfcpp::R_ARM_SBREL31:
8158 return Symbol::RELATIVE_REF;
8160 case elfcpp::R_ARM_PLT32:
8161 case elfcpp::R_ARM_CALL:
8162 case elfcpp::R_ARM_JUMP24:
8163 case elfcpp::R_ARM_THM_CALL:
8164 case elfcpp::R_ARM_THM_JUMP24:
8165 case elfcpp::R_ARM_THM_JUMP19:
8166 case elfcpp::R_ARM_THM_JUMP6:
8167 case elfcpp::R_ARM_THM_JUMP11:
8168 case elfcpp::R_ARM_THM_JUMP8:
8169 // R_ARM_PREL31 is not used to relocate call/jump instructions but
8170 // in unwind tables. It may point to functions via PLTs.
8171 // So we treat it like call/jump relocations above.
8172 case elfcpp::R_ARM_PREL31:
8173 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
8175 case elfcpp::R_ARM_GOT_BREL:
8176 case elfcpp::R_ARM_GOT_ABS:
8177 case elfcpp::R_ARM_GOT_PREL:
8179 return Symbol::ABSOLUTE_REF;
8181 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8182 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8183 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8184 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8185 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8186 return Symbol::TLS_REF;
8188 case elfcpp::R_ARM_TARGET1:
8189 case elfcpp::R_ARM_TARGET2:
8190 case elfcpp::R_ARM_COPY:
8191 case elfcpp::R_ARM_GLOB_DAT:
8192 case elfcpp::R_ARM_JUMP_SLOT:
8193 case elfcpp::R_ARM_RELATIVE:
8194 case elfcpp::R_ARM_PC24:
8195 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8196 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8197 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8199 // Not expected. We will give an error later.
8204 // Report an unsupported relocation against a local symbol.
8206 template<bool big_endian>
8208 Target_arm<big_endian>::Scan::unsupported_reloc_local(
8209 Sized_relobj_file<32, big_endian>* object,
8210 unsigned int r_type)
8212 gold_error(_("%s: unsupported reloc %u against local symbol"),
8213 object->name().c_str(), r_type);
8216 // We are about to emit a dynamic relocation of type R_TYPE. If the
8217 // dynamic linker does not support it, issue an error. The GNU linker
8218 // only issues a non-PIC error for an allocated read-only section.
8219 // Here we know the section is allocated, but we don't know that it is
8220 // read-only. But we check for all the relocation types which the
8221 // glibc dynamic linker supports, so it seems appropriate to issue an
8222 // error even if the section is not read-only.
8224 template<bool big_endian>
8226 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
8227 unsigned int r_type)
8231 // These are the relocation types supported by glibc for ARM.
8232 case elfcpp::R_ARM_RELATIVE:
8233 case elfcpp::R_ARM_COPY:
8234 case elfcpp::R_ARM_GLOB_DAT:
8235 case elfcpp::R_ARM_JUMP_SLOT:
8236 case elfcpp::R_ARM_ABS32:
8237 case elfcpp::R_ARM_ABS32_NOI:
8238 case elfcpp::R_ARM_IRELATIVE:
8239 case elfcpp::R_ARM_PC24:
8240 // FIXME: The following 3 types are not supported by Android's dynamic
8242 case elfcpp::R_ARM_TLS_DTPMOD32:
8243 case elfcpp::R_ARM_TLS_DTPOFF32:
8244 case elfcpp::R_ARM_TLS_TPOFF32:
8249 // This prevents us from issuing more than one error per reloc
8250 // section. But we can still wind up issuing more than one
8251 // error per object file.
8252 if (this->issued_non_pic_error_)
8254 const Arm_reloc_property* reloc_property =
8255 arm_reloc_property_table->get_reloc_property(r_type);
8256 gold_assert(reloc_property != NULL);
8257 object->error(_("requires unsupported dynamic reloc %s; "
8258 "recompile with -fPIC"),
8259 reloc_property->name().c_str());
8260 this->issued_non_pic_error_ = true;
8264 case elfcpp::R_ARM_NONE:
8270 // Return whether we need to make a PLT entry for a relocation of the
8271 // given type against a STT_GNU_IFUNC symbol.
8273 template<bool big_endian>
8275 Target_arm<big_endian>::Scan::reloc_needs_plt_for_ifunc(
8276 Sized_relobj_file<32, big_endian>* object,
8277 unsigned int r_type)
8279 int flags = Scan::get_reference_flags(r_type);
8280 if (flags & Symbol::TLS_REF)
8282 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8283 object->name().c_str(), r_type);
8290 // Scan a relocation for a local symbol.
8291 // FIXME: This only handles a subset of relocation types used by Android
8292 // on ARM v5te devices.
8294 template<bool big_endian>
8296 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
8299 Sized_relobj_file<32, big_endian>* object,
8300 unsigned int data_shndx,
8301 Output_section* output_section,
8302 const elfcpp::Rel<32, big_endian>& reloc,
8303 unsigned int r_type,
8304 const elfcpp::Sym<32, big_endian>& lsym,
8310 r_type = get_real_reloc_type(r_type);
8312 // A local STT_GNU_IFUNC symbol may require a PLT entry.
8313 bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC;
8314 if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type))
8316 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8317 target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym);
8322 case elfcpp::R_ARM_NONE:
8323 case elfcpp::R_ARM_V4BX:
8324 case elfcpp::R_ARM_GNU_VTENTRY:
8325 case elfcpp::R_ARM_GNU_VTINHERIT:
8328 case elfcpp::R_ARM_ABS32:
8329 case elfcpp::R_ARM_ABS32_NOI:
8330 // If building a shared library (or a position-independent
8331 // executable), we need to create a dynamic relocation for
8332 // this location. The relocation applied at link time will
8333 // apply the link-time value, so we flag the location with
8334 // an R_ARM_RELATIVE relocation so the dynamic loader can
8335 // relocate it easily.
8336 if (parameters->options().output_is_position_independent())
8338 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8339 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8340 // If we are to add more other reloc types than R_ARM_ABS32,
8341 // we need to add check_non_pic(object, r_type) here.
8342 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
8343 output_section, data_shndx,
8344 reloc.get_r_offset(), is_ifunc);
8348 case elfcpp::R_ARM_ABS16:
8349 case elfcpp::R_ARM_ABS12:
8350 case elfcpp::R_ARM_THM_ABS5:
8351 case elfcpp::R_ARM_ABS8:
8352 case elfcpp::R_ARM_BASE_ABS:
8353 case elfcpp::R_ARM_MOVW_ABS_NC:
8354 case elfcpp::R_ARM_MOVT_ABS:
8355 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8356 case elfcpp::R_ARM_THM_MOVT_ABS:
8357 // If building a shared library (or a position-independent
8358 // executable), we need to create a dynamic relocation for
8359 // this location. Because the addend needs to remain in the
8360 // data section, we need to be careful not to apply this
8361 // relocation statically.
8362 if (parameters->options().output_is_position_independent())
8364 check_non_pic(object, r_type);
8365 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8366 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8367 if (lsym.get_st_type() != elfcpp::STT_SECTION)
8368 rel_dyn->add_local(object, r_sym, r_type, output_section,
8369 data_shndx, reloc.get_r_offset());
8372 gold_assert(lsym.get_st_value() == 0);
8373 unsigned int shndx = lsym.get_st_shndx();
8375 shndx = object->adjust_sym_shndx(r_sym, shndx,
8378 object->error(_("section symbol %u has bad shndx %u"),
8381 rel_dyn->add_local_section(object, shndx,
8382 r_type, output_section,
8383 data_shndx, reloc.get_r_offset());
8388 case elfcpp::R_ARM_REL32:
8389 case elfcpp::R_ARM_LDR_PC_G0:
8390 case elfcpp::R_ARM_SBREL32:
8391 case elfcpp::R_ARM_THM_CALL:
8392 case elfcpp::R_ARM_THM_PC8:
8393 case elfcpp::R_ARM_BASE_PREL:
8394 case elfcpp::R_ARM_PLT32:
8395 case elfcpp::R_ARM_CALL:
8396 case elfcpp::R_ARM_JUMP24:
8397 case elfcpp::R_ARM_THM_JUMP24:
8398 case elfcpp::R_ARM_SBREL31:
8399 case elfcpp::R_ARM_PREL31:
8400 case elfcpp::R_ARM_MOVW_PREL_NC:
8401 case elfcpp::R_ARM_MOVT_PREL:
8402 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8403 case elfcpp::R_ARM_THM_MOVT_PREL:
8404 case elfcpp::R_ARM_THM_JUMP19:
8405 case elfcpp::R_ARM_THM_JUMP6:
8406 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8407 case elfcpp::R_ARM_THM_PC12:
8408 case elfcpp::R_ARM_REL32_NOI:
8409 case elfcpp::R_ARM_ALU_PC_G0_NC:
8410 case elfcpp::R_ARM_ALU_PC_G0:
8411 case elfcpp::R_ARM_ALU_PC_G1_NC:
8412 case elfcpp::R_ARM_ALU_PC_G1:
8413 case elfcpp::R_ARM_ALU_PC_G2:
8414 case elfcpp::R_ARM_LDR_PC_G1:
8415 case elfcpp::R_ARM_LDR_PC_G2:
8416 case elfcpp::R_ARM_LDRS_PC_G0:
8417 case elfcpp::R_ARM_LDRS_PC_G1:
8418 case elfcpp::R_ARM_LDRS_PC_G2:
8419 case elfcpp::R_ARM_LDC_PC_G0:
8420 case elfcpp::R_ARM_LDC_PC_G1:
8421 case elfcpp::R_ARM_LDC_PC_G2:
8422 case elfcpp::R_ARM_ALU_SB_G0_NC:
8423 case elfcpp::R_ARM_ALU_SB_G0:
8424 case elfcpp::R_ARM_ALU_SB_G1_NC:
8425 case elfcpp::R_ARM_ALU_SB_G1:
8426 case elfcpp::R_ARM_ALU_SB_G2:
8427 case elfcpp::R_ARM_LDR_SB_G0:
8428 case elfcpp::R_ARM_LDR_SB_G1:
8429 case elfcpp::R_ARM_LDR_SB_G2:
8430 case elfcpp::R_ARM_LDRS_SB_G0:
8431 case elfcpp::R_ARM_LDRS_SB_G1:
8432 case elfcpp::R_ARM_LDRS_SB_G2:
8433 case elfcpp::R_ARM_LDC_SB_G0:
8434 case elfcpp::R_ARM_LDC_SB_G1:
8435 case elfcpp::R_ARM_LDC_SB_G2:
8436 case elfcpp::R_ARM_MOVW_BREL_NC:
8437 case elfcpp::R_ARM_MOVT_BREL:
8438 case elfcpp::R_ARM_MOVW_BREL:
8439 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8440 case elfcpp::R_ARM_THM_MOVT_BREL:
8441 case elfcpp::R_ARM_THM_MOVW_BREL:
8442 case elfcpp::R_ARM_THM_JUMP11:
8443 case elfcpp::R_ARM_THM_JUMP8:
8444 // We don't need to do anything for a relative addressing relocation
8445 // against a local symbol if it does not reference the GOT.
8448 case elfcpp::R_ARM_GOTOFF32:
8449 case elfcpp::R_ARM_GOTOFF12:
8450 // We need a GOT section:
8451 target->got_section(symtab, layout);
8454 case elfcpp::R_ARM_GOT_BREL:
8455 case elfcpp::R_ARM_GOT_PREL:
8457 // The symbol requires a GOT entry.
8458 Arm_output_data_got<big_endian>* got =
8459 target->got_section(symtab, layout);
8460 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8461 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
8463 // If we are generating a shared object, we need to add a
8464 // dynamic RELATIVE relocation for this symbol's GOT entry.
8465 if (parameters->options().output_is_position_independent())
8467 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8468 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8469 rel_dyn->add_local_relative(
8470 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
8471 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
8477 case elfcpp::R_ARM_TARGET1:
8478 case elfcpp::R_ARM_TARGET2:
8479 // This should have been mapped to another type already.
8481 case elfcpp::R_ARM_COPY:
8482 case elfcpp::R_ARM_GLOB_DAT:
8483 case elfcpp::R_ARM_JUMP_SLOT:
8484 case elfcpp::R_ARM_RELATIVE:
8485 // These are relocations which should only be seen by the
8486 // dynamic linker, and should never be seen here.
8487 gold_error(_("%s: unexpected reloc %u in object file"),
8488 object->name().c_str(), r_type);
8492 // These are initial TLS relocs, which are expected when
8494 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8495 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8496 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8497 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8498 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8500 bool output_is_shared = parameters->options().shared();
8501 const tls::Tls_optimization optimized_type
8502 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared,
8506 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8507 if (optimized_type == tls::TLSOPT_NONE)
8509 // Create a pair of GOT entries for the module index and
8510 // dtv-relative offset.
8511 Arm_output_data_got<big_endian>* got
8512 = target->got_section(symtab, layout);
8513 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8514 unsigned int shndx = lsym.get_st_shndx();
8516 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
8519 object->error(_("local symbol %u has bad shndx %u"),
8524 if (!parameters->doing_static_link())
8525 got->add_local_pair_with_rel(object, r_sym, shndx,
8527 target->rel_dyn_section(layout),
8528 elfcpp::R_ARM_TLS_DTPMOD32);
8530 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR,
8534 // FIXME: TLS optimization not supported yet.
8538 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8539 if (optimized_type == tls::TLSOPT_NONE)
8541 // Create a GOT entry for the module index.
8542 target->got_mod_index_entry(symtab, layout, object);
8545 // FIXME: TLS optimization not supported yet.
8549 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8552 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8553 layout->set_has_static_tls();
8554 if (optimized_type == tls::TLSOPT_NONE)
8556 // Create a GOT entry for the tp-relative offset.
8557 Arm_output_data_got<big_endian>* got
8558 = target->got_section(symtab, layout);
8559 unsigned int r_sym =
8560 elfcpp::elf_r_sym<32>(reloc.get_r_info());
8561 if (!parameters->doing_static_link())
8562 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET,
8563 target->rel_dyn_section(layout),
8564 elfcpp::R_ARM_TLS_TPOFF32);
8565 else if (!object->local_has_got_offset(r_sym,
8566 GOT_TYPE_TLS_OFFSET))
8568 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET);
8569 unsigned int got_offset =
8570 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET);
8571 got->add_static_reloc(got_offset,
8572 elfcpp::R_ARM_TLS_TPOFF32, object,
8577 // FIXME: TLS optimization not supported yet.
8581 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8582 layout->set_has_static_tls();
8583 if (output_is_shared)
8585 // We need to create a dynamic relocation.
8586 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION);
8587 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8588 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8589 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32,
8590 output_section, data_shndx,
8591 reloc.get_r_offset());
8601 case elfcpp::R_ARM_PC24:
8602 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8603 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8604 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8606 unsupported_reloc_local(object, r_type);
8611 // Report an unsupported relocation against a global symbol.
8613 template<bool big_endian>
8615 Target_arm<big_endian>::Scan::unsupported_reloc_global(
8616 Sized_relobj_file<32, big_endian>* object,
8617 unsigned int r_type,
8620 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8621 object->name().c_str(), r_type, gsym->demangled_name().c_str());
8624 template<bool big_endian>
8626 Target_arm<big_endian>::Scan::possible_function_pointer_reloc(
8627 unsigned int r_type)
8631 case elfcpp::R_ARM_PC24:
8632 case elfcpp::R_ARM_THM_CALL:
8633 case elfcpp::R_ARM_PLT32:
8634 case elfcpp::R_ARM_CALL:
8635 case elfcpp::R_ARM_JUMP24:
8636 case elfcpp::R_ARM_THM_JUMP24:
8637 case elfcpp::R_ARM_SBREL31:
8638 case elfcpp::R_ARM_PREL31:
8639 case elfcpp::R_ARM_THM_JUMP19:
8640 case elfcpp::R_ARM_THM_JUMP6:
8641 case elfcpp::R_ARM_THM_JUMP11:
8642 case elfcpp::R_ARM_THM_JUMP8:
8643 // All the relocations above are branches except SBREL31 and PREL31.
8647 // Be conservative and assume this is a function pointer.
8652 template<bool big_endian>
8654 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer(
8657 Target_arm<big_endian>* target,
8658 Sized_relobj_file<32, big_endian>*,
8661 const elfcpp::Rel<32, big_endian>&,
8662 unsigned int r_type,
8663 const elfcpp::Sym<32, big_endian>&)
8665 r_type = target->get_real_reloc_type(r_type);
8666 return possible_function_pointer_reloc(r_type);
8669 template<bool big_endian>
8671 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer(
8674 Target_arm<big_endian>* target,
8675 Sized_relobj_file<32, big_endian>*,
8678 const elfcpp::Rel<32, big_endian>&,
8679 unsigned int r_type,
8682 // GOT is not a function.
8683 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8686 r_type = target->get_real_reloc_type(r_type);
8687 return possible_function_pointer_reloc(r_type);
8690 // Scan a relocation for a global symbol.
8692 template<bool big_endian>
8694 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
8697 Sized_relobj_file<32, big_endian>* object,
8698 unsigned int data_shndx,
8699 Output_section* output_section,
8700 const elfcpp::Rel<32, big_endian>& reloc,
8701 unsigned int r_type,
8704 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8705 // section. We check here to avoid creating a dynamic reloc against
8706 // _GLOBAL_OFFSET_TABLE_.
8707 if (!target->has_got_section()
8708 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8709 target->got_section(symtab, layout);
8711 // A STT_GNU_IFUNC symbol may require a PLT entry.
8712 if (gsym->type() == elfcpp::STT_GNU_IFUNC
8713 && this->reloc_needs_plt_for_ifunc(object, r_type))
8714 target->make_plt_entry(symtab, layout, gsym);
8716 r_type = get_real_reloc_type(r_type);
8719 case elfcpp::R_ARM_NONE:
8720 case elfcpp::R_ARM_V4BX:
8721 case elfcpp::R_ARM_GNU_VTENTRY:
8722 case elfcpp::R_ARM_GNU_VTINHERIT:
8725 case elfcpp::R_ARM_ABS32:
8726 case elfcpp::R_ARM_ABS16:
8727 case elfcpp::R_ARM_ABS12:
8728 case elfcpp::R_ARM_THM_ABS5:
8729 case elfcpp::R_ARM_ABS8:
8730 case elfcpp::R_ARM_BASE_ABS:
8731 case elfcpp::R_ARM_MOVW_ABS_NC:
8732 case elfcpp::R_ARM_MOVT_ABS:
8733 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8734 case elfcpp::R_ARM_THM_MOVT_ABS:
8735 case elfcpp::R_ARM_ABS32_NOI:
8736 // Absolute addressing relocations.
8738 // Make a PLT entry if necessary.
8739 if (this->symbol_needs_plt_entry(gsym))
8741 target->make_plt_entry(symtab, layout, gsym);
8742 // Since this is not a PC-relative relocation, we may be
8743 // taking the address of a function. In that case we need to
8744 // set the entry in the dynamic symbol table to the address of
8746 if (gsym->is_from_dynobj() && !parameters->options().shared())
8747 gsym->set_needs_dynsym_value();
8749 // Make a dynamic relocation if necessary.
8750 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8752 if (!parameters->options().output_is_position_independent()
8753 && gsym->may_need_copy_reloc())
8755 target->copy_reloc(symtab, layout, object,
8756 data_shndx, output_section, gsym, reloc);
8758 else if ((r_type == elfcpp::R_ARM_ABS32
8759 || r_type == elfcpp::R_ARM_ABS32_NOI)
8760 && gsym->type() == elfcpp::STT_GNU_IFUNC
8761 && gsym->can_use_relative_reloc(false)
8762 && !gsym->is_from_dynobj()
8763 && !gsym->is_undefined()
8764 && !gsym->is_preemptible())
8766 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
8767 // symbol. This makes a function address in a PIE executable
8768 // match the address in a shared library that it links against.
8769 Reloc_section* rel_irelative =
8770 target->rel_irelative_section(layout);
8771 unsigned int r_type = elfcpp::R_ARM_IRELATIVE;
8772 rel_irelative->add_symbolless_global_addend(
8773 gsym, r_type, output_section, object,
8774 data_shndx, reloc.get_r_offset());
8776 else if ((r_type == elfcpp::R_ARM_ABS32
8777 || r_type == elfcpp::R_ARM_ABS32_NOI)
8778 && gsym->can_use_relative_reloc(false))
8780 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8781 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
8782 output_section, object,
8783 data_shndx, reloc.get_r_offset());
8787 check_non_pic(object, r_type);
8788 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8789 rel_dyn->add_global(gsym, r_type, output_section, object,
8790 data_shndx, reloc.get_r_offset());
8796 case elfcpp::R_ARM_GOTOFF32:
8797 case elfcpp::R_ARM_GOTOFF12:
8798 // We need a GOT section.
8799 target->got_section(symtab, layout);
8802 case elfcpp::R_ARM_REL32:
8803 case elfcpp::R_ARM_LDR_PC_G0:
8804 case elfcpp::R_ARM_SBREL32:
8805 case elfcpp::R_ARM_THM_PC8:
8806 case elfcpp::R_ARM_BASE_PREL:
8807 case elfcpp::R_ARM_MOVW_PREL_NC:
8808 case elfcpp::R_ARM_MOVT_PREL:
8809 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8810 case elfcpp::R_ARM_THM_MOVT_PREL:
8811 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8812 case elfcpp::R_ARM_THM_PC12:
8813 case elfcpp::R_ARM_REL32_NOI:
8814 case elfcpp::R_ARM_ALU_PC_G0_NC:
8815 case elfcpp::R_ARM_ALU_PC_G0:
8816 case elfcpp::R_ARM_ALU_PC_G1_NC:
8817 case elfcpp::R_ARM_ALU_PC_G1:
8818 case elfcpp::R_ARM_ALU_PC_G2:
8819 case elfcpp::R_ARM_LDR_PC_G1:
8820 case elfcpp::R_ARM_LDR_PC_G2:
8821 case elfcpp::R_ARM_LDRS_PC_G0:
8822 case elfcpp::R_ARM_LDRS_PC_G1:
8823 case elfcpp::R_ARM_LDRS_PC_G2:
8824 case elfcpp::R_ARM_LDC_PC_G0:
8825 case elfcpp::R_ARM_LDC_PC_G1:
8826 case elfcpp::R_ARM_LDC_PC_G2:
8827 case elfcpp::R_ARM_ALU_SB_G0_NC:
8828 case elfcpp::R_ARM_ALU_SB_G0:
8829 case elfcpp::R_ARM_ALU_SB_G1_NC:
8830 case elfcpp::R_ARM_ALU_SB_G1:
8831 case elfcpp::R_ARM_ALU_SB_G2:
8832 case elfcpp::R_ARM_LDR_SB_G0:
8833 case elfcpp::R_ARM_LDR_SB_G1:
8834 case elfcpp::R_ARM_LDR_SB_G2:
8835 case elfcpp::R_ARM_LDRS_SB_G0:
8836 case elfcpp::R_ARM_LDRS_SB_G1:
8837 case elfcpp::R_ARM_LDRS_SB_G2:
8838 case elfcpp::R_ARM_LDC_SB_G0:
8839 case elfcpp::R_ARM_LDC_SB_G1:
8840 case elfcpp::R_ARM_LDC_SB_G2:
8841 case elfcpp::R_ARM_MOVW_BREL_NC:
8842 case elfcpp::R_ARM_MOVT_BREL:
8843 case elfcpp::R_ARM_MOVW_BREL:
8844 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8845 case elfcpp::R_ARM_THM_MOVT_BREL:
8846 case elfcpp::R_ARM_THM_MOVW_BREL:
8847 // Relative addressing relocations.
8849 // Make a dynamic relocation if necessary.
8850 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8852 if (parameters->options().output_is_executable()
8853 && target->may_need_copy_reloc(gsym))
8855 target->copy_reloc(symtab, layout, object,
8856 data_shndx, output_section, gsym, reloc);
8860 check_non_pic(object, r_type);
8861 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8862 rel_dyn->add_global(gsym, r_type, output_section, object,
8863 data_shndx, reloc.get_r_offset());
8869 case elfcpp::R_ARM_THM_CALL:
8870 case elfcpp::R_ARM_PLT32:
8871 case elfcpp::R_ARM_CALL:
8872 case elfcpp::R_ARM_JUMP24:
8873 case elfcpp::R_ARM_THM_JUMP24:
8874 case elfcpp::R_ARM_SBREL31:
8875 case elfcpp::R_ARM_PREL31:
8876 case elfcpp::R_ARM_THM_JUMP19:
8877 case elfcpp::R_ARM_THM_JUMP6:
8878 case elfcpp::R_ARM_THM_JUMP11:
8879 case elfcpp::R_ARM_THM_JUMP8:
8880 // All the relocation above are branches except for the PREL31 ones.
8881 // A PREL31 relocation can point to a personality function in a shared
8882 // library. In that case we want to use a PLT because we want to
8883 // call the personality routine and the dynamic linkers we care about
8884 // do not support dynamic PREL31 relocations. An REL31 relocation may
8885 // point to a function whose unwinding behaviour is being described but
8886 // we will not mistakenly generate a PLT for that because we should use
8887 // a local section symbol.
8889 // If the symbol is fully resolved, this is just a relative
8890 // local reloc. Otherwise we need a PLT entry.
8891 if (gsym->final_value_is_known())
8893 // If building a shared library, we can also skip the PLT entry
8894 // if the symbol is defined in the output file and is protected
8896 if (gsym->is_defined()
8897 && !gsym->is_from_dynobj()
8898 && !gsym->is_preemptible())
8900 target->make_plt_entry(symtab, layout, gsym);
8903 case elfcpp::R_ARM_GOT_BREL:
8904 case elfcpp::R_ARM_GOT_ABS:
8905 case elfcpp::R_ARM_GOT_PREL:
8907 // The symbol requires a GOT entry.
8908 Arm_output_data_got<big_endian>* got =
8909 target->got_section(symtab, layout);
8910 if (gsym->final_value_is_known())
8912 // For a STT_GNU_IFUNC symbol we want the PLT address.
8913 if (gsym->type() == elfcpp::STT_GNU_IFUNC)
8914 got->add_global_plt(gsym, GOT_TYPE_STANDARD);
8916 got->add_global(gsym, GOT_TYPE_STANDARD);
8920 // If this symbol is not fully resolved, we need to add a
8921 // GOT entry with a dynamic relocation.
8922 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8923 if (gsym->is_from_dynobj()
8924 || gsym->is_undefined()
8925 || gsym->is_preemptible()
8926 || (gsym->visibility() == elfcpp::STV_PROTECTED
8927 && parameters->options().shared())
8928 || (gsym->type() == elfcpp::STT_GNU_IFUNC
8929 && parameters->options().output_is_position_independent()))
8930 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
8931 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
8934 // For a STT_GNU_IFUNC symbol we want to write the PLT
8935 // offset into the GOT, so that function pointer
8936 // comparisons work correctly.
8938 if (gsym->type() != elfcpp::STT_GNU_IFUNC)
8939 is_new = got->add_global(gsym, GOT_TYPE_STANDARD);
8942 is_new = got->add_global_plt(gsym, GOT_TYPE_STANDARD);
8943 // Tell the dynamic linker to use the PLT address
8944 // when resolving relocations.
8945 if (gsym->is_from_dynobj()
8946 && !parameters->options().shared())
8947 gsym->set_needs_dynsym_value();
8950 rel_dyn->add_global_relative(
8951 gsym, elfcpp::R_ARM_RELATIVE, got,
8952 gsym->got_offset(GOT_TYPE_STANDARD));
8958 case elfcpp::R_ARM_TARGET1:
8959 case elfcpp::R_ARM_TARGET2:
8960 // These should have been mapped to other types already.
8962 case elfcpp::R_ARM_COPY:
8963 case elfcpp::R_ARM_GLOB_DAT:
8964 case elfcpp::R_ARM_JUMP_SLOT:
8965 case elfcpp::R_ARM_RELATIVE:
8966 // These are relocations which should only be seen by the
8967 // dynamic linker, and should never be seen here.
8968 gold_error(_("%s: unexpected reloc %u in object file"),
8969 object->name().c_str(), r_type);
8972 // These are initial tls relocs, which are expected when
8974 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8975 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8976 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8977 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8978 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8980 const bool is_final = gsym->final_value_is_known();
8981 const tls::Tls_optimization optimized_type
8982 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
8985 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8986 if (optimized_type == tls::TLSOPT_NONE)
8988 // Create a pair of GOT entries for the module index and
8989 // dtv-relative offset.
8990 Arm_output_data_got<big_endian>* got
8991 = target->got_section(symtab, layout);
8992 if (!parameters->doing_static_link())
8993 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR,
8994 target->rel_dyn_section(layout),
8995 elfcpp::R_ARM_TLS_DTPMOD32,
8996 elfcpp::R_ARM_TLS_DTPOFF32);
8998 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym);
9001 // FIXME: TLS optimization not supported yet.
9005 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9006 if (optimized_type == tls::TLSOPT_NONE)
9008 // Create a GOT entry for the module index.
9009 target->got_mod_index_entry(symtab, layout, object);
9012 // FIXME: TLS optimization not supported yet.
9016 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9019 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9020 layout->set_has_static_tls();
9021 if (optimized_type == tls::TLSOPT_NONE)
9023 // Create a GOT entry for the tp-relative offset.
9024 Arm_output_data_got<big_endian>* got
9025 = target->got_section(symtab, layout);
9026 if (!parameters->doing_static_link())
9027 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET,
9028 target->rel_dyn_section(layout),
9029 elfcpp::R_ARM_TLS_TPOFF32);
9030 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET))
9032 got->add_global(gsym, GOT_TYPE_TLS_OFFSET);
9033 unsigned int got_offset =
9034 gsym->got_offset(GOT_TYPE_TLS_OFFSET);
9035 got->add_static_reloc(got_offset,
9036 elfcpp::R_ARM_TLS_TPOFF32, gsym);
9040 // FIXME: TLS optimization not supported yet.
9044 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9045 layout->set_has_static_tls();
9046 if (parameters->options().shared())
9048 // We need to create a dynamic relocation.
9049 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
9050 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32,
9051 output_section, object,
9052 data_shndx, reloc.get_r_offset());
9062 case elfcpp::R_ARM_PC24:
9063 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9064 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9065 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9067 unsupported_reloc_global(object, r_type, gsym);
9072 // Process relocations for gc.
9074 template<bool big_endian>
9076 Target_arm<big_endian>::gc_process_relocs(
9077 Symbol_table* symtab,
9079 Sized_relobj_file<32, big_endian>* object,
9080 unsigned int data_shndx,
9082 const unsigned char* prelocs,
9084 Output_section* output_section,
9085 bool needs_special_offset_handling,
9086 size_t local_symbol_count,
9087 const unsigned char* plocal_symbols)
9089 typedef Target_arm<big_endian> Arm;
9090 typedef typename Target_arm<big_endian>::Scan Scan;
9092 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan,
9093 typename Target_arm::Relocatable_size_for_reloc>(
9102 needs_special_offset_handling,
9107 // Scan relocations for a section.
9109 template<bool big_endian>
9111 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
9113 Sized_relobj_file<32, big_endian>* object,
9114 unsigned int data_shndx,
9115 unsigned int sh_type,
9116 const unsigned char* prelocs,
9118 Output_section* output_section,
9119 bool needs_special_offset_handling,
9120 size_t local_symbol_count,
9121 const unsigned char* plocal_symbols)
9123 typedef typename Target_arm<big_endian>::Scan Scan;
9124 if (sh_type == elfcpp::SHT_RELA)
9126 gold_error(_("%s: unsupported RELA reloc section"),
9127 object->name().c_str());
9131 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
9140 needs_special_offset_handling,
9145 // Finalize the sections.
9147 template<bool big_endian>
9149 Target_arm<big_endian>::do_finalize_sections(
9151 const Input_objects* input_objects,
9154 bool merged_any_attributes = false;
9155 // Merge processor-specific flags.
9156 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
9157 p != input_objects->relobj_end();
9160 Arm_relobj<big_endian>* arm_relobj =
9161 Arm_relobj<big_endian>::as_arm_relobj(*p);
9162 if (arm_relobj->merge_flags_and_attributes())
9164 this->merge_processor_specific_flags(
9166 arm_relobj->processor_specific_flags());
9167 this->merge_object_attributes(arm_relobj->name().c_str(),
9168 arm_relobj->attributes_section_data());
9169 merged_any_attributes = true;
9173 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
9174 p != input_objects->dynobj_end();
9177 Arm_dynobj<big_endian>* arm_dynobj =
9178 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
9179 this->merge_processor_specific_flags(
9181 arm_dynobj->processor_specific_flags());
9182 this->merge_object_attributes(arm_dynobj->name().c_str(),
9183 arm_dynobj->attributes_section_data());
9184 merged_any_attributes = true;
9187 // Create an empty uninitialized attribute section if we still don't have it
9188 // at this moment. This happens if there is no attributes sections in all
9190 if (this->attributes_section_data_ == NULL)
9191 this->attributes_section_data_ = new Attributes_section_data(NULL, 0);
9193 const Object_attribute* cpu_arch_attr =
9194 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
9195 // Check if we need to use Cortex-A8 workaround.
9196 if (parameters->options().user_set_fix_cortex_a8())
9197 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
9200 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9201 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9203 const Object_attribute* cpu_arch_profile_attr =
9204 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
9205 this->fix_cortex_a8_ =
9206 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
9207 && (cpu_arch_profile_attr->int_value() == 'A'
9208 || cpu_arch_profile_attr->int_value() == 0));
9211 // Check if we can use V4BX interworking.
9212 // The V4BX interworking stub contains BX instruction,
9213 // which is not specified for some profiles.
9214 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9215 && !this->may_use_v4t_interworking())
9216 gold_error(_("unable to provide V4BX reloc interworking fix up; "
9217 "the target profile does not support BX instruction"));
9219 // Fill in some more dynamic tags.
9220 const Reloc_section* rel_plt = (this->plt_ == NULL
9222 : this->plt_->rel_plt());
9223 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
9224 this->rel_dyn_, true, false);
9226 // Emit any relocs we saved in an attempt to avoid generating COPY
9228 if (this->copy_relocs_.any_saved_relocs())
9229 this->copy_relocs_.emit(this->rel_dyn_section(layout));
9231 // Handle the .ARM.exidx section.
9232 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
9234 if (!parameters->options().relocatable())
9236 if (exidx_section != NULL
9237 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX)
9239 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9240 // the .ARM.exidx section.
9241 if (!layout->script_options()->saw_phdrs_clause())
9243 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0,
9246 Output_segment* exidx_segment =
9247 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
9248 exidx_segment->add_output_section_to_nonload(exidx_section,
9254 // Create an .ARM.attributes section if we have merged any attributes
9256 if (merged_any_attributes)
9258 Output_attributes_section_data* attributes_section =
9259 new Output_attributes_section_data(*this->attributes_section_data_);
9260 layout->add_output_section_data(".ARM.attributes",
9261 elfcpp::SHT_ARM_ATTRIBUTES, 0,
9262 attributes_section, ORDER_INVALID,
9266 // Fix up links in section EXIDX headers.
9267 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
9268 p != layout->section_list().end();
9270 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
9272 Arm_output_section<big_endian>* os =
9273 Arm_output_section<big_endian>::as_arm_output_section(*p);
9274 os->set_exidx_section_link();
9278 // Return whether a direct absolute static relocation needs to be applied.
9279 // In cases where Scan::local() or Scan::global() has created
9280 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9281 // of the relocation is carried in the data, and we must not
9282 // apply the static relocation.
9284 template<bool big_endian>
9286 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
9287 const Sized_symbol<32>* gsym,
9288 unsigned int r_type,
9290 Output_section* output_section)
9292 // If the output section is not allocated, then we didn't call
9293 // scan_relocs, we didn't create a dynamic reloc, and we must apply
9295 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
9298 int ref_flags = Scan::get_reference_flags(r_type);
9300 // For local symbols, we will have created a non-RELATIVE dynamic
9301 // relocation only if (a) the output is position independent,
9302 // (b) the relocation is absolute (not pc- or segment-relative), and
9303 // (c) the relocation is not 32 bits wide.
9305 return !(parameters->options().output_is_position_independent()
9306 && (ref_flags & Symbol::ABSOLUTE_REF)
9309 // For global symbols, we use the same helper routines used in the
9310 // scan pass. If we did not create a dynamic relocation, or if we
9311 // created a RELATIVE dynamic relocation, we should apply the static
9313 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
9314 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
9315 && gsym->can_use_relative_reloc(ref_flags
9316 & Symbol::FUNCTION_CALL);
9317 return !has_dyn || is_rel;
9320 // Perform a relocation.
9322 template<bool big_endian>
9324 Target_arm<big_endian>::Relocate::relocate(
9325 const Relocate_info<32, big_endian>* relinfo,
9327 Output_section* output_section,
9329 const elfcpp::Rel<32, big_endian>& rel,
9330 unsigned int r_type,
9331 const Sized_symbol<32>* gsym,
9332 const Symbol_value<32>* psymval,
9333 unsigned char* view,
9334 Arm_address address,
9335 section_size_type view_size)
9340 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
9342 r_type = get_real_reloc_type(r_type);
9343 const Arm_reloc_property* reloc_property =
9344 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9345 if (reloc_property == NULL)
9347 std::string reloc_name =
9348 arm_reloc_property_table->reloc_name_in_error_message(r_type);
9349 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9350 _("cannot relocate %s in object file"),
9351 reloc_name.c_str());
9355 const Arm_relobj<big_endian>* object =
9356 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9358 // If the final branch target of a relocation is THUMB instruction, this
9359 // is 1. Otherwise it is 0.
9360 Arm_address thumb_bit = 0;
9361 Symbol_value<32> symval;
9362 bool is_weakly_undefined_without_plt = false;
9363 bool have_got_offset = false;
9364 unsigned int got_offset = 0;
9366 // If the relocation uses the GOT entry of a symbol instead of the symbol
9367 // itself, we don't care about whether the symbol is defined or what kind
9369 if (reloc_property->uses_got_entry())
9371 // Get the GOT offset.
9372 // The GOT pointer points to the end of the GOT section.
9373 // We need to subtract the size of the GOT section to get
9374 // the actual offset to use in the relocation.
9375 // TODO: We should move GOT offset computing code in TLS relocations
9379 case elfcpp::R_ARM_GOT_BREL:
9380 case elfcpp::R_ARM_GOT_PREL:
9383 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
9384 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
9385 - target->got_size());
9389 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9390 gold_assert(object->local_has_got_offset(r_sym,
9391 GOT_TYPE_STANDARD));
9392 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
9393 - target->got_size());
9395 have_got_offset = true;
9402 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
9406 // This is a global symbol. Determine if we use PLT and if the
9407 // final target is THUMB.
9408 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
9410 // This uses a PLT, change the symbol value.
9411 symval.set_output_value(target->plt_address_for_global(gsym));
9414 else if (gsym->is_weak_undefined())
9416 // This is a weakly undefined symbol and we do not use PLT
9417 // for this relocation. A branch targeting this symbol will
9418 // be converted into an NOP.
9419 is_weakly_undefined_without_plt = true;
9421 else if (gsym->is_undefined() && reloc_property->uses_symbol())
9423 // This relocation uses the symbol value but the symbol is
9424 // undefined. Exit early and have the caller reporting an
9430 // Set thumb bit if symbol:
9431 // -Has type STT_ARM_TFUNC or
9432 // -Has type STT_FUNC, is defined and with LSB in value set.
9434 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
9435 || (gsym->type() == elfcpp::STT_FUNC
9436 && !gsym->is_undefined()
9437 && ((psymval->value(object, 0) & 1) != 0)))
9444 // This is a local symbol. Determine if the final target is THUMB.
9445 // We saved this information when all the local symbols were read.
9446 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
9447 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9448 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
9450 if (psymval->is_ifunc_symbol() && object->local_has_plt_offset(r_sym))
9452 symval.set_output_value(
9453 target->plt_address_for_local(object, r_sym));
9460 // This is a fake relocation synthesized for a stub. It does not have
9461 // a real symbol. We just look at the LSB of the symbol value to
9462 // determine if the target is THUMB or not.
9463 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
9466 // Strip LSB if this points to a THUMB target.
9468 && reloc_property->uses_thumb_bit()
9469 && ((psymval->value(object, 0) & 1) != 0))
9471 Arm_address stripped_value =
9472 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
9473 symval.set_output_value(stripped_value);
9477 // To look up relocation stubs, we need to pass the symbol table index of
9479 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9481 // Get the addressing origin of the output segment defining the
9482 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9483 Arm_address sym_origin = 0;
9484 if (reloc_property->uses_symbol_base())
9486 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
9487 // R_ARM_BASE_ABS with the NULL symbol will give the
9488 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9489 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9490 sym_origin = target->got_plt_section()->address();
9491 else if (gsym == NULL)
9493 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
9494 sym_origin = gsym->output_segment()->vaddr();
9495 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
9496 sym_origin = gsym->output_data()->address();
9498 // TODO: Assumes the segment base to be zero for the global symbols
9499 // till the proper support for the segment-base-relative addressing
9500 // will be implemented. This is consistent with GNU ld.
9503 // For relative addressing relocation, find out the relative address base.
9504 Arm_address relative_address_base = 0;
9505 switch(reloc_property->relative_address_base())
9507 case Arm_reloc_property::RAB_NONE:
9508 // Relocations with relative address bases RAB_TLS and RAB_tp are
9509 // handled by relocate_tls. So we do not need to do anything here.
9510 case Arm_reloc_property::RAB_TLS:
9511 case Arm_reloc_property::RAB_tp:
9513 case Arm_reloc_property::RAB_B_S:
9514 relative_address_base = sym_origin;
9516 case Arm_reloc_property::RAB_GOT_ORG:
9517 relative_address_base = target->got_plt_section()->address();
9519 case Arm_reloc_property::RAB_P:
9520 relative_address_base = address;
9522 case Arm_reloc_property::RAB_Pa:
9523 relative_address_base = address & 0xfffffffcU;
9529 typename Arm_relocate_functions::Status reloc_status =
9530 Arm_relocate_functions::STATUS_OKAY;
9531 bool check_overflow = reloc_property->checks_overflow();
9534 case elfcpp::R_ARM_NONE:
9537 case elfcpp::R_ARM_ABS8:
9538 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9539 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
9542 case elfcpp::R_ARM_ABS12:
9543 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9544 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
9547 case elfcpp::R_ARM_ABS16:
9548 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9549 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
9552 case elfcpp::R_ARM_ABS32:
9553 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9554 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9558 case elfcpp::R_ARM_ABS32_NOI:
9559 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9560 // No thumb bit for this relocation: (S + A)
9561 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9565 case elfcpp::R_ARM_MOVW_ABS_NC:
9566 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9567 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
9572 case elfcpp::R_ARM_MOVT_ABS:
9573 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9574 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
9577 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9578 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9579 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
9580 0, thumb_bit, false);
9583 case elfcpp::R_ARM_THM_MOVT_ABS:
9584 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9585 reloc_status = Arm_relocate_functions::thm_movt(view, object,
9589 case elfcpp::R_ARM_MOVW_PREL_NC:
9590 case elfcpp::R_ARM_MOVW_BREL_NC:
9591 case elfcpp::R_ARM_MOVW_BREL:
9593 Arm_relocate_functions::movw(view, object, psymval,
9594 relative_address_base, thumb_bit,
9598 case elfcpp::R_ARM_MOVT_PREL:
9599 case elfcpp::R_ARM_MOVT_BREL:
9601 Arm_relocate_functions::movt(view, object, psymval,
9602 relative_address_base);
9605 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9606 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9607 case elfcpp::R_ARM_THM_MOVW_BREL:
9609 Arm_relocate_functions::thm_movw(view, object, psymval,
9610 relative_address_base,
9611 thumb_bit, check_overflow);
9614 case elfcpp::R_ARM_THM_MOVT_PREL:
9615 case elfcpp::R_ARM_THM_MOVT_BREL:
9617 Arm_relocate_functions::thm_movt(view, object, psymval,
9618 relative_address_base);
9621 case elfcpp::R_ARM_REL32:
9622 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9623 address, thumb_bit);
9626 case elfcpp::R_ARM_THM_ABS5:
9627 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9628 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
9631 // Thumb long branches.
9632 case elfcpp::R_ARM_THM_CALL:
9633 case elfcpp::R_ARM_THM_XPC22:
9634 case elfcpp::R_ARM_THM_JUMP24:
9636 Arm_relocate_functions::thumb_branch_common(
9637 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9638 thumb_bit, is_weakly_undefined_without_plt);
9641 case elfcpp::R_ARM_GOTOFF32:
9643 Arm_address got_origin;
9644 got_origin = target->got_plt_section()->address();
9645 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9646 got_origin, thumb_bit);
9650 case elfcpp::R_ARM_BASE_PREL:
9651 gold_assert(gsym != NULL);
9653 Arm_relocate_functions::base_prel(view, sym_origin, address);
9656 case elfcpp::R_ARM_BASE_ABS:
9657 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9658 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
9661 case elfcpp::R_ARM_GOT_BREL:
9662 gold_assert(have_got_offset);
9663 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
9666 case elfcpp::R_ARM_GOT_PREL:
9667 gold_assert(have_got_offset);
9668 // Get the address origin for GOT PLT, which is allocated right
9669 // after the GOT section, to calculate an absolute address of
9670 // the symbol GOT entry (got_origin + got_offset).
9671 Arm_address got_origin;
9672 got_origin = target->got_plt_section()->address();
9673 reloc_status = Arm_relocate_functions::got_prel(view,
9674 got_origin + got_offset,
9678 case elfcpp::R_ARM_PLT32:
9679 case elfcpp::R_ARM_CALL:
9680 case elfcpp::R_ARM_JUMP24:
9681 case elfcpp::R_ARM_XPC25:
9682 gold_assert(gsym == NULL
9683 || gsym->has_plt_offset()
9684 || gsym->final_value_is_known()
9685 || (gsym->is_defined()
9686 && !gsym->is_from_dynobj()
9687 && !gsym->is_preemptible()));
9689 Arm_relocate_functions::arm_branch_common(
9690 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9691 thumb_bit, is_weakly_undefined_without_plt);
9694 case elfcpp::R_ARM_THM_JUMP19:
9696 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
9700 case elfcpp::R_ARM_THM_JUMP6:
9702 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
9705 case elfcpp::R_ARM_THM_JUMP8:
9707 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
9710 case elfcpp::R_ARM_THM_JUMP11:
9712 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
9715 case elfcpp::R_ARM_PREL31:
9716 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
9717 address, thumb_bit);
9720 case elfcpp::R_ARM_V4BX:
9721 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
9723 const bool is_v4bx_interworking =
9724 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
9726 Arm_relocate_functions::v4bx(relinfo, view, object, address,
9727 is_v4bx_interworking);
9731 case elfcpp::R_ARM_THM_PC8:
9733 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
9736 case elfcpp::R_ARM_THM_PC12:
9738 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
9741 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9743 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
9747 case elfcpp::R_ARM_ALU_PC_G0_NC:
9748 case elfcpp::R_ARM_ALU_PC_G0:
9749 case elfcpp::R_ARM_ALU_PC_G1_NC:
9750 case elfcpp::R_ARM_ALU_PC_G1:
9751 case elfcpp::R_ARM_ALU_PC_G2:
9752 case elfcpp::R_ARM_ALU_SB_G0_NC:
9753 case elfcpp::R_ARM_ALU_SB_G0:
9754 case elfcpp::R_ARM_ALU_SB_G1_NC:
9755 case elfcpp::R_ARM_ALU_SB_G1:
9756 case elfcpp::R_ARM_ALU_SB_G2:
9758 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
9759 reloc_property->group_index(),
9760 relative_address_base,
9761 thumb_bit, check_overflow);
9764 case elfcpp::R_ARM_LDR_PC_G0:
9765 case elfcpp::R_ARM_LDR_PC_G1:
9766 case elfcpp::R_ARM_LDR_PC_G2:
9767 case elfcpp::R_ARM_LDR_SB_G0:
9768 case elfcpp::R_ARM_LDR_SB_G1:
9769 case elfcpp::R_ARM_LDR_SB_G2:
9771 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
9772 reloc_property->group_index(),
9773 relative_address_base);
9776 case elfcpp::R_ARM_LDRS_PC_G0:
9777 case elfcpp::R_ARM_LDRS_PC_G1:
9778 case elfcpp::R_ARM_LDRS_PC_G2:
9779 case elfcpp::R_ARM_LDRS_SB_G0:
9780 case elfcpp::R_ARM_LDRS_SB_G1:
9781 case elfcpp::R_ARM_LDRS_SB_G2:
9783 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
9784 reloc_property->group_index(),
9785 relative_address_base);
9788 case elfcpp::R_ARM_LDC_PC_G0:
9789 case elfcpp::R_ARM_LDC_PC_G1:
9790 case elfcpp::R_ARM_LDC_PC_G2:
9791 case elfcpp::R_ARM_LDC_SB_G0:
9792 case elfcpp::R_ARM_LDC_SB_G1:
9793 case elfcpp::R_ARM_LDC_SB_G2:
9795 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
9796 reloc_property->group_index(),
9797 relative_address_base);
9800 // These are initial tls relocs, which are expected when
9802 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9803 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9804 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9805 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9806 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9808 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval,
9809 view, address, view_size);
9812 // The known and unknown unsupported and/or deprecated relocations.
9813 case elfcpp::R_ARM_PC24:
9814 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9815 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9816 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9818 // Just silently leave the method. We should get an appropriate error
9819 // message in the scan methods.
9823 // Report any errors.
9824 switch (reloc_status)
9826 case Arm_relocate_functions::STATUS_OKAY:
9828 case Arm_relocate_functions::STATUS_OVERFLOW:
9829 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9830 _("relocation overflow in %s"),
9831 reloc_property->name().c_str());
9833 case Arm_relocate_functions::STATUS_BAD_RELOC:
9834 gold_error_at_location(
9838 _("unexpected opcode while processing relocation %s"),
9839 reloc_property->name().c_str());
9848 // Perform a TLS relocation.
9850 template<bool big_endian>
9851 inline typename Arm_relocate_functions<big_endian>::Status
9852 Target_arm<big_endian>::Relocate::relocate_tls(
9853 const Relocate_info<32, big_endian>* relinfo,
9854 Target_arm<big_endian>* target,
9856 const elfcpp::Rel<32, big_endian>& rel,
9857 unsigned int r_type,
9858 const Sized_symbol<32>* gsym,
9859 const Symbol_value<32>* psymval,
9860 unsigned char* view,
9861 elfcpp::Elf_types<32>::Elf_Addr address,
9862 section_size_type /*view_size*/ )
9864 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs;
9865 typedef Relocate_functions<32, big_endian> RelocFuncs;
9866 Output_segment* tls_segment = relinfo->layout->tls_segment();
9868 const Sized_relobj_file<32, big_endian>* object = relinfo->object;
9870 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0);
9872 const bool is_final = (gsym == NULL
9873 ? !parameters->options().shared()
9874 : gsym->final_value_is_known());
9875 const tls::Tls_optimization optimized_type
9876 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
9879 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9881 unsigned int got_type = GOT_TYPE_TLS_PAIR;
9882 unsigned int got_offset;
9885 gold_assert(gsym->has_got_offset(got_type));
9886 got_offset = gsym->got_offset(got_type) - target->got_size();
9890 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9891 gold_assert(object->local_has_got_offset(r_sym, got_type));
9892 got_offset = (object->local_got_offset(r_sym, got_type)
9893 - target->got_size());
9895 if (optimized_type == tls::TLSOPT_NONE)
9897 Arm_address got_entry =
9898 target->got_plt_section()->address() + got_offset;
9900 // Relocate the field with the PC relative offset of the pair of
9902 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9903 return ArmRelocFuncs::STATUS_OKAY;
9908 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9909 if (optimized_type == tls::TLSOPT_NONE)
9911 // Relocate the field with the offset of the GOT entry for
9912 // the module index.
9913 unsigned int got_offset;
9914 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL)
9915 - target->got_size());
9916 Arm_address got_entry =
9917 target->got_plt_section()->address() + got_offset;
9919 // Relocate the field with the PC relative offset of the pair of
9921 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9922 return ArmRelocFuncs::STATUS_OKAY;
9926 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9927 RelocFuncs::rel32_unaligned(view, value);
9928 return ArmRelocFuncs::STATUS_OKAY;
9930 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9931 if (optimized_type == tls::TLSOPT_NONE)
9933 // Relocate the field with the offset of the GOT entry for
9934 // the tp-relative offset of the symbol.
9935 unsigned int got_type = GOT_TYPE_TLS_OFFSET;
9936 unsigned int got_offset;
9939 gold_assert(gsym->has_got_offset(got_type));
9940 got_offset = gsym->got_offset(got_type);
9944 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9945 gold_assert(object->local_has_got_offset(r_sym, got_type));
9946 got_offset = object->local_got_offset(r_sym, got_type);
9949 // All GOT offsets are relative to the end of the GOT.
9950 got_offset -= target->got_size();
9952 Arm_address got_entry =
9953 target->got_plt_section()->address() + got_offset;
9955 // Relocate the field with the PC relative offset of the GOT entry.
9956 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9957 return ArmRelocFuncs::STATUS_OKAY;
9961 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9962 // If we're creating a shared library, a dynamic relocation will
9963 // have been created for this location, so do not apply it now.
9964 if (!parameters->options().shared())
9966 gold_assert(tls_segment != NULL);
9968 // $tp points to the TCB, which is followed by the TLS, so we
9969 // need to add TCB size to the offset.
9970 Arm_address aligned_tcb_size =
9971 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
9972 RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size);
9975 return ArmRelocFuncs::STATUS_OKAY;
9981 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9982 _("unsupported reloc %u"),
9984 return ArmRelocFuncs::STATUS_BAD_RELOC;
9987 // Relocate section data.
9989 template<bool big_endian>
9991 Target_arm<big_endian>::relocate_section(
9992 const Relocate_info<32, big_endian>* relinfo,
9993 unsigned int sh_type,
9994 const unsigned char* prelocs,
9996 Output_section* output_section,
9997 bool needs_special_offset_handling,
9998 unsigned char* view,
9999 Arm_address address,
10000 section_size_type view_size,
10001 const Reloc_symbol_changes* reloc_symbol_changes)
10003 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
10004 gold_assert(sh_type == elfcpp::SHT_REL);
10006 // See if we are relocating a relaxed input section. If so, the view
10007 // covers the whole output section and we need to adjust accordingly.
10008 if (needs_special_offset_handling)
10010 const Output_relaxed_input_section* poris =
10011 output_section->find_relaxed_input_section(relinfo->object,
10012 relinfo->data_shndx);
10015 Arm_address section_address = poris->address();
10016 section_size_type section_size = poris->data_size();
10018 gold_assert((section_address >= address)
10019 && ((section_address + section_size)
10020 <= (address + view_size)));
10022 off_t offset = section_address - address;
10025 view_size = section_size;
10029 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
10030 Arm_relocate, gold::Default_comdat_behavior>(
10036 needs_special_offset_handling,
10040 reloc_symbol_changes);
10043 // Return the size of a relocation while scanning during a relocatable
10046 template<bool big_endian>
10048 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
10049 unsigned int r_type,
10052 r_type = get_real_reloc_type(r_type);
10053 const Arm_reloc_property* arp =
10054 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10056 return arp->size();
10059 std::string reloc_name =
10060 arm_reloc_property_table->reloc_name_in_error_message(r_type);
10061 gold_error(_("%s: unexpected %s in object file"),
10062 object->name().c_str(), reloc_name.c_str());
10067 // Scan the relocs during a relocatable link.
10069 template<bool big_endian>
10071 Target_arm<big_endian>::scan_relocatable_relocs(
10072 Symbol_table* symtab,
10074 Sized_relobj_file<32, big_endian>* object,
10075 unsigned int data_shndx,
10076 unsigned int sh_type,
10077 const unsigned char* prelocs,
10078 size_t reloc_count,
10079 Output_section* output_section,
10080 bool needs_special_offset_handling,
10081 size_t local_symbol_count,
10082 const unsigned char* plocal_symbols,
10083 Relocatable_relocs* rr)
10085 gold_assert(sh_type == elfcpp::SHT_REL);
10087 typedef Arm_scan_relocatable_relocs<big_endian, elfcpp::SHT_REL,
10088 Relocatable_size_for_reloc> Scan_relocatable_relocs;
10090 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
10091 Scan_relocatable_relocs>(
10099 needs_special_offset_handling,
10100 local_symbol_count,
10105 // Emit relocations for a section.
10107 template<bool big_endian>
10109 Target_arm<big_endian>::relocate_relocs(
10110 const Relocate_info<32, big_endian>* relinfo,
10111 unsigned int sh_type,
10112 const unsigned char* prelocs,
10113 size_t reloc_count,
10114 Output_section* output_section,
10115 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10116 const Relocatable_relocs* rr,
10117 unsigned char* view,
10118 Arm_address view_address,
10119 section_size_type view_size,
10120 unsigned char* reloc_view,
10121 section_size_type reloc_view_size)
10123 gold_assert(sh_type == elfcpp::SHT_REL);
10125 gold::relocate_relocs<32, big_endian, elfcpp::SHT_REL>(
10130 offset_in_output_section,
10139 // Perform target-specific processing in a relocatable link. This is
10140 // only used if we use the relocation strategy RELOC_SPECIAL.
10142 template<bool big_endian>
10144 Target_arm<big_endian>::relocate_special_relocatable(
10145 const Relocate_info<32, big_endian>* relinfo,
10146 unsigned int sh_type,
10147 const unsigned char* preloc_in,
10149 Output_section* output_section,
10150 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10151 unsigned char* view,
10152 elfcpp::Elf_types<32>::Elf_Addr view_address,
10154 unsigned char* preloc_out)
10156 // We can only handle REL type relocation sections.
10157 gold_assert(sh_type == elfcpp::SHT_REL);
10159 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype;
10160 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write
10162 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1;
10164 const Arm_relobj<big_endian>* object =
10165 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
10166 const unsigned int local_count = object->local_symbol_count();
10168 Reltype reloc(preloc_in);
10169 Reltype_write reloc_write(preloc_out);
10171 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
10172 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
10173 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
10175 const Arm_reloc_property* arp =
10176 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10177 gold_assert(arp != NULL);
10179 // Get the new symbol index.
10180 // We only use RELOC_SPECIAL strategy in local relocations.
10181 gold_assert(r_sym < local_count);
10183 // We are adjusting a section symbol. We need to find
10184 // the symbol table index of the section symbol for
10185 // the output section corresponding to input section
10186 // in which this symbol is defined.
10188 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary);
10189 gold_assert(is_ordinary);
10190 Output_section* os = object->output_section(shndx);
10191 gold_assert(os != NULL);
10192 gold_assert(os->needs_symtab_index());
10193 unsigned int new_symndx = os->symtab_index();
10195 // Get the new offset--the location in the output section where
10196 // this relocation should be applied.
10198 Arm_address offset = reloc.get_r_offset();
10199 Arm_address new_offset;
10200 if (offset_in_output_section != invalid_address)
10201 new_offset = offset + offset_in_output_section;
10204 section_offset_type sot_offset =
10205 convert_types<section_offset_type, Arm_address>(offset);
10206 section_offset_type new_sot_offset =
10207 output_section->output_offset(object, relinfo->data_shndx,
10209 gold_assert(new_sot_offset != -1);
10210 new_offset = new_sot_offset;
10213 // In an object file, r_offset is an offset within the section.
10214 // In an executable or dynamic object, generated by
10215 // --emit-relocs, r_offset is an absolute address.
10216 if (!parameters->options().relocatable())
10218 new_offset += view_address;
10219 if (offset_in_output_section != invalid_address)
10220 new_offset -= offset_in_output_section;
10223 reloc_write.put_r_offset(new_offset);
10224 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type));
10226 // Handle the reloc addend.
10227 // The relocation uses a section symbol in the input file.
10228 // We are adjusting it to use a section symbol in the output
10229 // file. The input section symbol refers to some address in
10230 // the input section. We need the relocation in the output
10231 // file to refer to that same address. This adjustment to
10232 // the addend is the same calculation we use for a simple
10233 // absolute relocation for the input section symbol.
10235 const Symbol_value<32>* psymval = object->local_symbol(r_sym);
10237 // Handle THUMB bit.
10238 Symbol_value<32> symval;
10239 Arm_address thumb_bit =
10240 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
10242 && arp->uses_thumb_bit()
10243 && ((psymval->value(object, 0) & 1) != 0))
10245 Arm_address stripped_value =
10246 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
10247 symval.set_output_value(stripped_value);
10251 unsigned char* paddend = view + offset;
10252 typename Arm_relocate_functions<big_endian>::Status reloc_status =
10253 Arm_relocate_functions<big_endian>::STATUS_OKAY;
10256 case elfcpp::R_ARM_ABS8:
10257 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object,
10261 case elfcpp::R_ARM_ABS12:
10262 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object,
10266 case elfcpp::R_ARM_ABS16:
10267 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object,
10271 case elfcpp::R_ARM_THM_ABS5:
10272 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend,
10277 case elfcpp::R_ARM_MOVW_ABS_NC:
10278 case elfcpp::R_ARM_MOVW_PREL_NC:
10279 case elfcpp::R_ARM_MOVW_BREL_NC:
10280 case elfcpp::R_ARM_MOVW_BREL:
10281 reloc_status = Arm_relocate_functions<big_endian>::movw(
10282 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10285 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
10286 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
10287 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
10288 case elfcpp::R_ARM_THM_MOVW_BREL:
10289 reloc_status = Arm_relocate_functions<big_endian>::thm_movw(
10290 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10293 case elfcpp::R_ARM_THM_CALL:
10294 case elfcpp::R_ARM_THM_XPC22:
10295 case elfcpp::R_ARM_THM_JUMP24:
10297 Arm_relocate_functions<big_endian>::thumb_branch_common(
10298 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10302 case elfcpp::R_ARM_PLT32:
10303 case elfcpp::R_ARM_CALL:
10304 case elfcpp::R_ARM_JUMP24:
10305 case elfcpp::R_ARM_XPC25:
10307 Arm_relocate_functions<big_endian>::arm_branch_common(
10308 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10312 case elfcpp::R_ARM_THM_JUMP19:
10314 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object,
10315 psymval, 0, thumb_bit);
10318 case elfcpp::R_ARM_THM_JUMP6:
10320 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval,
10324 case elfcpp::R_ARM_THM_JUMP8:
10326 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval,
10330 case elfcpp::R_ARM_THM_JUMP11:
10332 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval,
10336 case elfcpp::R_ARM_PREL31:
10338 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0,
10342 case elfcpp::R_ARM_THM_PC8:
10344 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval,
10348 case elfcpp::R_ARM_THM_PC12:
10350 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval,
10354 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
10356 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval,
10360 // These relocation truncate relocation results so we cannot handle them
10361 // in a relocatable link.
10362 case elfcpp::R_ARM_MOVT_ABS:
10363 case elfcpp::R_ARM_THM_MOVT_ABS:
10364 case elfcpp::R_ARM_MOVT_PREL:
10365 case elfcpp::R_ARM_MOVT_BREL:
10366 case elfcpp::R_ARM_THM_MOVT_PREL:
10367 case elfcpp::R_ARM_THM_MOVT_BREL:
10368 case elfcpp::R_ARM_ALU_PC_G0_NC:
10369 case elfcpp::R_ARM_ALU_PC_G0:
10370 case elfcpp::R_ARM_ALU_PC_G1_NC:
10371 case elfcpp::R_ARM_ALU_PC_G1:
10372 case elfcpp::R_ARM_ALU_PC_G2:
10373 case elfcpp::R_ARM_ALU_SB_G0_NC:
10374 case elfcpp::R_ARM_ALU_SB_G0:
10375 case elfcpp::R_ARM_ALU_SB_G1_NC:
10376 case elfcpp::R_ARM_ALU_SB_G1:
10377 case elfcpp::R_ARM_ALU_SB_G2:
10378 case elfcpp::R_ARM_LDR_PC_G0:
10379 case elfcpp::R_ARM_LDR_PC_G1:
10380 case elfcpp::R_ARM_LDR_PC_G2:
10381 case elfcpp::R_ARM_LDR_SB_G0:
10382 case elfcpp::R_ARM_LDR_SB_G1:
10383 case elfcpp::R_ARM_LDR_SB_G2:
10384 case elfcpp::R_ARM_LDRS_PC_G0:
10385 case elfcpp::R_ARM_LDRS_PC_G1:
10386 case elfcpp::R_ARM_LDRS_PC_G2:
10387 case elfcpp::R_ARM_LDRS_SB_G0:
10388 case elfcpp::R_ARM_LDRS_SB_G1:
10389 case elfcpp::R_ARM_LDRS_SB_G2:
10390 case elfcpp::R_ARM_LDC_PC_G0:
10391 case elfcpp::R_ARM_LDC_PC_G1:
10392 case elfcpp::R_ARM_LDC_PC_G2:
10393 case elfcpp::R_ARM_LDC_SB_G0:
10394 case elfcpp::R_ARM_LDC_SB_G1:
10395 case elfcpp::R_ARM_LDC_SB_G2:
10396 gold_error(_("cannot handle %s in a relocatable link"),
10397 arp->name().c_str());
10401 gold_unreachable();
10404 // Report any errors.
10405 switch (reloc_status)
10407 case Arm_relocate_functions<big_endian>::STATUS_OKAY:
10409 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW:
10410 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10411 _("relocation overflow in %s"),
10412 arp->name().c_str());
10414 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC:
10415 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10416 _("unexpected opcode while processing relocation %s"),
10417 arp->name().c_str());
10420 gold_unreachable();
10424 // Return the value to use for a dynamic symbol which requires special
10425 // treatment. This is how we support equality comparisons of function
10426 // pointers across shared library boundaries, as described in the
10427 // processor specific ABI supplement.
10429 template<bool big_endian>
10431 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
10433 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
10434 return this->plt_address_for_global(gsym);
10437 // Map platform-specific relocs to real relocs
10439 template<bool big_endian>
10441 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type)
10445 case elfcpp::R_ARM_TARGET1:
10446 // This is either R_ARM_ABS32 or R_ARM_REL32;
10447 return elfcpp::R_ARM_ABS32;
10449 case elfcpp::R_ARM_TARGET2:
10450 // This can be any reloc type but usually is R_ARM_GOT_PREL
10451 return elfcpp::R_ARM_GOT_PREL;
10458 // Whether if two EABI versions V1 and V2 are compatible.
10460 template<bool big_endian>
10462 Target_arm<big_endian>::are_eabi_versions_compatible(
10463 elfcpp::Elf_Word v1,
10464 elfcpp::Elf_Word v2)
10466 // v4 and v5 are the same spec before and after it was released,
10467 // so allow mixing them.
10468 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN)
10469 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
10470 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
10476 // Combine FLAGS from an input object called NAME and the processor-specific
10477 // flags in the ELF header of the output. Much of this is adapted from the
10478 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10479 // in bfd/elf32-arm.c.
10481 template<bool big_endian>
10483 Target_arm<big_endian>::merge_processor_specific_flags(
10484 const std::string& name,
10485 elfcpp::Elf_Word flags)
10487 if (this->are_processor_specific_flags_set())
10489 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
10491 // Nothing to merge if flags equal to those in output.
10492 if (flags == out_flags)
10495 // Complain about various flag mismatches.
10496 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
10497 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
10498 if (!this->are_eabi_versions_compatible(version1, version2)
10499 && parameters->options().warn_mismatch())
10500 gold_error(_("Source object %s has EABI version %d but output has "
10501 "EABI version %d."),
10503 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
10504 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
10508 // If the input is the default architecture and had the default
10509 // flags then do not bother setting the flags for the output
10510 // architecture, instead allow future merges to do this. If no
10511 // future merges ever set these flags then they will retain their
10512 // uninitialised values, which surprise surprise, correspond
10513 // to the default values.
10517 // This is the first time, just copy the flags.
10518 // We only copy the EABI version for now.
10519 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
10523 // Adjust ELF file header.
10524 template<bool big_endian>
10526 Target_arm<big_endian>::do_adjust_elf_header(
10527 unsigned char* view,
10530 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
10532 elfcpp::Ehdr<32, big_endian> ehdr(view);
10533 elfcpp::Elf_Word flags = this->processor_specific_flags();
10534 unsigned char e_ident[elfcpp::EI_NIDENT];
10535 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
10537 if (elfcpp::arm_eabi_version(flags)
10538 == elfcpp::EF_ARM_EABI_UNKNOWN)
10539 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
10541 e_ident[elfcpp::EI_OSABI] = 0;
10542 e_ident[elfcpp::EI_ABIVERSION] = 0;
10544 // FIXME: Do EF_ARM_BE8 adjustment.
10546 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10548 if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5)
10550 elfcpp::Elf_Half type = ehdr.get_e_type();
10551 if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN)
10553 Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args);
10554 if (attr->int_value() == elfcpp::AEABI_VFP_args_vfp)
10555 flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD;
10557 flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT;
10558 this->set_processor_specific_flags(flags);
10561 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
10562 oehdr.put_e_ident(e_ident);
10563 oehdr.put_e_flags(this->processor_specific_flags());
10566 // do_make_elf_object to override the same function in the base class.
10567 // We need to use a target-specific sub-class of
10568 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10569 // Hence we need to have our own ELF object creation.
10571 template<bool big_endian>
10573 Target_arm<big_endian>::do_make_elf_object(
10574 const std::string& name,
10575 Input_file* input_file,
10576 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
10578 int et = ehdr.get_e_type();
10579 // ET_EXEC files are valid input for --just-symbols/-R,
10580 // and we treat them as relocatable objects.
10581 if (et == elfcpp::ET_REL
10582 || (et == elfcpp::ET_EXEC && input_file->just_symbols()))
10584 Arm_relobj<big_endian>* obj =
10585 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
10589 else if (et == elfcpp::ET_DYN)
10591 Sized_dynobj<32, big_endian>* obj =
10592 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
10598 gold_error(_("%s: unsupported ELF file type %d"),
10604 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10605 // Returns -1 if no architecture could be read.
10606 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10608 template<bool big_endian>
10610 Target_arm<big_endian>::get_secondary_compatible_arch(
10611 const Attributes_section_data* pasd)
10613 const Object_attribute* known_attributes =
10614 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10616 // Note: the tag and its argument below are uleb128 values, though
10617 // currently-defined values fit in one byte for each.
10618 const std::string& sv =
10619 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
10621 && sv.data()[0] == elfcpp::Tag_CPU_arch
10622 && (sv.data()[1] & 128) != 128)
10623 return sv.data()[1];
10625 // This tag is "safely ignorable", so don't complain if it looks funny.
10629 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10630 // The tag is removed if ARCH is -1.
10631 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10633 template<bool big_endian>
10635 Target_arm<big_endian>::set_secondary_compatible_arch(
10636 Attributes_section_data* pasd,
10639 Object_attribute* known_attributes =
10640 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10644 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
10648 // Note: the tag and its argument below are uleb128 values, though
10649 // currently-defined values fit in one byte for each.
10651 sv[0] = elfcpp::Tag_CPU_arch;
10652 gold_assert(arch != 0);
10656 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
10659 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10661 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10663 template<bool big_endian>
10665 Target_arm<big_endian>::tag_cpu_arch_combine(
10668 int* secondary_compat_out,
10670 int secondary_compat)
10672 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10673 static const int v6t2[] =
10675 T(V6T2), // PRE_V4.
10685 static const int v6k[] =
10698 static const int v7[] =
10712 static const int v6_m[] =
10727 static const int v6s_m[] =
10743 static const int v7e_m[] =
10750 T(V7E_M), // V5TEJ.
10757 T(V7E_M), // V6S_M.
10760 static const int v8[] =
10778 static const int v4t_plus_v6_m[] =
10785 T(V5TEJ), // V5TEJ.
10792 T(V6S_M), // V6S_M.
10793 T(V7E_M), // V7E_M.
10795 T(V4T_PLUS_V6_M) // V4T plus V6_M.
10797 static const int* comb[] =
10806 // Pseudo-architecture.
10810 // Check we've not got a higher architecture than we know about.
10812 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH)
10814 gold_error(_("%s: unknown CPU architecture"), name);
10818 // Override old tag if we have a Tag_also_compatible_with on the output.
10820 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10821 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10822 oldtag = T(V4T_PLUS_V6_M);
10824 // And override the new tag if we have a Tag_also_compatible_with on the
10827 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10828 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10829 newtag = T(V4T_PLUS_V6_M);
10831 // Architectures before V6KZ add features monotonically.
10832 int tagh = std::max(oldtag, newtag);
10833 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
10836 int tagl = std::min(oldtag, newtag);
10837 int result = comb[tagh - T(V6T2)][tagl];
10839 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10840 // as the canonical version.
10841 if (result == T(V4T_PLUS_V6_M))
10844 *secondary_compat_out = T(V6_M);
10847 *secondary_compat_out = -1;
10851 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10852 name, oldtag, newtag);
10860 // Helper to print AEABI enum tag value.
10862 template<bool big_endian>
10864 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
10866 static const char* aeabi_enum_names[] =
10867 { "", "variable-size", "32-bit", "" };
10868 const size_t aeabi_enum_names_size =
10869 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
10871 if (value < aeabi_enum_names_size)
10872 return std::string(aeabi_enum_names[value]);
10876 sprintf(buffer, "<unknown value %u>", value);
10877 return std::string(buffer);
10881 // Return the string value to store in TAG_CPU_name.
10883 template<bool big_endian>
10885 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
10887 static const char* name_table[] = {
10888 // These aren't real CPU names, but we can't guess
10889 // that from the architecture version alone.
10906 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
10908 if (value < name_table_size)
10909 return std::string(name_table[value]);
10913 sprintf(buffer, "<unknown CPU value %u>", value);
10914 return std::string(buffer);
10918 // Query attributes object to see if integer divide instructions may be
10919 // present in an object.
10921 template<bool big_endian>
10923 Target_arm<big_endian>::attributes_accept_div(int arch, int profile,
10924 const Object_attribute* div_attr)
10926 switch (div_attr->int_value())
10929 // Integer divide allowed if instruction contained in
10931 if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
10933 else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M)
10939 // Integer divide explicitly prohibited.
10943 // Unrecognised case - treat as allowing divide everywhere.
10945 // Integer divide allowed in ARM state.
10950 // Query attributes object to see if integer divide instructions are
10951 // forbidden to be in the object. This is not the inverse of
10952 // attributes_accept_div.
10954 template<bool big_endian>
10956 Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr)
10958 return div_attr->int_value() == 1;
10961 // Merge object attributes from input file called NAME with those of the
10962 // output. The input object attributes are in the object pointed by PASD.
10964 template<bool big_endian>
10966 Target_arm<big_endian>::merge_object_attributes(
10968 const Attributes_section_data* pasd)
10970 // Return if there is no attributes section data.
10974 // If output has no object attributes, just copy.
10975 const int vendor = Object_attribute::OBJ_ATTR_PROC;
10976 if (this->attributes_section_data_ == NULL)
10978 this->attributes_section_data_ = new Attributes_section_data(*pasd);
10979 Object_attribute* out_attr =
10980 this->attributes_section_data_->known_attributes(vendor);
10982 // We do not output objects with Tag_MPextension_use_legacy - we move
10983 // the attribute's value to Tag_MPextension_use. */
10984 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0)
10986 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0
10987 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value()
10988 != out_attr[elfcpp::Tag_MPextension_use].int_value())
10990 gold_error(_("%s has both the current and legacy "
10991 "Tag_MPextension_use attributes"),
10995 out_attr[elfcpp::Tag_MPextension_use] =
10996 out_attr[elfcpp::Tag_MPextension_use_legacy];
10997 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0);
10998 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0);
11004 const Object_attribute* in_attr = pasd->known_attributes(vendor);
11005 Object_attribute* out_attr =
11006 this->attributes_section_data_->known_attributes(vendor);
11008 // This needs to happen before Tag_ABI_FP_number_model is merged. */
11009 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11010 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
11012 // Ignore mismatches if the object doesn't use floating point. */
11013 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11014 == elfcpp::AEABI_FP_number_model_none
11015 || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11016 != elfcpp::AEABI_FP_number_model_none
11017 && out_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11018 == elfcpp::AEABI_VFP_args_compatible))
11019 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
11020 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
11021 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11022 != elfcpp::AEABI_FP_number_model_none
11023 && in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11024 != elfcpp::AEABI_VFP_args_compatible
11025 && parameters->options().warn_mismatch())
11026 gold_error(_("%s uses VFP register arguments, output does not"),
11030 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
11032 // Merge this attribute with existing attributes.
11035 case elfcpp::Tag_CPU_raw_name:
11036 case elfcpp::Tag_CPU_name:
11037 // These are merged after Tag_CPU_arch.
11040 case elfcpp::Tag_ABI_optimization_goals:
11041 case elfcpp::Tag_ABI_FP_optimization_goals:
11042 // Use the first value seen.
11045 case elfcpp::Tag_CPU_arch:
11047 unsigned int saved_out_attr = out_attr->int_value();
11048 // Merge Tag_CPU_arch and Tag_also_compatible_with.
11049 int secondary_compat =
11050 this->get_secondary_compatible_arch(pasd);
11051 int secondary_compat_out =
11052 this->get_secondary_compatible_arch(
11053 this->attributes_section_data_);
11054 out_attr[i].set_int_value(
11055 tag_cpu_arch_combine(name, out_attr[i].int_value(),
11056 &secondary_compat_out,
11057 in_attr[i].int_value(),
11058 secondary_compat));
11059 this->set_secondary_compatible_arch(this->attributes_section_data_,
11060 secondary_compat_out);
11062 // Merge Tag_CPU_name and Tag_CPU_raw_name.
11063 if (out_attr[i].int_value() == saved_out_attr)
11064 ; // Leave the names alone.
11065 else if (out_attr[i].int_value() == in_attr[i].int_value())
11067 // The output architecture has been changed to match the
11068 // input architecture. Use the input names.
11069 out_attr[elfcpp::Tag_CPU_name].set_string_value(
11070 in_attr[elfcpp::Tag_CPU_name].string_value());
11071 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
11072 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
11076 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
11077 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
11080 // If we still don't have a value for Tag_CPU_name,
11081 // make one up now. Tag_CPU_raw_name remains blank.
11082 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
11084 const std::string cpu_name =
11085 this->tag_cpu_name_value(out_attr[i].int_value());
11086 // FIXME: If we see an unknown CPU, this will be set
11087 // to "<unknown CPU n>", where n is the attribute value.
11088 // This is different from BFD, which leaves the name alone.
11089 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
11094 case elfcpp::Tag_ARM_ISA_use:
11095 case elfcpp::Tag_THUMB_ISA_use:
11096 case elfcpp::Tag_WMMX_arch:
11097 case elfcpp::Tag_Advanced_SIMD_arch:
11098 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11099 case elfcpp::Tag_ABI_FP_rounding:
11100 case elfcpp::Tag_ABI_FP_exceptions:
11101 case elfcpp::Tag_ABI_FP_user_exceptions:
11102 case elfcpp::Tag_ABI_FP_number_model:
11103 case elfcpp::Tag_VFP_HP_extension:
11104 case elfcpp::Tag_CPU_unaligned_access:
11105 case elfcpp::Tag_T2EE_use:
11106 case elfcpp::Tag_Virtualization_use:
11107 case elfcpp::Tag_MPextension_use:
11108 // Use the largest value specified.
11109 if (in_attr[i].int_value() > out_attr[i].int_value())
11110 out_attr[i].set_int_value(in_attr[i].int_value());
11113 case elfcpp::Tag_ABI_align8_preserved:
11114 case elfcpp::Tag_ABI_PCS_RO_data:
11115 // Use the smallest value specified.
11116 if (in_attr[i].int_value() < out_attr[i].int_value())
11117 out_attr[i].set_int_value(in_attr[i].int_value());
11120 case elfcpp::Tag_ABI_align8_needed:
11121 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
11122 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
11123 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
11126 // This error message should be enabled once all non-conforming
11127 // binaries in the toolchain have had the attributes set
11129 // gold_error(_("output 8-byte data alignment conflicts with %s"),
11133 case elfcpp::Tag_ABI_FP_denormal:
11134 case elfcpp::Tag_ABI_PCS_GOT_use:
11136 // These tags have 0 = don't care, 1 = strong requirement,
11137 // 2 = weak requirement.
11138 static const int order_021[3] = {0, 2, 1};
11140 // Use the "greatest" from the sequence 0, 2, 1, or the largest
11141 // value if greater than 2 (for future-proofing).
11142 if ((in_attr[i].int_value() > 2
11143 && in_attr[i].int_value() > out_attr[i].int_value())
11144 || (in_attr[i].int_value() <= 2
11145 && out_attr[i].int_value() <= 2
11146 && (order_021[in_attr[i].int_value()]
11147 > order_021[out_attr[i].int_value()])))
11148 out_attr[i].set_int_value(in_attr[i].int_value());
11152 case elfcpp::Tag_CPU_arch_profile:
11153 if (out_attr[i].int_value() != in_attr[i].int_value())
11155 // 0 will merge with anything.
11156 // 'A' and 'S' merge to 'A'.
11157 // 'R' and 'S' merge to 'R'.
11158 // 'M' and 'A|R|S' is an error.
11159 if (out_attr[i].int_value() == 0
11160 || (out_attr[i].int_value() == 'S'
11161 && (in_attr[i].int_value() == 'A'
11162 || in_attr[i].int_value() == 'R')))
11163 out_attr[i].set_int_value(in_attr[i].int_value());
11164 else if (in_attr[i].int_value() == 0
11165 || (in_attr[i].int_value() == 'S'
11166 && (out_attr[i].int_value() == 'A'
11167 || out_attr[i].int_value() == 'R')))
11169 else if (parameters->options().warn_mismatch())
11172 (_("conflicting architecture profiles %c/%c"),
11173 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
11174 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
11178 case elfcpp::Tag_VFP_arch:
11180 static const struct
11184 } vfp_versions[7] =
11195 // Values greater than 6 aren't defined, so just pick the
11197 if (in_attr[i].int_value() > 6
11198 && in_attr[i].int_value() > out_attr[i].int_value())
11200 *out_attr = *in_attr;
11203 // The output uses the superset of input features
11204 // (ISA version) and registers.
11205 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
11206 vfp_versions[out_attr[i].int_value()].ver);
11207 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
11208 vfp_versions[out_attr[i].int_value()].regs);
11209 // This assumes all possible supersets are also a valid
11212 for (newval = 6; newval > 0; newval--)
11214 if (regs == vfp_versions[newval].regs
11215 && ver == vfp_versions[newval].ver)
11218 out_attr[i].set_int_value(newval);
11221 case elfcpp::Tag_PCS_config:
11222 if (out_attr[i].int_value() == 0)
11223 out_attr[i].set_int_value(in_attr[i].int_value());
11224 else if (in_attr[i].int_value() != 0
11225 && out_attr[i].int_value() != 0
11226 && parameters->options().warn_mismatch())
11228 // It's sometimes ok to mix different configs, so this is only
11230 gold_warning(_("%s: conflicting platform configuration"), name);
11233 case elfcpp::Tag_ABI_PCS_R9_use:
11234 if (in_attr[i].int_value() != out_attr[i].int_value()
11235 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
11236 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused
11237 && parameters->options().warn_mismatch())
11239 gold_error(_("%s: conflicting use of R9"), name);
11241 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
11242 out_attr[i].set_int_value(in_attr[i].int_value());
11244 case elfcpp::Tag_ABI_PCS_RW_data:
11245 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11246 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11247 != elfcpp::AEABI_R9_SB)
11248 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11249 != elfcpp::AEABI_R9_unused)
11250 && parameters->options().warn_mismatch())
11252 gold_error(_("%s: SB relative addressing conflicts with use "
11256 // Use the smallest value specified.
11257 if (in_attr[i].int_value() < out_attr[i].int_value())
11258 out_attr[i].set_int_value(in_attr[i].int_value());
11260 case elfcpp::Tag_ABI_PCS_wchar_t:
11261 if (out_attr[i].int_value()
11262 && in_attr[i].int_value()
11263 && out_attr[i].int_value() != in_attr[i].int_value()
11264 && parameters->options().warn_mismatch()
11265 && parameters->options().wchar_size_warning())
11267 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11268 "use %u-byte wchar_t; use of wchar_t values "
11269 "across objects may fail"),
11270 name, in_attr[i].int_value(),
11271 out_attr[i].int_value());
11273 else if (in_attr[i].int_value() && !out_attr[i].int_value())
11274 out_attr[i].set_int_value(in_attr[i].int_value());
11276 case elfcpp::Tag_ABI_enum_size:
11277 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
11279 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
11280 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
11282 // The existing object is compatible with anything.
11283 // Use whatever requirements the new object has.
11284 out_attr[i].set_int_value(in_attr[i].int_value());
11286 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
11287 && out_attr[i].int_value() != in_attr[i].int_value()
11288 && parameters->options().warn_mismatch()
11289 && parameters->options().enum_size_warning())
11291 unsigned int in_value = in_attr[i].int_value();
11292 unsigned int out_value = out_attr[i].int_value();
11293 gold_warning(_("%s uses %s enums yet the output is to use "
11294 "%s enums; use of enum values across objects "
11297 this->aeabi_enum_name(in_value).c_str(),
11298 this->aeabi_enum_name(out_value).c_str());
11302 case elfcpp::Tag_ABI_VFP_args:
11305 case elfcpp::Tag_ABI_WMMX_args:
11306 if (in_attr[i].int_value() != out_attr[i].int_value()
11307 && parameters->options().warn_mismatch())
11309 gold_error(_("%s uses iWMMXt register arguments, output does "
11314 case Object_attribute::Tag_compatibility:
11315 // Merged in target-independent code.
11317 case elfcpp::Tag_ABI_HardFP_use:
11318 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11319 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
11320 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
11321 out_attr[i].set_int_value(3);
11322 else if (in_attr[i].int_value() > out_attr[i].int_value())
11323 out_attr[i].set_int_value(in_attr[i].int_value());
11325 case elfcpp::Tag_ABI_FP_16bit_format:
11326 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
11328 if (in_attr[i].int_value() != out_attr[i].int_value()
11329 && parameters->options().warn_mismatch())
11330 gold_error(_("fp16 format mismatch between %s and output"),
11333 if (in_attr[i].int_value() != 0)
11334 out_attr[i].set_int_value(in_attr[i].int_value());
11337 case elfcpp::Tag_DIV_use:
11339 // A value of zero on input means that the divide
11340 // instruction may be used if available in the base
11341 // architecture as specified via Tag_CPU_arch and
11342 // Tag_CPU_arch_profile. A value of 1 means that the user
11343 // did not want divide instructions. A value of 2
11344 // explicitly means that divide instructions were allowed
11345 // in ARM and Thumb state.
11347 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)->
11349 int profile = this->
11350 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)->
11352 if (in_attr[i].int_value() == out_attr[i].int_value())
11356 else if (attributes_forbid_div(&in_attr[i])
11357 && !attributes_accept_div(arch, profile, &out_attr[i]))
11358 out_attr[i].set_int_value(1);
11359 else if (attributes_forbid_div(&out_attr[i])
11360 && attributes_accept_div(arch, profile, &in_attr[i]))
11361 out_attr[i].set_int_value(in_attr[i].int_value());
11362 else if (in_attr[i].int_value() == 2)
11363 out_attr[i].set_int_value(in_attr[i].int_value());
11367 case elfcpp::Tag_MPextension_use_legacy:
11368 // We don't output objects with Tag_MPextension_use_legacy - we
11369 // move the value to Tag_MPextension_use.
11370 if (in_attr[i].int_value() != 0
11371 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0)
11373 if (in_attr[elfcpp::Tag_MPextension_use].int_value()
11374 != in_attr[i].int_value())
11376 gold_error(_("%s has has both the current and legacy "
11377 "Tag_MPextension_use attributes"),
11382 if (in_attr[i].int_value()
11383 > out_attr[elfcpp::Tag_MPextension_use].int_value())
11384 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i];
11388 case elfcpp::Tag_nodefaults:
11389 // This tag is set if it exists, but the value is unused (and is
11390 // typically zero). We don't actually need to do anything here -
11391 // the merge happens automatically when the type flags are merged
11394 case elfcpp::Tag_also_compatible_with:
11395 // Already done in Tag_CPU_arch.
11397 case elfcpp::Tag_conformance:
11398 // Keep the attribute if it matches. Throw it away otherwise.
11399 // No attribute means no claim to conform.
11400 if (in_attr[i].string_value() != out_attr[i].string_value())
11401 out_attr[i].set_string_value("");
11406 const char* err_object = NULL;
11408 // The "known_obj_attributes" table does contain some undefined
11409 // attributes. Ensure that there are unused.
11410 if (out_attr[i].int_value() != 0
11411 || out_attr[i].string_value() != "")
11412 err_object = "output";
11413 else if (in_attr[i].int_value() != 0
11414 || in_attr[i].string_value() != "")
11417 if (err_object != NULL
11418 && parameters->options().warn_mismatch())
11420 // Attribute numbers >=64 (mod 128) can be safely ignored.
11421 if ((i & 127) < 64)
11422 gold_error(_("%s: unknown mandatory EABI object attribute "
11426 gold_warning(_("%s: unknown EABI object attribute %d"),
11430 // Only pass on attributes that match in both inputs.
11431 if (!in_attr[i].matches(out_attr[i]))
11433 out_attr[i].set_int_value(0);
11434 out_attr[i].set_string_value("");
11439 // If out_attr was copied from in_attr then it won't have a type yet.
11440 if (in_attr[i].type() && !out_attr[i].type())
11441 out_attr[i].set_type(in_attr[i].type());
11444 // Merge Tag_compatibility attributes and any common GNU ones.
11445 this->attributes_section_data_->merge(name, pasd);
11447 // Check for any attributes not known on ARM.
11448 typedef Vendor_object_attributes::Other_attributes Other_attributes;
11449 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
11450 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
11451 Other_attributes* out_other_attributes =
11452 this->attributes_section_data_->other_attributes(vendor);
11453 Other_attributes::iterator out_iter = out_other_attributes->begin();
11455 while (in_iter != in_other_attributes->end()
11456 || out_iter != out_other_attributes->end())
11458 const char* err_object = NULL;
11461 // The tags for each list are in numerical order.
11462 // If the tags are equal, then merge.
11463 if (out_iter != out_other_attributes->end()
11464 && (in_iter == in_other_attributes->end()
11465 || in_iter->first > out_iter->first))
11467 // This attribute only exists in output. We can't merge, and we
11468 // don't know what the tag means, so delete it.
11469 err_object = "output";
11470 err_tag = out_iter->first;
11471 int saved_tag = out_iter->first;
11472 delete out_iter->second;
11473 out_other_attributes->erase(out_iter);
11474 out_iter = out_other_attributes->upper_bound(saved_tag);
11476 else if (in_iter != in_other_attributes->end()
11477 && (out_iter != out_other_attributes->end()
11478 || in_iter->first < out_iter->first))
11480 // This attribute only exists in input. We can't merge, and we
11481 // don't know what the tag means, so ignore it.
11483 err_tag = in_iter->first;
11486 else // The tags are equal.
11488 // As present, all attributes in the list are unknown, and
11489 // therefore can't be merged meaningfully.
11490 err_object = "output";
11491 err_tag = out_iter->first;
11493 // Only pass on attributes that match in both inputs.
11494 if (!in_iter->second->matches(*(out_iter->second)))
11496 // No match. Delete the attribute.
11497 int saved_tag = out_iter->first;
11498 delete out_iter->second;
11499 out_other_attributes->erase(out_iter);
11500 out_iter = out_other_attributes->upper_bound(saved_tag);
11504 // Matched. Keep the attribute and move to the next.
11510 if (err_object && parameters->options().warn_mismatch())
11512 // Attribute numbers >=64 (mod 128) can be safely ignored. */
11513 if ((err_tag & 127) < 64)
11515 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11516 err_object, err_tag);
11520 gold_warning(_("%s: unknown EABI object attribute %d"),
11521 err_object, err_tag);
11527 // Stub-generation methods for Target_arm.
11529 // Make a new Arm_input_section object.
11531 template<bool big_endian>
11532 Arm_input_section<big_endian>*
11533 Target_arm<big_endian>::new_arm_input_section(
11535 unsigned int shndx)
11537 Section_id sid(relobj, shndx);
11539 Arm_input_section<big_endian>* arm_input_section =
11540 new Arm_input_section<big_endian>(relobj, shndx);
11541 arm_input_section->init();
11543 // Register new Arm_input_section in map for look-up.
11544 std::pair<typename Arm_input_section_map::iterator, bool> ins =
11545 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
11547 // Make sure that it we have not created another Arm_input_section
11548 // for this input section already.
11549 gold_assert(ins.second);
11551 return arm_input_section;
11554 // Find the Arm_input_section object corresponding to the SHNDX-th input
11555 // section of RELOBJ.
11557 template<bool big_endian>
11558 Arm_input_section<big_endian>*
11559 Target_arm<big_endian>::find_arm_input_section(
11561 unsigned int shndx) const
11563 Section_id sid(relobj, shndx);
11564 typename Arm_input_section_map::const_iterator p =
11565 this->arm_input_section_map_.find(sid);
11566 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
11569 // Make a new stub table.
11571 template<bool big_endian>
11572 Stub_table<big_endian>*
11573 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
11575 Stub_table<big_endian>* stub_table =
11576 new Stub_table<big_endian>(owner);
11577 this->stub_tables_.push_back(stub_table);
11579 stub_table->set_address(owner->address() + owner->data_size());
11580 stub_table->set_file_offset(owner->offset() + owner->data_size());
11581 stub_table->finalize_data_size();
11586 // Scan a relocation for stub generation.
11588 template<bool big_endian>
11590 Target_arm<big_endian>::scan_reloc_for_stub(
11591 const Relocate_info<32, big_endian>* relinfo,
11592 unsigned int r_type,
11593 const Sized_symbol<32>* gsym,
11594 unsigned int r_sym,
11595 const Symbol_value<32>* psymval,
11596 elfcpp::Elf_types<32>::Elf_Swxword addend,
11597 Arm_address address)
11599 const Arm_relobj<big_endian>* arm_relobj =
11600 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11602 bool target_is_thumb;
11603 Symbol_value<32> symval;
11606 // This is a global symbol. Determine if we use PLT and if the
11607 // final target is THUMB.
11608 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
11610 // This uses a PLT, change the symbol value.
11611 symval.set_output_value(this->plt_address_for_global(gsym));
11613 target_is_thumb = false;
11615 else if (gsym->is_undefined())
11616 // There is no need to generate a stub symbol is undefined.
11621 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
11622 || (gsym->type() == elfcpp::STT_FUNC
11623 && !gsym->is_undefined()
11624 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
11629 // This is a local symbol. Determine if the final target is THUMB.
11630 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
11633 // Strip LSB if this points to a THUMB target.
11634 const Arm_reloc_property* reloc_property =
11635 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
11636 gold_assert(reloc_property != NULL);
11637 if (target_is_thumb
11638 && reloc_property->uses_thumb_bit()
11639 && ((psymval->value(arm_relobj, 0) & 1) != 0))
11641 Arm_address stripped_value =
11642 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
11643 symval.set_output_value(stripped_value);
11647 // Get the symbol value.
11648 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
11650 // Owing to pipelining, the PC relative branches below actually skip
11651 // two instructions when the branch offset is 0.
11652 Arm_address destination;
11655 case elfcpp::R_ARM_CALL:
11656 case elfcpp::R_ARM_JUMP24:
11657 case elfcpp::R_ARM_PLT32:
11659 destination = value + addend + 8;
11661 case elfcpp::R_ARM_THM_CALL:
11662 case elfcpp::R_ARM_THM_XPC22:
11663 case elfcpp::R_ARM_THM_JUMP24:
11664 case elfcpp::R_ARM_THM_JUMP19:
11666 destination = value + addend + 4;
11669 gold_unreachable();
11672 Reloc_stub* stub = NULL;
11673 Stub_type stub_type =
11674 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
11676 if (stub_type != arm_stub_none)
11678 // Try looking up an existing stub from a stub table.
11679 Stub_table<big_endian>* stub_table =
11680 arm_relobj->stub_table(relinfo->data_shndx);
11681 gold_assert(stub_table != NULL);
11683 // Locate stub by destination.
11684 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
11686 // Create a stub if there is not one already
11687 stub = stub_table->find_reloc_stub(stub_key);
11690 // create a new stub and add it to stub table.
11691 stub = this->stub_factory().make_reloc_stub(stub_type);
11692 stub_table->add_reloc_stub(stub, stub_key);
11695 // Record the destination address.
11696 stub->set_destination_address(destination
11697 | (target_is_thumb ? 1 : 0));
11700 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11701 if (this->fix_cortex_a8_
11702 && (r_type == elfcpp::R_ARM_THM_JUMP24
11703 || r_type == elfcpp::R_ARM_THM_JUMP19
11704 || r_type == elfcpp::R_ARM_THM_CALL
11705 || r_type == elfcpp::R_ARM_THM_XPC22)
11706 && (address & 0xfffU) == 0xffeU)
11708 // Found a candidate. Note we haven't checked the destination is
11709 // within 4K here: if we do so (and don't create a record) we can't
11710 // tell that a branch should have been relocated when scanning later.
11711 this->cortex_a8_relocs_info_[address] =
11712 new Cortex_a8_reloc(stub, r_type,
11713 destination | (target_is_thumb ? 1 : 0));
11717 // This function scans a relocation sections for stub generation.
11718 // The template parameter Relocate must be a class type which provides
11719 // a single function, relocate(), which implements the machine
11720 // specific part of a relocation.
11722 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11723 // SHT_REL or SHT_RELA.
11725 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11726 // of relocs. OUTPUT_SECTION is the output section.
11727 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11728 // mapped to output offsets.
11730 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11731 // VIEW_SIZE is the size. These refer to the input section, unless
11732 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11733 // the output section.
11735 template<bool big_endian>
11736 template<int sh_type>
11738 Target_arm<big_endian>::scan_reloc_section_for_stubs(
11739 const Relocate_info<32, big_endian>* relinfo,
11740 const unsigned char* prelocs,
11741 size_t reloc_count,
11742 Output_section* output_section,
11743 bool needs_special_offset_handling,
11744 const unsigned char* view,
11745 elfcpp::Elf_types<32>::Elf_Addr view_address,
11748 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
11749 const int reloc_size =
11750 Reloc_types<sh_type, 32, big_endian>::reloc_size;
11752 Arm_relobj<big_endian>* arm_object =
11753 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11754 unsigned int local_count = arm_object->local_symbol_count();
11756 gold::Default_comdat_behavior default_comdat_behavior;
11757 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
11759 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
11761 Reltype reloc(prelocs);
11763 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
11764 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
11765 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
11767 r_type = this->get_real_reloc_type(r_type);
11769 // Only a few relocation types need stubs.
11770 if ((r_type != elfcpp::R_ARM_CALL)
11771 && (r_type != elfcpp::R_ARM_JUMP24)
11772 && (r_type != elfcpp::R_ARM_PLT32)
11773 && (r_type != elfcpp::R_ARM_THM_CALL)
11774 && (r_type != elfcpp::R_ARM_THM_XPC22)
11775 && (r_type != elfcpp::R_ARM_THM_JUMP24)
11776 && (r_type != elfcpp::R_ARM_THM_JUMP19)
11777 && (r_type != elfcpp::R_ARM_V4BX))
11780 section_offset_type offset =
11781 convert_to_section_size_type(reloc.get_r_offset());
11783 if (needs_special_offset_handling)
11785 offset = output_section->output_offset(relinfo->object,
11786 relinfo->data_shndx,
11792 // Create a v4bx stub if --fix-v4bx-interworking is used.
11793 if (r_type == elfcpp::R_ARM_V4BX)
11795 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING)
11797 // Get the BX instruction.
11798 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
11799 const Valtype* wv =
11800 reinterpret_cast<const Valtype*>(view + offset);
11801 elfcpp::Elf_types<32>::Elf_Swxword insn =
11802 elfcpp::Swap<32, big_endian>::readval(wv);
11803 const uint32_t reg = (insn & 0xf);
11807 // Try looking up an existing stub from a stub table.
11808 Stub_table<big_endian>* stub_table =
11809 arm_object->stub_table(relinfo->data_shndx);
11810 gold_assert(stub_table != NULL);
11812 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
11814 // create a new stub and add it to stub table.
11815 Arm_v4bx_stub* stub =
11816 this->stub_factory().make_arm_v4bx_stub(reg);
11817 gold_assert(stub != NULL);
11818 stub_table->add_arm_v4bx_stub(stub);
11826 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
11827 elfcpp::Elf_types<32>::Elf_Swxword addend =
11828 stub_addend_reader(r_type, view + offset, reloc);
11830 const Sized_symbol<32>* sym;
11832 Symbol_value<32> symval;
11833 const Symbol_value<32> *psymval;
11834 bool is_defined_in_discarded_section;
11835 unsigned int shndx;
11836 if (r_sym < local_count)
11839 psymval = arm_object->local_symbol(r_sym);
11841 // If the local symbol belongs to a section we are discarding,
11842 // and that section is a debug section, try to find the
11843 // corresponding kept section and map this symbol to its
11844 // counterpart in the kept section. The symbol must not
11845 // correspond to a section we are folding.
11847 shndx = psymval->input_shndx(&is_ordinary);
11848 is_defined_in_discarded_section =
11850 && shndx != elfcpp::SHN_UNDEF
11851 && !arm_object->is_section_included(shndx)
11852 && !relinfo->symtab->is_section_folded(arm_object, shndx));
11854 // We need to compute the would-be final value of this local
11856 if (!is_defined_in_discarded_section)
11858 typedef Sized_relobj_file<32, big_endian> ObjType;
11859 typename ObjType::Compute_final_local_value_status status =
11860 arm_object->compute_final_local_value(r_sym, psymval, &symval,
11862 if (status == ObjType::CFLV_OK)
11864 // Currently we cannot handle a branch to a target in
11865 // a merged section. If this is the case, issue an error
11866 // and also free the merge symbol value.
11867 if (!symval.has_output_value())
11869 const std::string& section_name =
11870 arm_object->section_name(shndx);
11871 arm_object->error(_("cannot handle branch to local %u "
11872 "in a merged section %s"),
11873 r_sym, section_name.c_str());
11879 // We cannot determine the final value.
11886 const Symbol* gsym;
11887 gsym = arm_object->global_symbol(r_sym);
11888 gold_assert(gsym != NULL);
11889 if (gsym->is_forwarder())
11890 gsym = relinfo->symtab->resolve_forwards(gsym);
11892 sym = static_cast<const Sized_symbol<32>*>(gsym);
11893 if (sym->has_symtab_index() && sym->symtab_index() != -1U)
11894 symval.set_output_symtab_index(sym->symtab_index());
11896 symval.set_no_output_symtab_entry();
11898 // We need to compute the would-be final value of this global
11900 const Symbol_table* symtab = relinfo->symtab;
11901 const Sized_symbol<32>* sized_symbol =
11902 symtab->get_sized_symbol<32>(gsym);
11903 Symbol_table::Compute_final_value_status status;
11904 Arm_address value =
11905 symtab->compute_final_value<32>(sized_symbol, &status);
11907 // Skip this if the symbol has not output section.
11908 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
11910 symval.set_output_value(value);
11912 if (gsym->type() == elfcpp::STT_TLS)
11913 symval.set_is_tls_symbol();
11914 else if (gsym->type() == elfcpp::STT_GNU_IFUNC)
11915 symval.set_is_ifunc_symbol();
11918 is_defined_in_discarded_section =
11919 (gsym->is_defined_in_discarded_section()
11920 && gsym->is_undefined());
11924 Symbol_value<32> symval2;
11925 if (is_defined_in_discarded_section)
11927 if (comdat_behavior == CB_UNDETERMINED)
11929 std::string name = arm_object->section_name(relinfo->data_shndx);
11930 comdat_behavior = default_comdat_behavior.get(name.c_str());
11932 if (comdat_behavior == CB_PRETEND)
11934 // FIXME: This case does not work for global symbols.
11935 // We have no place to store the original section index.
11936 // Fortunately this does not matter for comdat sections,
11937 // only for sections explicitly discarded by a linker
11940 typename elfcpp::Elf_types<32>::Elf_Addr value =
11941 arm_object->map_to_kept_section(shndx, &found);
11943 symval2.set_output_value(value + psymval->input_value());
11945 symval2.set_output_value(0);
11949 if (comdat_behavior == CB_WARNING)
11950 gold_warning_at_location(relinfo, i, offset,
11951 _("relocation refers to discarded "
11953 symval2.set_output_value(0);
11955 symval2.set_no_output_symtab_entry();
11956 psymval = &symval2;
11959 // If symbol is a section symbol, we don't know the actual type of
11960 // destination. Give up.
11961 if (psymval->is_section_symbol())
11964 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
11965 addend, view_address + offset);
11969 // Scan an input section for stub generation.
11971 template<bool big_endian>
11973 Target_arm<big_endian>::scan_section_for_stubs(
11974 const Relocate_info<32, big_endian>* relinfo,
11975 unsigned int sh_type,
11976 const unsigned char* prelocs,
11977 size_t reloc_count,
11978 Output_section* output_section,
11979 bool needs_special_offset_handling,
11980 const unsigned char* view,
11981 Arm_address view_address,
11982 section_size_type view_size)
11984 if (sh_type == elfcpp::SHT_REL)
11985 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
11990 needs_special_offset_handling,
11994 else if (sh_type == elfcpp::SHT_RELA)
11995 // We do not support RELA type relocations yet. This is provided for
11997 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
12002 needs_special_offset_handling,
12007 gold_unreachable();
12010 // Group input sections for stub generation.
12012 // We group input sections in an output section so that the total size,
12013 // including any padding space due to alignment is smaller than GROUP_SIZE
12014 // unless the only input section in group is bigger than GROUP_SIZE already.
12015 // Then an ARM stub table is created to follow the last input section
12016 // in group. For each group an ARM stub table is created an is placed
12017 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
12018 // extend the group after the stub table.
12020 template<bool big_endian>
12022 Target_arm<big_endian>::group_sections(
12024 section_size_type group_size,
12025 bool stubs_always_after_branch,
12028 // Group input sections and insert stub table
12029 Layout::Section_list section_list;
12030 layout->get_executable_sections(§ion_list);
12031 for (Layout::Section_list::const_iterator p = section_list.begin();
12032 p != section_list.end();
12035 Arm_output_section<big_endian>* output_section =
12036 Arm_output_section<big_endian>::as_arm_output_section(*p);
12037 output_section->group_sections(group_size, stubs_always_after_branch,
12042 // Relaxation hook. This is where we do stub generation.
12044 template<bool big_endian>
12046 Target_arm<big_endian>::do_relax(
12048 const Input_objects* input_objects,
12049 Symbol_table* symtab,
12053 // No need to generate stubs if this is a relocatable link.
12054 gold_assert(!parameters->options().relocatable());
12056 // If this is the first pass, we need to group input sections into
12058 bool done_exidx_fixup = false;
12059 typedef typename Stub_table_list::iterator Stub_table_iterator;
12062 // Determine the stub group size. The group size is the absolute
12063 // value of the parameter --stub-group-size. If --stub-group-size
12064 // is passed a negative value, we restrict stubs to be always after
12065 // the stubbed branches.
12066 int32_t stub_group_size_param =
12067 parameters->options().stub_group_size();
12068 bool stubs_always_after_branch = stub_group_size_param < 0;
12069 section_size_type stub_group_size = abs(stub_group_size_param);
12071 if (stub_group_size == 1)
12074 // Thumb branch range is +-4MB has to be used as the default
12075 // maximum size (a given section can contain both ARM and Thumb
12076 // code, so the worst case has to be taken into account). If we are
12077 // fixing cortex-a8 errata, the branch range has to be even smaller,
12078 // since wide conditional branch has a range of +-1MB only.
12080 // This value is 48K less than that, which allows for 4096
12081 // 12-byte stubs. If we exceed that, then we will fail to link.
12082 // The user will have to relink with an explicit group size
12084 stub_group_size = 4145152;
12087 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12088 // page as the first half of a 32-bit branch straddling two 4K pages.
12089 // This is a crude way of enforcing that. In addition, long conditional
12090 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
12091 // erratum, limit the group size to (1M - 12k) to avoid unreachable
12092 // cortex-A8 stubs from long conditional branches.
12093 if (this->fix_cortex_a8_)
12095 stubs_always_after_branch = true;
12096 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12);
12097 stub_group_size = std::max(stub_group_size, cortex_a8_group_size);
12100 group_sections(layout, stub_group_size, stubs_always_after_branch, task);
12102 // Also fix .ARM.exidx section coverage.
12103 Arm_output_section<big_endian>* exidx_output_section = NULL;
12104 for (Layout::Section_list::const_iterator p =
12105 layout->section_list().begin();
12106 p != layout->section_list().end();
12108 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
12110 if (exidx_output_section == NULL)
12111 exidx_output_section =
12112 Arm_output_section<big_endian>::as_arm_output_section(*p);
12114 // We cannot handle this now.
12115 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12116 "non-relocatable link"),
12117 exidx_output_section->name(),
12121 if (exidx_output_section != NULL)
12123 this->fix_exidx_coverage(layout, input_objects, exidx_output_section,
12125 done_exidx_fixup = true;
12130 // If this is not the first pass, addresses and file offsets have
12131 // been reset at this point, set them here.
12132 for (Stub_table_iterator sp = this->stub_tables_.begin();
12133 sp != this->stub_tables_.end();
12136 Arm_input_section<big_endian>* owner = (*sp)->owner();
12137 off_t off = align_address(owner->original_size(),
12138 (*sp)->addralign());
12139 (*sp)->set_address_and_file_offset(owner->address() + off,
12140 owner->offset() + off);
12144 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
12145 // beginning of each relaxation pass, just blow away all the stubs.
12146 // Alternatively, we could selectively remove only the stubs and reloc
12147 // information for code sections that have moved since the last pass.
12148 // That would require more book-keeping.
12149 if (this->fix_cortex_a8_)
12151 // Clear all Cortex-A8 reloc information.
12152 for (typename Cortex_a8_relocs_info::const_iterator p =
12153 this->cortex_a8_relocs_info_.begin();
12154 p != this->cortex_a8_relocs_info_.end();
12157 this->cortex_a8_relocs_info_.clear();
12159 // Remove all Cortex-A8 stubs.
12160 for (Stub_table_iterator sp = this->stub_tables_.begin();
12161 sp != this->stub_tables_.end();
12163 (*sp)->remove_all_cortex_a8_stubs();
12166 // Scan relocs for relocation stubs
12167 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12168 op != input_objects->relobj_end();
12171 Arm_relobj<big_endian>* arm_relobj =
12172 Arm_relobj<big_endian>::as_arm_relobj(*op);
12173 // Lock the object so we can read from it. This is only called
12174 // single-threaded from Layout::finalize, so it is OK to lock.
12175 Task_lock_obj<Object> tl(task, arm_relobj);
12176 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
12179 // Check all stub tables to see if any of them have their data sizes
12180 // or addresses alignments changed. These are the only things that
12182 bool any_stub_table_changed = false;
12183 Unordered_set<const Output_section*> sections_needing_adjustment;
12184 for (Stub_table_iterator sp = this->stub_tables_.begin();
12185 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12188 if ((*sp)->update_data_size_and_addralign())
12190 // Update data size of stub table owner.
12191 Arm_input_section<big_endian>* owner = (*sp)->owner();
12192 uint64_t address = owner->address();
12193 off_t offset = owner->offset();
12194 owner->reset_address_and_file_offset();
12195 owner->set_address_and_file_offset(address, offset);
12197 sections_needing_adjustment.insert(owner->output_section());
12198 any_stub_table_changed = true;
12202 // Output_section_data::output_section() returns a const pointer but we
12203 // need to update output sections, so we record all output sections needing
12204 // update above and scan the sections here to find out what sections need
12206 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
12207 p != layout->section_list().end();
12210 if (sections_needing_adjustment.find(*p)
12211 != sections_needing_adjustment.end())
12212 (*p)->set_section_offsets_need_adjustment();
12215 // Stop relaxation if no EXIDX fix-up and no stub table change.
12216 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
12218 // Finalize the stubs in the last relaxation pass.
12219 if (!continue_relaxation)
12221 for (Stub_table_iterator sp = this->stub_tables_.begin();
12222 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12224 (*sp)->finalize_stubs();
12226 // Update output local symbol counts of objects if necessary.
12227 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12228 op != input_objects->relobj_end();
12231 Arm_relobj<big_endian>* arm_relobj =
12232 Arm_relobj<big_endian>::as_arm_relobj(*op);
12234 // Update output local symbol counts. We need to discard local
12235 // symbols defined in parts of input sections that are discarded by
12237 if (arm_relobj->output_local_symbol_count_needs_update())
12239 // We need to lock the object's file to update it.
12240 Task_lock_obj<Object> tl(task, arm_relobj);
12241 arm_relobj->update_output_local_symbol_count();
12246 return continue_relaxation;
12249 // Relocate a stub.
12251 template<bool big_endian>
12253 Target_arm<big_endian>::relocate_stub(
12255 const Relocate_info<32, big_endian>* relinfo,
12256 Output_section* output_section,
12257 unsigned char* view,
12258 Arm_address address,
12259 section_size_type view_size)
12262 const Stub_template* stub_template = stub->stub_template();
12263 for (size_t i = 0; i < stub_template->reloc_count(); i++)
12265 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
12266 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
12268 unsigned int r_type = insn->r_type();
12269 section_size_type reloc_offset = stub_template->reloc_offset(i);
12270 section_size_type reloc_size = insn->size();
12271 gold_assert(reloc_offset + reloc_size <= view_size);
12273 // This is the address of the stub destination.
12274 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
12275 Symbol_value<32> symval;
12276 symval.set_output_value(target);
12278 // Synthesize a fake reloc just in case. We don't have a symbol so
12280 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
12281 memset(reloc_buffer, 0, sizeof(reloc_buffer));
12282 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
12283 reloc_write.put_r_offset(reloc_offset);
12284 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
12285 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
12287 relocate.relocate(relinfo, this, output_section,
12288 this->fake_relnum_for_stubs, rel, r_type,
12289 NULL, &symval, view + reloc_offset,
12290 address + reloc_offset, reloc_size);
12294 // Determine whether an object attribute tag takes an integer, a
12297 template<bool big_endian>
12299 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
12301 if (tag == Object_attribute::Tag_compatibility)
12302 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12303 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
12304 else if (tag == elfcpp::Tag_nodefaults)
12305 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12306 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
12307 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
12308 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
12310 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
12312 return ((tag & 1) != 0
12313 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12314 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
12317 // Reorder attributes.
12319 // The ABI defines that Tag_conformance should be emitted first, and that
12320 // Tag_nodefaults should be second (if either is defined). This sets those
12321 // two positions, and bumps up the position of all the remaining tags to
12324 template<bool big_endian>
12326 Target_arm<big_endian>::do_attributes_order(int num) const
12328 // Reorder the known object attributes in output. We want to move
12329 // Tag_conformance to position 4 and Tag_conformance to position 5
12330 // and shift everything between 4 .. Tag_conformance - 1 to make room.
12332 return elfcpp::Tag_conformance;
12334 return elfcpp::Tag_nodefaults;
12335 if ((num - 2) < elfcpp::Tag_nodefaults)
12337 if ((num - 1) < elfcpp::Tag_conformance)
12342 // Scan a span of THUMB code for Cortex-A8 erratum.
12344 template<bool big_endian>
12346 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
12347 Arm_relobj<big_endian>* arm_relobj,
12348 unsigned int shndx,
12349 section_size_type span_start,
12350 section_size_type span_end,
12351 const unsigned char* view,
12352 Arm_address address)
12354 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12356 // The opcode is BLX.W, BL.W, B.W, Bcc.W
12357 // The branch target is in the same 4KB region as the
12358 // first half of the branch.
12359 // The instruction before the branch is a 32-bit
12360 // length non-branch instruction.
12361 section_size_type i = span_start;
12362 bool last_was_32bit = false;
12363 bool last_was_branch = false;
12364 while (i < span_end)
12366 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12367 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
12368 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
12369 bool is_blx = false, is_b = false;
12370 bool is_bl = false, is_bcc = false;
12372 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
12375 // Load the rest of the insn (in manual-friendly order).
12376 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
12378 // Encoding T4: B<c>.W.
12379 is_b = (insn & 0xf800d000U) == 0xf0009000U;
12380 // Encoding T1: BL<c>.W.
12381 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
12382 // Encoding T2: BLX<c>.W.
12383 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
12384 // Encoding T3: B<c>.W (not permitted in IT block).
12385 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
12386 && (insn & 0x07f00000U) != 0x03800000U);
12389 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
12391 // If this instruction is a 32-bit THUMB branch that crosses a 4K
12392 // page boundary and it follows 32-bit non-branch instruction,
12393 // we need to work around.
12394 if (is_32bit_branch
12395 && ((address + i) & 0xfffU) == 0xffeU
12397 && !last_was_branch)
12399 // Check to see if there is a relocation stub for this branch.
12400 bool force_target_arm = false;
12401 bool force_target_thumb = false;
12402 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
12403 Cortex_a8_relocs_info::const_iterator p =
12404 this->cortex_a8_relocs_info_.find(address + i);
12406 if (p != this->cortex_a8_relocs_info_.end())
12408 cortex_a8_reloc = p->second;
12409 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
12411 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12412 && !target_is_thumb)
12413 force_target_arm = true;
12414 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12415 && target_is_thumb)
12416 force_target_thumb = true;
12420 Stub_type stub_type = arm_stub_none;
12422 // Check if we have an offending branch instruction.
12423 uint16_t upper_insn = (insn >> 16) & 0xffffU;
12424 uint16_t lower_insn = insn & 0xffffU;
12425 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12427 if (cortex_a8_reloc != NULL
12428 && cortex_a8_reloc->reloc_stub() != NULL)
12429 // We've already made a stub for this instruction, e.g.
12430 // it's a long branch or a Thumb->ARM stub. Assume that
12431 // stub will suffice to work around the A8 erratum (see
12432 // setting of always_after_branch above).
12436 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
12438 stub_type = arm_stub_a8_veneer_b_cond;
12440 else if (is_b || is_bl || is_blx)
12442 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
12447 stub_type = (is_blx
12448 ? arm_stub_a8_veneer_blx
12450 ? arm_stub_a8_veneer_bl
12451 : arm_stub_a8_veneer_b));
12454 if (stub_type != arm_stub_none)
12456 Arm_address pc_for_insn = address + i + 4;
12458 // The original instruction is a BL, but the target is
12459 // an ARM instruction. If we were not making a stub,
12460 // the BL would have been converted to a BLX. Use the
12461 // BLX stub instead in that case.
12462 if (this->may_use_v5t_interworking() && force_target_arm
12463 && stub_type == arm_stub_a8_veneer_bl)
12465 stub_type = arm_stub_a8_veneer_blx;
12469 // Conversely, if the original instruction was
12470 // BLX but the target is Thumb mode, use the BL stub.
12471 else if (force_target_thumb
12472 && stub_type == arm_stub_a8_veneer_blx)
12474 stub_type = arm_stub_a8_veneer_bl;
12482 // If we found a relocation, use the proper destination,
12483 // not the offset in the (unrelocated) instruction.
12484 // Note this is always done if we switched the stub type above.
12485 if (cortex_a8_reloc != NULL)
12486 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
12488 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
12490 // Add a new stub if destination address in in the same page.
12491 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
12493 Cortex_a8_stub* stub =
12494 this->stub_factory_.make_cortex_a8_stub(stub_type,
12498 Stub_table<big_endian>* stub_table =
12499 arm_relobj->stub_table(shndx);
12500 gold_assert(stub_table != NULL);
12501 stub_table->add_cortex_a8_stub(address + i, stub);
12506 i += insn_32bit ? 4 : 2;
12507 last_was_32bit = insn_32bit;
12508 last_was_branch = is_32bit_branch;
12512 // Apply the Cortex-A8 workaround.
12514 template<bool big_endian>
12516 Target_arm<big_endian>::apply_cortex_a8_workaround(
12517 const Cortex_a8_stub* stub,
12518 Arm_address stub_address,
12519 unsigned char* insn_view,
12520 Arm_address insn_address)
12522 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12523 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
12524 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
12525 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
12526 off_t branch_offset = stub_address - (insn_address + 4);
12528 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12529 switch (stub->stub_template()->type())
12531 case arm_stub_a8_veneer_b_cond:
12532 // For a conditional branch, we re-write it to be an unconditional
12533 // branch to the stub. We use the THUMB-2 encoding here.
12534 upper_insn = 0xf000U;
12535 lower_insn = 0xb800U;
12537 case arm_stub_a8_veneer_b:
12538 case arm_stub_a8_veneer_bl:
12539 case arm_stub_a8_veneer_blx:
12540 if ((lower_insn & 0x5000U) == 0x4000U)
12541 // For a BLX instruction, make sure that the relocation is
12542 // rounded up to a word boundary. This follows the semantics of
12543 // the instruction which specifies that bit 1 of the target
12544 // address will come from bit 1 of the base address.
12545 branch_offset = (branch_offset + 2) & ~3;
12547 // Put BRANCH_OFFSET back into the insn.
12548 gold_assert(!Bits<25>::has_overflow32(branch_offset));
12549 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
12550 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
12554 gold_unreachable();
12557 // Put the relocated value back in the object file:
12558 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
12559 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
12562 // Target selector for ARM. Note this is never instantiated directly.
12563 // It's only used in Target_selector_arm_nacl, below.
12565 template<bool big_endian>
12566 class Target_selector_arm : public Target_selector
12569 Target_selector_arm()
12570 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
12571 (big_endian ? "elf32-bigarm" : "elf32-littlearm"),
12572 (big_endian ? "armelfb" : "armelf"))
12576 do_instantiate_target()
12577 { return new Target_arm<big_endian>(); }
12580 // Fix .ARM.exidx section coverage.
12582 template<bool big_endian>
12584 Target_arm<big_endian>::fix_exidx_coverage(
12586 const Input_objects* input_objects,
12587 Arm_output_section<big_endian>* exidx_section,
12588 Symbol_table* symtab,
12591 // We need to look at all the input sections in output in ascending
12592 // order of of output address. We do that by building a sorted list
12593 // of output sections by addresses. Then we looks at the output sections
12594 // in order. The input sections in an output section are already sorted
12595 // by addresses within the output section.
12597 typedef std::set<Output_section*, output_section_address_less_than>
12598 Sorted_output_section_list;
12599 Sorted_output_section_list sorted_output_sections;
12601 // Find out all the output sections of input sections pointed by
12602 // EXIDX input sections.
12603 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
12604 p != input_objects->relobj_end();
12607 Arm_relobj<big_endian>* arm_relobj =
12608 Arm_relobj<big_endian>::as_arm_relobj(*p);
12609 std::vector<unsigned int> shndx_list;
12610 arm_relobj->get_exidx_shndx_list(&shndx_list);
12611 for (size_t i = 0; i < shndx_list.size(); ++i)
12613 const Arm_exidx_input_section* exidx_input_section =
12614 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]);
12615 gold_assert(exidx_input_section != NULL);
12616 if (!exidx_input_section->has_errors())
12618 unsigned int text_shndx = exidx_input_section->link();
12619 Output_section* os = arm_relobj->output_section(text_shndx);
12620 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0)
12621 sorted_output_sections.insert(os);
12626 // Go over the output sections in ascending order of output addresses.
12627 typedef typename Arm_output_section<big_endian>::Text_section_list
12629 Text_section_list sorted_text_sections;
12630 for (typename Sorted_output_section_list::iterator p =
12631 sorted_output_sections.begin();
12632 p != sorted_output_sections.end();
12635 Arm_output_section<big_endian>* arm_output_section =
12636 Arm_output_section<big_endian>::as_arm_output_section(*p);
12637 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
12640 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab,
12641 merge_exidx_entries(), task);
12644 template<bool big_endian>
12646 Target_arm<big_endian>::do_define_standard_symbols(
12647 Symbol_table* symtab,
12650 // Handle the .ARM.exidx section.
12651 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
12653 if (exidx_section != NULL)
12655 // Create __exidx_start and __exidx_end symbols.
12656 symtab->define_in_output_data("__exidx_start",
12658 Symbol_table::PREDEFINED,
12662 elfcpp::STT_NOTYPE,
12663 elfcpp::STB_GLOBAL,
12664 elfcpp::STV_HIDDEN,
12666 false, // offset_is_from_end
12667 true); // only_if_ref
12669 symtab->define_in_output_data("__exidx_end",
12671 Symbol_table::PREDEFINED,
12675 elfcpp::STT_NOTYPE,
12676 elfcpp::STB_GLOBAL,
12677 elfcpp::STV_HIDDEN,
12679 true, // offset_is_from_end
12680 true); // only_if_ref
12684 // Define __exidx_start and __exidx_end even when .ARM.exidx
12685 // section is missing to match ld's behaviour.
12686 symtab->define_as_constant("__exidx_start", NULL,
12687 Symbol_table::PREDEFINED,
12688 0, 0, elfcpp::STT_OBJECT,
12689 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12691 symtab->define_as_constant("__exidx_end", NULL,
12692 Symbol_table::PREDEFINED,
12693 0, 0, elfcpp::STT_OBJECT,
12694 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12699 // NaCl variant. It uses different PLT contents.
12701 template<bool big_endian>
12702 class Output_data_plt_arm_nacl;
12704 template<bool big_endian>
12705 class Target_arm_nacl : public Target_arm<big_endian>
12709 : Target_arm<big_endian>(&arm_nacl_info)
12713 virtual Output_data_plt_arm<big_endian>*
12716 Arm_output_data_got<big_endian>* got,
12717 Output_data_space* got_plt,
12718 Output_data_space* got_irelative)
12719 { return new Output_data_plt_arm_nacl<big_endian>(
12720 layout, got, got_plt, got_irelative); }
12723 static const Target::Target_info arm_nacl_info;
12726 template<bool big_endian>
12727 const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info =
12730 big_endian, // is_big_endian
12731 elfcpp::EM_ARM, // machine_code
12732 false, // has_make_symbol
12733 false, // has_resolve
12734 false, // has_code_fill
12735 true, // is_default_stack_executable
12736 false, // can_icf_inline_merge_sections
12738 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12739 0x20000, // default_text_segment_address
12740 0x10000, // abi_pagesize (overridable by -z max-page-size)
12741 0x10000, // common_pagesize (overridable by -z common-page-size)
12742 true, // isolate_execinstr
12743 0x10000000, // rosegment_gap
12744 elfcpp::SHN_UNDEF, // small_common_shndx
12745 elfcpp::SHN_UNDEF, // large_common_shndx
12746 0, // small_common_section_flags
12747 0, // large_common_section_flags
12748 ".ARM.attributes", // attributes_section
12749 "aeabi", // attributes_vendor
12750 "_start", // entry_symbol_name
12751 32, // hash_entry_size
12754 template<bool big_endian>
12755 class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian>
12758 Output_data_plt_arm_nacl(
12760 Arm_output_data_got<big_endian>* got,
12761 Output_data_space* got_plt,
12762 Output_data_space* got_irelative)
12763 : Output_data_plt_arm<big_endian>(layout, 16, got, got_plt, got_irelative)
12767 // Return the offset of the first non-reserved PLT entry.
12768 virtual unsigned int
12769 do_first_plt_entry_offset() const
12770 { return sizeof(first_plt_entry); }
12772 // Return the size of a PLT entry.
12773 virtual unsigned int
12774 do_get_plt_entry_size() const
12775 { return sizeof(plt_entry); }
12778 do_fill_first_plt_entry(unsigned char* pov,
12779 Arm_address got_address,
12780 Arm_address plt_address);
12783 do_fill_plt_entry(unsigned char* pov,
12784 Arm_address got_address,
12785 Arm_address plt_address,
12786 unsigned int got_offset,
12787 unsigned int plt_offset);
12790 inline uint32_t arm_movw_immediate(uint32_t value)
12792 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
12795 inline uint32_t arm_movt_immediate(uint32_t value)
12797 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
12800 // Template for the first PLT entry.
12801 static const uint32_t first_plt_entry[16];
12803 // Template for subsequent PLT entries.
12804 static const uint32_t plt_entry[4];
12807 // The first entry in the PLT.
12808 template<bool big_endian>
12809 const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] =
12812 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12813 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12814 0xe08cc00f, // add ip, ip, pc
12815 0xe52dc008, // str ip, [sp, #-8]!
12817 0xe3ccc103, // bic ip, ip, #0xc0000000
12818 0xe59cc000, // ldr ip, [ip]
12819 0xe3ccc13f, // bic ip, ip, #0xc000000f
12820 0xe12fff1c, // bx ip
12826 0xe50dc004, // str ip, [sp, #-4]
12828 0xe3ccc103, // bic ip, ip, #0xc0000000
12829 0xe59cc000, // ldr ip, [ip]
12830 0xe3ccc13f, // bic ip, ip, #0xc000000f
12831 0xe12fff1c, // bx ip
12834 template<bool big_endian>
12836 Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry(
12837 unsigned char* pov,
12838 Arm_address got_address,
12839 Arm_address plt_address)
12841 // Write first PLT entry. All but first two words are constants.
12842 const size_t num_first_plt_words = (sizeof(first_plt_entry)
12843 / sizeof(first_plt_entry[0]));
12845 int32_t got_displacement = got_address + 8 - (plt_address + 16);
12847 elfcpp::Swap<32, big_endian>::writeval
12848 (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement));
12849 elfcpp::Swap<32, big_endian>::writeval
12850 (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement));
12852 for (size_t i = 2; i < num_first_plt_words; ++i)
12853 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
12856 // Subsequent entries in the PLT.
12858 template<bool big_endian>
12859 const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] =
12861 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12862 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12863 0xe08cc00f, // add ip, ip, pc
12864 0xea000000, // b .Lplt_tail
12867 template<bool big_endian>
12869 Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry(
12870 unsigned char* pov,
12871 Arm_address got_address,
12872 Arm_address plt_address,
12873 unsigned int got_offset,
12874 unsigned int plt_offset)
12876 // Calculate the displacement between the PLT slot and the
12877 // common tail that's part of the special initial PLT slot.
12878 int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t))
12879 - (plt_address + plt_offset
12880 + sizeof(plt_entry) + sizeof(uint32_t)));
12881 gold_assert((tail_displacement & 3) == 0);
12882 tail_displacement >>= 2;
12884 gold_assert ((tail_displacement & 0xff000000) == 0
12885 || (-tail_displacement & 0xff000000) == 0);
12887 // Calculate the displacement between the PLT slot and the entry
12888 // in the GOT. The offset accounts for the value produced by
12889 // adding to pc in the penultimate instruction of the PLT stub.
12890 const int32_t got_displacement = (got_address + got_offset
12891 - (plt_address + sizeof(plt_entry)));
12893 elfcpp::Swap<32, big_endian>::writeval
12894 (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement));
12895 elfcpp::Swap<32, big_endian>::writeval
12896 (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement));
12897 elfcpp::Swap<32, big_endian>::writeval
12898 (pov + 8, plt_entry[2]);
12899 elfcpp::Swap<32, big_endian>::writeval
12900 (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff));
12903 // Target selectors.
12905 template<bool big_endian>
12906 class Target_selector_arm_nacl
12907 : public Target_selector_nacl<Target_selector_arm<big_endian>,
12908 Target_arm_nacl<big_endian> >
12911 Target_selector_arm_nacl()
12912 : Target_selector_nacl<Target_selector_arm<big_endian>,
12913 Target_arm_nacl<big_endian> >(
12915 big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12916 big_endian ? "armelfb_nacl" : "armelf_nacl")
12920 Target_selector_arm_nacl<false> target_selector_arm;
12921 Target_selector_arm_nacl<true> target_selector_armbe;
12923 } // End anonymous namespace.