1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2015 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian>
62 class Output_data_plt_arm;
64 template<bool big_endian>
65 class Output_data_plt_arm_standard;
67 template<bool big_endian>
70 template<bool big_endian>
71 class Arm_input_section;
73 class Arm_exidx_cantunwind;
75 class Arm_exidx_merged_section;
77 class Arm_exidx_fixup;
79 template<bool big_endian>
80 class Arm_output_section;
82 class Arm_exidx_input_section;
84 template<bool big_endian>
87 template<bool big_endian>
88 class Arm_relocate_functions;
90 template<bool big_endian>
91 class Arm_output_data_got;
93 template<bool big_endian>
97 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
99 // Maximum branch offsets for ARM, THUMB and THUMB2.
100 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
101 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
102 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
103 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
104 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
105 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
107 // Thread Control Block size.
108 const size_t ARM_TCB_SIZE = 8;
110 // The arm target class.
112 // This is a very simple port of gold for ARM-EABI. It is intended for
113 // supporting Android only for the time being.
116 // - Implement all static relocation types documented in arm-reloc.def.
117 // - Make PLTs more flexible for different architecture features like
119 // There are probably a lot more.
121 // Ideally we would like to avoid using global variables but this is used
122 // very in many places and sometimes in loops. If we use a function
123 // returning a static instance of Arm_reloc_property_table, it will be very
124 // slow in an threaded environment since the static instance needs to be
125 // locked. The pointer is below initialized in the
126 // Target::do_select_as_default_target() hook so that we do not spend time
127 // building the table if we are not linking ARM objects.
129 // An alternative is to to process the information in arm-reloc.def in
130 // compilation time and generate a representation of it in PODs only. That
131 // way we can avoid initialization when the linker starts.
133 Arm_reloc_property_table* arm_reloc_property_table = NULL;
135 // Instruction template class. This class is similar to the insn_sequence
136 // struct in bfd/elf32-arm.c.
141 // Types of instruction templates.
145 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
146 // templates with class-specific semantics. Currently this is used
147 // only by the Cortex_a8_stub class for handling condition codes in
148 // conditional branches.
149 THUMB16_SPECIAL_TYPE,
155 // Factory methods to create instruction templates in different formats.
157 static const Insn_template
158 thumb16_insn(uint32_t data)
159 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
161 // A Thumb conditional branch, in which the proper condition is inserted
162 // when we build the stub.
163 static const Insn_template
164 thumb16_bcond_insn(uint32_t data)
165 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
167 static const Insn_template
168 thumb32_insn(uint32_t data)
169 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
171 static const Insn_template
172 thumb32_b_insn(uint32_t data, int reloc_addend)
174 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
178 static const Insn_template
179 arm_insn(uint32_t data)
180 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
182 static const Insn_template
183 arm_rel_insn(unsigned data, int reloc_addend)
184 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
186 static const Insn_template
187 data_word(unsigned data, unsigned int r_type, int reloc_addend)
188 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
190 // Accessors. This class is used for read-only objects so no modifiers
195 { return this->data_; }
197 // Return the instruction sequence type of this.
200 { return this->type_; }
202 // Return the ARM relocation type of this.
205 { return this->r_type_; }
209 { return this->reloc_addend_; }
211 // Return size of instruction template in bytes.
215 // Return byte-alignment of instruction template.
220 // We make the constructor private to ensure that only the factory
223 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
224 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
227 // Instruction specific data. This is used to store information like
228 // some of the instruction bits.
230 // Instruction template type.
232 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
233 unsigned int r_type_;
234 // Relocation addend.
235 int32_t reloc_addend_;
238 // Macro for generating code to stub types. One entry per long/short
242 DEF_STUB(long_branch_any_any) \
243 DEF_STUB(long_branch_v4t_arm_thumb) \
244 DEF_STUB(long_branch_thumb_only) \
245 DEF_STUB(long_branch_v4t_thumb_thumb) \
246 DEF_STUB(long_branch_v4t_thumb_arm) \
247 DEF_STUB(short_branch_v4t_thumb_arm) \
248 DEF_STUB(long_branch_any_arm_pic) \
249 DEF_STUB(long_branch_any_thumb_pic) \
250 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
251 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
252 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
253 DEF_STUB(long_branch_thumb_only_pic) \
254 DEF_STUB(a8_veneer_b_cond) \
255 DEF_STUB(a8_veneer_b) \
256 DEF_STUB(a8_veneer_bl) \
257 DEF_STUB(a8_veneer_blx) \
258 DEF_STUB(v4_veneer_bx)
262 #define DEF_STUB(x) arm_stub_##x,
268 // First reloc stub type.
269 arm_stub_reloc_first = arm_stub_long_branch_any_any,
270 // Last reloc stub type.
271 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
273 // First Cortex-A8 stub type.
274 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
275 // Last Cortex-A8 stub type.
276 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
279 arm_stub_type_last = arm_stub_v4_veneer_bx
283 // Stub template class. Templates are meant to be read-only objects.
284 // A stub template for a stub type contains all read-only attributes
285 // common to all stubs of the same type.
290 Stub_template(Stub_type, const Insn_template*, size_t);
298 { return this->type_; }
300 // Return an array of instruction templates.
303 { return this->insns_; }
305 // Return size of template in number of instructions.
308 { return this->insn_count_; }
310 // Return size of template in bytes.
313 { return this->size_; }
315 // Return alignment of the stub template.
318 { return this->alignment_; }
320 // Return whether entry point is in thumb mode.
322 entry_in_thumb_mode() const
323 { return this->entry_in_thumb_mode_; }
325 // Return number of relocations in this template.
328 { return this->relocs_.size(); }
330 // Return index of the I-th instruction with relocation.
332 reloc_insn_index(size_t i) const
334 gold_assert(i < this->relocs_.size());
335 return this->relocs_[i].first;
338 // Return the offset of the I-th instruction with relocation from the
339 // beginning of the stub.
341 reloc_offset(size_t i) const
343 gold_assert(i < this->relocs_.size());
344 return this->relocs_[i].second;
348 // This contains information about an instruction template with a relocation
349 // and its offset from start of stub.
350 typedef std::pair<size_t, section_size_type> Reloc;
352 // A Stub_template may not be copied. We want to share templates as much
354 Stub_template(const Stub_template&);
355 Stub_template& operator=(const Stub_template&);
359 // Points to an array of Insn_templates.
360 const Insn_template* insns_;
361 // Number of Insn_templates in insns_[].
363 // Size of templated instructions in bytes.
365 // Alignment of templated instructions.
367 // Flag to indicate if entry is in thumb mode.
368 bool entry_in_thumb_mode_;
369 // A table of reloc instruction indices and offsets. We can find these by
370 // looking at the instruction templates but we pre-compute and then stash
371 // them here for speed.
372 std::vector<Reloc> relocs_;
376 // A class for code stubs. This is a base class for different type of
377 // stubs used in the ARM target.
383 static const section_offset_type invalid_offset =
384 static_cast<section_offset_type>(-1);
387 Stub(const Stub_template* stub_template)
388 : stub_template_(stub_template), offset_(invalid_offset)
395 // Return the stub template.
397 stub_template() const
398 { return this->stub_template_; }
400 // Return offset of code stub from beginning of its containing stub table.
404 gold_assert(this->offset_ != invalid_offset);
405 return this->offset_;
408 // Set offset of code stub from beginning of its containing stub table.
410 set_offset(section_offset_type offset)
411 { this->offset_ = offset; }
413 // Return the relocation target address of the i-th relocation in the
414 // stub. This must be defined in a child class.
416 reloc_target(size_t i)
417 { return this->do_reloc_target(i); }
419 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
421 write(unsigned char* view, section_size_type view_size, bool big_endian)
422 { this->do_write(view, view_size, big_endian); }
424 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
425 // for the i-th instruction.
427 thumb16_special(size_t i)
428 { return this->do_thumb16_special(i); }
431 // This must be defined in the child class.
433 do_reloc_target(size_t) = 0;
435 // This may be overridden in the child class.
437 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
440 this->do_fixed_endian_write<true>(view, view_size);
442 this->do_fixed_endian_write<false>(view, view_size);
445 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
446 // instruction template.
448 do_thumb16_special(size_t)
449 { gold_unreachable(); }
452 // A template to implement do_write.
453 template<bool big_endian>
455 do_fixed_endian_write(unsigned char*, section_size_type);
458 const Stub_template* stub_template_;
459 // Offset within the section of containing this stub.
460 section_offset_type offset_;
463 // Reloc stub class. These are stubs we use to fix up relocation because
464 // of limited branch ranges.
466 class Reloc_stub : public Stub
469 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
470 // We assume we never jump to this address.
471 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
473 // Return destination address.
475 destination_address() const
477 gold_assert(this->destination_address_ != this->invalid_address);
478 return this->destination_address_;
481 // Set destination address.
483 set_destination_address(Arm_address address)
485 gold_assert(address != this->invalid_address);
486 this->destination_address_ = address;
489 // Reset destination address.
491 reset_destination_address()
492 { this->destination_address_ = this->invalid_address; }
494 // Determine stub type for a branch of a relocation of R_TYPE going
495 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
496 // the branch target is a thumb instruction. TARGET is used for look
497 // up ARM-specific linker settings.
499 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
500 Arm_address branch_target, bool target_is_thumb);
502 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
503 // and an addend. Since we treat global and local symbol differently, we
504 // use a Symbol object for a global symbol and a object-index pair for
509 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
510 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
511 // and R_SYM must not be invalid_index.
512 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
513 unsigned int r_sym, int32_t addend)
514 : stub_type_(stub_type), addend_(addend)
518 this->r_sym_ = Reloc_stub::invalid_index;
519 this->u_.symbol = symbol;
523 gold_assert(relobj != NULL && r_sym != invalid_index);
524 this->r_sym_ = r_sym;
525 this->u_.relobj = relobj;
532 // Accessors: Keys are meant to be read-only object so no modifiers are
538 { return this->stub_type_; }
540 // Return the local symbol index or invalid_index.
543 { return this->r_sym_; }
545 // Return the symbol if there is one.
548 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
550 // Return the relobj if there is one.
553 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
555 // Whether this equals to another key k.
557 eq(const Key& k) const
559 return ((this->stub_type_ == k.stub_type_)
560 && (this->r_sym_ == k.r_sym_)
561 && ((this->r_sym_ != Reloc_stub::invalid_index)
562 ? (this->u_.relobj == k.u_.relobj)
563 : (this->u_.symbol == k.u_.symbol))
564 && (this->addend_ == k.addend_));
567 // Return a hash value.
571 return (this->stub_type_
573 ^ gold::string_hash<char>(
574 (this->r_sym_ != Reloc_stub::invalid_index)
575 ? this->u_.relobj->name().c_str()
576 : this->u_.symbol->name())
580 // Functors for STL associative containers.
584 operator()(const Key& k) const
585 { return k.hash_value(); }
591 operator()(const Key& k1, const Key& k2) const
592 { return k1.eq(k2); }
595 // Name of key. This is mainly for debugging.
601 Stub_type stub_type_;
602 // If this is a local symbol, this is the index in the defining object.
603 // Otherwise, it is invalid_index for a global symbol.
605 // If r_sym_ is an invalid index, this points to a global symbol.
606 // Otherwise, it points to a relobj. We used the unsized and target
607 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
608 // Arm_relobj, in order to avoid making the stub class a template
609 // as most of the stub machinery is endianness-neutral. However, it
610 // may require a bit of casting done by users of this class.
613 const Symbol* symbol;
614 const Relobj* relobj;
616 // Addend associated with a reloc.
621 // Reloc_stubs are created via a stub factory. So these are protected.
622 Reloc_stub(const Stub_template* stub_template)
623 : Stub(stub_template), destination_address_(invalid_address)
629 friend class Stub_factory;
631 // Return the relocation target address of the i-th relocation in the
634 do_reloc_target(size_t i)
636 // All reloc stub have only one relocation.
638 return this->destination_address_;
642 // Address of destination.
643 Arm_address destination_address_;
646 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
647 // THUMB branch that meets the following conditions:
649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
650 // branch address is 0xffe.
651 // 2. The branch target address is in the same page as the first word of the
653 // 3. The branch follows a 32-bit instruction which is not a branch.
655 // To do the fix up, we need to store the address of the branch instruction
656 // and its target at least. We also need to store the original branch
657 // instruction bits for the condition code in a conditional branch. The
658 // condition code is used in a special instruction template. We also want
659 // to identify input sections needing Cortex-A8 workaround quickly. We store
660 // extra information about object and section index of the code section
661 // containing a branch being fixed up. The information is used to mark
662 // the code section when we finalize the Cortex-A8 stubs.
665 class Cortex_a8_stub : public Stub
671 // Return the object of the code section containing the branch being fixed
675 { return this->relobj_; }
677 // Return the section index of the code section containing the branch being
681 { return this->shndx_; }
683 // Return the source address of stub. This is the address of the original
684 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
687 source_address() const
688 { return this->source_address_; }
690 // Return the destination address of the stub. This is the branch taken
691 // address of the original branch instruction. LSB is 1 if it is a THUMB
692 // instruction address.
694 destination_address() const
695 { return this->destination_address_; }
697 // Return the instruction being fixed up.
699 original_insn() const
700 { return this->original_insn_; }
703 // Cortex_a8_stubs are created via a stub factory. So these are protected.
704 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
705 unsigned int shndx, Arm_address source_address,
706 Arm_address destination_address, uint32_t original_insn)
707 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
708 source_address_(source_address | 1U),
709 destination_address_(destination_address),
710 original_insn_(original_insn)
713 friend class Stub_factory;
715 // Return the relocation target address of the i-th relocation in the
718 do_reloc_target(size_t i)
720 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
722 // The conditional branch veneer has two relocations.
724 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
728 // All other Cortex-A8 stubs have only one relocation.
730 return this->destination_address_;
734 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
736 do_thumb16_special(size_t);
739 // Object of the code section containing the branch being fixed up.
741 // Section index of the code section containing the branch begin fixed up.
743 // Source address of original branch.
744 Arm_address source_address_;
745 // Destination address of the original branch.
746 Arm_address destination_address_;
747 // Original branch instruction. This is needed for copying the condition
748 // code from a condition branch to its stub.
749 uint32_t original_insn_;
752 // ARMv4 BX Rx branch relocation stub class.
753 class Arm_v4bx_stub : public Stub
759 // Return the associated register.
762 { return this->reg_; }
765 // Arm V4BX stubs are created via a stub factory. So these are protected.
766 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
767 : Stub(stub_template), reg_(reg)
770 friend class Stub_factory;
772 // Return the relocation target address of the i-th relocation in the
775 do_reloc_target(size_t)
776 { gold_unreachable(); }
778 // This may be overridden in the child class.
780 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
783 this->do_fixed_endian_v4bx_write<true>(view, view_size);
785 this->do_fixed_endian_v4bx_write<false>(view, view_size);
789 // A template to implement do_write.
790 template<bool big_endian>
792 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
794 const Insn_template* insns = this->stub_template()->insns();
795 elfcpp::Swap<32, big_endian>::writeval(view,
797 + (this->reg_ << 16)));
798 view += insns[0].size();
799 elfcpp::Swap<32, big_endian>::writeval(view,
800 (insns[1].data() + this->reg_));
801 view += insns[1].size();
802 elfcpp::Swap<32, big_endian>::writeval(view,
803 (insns[2].data() + this->reg_));
806 // A register index (r0-r14), which is associated with the stub.
810 // Stub factory class.
815 // Return the unique instance of this class.
816 static const Stub_factory&
819 static Stub_factory singleton;
823 // Make a relocation stub.
825 make_reloc_stub(Stub_type stub_type) const
827 gold_assert(stub_type >= arm_stub_reloc_first
828 && stub_type <= arm_stub_reloc_last);
829 return new Reloc_stub(this->stub_templates_[stub_type]);
832 // Make a Cortex-A8 stub.
834 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
835 Arm_address source, Arm_address destination,
836 uint32_t original_insn) const
838 gold_assert(stub_type >= arm_stub_cortex_a8_first
839 && stub_type <= arm_stub_cortex_a8_last);
840 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
841 source, destination, original_insn);
844 // Make an ARM V4BX relocation stub.
845 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
847 make_arm_v4bx_stub(uint32_t reg) const
849 gold_assert(reg < 0xf);
850 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
855 // Constructor and destructor are protected since we only return a single
856 // instance created in Stub_factory::get_instance().
860 // A Stub_factory may not be copied since it is a singleton.
861 Stub_factory(const Stub_factory&);
862 Stub_factory& operator=(Stub_factory&);
864 // Stub templates. These are initialized in the constructor.
865 const Stub_template* stub_templates_[arm_stub_type_last+1];
868 // A class to hold stubs for the ARM target.
870 template<bool big_endian>
871 class Stub_table : public Output_data
874 Stub_table(Arm_input_section<big_endian>* owner)
875 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0),
876 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
877 prev_data_size_(0), prev_addralign_(1)
883 // Owner of this stub table.
884 Arm_input_section<big_endian>*
886 { return this->owner_; }
888 // Whether this stub table is empty.
892 return (this->reloc_stubs_.empty()
893 && this->cortex_a8_stubs_.empty()
894 && this->arm_v4bx_stubs_.empty());
897 // Return the current data size.
899 current_data_size() const
900 { return this->current_data_size_for_child(); }
902 // Add a STUB using KEY. The caller is responsible for avoiding addition
903 // if a STUB with the same key has already been added.
905 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
907 const Stub_template* stub_template = stub->stub_template();
908 gold_assert(stub_template->type() == key.stub_type());
909 this->reloc_stubs_[key] = stub;
911 // Assign stub offset early. We can do this because we never remove
912 // reloc stubs and they are in the beginning of the stub table.
913 uint64_t align = stub_template->alignment();
914 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align);
915 stub->set_offset(this->reloc_stubs_size_);
916 this->reloc_stubs_size_ += stub_template->size();
917 this->reloc_stubs_addralign_ =
918 std::max(this->reloc_stubs_addralign_, align);
921 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
922 // The caller is responsible for avoiding addition if a STUB with the same
923 // address has already been added.
925 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
927 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
928 this->cortex_a8_stubs_.insert(value);
931 // Add an ARM V4BX relocation stub. A register index will be retrieved
934 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
936 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
937 this->arm_v4bx_stubs_[stub->reg()] = stub;
940 // Remove all Cortex-A8 stubs.
942 remove_all_cortex_a8_stubs();
944 // Look up a relocation stub using KEY. Return NULL if there is none.
946 find_reloc_stub(const Reloc_stub::Key& key) const
948 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
949 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
952 // Look up an arm v4bx relocation stub using the register index.
953 // Return NULL if there is none.
955 find_arm_v4bx_stub(const uint32_t reg) const
957 gold_assert(reg < 0xf);
958 return this->arm_v4bx_stubs_[reg];
961 // Relocate stubs in this stub table.
963 relocate_stubs(const Relocate_info<32, big_endian>*,
964 Target_arm<big_endian>*, Output_section*,
965 unsigned char*, Arm_address, section_size_type);
967 // Update data size and alignment at the end of a relaxation pass. Return
968 // true if either data size or alignment is different from that of the
969 // previous relaxation pass.
971 update_data_size_and_addralign();
973 // Finalize stubs. Set the offsets of all stubs and mark input sections
974 // needing the Cortex-A8 workaround.
978 // Apply Cortex-A8 workaround to an address range.
980 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
981 unsigned char*, Arm_address,
985 // Write out section contents.
987 do_write(Output_file*);
989 // Return the required alignment.
992 { return this->prev_addralign_; }
994 // Reset address and file offset.
996 do_reset_address_and_file_offset()
997 { this->set_current_data_size_for_child(this->prev_data_size_); }
999 // Set final data size.
1001 set_final_data_size()
1002 { this->set_data_size(this->current_data_size()); }
1005 // Relocate one stub.
1007 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
1008 Target_arm<big_endian>*, Output_section*,
1009 unsigned char*, Arm_address, section_size_type);
1011 // Unordered map of relocation stubs.
1013 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
1014 Reloc_stub::Key::equal_to>
1017 // List of Cortex-A8 stubs ordered by addresses of branches being
1018 // fixed up in output.
1019 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1020 // List of Arm V4BX relocation stubs ordered by associated registers.
1021 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1023 // Owner of this stub table.
1024 Arm_input_section<big_endian>* owner_;
1025 // The relocation stubs.
1026 Reloc_stub_map reloc_stubs_;
1027 // Size of reloc stubs.
1028 off_t reloc_stubs_size_;
1029 // Maximum address alignment of reloc stubs.
1030 uint64_t reloc_stubs_addralign_;
1031 // The cortex_a8_stubs.
1032 Cortex_a8_stub_list cortex_a8_stubs_;
1033 // The Arm V4BX relocation stubs.
1034 Arm_v4bx_stub_list arm_v4bx_stubs_;
1035 // data size of this in the previous pass.
1036 off_t prev_data_size_;
1037 // address alignment of this in the previous pass.
1038 uint64_t prev_addralign_;
1041 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1042 // we add to the end of an EXIDX input section that goes into the output.
1044 class Arm_exidx_cantunwind : public Output_section_data
1047 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1048 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1051 // Return the object containing the section pointed by this.
1054 { return this->relobj_; }
1056 // Return the section index of the section pointed by this.
1059 { return this->shndx_; }
1063 do_write(Output_file* of)
1065 if (parameters->target().is_big_endian())
1066 this->do_fixed_endian_write<true>(of);
1068 this->do_fixed_endian_write<false>(of);
1071 // Write to a map file.
1073 do_print_to_mapfile(Mapfile* mapfile) const
1074 { mapfile->print_output_data(this, _("** ARM cantunwind")); }
1077 // Implement do_write for a given endianness.
1078 template<bool big_endian>
1080 do_fixed_endian_write(Output_file*);
1082 // The object containing the section pointed by this.
1084 // The section index of the section pointed by this.
1085 unsigned int shndx_;
1088 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1089 // Offset map is used to map input section offset within the EXIDX section
1090 // to the output offset from the start of this EXIDX section.
1092 typedef std::map<section_offset_type, section_offset_type>
1093 Arm_exidx_section_offset_map;
1095 // Arm_exidx_merged_section class. This represents an EXIDX input section
1096 // with some of its entries merged.
1098 class Arm_exidx_merged_section : public Output_relaxed_input_section
1101 // Constructor for Arm_exidx_merged_section.
1102 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1103 // SECTION_OFFSET_MAP points to a section offset map describing how
1104 // parts of the input section are mapped to output. DELETED_BYTES is
1105 // the number of bytes deleted from the EXIDX input section.
1106 Arm_exidx_merged_section(
1107 const Arm_exidx_input_section& exidx_input_section,
1108 const Arm_exidx_section_offset_map& section_offset_map,
1109 uint32_t deleted_bytes);
1111 // Build output contents.
1113 build_contents(const unsigned char*, section_size_type);
1115 // Return the original EXIDX input section.
1116 const Arm_exidx_input_section&
1117 exidx_input_section() const
1118 { return this->exidx_input_section_; }
1120 // Return the section offset map.
1121 const Arm_exidx_section_offset_map&
1122 section_offset_map() const
1123 { return this->section_offset_map_; }
1126 // Write merged section into file OF.
1128 do_write(Output_file* of);
1131 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1132 section_offset_type*) const;
1135 // Original EXIDX input section.
1136 const Arm_exidx_input_section& exidx_input_section_;
1137 // Section offset map.
1138 const Arm_exidx_section_offset_map& section_offset_map_;
1139 // Merged section contents. We need to keep build the merged section
1140 // and save it here to avoid accessing the original EXIDX section when
1141 // we cannot lock the sections' object.
1142 unsigned char* section_contents_;
1145 // A class to wrap an ordinary input section containing executable code.
1147 template<bool big_endian>
1148 class Arm_input_section : public Output_relaxed_input_section
1151 Arm_input_section(Relobj* relobj, unsigned int shndx)
1152 : Output_relaxed_input_section(relobj, shndx, 1),
1153 original_addralign_(1), original_size_(0), stub_table_(NULL),
1154 original_contents_(NULL)
1157 ~Arm_input_section()
1158 { delete[] this->original_contents_; }
1164 // Whether this is a stub table owner.
1166 is_stub_table_owner() const
1167 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1169 // Return the stub table.
1170 Stub_table<big_endian>*
1172 { return this->stub_table_; }
1174 // Set the stub_table.
1176 set_stub_table(Stub_table<big_endian>* stub_table)
1177 { this->stub_table_ = stub_table; }
1179 // Downcast a base pointer to an Arm_input_section pointer. This is
1180 // not type-safe but we only use Arm_input_section not the base class.
1181 static Arm_input_section<big_endian>*
1182 as_arm_input_section(Output_relaxed_input_section* poris)
1183 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1185 // Return the original size of the section.
1187 original_size() const
1188 { return this->original_size_; }
1191 // Write data to output file.
1193 do_write(Output_file*);
1195 // Return required alignment of this.
1197 do_addralign() const
1199 if (this->is_stub_table_owner())
1200 return std::max(this->stub_table_->addralign(),
1201 static_cast<uint64_t>(this->original_addralign_));
1203 return this->original_addralign_;
1206 // Finalize data size.
1208 set_final_data_size();
1210 // Reset address and file offset.
1212 do_reset_address_and_file_offset();
1216 do_output_offset(const Relobj* object, unsigned int shndx,
1217 section_offset_type offset,
1218 section_offset_type* poutput) const
1220 if ((object == this->relobj())
1221 && (shndx == this->shndx())
1224 convert_types<section_offset_type, uint32_t>(this->original_size_)))
1234 // Copying is not allowed.
1235 Arm_input_section(const Arm_input_section&);
1236 Arm_input_section& operator=(const Arm_input_section&);
1238 // Address alignment of the original input section.
1239 uint32_t original_addralign_;
1240 // Section size of the original input section.
1241 uint32_t original_size_;
1243 Stub_table<big_endian>* stub_table_;
1244 // Original section contents. We have to make a copy here since the file
1245 // containing the original section may not be locked when we need to access
1247 unsigned char* original_contents_;
1250 // Arm_exidx_fixup class. This is used to define a number of methods
1251 // and keep states for fixing up EXIDX coverage.
1253 class Arm_exidx_fixup
1256 Arm_exidx_fixup(Output_section* exidx_output_section,
1257 bool merge_exidx_entries = true)
1258 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1259 last_inlined_entry_(0), last_input_section_(NULL),
1260 section_offset_map_(NULL), first_output_text_section_(NULL),
1261 merge_exidx_entries_(merge_exidx_entries)
1265 { delete this->section_offset_map_; }
1267 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1268 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1269 // number of bytes to be deleted in output. If parts of the input EXIDX
1270 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1271 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1272 // responsible for releasing it.
1273 template<bool big_endian>
1275 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1276 const unsigned char* section_contents,
1277 section_size_type section_size,
1278 Arm_exidx_section_offset_map** psection_offset_map);
1280 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1281 // input section, if there is not one already.
1283 add_exidx_cantunwind_as_needed();
1285 // Return the output section for the text section which is linked to the
1286 // first exidx input in output.
1288 first_output_text_section() const
1289 { return this->first_output_text_section_; }
1292 // Copying is not allowed.
1293 Arm_exidx_fixup(const Arm_exidx_fixup&);
1294 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1296 // Type of EXIDX unwind entry.
1301 // EXIDX_CANTUNWIND.
1302 UT_EXIDX_CANTUNWIND,
1309 // Process an EXIDX entry. We only care about the second word of the
1310 // entry. Return true if the entry can be deleted.
1312 process_exidx_entry(uint32_t second_word);
1314 // Update the current section offset map during EXIDX section fix-up.
1315 // If there is no map, create one. INPUT_OFFSET is the offset of a
1316 // reference point, DELETED_BYTES is the number of deleted by in the
1317 // section so far. If DELETE_ENTRY is true, the reference point and
1318 // all offsets after the previous reference point are discarded.
1320 update_offset_map(section_offset_type input_offset,
1321 section_size_type deleted_bytes, bool delete_entry);
1323 // EXIDX output section.
1324 Output_section* exidx_output_section_;
1325 // Unwind type of the last EXIDX entry processed.
1326 Unwind_type last_unwind_type_;
1327 // Last seen inlined EXIDX entry.
1328 uint32_t last_inlined_entry_;
1329 // Last processed EXIDX input section.
1330 const Arm_exidx_input_section* last_input_section_;
1331 // Section offset map created in process_exidx_section.
1332 Arm_exidx_section_offset_map* section_offset_map_;
1333 // Output section for the text section which is linked to the first exidx
1335 Output_section* first_output_text_section_;
1337 bool merge_exidx_entries_;
1340 // Arm output section class. This is defined mainly to add a number of
1341 // stub generation methods.
1343 template<bool big_endian>
1344 class Arm_output_section : public Output_section
1347 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1349 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1350 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1351 elfcpp::Elf_Xword flags)
1352 : Output_section(name, type,
1353 (type == elfcpp::SHT_ARM_EXIDX
1354 ? flags | elfcpp::SHF_LINK_ORDER
1357 if (type == elfcpp::SHT_ARM_EXIDX)
1358 this->set_always_keeps_input_sections();
1361 ~Arm_output_section()
1364 // Group input sections for stub generation.
1366 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*);
1368 // Downcast a base pointer to an Arm_output_section pointer. This is
1369 // not type-safe but we only use Arm_output_section not the base class.
1370 static Arm_output_section<big_endian>*
1371 as_arm_output_section(Output_section* os)
1372 { return static_cast<Arm_output_section<big_endian>*>(os); }
1374 // Append all input text sections in this into LIST.
1376 append_text_sections_to_list(Text_section_list* list);
1378 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1379 // is a list of text input sections sorted in ascending order of their
1380 // output addresses.
1382 fix_exidx_coverage(Layout* layout,
1383 const Text_section_list& sorted_text_section,
1384 Symbol_table* symtab,
1385 bool merge_exidx_entries,
1388 // Link an EXIDX section into its corresponding text section.
1390 set_exidx_section_link();
1394 typedef Output_section::Input_section Input_section;
1395 typedef Output_section::Input_section_list Input_section_list;
1397 // Create a stub group.
1398 void create_stub_group(Input_section_list::const_iterator,
1399 Input_section_list::const_iterator,
1400 Input_section_list::const_iterator,
1401 Target_arm<big_endian>*,
1402 std::vector<Output_relaxed_input_section*>*,
1406 // Arm_exidx_input_section class. This represents an EXIDX input section.
1408 class Arm_exidx_input_section
1411 static const section_offset_type invalid_offset =
1412 static_cast<section_offset_type>(-1);
1414 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1415 unsigned int link, uint32_t size,
1416 uint32_t addralign, uint32_t text_size)
1417 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1418 addralign_(addralign), text_size_(text_size), has_errors_(false)
1421 ~Arm_exidx_input_section()
1424 // Accessors: This is a read-only class.
1426 // Return the object containing this EXIDX input section.
1429 { return this->relobj_; }
1431 // Return the section index of this EXIDX input section.
1434 { return this->shndx_; }
1436 // Return the section index of linked text section in the same object.
1439 { return this->link_; }
1441 // Return size of the EXIDX input section.
1444 { return this->size_; }
1446 // Return address alignment of EXIDX input section.
1449 { return this->addralign_; }
1451 // Return size of the associated text input section.
1454 { return this->text_size_; }
1456 // Whether there are any errors in the EXIDX input section.
1459 { return this->has_errors_; }
1461 // Set has-errors flag.
1464 { this->has_errors_ = true; }
1467 // Object containing this.
1469 // Section index of this.
1470 unsigned int shndx_;
1471 // text section linked to this in the same object.
1473 // Size of this. For ARM 32-bit is sufficient.
1475 // Address alignment of this. For ARM 32-bit is sufficient.
1476 uint32_t addralign_;
1477 // Size of associated text section.
1478 uint32_t text_size_;
1479 // Whether this has any errors.
1483 // Arm_relobj class.
1485 template<bool big_endian>
1486 class Arm_relobj : public Sized_relobj_file<32, big_endian>
1489 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1491 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1492 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1493 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr),
1494 stub_tables_(), local_symbol_is_thumb_function_(),
1495 attributes_section_data_(NULL), mapping_symbols_info_(),
1496 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1497 output_local_symbol_count_needs_update_(false),
1498 merge_flags_and_attributes_(true)
1502 { delete this->attributes_section_data_; }
1504 // Return the stub table of the SHNDX-th section if there is one.
1505 Stub_table<big_endian>*
1506 stub_table(unsigned int shndx) const
1508 gold_assert(shndx < this->stub_tables_.size());
1509 return this->stub_tables_[shndx];
1512 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1514 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1516 gold_assert(shndx < this->stub_tables_.size());
1517 this->stub_tables_[shndx] = stub_table;
1520 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1521 // index. This is only valid after do_count_local_symbol is called.
1523 local_symbol_is_thumb_function(unsigned int r_sym) const
1525 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1526 return this->local_symbol_is_thumb_function_[r_sym];
1529 // Scan all relocation sections for stub generation.
1531 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1534 // Convert regular input section with index SHNDX to a relaxed section.
1536 convert_input_section_to_relaxed_section(unsigned shndx)
1538 // The stubs have relocations and we need to process them after writing
1539 // out the stubs. So relocation now must follow section write.
1540 this->set_section_offset(shndx, -1ULL);
1541 this->set_relocs_must_follow_section_writes();
1544 // Downcast a base pointer to an Arm_relobj pointer. This is
1545 // not type-safe but we only use Arm_relobj not the base class.
1546 static Arm_relobj<big_endian>*
1547 as_arm_relobj(Relobj* relobj)
1548 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1550 // Processor-specific flags in ELF file header. This is valid only after
1553 processor_specific_flags() const
1554 { return this->processor_specific_flags_; }
1556 // Attribute section data This is the contents of the .ARM.attribute section
1558 const Attributes_section_data*
1559 attributes_section_data() const
1560 { return this->attributes_section_data_; }
1562 // Mapping symbol location.
1563 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1565 // Functor for STL container.
1566 struct Mapping_symbol_position_less
1569 operator()(const Mapping_symbol_position& p1,
1570 const Mapping_symbol_position& p2) const
1572 return (p1.first < p2.first
1573 || (p1.first == p2.first && p1.second < p2.second));
1577 // We only care about the first character of a mapping symbol, so
1578 // we only store that instead of the whole symbol name.
1579 typedef std::map<Mapping_symbol_position, char,
1580 Mapping_symbol_position_less> Mapping_symbols_info;
1582 // Whether a section contains any Cortex-A8 workaround.
1584 section_has_cortex_a8_workaround(unsigned int shndx) const
1586 return (this->section_has_cortex_a8_workaround_ != NULL
1587 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1590 // Mark a section that has Cortex-A8 workaround.
1592 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1594 if (this->section_has_cortex_a8_workaround_ == NULL)
1595 this->section_has_cortex_a8_workaround_ =
1596 new std::vector<bool>(this->shnum(), false);
1597 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1600 // Return the EXIDX section of an text section with index SHNDX or NULL
1601 // if the text section has no associated EXIDX section.
1602 const Arm_exidx_input_section*
1603 exidx_input_section_by_link(unsigned int shndx) const
1605 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1606 return ((p != this->exidx_section_map_.end()
1607 && p->second->link() == shndx)
1612 // Return the EXIDX section with index SHNDX or NULL if there is none.
1613 const Arm_exidx_input_section*
1614 exidx_input_section_by_shndx(unsigned shndx) const
1616 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1617 return ((p != this->exidx_section_map_.end()
1618 && p->second->shndx() == shndx)
1623 // Whether output local symbol count needs updating.
1625 output_local_symbol_count_needs_update() const
1626 { return this->output_local_symbol_count_needs_update_; }
1628 // Set output_local_symbol_count_needs_update flag to be true.
1630 set_output_local_symbol_count_needs_update()
1631 { this->output_local_symbol_count_needs_update_ = true; }
1633 // Update output local symbol count at the end of relaxation.
1635 update_output_local_symbol_count();
1637 // Whether we want to merge processor-specific flags and attributes.
1639 merge_flags_and_attributes() const
1640 { return this->merge_flags_and_attributes_; }
1642 // Export list of EXIDX section indices.
1644 get_exidx_shndx_list(std::vector<unsigned int>* list) const
1647 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin();
1648 p != this->exidx_section_map_.end();
1651 if (p->second->shndx() == p->first)
1652 list->push_back(p->first);
1654 // Sort list to make result independent of implementation of map.
1655 std::sort(list->begin(), list->end());
1659 // Post constructor setup.
1663 // Call parent's setup method.
1664 Sized_relobj_file<32, big_endian>::do_setup();
1666 // Initialize look-up tables.
1667 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1668 this->stub_tables_.swap(empty_stub_table_list);
1671 // Count the local symbols.
1673 do_count_local_symbols(Stringpool_template<char>*,
1674 Stringpool_template<char>*);
1677 do_relocate_sections(
1678 const Symbol_table* symtab, const Layout* layout,
1679 const unsigned char* pshdrs, Output_file* of,
1680 typename Sized_relobj_file<32, big_endian>::Views* pivews);
1682 // Read the symbol information.
1684 do_read_symbols(Read_symbols_data* sd);
1686 // Process relocs for garbage collection.
1688 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1692 // Whether a section needs to be scanned for relocation stubs.
1694 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1695 const Relobj::Output_sections&,
1696 const Symbol_table*, const unsigned char*);
1698 // Whether a section is a scannable text section.
1700 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1701 const Output_section*, const Symbol_table*);
1703 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1705 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1706 unsigned int, Output_section*,
1707 const Symbol_table*);
1709 // Scan a section for the Cortex-A8 erratum.
1711 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1712 unsigned int, Output_section*,
1713 Target_arm<big_endian>*);
1715 // Find the linked text section of an EXIDX section by looking at the
1716 // first relocation of the EXIDX section. PSHDR points to the section
1717 // headers of a relocation section and PSYMS points to the local symbols.
1718 // PSHNDX points to a location storing the text section index if found.
1719 // Return whether we can find the linked section.
1721 find_linked_text_section(const unsigned char* pshdr,
1722 const unsigned char* psyms, unsigned int* pshndx);
1725 // Make a new Arm_exidx_input_section object for EXIDX section with
1726 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1727 // index of the linked text section.
1729 make_exidx_input_section(unsigned int shndx,
1730 const elfcpp::Shdr<32, big_endian>& shdr,
1731 unsigned int text_shndx,
1732 const elfcpp::Shdr<32, big_endian>& text_shdr);
1734 // Return the output address of either a plain input section or a
1735 // relaxed input section. SHNDX is the section index.
1737 simple_input_section_output_address(unsigned int, Output_section*);
1739 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1740 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1743 // List of stub tables.
1744 Stub_table_list stub_tables_;
1745 // Bit vector to tell if a local symbol is a thumb function or not.
1746 // This is only valid after do_count_local_symbol is called.
1747 std::vector<bool> local_symbol_is_thumb_function_;
1748 // processor-specific flags in ELF file header.
1749 elfcpp::Elf_Word processor_specific_flags_;
1750 // Object attributes if there is an .ARM.attributes section or NULL.
1751 Attributes_section_data* attributes_section_data_;
1752 // Mapping symbols information.
1753 Mapping_symbols_info mapping_symbols_info_;
1754 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1755 std::vector<bool>* section_has_cortex_a8_workaround_;
1756 // Map a text section to its associated .ARM.exidx section, if there is one.
1757 Exidx_section_map exidx_section_map_;
1758 // Whether output local symbol count needs updating.
1759 bool output_local_symbol_count_needs_update_;
1760 // Whether we merge processor flags and attributes of this object to
1762 bool merge_flags_and_attributes_;
1765 // Arm_dynobj class.
1767 template<bool big_endian>
1768 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1771 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1772 const elfcpp::Ehdr<32, big_endian>& ehdr)
1773 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1774 processor_specific_flags_(0), attributes_section_data_(NULL)
1778 { delete this->attributes_section_data_; }
1780 // Downcast a base pointer to an Arm_relobj pointer. This is
1781 // not type-safe but we only use Arm_relobj not the base class.
1782 static Arm_dynobj<big_endian>*
1783 as_arm_dynobj(Dynobj* dynobj)
1784 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1786 // Processor-specific flags in ELF file header. This is valid only after
1789 processor_specific_flags() const
1790 { return this->processor_specific_flags_; }
1792 // Attributes section data.
1793 const Attributes_section_data*
1794 attributes_section_data() const
1795 { return this->attributes_section_data_; }
1798 // Read the symbol information.
1800 do_read_symbols(Read_symbols_data* sd);
1803 // processor-specific flags in ELF file header.
1804 elfcpp::Elf_Word processor_specific_flags_;
1805 // Object attributes if there is an .ARM.attributes section or NULL.
1806 Attributes_section_data* attributes_section_data_;
1809 // Functor to read reloc addends during stub generation.
1811 template<int sh_type, bool big_endian>
1812 struct Stub_addend_reader
1814 // Return the addend for a relocation of a particular type. Depending
1815 // on whether this is a REL or RELA relocation, read the addend from a
1816 // view or from a Reloc object.
1817 elfcpp::Elf_types<32>::Elf_Swxword
1819 unsigned int /* r_type */,
1820 const unsigned char* /* view */,
1821 const typename Reloc_types<sh_type,
1822 32, big_endian>::Reloc& /* reloc */) const;
1825 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1827 template<bool big_endian>
1828 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1830 elfcpp::Elf_types<32>::Elf_Swxword
1833 const unsigned char*,
1834 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1837 // Specialized Stub_addend_reader for RELA type relocation sections.
1838 // We currently do not handle RELA type relocation sections but it is trivial
1839 // to implement the addend reader. This is provided for completeness and to
1840 // make it easier to add support for RELA relocation sections in the future.
1842 template<bool big_endian>
1843 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1845 elfcpp::Elf_types<32>::Elf_Swxword
1848 const unsigned char*,
1849 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1850 big_endian>::Reloc& reloc) const
1851 { return reloc.get_r_addend(); }
1854 // Cortex_a8_reloc class. We keep record of relocation that may need
1855 // the Cortex-A8 erratum workaround.
1857 class Cortex_a8_reloc
1860 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1861 Arm_address destination)
1862 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1868 // Accessors: This is a read-only class.
1870 // Return the relocation stub associated with this relocation if there is
1874 { return this->reloc_stub_; }
1876 // Return the relocation type.
1879 { return this->r_type_; }
1881 // Return the destination address of the relocation. LSB stores the THUMB
1885 { return this->destination_; }
1888 // Associated relocation stub if there is one, or NULL.
1889 const Reloc_stub* reloc_stub_;
1891 unsigned int r_type_;
1892 // Destination address of this relocation. LSB is used to distinguish
1894 Arm_address destination_;
1897 // Arm_output_data_got class. We derive this from Output_data_got to add
1898 // extra methods to handle TLS relocations in a static link.
1900 template<bool big_endian>
1901 class Arm_output_data_got : public Output_data_got<32, big_endian>
1904 Arm_output_data_got(Symbol_table* symtab, Layout* layout)
1905 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout)
1908 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1909 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1910 // applied in a static link.
1912 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1913 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); }
1915 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1916 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1917 // relocation that needs to be applied in a static link.
1919 add_static_reloc(unsigned int got_offset, unsigned int r_type,
1920 Sized_relobj_file<32, big_endian>* relobj,
1923 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj,
1927 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1928 // The first one is initialized to be 1, which is the module index for
1929 // the main executable and the second one 0. A reloc of the type
1930 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1931 // be applied by gold. GSYM is a global symbol.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym);
1935 // Same as the above but for a local symbol in OBJECT with INDEX.
1937 add_tls_gd32_with_static_reloc(unsigned int got_type,
1938 Sized_relobj_file<32, big_endian>* object,
1939 unsigned int index);
1942 // Write out the GOT table.
1944 do_write(Output_file*);
1947 // This class represent dynamic relocations that need to be applied by
1948 // gold because we are using TLS relocations in a static link.
1952 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1953 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true)
1954 { this->u_.global.symbol = gsym; }
1956 Static_reloc(unsigned int got_offset, unsigned int r_type,
1957 Sized_relobj_file<32, big_endian>* relobj, unsigned int index)
1958 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false)
1960 this->u_.local.relobj = relobj;
1961 this->u_.local.index = index;
1964 // Return the GOT offset.
1967 { return this->got_offset_; }
1972 { return this->r_type_; }
1974 // Whether the symbol is global or not.
1976 symbol_is_global() const
1977 { return this->symbol_is_global_; }
1979 // For a relocation against a global symbol, the global symbol.
1983 gold_assert(this->symbol_is_global_);
1984 return this->u_.global.symbol;
1987 // For a relocation against a local symbol, the defining object.
1988 Sized_relobj_file<32, big_endian>*
1991 gold_assert(!this->symbol_is_global_);
1992 return this->u_.local.relobj;
1995 // For a relocation against a local symbol, the local symbol index.
1999 gold_assert(!this->symbol_is_global_);
2000 return this->u_.local.index;
2004 // GOT offset of the entry to which this relocation is applied.
2005 unsigned int got_offset_;
2006 // Type of relocation.
2007 unsigned int r_type_;
2008 // Whether this relocation is against a global symbol.
2009 bool symbol_is_global_;
2010 // A global or local symbol.
2015 // For a global symbol, the symbol itself.
2020 // For a local symbol, the object defining object.
2021 Sized_relobj_file<32, big_endian>* relobj;
2022 // For a local symbol, the symbol index.
2028 // Symbol table of the output object.
2029 Symbol_table* symbol_table_;
2030 // Layout of the output object.
2032 // Static relocs to be applied to the GOT.
2033 std::vector<Static_reloc> static_relocs_;
2036 // The ARM target has many relocation types with odd-sizes or noncontiguous
2037 // bits. The default handling of relocatable relocation cannot process these
2038 // relocations. So we have to extend the default code.
2040 template<bool big_endian, int sh_type, typename Classify_reloc>
2041 class Arm_scan_relocatable_relocs :
2042 public Default_scan_relocatable_relocs<sh_type, Classify_reloc>
2045 // Return the strategy to use for a local symbol which is a section
2046 // symbol, given the relocation type.
2047 inline Relocatable_relocs::Reloc_strategy
2048 local_section_strategy(unsigned int r_type, Relobj*)
2050 if (sh_type == elfcpp::SHT_RELA)
2051 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA;
2054 if (r_type == elfcpp::R_ARM_TARGET1
2055 || r_type == elfcpp::R_ARM_TARGET2)
2057 const Target_arm<big_endian>* arm_target =
2058 Target_arm<big_endian>::default_target();
2059 r_type = arm_target->get_real_reloc_type(r_type);
2064 // Relocations that write nothing. These exclude R_ARM_TARGET1
2065 // and R_ARM_TARGET2.
2066 case elfcpp::R_ARM_NONE:
2067 case elfcpp::R_ARM_V4BX:
2068 case elfcpp::R_ARM_TLS_GOTDESC:
2069 case elfcpp::R_ARM_TLS_CALL:
2070 case elfcpp::R_ARM_TLS_DESCSEQ:
2071 case elfcpp::R_ARM_THM_TLS_CALL:
2072 case elfcpp::R_ARM_GOTRELAX:
2073 case elfcpp::R_ARM_GNU_VTENTRY:
2074 case elfcpp::R_ARM_GNU_VTINHERIT:
2075 case elfcpp::R_ARM_THM_TLS_DESCSEQ16:
2076 case elfcpp::R_ARM_THM_TLS_DESCSEQ32:
2077 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0;
2078 // These should have been converted to something else above.
2079 case elfcpp::R_ARM_TARGET1:
2080 case elfcpp::R_ARM_TARGET2:
2082 // Relocations that write full 32 bits and
2083 // have alignment of 1.
2084 case elfcpp::R_ARM_ABS32:
2085 case elfcpp::R_ARM_REL32:
2086 case elfcpp::R_ARM_SBREL32:
2087 case elfcpp::R_ARM_GOTOFF32:
2088 case elfcpp::R_ARM_BASE_PREL:
2089 case elfcpp::R_ARM_GOT_BREL:
2090 case elfcpp::R_ARM_BASE_ABS:
2091 case elfcpp::R_ARM_ABS32_NOI:
2092 case elfcpp::R_ARM_REL32_NOI:
2093 case elfcpp::R_ARM_PLT32_ABS:
2094 case elfcpp::R_ARM_GOT_ABS:
2095 case elfcpp::R_ARM_GOT_PREL:
2096 case elfcpp::R_ARM_TLS_GD32:
2097 case elfcpp::R_ARM_TLS_LDM32:
2098 case elfcpp::R_ARM_TLS_LDO32:
2099 case elfcpp::R_ARM_TLS_IE32:
2100 case elfcpp::R_ARM_TLS_LE32:
2101 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED;
2103 // For all other static relocations, return RELOC_SPECIAL.
2104 return Relocatable_relocs::RELOC_SPECIAL;
2110 template<bool big_endian>
2111 class Target_arm : public Sized_target<32, big_endian>
2114 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
2117 // When were are relocating a stub, we pass this as the relocation number.
2118 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
2120 Target_arm(const Target::Target_info* info = &arm_info)
2121 : Sized_target<32, big_endian>(info),
2122 got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL),
2123 rel_dyn_(NULL), rel_irelative_(NULL), copy_relocs_(elfcpp::R_ARM_COPY),
2124 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2125 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2126 should_force_pic_veneer_(false),
2127 arm_input_section_map_(), attributes_section_data_(NULL),
2128 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2131 // Whether we force PCI branch veneers.
2133 should_force_pic_veneer() const
2134 { return this->should_force_pic_veneer_; }
2136 // Set PIC veneer flag.
2138 set_should_force_pic_veneer(bool value)
2139 { this->should_force_pic_veneer_ = value; }
2141 // Whether we use THUMB-2 instructions.
2143 using_thumb2() const
2145 Object_attribute* attr =
2146 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2147 int arch = attr->int_value();
2148 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
2151 // Whether we use THUMB/THUMB-2 instructions only.
2153 using_thumb_only() const
2155 Object_attribute* attr =
2156 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2158 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2159 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M)
2161 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
2162 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
2164 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
2165 return attr->int_value() == 'M';
2168 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2170 may_use_arm_nop() const
2172 Object_attribute* attr =
2173 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2174 int arch = attr->int_value();
2175 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2176 || arch == elfcpp::TAG_CPU_ARCH_V6K
2177 || arch == elfcpp::TAG_CPU_ARCH_V7
2178 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2181 // Whether we have THUMB-2 NOP.W instruction.
2183 may_use_thumb2_nop() const
2185 Object_attribute* attr =
2186 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2187 int arch = attr->int_value();
2188 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2189 || arch == elfcpp::TAG_CPU_ARCH_V7
2190 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2193 // Whether we have v4T interworking instructions available.
2195 may_use_v4t_interworking() const
2197 Object_attribute* attr =
2198 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2199 int arch = attr->int_value();
2200 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2201 && arch != elfcpp::TAG_CPU_ARCH_V4);
2204 // Whether we have v5T interworking instructions available.
2206 may_use_v5t_interworking() const
2208 Object_attribute* attr =
2209 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2210 int arch = attr->int_value();
2211 if (parameters->options().fix_arm1176())
2212 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2213 || arch == elfcpp::TAG_CPU_ARCH_V7
2214 || arch == elfcpp::TAG_CPU_ARCH_V6_M
2215 || arch == elfcpp::TAG_CPU_ARCH_V6S_M
2216 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2218 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2219 && arch != elfcpp::TAG_CPU_ARCH_V4
2220 && arch != elfcpp::TAG_CPU_ARCH_V4T);
2223 // Process the relocations to determine unreferenced sections for
2224 // garbage collection.
2226 gc_process_relocs(Symbol_table* symtab,
2228 Sized_relobj_file<32, big_endian>* object,
2229 unsigned int data_shndx,
2230 unsigned int sh_type,
2231 const unsigned char* prelocs,
2233 Output_section* output_section,
2234 bool needs_special_offset_handling,
2235 size_t local_symbol_count,
2236 const unsigned char* plocal_symbols);
2238 // Scan the relocations to look for symbol adjustments.
2240 scan_relocs(Symbol_table* symtab,
2242 Sized_relobj_file<32, big_endian>* object,
2243 unsigned int data_shndx,
2244 unsigned int sh_type,
2245 const unsigned char* prelocs,
2247 Output_section* output_section,
2248 bool needs_special_offset_handling,
2249 size_t local_symbol_count,
2250 const unsigned char* plocal_symbols);
2252 // Finalize the sections.
2254 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
2256 // Return the value to use for a dynamic symbol which requires special
2259 do_dynsym_value(const Symbol*) const;
2261 // Return the plt address for globals. Since we have irelative plt entries,
2262 // address calculation is not as straightforward as plt_address + plt_offset.
2264 do_plt_address_for_global(const Symbol* gsym) const
2265 { return this->plt_section()->address_for_global(gsym); }
2267 // Return the plt address for locals. Since we have irelative plt entries,
2268 // address calculation is not as straightforward as plt_address + plt_offset.
2270 do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const
2271 { return this->plt_section()->address_for_local(relobj, symndx); }
2273 // Relocate a section.
2275 relocate_section(const Relocate_info<32, big_endian>*,
2276 unsigned int sh_type,
2277 const unsigned char* prelocs,
2279 Output_section* output_section,
2280 bool needs_special_offset_handling,
2281 unsigned char* view,
2282 Arm_address view_address,
2283 section_size_type view_size,
2284 const Reloc_symbol_changes*);
2286 // Scan the relocs during a relocatable link.
2288 scan_relocatable_relocs(Symbol_table* symtab,
2290 Sized_relobj_file<32, big_endian>* object,
2291 unsigned int data_shndx,
2292 unsigned int sh_type,
2293 const unsigned char* prelocs,
2295 Output_section* output_section,
2296 bool needs_special_offset_handling,
2297 size_t local_symbol_count,
2298 const unsigned char* plocal_symbols,
2299 Relocatable_relocs*);
2301 // Emit relocations for a section.
2303 relocate_relocs(const Relocate_info<32, big_endian>*,
2304 unsigned int sh_type,
2305 const unsigned char* prelocs,
2307 Output_section* output_section,
2308 typename elfcpp::Elf_types<32>::Elf_Off
2309 offset_in_output_section,
2310 const Relocatable_relocs*,
2311 unsigned char* view,
2312 Arm_address view_address,
2313 section_size_type view_size,
2314 unsigned char* reloc_view,
2315 section_size_type reloc_view_size);
2317 // Perform target-specific processing in a relocatable link. This is
2318 // only used if we use the relocation strategy RELOC_SPECIAL.
2320 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo,
2321 unsigned int sh_type,
2322 const unsigned char* preloc_in,
2324 Output_section* output_section,
2325 typename elfcpp::Elf_types<32>::Elf_Off
2326 offset_in_output_section,
2327 unsigned char* view,
2328 typename elfcpp::Elf_types<32>::Elf_Addr
2330 section_size_type view_size,
2331 unsigned char* preloc_out);
2333 // Return whether SYM is defined by the ABI.
2335 do_is_defined_by_abi(const Symbol* sym) const
2336 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
2338 // Return whether there is a GOT section.
2340 has_got_section() const
2341 { return this->got_ != NULL; }
2343 // Return the size of the GOT section.
2347 gold_assert(this->got_ != NULL);
2348 return this->got_->data_size();
2351 // Return the number of entries in the GOT.
2353 got_entry_count() const
2355 if (!this->has_got_section())
2357 return this->got_size() / 4;
2360 // Return the number of entries in the PLT.
2362 plt_entry_count() const;
2364 // Return the offset of the first non-reserved PLT entry.
2366 first_plt_entry_offset() const;
2368 // Return the size of each PLT entry.
2370 plt_entry_size() const;
2372 // Get the section to use for IRELATIVE relocations, create it if necessary.
2374 rel_irelative_section(Layout*);
2376 // Map platform-specific reloc types
2378 get_real_reloc_type(unsigned int r_type);
2381 // Methods to support stub-generations.
2384 // Return the stub factory
2386 stub_factory() const
2387 { return this->stub_factory_; }
2389 // Make a new Arm_input_section object.
2390 Arm_input_section<big_endian>*
2391 new_arm_input_section(Relobj*, unsigned int);
2393 // Find the Arm_input_section object corresponding to the SHNDX-th input
2394 // section of RELOBJ.
2395 Arm_input_section<big_endian>*
2396 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2398 // Make a new Stub_table
2399 Stub_table<big_endian>*
2400 new_stub_table(Arm_input_section<big_endian>*);
2402 // Scan a section for stub generation.
2404 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2405 const unsigned char*, size_t, Output_section*,
2406 bool, const unsigned char*, Arm_address,
2411 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2412 Output_section*, unsigned char*, Arm_address,
2415 // Get the default ARM target.
2416 static Target_arm<big_endian>*
2419 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2420 && parameters->target().is_big_endian() == big_endian);
2421 return static_cast<Target_arm<big_endian>*>(
2422 parameters->sized_target<32, big_endian>());
2425 // Whether NAME belongs to a mapping symbol.
2427 is_mapping_symbol_name(const char* name)
2431 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2432 && (name[2] == '\0' || name[2] == '.'));
2435 // Whether we work around the Cortex-A8 erratum.
2437 fix_cortex_a8() const
2438 { return this->fix_cortex_a8_; }
2440 // Whether we merge exidx entries in debuginfo.
2442 merge_exidx_entries() const
2443 { return parameters->options().merge_exidx_entries(); }
2445 // Whether we fix R_ARM_V4BX relocation.
2447 // 1 - replace with MOV instruction (armv4 target)
2448 // 2 - make interworking veneer (>= armv4t targets only)
2449 General_options::Fix_v4bx
2451 { return parameters->options().fix_v4bx(); }
2453 // Scan a span of THUMB code section for Cortex-A8 erratum.
2455 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2456 section_size_type, section_size_type,
2457 const unsigned char*, Arm_address);
2459 // Apply Cortex-A8 workaround to a branch.
2461 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2462 unsigned char*, Arm_address);
2465 // Make the PLT-generator object.
2466 Output_data_plt_arm<big_endian>*
2467 make_data_plt(Layout* layout,
2468 Arm_output_data_got<big_endian>* got,
2469 Output_data_space* got_plt,
2470 Output_data_space* got_irelative)
2471 { return this->do_make_data_plt(layout, got, got_plt, got_irelative); }
2473 // Make an ELF object.
2475 do_make_elf_object(const std::string&, Input_file*, off_t,
2476 const elfcpp::Ehdr<32, big_endian>& ehdr);
2479 do_make_elf_object(const std::string&, Input_file*, off_t,
2480 const elfcpp::Ehdr<32, !big_endian>&)
2481 { gold_unreachable(); }
2484 do_make_elf_object(const std::string&, Input_file*, off_t,
2485 const elfcpp::Ehdr<64, false>&)
2486 { gold_unreachable(); }
2489 do_make_elf_object(const std::string&, Input_file*, off_t,
2490 const elfcpp::Ehdr<64, true>&)
2491 { gold_unreachable(); }
2493 // Make an output section.
2495 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2496 elfcpp::Elf_Xword flags)
2497 { return new Arm_output_section<big_endian>(name, type, flags); }
2500 do_adjust_elf_header(unsigned char* view, int len);
2502 // We only need to generate stubs, and hence perform relaxation if we are
2503 // not doing relocatable linking.
2505 do_may_relax() const
2506 { return !parameters->options().relocatable(); }
2509 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*);
2511 // Determine whether an object attribute tag takes an integer, a
2514 do_attribute_arg_type(int tag) const;
2516 // Reorder tags during output.
2518 do_attributes_order(int num) const;
2520 // This is called when the target is selected as the default.
2522 do_select_as_default_target()
2524 // No locking is required since there should only be one default target.
2525 // We cannot have both the big-endian and little-endian ARM targets
2527 gold_assert(arm_reloc_property_table == NULL);
2528 arm_reloc_property_table = new Arm_reloc_property_table();
2531 // Virtual function which is set to return true by a target if
2532 // it can use relocation types to determine if a function's
2533 // pointer is taken.
2535 do_can_check_for_function_pointers() const
2538 // Whether a section called SECTION_NAME may have function pointers to
2539 // sections not eligible for safe ICF folding.
2541 do_section_may_have_icf_unsafe_pointers(const char* section_name) const
2543 return (!is_prefix_of(".ARM.exidx", section_name)
2544 && !is_prefix_of(".ARM.extab", section_name)
2545 && Target::do_section_may_have_icf_unsafe_pointers(section_name));
2549 do_define_standard_symbols(Symbol_table*, Layout*);
2551 virtual Output_data_plt_arm<big_endian>*
2552 do_make_data_plt(Layout* layout,
2553 Arm_output_data_got<big_endian>* got,
2554 Output_data_space* got_plt,
2555 Output_data_space* got_irelative)
2557 gold_assert(got_plt != NULL && got_irelative != NULL);
2558 return new Output_data_plt_arm_standard<big_endian>(
2559 layout, got, got_plt, got_irelative);
2563 // The class which scans relocations.
2568 : issued_non_pic_error_(false)
2572 get_reference_flags(unsigned int r_type);
2575 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2576 Sized_relobj_file<32, big_endian>* object,
2577 unsigned int data_shndx,
2578 Output_section* output_section,
2579 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2580 const elfcpp::Sym<32, big_endian>& lsym,
2584 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2585 Sized_relobj_file<32, big_endian>* object,
2586 unsigned int data_shndx,
2587 Output_section* output_section,
2588 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2592 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2593 Sized_relobj_file<32, big_endian>* ,
2596 const elfcpp::Rel<32, big_endian>& ,
2598 const elfcpp::Sym<32, big_endian>&);
2601 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2602 Sized_relobj_file<32, big_endian>* ,
2605 const elfcpp::Rel<32, big_endian>& ,
2606 unsigned int , Symbol*);
2610 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*,
2611 unsigned int r_type);
2614 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*,
2615 unsigned int r_type, Symbol*);
2618 check_non_pic(Relobj*, unsigned int r_type);
2620 // Almost identical to Symbol::needs_plt_entry except that it also
2621 // handles STT_ARM_TFUNC.
2623 symbol_needs_plt_entry(const Symbol* sym)
2625 // An undefined symbol from an executable does not need a PLT entry.
2626 if (sym->is_undefined() && !parameters->options().shared())
2629 if (sym->type() == elfcpp::STT_GNU_IFUNC)
2632 return (!parameters->doing_static_link()
2633 && (sym->type() == elfcpp::STT_FUNC
2634 || sym->type() == elfcpp::STT_ARM_TFUNC)
2635 && (sym->is_from_dynobj()
2636 || sym->is_undefined()
2637 || sym->is_preemptible()));
2641 possible_function_pointer_reloc(unsigned int r_type);
2643 // Whether a plt entry is needed for ifunc.
2645 reloc_needs_plt_for_ifunc(Sized_relobj_file<32, big_endian>*,
2646 unsigned int r_type);
2648 // Whether we have issued an error about a non-PIC compilation.
2649 bool issued_non_pic_error_;
2652 // The class which implements relocation.
2662 // Return whether the static relocation needs to be applied.
2664 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2665 unsigned int r_type,
2667 Output_section* output_section);
2669 // Do a relocation. Return false if the caller should not issue
2670 // any warnings about this relocation.
2672 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2673 Output_section*, size_t relnum,
2674 const elfcpp::Rel<32, big_endian>&,
2675 unsigned int r_type, const Sized_symbol<32>*,
2676 const Symbol_value<32>*,
2677 unsigned char*, Arm_address,
2680 // Return whether we want to pass flag NON_PIC_REF for this
2681 // reloc. This means the relocation type accesses a symbol not via
2684 reloc_is_non_pic(unsigned int r_type)
2688 // These relocation types reference GOT or PLT entries explicitly.
2689 case elfcpp::R_ARM_GOT_BREL:
2690 case elfcpp::R_ARM_GOT_ABS:
2691 case elfcpp::R_ARM_GOT_PREL:
2692 case elfcpp::R_ARM_GOT_BREL12:
2693 case elfcpp::R_ARM_PLT32_ABS:
2694 case elfcpp::R_ARM_TLS_GD32:
2695 case elfcpp::R_ARM_TLS_LDM32:
2696 case elfcpp::R_ARM_TLS_IE32:
2697 case elfcpp::R_ARM_TLS_IE12GP:
2699 // These relocate types may use PLT entries.
2700 case elfcpp::R_ARM_CALL:
2701 case elfcpp::R_ARM_THM_CALL:
2702 case elfcpp::R_ARM_JUMP24:
2703 case elfcpp::R_ARM_THM_JUMP24:
2704 case elfcpp::R_ARM_THM_JUMP19:
2705 case elfcpp::R_ARM_PLT32:
2706 case elfcpp::R_ARM_THM_XPC22:
2707 case elfcpp::R_ARM_PREL31:
2708 case elfcpp::R_ARM_SBREL31:
2717 // Do a TLS relocation.
2718 inline typename Arm_relocate_functions<big_endian>::Status
2719 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*,
2720 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int,
2721 const Sized_symbol<32>*, const Symbol_value<32>*,
2722 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr,
2727 // A class which returns the size required for a relocation type,
2728 // used while scanning relocs during a relocatable link.
2729 class Relocatable_size_for_reloc
2733 get_size_for_reloc(unsigned int, Relobj*);
2736 // Adjust TLS relocation type based on the options and whether this
2737 // is a local symbol.
2738 static tls::Tls_optimization
2739 optimize_tls_reloc(bool is_final, int r_type);
2741 // Get the GOT section, creating it if necessary.
2742 Arm_output_data_got<big_endian>*
2743 got_section(Symbol_table*, Layout*);
2745 // Get the GOT PLT section.
2747 got_plt_section() const
2749 gold_assert(this->got_plt_ != NULL);
2750 return this->got_plt_;
2753 // Create the PLT section.
2755 make_plt_section(Symbol_table* symtab, Layout* layout);
2757 // Create a PLT entry for a global symbol.
2759 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2761 // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2763 make_local_ifunc_plt_entry(Symbol_table*, Layout*,
2764 Sized_relobj_file<32, big_endian>* relobj,
2765 unsigned int local_sym_index);
2767 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2769 define_tls_base_symbol(Symbol_table*, Layout*);
2771 // Create a GOT entry for the TLS module index.
2773 got_mod_index_entry(Symbol_table* symtab, Layout* layout,
2774 Sized_relobj_file<32, big_endian>* object);
2776 // Get the PLT section.
2777 const Output_data_plt_arm<big_endian>*
2780 gold_assert(this->plt_ != NULL);
2784 // Get the dynamic reloc section, creating it if necessary.
2786 rel_dyn_section(Layout*);
2788 // Get the section to use for TLS_DESC relocations.
2790 rel_tls_desc_section(Layout*) const;
2792 // Return true if the symbol may need a COPY relocation.
2793 // References from an executable object to non-function symbols
2794 // defined in a dynamic object may need a COPY relocation.
2796 may_need_copy_reloc(Symbol* gsym)
2798 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2799 && gsym->may_need_copy_reloc());
2802 // Add a potential copy relocation.
2804 copy_reloc(Symbol_table* symtab, Layout* layout,
2805 Sized_relobj_file<32, big_endian>* object,
2806 unsigned int shndx, Output_section* output_section,
2807 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2809 this->copy_relocs_.copy_reloc(symtab, layout,
2810 symtab->get_sized_symbol<32>(sym),
2811 object, shndx, output_section, reloc,
2812 this->rel_dyn_section(layout));
2815 // Whether two EABI versions are compatible.
2817 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2819 // Merge processor-specific flags from input object and those in the ELF
2820 // header of the output.
2822 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2824 // Get the secondary compatible architecture.
2826 get_secondary_compatible_arch(const Attributes_section_data*);
2828 // Set the secondary compatible architecture.
2830 set_secondary_compatible_arch(Attributes_section_data*, int);
2833 tag_cpu_arch_combine(const char*, int, int*, int, int);
2835 // Helper to print AEABI enum tag value.
2837 aeabi_enum_name(unsigned int);
2839 // Return string value for TAG_CPU_name.
2841 tag_cpu_name_value(unsigned int);
2843 // Query attributes object to see if integer divide instructions may be
2844 // present in an object.
2846 attributes_accept_div(int arch, int profile,
2847 const Object_attribute* div_attr);
2849 // Query attributes object to see if integer divide instructions are
2850 // forbidden to be in the object. This is not the inverse of
2851 // attributes_accept_div.
2853 attributes_forbid_div(const Object_attribute* div_attr);
2855 // Merge object attributes from input object and those in the output.
2857 merge_object_attributes(const char*, const Attributes_section_data*);
2859 // Helper to get an AEABI object attribute
2861 get_aeabi_object_attribute(int tag) const
2863 Attributes_section_data* pasd = this->attributes_section_data_;
2864 gold_assert(pasd != NULL);
2865 Object_attribute* attr =
2866 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2867 gold_assert(attr != NULL);
2872 // Methods to support stub-generations.
2875 // Group input sections for stub generation.
2877 group_sections(Layout*, section_size_type, bool, const Task*);
2879 // Scan a relocation for stub generation.
2881 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2882 const Sized_symbol<32>*, unsigned int,
2883 const Symbol_value<32>*,
2884 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2886 // Scan a relocation section for stub.
2887 template<int sh_type>
2889 scan_reloc_section_for_stubs(
2890 const Relocate_info<32, big_endian>* relinfo,
2891 const unsigned char* prelocs,
2893 Output_section* output_section,
2894 bool needs_special_offset_handling,
2895 const unsigned char* view,
2896 elfcpp::Elf_types<32>::Elf_Addr view_address,
2899 // Fix .ARM.exidx section coverage.
2901 fix_exidx_coverage(Layout*, const Input_objects*,
2902 Arm_output_section<big_endian>*, Symbol_table*,
2905 // Functors for STL set.
2906 struct output_section_address_less_than
2909 operator()(const Output_section* s1, const Output_section* s2) const
2910 { return s1->address() < s2->address(); }
2913 // Information about this specific target which we pass to the
2914 // general Target structure.
2915 static const Target::Target_info arm_info;
2917 // The types of GOT entries needed for this platform.
2918 // These values are exposed to the ABI in an incremental link.
2919 // Do not renumber existing values without changing the version
2920 // number of the .gnu_incremental_inputs section.
2923 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol
2924 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset
2925 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset
2926 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair
2927 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair
2930 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2932 // Map input section to Arm_input_section.
2933 typedef Unordered_map<Section_id,
2934 Arm_input_section<big_endian>*,
2936 Arm_input_section_map;
2938 // Map output addresses to relocs for Cortex-A8 erratum.
2939 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2940 Cortex_a8_relocs_info;
2943 Arm_output_data_got<big_endian>* got_;
2945 Output_data_plt_arm<big_endian>* plt_;
2946 // The GOT PLT section.
2947 Output_data_space* got_plt_;
2948 // The GOT section for IRELATIVE relocations.
2949 Output_data_space* got_irelative_;
2950 // The dynamic reloc section.
2951 Reloc_section* rel_dyn_;
2952 // The section to use for IRELATIVE relocs.
2953 Reloc_section* rel_irelative_;
2954 // Relocs saved to avoid a COPY reloc.
2955 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2956 // Offset of the GOT entry for the TLS module index.
2957 unsigned int got_mod_index_offset_;
2958 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2959 bool tls_base_symbol_defined_;
2960 // Vector of Stub_tables created.
2961 Stub_table_list stub_tables_;
2963 const Stub_factory &stub_factory_;
2964 // Whether we force PIC branch veneers.
2965 bool should_force_pic_veneer_;
2966 // Map for locating Arm_input_sections.
2967 Arm_input_section_map arm_input_section_map_;
2968 // Attributes section data in output.
2969 Attributes_section_data* attributes_section_data_;
2970 // Whether we want to fix code for Cortex-A8 erratum.
2971 bool fix_cortex_a8_;
2972 // Map addresses to relocs for Cortex-A8 erratum.
2973 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2976 template<bool big_endian>
2977 const Target::Target_info Target_arm<big_endian>::arm_info =
2980 big_endian, // is_big_endian
2981 elfcpp::EM_ARM, // machine_code
2982 false, // has_make_symbol
2983 false, // has_resolve
2984 false, // has_code_fill
2985 true, // is_default_stack_executable
2986 false, // can_icf_inline_merge_sections
2988 "/usr/lib/libc.so.1", // dynamic_linker
2989 0x8000, // default_text_segment_address
2990 0x1000, // abi_pagesize (overridable by -z max-page-size)
2991 0x1000, // common_pagesize (overridable by -z common-page-size)
2992 false, // isolate_execinstr
2994 elfcpp::SHN_UNDEF, // small_common_shndx
2995 elfcpp::SHN_UNDEF, // large_common_shndx
2996 0, // small_common_section_flags
2997 0, // large_common_section_flags
2998 ".ARM.attributes", // attributes_section
2999 "aeabi", // attributes_vendor
3000 "_start", // entry_symbol_name
3001 32, // hash_entry_size
3004 // Arm relocate functions class
3007 template<bool big_endian>
3008 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
3013 STATUS_OKAY, // No error during relocation.
3014 STATUS_OVERFLOW, // Relocation overflow.
3015 STATUS_BAD_RELOC // Relocation cannot be applied.
3019 typedef Relocate_functions<32, big_endian> Base;
3020 typedef Arm_relocate_functions<big_endian> This;
3022 // Encoding of imm16 argument for movt and movw ARM instructions
3025 // imm16 := imm4 | imm12
3027 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3028 // +-------+---------------+-------+-------+-----------------------+
3029 // | | |imm4 | |imm12 |
3030 // +-------+---------------+-------+-------+-----------------------+
3032 // Extract the relocation addend from VAL based on the ARM
3033 // instruction encoding described above.
3034 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3035 extract_arm_movw_movt_addend(
3036 typename elfcpp::Swap<32, big_endian>::Valtype val)
3038 // According to the Elf ABI for ARM Architecture the immediate
3039 // field is sign-extended to form the addend.
3040 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff));
3043 // Insert X into VAL based on the ARM instruction encoding described
3045 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3046 insert_val_arm_movw_movt(
3047 typename elfcpp::Swap<32, big_endian>::Valtype val,
3048 typename elfcpp::Swap<32, big_endian>::Valtype x)
3052 val |= (x & 0xf000) << 4;
3056 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3059 // imm16 := imm4 | i | imm3 | imm8
3061 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3062 // +---------+-+-----------+-------++-+-----+-------+---------------+
3063 // | |i| |imm4 || |imm3 | |imm8 |
3064 // +---------+-+-----------+-------++-+-----+-------+---------------+
3066 // Extract the relocation addend from VAL based on the Thumb2
3067 // instruction encoding described above.
3068 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3069 extract_thumb_movw_movt_addend(
3070 typename elfcpp::Swap<32, big_endian>::Valtype val)
3072 // According to the Elf ABI for ARM Architecture the immediate
3073 // field is sign-extended to form the addend.
3074 return Bits<16>::sign_extend32(((val >> 4) & 0xf000)
3075 | ((val >> 15) & 0x0800)
3076 | ((val >> 4) & 0x0700)
3080 // Insert X into VAL based on the Thumb2 instruction encoding
3082 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3083 insert_val_thumb_movw_movt(
3084 typename elfcpp::Swap<32, big_endian>::Valtype val,
3085 typename elfcpp::Swap<32, big_endian>::Valtype x)
3088 val |= (x & 0xf000) << 4;
3089 val |= (x & 0x0800) << 15;
3090 val |= (x & 0x0700) << 4;
3091 val |= (x & 0x00ff);
3095 // Calculate the smallest constant Kn for the specified residual.
3096 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3098 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
3104 // Determine the most significant bit in the residual and
3105 // align the resulting value to a 2-bit boundary.
3106 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
3108 // The desired shift is now (msb - 6), or zero, whichever
3110 return (((msb - 6) < 0) ? 0 : (msb - 6));
3113 // Calculate the final residual for the specified group index.
3114 // If the passed group index is less than zero, the method will return
3115 // the value of the specified residual without any change.
3116 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3117 static typename elfcpp::Swap<32, big_endian>::Valtype
3118 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3121 for (int n = 0; n <= group; n++)
3123 // Calculate which part of the value to mask.
3124 uint32_t shift = calc_grp_kn(residual);
3125 // Calculate the residual for the next time around.
3126 residual &= ~(residual & (0xff << shift));
3132 // Calculate the value of Gn for the specified group index.
3133 // We return it in the form of an encoded constant-and-rotation.
3134 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3135 static typename elfcpp::Swap<32, big_endian>::Valtype
3136 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3139 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
3142 for (int n = 0; n <= group; n++)
3144 // Calculate which part of the value to mask.
3145 shift = calc_grp_kn(residual);
3146 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3147 gn = residual & (0xff << shift);
3148 // Calculate the residual for the next time around.
3151 // Return Gn in the form of an encoded constant-and-rotation.
3152 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
3156 // Handle ARM long branches.
3157 static typename This::Status
3158 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3159 unsigned char*, const Sized_symbol<32>*,
3160 const Arm_relobj<big_endian>*, unsigned int,
3161 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3163 // Handle THUMB long branches.
3164 static typename This::Status
3165 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3166 unsigned char*, const Sized_symbol<32>*,
3167 const Arm_relobj<big_endian>*, unsigned int,
3168 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3171 // Return the branch offset of a 32-bit THUMB branch.
3172 static inline int32_t
3173 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3175 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3176 // involving the J1 and J2 bits.
3177 uint32_t s = (upper_insn & (1U << 10)) >> 10;
3178 uint32_t upper = upper_insn & 0x3ffU;
3179 uint32_t lower = lower_insn & 0x7ffU;
3180 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
3181 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
3182 uint32_t i1 = j1 ^ s ? 0 : 1;
3183 uint32_t i2 = j2 ^ s ? 0 : 1;
3185 return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22)
3186 | (upper << 12) | (lower << 1));
3189 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3190 // UPPER_INSN is the original upper instruction of the branch. Caller is
3191 // responsible for overflow checking and BLX offset adjustment.
3192 static inline uint16_t
3193 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
3195 uint32_t s = offset < 0 ? 1 : 0;
3196 uint32_t bits = static_cast<uint32_t>(offset);
3197 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
3200 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3201 // LOWER_INSN is the original lower instruction of the branch. Caller is
3202 // responsible for overflow checking and BLX offset adjustment.
3203 static inline uint16_t
3204 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
3206 uint32_t s = offset < 0 ? 1 : 0;
3207 uint32_t bits = static_cast<uint32_t>(offset);
3208 return ((lower_insn & ~0x2fffU)
3209 | ((((bits >> 23) & 1) ^ !s) << 13)
3210 | ((((bits >> 22) & 1) ^ !s) << 11)
3211 | ((bits >> 1) & 0x7ffU));
3214 // Return the branch offset of a 32-bit THUMB conditional branch.
3215 static inline int32_t
3216 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3218 uint32_t s = (upper_insn & 0x0400U) >> 10;
3219 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
3220 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
3221 uint32_t lower = (lower_insn & 0x07ffU);
3222 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
3224 return Bits<21>::sign_extend32((upper << 12) | (lower << 1));
3227 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3228 // instruction. UPPER_INSN is the original upper instruction of the branch.
3229 // Caller is responsible for overflow checking.
3230 static inline uint16_t
3231 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
3233 uint32_t s = offset < 0 ? 1 : 0;
3234 uint32_t bits = static_cast<uint32_t>(offset);
3235 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
3238 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3239 // instruction. LOWER_INSN is the original lower instruction of the branch.
3240 // The caller is responsible for overflow checking.
3241 static inline uint16_t
3242 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
3244 uint32_t bits = static_cast<uint32_t>(offset);
3245 uint32_t j2 = (bits & 0x00080000U) >> 19;
3246 uint32_t j1 = (bits & 0x00040000U) >> 18;
3247 uint32_t lo = (bits & 0x00000ffeU) >> 1;
3249 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
3252 // R_ARM_ABS8: S + A
3253 static inline typename This::Status
3254 abs8(unsigned char* view,
3255 const Sized_relobj_file<32, big_endian>* object,
3256 const Symbol_value<32>* psymval)
3258 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
3259 Valtype* wv = reinterpret_cast<Valtype*>(view);
3260 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
3261 int32_t addend = Bits<8>::sign_extend32(val);
3262 Arm_address x = psymval->value(object, addend);
3263 val = Bits<32>::bit_select32(val, x, 0xffU);
3264 elfcpp::Swap<8, big_endian>::writeval(wv, val);
3266 // R_ARM_ABS8 permits signed or unsigned results.
3267 return (Bits<8>::has_signed_unsigned_overflow32(x)
3268 ? This::STATUS_OVERFLOW
3269 : This::STATUS_OKAY);
3272 // R_ARM_THM_ABS5: S + A
3273 static inline typename This::Status
3274 thm_abs5(unsigned char* view,
3275 const Sized_relobj_file<32, big_endian>* object,
3276 const Symbol_value<32>* psymval)
3278 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3279 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3280 Valtype* wv = reinterpret_cast<Valtype*>(view);
3281 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3282 Reltype addend = (val & 0x7e0U) >> 6;
3283 Reltype x = psymval->value(object, addend);
3284 val = Bits<32>::bit_select32(val, x << 6, 0x7e0U);
3285 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3286 return (Bits<5>::has_overflow32(x)
3287 ? This::STATUS_OVERFLOW
3288 : This::STATUS_OKAY);
3291 // R_ARM_ABS12: S + A
3292 static inline typename This::Status
3293 abs12(unsigned char* view,
3294 const Sized_relobj_file<32, big_endian>* object,
3295 const Symbol_value<32>* psymval)
3297 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3298 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3299 Valtype* wv = reinterpret_cast<Valtype*>(view);
3300 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3301 Reltype addend = val & 0x0fffU;
3302 Reltype x = psymval->value(object, addend);
3303 val = Bits<32>::bit_select32(val, x, 0x0fffU);
3304 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3305 return (Bits<12>::has_overflow32(x)
3306 ? This::STATUS_OVERFLOW
3307 : This::STATUS_OKAY);
3310 // R_ARM_ABS16: S + A
3311 static inline typename This::Status
3312 abs16(unsigned char* view,
3313 const Sized_relobj_file<32, big_endian>* object,
3314 const Symbol_value<32>* psymval)
3316 typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype;
3317 Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view);
3318 int32_t addend = Bits<16>::sign_extend32(val);
3319 Arm_address x = psymval->value(object, addend);
3320 val = Bits<32>::bit_select32(val, x, 0xffffU);
3321 elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val);
3323 // R_ARM_ABS16 permits signed or unsigned results.
3324 return (Bits<16>::has_signed_unsigned_overflow32(x)
3325 ? This::STATUS_OVERFLOW
3326 : This::STATUS_OKAY);
3329 // R_ARM_ABS32: (S + A) | T
3330 static inline typename This::Status
3331 abs32(unsigned char* view,
3332 const Sized_relobj_file<32, big_endian>* object,
3333 const Symbol_value<32>* psymval,
3334 Arm_address thumb_bit)
3336 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3337 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3338 Valtype x = psymval->value(object, addend) | thumb_bit;
3339 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3340 return This::STATUS_OKAY;
3343 // R_ARM_REL32: (S + A) | T - P
3344 static inline typename This::Status
3345 rel32(unsigned char* view,
3346 const Sized_relobj_file<32, big_endian>* object,
3347 const Symbol_value<32>* psymval,
3348 Arm_address address,
3349 Arm_address thumb_bit)
3351 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3352 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3353 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3354 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3355 return This::STATUS_OKAY;
3358 // R_ARM_THM_JUMP24: (S + A) | T - P
3359 static typename This::Status
3360 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object,
3361 const Symbol_value<32>* psymval, Arm_address address,
3362 Arm_address thumb_bit);
3364 // R_ARM_THM_JUMP6: S + A – P
3365 static inline typename This::Status
3366 thm_jump6(unsigned char* view,
3367 const Sized_relobj_file<32, big_endian>* object,
3368 const Symbol_value<32>* psymval,
3369 Arm_address address)
3371 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3372 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3373 Valtype* wv = reinterpret_cast<Valtype*>(view);
3374 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3375 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3376 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
3377 Reltype x = (psymval->value(object, addend) - address);
3378 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
3379 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3380 // CZB does only forward jumps.
3381 return ((x > 0x007e)
3382 ? This::STATUS_OVERFLOW
3383 : This::STATUS_OKAY);
3386 // R_ARM_THM_JUMP8: S + A – P
3387 static inline typename This::Status
3388 thm_jump8(unsigned char* view,
3389 const Sized_relobj_file<32, big_endian>* object,
3390 const Symbol_value<32>* psymval,
3391 Arm_address address)
3393 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3394 Valtype* wv = reinterpret_cast<Valtype*>(view);
3395 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3396 int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1);
3397 int32_t x = (psymval->value(object, addend) - address);
3398 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00)
3399 | ((x & 0x01fe) >> 1)));
3400 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3401 return (Bits<9>::has_overflow32(x)
3402 ? This::STATUS_OVERFLOW
3403 : This::STATUS_OKAY);
3406 // R_ARM_THM_JUMP11: S + A – P
3407 static inline typename This::Status
3408 thm_jump11(unsigned char* view,
3409 const Sized_relobj_file<32, big_endian>* object,
3410 const Symbol_value<32>* psymval,
3411 Arm_address address)
3413 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3414 Valtype* wv = reinterpret_cast<Valtype*>(view);
3415 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3416 int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1);
3417 int32_t x = (psymval->value(object, addend) - address);
3418 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800)
3419 | ((x & 0x0ffe) >> 1)));
3420 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3421 return (Bits<12>::has_overflow32(x)
3422 ? This::STATUS_OVERFLOW
3423 : This::STATUS_OKAY);
3426 // R_ARM_BASE_PREL: B(S) + A - P
3427 static inline typename This::Status
3428 base_prel(unsigned char* view,
3430 Arm_address address)
3432 Base::rel32(view, origin - address);
3436 // R_ARM_BASE_ABS: B(S) + A
3437 static inline typename This::Status
3438 base_abs(unsigned char* view,
3441 Base::rel32(view, origin);
3445 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3446 static inline typename This::Status
3447 got_brel(unsigned char* view,
3448 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
3450 Base::rel32(view, got_offset);
3451 return This::STATUS_OKAY;
3454 // R_ARM_GOT_PREL: GOT(S) + A - P
3455 static inline typename This::Status
3456 got_prel(unsigned char* view,
3457 Arm_address got_entry,
3458 Arm_address address)
3460 Base::rel32(view, got_entry - address);
3461 return This::STATUS_OKAY;
3464 // R_ARM_PREL: (S + A) | T - P
3465 static inline typename This::Status
3466 prel31(unsigned char* view,
3467 const Sized_relobj_file<32, big_endian>* object,
3468 const Symbol_value<32>* psymval,
3469 Arm_address address,
3470 Arm_address thumb_bit)
3472 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3473 Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3474 Valtype addend = Bits<31>::sign_extend32(val);
3475 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3476 val = Bits<32>::bit_select32(val, x, 0x7fffffffU);
3477 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val);
3478 return (Bits<31>::has_overflow32(x)
3479 ? This::STATUS_OVERFLOW
3480 : This::STATUS_OKAY);
3483 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3484 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3485 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3486 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3487 static inline typename This::Status
3488 movw(unsigned char* view,
3489 const Sized_relobj_file<32, big_endian>* object,
3490 const Symbol_value<32>* psymval,
3491 Arm_address relative_address_base,
3492 Arm_address thumb_bit,
3493 bool check_overflow)
3495 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3496 Valtype* wv = reinterpret_cast<Valtype*>(view);
3497 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3498 Valtype addend = This::extract_arm_movw_movt_addend(val);
3499 Valtype x = ((psymval->value(object, addend) | thumb_bit)
3500 - relative_address_base);
3501 val = This::insert_val_arm_movw_movt(val, x);
3502 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3503 return ((check_overflow && Bits<16>::has_overflow32(x))
3504 ? This::STATUS_OVERFLOW
3505 : This::STATUS_OKAY);
3508 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3509 // R_ARM_MOVT_PREL: S + A - P
3510 // R_ARM_MOVT_BREL: S + A - B(S)
3511 static inline typename This::Status
3512 movt(unsigned char* view,
3513 const Sized_relobj_file<32, big_endian>* object,
3514 const Symbol_value<32>* psymval,
3515 Arm_address relative_address_base)
3517 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3518 Valtype* wv = reinterpret_cast<Valtype*>(view);
3519 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3520 Valtype addend = This::extract_arm_movw_movt_addend(val);
3521 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3522 val = This::insert_val_arm_movw_movt(val, x);
3523 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3524 // FIXME: IHI0044D says that we should check for overflow.
3525 return This::STATUS_OKAY;
3528 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3529 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3530 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3531 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3532 static inline typename This::Status
3533 thm_movw(unsigned char* view,
3534 const Sized_relobj_file<32, big_endian>* object,
3535 const Symbol_value<32>* psymval,
3536 Arm_address relative_address_base,
3537 Arm_address thumb_bit,
3538 bool check_overflow)
3540 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3541 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3542 Valtype* wv = reinterpret_cast<Valtype*>(view);
3543 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3544 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3545 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3547 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3548 val = This::insert_val_thumb_movw_movt(val, x);
3549 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3550 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3551 return ((check_overflow && Bits<16>::has_overflow32(x))
3552 ? This::STATUS_OVERFLOW
3553 : This::STATUS_OKAY);
3556 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3557 // R_ARM_THM_MOVT_PREL: S + A - P
3558 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3559 static inline typename This::Status
3560 thm_movt(unsigned char* view,
3561 const Sized_relobj_file<32, big_endian>* object,
3562 const Symbol_value<32>* psymval,
3563 Arm_address relative_address_base)
3565 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3566 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3567 Valtype* wv = reinterpret_cast<Valtype*>(view);
3568 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3569 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3570 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3571 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3572 val = This::insert_val_thumb_movw_movt(val, x);
3573 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3574 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3575 return This::STATUS_OKAY;
3578 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3579 static inline typename This::Status
3580 thm_alu11(unsigned char* view,
3581 const Sized_relobj_file<32, big_endian>* object,
3582 const Symbol_value<32>* psymval,
3583 Arm_address address,
3584 Arm_address thumb_bit)
3586 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3587 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3588 Valtype* wv = reinterpret_cast<Valtype*>(view);
3589 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3590 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3592 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3593 // -----------------------------------------------------------------------
3594 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3595 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3596 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3597 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3598 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3599 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3601 // Determine a sign for the addend.
3602 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3603 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3604 // Thumb2 addend encoding:
3605 // imm12 := i | imm3 | imm8
3606 int32_t addend = (insn & 0xff)
3607 | ((insn & 0x00007000) >> 4)
3608 | ((insn & 0x04000000) >> 15);
3609 // Apply a sign to the added.
3612 int32_t x = (psymval->value(object, addend) | thumb_bit)
3613 - (address & 0xfffffffc);
3614 Reltype val = abs(x);
3615 // Mask out the value and a distinct part of the ADD/SUB opcode
3616 // (bits 7:5 of opword).
3617 insn = (insn & 0xfb0f8f00)
3619 | ((val & 0x700) << 4)
3620 | ((val & 0x800) << 15);
3621 // Set the opcode according to whether the value to go in the
3622 // place is negative.
3626 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3627 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3628 return ((val > 0xfff) ?
3629 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3632 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3633 static inline typename This::Status
3634 thm_pc8(unsigned char* view,
3635 const Sized_relobj_file<32, big_endian>* object,
3636 const Symbol_value<32>* psymval,
3637 Arm_address address)
3639 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3640 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3641 Valtype* wv = reinterpret_cast<Valtype*>(view);
3642 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3643 Reltype addend = ((insn & 0x00ff) << 2);
3644 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3645 Reltype val = abs(x);
3646 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3648 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3649 return ((val > 0x03fc)
3650 ? This::STATUS_OVERFLOW
3651 : This::STATUS_OKAY);
3654 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3655 static inline typename This::Status
3656 thm_pc12(unsigned char* view,
3657 const Sized_relobj_file<32, big_endian>* object,
3658 const Symbol_value<32>* psymval,
3659 Arm_address address)
3661 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3662 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3663 Valtype* wv = reinterpret_cast<Valtype*>(view);
3664 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3665 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3666 // Determine a sign for the addend (positive if the U bit is 1).
3667 const int sign = (insn & 0x00800000) ? 1 : -1;
3668 int32_t addend = (insn & 0xfff);
3669 // Apply a sign to the added.
3672 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3673 Reltype val = abs(x);
3674 // Mask out and apply the value and the U bit.
3675 insn = (insn & 0xff7ff000) | (val & 0xfff);
3676 // Set the U bit according to whether the value to go in the
3677 // place is positive.
3681 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3682 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3683 return ((val > 0xfff) ?
3684 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3688 static inline typename This::Status
3689 v4bx(const Relocate_info<32, big_endian>* relinfo,
3690 unsigned char* view,
3691 const Arm_relobj<big_endian>* object,
3692 const Arm_address address,
3693 const bool is_interworking)
3696 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3697 Valtype* wv = reinterpret_cast<Valtype*>(view);
3698 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3700 // Ensure that we have a BX instruction.
3701 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3702 const uint32_t reg = (val & 0xf);
3703 if (is_interworking && reg != 0xf)
3705 Stub_table<big_endian>* stub_table =
3706 object->stub_table(relinfo->data_shndx);
3707 gold_assert(stub_table != NULL);
3709 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3710 gold_assert(stub != NULL);
3712 int32_t veneer_address =
3713 stub_table->address() + stub->offset() - 8 - address;
3714 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3715 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3716 // Replace with a branch to veneer (B <addr>)
3717 val = (val & 0xf0000000) | 0x0a000000
3718 | ((veneer_address >> 2) & 0x00ffffff);
3722 // Preserve Rm (lowest four bits) and the condition code
3723 // (highest four bits). Other bits encode MOV PC,Rm.
3724 val = (val & 0xf000000f) | 0x01a0f000;
3726 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3727 return This::STATUS_OKAY;
3730 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3731 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3732 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3733 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3734 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3735 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3736 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3737 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3738 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3739 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3740 static inline typename This::Status
3741 arm_grp_alu(unsigned char* view,
3742 const Sized_relobj_file<32, big_endian>* object,
3743 const Symbol_value<32>* psymval,
3745 Arm_address address,
3746 Arm_address thumb_bit,
3747 bool check_overflow)
3749 gold_assert(group >= 0 && group < 3);
3750 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3751 Valtype* wv = reinterpret_cast<Valtype*>(view);
3752 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3754 // ALU group relocations are allowed only for the ADD/SUB instructions.
3755 // (0x00800000 - ADD, 0x00400000 - SUB)
3756 const Valtype opcode = insn & 0x01e00000;
3757 if (opcode != 0x00800000 && opcode != 0x00400000)
3758 return This::STATUS_BAD_RELOC;
3760 // Determine a sign for the addend.
3761 const int sign = (opcode == 0x00800000) ? 1 : -1;
3762 // shifter = rotate_imm * 2
3763 const uint32_t shifter = (insn & 0xf00) >> 7;
3764 // Initial addend value.
3765 int32_t addend = insn & 0xff;
3766 // Rotate addend right by shifter.
3767 addend = (addend >> shifter) | (addend << (32 - shifter));
3768 // Apply a sign to the added.
3771 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3772 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3773 // Check for overflow if required
3775 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3776 return This::STATUS_OVERFLOW;
3778 // Mask out the value and the ADD/SUB part of the opcode; take care
3779 // not to destroy the S bit.
3781 // Set the opcode according to whether the value to go in the
3782 // place is negative.
3783 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3784 // Encode the offset (encoded Gn).
3787 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3788 return This::STATUS_OKAY;
3791 // R_ARM_LDR_PC_G0: S + A - P
3792 // R_ARM_LDR_PC_G1: S + A - P
3793 // R_ARM_LDR_PC_G2: S + A - P
3794 // R_ARM_LDR_SB_G0: S + A - B(S)
3795 // R_ARM_LDR_SB_G1: S + A - B(S)
3796 // R_ARM_LDR_SB_G2: S + A - B(S)
3797 static inline typename This::Status
3798 arm_grp_ldr(unsigned char* view,
3799 const Sized_relobj_file<32, big_endian>* object,
3800 const Symbol_value<32>* psymval,
3802 Arm_address address)
3804 gold_assert(group >= 0 && group < 3);
3805 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3806 Valtype* wv = reinterpret_cast<Valtype*>(view);
3807 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3809 const int sign = (insn & 0x00800000) ? 1 : -1;
3810 int32_t addend = (insn & 0xfff) * sign;
3811 int32_t x = (psymval->value(object, addend) - address);
3812 // Calculate the relevant G(n-1) value to obtain this stage residual.
3814 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3815 if (residual >= 0x1000)
3816 return This::STATUS_OVERFLOW;
3818 // Mask out the value and U bit.
3820 // Set the U bit for non-negative values.
3825 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3826 return This::STATUS_OKAY;
3829 // R_ARM_LDRS_PC_G0: S + A - P
3830 // R_ARM_LDRS_PC_G1: S + A - P
3831 // R_ARM_LDRS_PC_G2: S + A - P
3832 // R_ARM_LDRS_SB_G0: S + A - B(S)
3833 // R_ARM_LDRS_SB_G1: S + A - B(S)
3834 // R_ARM_LDRS_SB_G2: S + A - B(S)
3835 static inline typename This::Status
3836 arm_grp_ldrs(unsigned char* view,
3837 const Sized_relobj_file<32, big_endian>* object,
3838 const Symbol_value<32>* psymval,
3840 Arm_address address)
3842 gold_assert(group >= 0 && group < 3);
3843 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3844 Valtype* wv = reinterpret_cast<Valtype*>(view);
3845 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3847 const int sign = (insn & 0x00800000) ? 1 : -1;
3848 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3849 int32_t x = (psymval->value(object, addend) - address);
3850 // Calculate the relevant G(n-1) value to obtain this stage residual.
3852 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3853 if (residual >= 0x100)
3854 return This::STATUS_OVERFLOW;
3856 // Mask out the value and U bit.
3858 // Set the U bit for non-negative values.
3861 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3863 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3864 return This::STATUS_OKAY;
3867 // R_ARM_LDC_PC_G0: S + A - P
3868 // R_ARM_LDC_PC_G1: S + A - P
3869 // R_ARM_LDC_PC_G2: S + A - P
3870 // R_ARM_LDC_SB_G0: S + A - B(S)
3871 // R_ARM_LDC_SB_G1: S + A - B(S)
3872 // R_ARM_LDC_SB_G2: S + A - B(S)
3873 static inline typename This::Status
3874 arm_grp_ldc(unsigned char* view,
3875 const Sized_relobj_file<32, big_endian>* object,
3876 const Symbol_value<32>* psymval,
3878 Arm_address address)
3880 gold_assert(group >= 0 && group < 3);
3881 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3882 Valtype* wv = reinterpret_cast<Valtype*>(view);
3883 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3885 const int sign = (insn & 0x00800000) ? 1 : -1;
3886 int32_t addend = ((insn & 0xff) << 2) * sign;
3887 int32_t x = (psymval->value(object, addend) - address);
3888 // Calculate the relevant G(n-1) value to obtain this stage residual.
3890 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3891 if ((residual & 0x3) != 0 || residual >= 0x400)
3892 return This::STATUS_OVERFLOW;
3894 // Mask out the value and U bit.
3896 // Set the U bit for non-negative values.
3899 insn |= (residual >> 2);
3901 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3902 return This::STATUS_OKAY;
3906 // Relocate ARM long branches. This handles relocation types
3907 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3908 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3909 // undefined and we do not use PLT in this relocation. In such a case,
3910 // the branch is converted into an NOP.
3912 template<bool big_endian>
3913 typename Arm_relocate_functions<big_endian>::Status
3914 Arm_relocate_functions<big_endian>::arm_branch_common(
3915 unsigned int r_type,
3916 const Relocate_info<32, big_endian>* relinfo,
3917 unsigned char* view,
3918 const Sized_symbol<32>* gsym,
3919 const Arm_relobj<big_endian>* object,
3921 const Symbol_value<32>* psymval,
3922 Arm_address address,
3923 Arm_address thumb_bit,
3924 bool is_weakly_undefined_without_plt)
3926 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3927 Valtype* wv = reinterpret_cast<Valtype*>(view);
3928 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3930 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3931 && ((val & 0x0f000000UL) == 0x0a000000UL);
3932 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3933 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3934 && ((val & 0x0f000000UL) == 0x0b000000UL);
3935 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3936 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3938 // Check that the instruction is valid.
3939 if (r_type == elfcpp::R_ARM_CALL)
3941 if (!insn_is_uncond_bl && !insn_is_blx)
3942 return This::STATUS_BAD_RELOC;
3944 else if (r_type == elfcpp::R_ARM_JUMP24)
3946 if (!insn_is_b && !insn_is_cond_bl)
3947 return This::STATUS_BAD_RELOC;
3949 else if (r_type == elfcpp::R_ARM_PLT32)
3951 if (!insn_is_any_branch)
3952 return This::STATUS_BAD_RELOC;
3954 else if (r_type == elfcpp::R_ARM_XPC25)
3956 // FIXME: AAELF document IH0044C does not say much about it other
3957 // than it being obsolete.
3958 if (!insn_is_any_branch)
3959 return This::STATUS_BAD_RELOC;
3964 // A branch to an undefined weak symbol is turned into a jump to
3965 // the next instruction unless a PLT entry will be created.
3966 // Do the same for local undefined symbols.
3967 // The jump to the next instruction is optimized as a NOP depending
3968 // on the architecture.
3969 const Target_arm<big_endian>* arm_target =
3970 Target_arm<big_endian>::default_target();
3971 if (is_weakly_undefined_without_plt)
3973 gold_assert(!parameters->options().relocatable());
3974 Valtype cond = val & 0xf0000000U;
3975 if (arm_target->may_use_arm_nop())
3976 val = cond | 0x0320f000;
3978 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3979 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3980 return This::STATUS_OKAY;
3983 Valtype addend = Bits<26>::sign_extend32(val << 2);
3984 Valtype branch_target = psymval->value(object, addend);
3985 int32_t branch_offset = branch_target - address;
3987 // We need a stub if the branch offset is too large or if we need
3989 bool may_use_blx = arm_target->may_use_v5t_interworking();
3990 Reloc_stub* stub = NULL;
3992 if (!parameters->options().relocatable()
3993 && (Bits<26>::has_overflow32(branch_offset)
3994 || ((thumb_bit != 0)
3995 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL))))
3997 Valtype unadjusted_branch_target = psymval->value(object, 0);
3999 Stub_type stub_type =
4000 Reloc_stub::stub_type_for_reloc(r_type, address,
4001 unadjusted_branch_target,
4003 if (stub_type != arm_stub_none)
4005 Stub_table<big_endian>* stub_table =
4006 object->stub_table(relinfo->data_shndx);
4007 gold_assert(stub_table != NULL);
4009 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4010 stub = stub_table->find_reloc_stub(stub_key);
4011 gold_assert(stub != NULL);
4012 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4013 branch_target = stub_table->address() + stub->offset() + addend;
4014 branch_offset = branch_target - address;
4015 gold_assert(!Bits<26>::has_overflow32(branch_offset));
4019 // At this point, if we still need to switch mode, the instruction
4020 // must either be a BLX or a BL that can be converted to a BLX.
4024 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
4025 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
4028 val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL);
4029 elfcpp::Swap<32, big_endian>::writeval(wv, val);
4030 return (Bits<26>::has_overflow32(branch_offset)
4031 ? This::STATUS_OVERFLOW
4032 : This::STATUS_OKAY);
4035 // Relocate THUMB long branches. This handles relocation types
4036 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4037 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4038 // undefined and we do not use PLT in this relocation. In such a case,
4039 // the branch is converted into an NOP.
4041 template<bool big_endian>
4042 typename Arm_relocate_functions<big_endian>::Status
4043 Arm_relocate_functions<big_endian>::thumb_branch_common(
4044 unsigned int r_type,
4045 const Relocate_info<32, big_endian>* relinfo,
4046 unsigned char* view,
4047 const Sized_symbol<32>* gsym,
4048 const Arm_relobj<big_endian>* object,
4050 const Symbol_value<32>* psymval,
4051 Arm_address address,
4052 Arm_address thumb_bit,
4053 bool is_weakly_undefined_without_plt)
4055 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4056 Valtype* wv = reinterpret_cast<Valtype*>(view);
4057 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4058 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4060 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4062 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
4063 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
4065 // Check that the instruction is valid.
4066 if (r_type == elfcpp::R_ARM_THM_CALL)
4068 if (!is_bl_insn && !is_blx_insn)
4069 return This::STATUS_BAD_RELOC;
4071 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
4073 // This cannot be a BLX.
4075 return This::STATUS_BAD_RELOC;
4077 else if (r_type == elfcpp::R_ARM_THM_XPC22)
4079 // Check for Thumb to Thumb call.
4081 return This::STATUS_BAD_RELOC;
4084 gold_warning(_("%s: Thumb BLX instruction targets "
4085 "thumb function '%s'."),
4086 object->name().c_str(),
4087 (gsym ? gsym->name() : "(local)"));
4088 // Convert BLX to BL.
4089 lower_insn |= 0x1000U;
4095 // A branch to an undefined weak symbol is turned into a jump to
4096 // the next instruction unless a PLT entry will be created.
4097 // The jump to the next instruction is optimized as a NOP.W for
4098 // Thumb-2 enabled architectures.
4099 const Target_arm<big_endian>* arm_target =
4100 Target_arm<big_endian>::default_target();
4101 if (is_weakly_undefined_without_plt)
4103 gold_assert(!parameters->options().relocatable());
4104 if (arm_target->may_use_thumb2_nop())
4106 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
4107 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
4111 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
4112 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
4114 return This::STATUS_OKAY;
4117 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
4118 Arm_address branch_target = psymval->value(object, addend);
4120 // For BLX, bit 1 of target address comes from bit 1 of base address.
4121 bool may_use_blx = arm_target->may_use_v5t_interworking();
4122 if (thumb_bit == 0 && may_use_blx)
4123 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4125 int32_t branch_offset = branch_target - address;
4127 // We need a stub if the branch offset is too large or if we need
4129 bool thumb2 = arm_target->using_thumb2();
4130 if (!parameters->options().relocatable()
4131 && ((!thumb2 && Bits<23>::has_overflow32(branch_offset))
4132 || (thumb2 && Bits<25>::has_overflow32(branch_offset))
4133 || ((thumb_bit == 0)
4134 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4135 || r_type == elfcpp::R_ARM_THM_JUMP24))))
4137 Arm_address unadjusted_branch_target = psymval->value(object, 0);
4139 Stub_type stub_type =
4140 Reloc_stub::stub_type_for_reloc(r_type, address,
4141 unadjusted_branch_target,
4144 if (stub_type != arm_stub_none)
4146 Stub_table<big_endian>* stub_table =
4147 object->stub_table(relinfo->data_shndx);
4148 gold_assert(stub_table != NULL);
4150 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4151 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
4152 gold_assert(stub != NULL);
4153 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4154 branch_target = stub_table->address() + stub->offset() + addend;
4155 if (thumb_bit == 0 && may_use_blx)
4156 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4157 branch_offset = branch_target - address;
4161 // At this point, if we still need to switch mode, the instruction
4162 // must either be a BLX or a BL that can be converted to a BLX.
4165 gold_assert(may_use_blx
4166 && (r_type == elfcpp::R_ARM_THM_CALL
4167 || r_type == elfcpp::R_ARM_THM_XPC22));
4168 // Make sure this is a BLX.
4169 lower_insn &= ~0x1000U;
4173 // Make sure this is a BL.
4174 lower_insn |= 0x1000U;
4177 // For a BLX instruction, make sure that the relocation is rounded up
4178 // to a word boundary. This follows the semantics of the instruction
4179 // which specifies that bit 1 of the target address will come from bit
4180 // 1 of the base address.
4181 if ((lower_insn & 0x5000U) == 0x4000U)
4182 gold_assert((branch_offset & 3) == 0);
4184 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4185 // We use the Thumb-2 encoding, which is safe even if dealing with
4186 // a Thumb-1 instruction by virtue of our overflow check above. */
4187 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
4188 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
4190 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4191 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4193 gold_assert(!Bits<25>::has_overflow32(branch_offset));
4196 ? Bits<25>::has_overflow32(branch_offset)
4197 : Bits<23>::has_overflow32(branch_offset))
4198 ? This::STATUS_OVERFLOW
4199 : This::STATUS_OKAY);
4202 // Relocate THUMB-2 long conditional branches.
4203 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4204 // undefined and we do not use PLT in this relocation. In such a case,
4205 // the branch is converted into an NOP.
4207 template<bool big_endian>
4208 typename Arm_relocate_functions<big_endian>::Status
4209 Arm_relocate_functions<big_endian>::thm_jump19(
4210 unsigned char* view,
4211 const Arm_relobj<big_endian>* object,
4212 const Symbol_value<32>* psymval,
4213 Arm_address address,
4214 Arm_address thumb_bit)
4216 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4217 Valtype* wv = reinterpret_cast<Valtype*>(view);
4218 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4219 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4220 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
4222 Arm_address branch_target = psymval->value(object, addend);
4223 int32_t branch_offset = branch_target - address;
4225 // ??? Should handle interworking? GCC might someday try to
4226 // use this for tail calls.
4227 // FIXME: We do support thumb entry to PLT yet.
4230 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4231 return This::STATUS_BAD_RELOC;
4234 // Put RELOCATION back into the insn.
4235 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
4236 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
4238 // Put the relocated value back in the object file:
4239 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4240 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4242 return (Bits<21>::has_overflow32(branch_offset)
4243 ? This::STATUS_OVERFLOW
4244 : This::STATUS_OKAY);
4247 // Get the GOT section, creating it if necessary.
4249 template<bool big_endian>
4250 Arm_output_data_got<big_endian>*
4251 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
4253 if (this->got_ == NULL)
4255 gold_assert(symtab != NULL && layout != NULL);
4257 // When using -z now, we can treat .got as a relro section.
4258 // Without -z now, it is modified after program startup by lazy
4260 bool is_got_relro = parameters->options().now();
4261 Output_section_order got_order = (is_got_relro
4265 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4266 // .got.plt sections in output. The output .got section contains both
4267 // PLT and non-PLT GOT entries.
4268 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout);
4270 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4271 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4272 this->got_, got_order, is_got_relro);
4274 // The old GNU linker creates a .got.plt section. We just
4275 // create another set of data in the .got section. Note that we
4276 // always create a PLT if we create a GOT, although the PLT
4278 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
4279 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4280 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4281 this->got_plt_, got_order, is_got_relro);
4283 // The first three entries are reserved.
4284 this->got_plt_->set_current_data_size(3 * 4);
4286 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4287 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
4288 Symbol_table::PREDEFINED,
4290 0, 0, elfcpp::STT_OBJECT,
4292 elfcpp::STV_HIDDEN, 0,
4295 // If there are any IRELATIVE relocations, they get GOT entries
4296 // in .got.plt after the jump slot entries.
4297 this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT");
4298 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4299 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4300 this->got_irelative_,
4301 got_order, is_got_relro);
4307 // Get the dynamic reloc section, creating it if necessary.
4309 template<bool big_endian>
4310 typename Target_arm<big_endian>::Reloc_section*
4311 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
4313 if (this->rel_dyn_ == NULL)
4315 gold_assert(layout != NULL);
4316 // Create both relocation sections in the same place, so as to ensure
4317 // their relative order in the output section.
4318 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
4319 this->rel_irelative_ = new Reloc_section(false);
4320 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4321 elfcpp::SHF_ALLOC, this->rel_dyn_,
4322 ORDER_DYNAMIC_RELOCS, false);
4323 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4324 elfcpp::SHF_ALLOC, this->rel_irelative_,
4325 ORDER_DYNAMIC_RELOCS, false);
4327 return this->rel_dyn_;
4331 // Get the section to use for IRELATIVE relocs, creating it if necessary. These
4332 // go in .rela.dyn, but only after all other dynamic relocations. They need to
4333 // follow the other dynamic relocations so that they can refer to global
4334 // variables initialized by those relocs.
4336 template<bool big_endian>
4337 typename Target_arm<big_endian>::Reloc_section*
4338 Target_arm<big_endian>::rel_irelative_section(Layout* layout)
4340 if (this->rel_irelative_ == NULL)
4342 // Delegate the creation to rel_dyn_section so as to ensure their order in
4343 // the output section.
4344 this->rel_dyn_section(layout);
4345 gold_assert(this->rel_irelative_ != NULL
4346 && (this->rel_dyn_->output_section()
4347 == this->rel_irelative_->output_section()));
4349 return this->rel_irelative_;
4353 // Insn_template methods.
4355 // Return byte size of an instruction template.
4358 Insn_template::size() const
4360 switch (this->type())
4363 case THUMB16_SPECIAL_TYPE:
4374 // Return alignment of an instruction template.
4377 Insn_template::alignment() const
4379 switch (this->type())
4382 case THUMB16_SPECIAL_TYPE:
4393 // Stub_template methods.
4395 Stub_template::Stub_template(
4396 Stub_type type, const Insn_template* insns,
4398 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
4399 entry_in_thumb_mode_(false), relocs_()
4403 // Compute byte size and alignment of stub template.
4404 for (size_t i = 0; i < insn_count; i++)
4406 unsigned insn_alignment = insns[i].alignment();
4407 size_t insn_size = insns[i].size();
4408 gold_assert((offset & (insn_alignment - 1)) == 0);
4409 this->alignment_ = std::max(this->alignment_, insn_alignment);
4410 switch (insns[i].type())
4412 case Insn_template::THUMB16_TYPE:
4413 case Insn_template::THUMB16_SPECIAL_TYPE:
4415 this->entry_in_thumb_mode_ = true;
4418 case Insn_template::THUMB32_TYPE:
4419 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
4420 this->relocs_.push_back(Reloc(i, offset));
4422 this->entry_in_thumb_mode_ = true;
4425 case Insn_template::ARM_TYPE:
4426 // Handle cases where the target is encoded within the
4428 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
4429 this->relocs_.push_back(Reloc(i, offset));
4432 case Insn_template::DATA_TYPE:
4433 // Entry point cannot be data.
4434 gold_assert(i != 0);
4435 this->relocs_.push_back(Reloc(i, offset));
4441 offset += insn_size;
4443 this->size_ = offset;
4448 // Template to implement do_write for a specific target endianness.
4450 template<bool big_endian>
4452 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4454 const Stub_template* stub_template = this->stub_template();
4455 const Insn_template* insns = stub_template->insns();
4457 // FIXME: We do not handle BE8 encoding yet.
4458 unsigned char* pov = view;
4459 for (size_t i = 0; i < stub_template->insn_count(); i++)
4461 switch (insns[i].type())
4463 case Insn_template::THUMB16_TYPE:
4464 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4466 case Insn_template::THUMB16_SPECIAL_TYPE:
4467 elfcpp::Swap<16, big_endian>::writeval(
4469 this->thumb16_special(i));
4471 case Insn_template::THUMB32_TYPE:
4473 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4474 uint32_t lo = insns[i].data() & 0xffff;
4475 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4476 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4479 case Insn_template::ARM_TYPE:
4480 case Insn_template::DATA_TYPE:
4481 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4486 pov += insns[i].size();
4488 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4491 // Reloc_stub::Key methods.
4493 // Dump a Key as a string for debugging.
4496 Reloc_stub::Key::name() const
4498 if (this->r_sym_ == invalid_index)
4500 // Global symbol key name
4501 // <stub-type>:<symbol name>:<addend>.
4502 const std::string sym_name = this->u_.symbol->name();
4503 // We need to print two hex number and two colons. So just add 100 bytes
4504 // to the symbol name size.
4505 size_t len = sym_name.size() + 100;
4506 char* buffer = new char[len];
4507 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4508 sym_name.c_str(), this->addend_);
4509 gold_assert(c > 0 && c < static_cast<int>(len));
4511 return std::string(buffer);
4515 // local symbol key name
4516 // <stub-type>:<object>:<r_sym>:<addend>.
4517 const size_t len = 200;
4519 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4520 this->u_.relobj, this->r_sym_, this->addend_);
4521 gold_assert(c > 0 && c < static_cast<int>(len));
4522 return std::string(buffer);
4526 // Reloc_stub methods.
4528 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4529 // LOCATION to DESTINATION.
4530 // This code is based on the arm_type_of_stub function in
4531 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4535 Reloc_stub::stub_type_for_reloc(
4536 unsigned int r_type,
4537 Arm_address location,
4538 Arm_address destination,
4539 bool target_is_thumb)
4541 Stub_type stub_type = arm_stub_none;
4543 // This is a bit ugly but we want to avoid using a templated class for
4544 // big and little endianities.
4546 bool should_force_pic_veneer = parameters->options().pic_veneer();
4549 if (parameters->target().is_big_endian())
4551 const Target_arm<true>* big_endian_target =
4552 Target_arm<true>::default_target();
4553 may_use_blx = big_endian_target->may_use_v5t_interworking();
4554 should_force_pic_veneer |= big_endian_target->should_force_pic_veneer();
4555 thumb2 = big_endian_target->using_thumb2();
4556 thumb_only = big_endian_target->using_thumb_only();
4560 const Target_arm<false>* little_endian_target =
4561 Target_arm<false>::default_target();
4562 may_use_blx = little_endian_target->may_use_v5t_interworking();
4563 should_force_pic_veneer |=
4564 little_endian_target->should_force_pic_veneer();
4565 thumb2 = little_endian_target->using_thumb2();
4566 thumb_only = little_endian_target->using_thumb_only();
4569 int64_t branch_offset;
4570 bool output_is_position_independent =
4571 parameters->options().output_is_position_independent();
4572 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4574 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4575 // base address (instruction address + 4).
4576 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb)
4577 destination = Bits<32>::bit_select32(destination, location, 0x2);
4578 branch_offset = static_cast<int64_t>(destination) - location;
4580 // Handle cases where:
4581 // - this call goes too far (different Thumb/Thumb2 max
4583 // - it's a Thumb->Arm call and blx is not available, or it's a
4584 // Thumb->Arm branch (not bl). A stub is needed in this case.
4586 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4587 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4589 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4590 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4591 || ((!target_is_thumb)
4592 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4593 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4595 if (target_is_thumb)
4600 stub_type = (output_is_position_independent
4601 || should_force_pic_veneer)
4604 && (r_type == elfcpp::R_ARM_THM_CALL))
4605 // V5T and above. Stub starts with ARM code, so
4606 // we must be able to switch mode before
4607 // reaching it, which is only possible for 'bl'
4608 // (ie R_ARM_THM_CALL relocation).
4609 ? arm_stub_long_branch_any_thumb_pic
4610 // On V4T, use Thumb code only.
4611 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4615 && (r_type == elfcpp::R_ARM_THM_CALL))
4616 ? arm_stub_long_branch_any_any // V5T and above.
4617 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4621 stub_type = (output_is_position_independent
4622 || should_force_pic_veneer)
4623 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4624 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4631 // FIXME: We should check that the input section is from an
4632 // object that has interwork enabled.
4634 stub_type = (output_is_position_independent
4635 || should_force_pic_veneer)
4638 && (r_type == elfcpp::R_ARM_THM_CALL))
4639 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4640 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4644 && (r_type == elfcpp::R_ARM_THM_CALL))
4645 ? arm_stub_long_branch_any_any // V5T and above.
4646 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4648 // Handle v4t short branches.
4649 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4650 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4651 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4652 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4656 else if (r_type == elfcpp::R_ARM_CALL
4657 || r_type == elfcpp::R_ARM_JUMP24
4658 || r_type == elfcpp::R_ARM_PLT32)
4660 branch_offset = static_cast<int64_t>(destination) - location;
4661 if (target_is_thumb)
4665 // FIXME: We should check that the input section is from an
4666 // object that has interwork enabled.
4668 // We have an extra 2-bytes reach because of
4669 // the mode change (bit 24 (H) of BLX encoding).
4670 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4671 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4672 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4673 || (r_type == elfcpp::R_ARM_JUMP24)
4674 || (r_type == elfcpp::R_ARM_PLT32))
4676 stub_type = (output_is_position_independent
4677 || should_force_pic_veneer)
4680 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4681 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4685 ? arm_stub_long_branch_any_any // V5T and above.
4686 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4692 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4693 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4695 stub_type = (output_is_position_independent
4696 || should_force_pic_veneer)
4697 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4698 : arm_stub_long_branch_any_any; /// non-PIC.
4706 // Cortex_a8_stub methods.
4708 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4709 // I is the position of the instruction template in the stub template.
4712 Cortex_a8_stub::do_thumb16_special(size_t i)
4714 // The only use of this is to copy condition code from a conditional
4715 // branch being worked around to the corresponding conditional branch in
4717 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4719 uint16_t data = this->stub_template()->insns()[i].data();
4720 gold_assert((data & 0xff00U) == 0xd000U);
4721 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4725 // Stub_factory methods.
4727 Stub_factory::Stub_factory()
4729 // The instruction template sequences are declared as static
4730 // objects and initialized first time the constructor runs.
4732 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4733 // to reach the stub if necessary.
4734 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4736 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4737 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4738 // dcd R_ARM_ABS32(X)
4741 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4743 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4745 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4746 Insn_template::arm_insn(0xe12fff1c), // bx ip
4747 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4748 // dcd R_ARM_ABS32(X)
4751 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4752 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4754 Insn_template::thumb16_insn(0xb401), // push {r0}
4755 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4756 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4757 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4758 Insn_template::thumb16_insn(0x4760), // bx ip
4759 Insn_template::thumb16_insn(0xbf00), // nop
4760 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4761 // dcd R_ARM_ABS32(X)
4764 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4766 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4768 Insn_template::thumb16_insn(0x4778), // bx pc
4769 Insn_template::thumb16_insn(0x46c0), // nop
4770 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4771 Insn_template::arm_insn(0xe12fff1c), // bx ip
4772 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4773 // dcd R_ARM_ABS32(X)
4776 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4778 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4780 Insn_template::thumb16_insn(0x4778), // bx pc
4781 Insn_template::thumb16_insn(0x46c0), // nop
4782 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4783 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4784 // dcd R_ARM_ABS32(X)
4787 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4788 // one, when the destination is close enough.
4789 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4791 Insn_template::thumb16_insn(0x4778), // bx pc
4792 Insn_template::thumb16_insn(0x46c0), // nop
4793 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4796 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4797 // blx to reach the stub if necessary.
4798 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4800 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4801 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4802 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4803 // dcd R_ARM_REL32(X-4)
4806 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4807 // blx to reach the stub if necessary. We can not add into pc;
4808 // it is not guaranteed to mode switch (different in ARMv6 and
4810 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4812 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4813 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4814 Insn_template::arm_insn(0xe12fff1c), // bx ip
4815 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4816 // dcd R_ARM_REL32(X)
4819 // V4T ARM -> ARM long branch stub, PIC.
4820 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4822 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4823 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4824 Insn_template::arm_insn(0xe12fff1c), // bx ip
4825 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4826 // dcd R_ARM_REL32(X)
4829 // V4T Thumb -> ARM long branch stub, PIC.
4830 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4832 Insn_template::thumb16_insn(0x4778), // bx pc
4833 Insn_template::thumb16_insn(0x46c0), // nop
4834 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4835 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4836 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4837 // dcd R_ARM_REL32(X)
4840 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4842 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4844 Insn_template::thumb16_insn(0xb401), // push {r0}
4845 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4846 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4847 Insn_template::thumb16_insn(0x4484), // add ip, r0
4848 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4849 Insn_template::thumb16_insn(0x4760), // bx ip
4850 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4851 // dcd R_ARM_REL32(X)
4854 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4856 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4858 Insn_template::thumb16_insn(0x4778), // bx pc
4859 Insn_template::thumb16_insn(0x46c0), // nop
4860 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4861 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4862 Insn_template::arm_insn(0xe12fff1c), // bx ip
4863 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4864 // dcd R_ARM_REL32(X)
4867 // Cortex-A8 erratum-workaround stubs.
4869 // Stub used for conditional branches (which may be beyond +/-1MB away,
4870 // so we can't use a conditional branch to reach this stub).
4877 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4879 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4880 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4881 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4885 // Stub used for b.w and bl.w instructions.
4887 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4889 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4892 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4894 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4897 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4898 // instruction (which switches to ARM mode) to point to this stub. Jump to
4899 // the real destination using an ARM-mode branch.
4900 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4902 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4905 // Stub used to provide an interworking for R_ARM_V4BX relocation
4906 // (bx r[n] instruction).
4907 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4909 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4910 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4911 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4914 // Fill in the stub template look-up table. Stub templates are constructed
4915 // per instance of Stub_factory for fast look-up without locking
4916 // in a thread-enabled environment.
4918 this->stub_templates_[arm_stub_none] =
4919 new Stub_template(arm_stub_none, NULL, 0);
4921 #define DEF_STUB(x) \
4925 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4926 Stub_type type = arm_stub_##x; \
4927 this->stub_templates_[type] = \
4928 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4936 // Stub_table methods.
4938 // Remove all Cortex-A8 stub.
4940 template<bool big_endian>
4942 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4944 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4945 p != this->cortex_a8_stubs_.end();
4948 this->cortex_a8_stubs_.clear();
4951 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4953 template<bool big_endian>
4955 Stub_table<big_endian>::relocate_stub(
4957 const Relocate_info<32, big_endian>* relinfo,
4958 Target_arm<big_endian>* arm_target,
4959 Output_section* output_section,
4960 unsigned char* view,
4961 Arm_address address,
4962 section_size_type view_size)
4964 const Stub_template* stub_template = stub->stub_template();
4965 if (stub_template->reloc_count() != 0)
4967 // Adjust view to cover the stub only.
4968 section_size_type offset = stub->offset();
4969 section_size_type stub_size = stub_template->size();
4970 gold_assert(offset + stub_size <= view_size);
4972 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4973 address + offset, stub_size);
4977 // Relocate all stubs in this stub table.
4979 template<bool big_endian>
4981 Stub_table<big_endian>::relocate_stubs(
4982 const Relocate_info<32, big_endian>* relinfo,
4983 Target_arm<big_endian>* arm_target,
4984 Output_section* output_section,
4985 unsigned char* view,
4986 Arm_address address,
4987 section_size_type view_size)
4989 // If we are passed a view bigger than the stub table's. we need to
4991 gold_assert(address == this->address()
4993 == static_cast<section_size_type>(this->data_size())));
4995 // Relocate all relocation stubs.
4996 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4997 p != this->reloc_stubs_.end();
4999 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
5000 address, view_size);
5002 // Relocate all Cortex-A8 stubs.
5003 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
5004 p != this->cortex_a8_stubs_.end();
5006 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
5007 address, view_size);
5009 // Relocate all ARM V4BX stubs.
5010 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
5011 p != this->arm_v4bx_stubs_.end();
5015 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
5016 address, view_size);
5020 // Write out the stubs to file.
5022 template<bool big_endian>
5024 Stub_table<big_endian>::do_write(Output_file* of)
5026 off_t offset = this->offset();
5027 const section_size_type oview_size =
5028 convert_to_section_size_type(this->data_size());
5029 unsigned char* const oview = of->get_output_view(offset, oview_size);
5031 // Write relocation stubs.
5032 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
5033 p != this->reloc_stubs_.end();
5036 Reloc_stub* stub = p->second;
5037 Arm_address address = this->address() + stub->offset();
5039 == align_address(address,
5040 stub->stub_template()->alignment()));
5041 stub->write(oview + stub->offset(), stub->stub_template()->size(),
5045 // Write Cortex-A8 stubs.
5046 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5047 p != this->cortex_a8_stubs_.end();
5050 Cortex_a8_stub* stub = p->second;
5051 Arm_address address = this->address() + stub->offset();
5053 == align_address(address,
5054 stub->stub_template()->alignment()));
5055 stub->write(oview + stub->offset(), stub->stub_template()->size(),
5059 // Write ARM V4BX relocation stubs.
5060 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5061 p != this->arm_v4bx_stubs_.end();
5067 Arm_address address = this->address() + (*p)->offset();
5069 == align_address(address,
5070 (*p)->stub_template()->alignment()));
5071 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
5075 of->write_output_view(this->offset(), oview_size, oview);
5078 // Update the data size and address alignment of the stub table at the end
5079 // of a relaxation pass. Return true if either the data size or the
5080 // alignment changed in this relaxation pass.
5082 template<bool big_endian>
5084 Stub_table<big_endian>::update_data_size_and_addralign()
5086 // Go over all stubs in table to compute data size and address alignment.
5087 off_t size = this->reloc_stubs_size_;
5088 unsigned addralign = this->reloc_stubs_addralign_;
5090 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5091 p != this->cortex_a8_stubs_.end();
5094 const Stub_template* stub_template = p->second->stub_template();
5095 addralign = std::max(addralign, stub_template->alignment());
5096 size = (align_address(size, stub_template->alignment())
5097 + stub_template->size());
5100 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5101 p != this->arm_v4bx_stubs_.end();
5107 const Stub_template* stub_template = (*p)->stub_template();
5108 addralign = std::max(addralign, stub_template->alignment());
5109 size = (align_address(size, stub_template->alignment())
5110 + stub_template->size());
5113 // Check if either data size or alignment changed in this pass.
5114 // Update prev_data_size_ and prev_addralign_. These will be used
5115 // as the current data size and address alignment for the next pass.
5116 bool changed = size != this->prev_data_size_;
5117 this->prev_data_size_ = size;
5119 if (addralign != this->prev_addralign_)
5121 this->prev_addralign_ = addralign;
5126 // Finalize the stubs. This sets the offsets of the stubs within the stub
5127 // table. It also marks all input sections needing Cortex-A8 workaround.
5129 template<bool big_endian>
5131 Stub_table<big_endian>::finalize_stubs()
5133 off_t off = this->reloc_stubs_size_;
5134 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5135 p != this->cortex_a8_stubs_.end();
5138 Cortex_a8_stub* stub = p->second;
5139 const Stub_template* stub_template = stub->stub_template();
5140 uint64_t stub_addralign = stub_template->alignment();
5141 off = align_address(off, stub_addralign);
5142 stub->set_offset(off);
5143 off += stub_template->size();
5145 // Mark input section so that we can determine later if a code section
5146 // needs the Cortex-A8 workaround quickly.
5147 Arm_relobj<big_endian>* arm_relobj =
5148 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
5149 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
5152 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5153 p != this->arm_v4bx_stubs_.end();
5159 const Stub_template* stub_template = (*p)->stub_template();
5160 uint64_t stub_addralign = stub_template->alignment();
5161 off = align_address(off, stub_addralign);
5162 (*p)->set_offset(off);
5163 off += stub_template->size();
5166 gold_assert(off <= this->prev_data_size_);
5169 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5170 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5171 // of the address range seen by the linker.
5173 template<bool big_endian>
5175 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
5176 Target_arm<big_endian>* arm_target,
5177 unsigned char* view,
5178 Arm_address view_address,
5179 section_size_type view_size)
5181 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5182 for (Cortex_a8_stub_list::const_iterator p =
5183 this->cortex_a8_stubs_.lower_bound(view_address);
5184 ((p != this->cortex_a8_stubs_.end())
5185 && (p->first < (view_address + view_size)));
5188 // We do not store the THUMB bit in the LSB of either the branch address
5189 // or the stub offset. There is no need to strip the LSB.
5190 Arm_address branch_address = p->first;
5191 const Cortex_a8_stub* stub = p->second;
5192 Arm_address stub_address = this->address() + stub->offset();
5194 // Offset of the branch instruction relative to this view.
5195 section_size_type offset =
5196 convert_to_section_size_type(branch_address - view_address);
5197 gold_assert((offset + 4) <= view_size);
5199 arm_target->apply_cortex_a8_workaround(stub, stub_address,
5200 view + offset, branch_address);
5204 // Arm_input_section methods.
5206 // Initialize an Arm_input_section.
5208 template<bool big_endian>
5210 Arm_input_section<big_endian>::init()
5212 Relobj* relobj = this->relobj();
5213 unsigned int shndx = this->shndx();
5215 // We have to cache original size, alignment and contents to avoid locking
5216 // the original file.
5217 this->original_addralign_ =
5218 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx));
5220 // This is not efficient but we expect only a small number of relaxed
5221 // input sections for stubs.
5222 section_size_type section_size;
5223 const unsigned char* section_contents =
5224 relobj->section_contents(shndx, §ion_size, false);
5225 this->original_size_ =
5226 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx));
5228 gold_assert(this->original_contents_ == NULL);
5229 this->original_contents_ = new unsigned char[section_size];
5230 memcpy(this->original_contents_, section_contents, section_size);
5232 // We want to make this look like the original input section after
5233 // output sections are finalized.
5234 Output_section* os = relobj->output_section(shndx);
5235 off_t offset = relobj->output_section_offset(shndx);
5236 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
5237 this->set_address(os->address() + offset);
5238 this->set_file_offset(os->offset() + offset);
5240 this->set_current_data_size(this->original_size_);
5241 this->finalize_data_size();
5244 template<bool big_endian>
5246 Arm_input_section<big_endian>::do_write(Output_file* of)
5248 // We have to write out the original section content.
5249 gold_assert(this->original_contents_ != NULL);
5250 of->write(this->offset(), this->original_contents_,
5251 this->original_size_);
5253 // If this owns a stub table and it is not empty, write it.
5254 if (this->is_stub_table_owner() && !this->stub_table_->empty())
5255 this->stub_table_->write(of);
5258 // Finalize data size.
5260 template<bool big_endian>
5262 Arm_input_section<big_endian>::set_final_data_size()
5264 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5266 if (this->is_stub_table_owner())
5268 this->stub_table_->finalize_data_size();
5269 off = align_address(off, this->stub_table_->addralign());
5270 off += this->stub_table_->data_size();
5272 this->set_data_size(off);
5275 // Reset address and file offset.
5277 template<bool big_endian>
5279 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
5281 // Size of the original input section contents.
5282 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5284 // If this is a stub table owner, account for the stub table size.
5285 if (this->is_stub_table_owner())
5287 Stub_table<big_endian>* stub_table = this->stub_table_;
5289 // Reset the stub table's address and file offset. The
5290 // current data size for child will be updated after that.
5291 stub_table_->reset_address_and_file_offset();
5292 off = align_address(off, stub_table_->addralign());
5293 off += stub_table->current_data_size();
5296 this->set_current_data_size(off);
5299 // Arm_exidx_cantunwind methods.
5301 // Write this to Output file OF for a fixed endianness.
5303 template<bool big_endian>
5305 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
5307 off_t offset = this->offset();
5308 const section_size_type oview_size = 8;
5309 unsigned char* const oview = of->get_output_view(offset, oview_size);
5311 Output_section* os = this->relobj_->output_section(this->shndx_);
5312 gold_assert(os != NULL);
5314 Arm_relobj<big_endian>* arm_relobj =
5315 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
5316 Arm_address output_offset =
5317 arm_relobj->get_output_section_offset(this->shndx_);
5318 Arm_address section_start;
5319 section_size_type section_size;
5321 // Find out the end of the text section referred by this.
5322 if (output_offset != Arm_relobj<big_endian>::invalid_address)
5324 section_start = os->address() + output_offset;
5325 const Arm_exidx_input_section* exidx_input_section =
5326 arm_relobj->exidx_input_section_by_link(this->shndx_);
5327 gold_assert(exidx_input_section != NULL);
5329 convert_to_section_size_type(exidx_input_section->text_size());
5333 // Currently this only happens for a relaxed section.
5334 const Output_relaxed_input_section* poris =
5335 os->find_relaxed_input_section(this->relobj_, this->shndx_);
5336 gold_assert(poris != NULL);
5337 section_start = poris->address();
5338 section_size = convert_to_section_size_type(poris->data_size());
5341 // We always append this to the end of an EXIDX section.
5342 Arm_address output_address = section_start + section_size;
5344 // Write out the entry. The first word either points to the beginning
5345 // or after the end of a text section. The second word is the special
5346 // EXIDX_CANTUNWIND value.
5347 uint32_t prel31_offset = output_address - this->address();
5348 if (Bits<31>::has_overflow32(offset))
5349 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5350 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview,
5351 prel31_offset & 0x7fffffffU);
5352 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4,
5353 elfcpp::EXIDX_CANTUNWIND);
5355 of->write_output_view(this->offset(), oview_size, oview);
5358 // Arm_exidx_merged_section methods.
5360 // Constructor for Arm_exidx_merged_section.
5361 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5362 // SECTION_OFFSET_MAP points to a section offset map describing how
5363 // parts of the input section are mapped to output. DELETED_BYTES is
5364 // the number of bytes deleted from the EXIDX input section.
5366 Arm_exidx_merged_section::Arm_exidx_merged_section(
5367 const Arm_exidx_input_section& exidx_input_section,
5368 const Arm_exidx_section_offset_map& section_offset_map,
5369 uint32_t deleted_bytes)
5370 : Output_relaxed_input_section(exidx_input_section.relobj(),
5371 exidx_input_section.shndx(),
5372 exidx_input_section.addralign()),
5373 exidx_input_section_(exidx_input_section),
5374 section_offset_map_(section_offset_map)
5376 // If we retain or discard the whole EXIDX input section, we would
5378 gold_assert(deleted_bytes != 0
5379 && deleted_bytes != this->exidx_input_section_.size());
5381 // Fix size here so that we do not need to implement set_final_data_size.
5382 uint32_t size = exidx_input_section.size() - deleted_bytes;
5383 this->set_data_size(size);
5384 this->fix_data_size();
5386 // Allocate buffer for section contents and build contents.
5387 this->section_contents_ = new unsigned char[size];
5390 // Build the contents of a merged EXIDX output section.
5393 Arm_exidx_merged_section::build_contents(
5394 const unsigned char* original_contents,
5395 section_size_type original_size)
5397 // Go over spans of input offsets and write only those that are not
5399 section_offset_type in_start = 0;
5400 section_offset_type out_start = 0;
5401 section_offset_type in_max =
5402 convert_types<section_offset_type>(original_size);
5403 section_offset_type out_max =
5404 convert_types<section_offset_type>(this->data_size());
5405 for (Arm_exidx_section_offset_map::const_iterator p =
5406 this->section_offset_map_.begin();
5407 p != this->section_offset_map_.end();
5410 section_offset_type in_end = p->first;
5411 gold_assert(in_end >= in_start);
5412 section_offset_type out_end = p->second;
5413 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5416 size_t out_chunk_size =
5417 convert_types<size_t>(out_end - out_start + 1);
5419 gold_assert(out_chunk_size == in_chunk_size
5420 && in_end < in_max && out_end < out_max);
5422 memcpy(this->section_contents_ + out_start,
5423 original_contents + in_start,
5425 out_start += out_chunk_size;
5427 in_start += in_chunk_size;
5431 // Given an input OBJECT, an input section index SHNDX within that
5432 // object, and an OFFSET relative to the start of that input
5433 // section, return whether or not the corresponding offset within
5434 // the output section is known. If this function returns true, it
5435 // sets *POUTPUT to the output offset. The value -1 indicates that
5436 // this input offset is being discarded.
5439 Arm_exidx_merged_section::do_output_offset(
5440 const Relobj* relobj,
5442 section_offset_type offset,
5443 section_offset_type* poutput) const
5445 // We only handle offsets for the original EXIDX input section.
5446 if (relobj != this->exidx_input_section_.relobj()
5447 || shndx != this->exidx_input_section_.shndx())
5450 section_offset_type section_size =
5451 convert_types<section_offset_type>(this->exidx_input_section_.size());
5452 if (offset < 0 || offset >= section_size)
5453 // Input offset is out of valid range.
5457 // We need to look up the section offset map to determine the output
5458 // offset. Find the reference point in map that is first offset
5459 // bigger than or equal to this offset.
5460 Arm_exidx_section_offset_map::const_iterator p =
5461 this->section_offset_map_.lower_bound(offset);
5463 // The section offset maps are build such that this should not happen if
5464 // input offset is in the valid range.
5465 gold_assert(p != this->section_offset_map_.end());
5467 // We need to check if this is dropped.
5468 section_offset_type ref = p->first;
5469 section_offset_type mapped_ref = p->second;
5471 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
5472 // Offset is present in output.
5473 *poutput = mapped_ref + (offset - ref);
5475 // Offset is discarded owing to EXIDX entry merging.
5482 // Write this to output file OF.
5485 Arm_exidx_merged_section::do_write(Output_file* of)
5487 off_t offset = this->offset();
5488 const section_size_type oview_size = this->data_size();
5489 unsigned char* const oview = of->get_output_view(offset, oview_size);
5491 Output_section* os = this->relobj()->output_section(this->shndx());
5492 gold_assert(os != NULL);
5494 memcpy(oview, this->section_contents_, oview_size);
5495 of->write_output_view(this->offset(), oview_size, oview);
5498 // Arm_exidx_fixup methods.
5500 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5501 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5502 // points to the end of the last seen EXIDX section.
5505 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5507 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5508 && this->last_input_section_ != NULL)
5510 Relobj* relobj = this->last_input_section_->relobj();
5511 unsigned int text_shndx = this->last_input_section_->link();
5512 Arm_exidx_cantunwind* cantunwind =
5513 new Arm_exidx_cantunwind(relobj, text_shndx);
5514 this->exidx_output_section_->add_output_section_data(cantunwind);
5515 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5519 // Process an EXIDX section entry in input. Return whether this entry
5520 // can be deleted in the output. SECOND_WORD in the second word of the
5524 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5527 if (second_word == elfcpp::EXIDX_CANTUNWIND)
5529 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5530 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5531 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5533 else if ((second_word & 0x80000000) != 0)
5535 // Inlined unwinding data. Merge if equal to previous.
5536 delete_entry = (merge_exidx_entries_
5537 && this->last_unwind_type_ == UT_INLINED_ENTRY
5538 && this->last_inlined_entry_ == second_word);
5539 this->last_unwind_type_ = UT_INLINED_ENTRY;
5540 this->last_inlined_entry_ = second_word;
5544 // Normal table entry. In theory we could merge these too,
5545 // but duplicate entries are likely to be much less common.
5546 delete_entry = false;
5547 this->last_unwind_type_ = UT_NORMAL_ENTRY;
5549 return delete_entry;
5552 // Update the current section offset map during EXIDX section fix-up.
5553 // If there is no map, create one. INPUT_OFFSET is the offset of a
5554 // reference point, DELETED_BYTES is the number of deleted by in the
5555 // section so far. If DELETE_ENTRY is true, the reference point and
5556 // all offsets after the previous reference point are discarded.
5559 Arm_exidx_fixup::update_offset_map(
5560 section_offset_type input_offset,
5561 section_size_type deleted_bytes,
5564 if (this->section_offset_map_ == NULL)
5565 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5566 section_offset_type output_offset;
5568 output_offset = Arm_exidx_input_section::invalid_offset;
5570 output_offset = input_offset - deleted_bytes;
5571 (*this->section_offset_map_)[input_offset] = output_offset;
5574 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5575 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5576 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5577 // If some entries are merged, also store a pointer to a newly created
5578 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5579 // owns the map and is responsible for releasing it after use.
5581 template<bool big_endian>
5583 Arm_exidx_fixup::process_exidx_section(
5584 const Arm_exidx_input_section* exidx_input_section,
5585 const unsigned char* section_contents,
5586 section_size_type section_size,
5587 Arm_exidx_section_offset_map** psection_offset_map)
5589 Relobj* relobj = exidx_input_section->relobj();
5590 unsigned shndx = exidx_input_section->shndx();
5592 if ((section_size % 8) != 0)
5594 // Something is wrong with this section. Better not touch it.
5595 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5596 relobj->name().c_str(), shndx);
5597 this->last_input_section_ = exidx_input_section;
5598 this->last_unwind_type_ = UT_NONE;
5602 uint32_t deleted_bytes = 0;
5603 bool prev_delete_entry = false;
5604 gold_assert(this->section_offset_map_ == NULL);
5606 for (section_size_type i = 0; i < section_size; i += 8)
5608 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5610 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5611 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5613 bool delete_entry = this->process_exidx_entry(second_word);
5615 // Entry deletion causes changes in output offsets. We use a std::map
5616 // to record these. And entry (x, y) means input offset x
5617 // is mapped to output offset y. If y is invalid_offset, then x is
5618 // dropped in the output. Because of the way std::map::lower_bound
5619 // works, we record the last offset in a region w.r.t to keeping or
5620 // dropping. If there is no entry (x0, y0) for an input offset x0,
5621 // the output offset y0 of it is determined by the output offset y1 of
5622 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5623 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5625 if (delete_entry != prev_delete_entry && i != 0)
5626 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5628 // Update total deleted bytes for this entry.
5632 prev_delete_entry = delete_entry;
5635 // If section offset map is not NULL, make an entry for the end of
5637 if (this->section_offset_map_ != NULL)
5638 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5640 *psection_offset_map = this->section_offset_map_;
5641 this->section_offset_map_ = NULL;
5642 this->last_input_section_ = exidx_input_section;
5644 // Set the first output text section so that we can link the EXIDX output
5645 // section to it. Ignore any EXIDX input section that is completely merged.
5646 if (this->first_output_text_section_ == NULL
5647 && deleted_bytes != section_size)
5649 unsigned int link = exidx_input_section->link();
5650 Output_section* os = relobj->output_section(link);
5651 gold_assert(os != NULL);
5652 this->first_output_text_section_ = os;
5655 return deleted_bytes;
5658 // Arm_output_section methods.
5660 // Create a stub group for input sections from BEGIN to END. OWNER
5661 // points to the input section to be the owner a new stub table.
5663 template<bool big_endian>
5665 Arm_output_section<big_endian>::create_stub_group(
5666 Input_section_list::const_iterator begin,
5667 Input_section_list::const_iterator end,
5668 Input_section_list::const_iterator owner,
5669 Target_arm<big_endian>* target,
5670 std::vector<Output_relaxed_input_section*>* new_relaxed_sections,
5673 // We use a different kind of relaxed section in an EXIDX section.
5674 // The static casting from Output_relaxed_input_section to
5675 // Arm_input_section is invalid in an EXIDX section. We are okay
5676 // because we should not be calling this for an EXIDX section.
5677 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5679 // Currently we convert ordinary input sections into relaxed sections only
5680 // at this point but we may want to support creating relaxed input section
5681 // very early. So we check here to see if owner is already a relaxed
5684 Arm_input_section<big_endian>* arm_input_section;
5685 if (owner->is_relaxed_input_section())
5688 Arm_input_section<big_endian>::as_arm_input_section(
5689 owner->relaxed_input_section());
5693 gold_assert(owner->is_input_section());
5694 // Create a new relaxed input section. We need to lock the original
5696 Task_lock_obj<Object> tl(task, owner->relobj());
5698 target->new_arm_input_section(owner->relobj(), owner->shndx());
5699 new_relaxed_sections->push_back(arm_input_section);
5702 // Create a stub table.
5703 Stub_table<big_endian>* stub_table =
5704 target->new_stub_table(arm_input_section);
5706 arm_input_section->set_stub_table(stub_table);
5708 Input_section_list::const_iterator p = begin;
5709 Input_section_list::const_iterator prev_p;
5711 // Look for input sections or relaxed input sections in [begin ... end].
5714 if (p->is_input_section() || p->is_relaxed_input_section())
5716 // The stub table information for input sections live
5717 // in their objects.
5718 Arm_relobj<big_endian>* arm_relobj =
5719 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5720 arm_relobj->set_stub_table(p->shndx(), stub_table);
5724 while (prev_p != end);
5727 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5728 // of stub groups. We grow a stub group by adding input section until the
5729 // size is just below GROUP_SIZE. The last input section will be converted
5730 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5731 // input section after the stub table, effectively double the group size.
5733 // This is similar to the group_sections() function in elf32-arm.c but is
5734 // implemented differently.
5736 template<bool big_endian>
5738 Arm_output_section<big_endian>::group_sections(
5739 section_size_type group_size,
5740 bool stubs_always_after_branch,
5741 Target_arm<big_endian>* target,
5744 // States for grouping.
5747 // No group is being built.
5749 // A group is being built but the stub table is not found yet.
5750 // We keep group a stub group until the size is just under GROUP_SIZE.
5751 // The last input section in the group will be used as the stub table.
5752 FINDING_STUB_SECTION,
5753 // A group is being built and we have already found a stub table.
5754 // We enter this state to grow a stub group by adding input section
5755 // after the stub table. This effectively doubles the group size.
5759 // Any newly created relaxed sections are stored here.
5760 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5762 State state = NO_GROUP;
5763 section_size_type off = 0;
5764 section_size_type group_begin_offset = 0;
5765 section_size_type group_end_offset = 0;
5766 section_size_type stub_table_end_offset = 0;
5767 Input_section_list::const_iterator group_begin =
5768 this->input_sections().end();
5769 Input_section_list::const_iterator stub_table =
5770 this->input_sections().end();
5771 Input_section_list::const_iterator group_end = this->input_sections().end();
5772 for (Input_section_list::const_iterator p = this->input_sections().begin();
5773 p != this->input_sections().end();
5776 section_size_type section_begin_offset =
5777 align_address(off, p->addralign());
5778 section_size_type section_end_offset =
5779 section_begin_offset + p->data_size();
5781 // Check to see if we should group the previously seen sections.
5787 case FINDING_STUB_SECTION:
5788 // Adding this section makes the group larger than GROUP_SIZE.
5789 if (section_end_offset - group_begin_offset >= group_size)
5791 if (stubs_always_after_branch)
5793 gold_assert(group_end != this->input_sections().end());
5794 this->create_stub_group(group_begin, group_end, group_end,
5795 target, &new_relaxed_sections,
5801 // But wait, there's more! Input sections up to
5802 // stub_group_size bytes after the stub table can be
5803 // handled by it too.
5804 state = HAS_STUB_SECTION;
5805 stub_table = group_end;
5806 stub_table_end_offset = group_end_offset;
5811 case HAS_STUB_SECTION:
5812 // Adding this section makes the post stub-section group larger
5814 if (section_end_offset - stub_table_end_offset >= group_size)
5816 gold_assert(group_end != this->input_sections().end());
5817 this->create_stub_group(group_begin, group_end, stub_table,
5818 target, &new_relaxed_sections, task);
5827 // If we see an input section and currently there is no group, start
5828 // a new one. Skip any empty sections. We look at the data size
5829 // instead of calling p->relobj()->section_size() to avoid locking.
5830 if ((p->is_input_section() || p->is_relaxed_input_section())
5831 && (p->data_size() != 0))
5833 if (state == NO_GROUP)
5835 state = FINDING_STUB_SECTION;
5837 group_begin_offset = section_begin_offset;
5840 // Keep track of the last input section seen.
5842 group_end_offset = section_end_offset;
5845 off = section_end_offset;
5848 // Create a stub group for any ungrouped sections.
5849 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5851 gold_assert(group_end != this->input_sections().end());
5852 this->create_stub_group(group_begin, group_end,
5853 (state == FINDING_STUB_SECTION
5856 target, &new_relaxed_sections, task);
5859 // Convert input section into relaxed input section in a batch.
5860 if (!new_relaxed_sections.empty())
5861 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5863 // Update the section offsets
5864 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5866 Arm_relobj<big_endian>* arm_relobj =
5867 Arm_relobj<big_endian>::as_arm_relobj(
5868 new_relaxed_sections[i]->relobj());
5869 unsigned int shndx = new_relaxed_sections[i]->shndx();
5870 // Tell Arm_relobj that this input section is converted.
5871 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5875 // Append non empty text sections in this to LIST in ascending
5876 // order of their position in this.
5878 template<bool big_endian>
5880 Arm_output_section<big_endian>::append_text_sections_to_list(
5881 Text_section_list* list)
5883 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5885 for (Input_section_list::const_iterator p = this->input_sections().begin();
5886 p != this->input_sections().end();
5889 // We only care about plain or relaxed input sections. We also
5890 // ignore any merged sections.
5891 if (p->is_input_section() || p->is_relaxed_input_section())
5892 list->push_back(Text_section_list::value_type(p->relobj(),
5897 template<bool big_endian>
5899 Arm_output_section<big_endian>::fix_exidx_coverage(
5901 const Text_section_list& sorted_text_sections,
5902 Symbol_table* symtab,
5903 bool merge_exidx_entries,
5906 // We should only do this for the EXIDX output section.
5907 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5909 // We don't want the relaxation loop to undo these changes, so we discard
5910 // the current saved states and take another one after the fix-up.
5911 this->discard_states();
5913 // Remove all input sections.
5914 uint64_t address = this->address();
5915 typedef std::list<Output_section::Input_section> Input_section_list;
5916 Input_section_list input_sections;
5917 this->reset_address_and_file_offset();
5918 this->get_input_sections(address, std::string(""), &input_sections);
5920 if (!this->input_sections().empty())
5921 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5923 // Go through all the known input sections and record them.
5924 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5925 typedef Unordered_map<Section_id, const Output_section::Input_section*,
5926 Section_id_hash> Text_to_exidx_map;
5927 Text_to_exidx_map text_to_exidx_map;
5928 for (Input_section_list::const_iterator p = input_sections.begin();
5929 p != input_sections.end();
5932 // This should never happen. At this point, we should only see
5933 // plain EXIDX input sections.
5934 gold_assert(!p->is_relaxed_input_section());
5935 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p);
5938 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries);
5940 // Go over the sorted text sections.
5941 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5942 Section_id_set processed_input_sections;
5943 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5944 p != sorted_text_sections.end();
5947 Relobj* relobj = p->first;
5948 unsigned int shndx = p->second;
5950 Arm_relobj<big_endian>* arm_relobj =
5951 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5952 const Arm_exidx_input_section* exidx_input_section =
5953 arm_relobj->exidx_input_section_by_link(shndx);
5955 // If this text section has no EXIDX section or if the EXIDX section
5956 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5957 // of the last seen EXIDX section.
5958 if (exidx_input_section == NULL || exidx_input_section->has_errors())
5960 exidx_fixup.add_exidx_cantunwind_as_needed();
5964 Relobj* exidx_relobj = exidx_input_section->relobj();
5965 unsigned int exidx_shndx = exidx_input_section->shndx();
5966 Section_id sid(exidx_relobj, exidx_shndx);
5967 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid);
5968 if (iter == text_to_exidx_map.end())
5970 // This is odd. We have not seen this EXIDX input section before.
5971 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5972 // issue a warning instead. We assume the user knows what he
5973 // or she is doing. Otherwise, this is an error.
5974 if (layout->script_options()->saw_sections_clause())
5975 gold_warning(_("unwinding may not work because EXIDX input section"
5976 " %u of %s is not in EXIDX output section"),
5977 exidx_shndx, exidx_relobj->name().c_str());
5979 gold_error(_("unwinding may not work because EXIDX input section"
5980 " %u of %s is not in EXIDX output section"),
5981 exidx_shndx, exidx_relobj->name().c_str());
5983 exidx_fixup.add_exidx_cantunwind_as_needed();
5987 // We need to access the contents of the EXIDX section, lock the
5989 Task_lock_obj<Object> tl(task, exidx_relobj);
5990 section_size_type exidx_size;
5991 const unsigned char* exidx_contents =
5992 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false);
5994 // Fix up coverage and append input section to output data list.
5995 Arm_exidx_section_offset_map* section_offset_map = NULL;
5996 uint32_t deleted_bytes =
5997 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
6000 §ion_offset_map);
6002 if (deleted_bytes == exidx_input_section->size())
6004 // The whole EXIDX section got merged. Remove it from output.
6005 gold_assert(section_offset_map == NULL);
6006 exidx_relobj->set_output_section(exidx_shndx, NULL);
6008 // All local symbols defined in this input section will be dropped.
6009 // We need to adjust output local symbol count.
6010 arm_relobj->set_output_local_symbol_count_needs_update();
6012 else if (deleted_bytes > 0)
6014 // Some entries are merged. We need to convert this EXIDX input
6015 // section into a relaxed section.
6016 gold_assert(section_offset_map != NULL);
6018 Arm_exidx_merged_section* merged_section =
6019 new Arm_exidx_merged_section(*exidx_input_section,
6020 *section_offset_map, deleted_bytes);
6021 merged_section->build_contents(exidx_contents, exidx_size);
6023 const std::string secname = exidx_relobj->section_name(exidx_shndx);
6024 this->add_relaxed_input_section(layout, merged_section, secname);
6025 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
6027 // All local symbols defined in discarded portions of this input
6028 // section will be dropped. We need to adjust output local symbol
6030 arm_relobj->set_output_local_symbol_count_needs_update();
6034 // Just add back the EXIDX input section.
6035 gold_assert(section_offset_map == NULL);
6036 const Output_section::Input_section* pis = iter->second;
6037 gold_assert(pis->is_input_section());
6038 this->add_script_input_section(*pis);
6041 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
6044 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6045 exidx_fixup.add_exidx_cantunwind_as_needed();
6047 // Remove any known EXIDX input sections that are not processed.
6048 for (Input_section_list::const_iterator p = input_sections.begin();
6049 p != input_sections.end();
6052 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
6053 == processed_input_sections.end())
6055 // We discard a known EXIDX section because its linked
6056 // text section has been folded by ICF. We also discard an
6057 // EXIDX section with error, the output does not matter in this
6058 // case. We do this to avoid triggering asserts.
6059 Arm_relobj<big_endian>* arm_relobj =
6060 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6061 const Arm_exidx_input_section* exidx_input_section =
6062 arm_relobj->exidx_input_section_by_shndx(p->shndx());
6063 gold_assert(exidx_input_section != NULL);
6064 if (!exidx_input_section->has_errors())
6066 unsigned int text_shndx = exidx_input_section->link();
6067 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
6070 // Remove this from link. We also need to recount the
6072 p->relobj()->set_output_section(p->shndx(), NULL);
6073 arm_relobj->set_output_local_symbol_count_needs_update();
6077 // Link exidx output section to the first seen output section and
6078 // set correct entry size.
6079 this->set_link_section(exidx_fixup.first_output_text_section());
6080 this->set_entsize(8);
6082 // Make changes permanent.
6083 this->save_states();
6084 this->set_section_offsets_need_adjustment();
6087 // Link EXIDX output sections to text output sections.
6089 template<bool big_endian>
6091 Arm_output_section<big_endian>::set_exidx_section_link()
6093 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
6094 if (!this->input_sections().empty())
6096 Input_section_list::const_iterator p = this->input_sections().begin();
6097 Arm_relobj<big_endian>* arm_relobj =
6098 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6099 unsigned exidx_shndx = p->shndx();
6100 const Arm_exidx_input_section* exidx_input_section =
6101 arm_relobj->exidx_input_section_by_shndx(exidx_shndx);
6102 gold_assert(exidx_input_section != NULL);
6103 unsigned int text_shndx = exidx_input_section->link();
6104 Output_section* os = arm_relobj->output_section(text_shndx);
6105 this->set_link_section(os);
6109 // Arm_relobj methods.
6111 // Determine if an input section is scannable for stub processing. SHDR is
6112 // the header of the section and SHNDX is the section index. OS is the output
6113 // section for the input section and SYMTAB is the global symbol table used to
6114 // look up ICF information.
6116 template<bool big_endian>
6118 Arm_relobj<big_endian>::section_is_scannable(
6119 const elfcpp::Shdr<32, big_endian>& shdr,
6121 const Output_section* os,
6122 const Symbol_table* symtab)
6124 // Skip any empty sections, unallocated sections or sections whose
6125 // type are not SHT_PROGBITS.
6126 if (shdr.get_sh_size() == 0
6127 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
6128 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
6131 // Skip any discarded or ICF'ed sections.
6132 if (os == NULL || symtab->is_section_folded(this, shndx))
6135 // If this requires special offset handling, check to see if it is
6136 // a relaxed section. If this is not, then it is a merged section that
6137 // we cannot handle.
6138 if (this->is_output_section_offset_invalid(shndx))
6140 const Output_relaxed_input_section* poris =
6141 os->find_relaxed_input_section(this, shndx);
6149 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6150 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6152 template<bool big_endian>
6154 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
6155 const elfcpp::Shdr<32, big_endian>& shdr,
6156 const Relobj::Output_sections& out_sections,
6157 const Symbol_table* symtab,
6158 const unsigned char* pshdrs)
6160 unsigned int sh_type = shdr.get_sh_type();
6161 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
6164 // Ignore empty section.
6165 off_t sh_size = shdr.get_sh_size();
6169 // Ignore reloc section with unexpected symbol table. The
6170 // error will be reported in the final link.
6171 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
6174 unsigned int reloc_size;
6175 if (sh_type == elfcpp::SHT_REL)
6176 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6178 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6180 // Ignore reloc section with unexpected entsize or uneven size.
6181 // The error will be reported in the final link.
6182 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
6185 // Ignore reloc section with bad info. This error will be
6186 // reported in the final link.
6187 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6188 if (index >= this->shnum())
6191 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6192 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
6193 return this->section_is_scannable(text_shdr, index,
6194 out_sections[index], symtab);
6197 // Return the output address of either a plain input section or a relaxed
6198 // input section. SHNDX is the section index. We define and use this
6199 // instead of calling Output_section::output_address because that is slow
6200 // for large output.
6202 template<bool big_endian>
6204 Arm_relobj<big_endian>::simple_input_section_output_address(
6208 if (this->is_output_section_offset_invalid(shndx))
6210 const Output_relaxed_input_section* poris =
6211 os->find_relaxed_input_section(this, shndx);
6212 // We do not handle merged sections here.
6213 gold_assert(poris != NULL);
6214 return poris->address();
6217 return os->address() + this->get_output_section_offset(shndx);
6220 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6221 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6223 template<bool big_endian>
6225 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
6226 const elfcpp::Shdr<32, big_endian>& shdr,
6229 const Symbol_table* symtab)
6231 if (!this->section_is_scannable(shdr, shndx, os, symtab))
6234 // If the section does not cross any 4K-boundaries, it does not need to
6236 Arm_address address = this->simple_input_section_output_address(shndx, os);
6237 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
6243 // Scan a section for Cortex-A8 workaround.
6245 template<bool big_endian>
6247 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
6248 const elfcpp::Shdr<32, big_endian>& shdr,
6251 Target_arm<big_endian>* arm_target)
6253 // Look for the first mapping symbol in this section. It should be
6255 Mapping_symbol_position section_start(shndx, 0);
6256 typename Mapping_symbols_info::const_iterator p =
6257 this->mapping_symbols_info_.lower_bound(section_start);
6259 // There are no mapping symbols for this section. Treat it as a data-only
6261 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
6264 Arm_address output_address =
6265 this->simple_input_section_output_address(shndx, os);
6267 // Get the section contents.
6268 section_size_type input_view_size = 0;
6269 const unsigned char* input_view =
6270 this->section_contents(shndx, &input_view_size, false);
6272 // We need to go through the mapping symbols to determine what to
6273 // scan. There are two reasons. First, we should look at THUMB code and
6274 // THUMB code only. Second, we only want to look at the 4K-page boundary
6275 // to speed up the scanning.
6277 while (p != this->mapping_symbols_info_.end()
6278 && p->first.first == shndx)
6280 typename Mapping_symbols_info::const_iterator next =
6281 this->mapping_symbols_info_.upper_bound(p->first);
6283 // Only scan part of a section with THUMB code.
6284 if (p->second == 't')
6286 // Determine the end of this range.
6287 section_size_type span_start =
6288 convert_to_section_size_type(p->first.second);
6289 section_size_type span_end;
6290 if (next != this->mapping_symbols_info_.end()
6291 && next->first.first == shndx)
6292 span_end = convert_to_section_size_type(next->first.second);
6294 span_end = convert_to_section_size_type(shdr.get_sh_size());
6296 if (((span_start + output_address) & ~0xfffUL)
6297 != ((span_end + output_address - 1) & ~0xfffUL))
6299 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
6300 span_start, span_end,
6310 // Scan relocations for stub generation.
6312 template<bool big_endian>
6314 Arm_relobj<big_endian>::scan_sections_for_stubs(
6315 Target_arm<big_endian>* arm_target,
6316 const Symbol_table* symtab,
6317 const Layout* layout)
6319 unsigned int shnum = this->shnum();
6320 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6322 // Read the section headers.
6323 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6327 // To speed up processing, we set up hash tables for fast lookup of
6328 // input offsets to output addresses.
6329 this->initialize_input_to_output_maps();
6331 const Relobj::Output_sections& out_sections(this->output_sections());
6333 Relocate_info<32, big_endian> relinfo;
6334 relinfo.symtab = symtab;
6335 relinfo.layout = layout;
6336 relinfo.object = this;
6338 // Do relocation stubs scanning.
6339 const unsigned char* p = pshdrs + shdr_size;
6340 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6342 const elfcpp::Shdr<32, big_endian> shdr(p);
6343 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
6346 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6347 Arm_address output_offset = this->get_output_section_offset(index);
6348 Arm_address output_address;
6349 if (output_offset != invalid_address)
6350 output_address = out_sections[index]->address() + output_offset;
6353 // Currently this only happens for a relaxed section.
6354 const Output_relaxed_input_section* poris =
6355 out_sections[index]->find_relaxed_input_section(this, index);
6356 gold_assert(poris != NULL);
6357 output_address = poris->address();
6360 // Get the relocations.
6361 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
6365 // Get the section contents. This does work for the case in which
6366 // we modify the contents of an input section. We need to pass the
6367 // output view under such circumstances.
6368 section_size_type input_view_size = 0;
6369 const unsigned char* input_view =
6370 this->section_contents(index, &input_view_size, false);
6372 relinfo.reloc_shndx = i;
6373 relinfo.data_shndx = index;
6374 unsigned int sh_type = shdr.get_sh_type();
6375 unsigned int reloc_size;
6376 if (sh_type == elfcpp::SHT_REL)
6377 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6379 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6381 Output_section* os = out_sections[index];
6382 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
6383 shdr.get_sh_size() / reloc_size,
6385 output_offset == invalid_address,
6386 input_view, output_address,
6391 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6392 // after its relocation section, if there is one, is processed for
6393 // relocation stubs. Merging this loop with the one above would have been
6394 // complicated since we would have had to make sure that relocation stub
6395 // scanning is done first.
6396 if (arm_target->fix_cortex_a8())
6398 const unsigned char* p = pshdrs + shdr_size;
6399 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6401 const elfcpp::Shdr<32, big_endian> shdr(p);
6402 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
6405 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
6410 // After we've done the relocations, we release the hash tables,
6411 // since we no longer need them.
6412 this->free_input_to_output_maps();
6415 // Count the local symbols. The ARM backend needs to know if a symbol
6416 // is a THUMB function or not. For global symbols, it is easy because
6417 // the Symbol object keeps the ELF symbol type. For local symbol it is
6418 // harder because we cannot access this information. So we override the
6419 // do_count_local_symbol in parent and scan local symbols to mark
6420 // THUMB functions. This is not the most efficient way but I do not want to
6421 // slow down other ports by calling a per symbol target hook inside
6422 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6424 template<bool big_endian>
6426 Arm_relobj<big_endian>::do_count_local_symbols(
6427 Stringpool_template<char>* pool,
6428 Stringpool_template<char>* dynpool)
6430 // We need to fix-up the values of any local symbols whose type are
6433 // Ask parent to count the local symbols.
6434 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool);
6435 const unsigned int loccount = this->local_symbol_count();
6439 // Initialize the thumb function bit-vector.
6440 std::vector<bool> empty_vector(loccount, false);
6441 this->local_symbol_is_thumb_function_.swap(empty_vector);
6443 // Read the symbol table section header.
6444 const unsigned int symtab_shndx = this->symtab_shndx();
6445 elfcpp::Shdr<32, big_endian>
6446 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6447 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6449 // Read the local symbols.
6450 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6451 gold_assert(loccount == symtabshdr.get_sh_info());
6452 off_t locsize = loccount * sym_size;
6453 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6454 locsize, true, true);
6456 // For mapping symbol processing, we need to read the symbol names.
6457 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
6458 if (strtab_shndx >= this->shnum())
6460 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
6464 elfcpp::Shdr<32, big_endian>
6465 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
6466 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
6468 this->error(_("symbol table name section has wrong type: %u"),
6469 static_cast<unsigned int>(strtabshdr.get_sh_type()));
6472 const char* pnames =
6473 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
6474 strtabshdr.get_sh_size(),
6477 // Loop over the local symbols and mark any local symbols pointing
6478 // to THUMB functions.
6480 // Skip the first dummy symbol.
6482 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values =
6483 this->local_values();
6484 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6486 elfcpp::Sym<32, big_endian> sym(psyms);
6487 elfcpp::STT st_type = sym.get_st_type();
6488 Symbol_value<32>& lv((*plocal_values)[i]);
6489 Arm_address input_value = lv.input_value();
6491 // Check to see if this is a mapping symbol.
6492 const char* sym_name = pnames + sym.get_st_name();
6493 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
6496 unsigned int input_shndx =
6497 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary);
6498 gold_assert(is_ordinary);
6500 // Strip of LSB in case this is a THUMB symbol.
6501 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
6502 this->mapping_symbols_info_[msp] = sym_name[1];
6505 if (st_type == elfcpp::STT_ARM_TFUNC
6506 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
6508 // This is a THUMB function. Mark this and canonicalize the
6509 // symbol value by setting LSB.
6510 this->local_symbol_is_thumb_function_[i] = true;
6511 if ((input_value & 1) == 0)
6512 lv.set_input_value(input_value | 1);
6517 // Relocate sections.
6518 template<bool big_endian>
6520 Arm_relobj<big_endian>::do_relocate_sections(
6521 const Symbol_table* symtab,
6522 const Layout* layout,
6523 const unsigned char* pshdrs,
6525 typename Sized_relobj_file<32, big_endian>::Views* pviews)
6527 // Call parent to relocate sections.
6528 Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout,
6529 pshdrs, of, pviews);
6531 // We do not generate stubs if doing a relocatable link.
6532 if (parameters->options().relocatable())
6535 // Relocate stub tables.
6536 unsigned int shnum = this->shnum();
6538 Target_arm<big_endian>* arm_target =
6539 Target_arm<big_endian>::default_target();
6541 Relocate_info<32, big_endian> relinfo;
6542 relinfo.symtab = symtab;
6543 relinfo.layout = layout;
6544 relinfo.object = this;
6546 for (unsigned int i = 1; i < shnum; ++i)
6548 Arm_input_section<big_endian>* arm_input_section =
6549 arm_target->find_arm_input_section(this, i);
6551 if (arm_input_section != NULL
6552 && arm_input_section->is_stub_table_owner()
6553 && !arm_input_section->stub_table()->empty())
6555 // We cannot discard a section if it owns a stub table.
6556 Output_section* os = this->output_section(i);
6557 gold_assert(os != NULL);
6559 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
6560 relinfo.reloc_shdr = NULL;
6561 relinfo.data_shndx = i;
6562 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
6564 gold_assert((*pviews)[i].view != NULL);
6566 // We are passed the output section view. Adjust it to cover the
6568 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6569 gold_assert((stub_table->address() >= (*pviews)[i].address)
6570 && ((stub_table->address() + stub_table->data_size())
6571 <= (*pviews)[i].address + (*pviews)[i].view_size));
6573 off_t offset = stub_table->address() - (*pviews)[i].address;
6574 unsigned char* view = (*pviews)[i].view + offset;
6575 Arm_address address = stub_table->address();
6576 section_size_type view_size = stub_table->data_size();
6578 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6582 // Apply Cortex A8 workaround if applicable.
6583 if (this->section_has_cortex_a8_workaround(i))
6585 unsigned char* view = (*pviews)[i].view;
6586 Arm_address view_address = (*pviews)[i].address;
6587 section_size_type view_size = (*pviews)[i].view_size;
6588 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6590 // Adjust view to cover section.
6591 Output_section* os = this->output_section(i);
6592 gold_assert(os != NULL);
6593 Arm_address section_address =
6594 this->simple_input_section_output_address(i, os);
6595 uint64_t section_size = this->section_size(i);
6597 gold_assert(section_address >= view_address
6598 && ((section_address + section_size)
6599 <= (view_address + view_size)));
6601 unsigned char* section_view = view + (section_address - view_address);
6603 // Apply the Cortex-A8 workaround to the output address range
6604 // corresponding to this input section.
6605 stub_table->apply_cortex_a8_workaround_to_address_range(
6614 // Find the linked text section of an EXIDX section by looking at the first
6615 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6616 // must be linked to its associated code section via the sh_link field of
6617 // its section header. However, some tools are broken and the link is not
6618 // always set. LD just drops such an EXIDX section silently, causing the
6619 // associated code not unwindabled. Here we try a little bit harder to
6620 // discover the linked code section.
6622 // PSHDR points to the section header of a relocation section of an EXIDX
6623 // section. If we can find a linked text section, return true and
6624 // store the text section index in the location PSHNDX. Otherwise
6627 template<bool big_endian>
6629 Arm_relobj<big_endian>::find_linked_text_section(
6630 const unsigned char* pshdr,
6631 const unsigned char* psyms,
6632 unsigned int* pshndx)
6634 elfcpp::Shdr<32, big_endian> shdr(pshdr);
6636 // If there is no relocation, we cannot find the linked text section.
6638 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6639 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6641 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6642 size_t reloc_count = shdr.get_sh_size() / reloc_size;
6644 // Get the relocations.
6645 const unsigned char* prelocs =
6646 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6648 // Find the REL31 relocation for the first word of the first EXIDX entry.
6649 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6651 Arm_address r_offset;
6652 typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6653 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6655 typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6656 r_info = reloc.get_r_info();
6657 r_offset = reloc.get_r_offset();
6661 typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6662 r_info = reloc.get_r_info();
6663 r_offset = reloc.get_r_offset();
6666 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6667 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6670 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6672 || r_sym >= this->local_symbol_count()
6676 // This is the relocation for the first word of the first EXIDX entry.
6677 // We expect to see a local section symbol.
6678 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6679 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6680 if (sym.get_st_type() == elfcpp::STT_SECTION)
6684 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary);
6685 gold_assert(is_ordinary);
6695 // Make an EXIDX input section object for an EXIDX section whose index is
6696 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6697 // is the section index of the linked text section.
6699 template<bool big_endian>
6701 Arm_relobj<big_endian>::make_exidx_input_section(
6703 const elfcpp::Shdr<32, big_endian>& shdr,
6704 unsigned int text_shndx,
6705 const elfcpp::Shdr<32, big_endian>& text_shdr)
6707 // Create an Arm_exidx_input_section object for this EXIDX section.
6708 Arm_exidx_input_section* exidx_input_section =
6709 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6710 shdr.get_sh_addralign(),
6711 text_shdr.get_sh_size());
6713 gold_assert(this->exidx_section_map_[shndx] == NULL);
6714 this->exidx_section_map_[shndx] = exidx_input_section;
6716 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum())
6718 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6719 this->section_name(shndx).c_str(), shndx, text_shndx,
6720 this->name().c_str());
6721 exidx_input_section->set_has_errors();
6723 else if (this->exidx_section_map_[text_shndx] != NULL)
6725 unsigned other_exidx_shndx =
6726 this->exidx_section_map_[text_shndx]->shndx();
6727 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6729 this->section_name(shndx).c_str(), shndx,
6730 this->section_name(other_exidx_shndx).c_str(),
6731 other_exidx_shndx, this->section_name(text_shndx).c_str(),
6732 text_shndx, this->name().c_str());
6733 exidx_input_section->set_has_errors();
6736 this->exidx_section_map_[text_shndx] = exidx_input_section;
6738 // Check section flags of text section.
6739 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0)
6741 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6743 this->section_name(shndx).c_str(), shndx,
6744 this->section_name(text_shndx).c_str(), text_shndx,
6745 this->name().c_str());
6746 exidx_input_section->set_has_errors();
6748 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0)
6749 // I would like to make this an error but currently ld just ignores
6751 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6753 this->section_name(shndx).c_str(), shndx,
6754 this->section_name(text_shndx).c_str(), text_shndx,
6755 this->name().c_str());
6758 // Read the symbol information.
6760 template<bool big_endian>
6762 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6764 // Call parent class to read symbol information.
6765 this->base_read_symbols(sd);
6767 // If this input file is a binary file, it has no processor
6768 // specific flags and attributes section.
6769 Input_file::Format format = this->input_file()->format();
6770 if (format != Input_file::FORMAT_ELF)
6772 gold_assert(format == Input_file::FORMAT_BINARY);
6773 this->merge_flags_and_attributes_ = false;
6777 // Read processor-specific flags in ELF file header.
6778 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6779 elfcpp::Elf_sizes<32>::ehdr_size,
6781 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6782 this->processor_specific_flags_ = ehdr.get_e_flags();
6784 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6786 std::vector<unsigned int> deferred_exidx_sections;
6787 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6788 const unsigned char* pshdrs = sd->section_headers->data();
6789 const unsigned char* ps = pshdrs + shdr_size;
6790 bool must_merge_flags_and_attributes = false;
6791 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6793 elfcpp::Shdr<32, big_endian> shdr(ps);
6795 // Sometimes an object has no contents except the section name string
6796 // table and an empty symbol table with the undefined symbol. We
6797 // don't want to merge processor-specific flags from such an object.
6798 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB)
6800 // Symbol table is not empty.
6801 const elfcpp::Elf_types<32>::Elf_WXword sym_size =
6802 elfcpp::Elf_sizes<32>::sym_size;
6803 if (shdr.get_sh_size() > sym_size)
6804 must_merge_flags_and_attributes = true;
6806 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB)
6807 // If this is neither an empty symbol table nor a string table,
6809 must_merge_flags_and_attributes = true;
6811 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6813 gold_assert(this->attributes_section_data_ == NULL);
6814 section_offset_type section_offset = shdr.get_sh_offset();
6815 section_size_type section_size =
6816 convert_to_section_size_type(shdr.get_sh_size());
6817 const unsigned char* view =
6818 this->get_view(section_offset, section_size, true, false);
6819 this->attributes_section_data_ =
6820 new Attributes_section_data(view, section_size);
6822 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6824 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6825 if (text_shndx == elfcpp::SHN_UNDEF)
6826 deferred_exidx_sections.push_back(i);
6829 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6830 + text_shndx * shdr_size);
6831 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr);
6833 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6834 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0)
6835 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6836 this->section_name(i).c_str(), this->name().c_str());
6841 if (!must_merge_flags_and_attributes)
6843 gold_assert(deferred_exidx_sections.empty());
6844 this->merge_flags_and_attributes_ = false;
6848 // Some tools are broken and they do not set the link of EXIDX sections.
6849 // We look at the first relocation to figure out the linked sections.
6850 if (!deferred_exidx_sections.empty())
6852 // We need to go over the section headers again to find the mapping
6853 // from sections being relocated to their relocation sections. This is
6854 // a bit inefficient as we could do that in the loop above. However,
6855 // we do not expect any deferred EXIDX sections normally. So we do not
6856 // want to slow down the most common path.
6857 typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
6858 Reloc_map reloc_map;
6859 ps = pshdrs + shdr_size;
6860 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6862 elfcpp::Shdr<32, big_endian> shdr(ps);
6863 elfcpp::Elf_Word sh_type = shdr.get_sh_type();
6864 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
6866 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
6867 if (info_shndx >= this->shnum())
6868 gold_error(_("relocation section %u has invalid info %u"),
6870 Reloc_map::value_type value(info_shndx, i);
6871 std::pair<Reloc_map::iterator, bool> result =
6872 reloc_map.insert(value);
6874 gold_error(_("section %u has multiple relocation sections "
6876 info_shndx, i, reloc_map[info_shndx]);
6880 // Read the symbol table section header.
6881 const unsigned int symtab_shndx = this->symtab_shndx();
6882 elfcpp::Shdr<32, big_endian>
6883 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6884 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6886 // Read the local symbols.
6887 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6888 const unsigned int loccount = this->local_symbol_count();
6889 gold_assert(loccount == symtabshdr.get_sh_info());
6890 off_t locsize = loccount * sym_size;
6891 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6892 locsize, true, true);
6894 // Process the deferred EXIDX sections.
6895 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
6897 unsigned int shndx = deferred_exidx_sections[i];
6898 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
6899 unsigned int text_shndx = elfcpp::SHN_UNDEF;
6900 Reloc_map::const_iterator it = reloc_map.find(shndx);
6901 if (it != reloc_map.end())
6902 find_linked_text_section(pshdrs + it->second * shdr_size,
6903 psyms, &text_shndx);
6904 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6905 + text_shndx * shdr_size);
6906 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr);
6911 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6912 // sections for unwinding. These sections are referenced implicitly by
6913 // text sections linked in the section headers. If we ignore these implicit
6914 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6915 // will be garbage-collected incorrectly. Hence we override the same function
6916 // in the base class to handle these implicit references.
6918 template<bool big_endian>
6920 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6922 Read_relocs_data* rd)
6924 // First, call base class method to process relocations in this object.
6925 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6927 // If --gc-sections is not specified, there is nothing more to do.
6928 // This happens when --icf is used but --gc-sections is not.
6929 if (!parameters->options().gc_sections())
6932 unsigned int shnum = this->shnum();
6933 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6934 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6938 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6939 // to these from the linked text sections.
6940 const unsigned char* ps = pshdrs + shdr_size;
6941 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6943 elfcpp::Shdr<32, big_endian> shdr(ps);
6944 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6946 // Found an .ARM.exidx section, add it to the set of reachable
6947 // sections from its linked text section.
6948 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6949 symtab->gc()->add_reference(this, text_shndx, this, i);
6954 // Update output local symbol count. Owing to EXIDX entry merging, some local
6955 // symbols will be removed in output. Adjust output local symbol count
6956 // accordingly. We can only changed the static output local symbol count. It
6957 // is too late to change the dynamic symbols.
6959 template<bool big_endian>
6961 Arm_relobj<big_endian>::update_output_local_symbol_count()
6963 // Caller should check that this needs updating. We want caller checking
6964 // because output_local_symbol_count_needs_update() is most likely inlined.
6965 gold_assert(this->output_local_symbol_count_needs_update_);
6967 gold_assert(this->symtab_shndx() != -1U);
6968 if (this->symtab_shndx() == 0)
6970 // This object has no symbols. Weird but legal.
6974 // Read the symbol table section header.
6975 const unsigned int symtab_shndx = this->symtab_shndx();
6976 elfcpp::Shdr<32, big_endian>
6977 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6978 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6980 // Read the local symbols.
6981 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6982 const unsigned int loccount = this->local_symbol_count();
6983 gold_assert(loccount == symtabshdr.get_sh_info());
6984 off_t locsize = loccount * sym_size;
6985 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6986 locsize, true, true);
6988 // Loop over the local symbols.
6990 typedef typename Sized_relobj_file<32, big_endian>::Output_sections
6992 const Output_sections& out_sections(this->output_sections());
6993 unsigned int shnum = this->shnum();
6994 unsigned int count = 0;
6995 // Skip the first, dummy, symbol.
6997 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6999 elfcpp::Sym<32, big_endian> sym(psyms);
7001 Symbol_value<32>& lv((*this->local_values())[i]);
7003 // This local symbol was already discarded by do_count_local_symbols.
7004 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry())
7008 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
7013 Output_section* os = out_sections[shndx];
7015 // This local symbol no longer has an output section. Discard it.
7018 lv.set_no_output_symtab_entry();
7022 // Currently we only discard parts of EXIDX input sections.
7023 // We explicitly check for a merged EXIDX input section to avoid
7024 // calling Output_section_data::output_offset unless necessary.
7025 if ((this->get_output_section_offset(shndx) == invalid_address)
7026 && (this->exidx_input_section_by_shndx(shndx) != NULL))
7028 section_offset_type output_offset =
7029 os->output_offset(this, shndx, lv.input_value());
7030 if (output_offset == -1)
7032 // This symbol is defined in a part of an EXIDX input section
7033 // that is discarded due to entry merging.
7034 lv.set_no_output_symtab_entry();
7043 this->set_output_local_symbol_count(count);
7044 this->output_local_symbol_count_needs_update_ = false;
7047 // Arm_dynobj methods.
7049 // Read the symbol information.
7051 template<bool big_endian>
7053 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
7055 // Call parent class to read symbol information.
7056 this->base_read_symbols(sd);
7058 // Read processor-specific flags in ELF file header.
7059 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
7060 elfcpp::Elf_sizes<32>::ehdr_size,
7062 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
7063 this->processor_specific_flags_ = ehdr.get_e_flags();
7065 // Read the attributes section if there is one.
7066 // We read from the end because gas seems to put it near the end of
7067 // the section headers.
7068 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
7069 const unsigned char* ps =
7070 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
7071 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
7073 elfcpp::Shdr<32, big_endian> shdr(ps);
7074 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
7076 section_offset_type section_offset = shdr.get_sh_offset();
7077 section_size_type section_size =
7078 convert_to_section_size_type(shdr.get_sh_size());
7079 const unsigned char* view =
7080 this->get_view(section_offset, section_size, true, false);
7081 this->attributes_section_data_ =
7082 new Attributes_section_data(view, section_size);
7088 // Stub_addend_reader methods.
7090 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7092 template<bool big_endian>
7093 elfcpp::Elf_types<32>::Elf_Swxword
7094 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
7095 unsigned int r_type,
7096 const unsigned char* view,
7097 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
7099 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
7103 case elfcpp::R_ARM_CALL:
7104 case elfcpp::R_ARM_JUMP24:
7105 case elfcpp::R_ARM_PLT32:
7107 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7108 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7109 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
7110 return Bits<26>::sign_extend32(val << 2);
7113 case elfcpp::R_ARM_THM_CALL:
7114 case elfcpp::R_ARM_THM_JUMP24:
7115 case elfcpp::R_ARM_THM_XPC22:
7117 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7118 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7119 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7120 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7121 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
7124 case elfcpp::R_ARM_THM_JUMP19:
7126 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7127 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7128 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7129 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7130 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
7138 // Arm_output_data_got methods.
7140 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7141 // The first one is initialized to be 1, which is the module index for
7142 // the main executable and the second one 0. A reloc of the type
7143 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7144 // be applied by gold. GSYM is a global symbol.
7146 template<bool big_endian>
7148 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7149 unsigned int got_type,
7152 if (gsym->has_got_offset(got_type))
7155 // We are doing a static link. Just mark it as belong to module 1,
7157 unsigned int got_offset = this->add_constant(1);
7158 gsym->set_got_offset(got_type, got_offset);
7159 got_offset = this->add_constant(0);
7160 this->static_relocs_.push_back(Static_reloc(got_offset,
7161 elfcpp::R_ARM_TLS_DTPOFF32,
7165 // Same as the above but for a local symbol.
7167 template<bool big_endian>
7169 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7170 unsigned int got_type,
7171 Sized_relobj_file<32, big_endian>* object,
7174 if (object->local_has_got_offset(index, got_type))
7177 // We are doing a static link. Just mark it as belong to module 1,
7179 unsigned int got_offset = this->add_constant(1);
7180 object->set_local_got_offset(index, got_type, got_offset);
7181 got_offset = this->add_constant(0);
7182 this->static_relocs_.push_back(Static_reloc(got_offset,
7183 elfcpp::R_ARM_TLS_DTPOFF32,
7187 template<bool big_endian>
7189 Arm_output_data_got<big_endian>::do_write(Output_file* of)
7191 // Call parent to write out GOT.
7192 Output_data_got<32, big_endian>::do_write(of);
7194 // We are done if there is no fix up.
7195 if (this->static_relocs_.empty())
7198 gold_assert(parameters->doing_static_link());
7200 const off_t offset = this->offset();
7201 const section_size_type oview_size =
7202 convert_to_section_size_type(this->data_size());
7203 unsigned char* const oview = of->get_output_view(offset, oview_size);
7205 Output_segment* tls_segment = this->layout_->tls_segment();
7206 gold_assert(tls_segment != NULL);
7208 // The thread pointer $tp points to the TCB, which is followed by the
7209 // TLS. So we need to adjust $tp relative addressing by this amount.
7210 Arm_address aligned_tcb_size =
7211 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
7213 for (size_t i = 0; i < this->static_relocs_.size(); ++i)
7215 Static_reloc& reloc(this->static_relocs_[i]);
7218 if (!reloc.symbol_is_global())
7220 Sized_relobj_file<32, big_endian>* object = reloc.relobj();
7221 const Symbol_value<32>* psymval =
7222 reloc.relobj()->local_symbol(reloc.index());
7224 // We are doing static linking. Issue an error and skip this
7225 // relocation if the symbol is undefined or in a discarded_section.
7227 unsigned int shndx = psymval->input_shndx(&is_ordinary);
7228 if ((shndx == elfcpp::SHN_UNDEF)
7230 && shndx != elfcpp::SHN_UNDEF
7231 && !object->is_section_included(shndx)
7232 && !this->symbol_table_->is_section_folded(object, shndx)))
7234 gold_error(_("undefined or discarded local symbol %u from "
7235 " object %s in GOT"),
7236 reloc.index(), reloc.relobj()->name().c_str());
7240 value = psymval->value(object, 0);
7244 const Symbol* gsym = reloc.symbol();
7245 gold_assert(gsym != NULL);
7246 if (gsym->is_forwarder())
7247 gsym = this->symbol_table_->resolve_forwards(gsym);
7249 // We are doing static linking. Issue an error and skip this
7250 // relocation if the symbol is undefined or in a discarded_section
7251 // unless it is a weakly_undefined symbol.
7252 if ((gsym->is_defined_in_discarded_section()
7253 || gsym->is_undefined())
7254 && !gsym->is_weak_undefined())
7256 gold_error(_("undefined or discarded symbol %s in GOT"),
7261 if (!gsym->is_weak_undefined())
7263 const Sized_symbol<32>* sym =
7264 static_cast<const Sized_symbol<32>*>(gsym);
7265 value = sym->value();
7271 unsigned got_offset = reloc.got_offset();
7272 gold_assert(got_offset < oview_size);
7274 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7275 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset);
7277 switch (reloc.r_type())
7279 case elfcpp::R_ARM_TLS_DTPOFF32:
7282 case elfcpp::R_ARM_TLS_TPOFF32:
7283 x = value + aligned_tcb_size;
7288 elfcpp::Swap<32, big_endian>::writeval(wv, x);
7291 of->write_output_view(offset, oview_size, oview);
7294 // A class to handle the PLT data.
7295 // This is an abstract base class that handles most of the linker details
7296 // but does not know the actual contents of PLT entries. The derived
7297 // classes below fill in those details.
7299 template<bool big_endian>
7300 class Output_data_plt_arm : public Output_section_data
7303 // Unlike aarch64, which records symbol value in "addend" field of relocations
7304 // and could be done at the same time an IRelative reloc is created for the
7305 // symbol, arm puts the symbol value into "GOT" table, which, however, is
7306 // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7307 // to keep necessary symbol information for later use in do_write. We usually
7308 // have only a very limited number of ifuncs, so the extra data required here
7311 struct IRelative_data
7313 IRelative_data(Sized_symbol<32>* sized_symbol)
7314 : symbol_is_global_(true)
7316 u_.global = sized_symbol;
7319 IRelative_data(Sized_relobj_file<32, big_endian>* relobj,
7321 : symbol_is_global_(false)
7323 u_.local.relobj = relobj;
7324 u_.local.index = index;
7329 Sized_symbol<32>* global;
7333 Sized_relobj_file<32, big_endian>* relobj;
7338 bool symbol_is_global_;
7341 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
7344 Output_data_plt_arm(Layout* layout, uint64_t addralign,
7345 Arm_output_data_got<big_endian>* got,
7346 Output_data_space* got_plt,
7347 Output_data_space* got_irelative);
7349 // Add an entry to the PLT.
7351 add_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym);
7353 // Add the relocation for a plt entry.
7355 add_relocation(Symbol_table* symtab, Layout* layout,
7356 Symbol* gsym, unsigned int got_offset);
7358 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7360 add_local_ifunc_entry(Symbol_table* symtab, Layout*,
7361 Sized_relobj_file<32, big_endian>* relobj,
7362 unsigned int local_sym_index);
7364 // Return the .rel.plt section data.
7365 const Reloc_section*
7367 { return this->rel_; }
7369 // Return the PLT relocation container for IRELATIVE.
7371 rel_irelative(Symbol_table*, Layout*);
7373 // Return the number of PLT entries.
7376 { return this->count_ + this->irelative_count_; }
7378 // Return the offset of the first non-reserved PLT entry.
7380 first_plt_entry_offset() const
7381 { return this->do_first_plt_entry_offset(); }
7383 // Return the size of a PLT entry.
7385 get_plt_entry_size() const
7386 { return this->do_get_plt_entry_size(); }
7388 // Return the PLT address for globals.
7390 address_for_global(const Symbol*) const;
7392 // Return the PLT address for locals.
7394 address_for_local(const Relobj*, unsigned int symndx) const;
7397 // Fill in the first PLT entry.
7399 fill_first_plt_entry(unsigned char* pov,
7400 Arm_address got_address,
7401 Arm_address plt_address)
7402 { this->do_fill_first_plt_entry(pov, got_address, plt_address); }
7405 fill_plt_entry(unsigned char* pov,
7406 Arm_address got_address,
7407 Arm_address plt_address,
7408 unsigned int got_offset,
7409 unsigned int plt_offset)
7410 { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); }
7412 virtual unsigned int
7413 do_first_plt_entry_offset() const = 0;
7415 virtual unsigned int
7416 do_get_plt_entry_size() const = 0;
7419 do_fill_first_plt_entry(unsigned char* pov,
7420 Arm_address got_address,
7421 Arm_address plt_address) = 0;
7424 do_fill_plt_entry(unsigned char* pov,
7425 Arm_address got_address,
7426 Arm_address plt_address,
7427 unsigned int got_offset,
7428 unsigned int plt_offset) = 0;
7431 do_adjust_output_section(Output_section* os);
7433 // Write to a map file.
7435 do_print_to_mapfile(Mapfile* mapfile) const
7436 { mapfile->print_output_data(this, _("** PLT")); }
7439 // Set the final size.
7441 set_final_data_size()
7443 this->set_data_size(this->first_plt_entry_offset()
7444 + ((this->count_ + this->irelative_count_)
7445 * this->get_plt_entry_size()));
7448 // Write out the PLT data.
7450 do_write(Output_file*);
7452 // Record irelative symbol data.
7453 void insert_irelative_data(const IRelative_data& idata)
7454 { irelative_data_vec_.push_back(idata); }
7456 // The reloc section.
7457 Reloc_section* rel_;
7458 // The IRELATIVE relocs, if necessary. These must follow the
7459 // regular PLT relocations.
7460 Reloc_section* irelative_rel_;
7461 // The .got section.
7462 Arm_output_data_got<big_endian>* got_;
7463 // The .got.plt section.
7464 Output_data_space* got_plt_;
7465 // The part of the .got.plt section used for IRELATIVE relocs.
7466 Output_data_space* got_irelative_;
7467 // The number of PLT entries.
7468 unsigned int count_;
7469 // Number of PLT entries with R_ARM_IRELATIVE relocs. These
7470 // follow the regular PLT entries.
7471 unsigned int irelative_count_;
7472 // Vector for irelative data.
7473 typedef std::vector<IRelative_data> IRelative_data_vec;
7474 IRelative_data_vec irelative_data_vec_;
7477 // Create the PLT section. The ordinary .got section is an argument,
7478 // since we need to refer to the start. We also create our own .got
7479 // section just for PLT entries.
7481 template<bool big_endian>
7482 Output_data_plt_arm<big_endian>::Output_data_plt_arm(
7483 Layout* layout, uint64_t addralign,
7484 Arm_output_data_got<big_endian>* got,
7485 Output_data_space* got_plt,
7486 Output_data_space* got_irelative)
7487 : Output_section_data(addralign), irelative_rel_(NULL),
7488 got_(got), got_plt_(got_plt), got_irelative_(got_irelative),
7489 count_(0), irelative_count_(0)
7491 this->rel_ = new Reloc_section(false);
7492 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
7493 elfcpp::SHF_ALLOC, this->rel_,
7494 ORDER_DYNAMIC_PLT_RELOCS, false);
7497 template<bool big_endian>
7499 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
7504 // Add an entry to the PLT.
7506 template<bool big_endian>
7508 Output_data_plt_arm<big_endian>::add_entry(Symbol_table* symtab,
7512 gold_assert(!gsym->has_plt_offset());
7514 unsigned int* entry_count;
7515 Output_section_data_build* got;
7517 // We have 2 different types of plt entry here, normal and ifunc.
7519 // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7520 // 1st entry offset would be 20, the second 32, third 44 ... etc.
7522 // For ifunc plt, the offset begins with 0. So the first offset would 0,
7523 // second 12, third 24 ... etc.
7525 // IFunc plt entries *always* come after *normal* plt entries.
7527 // Notice, when computing the plt address of a certain symbol, "plt_address +
7528 // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7529 // target->plt_address_for_local() instead.
7531 int begin_offset = 0;
7532 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7533 && gsym->can_use_relative_reloc(false))
7535 entry_count = &this->irelative_count_;
7536 got = this->got_irelative_;
7537 // For irelative plt entries, offset is relative to the end of normal plt
7538 // entries, so it starts from 0.
7540 // Record symbol information.
7541 this->insert_irelative_data(
7542 IRelative_data(symtab->get_sized_symbol<32>(gsym)));
7546 entry_count = &this->count_;
7547 got = this->got_plt_;
7548 // Note that for normal plt entries, when setting the PLT offset we skip
7549 // the initial reserved PLT entry.
7550 begin_offset = this->first_plt_entry_offset();
7553 gsym->set_plt_offset(begin_offset
7554 + (*entry_count) * this->get_plt_entry_size());
7558 section_offset_type got_offset = got->current_data_size();
7560 // Every PLT entry needs a GOT entry which points back to the PLT
7561 // entry (this will be changed by the dynamic linker, normally
7562 // lazily when the function is called).
7563 got->set_current_data_size(got_offset + 4);
7565 // Every PLT entry needs a reloc.
7566 this->add_relocation(symtab, layout, gsym, got_offset);
7568 // Note that we don't need to save the symbol. The contents of the
7569 // PLT are independent of which symbols are used. The symbols only
7570 // appear in the relocations.
7573 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return
7576 template<bool big_endian>
7578 Output_data_plt_arm<big_endian>::add_local_ifunc_entry(
7579 Symbol_table* symtab,
7581 Sized_relobj_file<32, big_endian>* relobj,
7582 unsigned int local_sym_index)
7584 this->insert_irelative_data(IRelative_data(relobj, local_sym_index));
7586 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7587 // no longer correct. Use target->plt_address_for_local() instead.
7588 unsigned int plt_offset = this->irelative_count_ * this->get_plt_entry_size();
7589 ++this->irelative_count_;
7591 section_offset_type got_offset = this->got_irelative_->current_data_size();
7593 // Every PLT entry needs a GOT entry which points back to the PLT
7595 this->got_irelative_->set_current_data_size(got_offset + 4);
7598 // Every PLT entry needs a reloc.
7599 Reloc_section* rel = this->rel_irelative(symtab, layout);
7600 rel->add_symbolless_local_addend(relobj, local_sym_index,
7601 elfcpp::R_ARM_IRELATIVE,
7602 this->got_irelative_, got_offset);
7607 // Add the relocation for a PLT entry.
7609 template<bool big_endian>
7611 Output_data_plt_arm<big_endian>::add_relocation(
7612 Symbol_table* symtab, Layout* layout, Symbol* gsym, unsigned int got_offset)
7614 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7615 && gsym->can_use_relative_reloc(false))
7617 Reloc_section* rel = this->rel_irelative(symtab, layout);
7618 rel->add_symbolless_global_addend(gsym, elfcpp::R_ARM_IRELATIVE,
7619 this->got_irelative_, got_offset);
7623 gsym->set_needs_dynsym_entry();
7624 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
7630 // Create the irelative relocation data.
7632 template<bool big_endian>
7633 typename Output_data_plt_arm<big_endian>::Reloc_section*
7634 Output_data_plt_arm<big_endian>::rel_irelative(Symbol_table* symtab,
7637 if (this->irelative_rel_ == NULL)
7639 // Since irelative relocations goes into 'rel.dyn', we delegate the
7640 // creation of irelative_rel_ to where rel_dyn section gets created.
7641 Target_arm<big_endian>* arm_target =
7642 Target_arm<big_endian>::default_target();
7643 this->irelative_rel_ = arm_target->rel_irelative_section(layout);
7645 // Make sure we have a place for the TLSDESC relocations, in
7646 // case we see any later on.
7647 // this->rel_tlsdesc(layout);
7648 if (parameters->doing_static_link())
7650 // A statically linked executable will only have a .rel.plt section to
7651 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library
7652 // will use these symbols to locate the IRELATIVE relocs at program
7654 symtab->define_in_output_data("__rel_iplt_start", NULL,
7655 Symbol_table::PREDEFINED,
7656 this->irelative_rel_, 0, 0,
7657 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7658 elfcpp::STV_HIDDEN, 0, false, true);
7659 symtab->define_in_output_data("__rel_iplt_end", NULL,
7660 Symbol_table::PREDEFINED,
7661 this->irelative_rel_, 0, 0,
7662 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7663 elfcpp::STV_HIDDEN, 0, true, true);
7666 return this->irelative_rel_;
7670 // Return the PLT address for a global symbol.
7672 template<bool big_endian>
7674 Output_data_plt_arm<big_endian>::address_for_global(const Symbol* gsym) const
7676 uint64_t begin_offset = 0;
7677 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7678 && gsym->can_use_relative_reloc(false))
7680 begin_offset = (this->first_plt_entry_offset() +
7681 this->count_ * this->get_plt_entry_size());
7683 return this->address() + begin_offset + gsym->plt_offset();
7687 // Return the PLT address for a local symbol. These are always
7688 // IRELATIVE relocs.
7690 template<bool big_endian>
7692 Output_data_plt_arm<big_endian>::address_for_local(
7693 const Relobj* object,
7694 unsigned int r_sym) const
7696 return (this->address()
7697 + this->first_plt_entry_offset()
7698 + this->count_ * this->get_plt_entry_size()
7699 + object->local_plt_offset(r_sym));
7703 template<bool big_endian>
7704 class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian>
7707 Output_data_plt_arm_standard(Layout* layout,
7708 Arm_output_data_got<big_endian>* got,
7709 Output_data_space* got_plt,
7710 Output_data_space* got_irelative)
7711 : Output_data_plt_arm<big_endian>(layout, 4, got, got_plt, got_irelative)
7715 // Return the offset of the first non-reserved PLT entry.
7716 virtual unsigned int
7717 do_first_plt_entry_offset() const
7718 { return sizeof(first_plt_entry); }
7720 // Return the size of a PLT entry.
7721 virtual unsigned int
7722 do_get_plt_entry_size() const
7723 { return sizeof(plt_entry); }
7726 do_fill_first_plt_entry(unsigned char* pov,
7727 Arm_address got_address,
7728 Arm_address plt_address);
7731 do_fill_plt_entry(unsigned char* pov,
7732 Arm_address got_address,
7733 Arm_address plt_address,
7734 unsigned int got_offset,
7735 unsigned int plt_offset);
7738 // Template for the first PLT entry.
7739 static const uint32_t first_plt_entry[5];
7741 // Template for subsequent PLT entries.
7742 static const uint32_t plt_entry[3];
7746 // FIXME: This is not very flexible. Right now this has only been tested
7747 // on armv5te. If we are to support additional architecture features like
7748 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7750 // The first entry in the PLT.
7751 template<bool big_endian>
7752 const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] =
7754 0xe52de004, // str lr, [sp, #-4]!
7755 0xe59fe004, // ldr lr, [pc, #4]
7756 0xe08fe00e, // add lr, pc, lr
7757 0xe5bef008, // ldr pc, [lr, #8]!
7758 0x00000000, // &GOT[0] - .
7761 template<bool big_endian>
7763 Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
7765 Arm_address got_address,
7766 Arm_address plt_address)
7768 // Write first PLT entry. All but the last word are constants.
7769 const size_t num_first_plt_words = (sizeof(first_plt_entry)
7770 / sizeof(plt_entry[0]));
7771 for (size_t i = 0; i < num_first_plt_words - 1; i++)
7772 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
7773 // Last word in first PLT entry is &GOT[0] - .
7774 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
7775 got_address - (plt_address + 16));
7778 // Subsequent entries in the PLT.
7780 template<bool big_endian>
7781 const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] =
7783 0xe28fc600, // add ip, pc, #0xNN00000
7784 0xe28cca00, // add ip, ip, #0xNN000
7785 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7788 template<bool big_endian>
7790 Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
7792 Arm_address got_address,
7793 Arm_address plt_address,
7794 unsigned int got_offset,
7795 unsigned int plt_offset)
7797 int32_t offset = ((got_address + got_offset)
7798 - (plt_address + plt_offset + 8));
7800 gold_assert(offset >= 0 && offset < 0x0fffffff);
7801 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
7802 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
7803 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
7804 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
7805 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
7806 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
7809 // Write out the PLT. This uses the hand-coded instructions above,
7810 // and adjusts them as needed. This is all specified by the arm ELF
7811 // Processor Supplement.
7813 template<bool big_endian>
7815 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
7817 const off_t offset = this->offset();
7818 const section_size_type oview_size =
7819 convert_to_section_size_type(this->data_size());
7820 unsigned char* const oview = of->get_output_view(offset, oview_size);
7822 const off_t got_file_offset = this->got_plt_->offset();
7823 gold_assert(got_file_offset + this->got_plt_->data_size()
7824 == this->got_irelative_->offset());
7825 const section_size_type got_size =
7826 convert_to_section_size_type(this->got_plt_->data_size()
7827 + this->got_irelative_->data_size());
7828 unsigned char* const got_view = of->get_output_view(got_file_offset,
7830 unsigned char* pov = oview;
7832 Arm_address plt_address = this->address();
7833 Arm_address got_address = this->got_plt_->address();
7835 // Write first PLT entry.
7836 this->fill_first_plt_entry(pov, got_address, plt_address);
7837 pov += this->first_plt_entry_offset();
7839 unsigned char* got_pov = got_view;
7841 memset(got_pov, 0, 12);
7844 unsigned int plt_offset = this->first_plt_entry_offset();
7845 unsigned int got_offset = 12;
7846 const unsigned int count = this->count_ + this->irelative_count_;
7847 gold_assert(this->irelative_count_ == this->irelative_data_vec_.size());
7848 for (unsigned int i = 0;
7851 pov += this->get_plt_entry_size(),
7853 plt_offset += this->get_plt_entry_size(),
7856 // Set and adjust the PLT entry itself.
7857 this->fill_plt_entry(pov, got_address, plt_address,
7858 got_offset, plt_offset);
7861 if (i < this->count_)
7863 // For non-irelative got entries, the value is the beginning of plt.
7864 value = plt_address;
7868 // For irelative got entries, the value is the (global/local) symbol
7870 const IRelative_data& idata =
7871 this->irelative_data_vec_[i - this->count_];
7872 if (idata.symbol_is_global_)
7874 // Set the entry in the GOT for irelative symbols. The content is
7875 // the address of the ifunc, not the address of plt start.
7876 const Sized_symbol<32>* sized_symbol = idata.u_.global;
7877 gold_assert(sized_symbol->type() == elfcpp::STT_GNU_IFUNC);
7878 value = sized_symbol->value();
7882 value = idata.u_.local.relobj->local_symbol_value(
7883 idata.u_.local.index, 0);
7886 elfcpp::Swap<32, big_endian>::writeval(got_pov, value);
7889 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
7890 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
7892 of->write_output_view(offset, oview_size, oview);
7893 of->write_output_view(got_file_offset, got_size, got_view);
7897 // Create a PLT entry for a global symbol.
7899 template<bool big_endian>
7901 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
7904 if (gsym->has_plt_offset())
7907 if (this->plt_ == NULL)
7908 this->make_plt_section(symtab, layout);
7910 this->plt_->add_entry(symtab, layout, gsym);
7914 // Create the PLT section.
7915 template<bool big_endian>
7917 Target_arm<big_endian>::make_plt_section(
7918 Symbol_table* symtab, Layout* layout)
7920 if (this->plt_ == NULL)
7922 // Create the GOT section first.
7923 this->got_section(symtab, layout);
7925 // GOT for irelatives is create along with got.plt.
7926 gold_assert(this->got_ != NULL
7927 && this->got_plt_ != NULL
7928 && this->got_irelative_ != NULL);
7929 this->plt_ = this->make_data_plt(layout, this->got_, this->got_plt_,
7930 this->got_irelative_);
7932 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
7934 | elfcpp::SHF_EXECINSTR),
7935 this->plt_, ORDER_PLT, false);
7936 symtab->define_in_output_data("$a", NULL,
7937 Symbol_table::PREDEFINED,
7939 0, 0, elfcpp::STT_NOTYPE,
7941 elfcpp::STV_DEFAULT, 0,
7947 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
7949 template<bool big_endian>
7951 Target_arm<big_endian>::make_local_ifunc_plt_entry(
7952 Symbol_table* symtab, Layout* layout,
7953 Sized_relobj_file<32, big_endian>* relobj,
7954 unsigned int local_sym_index)
7956 if (relobj->local_has_plt_offset(local_sym_index))
7958 if (this->plt_ == NULL)
7959 this->make_plt_section(symtab, layout);
7960 unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout,
7963 relobj->set_local_plt_offset(local_sym_index, plt_offset);
7967 // Return the number of entries in the PLT.
7969 template<bool big_endian>
7971 Target_arm<big_endian>::plt_entry_count() const
7973 if (this->plt_ == NULL)
7975 return this->plt_->entry_count();
7978 // Return the offset of the first non-reserved PLT entry.
7980 template<bool big_endian>
7982 Target_arm<big_endian>::first_plt_entry_offset() const
7984 return this->plt_->first_plt_entry_offset();
7987 // Return the size of each PLT entry.
7989 template<bool big_endian>
7991 Target_arm<big_endian>::plt_entry_size() const
7993 return this->plt_->get_plt_entry_size();
7996 // Get the section to use for TLS_DESC relocations.
7998 template<bool big_endian>
7999 typename Target_arm<big_endian>::Reloc_section*
8000 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const
8002 return this->plt_section()->rel_tls_desc(layout);
8005 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8007 template<bool big_endian>
8009 Target_arm<big_endian>::define_tls_base_symbol(
8010 Symbol_table* symtab,
8013 if (this->tls_base_symbol_defined_)
8016 Output_segment* tls_segment = layout->tls_segment();
8017 if (tls_segment != NULL)
8019 bool is_exec = parameters->options().output_is_executable();
8020 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL,
8021 Symbol_table::PREDEFINED,
8025 elfcpp::STV_HIDDEN, 0,
8027 ? Symbol::SEGMENT_END
8028 : Symbol::SEGMENT_START),
8031 this->tls_base_symbol_defined_ = true;
8034 // Create a GOT entry for the TLS module index.
8036 template<bool big_endian>
8038 Target_arm<big_endian>::got_mod_index_entry(
8039 Symbol_table* symtab,
8041 Sized_relobj_file<32, big_endian>* object)
8043 if (this->got_mod_index_offset_ == -1U)
8045 gold_assert(symtab != NULL && layout != NULL && object != NULL);
8046 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout);
8047 unsigned int got_offset;
8048 if (!parameters->doing_static_link())
8050 got_offset = got->add_constant(0);
8051 Reloc_section* rel_dyn = this->rel_dyn_section(layout);
8052 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got,
8057 // We are doing a static link. Just mark it as belong to module 1,
8059 got_offset = got->add_constant(1);
8062 got->add_constant(0);
8063 this->got_mod_index_offset_ = got_offset;
8065 return this->got_mod_index_offset_;
8068 // Optimize the TLS relocation type based on what we know about the
8069 // symbol. IS_FINAL is true if the final address of this symbol is
8070 // known at link time.
8072 template<bool big_endian>
8073 tls::Tls_optimization
8074 Target_arm<big_endian>::optimize_tls_reloc(bool, int)
8076 // FIXME: Currently we do not do any TLS optimization.
8077 return tls::TLSOPT_NONE;
8080 // Get the Reference_flags for a particular relocation.
8082 template<bool big_endian>
8084 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type)
8088 case elfcpp::R_ARM_NONE:
8089 case elfcpp::R_ARM_V4BX:
8090 case elfcpp::R_ARM_GNU_VTENTRY:
8091 case elfcpp::R_ARM_GNU_VTINHERIT:
8092 // No symbol reference.
8095 case elfcpp::R_ARM_ABS32:
8096 case elfcpp::R_ARM_ABS16:
8097 case elfcpp::R_ARM_ABS12:
8098 case elfcpp::R_ARM_THM_ABS5:
8099 case elfcpp::R_ARM_ABS8:
8100 case elfcpp::R_ARM_BASE_ABS:
8101 case elfcpp::R_ARM_MOVW_ABS_NC:
8102 case elfcpp::R_ARM_MOVT_ABS:
8103 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8104 case elfcpp::R_ARM_THM_MOVT_ABS:
8105 case elfcpp::R_ARM_ABS32_NOI:
8106 return Symbol::ABSOLUTE_REF;
8108 case elfcpp::R_ARM_REL32:
8109 case elfcpp::R_ARM_LDR_PC_G0:
8110 case elfcpp::R_ARM_SBREL32:
8111 case elfcpp::R_ARM_THM_PC8:
8112 case elfcpp::R_ARM_BASE_PREL:
8113 case elfcpp::R_ARM_MOVW_PREL_NC:
8114 case elfcpp::R_ARM_MOVT_PREL:
8115 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8116 case elfcpp::R_ARM_THM_MOVT_PREL:
8117 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8118 case elfcpp::R_ARM_THM_PC12:
8119 case elfcpp::R_ARM_REL32_NOI:
8120 case elfcpp::R_ARM_ALU_PC_G0_NC:
8121 case elfcpp::R_ARM_ALU_PC_G0:
8122 case elfcpp::R_ARM_ALU_PC_G1_NC:
8123 case elfcpp::R_ARM_ALU_PC_G1:
8124 case elfcpp::R_ARM_ALU_PC_G2:
8125 case elfcpp::R_ARM_LDR_PC_G1:
8126 case elfcpp::R_ARM_LDR_PC_G2:
8127 case elfcpp::R_ARM_LDRS_PC_G0:
8128 case elfcpp::R_ARM_LDRS_PC_G1:
8129 case elfcpp::R_ARM_LDRS_PC_G2:
8130 case elfcpp::R_ARM_LDC_PC_G0:
8131 case elfcpp::R_ARM_LDC_PC_G1:
8132 case elfcpp::R_ARM_LDC_PC_G2:
8133 case elfcpp::R_ARM_ALU_SB_G0_NC:
8134 case elfcpp::R_ARM_ALU_SB_G0:
8135 case elfcpp::R_ARM_ALU_SB_G1_NC:
8136 case elfcpp::R_ARM_ALU_SB_G1:
8137 case elfcpp::R_ARM_ALU_SB_G2:
8138 case elfcpp::R_ARM_LDR_SB_G0:
8139 case elfcpp::R_ARM_LDR_SB_G1:
8140 case elfcpp::R_ARM_LDR_SB_G2:
8141 case elfcpp::R_ARM_LDRS_SB_G0:
8142 case elfcpp::R_ARM_LDRS_SB_G1:
8143 case elfcpp::R_ARM_LDRS_SB_G2:
8144 case elfcpp::R_ARM_LDC_SB_G0:
8145 case elfcpp::R_ARM_LDC_SB_G1:
8146 case elfcpp::R_ARM_LDC_SB_G2:
8147 case elfcpp::R_ARM_MOVW_BREL_NC:
8148 case elfcpp::R_ARM_MOVT_BREL:
8149 case elfcpp::R_ARM_MOVW_BREL:
8150 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8151 case elfcpp::R_ARM_THM_MOVT_BREL:
8152 case elfcpp::R_ARM_THM_MOVW_BREL:
8153 case elfcpp::R_ARM_GOTOFF32:
8154 case elfcpp::R_ARM_GOTOFF12:
8155 case elfcpp::R_ARM_SBREL31:
8156 return Symbol::RELATIVE_REF;
8158 case elfcpp::R_ARM_PLT32:
8159 case elfcpp::R_ARM_CALL:
8160 case elfcpp::R_ARM_JUMP24:
8161 case elfcpp::R_ARM_THM_CALL:
8162 case elfcpp::R_ARM_THM_JUMP24:
8163 case elfcpp::R_ARM_THM_JUMP19:
8164 case elfcpp::R_ARM_THM_JUMP6:
8165 case elfcpp::R_ARM_THM_JUMP11:
8166 case elfcpp::R_ARM_THM_JUMP8:
8167 // R_ARM_PREL31 is not used to relocate call/jump instructions but
8168 // in unwind tables. It may point to functions via PLTs.
8169 // So we treat it like call/jump relocations above.
8170 case elfcpp::R_ARM_PREL31:
8171 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
8173 case elfcpp::R_ARM_GOT_BREL:
8174 case elfcpp::R_ARM_GOT_ABS:
8175 case elfcpp::R_ARM_GOT_PREL:
8177 return Symbol::ABSOLUTE_REF;
8179 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8180 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8181 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8182 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8183 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8184 return Symbol::TLS_REF;
8186 case elfcpp::R_ARM_TARGET1:
8187 case elfcpp::R_ARM_TARGET2:
8188 case elfcpp::R_ARM_COPY:
8189 case elfcpp::R_ARM_GLOB_DAT:
8190 case elfcpp::R_ARM_JUMP_SLOT:
8191 case elfcpp::R_ARM_RELATIVE:
8192 case elfcpp::R_ARM_PC24:
8193 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8194 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8195 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8197 // Not expected. We will give an error later.
8202 // Report an unsupported relocation against a local symbol.
8204 template<bool big_endian>
8206 Target_arm<big_endian>::Scan::unsupported_reloc_local(
8207 Sized_relobj_file<32, big_endian>* object,
8208 unsigned int r_type)
8210 gold_error(_("%s: unsupported reloc %u against local symbol"),
8211 object->name().c_str(), r_type);
8214 // We are about to emit a dynamic relocation of type R_TYPE. If the
8215 // dynamic linker does not support it, issue an error. The GNU linker
8216 // only issues a non-PIC error for an allocated read-only section.
8217 // Here we know the section is allocated, but we don't know that it is
8218 // read-only. But we check for all the relocation types which the
8219 // glibc dynamic linker supports, so it seems appropriate to issue an
8220 // error even if the section is not read-only.
8222 template<bool big_endian>
8224 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
8225 unsigned int r_type)
8229 // These are the relocation types supported by glibc for ARM.
8230 case elfcpp::R_ARM_RELATIVE:
8231 case elfcpp::R_ARM_COPY:
8232 case elfcpp::R_ARM_GLOB_DAT:
8233 case elfcpp::R_ARM_JUMP_SLOT:
8234 case elfcpp::R_ARM_ABS32:
8235 case elfcpp::R_ARM_ABS32_NOI:
8236 case elfcpp::R_ARM_IRELATIVE:
8237 case elfcpp::R_ARM_PC24:
8238 // FIXME: The following 3 types are not supported by Android's dynamic
8240 case elfcpp::R_ARM_TLS_DTPMOD32:
8241 case elfcpp::R_ARM_TLS_DTPOFF32:
8242 case elfcpp::R_ARM_TLS_TPOFF32:
8247 // This prevents us from issuing more than one error per reloc
8248 // section. But we can still wind up issuing more than one
8249 // error per object file.
8250 if (this->issued_non_pic_error_)
8252 const Arm_reloc_property* reloc_property =
8253 arm_reloc_property_table->get_reloc_property(r_type);
8254 gold_assert(reloc_property != NULL);
8255 object->error(_("requires unsupported dynamic reloc %s; "
8256 "recompile with -fPIC"),
8257 reloc_property->name().c_str());
8258 this->issued_non_pic_error_ = true;
8262 case elfcpp::R_ARM_NONE:
8268 // Return whether we need to make a PLT entry for a relocation of the
8269 // given type against a STT_GNU_IFUNC symbol.
8271 template<bool big_endian>
8273 Target_arm<big_endian>::Scan::reloc_needs_plt_for_ifunc(
8274 Sized_relobj_file<32, big_endian>* object,
8275 unsigned int r_type)
8277 int flags = Scan::get_reference_flags(r_type);
8278 if (flags & Symbol::TLS_REF)
8280 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8281 object->name().c_str(), r_type);
8288 // Scan a relocation for a local symbol.
8289 // FIXME: This only handles a subset of relocation types used by Android
8290 // on ARM v5te devices.
8292 template<bool big_endian>
8294 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
8297 Sized_relobj_file<32, big_endian>* object,
8298 unsigned int data_shndx,
8299 Output_section* output_section,
8300 const elfcpp::Rel<32, big_endian>& reloc,
8301 unsigned int r_type,
8302 const elfcpp::Sym<32, big_endian>& lsym,
8308 r_type = get_real_reloc_type(r_type);
8310 // A local STT_GNU_IFUNC symbol may require a PLT entry.
8311 bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC;
8312 if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type))
8314 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8315 target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym);
8320 case elfcpp::R_ARM_NONE:
8321 case elfcpp::R_ARM_V4BX:
8322 case elfcpp::R_ARM_GNU_VTENTRY:
8323 case elfcpp::R_ARM_GNU_VTINHERIT:
8326 case elfcpp::R_ARM_ABS32:
8327 case elfcpp::R_ARM_ABS32_NOI:
8328 // If building a shared library (or a position-independent
8329 // executable), we need to create a dynamic relocation for
8330 // this location. The relocation applied at link time will
8331 // apply the link-time value, so we flag the location with
8332 // an R_ARM_RELATIVE relocation so the dynamic loader can
8333 // relocate it easily.
8334 if (parameters->options().output_is_position_independent())
8336 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8337 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8338 // If we are to add more other reloc types than R_ARM_ABS32,
8339 // we need to add check_non_pic(object, r_type) here.
8340 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
8341 output_section, data_shndx,
8342 reloc.get_r_offset(), is_ifunc);
8346 case elfcpp::R_ARM_ABS16:
8347 case elfcpp::R_ARM_ABS12:
8348 case elfcpp::R_ARM_THM_ABS5:
8349 case elfcpp::R_ARM_ABS8:
8350 case elfcpp::R_ARM_BASE_ABS:
8351 case elfcpp::R_ARM_MOVW_ABS_NC:
8352 case elfcpp::R_ARM_MOVT_ABS:
8353 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8354 case elfcpp::R_ARM_THM_MOVT_ABS:
8355 // If building a shared library (or a position-independent
8356 // executable), we need to create a dynamic relocation for
8357 // this location. Because the addend needs to remain in the
8358 // data section, we need to be careful not to apply this
8359 // relocation statically.
8360 if (parameters->options().output_is_position_independent())
8362 check_non_pic(object, r_type);
8363 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8364 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8365 if (lsym.get_st_type() != elfcpp::STT_SECTION)
8366 rel_dyn->add_local(object, r_sym, r_type, output_section,
8367 data_shndx, reloc.get_r_offset());
8370 gold_assert(lsym.get_st_value() == 0);
8371 unsigned int shndx = lsym.get_st_shndx();
8373 shndx = object->adjust_sym_shndx(r_sym, shndx,
8376 object->error(_("section symbol %u has bad shndx %u"),
8379 rel_dyn->add_local_section(object, shndx,
8380 r_type, output_section,
8381 data_shndx, reloc.get_r_offset());
8386 case elfcpp::R_ARM_REL32:
8387 case elfcpp::R_ARM_LDR_PC_G0:
8388 case elfcpp::R_ARM_SBREL32:
8389 case elfcpp::R_ARM_THM_CALL:
8390 case elfcpp::R_ARM_THM_PC8:
8391 case elfcpp::R_ARM_BASE_PREL:
8392 case elfcpp::R_ARM_PLT32:
8393 case elfcpp::R_ARM_CALL:
8394 case elfcpp::R_ARM_JUMP24:
8395 case elfcpp::R_ARM_THM_JUMP24:
8396 case elfcpp::R_ARM_SBREL31:
8397 case elfcpp::R_ARM_PREL31:
8398 case elfcpp::R_ARM_MOVW_PREL_NC:
8399 case elfcpp::R_ARM_MOVT_PREL:
8400 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8401 case elfcpp::R_ARM_THM_MOVT_PREL:
8402 case elfcpp::R_ARM_THM_JUMP19:
8403 case elfcpp::R_ARM_THM_JUMP6:
8404 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8405 case elfcpp::R_ARM_THM_PC12:
8406 case elfcpp::R_ARM_REL32_NOI:
8407 case elfcpp::R_ARM_ALU_PC_G0_NC:
8408 case elfcpp::R_ARM_ALU_PC_G0:
8409 case elfcpp::R_ARM_ALU_PC_G1_NC:
8410 case elfcpp::R_ARM_ALU_PC_G1:
8411 case elfcpp::R_ARM_ALU_PC_G2:
8412 case elfcpp::R_ARM_LDR_PC_G1:
8413 case elfcpp::R_ARM_LDR_PC_G2:
8414 case elfcpp::R_ARM_LDRS_PC_G0:
8415 case elfcpp::R_ARM_LDRS_PC_G1:
8416 case elfcpp::R_ARM_LDRS_PC_G2:
8417 case elfcpp::R_ARM_LDC_PC_G0:
8418 case elfcpp::R_ARM_LDC_PC_G1:
8419 case elfcpp::R_ARM_LDC_PC_G2:
8420 case elfcpp::R_ARM_ALU_SB_G0_NC:
8421 case elfcpp::R_ARM_ALU_SB_G0:
8422 case elfcpp::R_ARM_ALU_SB_G1_NC:
8423 case elfcpp::R_ARM_ALU_SB_G1:
8424 case elfcpp::R_ARM_ALU_SB_G2:
8425 case elfcpp::R_ARM_LDR_SB_G0:
8426 case elfcpp::R_ARM_LDR_SB_G1:
8427 case elfcpp::R_ARM_LDR_SB_G2:
8428 case elfcpp::R_ARM_LDRS_SB_G0:
8429 case elfcpp::R_ARM_LDRS_SB_G1:
8430 case elfcpp::R_ARM_LDRS_SB_G2:
8431 case elfcpp::R_ARM_LDC_SB_G0:
8432 case elfcpp::R_ARM_LDC_SB_G1:
8433 case elfcpp::R_ARM_LDC_SB_G2:
8434 case elfcpp::R_ARM_MOVW_BREL_NC:
8435 case elfcpp::R_ARM_MOVT_BREL:
8436 case elfcpp::R_ARM_MOVW_BREL:
8437 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8438 case elfcpp::R_ARM_THM_MOVT_BREL:
8439 case elfcpp::R_ARM_THM_MOVW_BREL:
8440 case elfcpp::R_ARM_THM_JUMP11:
8441 case elfcpp::R_ARM_THM_JUMP8:
8442 // We don't need to do anything for a relative addressing relocation
8443 // against a local symbol if it does not reference the GOT.
8446 case elfcpp::R_ARM_GOTOFF32:
8447 case elfcpp::R_ARM_GOTOFF12:
8448 // We need a GOT section:
8449 target->got_section(symtab, layout);
8452 case elfcpp::R_ARM_GOT_BREL:
8453 case elfcpp::R_ARM_GOT_PREL:
8455 // The symbol requires a GOT entry.
8456 Arm_output_data_got<big_endian>* got =
8457 target->got_section(symtab, layout);
8458 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8459 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
8461 // If we are generating a shared object, we need to add a
8462 // dynamic RELATIVE relocation for this symbol's GOT entry.
8463 if (parameters->options().output_is_position_independent())
8465 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8466 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8467 rel_dyn->add_local_relative(
8468 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
8469 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
8475 case elfcpp::R_ARM_TARGET1:
8476 case elfcpp::R_ARM_TARGET2:
8477 // This should have been mapped to another type already.
8479 case elfcpp::R_ARM_COPY:
8480 case elfcpp::R_ARM_GLOB_DAT:
8481 case elfcpp::R_ARM_JUMP_SLOT:
8482 case elfcpp::R_ARM_RELATIVE:
8483 // These are relocations which should only be seen by the
8484 // dynamic linker, and should never be seen here.
8485 gold_error(_("%s: unexpected reloc %u in object file"),
8486 object->name().c_str(), r_type);
8490 // These are initial TLS relocs, which are expected when
8492 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8493 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8494 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8495 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8496 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8498 bool output_is_shared = parameters->options().shared();
8499 const tls::Tls_optimization optimized_type
8500 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared,
8504 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8505 if (optimized_type == tls::TLSOPT_NONE)
8507 // Create a pair of GOT entries for the module index and
8508 // dtv-relative offset.
8509 Arm_output_data_got<big_endian>* got
8510 = target->got_section(symtab, layout);
8511 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8512 unsigned int shndx = lsym.get_st_shndx();
8514 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
8517 object->error(_("local symbol %u has bad shndx %u"),
8522 if (!parameters->doing_static_link())
8523 got->add_local_pair_with_rel(object, r_sym, shndx,
8525 target->rel_dyn_section(layout),
8526 elfcpp::R_ARM_TLS_DTPMOD32);
8528 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR,
8532 // FIXME: TLS optimization not supported yet.
8536 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8537 if (optimized_type == tls::TLSOPT_NONE)
8539 // Create a GOT entry for the module index.
8540 target->got_mod_index_entry(symtab, layout, object);
8543 // FIXME: TLS optimization not supported yet.
8547 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8550 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8551 layout->set_has_static_tls();
8552 if (optimized_type == tls::TLSOPT_NONE)
8554 // Create a GOT entry for the tp-relative offset.
8555 Arm_output_data_got<big_endian>* got
8556 = target->got_section(symtab, layout);
8557 unsigned int r_sym =
8558 elfcpp::elf_r_sym<32>(reloc.get_r_info());
8559 if (!parameters->doing_static_link())
8560 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET,
8561 target->rel_dyn_section(layout),
8562 elfcpp::R_ARM_TLS_TPOFF32);
8563 else if (!object->local_has_got_offset(r_sym,
8564 GOT_TYPE_TLS_OFFSET))
8566 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET);
8567 unsigned int got_offset =
8568 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET);
8569 got->add_static_reloc(got_offset,
8570 elfcpp::R_ARM_TLS_TPOFF32, object,
8575 // FIXME: TLS optimization not supported yet.
8579 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8580 layout->set_has_static_tls();
8581 if (output_is_shared)
8583 // We need to create a dynamic relocation.
8584 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION);
8585 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8586 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8587 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32,
8588 output_section, data_shndx,
8589 reloc.get_r_offset());
8599 case elfcpp::R_ARM_PC24:
8600 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8601 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8602 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8604 unsupported_reloc_local(object, r_type);
8609 // Report an unsupported relocation against a global symbol.
8611 template<bool big_endian>
8613 Target_arm<big_endian>::Scan::unsupported_reloc_global(
8614 Sized_relobj_file<32, big_endian>* object,
8615 unsigned int r_type,
8618 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8619 object->name().c_str(), r_type, gsym->demangled_name().c_str());
8622 template<bool big_endian>
8624 Target_arm<big_endian>::Scan::possible_function_pointer_reloc(
8625 unsigned int r_type)
8629 case elfcpp::R_ARM_PC24:
8630 case elfcpp::R_ARM_THM_CALL:
8631 case elfcpp::R_ARM_PLT32:
8632 case elfcpp::R_ARM_CALL:
8633 case elfcpp::R_ARM_JUMP24:
8634 case elfcpp::R_ARM_THM_JUMP24:
8635 case elfcpp::R_ARM_SBREL31:
8636 case elfcpp::R_ARM_PREL31:
8637 case elfcpp::R_ARM_THM_JUMP19:
8638 case elfcpp::R_ARM_THM_JUMP6:
8639 case elfcpp::R_ARM_THM_JUMP11:
8640 case elfcpp::R_ARM_THM_JUMP8:
8641 // All the relocations above are branches except SBREL31 and PREL31.
8645 // Be conservative and assume this is a function pointer.
8650 template<bool big_endian>
8652 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer(
8655 Target_arm<big_endian>* target,
8656 Sized_relobj_file<32, big_endian>*,
8659 const elfcpp::Rel<32, big_endian>&,
8660 unsigned int r_type,
8661 const elfcpp::Sym<32, big_endian>&)
8663 r_type = target->get_real_reloc_type(r_type);
8664 return possible_function_pointer_reloc(r_type);
8667 template<bool big_endian>
8669 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer(
8672 Target_arm<big_endian>* target,
8673 Sized_relobj_file<32, big_endian>*,
8676 const elfcpp::Rel<32, big_endian>&,
8677 unsigned int r_type,
8680 // GOT is not a function.
8681 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8684 r_type = target->get_real_reloc_type(r_type);
8685 return possible_function_pointer_reloc(r_type);
8688 // Scan a relocation for a global symbol.
8690 template<bool big_endian>
8692 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
8695 Sized_relobj_file<32, big_endian>* object,
8696 unsigned int data_shndx,
8697 Output_section* output_section,
8698 const elfcpp::Rel<32, big_endian>& reloc,
8699 unsigned int r_type,
8702 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8703 // section. We check here to avoid creating a dynamic reloc against
8704 // _GLOBAL_OFFSET_TABLE_.
8705 if (!target->has_got_section()
8706 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8707 target->got_section(symtab, layout);
8709 // A STT_GNU_IFUNC symbol may require a PLT entry.
8710 if (gsym->type() == elfcpp::STT_GNU_IFUNC
8711 && this->reloc_needs_plt_for_ifunc(object, r_type))
8712 target->make_plt_entry(symtab, layout, gsym);
8714 r_type = get_real_reloc_type(r_type);
8717 case elfcpp::R_ARM_NONE:
8718 case elfcpp::R_ARM_V4BX:
8719 case elfcpp::R_ARM_GNU_VTENTRY:
8720 case elfcpp::R_ARM_GNU_VTINHERIT:
8723 case elfcpp::R_ARM_ABS32:
8724 case elfcpp::R_ARM_ABS16:
8725 case elfcpp::R_ARM_ABS12:
8726 case elfcpp::R_ARM_THM_ABS5:
8727 case elfcpp::R_ARM_ABS8:
8728 case elfcpp::R_ARM_BASE_ABS:
8729 case elfcpp::R_ARM_MOVW_ABS_NC:
8730 case elfcpp::R_ARM_MOVT_ABS:
8731 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8732 case elfcpp::R_ARM_THM_MOVT_ABS:
8733 case elfcpp::R_ARM_ABS32_NOI:
8734 // Absolute addressing relocations.
8736 // Make a PLT entry if necessary.
8737 if (this->symbol_needs_plt_entry(gsym))
8739 target->make_plt_entry(symtab, layout, gsym);
8740 // Since this is not a PC-relative relocation, we may be
8741 // taking the address of a function. In that case we need to
8742 // set the entry in the dynamic symbol table to the address of
8744 if (gsym->is_from_dynobj() && !parameters->options().shared())
8745 gsym->set_needs_dynsym_value();
8747 // Make a dynamic relocation if necessary.
8748 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8750 if (!parameters->options().output_is_position_independent()
8751 && gsym->may_need_copy_reloc())
8753 target->copy_reloc(symtab, layout, object,
8754 data_shndx, output_section, gsym, reloc);
8756 else if ((r_type == elfcpp::R_ARM_ABS32
8757 || r_type == elfcpp::R_ARM_ABS32_NOI)
8758 && gsym->type() == elfcpp::STT_GNU_IFUNC
8759 && gsym->can_use_relative_reloc(false)
8760 && !gsym->is_from_dynobj()
8761 && !gsym->is_undefined()
8762 && !gsym->is_preemptible())
8764 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
8765 // symbol. This makes a function address in a PIE executable
8766 // match the address in a shared library that it links against.
8767 Reloc_section* rel_irelative =
8768 target->rel_irelative_section(layout);
8769 unsigned int r_type = elfcpp::R_ARM_IRELATIVE;
8770 rel_irelative->add_symbolless_global_addend(
8771 gsym, r_type, output_section, object,
8772 data_shndx, reloc.get_r_offset());
8774 else if ((r_type == elfcpp::R_ARM_ABS32
8775 || r_type == elfcpp::R_ARM_ABS32_NOI)
8776 && gsym->can_use_relative_reloc(false))
8778 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8779 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
8780 output_section, object,
8781 data_shndx, reloc.get_r_offset());
8785 check_non_pic(object, r_type);
8786 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8787 rel_dyn->add_global(gsym, r_type, output_section, object,
8788 data_shndx, reloc.get_r_offset());
8794 case elfcpp::R_ARM_GOTOFF32:
8795 case elfcpp::R_ARM_GOTOFF12:
8796 // We need a GOT section.
8797 target->got_section(symtab, layout);
8800 case elfcpp::R_ARM_REL32:
8801 case elfcpp::R_ARM_LDR_PC_G0:
8802 case elfcpp::R_ARM_SBREL32:
8803 case elfcpp::R_ARM_THM_PC8:
8804 case elfcpp::R_ARM_BASE_PREL:
8805 case elfcpp::R_ARM_MOVW_PREL_NC:
8806 case elfcpp::R_ARM_MOVT_PREL:
8807 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8808 case elfcpp::R_ARM_THM_MOVT_PREL:
8809 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8810 case elfcpp::R_ARM_THM_PC12:
8811 case elfcpp::R_ARM_REL32_NOI:
8812 case elfcpp::R_ARM_ALU_PC_G0_NC:
8813 case elfcpp::R_ARM_ALU_PC_G0:
8814 case elfcpp::R_ARM_ALU_PC_G1_NC:
8815 case elfcpp::R_ARM_ALU_PC_G1:
8816 case elfcpp::R_ARM_ALU_PC_G2:
8817 case elfcpp::R_ARM_LDR_PC_G1:
8818 case elfcpp::R_ARM_LDR_PC_G2:
8819 case elfcpp::R_ARM_LDRS_PC_G0:
8820 case elfcpp::R_ARM_LDRS_PC_G1:
8821 case elfcpp::R_ARM_LDRS_PC_G2:
8822 case elfcpp::R_ARM_LDC_PC_G0:
8823 case elfcpp::R_ARM_LDC_PC_G1:
8824 case elfcpp::R_ARM_LDC_PC_G2:
8825 case elfcpp::R_ARM_ALU_SB_G0_NC:
8826 case elfcpp::R_ARM_ALU_SB_G0:
8827 case elfcpp::R_ARM_ALU_SB_G1_NC:
8828 case elfcpp::R_ARM_ALU_SB_G1:
8829 case elfcpp::R_ARM_ALU_SB_G2:
8830 case elfcpp::R_ARM_LDR_SB_G0:
8831 case elfcpp::R_ARM_LDR_SB_G1:
8832 case elfcpp::R_ARM_LDR_SB_G2:
8833 case elfcpp::R_ARM_LDRS_SB_G0:
8834 case elfcpp::R_ARM_LDRS_SB_G1:
8835 case elfcpp::R_ARM_LDRS_SB_G2:
8836 case elfcpp::R_ARM_LDC_SB_G0:
8837 case elfcpp::R_ARM_LDC_SB_G1:
8838 case elfcpp::R_ARM_LDC_SB_G2:
8839 case elfcpp::R_ARM_MOVW_BREL_NC:
8840 case elfcpp::R_ARM_MOVT_BREL:
8841 case elfcpp::R_ARM_MOVW_BREL:
8842 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8843 case elfcpp::R_ARM_THM_MOVT_BREL:
8844 case elfcpp::R_ARM_THM_MOVW_BREL:
8845 // Relative addressing relocations.
8847 // Make a dynamic relocation if necessary.
8848 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8850 if (parameters->options().output_is_executable()
8851 && target->may_need_copy_reloc(gsym))
8853 target->copy_reloc(symtab, layout, object,
8854 data_shndx, output_section, gsym, reloc);
8858 check_non_pic(object, r_type);
8859 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8860 rel_dyn->add_global(gsym, r_type, output_section, object,
8861 data_shndx, reloc.get_r_offset());
8867 case elfcpp::R_ARM_THM_CALL:
8868 case elfcpp::R_ARM_PLT32:
8869 case elfcpp::R_ARM_CALL:
8870 case elfcpp::R_ARM_JUMP24:
8871 case elfcpp::R_ARM_THM_JUMP24:
8872 case elfcpp::R_ARM_SBREL31:
8873 case elfcpp::R_ARM_PREL31:
8874 case elfcpp::R_ARM_THM_JUMP19:
8875 case elfcpp::R_ARM_THM_JUMP6:
8876 case elfcpp::R_ARM_THM_JUMP11:
8877 case elfcpp::R_ARM_THM_JUMP8:
8878 // All the relocation above are branches except for the PREL31 ones.
8879 // A PREL31 relocation can point to a personality function in a shared
8880 // library. In that case we want to use a PLT because we want to
8881 // call the personality routine and the dynamic linkers we care about
8882 // do not support dynamic PREL31 relocations. An REL31 relocation may
8883 // point to a function whose unwinding behaviour is being described but
8884 // we will not mistakenly generate a PLT for that because we should use
8885 // a local section symbol.
8887 // If the symbol is fully resolved, this is just a relative
8888 // local reloc. Otherwise we need a PLT entry.
8889 if (gsym->final_value_is_known())
8891 // If building a shared library, we can also skip the PLT entry
8892 // if the symbol is defined in the output file and is protected
8894 if (gsym->is_defined()
8895 && !gsym->is_from_dynobj()
8896 && !gsym->is_preemptible())
8898 target->make_plt_entry(symtab, layout, gsym);
8901 case elfcpp::R_ARM_GOT_BREL:
8902 case elfcpp::R_ARM_GOT_ABS:
8903 case elfcpp::R_ARM_GOT_PREL:
8905 // The symbol requires a GOT entry.
8906 Arm_output_data_got<big_endian>* got =
8907 target->got_section(symtab, layout);
8908 if (gsym->final_value_is_known())
8910 // For a STT_GNU_IFUNC symbol we want the PLT address.
8911 if (gsym->type() == elfcpp::STT_GNU_IFUNC)
8912 got->add_global_plt(gsym, GOT_TYPE_STANDARD);
8914 got->add_global(gsym, GOT_TYPE_STANDARD);
8918 // If this symbol is not fully resolved, we need to add a
8919 // GOT entry with a dynamic relocation.
8920 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8921 if (gsym->is_from_dynobj()
8922 || gsym->is_undefined()
8923 || gsym->is_preemptible()
8924 || (gsym->visibility() == elfcpp::STV_PROTECTED
8925 && parameters->options().shared())
8926 || (gsym->type() == elfcpp::STT_GNU_IFUNC
8927 && parameters->options().output_is_position_independent()))
8928 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
8929 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
8932 // For a STT_GNU_IFUNC symbol we want to write the PLT
8933 // offset into the GOT, so that function pointer
8934 // comparisons work correctly.
8936 if (gsym->type() != elfcpp::STT_GNU_IFUNC)
8937 is_new = got->add_global(gsym, GOT_TYPE_STANDARD);
8940 is_new = got->add_global_plt(gsym, GOT_TYPE_STANDARD);
8941 // Tell the dynamic linker to use the PLT address
8942 // when resolving relocations.
8943 if (gsym->is_from_dynobj()
8944 && !parameters->options().shared())
8945 gsym->set_needs_dynsym_value();
8948 rel_dyn->add_global_relative(
8949 gsym, elfcpp::R_ARM_RELATIVE, got,
8950 gsym->got_offset(GOT_TYPE_STANDARD));
8956 case elfcpp::R_ARM_TARGET1:
8957 case elfcpp::R_ARM_TARGET2:
8958 // These should have been mapped to other types already.
8960 case elfcpp::R_ARM_COPY:
8961 case elfcpp::R_ARM_GLOB_DAT:
8962 case elfcpp::R_ARM_JUMP_SLOT:
8963 case elfcpp::R_ARM_RELATIVE:
8964 // These are relocations which should only be seen by the
8965 // dynamic linker, and should never be seen here.
8966 gold_error(_("%s: unexpected reloc %u in object file"),
8967 object->name().c_str(), r_type);
8970 // These are initial tls relocs, which are expected when
8972 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8973 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8974 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8975 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8976 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8978 const bool is_final = gsym->final_value_is_known();
8979 const tls::Tls_optimization optimized_type
8980 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
8983 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8984 if (optimized_type == tls::TLSOPT_NONE)
8986 // Create a pair of GOT entries for the module index and
8987 // dtv-relative offset.
8988 Arm_output_data_got<big_endian>* got
8989 = target->got_section(symtab, layout);
8990 if (!parameters->doing_static_link())
8991 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR,
8992 target->rel_dyn_section(layout),
8993 elfcpp::R_ARM_TLS_DTPMOD32,
8994 elfcpp::R_ARM_TLS_DTPOFF32);
8996 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym);
8999 // FIXME: TLS optimization not supported yet.
9003 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9004 if (optimized_type == tls::TLSOPT_NONE)
9006 // Create a GOT entry for the module index.
9007 target->got_mod_index_entry(symtab, layout, object);
9010 // FIXME: TLS optimization not supported yet.
9014 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9017 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9018 layout->set_has_static_tls();
9019 if (optimized_type == tls::TLSOPT_NONE)
9021 // Create a GOT entry for the tp-relative offset.
9022 Arm_output_data_got<big_endian>* got
9023 = target->got_section(symtab, layout);
9024 if (!parameters->doing_static_link())
9025 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET,
9026 target->rel_dyn_section(layout),
9027 elfcpp::R_ARM_TLS_TPOFF32);
9028 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET))
9030 got->add_global(gsym, GOT_TYPE_TLS_OFFSET);
9031 unsigned int got_offset =
9032 gsym->got_offset(GOT_TYPE_TLS_OFFSET);
9033 got->add_static_reloc(got_offset,
9034 elfcpp::R_ARM_TLS_TPOFF32, gsym);
9038 // FIXME: TLS optimization not supported yet.
9042 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9043 layout->set_has_static_tls();
9044 if (parameters->options().shared())
9046 // We need to create a dynamic relocation.
9047 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
9048 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32,
9049 output_section, object,
9050 data_shndx, reloc.get_r_offset());
9060 case elfcpp::R_ARM_PC24:
9061 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9062 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9063 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9065 unsupported_reloc_global(object, r_type, gsym);
9070 // Process relocations for gc.
9072 template<bool big_endian>
9074 Target_arm<big_endian>::gc_process_relocs(
9075 Symbol_table* symtab,
9077 Sized_relobj_file<32, big_endian>* object,
9078 unsigned int data_shndx,
9080 const unsigned char* prelocs,
9082 Output_section* output_section,
9083 bool needs_special_offset_handling,
9084 size_t local_symbol_count,
9085 const unsigned char* plocal_symbols)
9087 typedef Target_arm<big_endian> Arm;
9088 typedef typename Target_arm<big_endian>::Scan Scan;
9090 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan,
9091 typename Target_arm::Relocatable_size_for_reloc>(
9100 needs_special_offset_handling,
9105 // Scan relocations for a section.
9107 template<bool big_endian>
9109 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
9111 Sized_relobj_file<32, big_endian>* object,
9112 unsigned int data_shndx,
9113 unsigned int sh_type,
9114 const unsigned char* prelocs,
9116 Output_section* output_section,
9117 bool needs_special_offset_handling,
9118 size_t local_symbol_count,
9119 const unsigned char* plocal_symbols)
9121 typedef typename Target_arm<big_endian>::Scan Scan;
9122 if (sh_type == elfcpp::SHT_RELA)
9124 gold_error(_("%s: unsupported RELA reloc section"),
9125 object->name().c_str());
9129 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
9138 needs_special_offset_handling,
9143 // Finalize the sections.
9145 template<bool big_endian>
9147 Target_arm<big_endian>::do_finalize_sections(
9149 const Input_objects* input_objects,
9152 bool merged_any_attributes = false;
9153 // Merge processor-specific flags.
9154 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
9155 p != input_objects->relobj_end();
9158 Arm_relobj<big_endian>* arm_relobj =
9159 Arm_relobj<big_endian>::as_arm_relobj(*p);
9160 if (arm_relobj->merge_flags_and_attributes())
9162 this->merge_processor_specific_flags(
9164 arm_relobj->processor_specific_flags());
9165 this->merge_object_attributes(arm_relobj->name().c_str(),
9166 arm_relobj->attributes_section_data());
9167 merged_any_attributes = true;
9171 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
9172 p != input_objects->dynobj_end();
9175 Arm_dynobj<big_endian>* arm_dynobj =
9176 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
9177 this->merge_processor_specific_flags(
9179 arm_dynobj->processor_specific_flags());
9180 this->merge_object_attributes(arm_dynobj->name().c_str(),
9181 arm_dynobj->attributes_section_data());
9182 merged_any_attributes = true;
9185 // Create an empty uninitialized attribute section if we still don't have it
9186 // at this moment. This happens if there is no attributes sections in all
9188 if (this->attributes_section_data_ == NULL)
9189 this->attributes_section_data_ = new Attributes_section_data(NULL, 0);
9191 const Object_attribute* cpu_arch_attr =
9192 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
9193 // Check if we need to use Cortex-A8 workaround.
9194 if (parameters->options().user_set_fix_cortex_a8())
9195 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
9198 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9199 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9201 const Object_attribute* cpu_arch_profile_attr =
9202 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
9203 this->fix_cortex_a8_ =
9204 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
9205 && (cpu_arch_profile_attr->int_value() == 'A'
9206 || cpu_arch_profile_attr->int_value() == 0));
9209 // Check if we can use V4BX interworking.
9210 // The V4BX interworking stub contains BX instruction,
9211 // which is not specified for some profiles.
9212 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9213 && !this->may_use_v4t_interworking())
9214 gold_error(_("unable to provide V4BX reloc interworking fix up; "
9215 "the target profile does not support BX instruction"));
9217 // Fill in some more dynamic tags.
9218 const Reloc_section* rel_plt = (this->plt_ == NULL
9220 : this->plt_->rel_plt());
9221 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
9222 this->rel_dyn_, true, false);
9224 // Emit any relocs we saved in an attempt to avoid generating COPY
9226 if (this->copy_relocs_.any_saved_relocs())
9227 this->copy_relocs_.emit(this->rel_dyn_section(layout));
9229 // Handle the .ARM.exidx section.
9230 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
9232 if (!parameters->options().relocatable())
9234 if (exidx_section != NULL
9235 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX)
9237 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9238 // the .ARM.exidx section.
9239 if (!layout->script_options()->saw_phdrs_clause())
9241 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0,
9244 Output_segment* exidx_segment =
9245 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
9246 exidx_segment->add_output_section_to_nonload(exidx_section,
9252 // Create an .ARM.attributes section if we have merged any attributes
9254 if (merged_any_attributes)
9256 Output_attributes_section_data* attributes_section =
9257 new Output_attributes_section_data(*this->attributes_section_data_);
9258 layout->add_output_section_data(".ARM.attributes",
9259 elfcpp::SHT_ARM_ATTRIBUTES, 0,
9260 attributes_section, ORDER_INVALID,
9264 // Fix up links in section EXIDX headers.
9265 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
9266 p != layout->section_list().end();
9268 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
9270 Arm_output_section<big_endian>* os =
9271 Arm_output_section<big_endian>::as_arm_output_section(*p);
9272 os->set_exidx_section_link();
9276 // Return whether a direct absolute static relocation needs to be applied.
9277 // In cases where Scan::local() or Scan::global() has created
9278 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9279 // of the relocation is carried in the data, and we must not
9280 // apply the static relocation.
9282 template<bool big_endian>
9284 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
9285 const Sized_symbol<32>* gsym,
9286 unsigned int r_type,
9288 Output_section* output_section)
9290 // If the output section is not allocated, then we didn't call
9291 // scan_relocs, we didn't create a dynamic reloc, and we must apply
9293 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
9296 int ref_flags = Scan::get_reference_flags(r_type);
9298 // For local symbols, we will have created a non-RELATIVE dynamic
9299 // relocation only if (a) the output is position independent,
9300 // (b) the relocation is absolute (not pc- or segment-relative), and
9301 // (c) the relocation is not 32 bits wide.
9303 return !(parameters->options().output_is_position_independent()
9304 && (ref_flags & Symbol::ABSOLUTE_REF)
9307 // For global symbols, we use the same helper routines used in the
9308 // scan pass. If we did not create a dynamic relocation, or if we
9309 // created a RELATIVE dynamic relocation, we should apply the static
9311 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
9312 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
9313 && gsym->can_use_relative_reloc(ref_flags
9314 & Symbol::FUNCTION_CALL);
9315 return !has_dyn || is_rel;
9318 // Perform a relocation.
9320 template<bool big_endian>
9322 Target_arm<big_endian>::Relocate::relocate(
9323 const Relocate_info<32, big_endian>* relinfo,
9325 Output_section* output_section,
9327 const elfcpp::Rel<32, big_endian>& rel,
9328 unsigned int r_type,
9329 const Sized_symbol<32>* gsym,
9330 const Symbol_value<32>* psymval,
9331 unsigned char* view,
9332 Arm_address address,
9333 section_size_type view_size)
9338 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
9340 r_type = get_real_reloc_type(r_type);
9341 const Arm_reloc_property* reloc_property =
9342 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9343 if (reloc_property == NULL)
9345 std::string reloc_name =
9346 arm_reloc_property_table->reloc_name_in_error_message(r_type);
9347 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9348 _("cannot relocate %s in object file"),
9349 reloc_name.c_str());
9353 const Arm_relobj<big_endian>* object =
9354 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9356 // If the final branch target of a relocation is THUMB instruction, this
9357 // is 1. Otherwise it is 0.
9358 Arm_address thumb_bit = 0;
9359 Symbol_value<32> symval;
9360 bool is_weakly_undefined_without_plt = false;
9361 bool have_got_offset = false;
9362 unsigned int got_offset = 0;
9364 // If the relocation uses the GOT entry of a symbol instead of the symbol
9365 // itself, we don't care about whether the symbol is defined or what kind
9367 if (reloc_property->uses_got_entry())
9369 // Get the GOT offset.
9370 // The GOT pointer points to the end of the GOT section.
9371 // We need to subtract the size of the GOT section to get
9372 // the actual offset to use in the relocation.
9373 // TODO: We should move GOT offset computing code in TLS relocations
9377 case elfcpp::R_ARM_GOT_BREL:
9378 case elfcpp::R_ARM_GOT_PREL:
9381 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
9382 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
9383 - target->got_size());
9387 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9388 gold_assert(object->local_has_got_offset(r_sym,
9389 GOT_TYPE_STANDARD));
9390 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
9391 - target->got_size());
9393 have_got_offset = true;
9400 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
9404 // This is a global symbol. Determine if we use PLT and if the
9405 // final target is THUMB.
9406 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
9408 // This uses a PLT, change the symbol value.
9409 symval.set_output_value(target->plt_address_for_global(gsym));
9412 else if (gsym->is_weak_undefined())
9414 // This is a weakly undefined symbol and we do not use PLT
9415 // for this relocation. A branch targeting this symbol will
9416 // be converted into an NOP.
9417 is_weakly_undefined_without_plt = true;
9419 else if (gsym->is_undefined() && reloc_property->uses_symbol())
9421 // This relocation uses the symbol value but the symbol is
9422 // undefined. Exit early and have the caller reporting an
9428 // Set thumb bit if symbol:
9429 // -Has type STT_ARM_TFUNC or
9430 // -Has type STT_FUNC, is defined and with LSB in value set.
9432 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
9433 || (gsym->type() == elfcpp::STT_FUNC
9434 && !gsym->is_undefined()
9435 && ((psymval->value(object, 0) & 1) != 0)))
9442 // This is a local symbol. Determine if the final target is THUMB.
9443 // We saved this information when all the local symbols were read.
9444 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
9445 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9446 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
9448 if (psymval->is_ifunc_symbol() && object->local_has_plt_offset(r_sym))
9450 symval.set_output_value(
9451 target->plt_address_for_local(object, r_sym));
9458 // This is a fake relocation synthesized for a stub. It does not have
9459 // a real symbol. We just look at the LSB of the symbol value to
9460 // determine if the target is THUMB or not.
9461 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
9464 // Strip LSB if this points to a THUMB target.
9466 && reloc_property->uses_thumb_bit()
9467 && ((psymval->value(object, 0) & 1) != 0))
9469 Arm_address stripped_value =
9470 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
9471 symval.set_output_value(stripped_value);
9475 // To look up relocation stubs, we need to pass the symbol table index of
9477 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9479 // Get the addressing origin of the output segment defining the
9480 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9481 Arm_address sym_origin = 0;
9482 if (reloc_property->uses_symbol_base())
9484 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
9485 // R_ARM_BASE_ABS with the NULL symbol will give the
9486 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9487 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9488 sym_origin = target->got_plt_section()->address();
9489 else if (gsym == NULL)
9491 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
9492 sym_origin = gsym->output_segment()->vaddr();
9493 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
9494 sym_origin = gsym->output_data()->address();
9496 // TODO: Assumes the segment base to be zero for the global symbols
9497 // till the proper support for the segment-base-relative addressing
9498 // will be implemented. This is consistent with GNU ld.
9501 // For relative addressing relocation, find out the relative address base.
9502 Arm_address relative_address_base = 0;
9503 switch(reloc_property->relative_address_base())
9505 case Arm_reloc_property::RAB_NONE:
9506 // Relocations with relative address bases RAB_TLS and RAB_tp are
9507 // handled by relocate_tls. So we do not need to do anything here.
9508 case Arm_reloc_property::RAB_TLS:
9509 case Arm_reloc_property::RAB_tp:
9511 case Arm_reloc_property::RAB_B_S:
9512 relative_address_base = sym_origin;
9514 case Arm_reloc_property::RAB_GOT_ORG:
9515 relative_address_base = target->got_plt_section()->address();
9517 case Arm_reloc_property::RAB_P:
9518 relative_address_base = address;
9520 case Arm_reloc_property::RAB_Pa:
9521 relative_address_base = address & 0xfffffffcU;
9527 typename Arm_relocate_functions::Status reloc_status =
9528 Arm_relocate_functions::STATUS_OKAY;
9529 bool check_overflow = reloc_property->checks_overflow();
9532 case elfcpp::R_ARM_NONE:
9535 case elfcpp::R_ARM_ABS8:
9536 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9537 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
9540 case elfcpp::R_ARM_ABS12:
9541 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9542 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
9545 case elfcpp::R_ARM_ABS16:
9546 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9547 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
9550 case elfcpp::R_ARM_ABS32:
9551 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9552 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9556 case elfcpp::R_ARM_ABS32_NOI:
9557 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9558 // No thumb bit for this relocation: (S + A)
9559 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9563 case elfcpp::R_ARM_MOVW_ABS_NC:
9564 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9565 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
9570 case elfcpp::R_ARM_MOVT_ABS:
9571 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9572 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
9575 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9576 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9577 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
9578 0, thumb_bit, false);
9581 case elfcpp::R_ARM_THM_MOVT_ABS:
9582 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9583 reloc_status = Arm_relocate_functions::thm_movt(view, object,
9587 case elfcpp::R_ARM_MOVW_PREL_NC:
9588 case elfcpp::R_ARM_MOVW_BREL_NC:
9589 case elfcpp::R_ARM_MOVW_BREL:
9591 Arm_relocate_functions::movw(view, object, psymval,
9592 relative_address_base, thumb_bit,
9596 case elfcpp::R_ARM_MOVT_PREL:
9597 case elfcpp::R_ARM_MOVT_BREL:
9599 Arm_relocate_functions::movt(view, object, psymval,
9600 relative_address_base);
9603 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9604 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9605 case elfcpp::R_ARM_THM_MOVW_BREL:
9607 Arm_relocate_functions::thm_movw(view, object, psymval,
9608 relative_address_base,
9609 thumb_bit, check_overflow);
9612 case elfcpp::R_ARM_THM_MOVT_PREL:
9613 case elfcpp::R_ARM_THM_MOVT_BREL:
9615 Arm_relocate_functions::thm_movt(view, object, psymval,
9616 relative_address_base);
9619 case elfcpp::R_ARM_REL32:
9620 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9621 address, thumb_bit);
9624 case elfcpp::R_ARM_THM_ABS5:
9625 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9626 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
9629 // Thumb long branches.
9630 case elfcpp::R_ARM_THM_CALL:
9631 case elfcpp::R_ARM_THM_XPC22:
9632 case elfcpp::R_ARM_THM_JUMP24:
9634 Arm_relocate_functions::thumb_branch_common(
9635 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9636 thumb_bit, is_weakly_undefined_without_plt);
9639 case elfcpp::R_ARM_GOTOFF32:
9641 Arm_address got_origin;
9642 got_origin = target->got_plt_section()->address();
9643 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9644 got_origin, thumb_bit);
9648 case elfcpp::R_ARM_BASE_PREL:
9649 gold_assert(gsym != NULL);
9651 Arm_relocate_functions::base_prel(view, sym_origin, address);
9654 case elfcpp::R_ARM_BASE_ABS:
9655 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9656 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
9659 case elfcpp::R_ARM_GOT_BREL:
9660 gold_assert(have_got_offset);
9661 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
9664 case elfcpp::R_ARM_GOT_PREL:
9665 gold_assert(have_got_offset);
9666 // Get the address origin for GOT PLT, which is allocated right
9667 // after the GOT section, to calculate an absolute address of
9668 // the symbol GOT entry (got_origin + got_offset).
9669 Arm_address got_origin;
9670 got_origin = target->got_plt_section()->address();
9671 reloc_status = Arm_relocate_functions::got_prel(view,
9672 got_origin + got_offset,
9676 case elfcpp::R_ARM_PLT32:
9677 case elfcpp::R_ARM_CALL:
9678 case elfcpp::R_ARM_JUMP24:
9679 case elfcpp::R_ARM_XPC25:
9680 gold_assert(gsym == NULL
9681 || gsym->has_plt_offset()
9682 || gsym->final_value_is_known()
9683 || (gsym->is_defined()
9684 && !gsym->is_from_dynobj()
9685 && !gsym->is_preemptible()));
9687 Arm_relocate_functions::arm_branch_common(
9688 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9689 thumb_bit, is_weakly_undefined_without_plt);
9692 case elfcpp::R_ARM_THM_JUMP19:
9694 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
9698 case elfcpp::R_ARM_THM_JUMP6:
9700 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
9703 case elfcpp::R_ARM_THM_JUMP8:
9705 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
9708 case elfcpp::R_ARM_THM_JUMP11:
9710 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
9713 case elfcpp::R_ARM_PREL31:
9714 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
9715 address, thumb_bit);
9718 case elfcpp::R_ARM_V4BX:
9719 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
9721 const bool is_v4bx_interworking =
9722 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
9724 Arm_relocate_functions::v4bx(relinfo, view, object, address,
9725 is_v4bx_interworking);
9729 case elfcpp::R_ARM_THM_PC8:
9731 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
9734 case elfcpp::R_ARM_THM_PC12:
9736 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
9739 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9741 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
9745 case elfcpp::R_ARM_ALU_PC_G0_NC:
9746 case elfcpp::R_ARM_ALU_PC_G0:
9747 case elfcpp::R_ARM_ALU_PC_G1_NC:
9748 case elfcpp::R_ARM_ALU_PC_G1:
9749 case elfcpp::R_ARM_ALU_PC_G2:
9750 case elfcpp::R_ARM_ALU_SB_G0_NC:
9751 case elfcpp::R_ARM_ALU_SB_G0:
9752 case elfcpp::R_ARM_ALU_SB_G1_NC:
9753 case elfcpp::R_ARM_ALU_SB_G1:
9754 case elfcpp::R_ARM_ALU_SB_G2:
9756 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
9757 reloc_property->group_index(),
9758 relative_address_base,
9759 thumb_bit, check_overflow);
9762 case elfcpp::R_ARM_LDR_PC_G0:
9763 case elfcpp::R_ARM_LDR_PC_G1:
9764 case elfcpp::R_ARM_LDR_PC_G2:
9765 case elfcpp::R_ARM_LDR_SB_G0:
9766 case elfcpp::R_ARM_LDR_SB_G1:
9767 case elfcpp::R_ARM_LDR_SB_G2:
9769 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
9770 reloc_property->group_index(),
9771 relative_address_base);
9774 case elfcpp::R_ARM_LDRS_PC_G0:
9775 case elfcpp::R_ARM_LDRS_PC_G1:
9776 case elfcpp::R_ARM_LDRS_PC_G2:
9777 case elfcpp::R_ARM_LDRS_SB_G0:
9778 case elfcpp::R_ARM_LDRS_SB_G1:
9779 case elfcpp::R_ARM_LDRS_SB_G2:
9781 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
9782 reloc_property->group_index(),
9783 relative_address_base);
9786 case elfcpp::R_ARM_LDC_PC_G0:
9787 case elfcpp::R_ARM_LDC_PC_G1:
9788 case elfcpp::R_ARM_LDC_PC_G2:
9789 case elfcpp::R_ARM_LDC_SB_G0:
9790 case elfcpp::R_ARM_LDC_SB_G1:
9791 case elfcpp::R_ARM_LDC_SB_G2:
9793 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
9794 reloc_property->group_index(),
9795 relative_address_base);
9798 // These are initial tls relocs, which are expected when
9800 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9801 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9802 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9803 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9804 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9806 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval,
9807 view, address, view_size);
9810 // The known and unknown unsupported and/or deprecated relocations.
9811 case elfcpp::R_ARM_PC24:
9812 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9813 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9814 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9816 // Just silently leave the method. We should get an appropriate error
9817 // message in the scan methods.
9821 // Report any errors.
9822 switch (reloc_status)
9824 case Arm_relocate_functions::STATUS_OKAY:
9826 case Arm_relocate_functions::STATUS_OVERFLOW:
9827 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9828 _("relocation overflow in %s"),
9829 reloc_property->name().c_str());
9831 case Arm_relocate_functions::STATUS_BAD_RELOC:
9832 gold_error_at_location(
9836 _("unexpected opcode while processing relocation %s"),
9837 reloc_property->name().c_str());
9846 // Perform a TLS relocation.
9848 template<bool big_endian>
9849 inline typename Arm_relocate_functions<big_endian>::Status
9850 Target_arm<big_endian>::Relocate::relocate_tls(
9851 const Relocate_info<32, big_endian>* relinfo,
9852 Target_arm<big_endian>* target,
9854 const elfcpp::Rel<32, big_endian>& rel,
9855 unsigned int r_type,
9856 const Sized_symbol<32>* gsym,
9857 const Symbol_value<32>* psymval,
9858 unsigned char* view,
9859 elfcpp::Elf_types<32>::Elf_Addr address,
9860 section_size_type /*view_size*/ )
9862 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs;
9863 typedef Relocate_functions<32, big_endian> RelocFuncs;
9864 Output_segment* tls_segment = relinfo->layout->tls_segment();
9866 const Sized_relobj_file<32, big_endian>* object = relinfo->object;
9868 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0);
9870 const bool is_final = (gsym == NULL
9871 ? !parameters->options().shared()
9872 : gsym->final_value_is_known());
9873 const tls::Tls_optimization optimized_type
9874 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
9877 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9879 unsigned int got_type = GOT_TYPE_TLS_PAIR;
9880 unsigned int got_offset;
9883 gold_assert(gsym->has_got_offset(got_type));
9884 got_offset = gsym->got_offset(got_type) - target->got_size();
9888 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9889 gold_assert(object->local_has_got_offset(r_sym, got_type));
9890 got_offset = (object->local_got_offset(r_sym, got_type)
9891 - target->got_size());
9893 if (optimized_type == tls::TLSOPT_NONE)
9895 Arm_address got_entry =
9896 target->got_plt_section()->address() + got_offset;
9898 // Relocate the field with the PC relative offset of the pair of
9900 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9901 return ArmRelocFuncs::STATUS_OKAY;
9906 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9907 if (optimized_type == tls::TLSOPT_NONE)
9909 // Relocate the field with the offset of the GOT entry for
9910 // the module index.
9911 unsigned int got_offset;
9912 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL)
9913 - target->got_size());
9914 Arm_address got_entry =
9915 target->got_plt_section()->address() + got_offset;
9917 // Relocate the field with the PC relative offset of the pair of
9919 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9920 return ArmRelocFuncs::STATUS_OKAY;
9924 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9925 RelocFuncs::rel32_unaligned(view, value);
9926 return ArmRelocFuncs::STATUS_OKAY;
9928 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9929 if (optimized_type == tls::TLSOPT_NONE)
9931 // Relocate the field with the offset of the GOT entry for
9932 // the tp-relative offset of the symbol.
9933 unsigned int got_type = GOT_TYPE_TLS_OFFSET;
9934 unsigned int got_offset;
9937 gold_assert(gsym->has_got_offset(got_type));
9938 got_offset = gsym->got_offset(got_type);
9942 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9943 gold_assert(object->local_has_got_offset(r_sym, got_type));
9944 got_offset = object->local_got_offset(r_sym, got_type);
9947 // All GOT offsets are relative to the end of the GOT.
9948 got_offset -= target->got_size();
9950 Arm_address got_entry =
9951 target->got_plt_section()->address() + got_offset;
9953 // Relocate the field with the PC relative offset of the GOT entry.
9954 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9955 return ArmRelocFuncs::STATUS_OKAY;
9959 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9960 // If we're creating a shared library, a dynamic relocation will
9961 // have been created for this location, so do not apply it now.
9962 if (!parameters->options().shared())
9964 gold_assert(tls_segment != NULL);
9966 // $tp points to the TCB, which is followed by the TLS, so we
9967 // need to add TCB size to the offset.
9968 Arm_address aligned_tcb_size =
9969 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
9970 RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size);
9973 return ArmRelocFuncs::STATUS_OKAY;
9979 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9980 _("unsupported reloc %u"),
9982 return ArmRelocFuncs::STATUS_BAD_RELOC;
9985 // Relocate section data.
9987 template<bool big_endian>
9989 Target_arm<big_endian>::relocate_section(
9990 const Relocate_info<32, big_endian>* relinfo,
9991 unsigned int sh_type,
9992 const unsigned char* prelocs,
9994 Output_section* output_section,
9995 bool needs_special_offset_handling,
9996 unsigned char* view,
9997 Arm_address address,
9998 section_size_type view_size,
9999 const Reloc_symbol_changes* reloc_symbol_changes)
10001 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
10002 gold_assert(sh_type == elfcpp::SHT_REL);
10004 // See if we are relocating a relaxed input section. If so, the view
10005 // covers the whole output section and we need to adjust accordingly.
10006 if (needs_special_offset_handling)
10008 const Output_relaxed_input_section* poris =
10009 output_section->find_relaxed_input_section(relinfo->object,
10010 relinfo->data_shndx);
10013 Arm_address section_address = poris->address();
10014 section_size_type section_size = poris->data_size();
10016 gold_assert((section_address >= address)
10017 && ((section_address + section_size)
10018 <= (address + view_size)));
10020 off_t offset = section_address - address;
10023 view_size = section_size;
10027 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
10028 Arm_relocate, gold::Default_comdat_behavior>(
10034 needs_special_offset_handling,
10038 reloc_symbol_changes);
10041 // Return the size of a relocation while scanning during a relocatable
10044 template<bool big_endian>
10046 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
10047 unsigned int r_type,
10050 r_type = get_real_reloc_type(r_type);
10051 const Arm_reloc_property* arp =
10052 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10054 return arp->size();
10057 std::string reloc_name =
10058 arm_reloc_property_table->reloc_name_in_error_message(r_type);
10059 gold_error(_("%s: unexpected %s in object file"),
10060 object->name().c_str(), reloc_name.c_str());
10065 // Scan the relocs during a relocatable link.
10067 template<bool big_endian>
10069 Target_arm<big_endian>::scan_relocatable_relocs(
10070 Symbol_table* symtab,
10072 Sized_relobj_file<32, big_endian>* object,
10073 unsigned int data_shndx,
10074 unsigned int sh_type,
10075 const unsigned char* prelocs,
10076 size_t reloc_count,
10077 Output_section* output_section,
10078 bool needs_special_offset_handling,
10079 size_t local_symbol_count,
10080 const unsigned char* plocal_symbols,
10081 Relocatable_relocs* rr)
10083 gold_assert(sh_type == elfcpp::SHT_REL);
10085 typedef Arm_scan_relocatable_relocs<big_endian, elfcpp::SHT_REL,
10086 Relocatable_size_for_reloc> Scan_relocatable_relocs;
10088 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
10089 Scan_relocatable_relocs>(
10097 needs_special_offset_handling,
10098 local_symbol_count,
10103 // Emit relocations for a section.
10105 template<bool big_endian>
10107 Target_arm<big_endian>::relocate_relocs(
10108 const Relocate_info<32, big_endian>* relinfo,
10109 unsigned int sh_type,
10110 const unsigned char* prelocs,
10111 size_t reloc_count,
10112 Output_section* output_section,
10113 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10114 const Relocatable_relocs* rr,
10115 unsigned char* view,
10116 Arm_address view_address,
10117 section_size_type view_size,
10118 unsigned char* reloc_view,
10119 section_size_type reloc_view_size)
10121 gold_assert(sh_type == elfcpp::SHT_REL);
10123 gold::relocate_relocs<32, big_endian, elfcpp::SHT_REL>(
10128 offset_in_output_section,
10137 // Perform target-specific processing in a relocatable link. This is
10138 // only used if we use the relocation strategy RELOC_SPECIAL.
10140 template<bool big_endian>
10142 Target_arm<big_endian>::relocate_special_relocatable(
10143 const Relocate_info<32, big_endian>* relinfo,
10144 unsigned int sh_type,
10145 const unsigned char* preloc_in,
10147 Output_section* output_section,
10148 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10149 unsigned char* view,
10150 elfcpp::Elf_types<32>::Elf_Addr view_address,
10152 unsigned char* preloc_out)
10154 // We can only handle REL type relocation sections.
10155 gold_assert(sh_type == elfcpp::SHT_REL);
10157 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype;
10158 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write
10160 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1;
10162 const Arm_relobj<big_endian>* object =
10163 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
10164 const unsigned int local_count = object->local_symbol_count();
10166 Reltype reloc(preloc_in);
10167 Reltype_write reloc_write(preloc_out);
10169 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
10170 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
10171 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
10173 const Arm_reloc_property* arp =
10174 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10175 gold_assert(arp != NULL);
10177 // Get the new symbol index.
10178 // We only use RELOC_SPECIAL strategy in local relocations.
10179 gold_assert(r_sym < local_count);
10181 // We are adjusting a section symbol. We need to find
10182 // the symbol table index of the section symbol for
10183 // the output section corresponding to input section
10184 // in which this symbol is defined.
10186 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary);
10187 gold_assert(is_ordinary);
10188 Output_section* os = object->output_section(shndx);
10189 gold_assert(os != NULL);
10190 gold_assert(os->needs_symtab_index());
10191 unsigned int new_symndx = os->symtab_index();
10193 // Get the new offset--the location in the output section where
10194 // this relocation should be applied.
10196 Arm_address offset = reloc.get_r_offset();
10197 Arm_address new_offset;
10198 if (offset_in_output_section != invalid_address)
10199 new_offset = offset + offset_in_output_section;
10202 section_offset_type sot_offset =
10203 convert_types<section_offset_type, Arm_address>(offset);
10204 section_offset_type new_sot_offset =
10205 output_section->output_offset(object, relinfo->data_shndx,
10207 gold_assert(new_sot_offset != -1);
10208 new_offset = new_sot_offset;
10211 // In an object file, r_offset is an offset within the section.
10212 // In an executable or dynamic object, generated by
10213 // --emit-relocs, r_offset is an absolute address.
10214 if (!parameters->options().relocatable())
10216 new_offset += view_address;
10217 if (offset_in_output_section != invalid_address)
10218 new_offset -= offset_in_output_section;
10221 reloc_write.put_r_offset(new_offset);
10222 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type));
10224 // Handle the reloc addend.
10225 // The relocation uses a section symbol in the input file.
10226 // We are adjusting it to use a section symbol in the output
10227 // file. The input section symbol refers to some address in
10228 // the input section. We need the relocation in the output
10229 // file to refer to that same address. This adjustment to
10230 // the addend is the same calculation we use for a simple
10231 // absolute relocation for the input section symbol.
10233 const Symbol_value<32>* psymval = object->local_symbol(r_sym);
10235 // Handle THUMB bit.
10236 Symbol_value<32> symval;
10237 Arm_address thumb_bit =
10238 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
10240 && arp->uses_thumb_bit()
10241 && ((psymval->value(object, 0) & 1) != 0))
10243 Arm_address stripped_value =
10244 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
10245 symval.set_output_value(stripped_value);
10249 unsigned char* paddend = view + offset;
10250 typename Arm_relocate_functions<big_endian>::Status reloc_status =
10251 Arm_relocate_functions<big_endian>::STATUS_OKAY;
10254 case elfcpp::R_ARM_ABS8:
10255 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object,
10259 case elfcpp::R_ARM_ABS12:
10260 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object,
10264 case elfcpp::R_ARM_ABS16:
10265 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object,
10269 case elfcpp::R_ARM_THM_ABS5:
10270 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend,
10275 case elfcpp::R_ARM_MOVW_ABS_NC:
10276 case elfcpp::R_ARM_MOVW_PREL_NC:
10277 case elfcpp::R_ARM_MOVW_BREL_NC:
10278 case elfcpp::R_ARM_MOVW_BREL:
10279 reloc_status = Arm_relocate_functions<big_endian>::movw(
10280 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10283 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
10284 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
10285 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
10286 case elfcpp::R_ARM_THM_MOVW_BREL:
10287 reloc_status = Arm_relocate_functions<big_endian>::thm_movw(
10288 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10291 case elfcpp::R_ARM_THM_CALL:
10292 case elfcpp::R_ARM_THM_XPC22:
10293 case elfcpp::R_ARM_THM_JUMP24:
10295 Arm_relocate_functions<big_endian>::thumb_branch_common(
10296 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10300 case elfcpp::R_ARM_PLT32:
10301 case elfcpp::R_ARM_CALL:
10302 case elfcpp::R_ARM_JUMP24:
10303 case elfcpp::R_ARM_XPC25:
10305 Arm_relocate_functions<big_endian>::arm_branch_common(
10306 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10310 case elfcpp::R_ARM_THM_JUMP19:
10312 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object,
10313 psymval, 0, thumb_bit);
10316 case elfcpp::R_ARM_THM_JUMP6:
10318 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval,
10322 case elfcpp::R_ARM_THM_JUMP8:
10324 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval,
10328 case elfcpp::R_ARM_THM_JUMP11:
10330 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval,
10334 case elfcpp::R_ARM_PREL31:
10336 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0,
10340 case elfcpp::R_ARM_THM_PC8:
10342 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval,
10346 case elfcpp::R_ARM_THM_PC12:
10348 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval,
10352 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
10354 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval,
10358 // These relocation truncate relocation results so we cannot handle them
10359 // in a relocatable link.
10360 case elfcpp::R_ARM_MOVT_ABS:
10361 case elfcpp::R_ARM_THM_MOVT_ABS:
10362 case elfcpp::R_ARM_MOVT_PREL:
10363 case elfcpp::R_ARM_MOVT_BREL:
10364 case elfcpp::R_ARM_THM_MOVT_PREL:
10365 case elfcpp::R_ARM_THM_MOVT_BREL:
10366 case elfcpp::R_ARM_ALU_PC_G0_NC:
10367 case elfcpp::R_ARM_ALU_PC_G0:
10368 case elfcpp::R_ARM_ALU_PC_G1_NC:
10369 case elfcpp::R_ARM_ALU_PC_G1:
10370 case elfcpp::R_ARM_ALU_PC_G2:
10371 case elfcpp::R_ARM_ALU_SB_G0_NC:
10372 case elfcpp::R_ARM_ALU_SB_G0:
10373 case elfcpp::R_ARM_ALU_SB_G1_NC:
10374 case elfcpp::R_ARM_ALU_SB_G1:
10375 case elfcpp::R_ARM_ALU_SB_G2:
10376 case elfcpp::R_ARM_LDR_PC_G0:
10377 case elfcpp::R_ARM_LDR_PC_G1:
10378 case elfcpp::R_ARM_LDR_PC_G2:
10379 case elfcpp::R_ARM_LDR_SB_G0:
10380 case elfcpp::R_ARM_LDR_SB_G1:
10381 case elfcpp::R_ARM_LDR_SB_G2:
10382 case elfcpp::R_ARM_LDRS_PC_G0:
10383 case elfcpp::R_ARM_LDRS_PC_G1:
10384 case elfcpp::R_ARM_LDRS_PC_G2:
10385 case elfcpp::R_ARM_LDRS_SB_G0:
10386 case elfcpp::R_ARM_LDRS_SB_G1:
10387 case elfcpp::R_ARM_LDRS_SB_G2:
10388 case elfcpp::R_ARM_LDC_PC_G0:
10389 case elfcpp::R_ARM_LDC_PC_G1:
10390 case elfcpp::R_ARM_LDC_PC_G2:
10391 case elfcpp::R_ARM_LDC_SB_G0:
10392 case elfcpp::R_ARM_LDC_SB_G1:
10393 case elfcpp::R_ARM_LDC_SB_G2:
10394 gold_error(_("cannot handle %s in a relocatable link"),
10395 arp->name().c_str());
10399 gold_unreachable();
10402 // Report any errors.
10403 switch (reloc_status)
10405 case Arm_relocate_functions<big_endian>::STATUS_OKAY:
10407 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW:
10408 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10409 _("relocation overflow in %s"),
10410 arp->name().c_str());
10412 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC:
10413 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10414 _("unexpected opcode while processing relocation %s"),
10415 arp->name().c_str());
10418 gold_unreachable();
10422 // Return the value to use for a dynamic symbol which requires special
10423 // treatment. This is how we support equality comparisons of function
10424 // pointers across shared library boundaries, as described in the
10425 // processor specific ABI supplement.
10427 template<bool big_endian>
10429 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
10431 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
10432 return this->plt_address_for_global(gsym);
10435 // Map platform-specific relocs to real relocs
10437 template<bool big_endian>
10439 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type)
10443 case elfcpp::R_ARM_TARGET1:
10444 // This is either R_ARM_ABS32 or R_ARM_REL32;
10445 return elfcpp::R_ARM_ABS32;
10447 case elfcpp::R_ARM_TARGET2:
10448 // This can be any reloc type but usually is R_ARM_GOT_PREL
10449 return elfcpp::R_ARM_GOT_PREL;
10456 // Whether if two EABI versions V1 and V2 are compatible.
10458 template<bool big_endian>
10460 Target_arm<big_endian>::are_eabi_versions_compatible(
10461 elfcpp::Elf_Word v1,
10462 elfcpp::Elf_Word v2)
10464 // v4 and v5 are the same spec before and after it was released,
10465 // so allow mixing them.
10466 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN)
10467 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
10468 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
10474 // Combine FLAGS from an input object called NAME and the processor-specific
10475 // flags in the ELF header of the output. Much of this is adapted from the
10476 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10477 // in bfd/elf32-arm.c.
10479 template<bool big_endian>
10481 Target_arm<big_endian>::merge_processor_specific_flags(
10482 const std::string& name,
10483 elfcpp::Elf_Word flags)
10485 if (this->are_processor_specific_flags_set())
10487 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
10489 // Nothing to merge if flags equal to those in output.
10490 if (flags == out_flags)
10493 // Complain about various flag mismatches.
10494 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
10495 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
10496 if (!this->are_eabi_versions_compatible(version1, version2)
10497 && parameters->options().warn_mismatch())
10498 gold_error(_("Source object %s has EABI version %d but output has "
10499 "EABI version %d."),
10501 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
10502 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
10506 // If the input is the default architecture and had the default
10507 // flags then do not bother setting the flags for the output
10508 // architecture, instead allow future merges to do this. If no
10509 // future merges ever set these flags then they will retain their
10510 // uninitialised values, which surprise surprise, correspond
10511 // to the default values.
10515 // This is the first time, just copy the flags.
10516 // We only copy the EABI version for now.
10517 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
10521 // Adjust ELF file header.
10522 template<bool big_endian>
10524 Target_arm<big_endian>::do_adjust_elf_header(
10525 unsigned char* view,
10528 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
10530 elfcpp::Ehdr<32, big_endian> ehdr(view);
10531 elfcpp::Elf_Word flags = this->processor_specific_flags();
10532 unsigned char e_ident[elfcpp::EI_NIDENT];
10533 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
10535 if (elfcpp::arm_eabi_version(flags)
10536 == elfcpp::EF_ARM_EABI_UNKNOWN)
10537 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
10539 e_ident[elfcpp::EI_OSABI] = 0;
10540 e_ident[elfcpp::EI_ABIVERSION] = 0;
10542 // FIXME: Do EF_ARM_BE8 adjustment.
10544 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10546 if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5)
10548 elfcpp::Elf_Half type = ehdr.get_e_type();
10549 if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN)
10551 Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args);
10552 if (attr->int_value() == elfcpp::AEABI_VFP_args_vfp)
10553 flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD;
10555 flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT;
10556 this->set_processor_specific_flags(flags);
10559 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
10560 oehdr.put_e_ident(e_ident);
10561 oehdr.put_e_flags(this->processor_specific_flags());
10564 // do_make_elf_object to override the same function in the base class.
10565 // We need to use a target-specific sub-class of
10566 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10567 // Hence we need to have our own ELF object creation.
10569 template<bool big_endian>
10571 Target_arm<big_endian>::do_make_elf_object(
10572 const std::string& name,
10573 Input_file* input_file,
10574 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
10576 int et = ehdr.get_e_type();
10577 // ET_EXEC files are valid input for --just-symbols/-R,
10578 // and we treat them as relocatable objects.
10579 if (et == elfcpp::ET_REL
10580 || (et == elfcpp::ET_EXEC && input_file->just_symbols()))
10582 Arm_relobj<big_endian>* obj =
10583 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
10587 else if (et == elfcpp::ET_DYN)
10589 Sized_dynobj<32, big_endian>* obj =
10590 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
10596 gold_error(_("%s: unsupported ELF file type %d"),
10602 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10603 // Returns -1 if no architecture could be read.
10604 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10606 template<bool big_endian>
10608 Target_arm<big_endian>::get_secondary_compatible_arch(
10609 const Attributes_section_data* pasd)
10611 const Object_attribute* known_attributes =
10612 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10614 // Note: the tag and its argument below are uleb128 values, though
10615 // currently-defined values fit in one byte for each.
10616 const std::string& sv =
10617 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
10619 && sv.data()[0] == elfcpp::Tag_CPU_arch
10620 && (sv.data()[1] & 128) != 128)
10621 return sv.data()[1];
10623 // This tag is "safely ignorable", so don't complain if it looks funny.
10627 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10628 // The tag is removed if ARCH is -1.
10629 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10631 template<bool big_endian>
10633 Target_arm<big_endian>::set_secondary_compatible_arch(
10634 Attributes_section_data* pasd,
10637 Object_attribute* known_attributes =
10638 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10642 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
10646 // Note: the tag and its argument below are uleb128 values, though
10647 // currently-defined values fit in one byte for each.
10649 sv[0] = elfcpp::Tag_CPU_arch;
10650 gold_assert(arch != 0);
10654 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
10657 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10659 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10661 template<bool big_endian>
10663 Target_arm<big_endian>::tag_cpu_arch_combine(
10666 int* secondary_compat_out,
10668 int secondary_compat)
10670 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10671 static const int v6t2[] =
10673 T(V6T2), // PRE_V4.
10683 static const int v6k[] =
10696 static const int v7[] =
10710 static const int v6_m[] =
10725 static const int v6s_m[] =
10741 static const int v7e_m[] =
10748 T(V7E_M), // V5TEJ.
10755 T(V7E_M), // V6S_M.
10758 static const int v8[] =
10776 static const int v4t_plus_v6_m[] =
10783 T(V5TEJ), // V5TEJ.
10790 T(V6S_M), // V6S_M.
10791 T(V7E_M), // V7E_M.
10793 T(V4T_PLUS_V6_M) // V4T plus V6_M.
10795 static const int* comb[] =
10804 // Pseudo-architecture.
10808 // Check we've not got a higher architecture than we know about.
10810 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH)
10812 gold_error(_("%s: unknown CPU architecture"), name);
10816 // Override old tag if we have a Tag_also_compatible_with on the output.
10818 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10819 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10820 oldtag = T(V4T_PLUS_V6_M);
10822 // And override the new tag if we have a Tag_also_compatible_with on the
10825 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10826 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10827 newtag = T(V4T_PLUS_V6_M);
10829 // Architectures before V6KZ add features monotonically.
10830 int tagh = std::max(oldtag, newtag);
10831 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
10834 int tagl = std::min(oldtag, newtag);
10835 int result = comb[tagh - T(V6T2)][tagl];
10837 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10838 // as the canonical version.
10839 if (result == T(V4T_PLUS_V6_M))
10842 *secondary_compat_out = T(V6_M);
10845 *secondary_compat_out = -1;
10849 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10850 name, oldtag, newtag);
10858 // Helper to print AEABI enum tag value.
10860 template<bool big_endian>
10862 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
10864 static const char* aeabi_enum_names[] =
10865 { "", "variable-size", "32-bit", "" };
10866 const size_t aeabi_enum_names_size =
10867 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
10869 if (value < aeabi_enum_names_size)
10870 return std::string(aeabi_enum_names[value]);
10874 sprintf(buffer, "<unknown value %u>", value);
10875 return std::string(buffer);
10879 // Return the string value to store in TAG_CPU_name.
10881 template<bool big_endian>
10883 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
10885 static const char* name_table[] = {
10886 // These aren't real CPU names, but we can't guess
10887 // that from the architecture version alone.
10904 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
10906 if (value < name_table_size)
10907 return std::string(name_table[value]);
10911 sprintf(buffer, "<unknown CPU value %u>", value);
10912 return std::string(buffer);
10916 // Query attributes object to see if integer divide instructions may be
10917 // present in an object.
10919 template<bool big_endian>
10921 Target_arm<big_endian>::attributes_accept_div(int arch, int profile,
10922 const Object_attribute* div_attr)
10924 switch (div_attr->int_value())
10927 // Integer divide allowed if instruction contained in
10929 if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
10931 else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M)
10937 // Integer divide explicitly prohibited.
10941 // Unrecognised case - treat as allowing divide everywhere.
10943 // Integer divide allowed in ARM state.
10948 // Query attributes object to see if integer divide instructions are
10949 // forbidden to be in the object. This is not the inverse of
10950 // attributes_accept_div.
10952 template<bool big_endian>
10954 Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr)
10956 return div_attr->int_value() == 1;
10959 // Merge object attributes from input file called NAME with those of the
10960 // output. The input object attributes are in the object pointed by PASD.
10962 template<bool big_endian>
10964 Target_arm<big_endian>::merge_object_attributes(
10966 const Attributes_section_data* pasd)
10968 // Return if there is no attributes section data.
10972 // If output has no object attributes, just copy.
10973 const int vendor = Object_attribute::OBJ_ATTR_PROC;
10974 if (this->attributes_section_data_ == NULL)
10976 this->attributes_section_data_ = new Attributes_section_data(*pasd);
10977 Object_attribute* out_attr =
10978 this->attributes_section_data_->known_attributes(vendor);
10980 // We do not output objects with Tag_MPextension_use_legacy - we move
10981 // the attribute's value to Tag_MPextension_use. */
10982 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0)
10984 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0
10985 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value()
10986 != out_attr[elfcpp::Tag_MPextension_use].int_value())
10988 gold_error(_("%s has both the current and legacy "
10989 "Tag_MPextension_use attributes"),
10993 out_attr[elfcpp::Tag_MPextension_use] =
10994 out_attr[elfcpp::Tag_MPextension_use_legacy];
10995 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0);
10996 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0);
11002 const Object_attribute* in_attr = pasd->known_attributes(vendor);
11003 Object_attribute* out_attr =
11004 this->attributes_section_data_->known_attributes(vendor);
11006 // This needs to happen before Tag_ABI_FP_number_model is merged. */
11007 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11008 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
11010 // Ignore mismatches if the object doesn't use floating point. */
11011 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11012 == elfcpp::AEABI_FP_number_model_none
11013 || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11014 != elfcpp::AEABI_FP_number_model_none
11015 && out_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11016 == elfcpp::AEABI_VFP_args_compatible))
11017 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
11018 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
11019 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11020 != elfcpp::AEABI_FP_number_model_none
11021 && in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11022 != elfcpp::AEABI_VFP_args_compatible
11023 && parameters->options().warn_mismatch())
11024 gold_error(_("%s uses VFP register arguments, output does not"),
11028 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
11030 // Merge this attribute with existing attributes.
11033 case elfcpp::Tag_CPU_raw_name:
11034 case elfcpp::Tag_CPU_name:
11035 // These are merged after Tag_CPU_arch.
11038 case elfcpp::Tag_ABI_optimization_goals:
11039 case elfcpp::Tag_ABI_FP_optimization_goals:
11040 // Use the first value seen.
11043 case elfcpp::Tag_CPU_arch:
11045 unsigned int saved_out_attr = out_attr->int_value();
11046 // Merge Tag_CPU_arch and Tag_also_compatible_with.
11047 int secondary_compat =
11048 this->get_secondary_compatible_arch(pasd);
11049 int secondary_compat_out =
11050 this->get_secondary_compatible_arch(
11051 this->attributes_section_data_);
11052 out_attr[i].set_int_value(
11053 tag_cpu_arch_combine(name, out_attr[i].int_value(),
11054 &secondary_compat_out,
11055 in_attr[i].int_value(),
11056 secondary_compat));
11057 this->set_secondary_compatible_arch(this->attributes_section_data_,
11058 secondary_compat_out);
11060 // Merge Tag_CPU_name and Tag_CPU_raw_name.
11061 if (out_attr[i].int_value() == saved_out_attr)
11062 ; // Leave the names alone.
11063 else if (out_attr[i].int_value() == in_attr[i].int_value())
11065 // The output architecture has been changed to match the
11066 // input architecture. Use the input names.
11067 out_attr[elfcpp::Tag_CPU_name].set_string_value(
11068 in_attr[elfcpp::Tag_CPU_name].string_value());
11069 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
11070 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
11074 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
11075 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
11078 // If we still don't have a value for Tag_CPU_name,
11079 // make one up now. Tag_CPU_raw_name remains blank.
11080 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
11082 const std::string cpu_name =
11083 this->tag_cpu_name_value(out_attr[i].int_value());
11084 // FIXME: If we see an unknown CPU, this will be set
11085 // to "<unknown CPU n>", where n is the attribute value.
11086 // This is different from BFD, which leaves the name alone.
11087 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
11092 case elfcpp::Tag_ARM_ISA_use:
11093 case elfcpp::Tag_THUMB_ISA_use:
11094 case elfcpp::Tag_WMMX_arch:
11095 case elfcpp::Tag_Advanced_SIMD_arch:
11096 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11097 case elfcpp::Tag_ABI_FP_rounding:
11098 case elfcpp::Tag_ABI_FP_exceptions:
11099 case elfcpp::Tag_ABI_FP_user_exceptions:
11100 case elfcpp::Tag_ABI_FP_number_model:
11101 case elfcpp::Tag_VFP_HP_extension:
11102 case elfcpp::Tag_CPU_unaligned_access:
11103 case elfcpp::Tag_T2EE_use:
11104 case elfcpp::Tag_Virtualization_use:
11105 case elfcpp::Tag_MPextension_use:
11106 // Use the largest value specified.
11107 if (in_attr[i].int_value() > out_attr[i].int_value())
11108 out_attr[i].set_int_value(in_attr[i].int_value());
11111 case elfcpp::Tag_ABI_align8_preserved:
11112 case elfcpp::Tag_ABI_PCS_RO_data:
11113 // Use the smallest value specified.
11114 if (in_attr[i].int_value() < out_attr[i].int_value())
11115 out_attr[i].set_int_value(in_attr[i].int_value());
11118 case elfcpp::Tag_ABI_align8_needed:
11119 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
11120 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
11121 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
11124 // This error message should be enabled once all non-conforming
11125 // binaries in the toolchain have had the attributes set
11127 // gold_error(_("output 8-byte data alignment conflicts with %s"),
11131 case elfcpp::Tag_ABI_FP_denormal:
11132 case elfcpp::Tag_ABI_PCS_GOT_use:
11134 // These tags have 0 = don't care, 1 = strong requirement,
11135 // 2 = weak requirement.
11136 static const int order_021[3] = {0, 2, 1};
11138 // Use the "greatest" from the sequence 0, 2, 1, or the largest
11139 // value if greater than 2 (for future-proofing).
11140 if ((in_attr[i].int_value() > 2
11141 && in_attr[i].int_value() > out_attr[i].int_value())
11142 || (in_attr[i].int_value() <= 2
11143 && out_attr[i].int_value() <= 2
11144 && (order_021[in_attr[i].int_value()]
11145 > order_021[out_attr[i].int_value()])))
11146 out_attr[i].set_int_value(in_attr[i].int_value());
11150 case elfcpp::Tag_CPU_arch_profile:
11151 if (out_attr[i].int_value() != in_attr[i].int_value())
11153 // 0 will merge with anything.
11154 // 'A' and 'S' merge to 'A'.
11155 // 'R' and 'S' merge to 'R'.
11156 // 'M' and 'A|R|S' is an error.
11157 if (out_attr[i].int_value() == 0
11158 || (out_attr[i].int_value() == 'S'
11159 && (in_attr[i].int_value() == 'A'
11160 || in_attr[i].int_value() == 'R')))
11161 out_attr[i].set_int_value(in_attr[i].int_value());
11162 else if (in_attr[i].int_value() == 0
11163 || (in_attr[i].int_value() == 'S'
11164 && (out_attr[i].int_value() == 'A'
11165 || out_attr[i].int_value() == 'R')))
11167 else if (parameters->options().warn_mismatch())
11170 (_("conflicting architecture profiles %c/%c"),
11171 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
11172 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
11176 case elfcpp::Tag_VFP_arch:
11178 static const struct
11182 } vfp_versions[7] =
11193 // Values greater than 6 aren't defined, so just pick the
11195 if (in_attr[i].int_value() > 6
11196 && in_attr[i].int_value() > out_attr[i].int_value())
11198 *out_attr = *in_attr;
11201 // The output uses the superset of input features
11202 // (ISA version) and registers.
11203 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
11204 vfp_versions[out_attr[i].int_value()].ver);
11205 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
11206 vfp_versions[out_attr[i].int_value()].regs);
11207 // This assumes all possible supersets are also a valid
11210 for (newval = 6; newval > 0; newval--)
11212 if (regs == vfp_versions[newval].regs
11213 && ver == vfp_versions[newval].ver)
11216 out_attr[i].set_int_value(newval);
11219 case elfcpp::Tag_PCS_config:
11220 if (out_attr[i].int_value() == 0)
11221 out_attr[i].set_int_value(in_attr[i].int_value());
11222 else if (in_attr[i].int_value() != 0
11223 && out_attr[i].int_value() != 0
11224 && parameters->options().warn_mismatch())
11226 // It's sometimes ok to mix different configs, so this is only
11228 gold_warning(_("%s: conflicting platform configuration"), name);
11231 case elfcpp::Tag_ABI_PCS_R9_use:
11232 if (in_attr[i].int_value() != out_attr[i].int_value()
11233 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
11234 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused
11235 && parameters->options().warn_mismatch())
11237 gold_error(_("%s: conflicting use of R9"), name);
11239 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
11240 out_attr[i].set_int_value(in_attr[i].int_value());
11242 case elfcpp::Tag_ABI_PCS_RW_data:
11243 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11244 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11245 != elfcpp::AEABI_R9_SB)
11246 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11247 != elfcpp::AEABI_R9_unused)
11248 && parameters->options().warn_mismatch())
11250 gold_error(_("%s: SB relative addressing conflicts with use "
11254 // Use the smallest value specified.
11255 if (in_attr[i].int_value() < out_attr[i].int_value())
11256 out_attr[i].set_int_value(in_attr[i].int_value());
11258 case elfcpp::Tag_ABI_PCS_wchar_t:
11259 if (out_attr[i].int_value()
11260 && in_attr[i].int_value()
11261 && out_attr[i].int_value() != in_attr[i].int_value()
11262 && parameters->options().warn_mismatch()
11263 && parameters->options().wchar_size_warning())
11265 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11266 "use %u-byte wchar_t; use of wchar_t values "
11267 "across objects may fail"),
11268 name, in_attr[i].int_value(),
11269 out_attr[i].int_value());
11271 else if (in_attr[i].int_value() && !out_attr[i].int_value())
11272 out_attr[i].set_int_value(in_attr[i].int_value());
11274 case elfcpp::Tag_ABI_enum_size:
11275 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
11277 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
11278 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
11280 // The existing object is compatible with anything.
11281 // Use whatever requirements the new object has.
11282 out_attr[i].set_int_value(in_attr[i].int_value());
11284 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
11285 && out_attr[i].int_value() != in_attr[i].int_value()
11286 && parameters->options().warn_mismatch()
11287 && parameters->options().enum_size_warning())
11289 unsigned int in_value = in_attr[i].int_value();
11290 unsigned int out_value = out_attr[i].int_value();
11291 gold_warning(_("%s uses %s enums yet the output is to use "
11292 "%s enums; use of enum values across objects "
11295 this->aeabi_enum_name(in_value).c_str(),
11296 this->aeabi_enum_name(out_value).c_str());
11300 case elfcpp::Tag_ABI_VFP_args:
11303 case elfcpp::Tag_ABI_WMMX_args:
11304 if (in_attr[i].int_value() != out_attr[i].int_value()
11305 && parameters->options().warn_mismatch())
11307 gold_error(_("%s uses iWMMXt register arguments, output does "
11312 case Object_attribute::Tag_compatibility:
11313 // Merged in target-independent code.
11315 case elfcpp::Tag_ABI_HardFP_use:
11316 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11317 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
11318 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
11319 out_attr[i].set_int_value(3);
11320 else if (in_attr[i].int_value() > out_attr[i].int_value())
11321 out_attr[i].set_int_value(in_attr[i].int_value());
11323 case elfcpp::Tag_ABI_FP_16bit_format:
11324 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
11326 if (in_attr[i].int_value() != out_attr[i].int_value()
11327 && parameters->options().warn_mismatch())
11328 gold_error(_("fp16 format mismatch between %s and output"),
11331 if (in_attr[i].int_value() != 0)
11332 out_attr[i].set_int_value(in_attr[i].int_value());
11335 case elfcpp::Tag_DIV_use:
11337 // A value of zero on input means that the divide
11338 // instruction may be used if available in the base
11339 // architecture as specified via Tag_CPU_arch and
11340 // Tag_CPU_arch_profile. A value of 1 means that the user
11341 // did not want divide instructions. A value of 2
11342 // explicitly means that divide instructions were allowed
11343 // in ARM and Thumb state.
11345 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)->
11347 int profile = this->
11348 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)->
11350 if (in_attr[i].int_value() == out_attr[i].int_value())
11354 else if (attributes_forbid_div(&in_attr[i])
11355 && !attributes_accept_div(arch, profile, &out_attr[i]))
11356 out_attr[i].set_int_value(1);
11357 else if (attributes_forbid_div(&out_attr[i])
11358 && attributes_accept_div(arch, profile, &in_attr[i]))
11359 out_attr[i].set_int_value(in_attr[i].int_value());
11360 else if (in_attr[i].int_value() == 2)
11361 out_attr[i].set_int_value(in_attr[i].int_value());
11365 case elfcpp::Tag_MPextension_use_legacy:
11366 // We don't output objects with Tag_MPextension_use_legacy - we
11367 // move the value to Tag_MPextension_use.
11368 if (in_attr[i].int_value() != 0
11369 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0)
11371 if (in_attr[elfcpp::Tag_MPextension_use].int_value()
11372 != in_attr[i].int_value())
11374 gold_error(_("%s has has both the current and legacy "
11375 "Tag_MPextension_use attributes"),
11380 if (in_attr[i].int_value()
11381 > out_attr[elfcpp::Tag_MPextension_use].int_value())
11382 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i];
11386 case elfcpp::Tag_nodefaults:
11387 // This tag is set if it exists, but the value is unused (and is
11388 // typically zero). We don't actually need to do anything here -
11389 // the merge happens automatically when the type flags are merged
11392 case elfcpp::Tag_also_compatible_with:
11393 // Already done in Tag_CPU_arch.
11395 case elfcpp::Tag_conformance:
11396 // Keep the attribute if it matches. Throw it away otherwise.
11397 // No attribute means no claim to conform.
11398 if (in_attr[i].string_value() != out_attr[i].string_value())
11399 out_attr[i].set_string_value("");
11404 const char* err_object = NULL;
11406 // The "known_obj_attributes" table does contain some undefined
11407 // attributes. Ensure that there are unused.
11408 if (out_attr[i].int_value() != 0
11409 || out_attr[i].string_value() != "")
11410 err_object = "output";
11411 else if (in_attr[i].int_value() != 0
11412 || in_attr[i].string_value() != "")
11415 if (err_object != NULL
11416 && parameters->options().warn_mismatch())
11418 // Attribute numbers >=64 (mod 128) can be safely ignored.
11419 if ((i & 127) < 64)
11420 gold_error(_("%s: unknown mandatory EABI object attribute "
11424 gold_warning(_("%s: unknown EABI object attribute %d"),
11428 // Only pass on attributes that match in both inputs.
11429 if (!in_attr[i].matches(out_attr[i]))
11431 out_attr[i].set_int_value(0);
11432 out_attr[i].set_string_value("");
11437 // If out_attr was copied from in_attr then it won't have a type yet.
11438 if (in_attr[i].type() && !out_attr[i].type())
11439 out_attr[i].set_type(in_attr[i].type());
11442 // Merge Tag_compatibility attributes and any common GNU ones.
11443 this->attributes_section_data_->merge(name, pasd);
11445 // Check for any attributes not known on ARM.
11446 typedef Vendor_object_attributes::Other_attributes Other_attributes;
11447 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
11448 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
11449 Other_attributes* out_other_attributes =
11450 this->attributes_section_data_->other_attributes(vendor);
11451 Other_attributes::iterator out_iter = out_other_attributes->begin();
11453 while (in_iter != in_other_attributes->end()
11454 || out_iter != out_other_attributes->end())
11456 const char* err_object = NULL;
11459 // The tags for each list are in numerical order.
11460 // If the tags are equal, then merge.
11461 if (out_iter != out_other_attributes->end()
11462 && (in_iter == in_other_attributes->end()
11463 || in_iter->first > out_iter->first))
11465 // This attribute only exists in output. We can't merge, and we
11466 // don't know what the tag means, so delete it.
11467 err_object = "output";
11468 err_tag = out_iter->first;
11469 int saved_tag = out_iter->first;
11470 delete out_iter->second;
11471 out_other_attributes->erase(out_iter);
11472 out_iter = out_other_attributes->upper_bound(saved_tag);
11474 else if (in_iter != in_other_attributes->end()
11475 && (out_iter != out_other_attributes->end()
11476 || in_iter->first < out_iter->first))
11478 // This attribute only exists in input. We can't merge, and we
11479 // don't know what the tag means, so ignore it.
11481 err_tag = in_iter->first;
11484 else // The tags are equal.
11486 // As present, all attributes in the list are unknown, and
11487 // therefore can't be merged meaningfully.
11488 err_object = "output";
11489 err_tag = out_iter->first;
11491 // Only pass on attributes that match in both inputs.
11492 if (!in_iter->second->matches(*(out_iter->second)))
11494 // No match. Delete the attribute.
11495 int saved_tag = out_iter->first;
11496 delete out_iter->second;
11497 out_other_attributes->erase(out_iter);
11498 out_iter = out_other_attributes->upper_bound(saved_tag);
11502 // Matched. Keep the attribute and move to the next.
11508 if (err_object && parameters->options().warn_mismatch())
11510 // Attribute numbers >=64 (mod 128) can be safely ignored. */
11511 if ((err_tag & 127) < 64)
11513 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11514 err_object, err_tag);
11518 gold_warning(_("%s: unknown EABI object attribute %d"),
11519 err_object, err_tag);
11525 // Stub-generation methods for Target_arm.
11527 // Make a new Arm_input_section object.
11529 template<bool big_endian>
11530 Arm_input_section<big_endian>*
11531 Target_arm<big_endian>::new_arm_input_section(
11533 unsigned int shndx)
11535 Section_id sid(relobj, shndx);
11537 Arm_input_section<big_endian>* arm_input_section =
11538 new Arm_input_section<big_endian>(relobj, shndx);
11539 arm_input_section->init();
11541 // Register new Arm_input_section in map for look-up.
11542 std::pair<typename Arm_input_section_map::iterator, bool> ins =
11543 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
11545 // Make sure that it we have not created another Arm_input_section
11546 // for this input section already.
11547 gold_assert(ins.second);
11549 return arm_input_section;
11552 // Find the Arm_input_section object corresponding to the SHNDX-th input
11553 // section of RELOBJ.
11555 template<bool big_endian>
11556 Arm_input_section<big_endian>*
11557 Target_arm<big_endian>::find_arm_input_section(
11559 unsigned int shndx) const
11561 Section_id sid(relobj, shndx);
11562 typename Arm_input_section_map::const_iterator p =
11563 this->arm_input_section_map_.find(sid);
11564 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
11567 // Make a new stub table.
11569 template<bool big_endian>
11570 Stub_table<big_endian>*
11571 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
11573 Stub_table<big_endian>* stub_table =
11574 new Stub_table<big_endian>(owner);
11575 this->stub_tables_.push_back(stub_table);
11577 stub_table->set_address(owner->address() + owner->data_size());
11578 stub_table->set_file_offset(owner->offset() + owner->data_size());
11579 stub_table->finalize_data_size();
11584 // Scan a relocation for stub generation.
11586 template<bool big_endian>
11588 Target_arm<big_endian>::scan_reloc_for_stub(
11589 const Relocate_info<32, big_endian>* relinfo,
11590 unsigned int r_type,
11591 const Sized_symbol<32>* gsym,
11592 unsigned int r_sym,
11593 const Symbol_value<32>* psymval,
11594 elfcpp::Elf_types<32>::Elf_Swxword addend,
11595 Arm_address address)
11597 const Arm_relobj<big_endian>* arm_relobj =
11598 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11600 bool target_is_thumb;
11601 Symbol_value<32> symval;
11604 // This is a global symbol. Determine if we use PLT and if the
11605 // final target is THUMB.
11606 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
11608 // This uses a PLT, change the symbol value.
11609 symval.set_output_value(this->plt_address_for_global(gsym));
11611 target_is_thumb = false;
11613 else if (gsym->is_undefined())
11614 // There is no need to generate a stub symbol is undefined.
11619 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
11620 || (gsym->type() == elfcpp::STT_FUNC
11621 && !gsym->is_undefined()
11622 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
11627 // This is a local symbol. Determine if the final target is THUMB.
11628 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
11631 // Strip LSB if this points to a THUMB target.
11632 const Arm_reloc_property* reloc_property =
11633 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
11634 gold_assert(reloc_property != NULL);
11635 if (target_is_thumb
11636 && reloc_property->uses_thumb_bit()
11637 && ((psymval->value(arm_relobj, 0) & 1) != 0))
11639 Arm_address stripped_value =
11640 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
11641 symval.set_output_value(stripped_value);
11645 // Get the symbol value.
11646 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
11648 // Owing to pipelining, the PC relative branches below actually skip
11649 // two instructions when the branch offset is 0.
11650 Arm_address destination;
11653 case elfcpp::R_ARM_CALL:
11654 case elfcpp::R_ARM_JUMP24:
11655 case elfcpp::R_ARM_PLT32:
11657 destination = value + addend + 8;
11659 case elfcpp::R_ARM_THM_CALL:
11660 case elfcpp::R_ARM_THM_XPC22:
11661 case elfcpp::R_ARM_THM_JUMP24:
11662 case elfcpp::R_ARM_THM_JUMP19:
11664 destination = value + addend + 4;
11667 gold_unreachable();
11670 Reloc_stub* stub = NULL;
11671 Stub_type stub_type =
11672 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
11674 if (stub_type != arm_stub_none)
11676 // Try looking up an existing stub from a stub table.
11677 Stub_table<big_endian>* stub_table =
11678 arm_relobj->stub_table(relinfo->data_shndx);
11679 gold_assert(stub_table != NULL);
11681 // Locate stub by destination.
11682 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
11684 // Create a stub if there is not one already
11685 stub = stub_table->find_reloc_stub(stub_key);
11688 // create a new stub and add it to stub table.
11689 stub = this->stub_factory().make_reloc_stub(stub_type);
11690 stub_table->add_reloc_stub(stub, stub_key);
11693 // Record the destination address.
11694 stub->set_destination_address(destination
11695 | (target_is_thumb ? 1 : 0));
11698 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11699 if (this->fix_cortex_a8_
11700 && (r_type == elfcpp::R_ARM_THM_JUMP24
11701 || r_type == elfcpp::R_ARM_THM_JUMP19
11702 || r_type == elfcpp::R_ARM_THM_CALL
11703 || r_type == elfcpp::R_ARM_THM_XPC22)
11704 && (address & 0xfffU) == 0xffeU)
11706 // Found a candidate. Note we haven't checked the destination is
11707 // within 4K here: if we do so (and don't create a record) we can't
11708 // tell that a branch should have been relocated when scanning later.
11709 this->cortex_a8_relocs_info_[address] =
11710 new Cortex_a8_reloc(stub, r_type,
11711 destination | (target_is_thumb ? 1 : 0));
11715 // This function scans a relocation sections for stub generation.
11716 // The template parameter Relocate must be a class type which provides
11717 // a single function, relocate(), which implements the machine
11718 // specific part of a relocation.
11720 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11721 // SHT_REL or SHT_RELA.
11723 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11724 // of relocs. OUTPUT_SECTION is the output section.
11725 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11726 // mapped to output offsets.
11728 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11729 // VIEW_SIZE is the size. These refer to the input section, unless
11730 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11731 // the output section.
11733 template<bool big_endian>
11734 template<int sh_type>
11736 Target_arm<big_endian>::scan_reloc_section_for_stubs(
11737 const Relocate_info<32, big_endian>* relinfo,
11738 const unsigned char* prelocs,
11739 size_t reloc_count,
11740 Output_section* output_section,
11741 bool needs_special_offset_handling,
11742 const unsigned char* view,
11743 elfcpp::Elf_types<32>::Elf_Addr view_address,
11746 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
11747 const int reloc_size =
11748 Reloc_types<sh_type, 32, big_endian>::reloc_size;
11750 Arm_relobj<big_endian>* arm_object =
11751 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11752 unsigned int local_count = arm_object->local_symbol_count();
11754 gold::Default_comdat_behavior default_comdat_behavior;
11755 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
11757 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
11759 Reltype reloc(prelocs);
11761 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
11762 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
11763 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
11765 r_type = this->get_real_reloc_type(r_type);
11767 // Only a few relocation types need stubs.
11768 if ((r_type != elfcpp::R_ARM_CALL)
11769 && (r_type != elfcpp::R_ARM_JUMP24)
11770 && (r_type != elfcpp::R_ARM_PLT32)
11771 && (r_type != elfcpp::R_ARM_THM_CALL)
11772 && (r_type != elfcpp::R_ARM_THM_XPC22)
11773 && (r_type != elfcpp::R_ARM_THM_JUMP24)
11774 && (r_type != elfcpp::R_ARM_THM_JUMP19)
11775 && (r_type != elfcpp::R_ARM_V4BX))
11778 section_offset_type offset =
11779 convert_to_section_size_type(reloc.get_r_offset());
11781 if (needs_special_offset_handling)
11783 offset = output_section->output_offset(relinfo->object,
11784 relinfo->data_shndx,
11790 // Create a v4bx stub if --fix-v4bx-interworking is used.
11791 if (r_type == elfcpp::R_ARM_V4BX)
11793 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING)
11795 // Get the BX instruction.
11796 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
11797 const Valtype* wv =
11798 reinterpret_cast<const Valtype*>(view + offset);
11799 elfcpp::Elf_types<32>::Elf_Swxword insn =
11800 elfcpp::Swap<32, big_endian>::readval(wv);
11801 const uint32_t reg = (insn & 0xf);
11805 // Try looking up an existing stub from a stub table.
11806 Stub_table<big_endian>* stub_table =
11807 arm_object->stub_table(relinfo->data_shndx);
11808 gold_assert(stub_table != NULL);
11810 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
11812 // create a new stub and add it to stub table.
11813 Arm_v4bx_stub* stub =
11814 this->stub_factory().make_arm_v4bx_stub(reg);
11815 gold_assert(stub != NULL);
11816 stub_table->add_arm_v4bx_stub(stub);
11824 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
11825 elfcpp::Elf_types<32>::Elf_Swxword addend =
11826 stub_addend_reader(r_type, view + offset, reloc);
11828 const Sized_symbol<32>* sym;
11830 Symbol_value<32> symval;
11831 const Symbol_value<32> *psymval;
11832 bool is_defined_in_discarded_section;
11833 unsigned int shndx;
11834 if (r_sym < local_count)
11837 psymval = arm_object->local_symbol(r_sym);
11839 // If the local symbol belongs to a section we are discarding,
11840 // and that section is a debug section, try to find the
11841 // corresponding kept section and map this symbol to its
11842 // counterpart in the kept section. The symbol must not
11843 // correspond to a section we are folding.
11845 shndx = psymval->input_shndx(&is_ordinary);
11846 is_defined_in_discarded_section =
11848 && shndx != elfcpp::SHN_UNDEF
11849 && !arm_object->is_section_included(shndx)
11850 && !relinfo->symtab->is_section_folded(arm_object, shndx));
11852 // We need to compute the would-be final value of this local
11854 if (!is_defined_in_discarded_section)
11856 typedef Sized_relobj_file<32, big_endian> ObjType;
11857 typename ObjType::Compute_final_local_value_status status =
11858 arm_object->compute_final_local_value(r_sym, psymval, &symval,
11860 if (status == ObjType::CFLV_OK)
11862 // Currently we cannot handle a branch to a target in
11863 // a merged section. If this is the case, issue an error
11864 // and also free the merge symbol value.
11865 if (!symval.has_output_value())
11867 const std::string& section_name =
11868 arm_object->section_name(shndx);
11869 arm_object->error(_("cannot handle branch to local %u "
11870 "in a merged section %s"),
11871 r_sym, section_name.c_str());
11877 // We cannot determine the final value.
11884 const Symbol* gsym;
11885 gsym = arm_object->global_symbol(r_sym);
11886 gold_assert(gsym != NULL);
11887 if (gsym->is_forwarder())
11888 gsym = relinfo->symtab->resolve_forwards(gsym);
11890 sym = static_cast<const Sized_symbol<32>*>(gsym);
11891 if (sym->has_symtab_index() && sym->symtab_index() != -1U)
11892 symval.set_output_symtab_index(sym->symtab_index());
11894 symval.set_no_output_symtab_entry();
11896 // We need to compute the would-be final value of this global
11898 const Symbol_table* symtab = relinfo->symtab;
11899 const Sized_symbol<32>* sized_symbol =
11900 symtab->get_sized_symbol<32>(gsym);
11901 Symbol_table::Compute_final_value_status status;
11902 Arm_address value =
11903 symtab->compute_final_value<32>(sized_symbol, &status);
11905 // Skip this if the symbol has not output section.
11906 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
11908 symval.set_output_value(value);
11910 if (gsym->type() == elfcpp::STT_TLS)
11911 symval.set_is_tls_symbol();
11912 else if (gsym->type() == elfcpp::STT_GNU_IFUNC)
11913 symval.set_is_ifunc_symbol();
11916 is_defined_in_discarded_section =
11917 (gsym->is_defined_in_discarded_section()
11918 && gsym->is_undefined());
11922 Symbol_value<32> symval2;
11923 if (is_defined_in_discarded_section)
11925 if (comdat_behavior == CB_UNDETERMINED)
11927 std::string name = arm_object->section_name(relinfo->data_shndx);
11928 comdat_behavior = default_comdat_behavior.get(name.c_str());
11930 if (comdat_behavior == CB_PRETEND)
11932 // FIXME: This case does not work for global symbols.
11933 // We have no place to store the original section index.
11934 // Fortunately this does not matter for comdat sections,
11935 // only for sections explicitly discarded by a linker
11938 typename elfcpp::Elf_types<32>::Elf_Addr value =
11939 arm_object->map_to_kept_section(shndx, &found);
11941 symval2.set_output_value(value + psymval->input_value());
11943 symval2.set_output_value(0);
11947 if (comdat_behavior == CB_WARNING)
11948 gold_warning_at_location(relinfo, i, offset,
11949 _("relocation refers to discarded "
11951 symval2.set_output_value(0);
11953 symval2.set_no_output_symtab_entry();
11954 psymval = &symval2;
11957 // If symbol is a section symbol, we don't know the actual type of
11958 // destination. Give up.
11959 if (psymval->is_section_symbol())
11962 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
11963 addend, view_address + offset);
11967 // Scan an input section for stub generation.
11969 template<bool big_endian>
11971 Target_arm<big_endian>::scan_section_for_stubs(
11972 const Relocate_info<32, big_endian>* relinfo,
11973 unsigned int sh_type,
11974 const unsigned char* prelocs,
11975 size_t reloc_count,
11976 Output_section* output_section,
11977 bool needs_special_offset_handling,
11978 const unsigned char* view,
11979 Arm_address view_address,
11980 section_size_type view_size)
11982 if (sh_type == elfcpp::SHT_REL)
11983 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
11988 needs_special_offset_handling,
11992 else if (sh_type == elfcpp::SHT_RELA)
11993 // We do not support RELA type relocations yet. This is provided for
11995 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
12000 needs_special_offset_handling,
12005 gold_unreachable();
12008 // Group input sections for stub generation.
12010 // We group input sections in an output section so that the total size,
12011 // including any padding space due to alignment is smaller than GROUP_SIZE
12012 // unless the only input section in group is bigger than GROUP_SIZE already.
12013 // Then an ARM stub table is created to follow the last input section
12014 // in group. For each group an ARM stub table is created an is placed
12015 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
12016 // extend the group after the stub table.
12018 template<bool big_endian>
12020 Target_arm<big_endian>::group_sections(
12022 section_size_type group_size,
12023 bool stubs_always_after_branch,
12026 // Group input sections and insert stub table
12027 Layout::Section_list section_list;
12028 layout->get_executable_sections(§ion_list);
12029 for (Layout::Section_list::const_iterator p = section_list.begin();
12030 p != section_list.end();
12033 Arm_output_section<big_endian>* output_section =
12034 Arm_output_section<big_endian>::as_arm_output_section(*p);
12035 output_section->group_sections(group_size, stubs_always_after_branch,
12040 // Relaxation hook. This is where we do stub generation.
12042 template<bool big_endian>
12044 Target_arm<big_endian>::do_relax(
12046 const Input_objects* input_objects,
12047 Symbol_table* symtab,
12051 // No need to generate stubs if this is a relocatable link.
12052 gold_assert(!parameters->options().relocatable());
12054 // If this is the first pass, we need to group input sections into
12056 bool done_exidx_fixup = false;
12057 typedef typename Stub_table_list::iterator Stub_table_iterator;
12060 // Determine the stub group size. The group size is the absolute
12061 // value of the parameter --stub-group-size. If --stub-group-size
12062 // is passed a negative value, we restrict stubs to be always after
12063 // the stubbed branches.
12064 int32_t stub_group_size_param =
12065 parameters->options().stub_group_size();
12066 bool stubs_always_after_branch = stub_group_size_param < 0;
12067 section_size_type stub_group_size = abs(stub_group_size_param);
12069 if (stub_group_size == 1)
12072 // Thumb branch range is +-4MB has to be used as the default
12073 // maximum size (a given section can contain both ARM and Thumb
12074 // code, so the worst case has to be taken into account). If we are
12075 // fixing cortex-a8 errata, the branch range has to be even smaller,
12076 // since wide conditional branch has a range of +-1MB only.
12078 // This value is 48K less than that, which allows for 4096
12079 // 12-byte stubs. If we exceed that, then we will fail to link.
12080 // The user will have to relink with an explicit group size
12082 stub_group_size = 4145152;
12085 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12086 // page as the first half of a 32-bit branch straddling two 4K pages.
12087 // This is a crude way of enforcing that. In addition, long conditional
12088 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
12089 // erratum, limit the group size to (1M - 12k) to avoid unreachable
12090 // cortex-A8 stubs from long conditional branches.
12091 if (this->fix_cortex_a8_)
12093 stubs_always_after_branch = true;
12094 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12);
12095 stub_group_size = std::max(stub_group_size, cortex_a8_group_size);
12098 group_sections(layout, stub_group_size, stubs_always_after_branch, task);
12100 // Also fix .ARM.exidx section coverage.
12101 Arm_output_section<big_endian>* exidx_output_section = NULL;
12102 for (Layout::Section_list::const_iterator p =
12103 layout->section_list().begin();
12104 p != layout->section_list().end();
12106 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
12108 if (exidx_output_section == NULL)
12109 exidx_output_section =
12110 Arm_output_section<big_endian>::as_arm_output_section(*p);
12112 // We cannot handle this now.
12113 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12114 "non-relocatable link"),
12115 exidx_output_section->name(),
12119 if (exidx_output_section != NULL)
12121 this->fix_exidx_coverage(layout, input_objects, exidx_output_section,
12123 done_exidx_fixup = true;
12128 // If this is not the first pass, addresses and file offsets have
12129 // been reset at this point, set them here.
12130 for (Stub_table_iterator sp = this->stub_tables_.begin();
12131 sp != this->stub_tables_.end();
12134 Arm_input_section<big_endian>* owner = (*sp)->owner();
12135 off_t off = align_address(owner->original_size(),
12136 (*sp)->addralign());
12137 (*sp)->set_address_and_file_offset(owner->address() + off,
12138 owner->offset() + off);
12142 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
12143 // beginning of each relaxation pass, just blow away all the stubs.
12144 // Alternatively, we could selectively remove only the stubs and reloc
12145 // information for code sections that have moved since the last pass.
12146 // That would require more book-keeping.
12147 if (this->fix_cortex_a8_)
12149 // Clear all Cortex-A8 reloc information.
12150 for (typename Cortex_a8_relocs_info::const_iterator p =
12151 this->cortex_a8_relocs_info_.begin();
12152 p != this->cortex_a8_relocs_info_.end();
12155 this->cortex_a8_relocs_info_.clear();
12157 // Remove all Cortex-A8 stubs.
12158 for (Stub_table_iterator sp = this->stub_tables_.begin();
12159 sp != this->stub_tables_.end();
12161 (*sp)->remove_all_cortex_a8_stubs();
12164 // Scan relocs for relocation stubs
12165 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12166 op != input_objects->relobj_end();
12169 Arm_relobj<big_endian>* arm_relobj =
12170 Arm_relobj<big_endian>::as_arm_relobj(*op);
12171 // Lock the object so we can read from it. This is only called
12172 // single-threaded from Layout::finalize, so it is OK to lock.
12173 Task_lock_obj<Object> tl(task, arm_relobj);
12174 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
12177 // Check all stub tables to see if any of them have their data sizes
12178 // or addresses alignments changed. These are the only things that
12180 bool any_stub_table_changed = false;
12181 Unordered_set<const Output_section*> sections_needing_adjustment;
12182 for (Stub_table_iterator sp = this->stub_tables_.begin();
12183 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12186 if ((*sp)->update_data_size_and_addralign())
12188 // Update data size of stub table owner.
12189 Arm_input_section<big_endian>* owner = (*sp)->owner();
12190 uint64_t address = owner->address();
12191 off_t offset = owner->offset();
12192 owner->reset_address_and_file_offset();
12193 owner->set_address_and_file_offset(address, offset);
12195 sections_needing_adjustment.insert(owner->output_section());
12196 any_stub_table_changed = true;
12200 // Output_section_data::output_section() returns a const pointer but we
12201 // need to update output sections, so we record all output sections needing
12202 // update above and scan the sections here to find out what sections need
12204 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
12205 p != layout->section_list().end();
12208 if (sections_needing_adjustment.find(*p)
12209 != sections_needing_adjustment.end())
12210 (*p)->set_section_offsets_need_adjustment();
12213 // Stop relaxation if no EXIDX fix-up and no stub table change.
12214 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
12216 // Finalize the stubs in the last relaxation pass.
12217 if (!continue_relaxation)
12219 for (Stub_table_iterator sp = this->stub_tables_.begin();
12220 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12222 (*sp)->finalize_stubs();
12224 // Update output local symbol counts of objects if necessary.
12225 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12226 op != input_objects->relobj_end();
12229 Arm_relobj<big_endian>* arm_relobj =
12230 Arm_relobj<big_endian>::as_arm_relobj(*op);
12232 // Update output local symbol counts. We need to discard local
12233 // symbols defined in parts of input sections that are discarded by
12235 if (arm_relobj->output_local_symbol_count_needs_update())
12237 // We need to lock the object's file to update it.
12238 Task_lock_obj<Object> tl(task, arm_relobj);
12239 arm_relobj->update_output_local_symbol_count();
12244 return continue_relaxation;
12247 // Relocate a stub.
12249 template<bool big_endian>
12251 Target_arm<big_endian>::relocate_stub(
12253 const Relocate_info<32, big_endian>* relinfo,
12254 Output_section* output_section,
12255 unsigned char* view,
12256 Arm_address address,
12257 section_size_type view_size)
12260 const Stub_template* stub_template = stub->stub_template();
12261 for (size_t i = 0; i < stub_template->reloc_count(); i++)
12263 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
12264 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
12266 unsigned int r_type = insn->r_type();
12267 section_size_type reloc_offset = stub_template->reloc_offset(i);
12268 section_size_type reloc_size = insn->size();
12269 gold_assert(reloc_offset + reloc_size <= view_size);
12271 // This is the address of the stub destination.
12272 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
12273 Symbol_value<32> symval;
12274 symval.set_output_value(target);
12276 // Synthesize a fake reloc just in case. We don't have a symbol so
12278 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
12279 memset(reloc_buffer, 0, sizeof(reloc_buffer));
12280 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
12281 reloc_write.put_r_offset(reloc_offset);
12282 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
12283 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
12285 relocate.relocate(relinfo, this, output_section,
12286 this->fake_relnum_for_stubs, rel, r_type,
12287 NULL, &symval, view + reloc_offset,
12288 address + reloc_offset, reloc_size);
12292 // Determine whether an object attribute tag takes an integer, a
12295 template<bool big_endian>
12297 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
12299 if (tag == Object_attribute::Tag_compatibility)
12300 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12301 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
12302 else if (tag == elfcpp::Tag_nodefaults)
12303 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12304 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
12305 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
12306 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
12308 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
12310 return ((tag & 1) != 0
12311 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12312 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
12315 // Reorder attributes.
12317 // The ABI defines that Tag_conformance should be emitted first, and that
12318 // Tag_nodefaults should be second (if either is defined). This sets those
12319 // two positions, and bumps up the position of all the remaining tags to
12322 template<bool big_endian>
12324 Target_arm<big_endian>::do_attributes_order(int num) const
12326 // Reorder the known object attributes in output. We want to move
12327 // Tag_conformance to position 4 and Tag_conformance to position 5
12328 // and shift everything between 4 .. Tag_conformance - 1 to make room.
12330 return elfcpp::Tag_conformance;
12332 return elfcpp::Tag_nodefaults;
12333 if ((num - 2) < elfcpp::Tag_nodefaults)
12335 if ((num - 1) < elfcpp::Tag_conformance)
12340 // Scan a span of THUMB code for Cortex-A8 erratum.
12342 template<bool big_endian>
12344 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
12345 Arm_relobj<big_endian>* arm_relobj,
12346 unsigned int shndx,
12347 section_size_type span_start,
12348 section_size_type span_end,
12349 const unsigned char* view,
12350 Arm_address address)
12352 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12354 // The opcode is BLX.W, BL.W, B.W, Bcc.W
12355 // The branch target is in the same 4KB region as the
12356 // first half of the branch.
12357 // The instruction before the branch is a 32-bit
12358 // length non-branch instruction.
12359 section_size_type i = span_start;
12360 bool last_was_32bit = false;
12361 bool last_was_branch = false;
12362 while (i < span_end)
12364 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12365 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
12366 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
12367 bool is_blx = false, is_b = false;
12368 bool is_bl = false, is_bcc = false;
12370 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
12373 // Load the rest of the insn (in manual-friendly order).
12374 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
12376 // Encoding T4: B<c>.W.
12377 is_b = (insn & 0xf800d000U) == 0xf0009000U;
12378 // Encoding T1: BL<c>.W.
12379 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
12380 // Encoding T2: BLX<c>.W.
12381 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
12382 // Encoding T3: B<c>.W (not permitted in IT block).
12383 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
12384 && (insn & 0x07f00000U) != 0x03800000U);
12387 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
12389 // If this instruction is a 32-bit THUMB branch that crosses a 4K
12390 // page boundary and it follows 32-bit non-branch instruction,
12391 // we need to work around.
12392 if (is_32bit_branch
12393 && ((address + i) & 0xfffU) == 0xffeU
12395 && !last_was_branch)
12397 // Check to see if there is a relocation stub for this branch.
12398 bool force_target_arm = false;
12399 bool force_target_thumb = false;
12400 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
12401 Cortex_a8_relocs_info::const_iterator p =
12402 this->cortex_a8_relocs_info_.find(address + i);
12404 if (p != this->cortex_a8_relocs_info_.end())
12406 cortex_a8_reloc = p->second;
12407 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
12409 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12410 && !target_is_thumb)
12411 force_target_arm = true;
12412 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12413 && target_is_thumb)
12414 force_target_thumb = true;
12418 Stub_type stub_type = arm_stub_none;
12420 // Check if we have an offending branch instruction.
12421 uint16_t upper_insn = (insn >> 16) & 0xffffU;
12422 uint16_t lower_insn = insn & 0xffffU;
12423 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12425 if (cortex_a8_reloc != NULL
12426 && cortex_a8_reloc->reloc_stub() != NULL)
12427 // We've already made a stub for this instruction, e.g.
12428 // it's a long branch or a Thumb->ARM stub. Assume that
12429 // stub will suffice to work around the A8 erratum (see
12430 // setting of always_after_branch above).
12434 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
12436 stub_type = arm_stub_a8_veneer_b_cond;
12438 else if (is_b || is_bl || is_blx)
12440 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
12445 stub_type = (is_blx
12446 ? arm_stub_a8_veneer_blx
12448 ? arm_stub_a8_veneer_bl
12449 : arm_stub_a8_veneer_b));
12452 if (stub_type != arm_stub_none)
12454 Arm_address pc_for_insn = address + i + 4;
12456 // The original instruction is a BL, but the target is
12457 // an ARM instruction. If we were not making a stub,
12458 // the BL would have been converted to a BLX. Use the
12459 // BLX stub instead in that case.
12460 if (this->may_use_v5t_interworking() && force_target_arm
12461 && stub_type == arm_stub_a8_veneer_bl)
12463 stub_type = arm_stub_a8_veneer_blx;
12467 // Conversely, if the original instruction was
12468 // BLX but the target is Thumb mode, use the BL stub.
12469 else if (force_target_thumb
12470 && stub_type == arm_stub_a8_veneer_blx)
12472 stub_type = arm_stub_a8_veneer_bl;
12480 // If we found a relocation, use the proper destination,
12481 // not the offset in the (unrelocated) instruction.
12482 // Note this is always done if we switched the stub type above.
12483 if (cortex_a8_reloc != NULL)
12484 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
12486 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
12488 // Add a new stub if destination address in in the same page.
12489 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
12491 Cortex_a8_stub* stub =
12492 this->stub_factory_.make_cortex_a8_stub(stub_type,
12496 Stub_table<big_endian>* stub_table =
12497 arm_relobj->stub_table(shndx);
12498 gold_assert(stub_table != NULL);
12499 stub_table->add_cortex_a8_stub(address + i, stub);
12504 i += insn_32bit ? 4 : 2;
12505 last_was_32bit = insn_32bit;
12506 last_was_branch = is_32bit_branch;
12510 // Apply the Cortex-A8 workaround.
12512 template<bool big_endian>
12514 Target_arm<big_endian>::apply_cortex_a8_workaround(
12515 const Cortex_a8_stub* stub,
12516 Arm_address stub_address,
12517 unsigned char* insn_view,
12518 Arm_address insn_address)
12520 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12521 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
12522 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
12523 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
12524 off_t branch_offset = stub_address - (insn_address + 4);
12526 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12527 switch (stub->stub_template()->type())
12529 case arm_stub_a8_veneer_b_cond:
12530 // For a conditional branch, we re-write it to be an unconditional
12531 // branch to the stub. We use the THUMB-2 encoding here.
12532 upper_insn = 0xf000U;
12533 lower_insn = 0xb800U;
12535 case arm_stub_a8_veneer_b:
12536 case arm_stub_a8_veneer_bl:
12537 case arm_stub_a8_veneer_blx:
12538 if ((lower_insn & 0x5000U) == 0x4000U)
12539 // For a BLX instruction, make sure that the relocation is
12540 // rounded up to a word boundary. This follows the semantics of
12541 // the instruction which specifies that bit 1 of the target
12542 // address will come from bit 1 of the base address.
12543 branch_offset = (branch_offset + 2) & ~3;
12545 // Put BRANCH_OFFSET back into the insn.
12546 gold_assert(!Bits<25>::has_overflow32(branch_offset));
12547 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
12548 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
12552 gold_unreachable();
12555 // Put the relocated value back in the object file:
12556 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
12557 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
12560 // Target selector for ARM. Note this is never instantiated directly.
12561 // It's only used in Target_selector_arm_nacl, below.
12563 template<bool big_endian>
12564 class Target_selector_arm : public Target_selector
12567 Target_selector_arm()
12568 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
12569 (big_endian ? "elf32-bigarm" : "elf32-littlearm"),
12570 (big_endian ? "armelfb" : "armelf"))
12574 do_instantiate_target()
12575 { return new Target_arm<big_endian>(); }
12578 // Fix .ARM.exidx section coverage.
12580 template<bool big_endian>
12582 Target_arm<big_endian>::fix_exidx_coverage(
12584 const Input_objects* input_objects,
12585 Arm_output_section<big_endian>* exidx_section,
12586 Symbol_table* symtab,
12589 // We need to look at all the input sections in output in ascending
12590 // order of of output address. We do that by building a sorted list
12591 // of output sections by addresses. Then we looks at the output sections
12592 // in order. The input sections in an output section are already sorted
12593 // by addresses within the output section.
12595 typedef std::set<Output_section*, output_section_address_less_than>
12596 Sorted_output_section_list;
12597 Sorted_output_section_list sorted_output_sections;
12599 // Find out all the output sections of input sections pointed by
12600 // EXIDX input sections.
12601 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
12602 p != input_objects->relobj_end();
12605 Arm_relobj<big_endian>* arm_relobj =
12606 Arm_relobj<big_endian>::as_arm_relobj(*p);
12607 std::vector<unsigned int> shndx_list;
12608 arm_relobj->get_exidx_shndx_list(&shndx_list);
12609 for (size_t i = 0; i < shndx_list.size(); ++i)
12611 const Arm_exidx_input_section* exidx_input_section =
12612 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]);
12613 gold_assert(exidx_input_section != NULL);
12614 if (!exidx_input_section->has_errors())
12616 unsigned int text_shndx = exidx_input_section->link();
12617 Output_section* os = arm_relobj->output_section(text_shndx);
12618 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0)
12619 sorted_output_sections.insert(os);
12624 // Go over the output sections in ascending order of output addresses.
12625 typedef typename Arm_output_section<big_endian>::Text_section_list
12627 Text_section_list sorted_text_sections;
12628 for (typename Sorted_output_section_list::iterator p =
12629 sorted_output_sections.begin();
12630 p != sorted_output_sections.end();
12633 Arm_output_section<big_endian>* arm_output_section =
12634 Arm_output_section<big_endian>::as_arm_output_section(*p);
12635 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
12638 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab,
12639 merge_exidx_entries(), task);
12642 template<bool big_endian>
12644 Target_arm<big_endian>::do_define_standard_symbols(
12645 Symbol_table* symtab,
12648 // Handle the .ARM.exidx section.
12649 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
12651 if (exidx_section != NULL)
12653 // Create __exidx_start and __exidx_end symbols.
12654 symtab->define_in_output_data("__exidx_start",
12656 Symbol_table::PREDEFINED,
12660 elfcpp::STT_NOTYPE,
12661 elfcpp::STB_GLOBAL,
12662 elfcpp::STV_HIDDEN,
12664 false, // offset_is_from_end
12665 true); // only_if_ref
12667 symtab->define_in_output_data("__exidx_end",
12669 Symbol_table::PREDEFINED,
12673 elfcpp::STT_NOTYPE,
12674 elfcpp::STB_GLOBAL,
12675 elfcpp::STV_HIDDEN,
12677 true, // offset_is_from_end
12678 true); // only_if_ref
12682 // Define __exidx_start and __exidx_end even when .ARM.exidx
12683 // section is missing to match ld's behaviour.
12684 symtab->define_as_constant("__exidx_start", NULL,
12685 Symbol_table::PREDEFINED,
12686 0, 0, elfcpp::STT_OBJECT,
12687 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12689 symtab->define_as_constant("__exidx_end", NULL,
12690 Symbol_table::PREDEFINED,
12691 0, 0, elfcpp::STT_OBJECT,
12692 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12697 // NaCl variant. It uses different PLT contents.
12699 template<bool big_endian>
12700 class Output_data_plt_arm_nacl;
12702 template<bool big_endian>
12703 class Target_arm_nacl : public Target_arm<big_endian>
12707 : Target_arm<big_endian>(&arm_nacl_info)
12711 virtual Output_data_plt_arm<big_endian>*
12714 Arm_output_data_got<big_endian>* got,
12715 Output_data_space* got_plt,
12716 Output_data_space* got_irelative)
12717 { return new Output_data_plt_arm_nacl<big_endian>(
12718 layout, got, got_plt, got_irelative); }
12721 static const Target::Target_info arm_nacl_info;
12724 template<bool big_endian>
12725 const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info =
12728 big_endian, // is_big_endian
12729 elfcpp::EM_ARM, // machine_code
12730 false, // has_make_symbol
12731 false, // has_resolve
12732 false, // has_code_fill
12733 true, // is_default_stack_executable
12734 false, // can_icf_inline_merge_sections
12736 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12737 0x20000, // default_text_segment_address
12738 0x10000, // abi_pagesize (overridable by -z max-page-size)
12739 0x10000, // common_pagesize (overridable by -z common-page-size)
12740 true, // isolate_execinstr
12741 0x10000000, // rosegment_gap
12742 elfcpp::SHN_UNDEF, // small_common_shndx
12743 elfcpp::SHN_UNDEF, // large_common_shndx
12744 0, // small_common_section_flags
12745 0, // large_common_section_flags
12746 ".ARM.attributes", // attributes_section
12747 "aeabi", // attributes_vendor
12748 "_start", // entry_symbol_name
12749 32, // hash_entry_size
12752 template<bool big_endian>
12753 class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian>
12756 Output_data_plt_arm_nacl(
12758 Arm_output_data_got<big_endian>* got,
12759 Output_data_space* got_plt,
12760 Output_data_space* got_irelative)
12761 : Output_data_plt_arm<big_endian>(layout, 16, got, got_plt, got_irelative)
12765 // Return the offset of the first non-reserved PLT entry.
12766 virtual unsigned int
12767 do_first_plt_entry_offset() const
12768 { return sizeof(first_plt_entry); }
12770 // Return the size of a PLT entry.
12771 virtual unsigned int
12772 do_get_plt_entry_size() const
12773 { return sizeof(plt_entry); }
12776 do_fill_first_plt_entry(unsigned char* pov,
12777 Arm_address got_address,
12778 Arm_address plt_address);
12781 do_fill_plt_entry(unsigned char* pov,
12782 Arm_address got_address,
12783 Arm_address plt_address,
12784 unsigned int got_offset,
12785 unsigned int plt_offset);
12788 inline uint32_t arm_movw_immediate(uint32_t value)
12790 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
12793 inline uint32_t arm_movt_immediate(uint32_t value)
12795 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
12798 // Template for the first PLT entry.
12799 static const uint32_t first_plt_entry[16];
12801 // Template for subsequent PLT entries.
12802 static const uint32_t plt_entry[4];
12805 // The first entry in the PLT.
12806 template<bool big_endian>
12807 const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] =
12810 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12811 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12812 0xe08cc00f, // add ip, ip, pc
12813 0xe52dc008, // str ip, [sp, #-8]!
12815 0xe3ccc103, // bic ip, ip, #0xc0000000
12816 0xe59cc000, // ldr ip, [ip]
12817 0xe3ccc13f, // bic ip, ip, #0xc000000f
12818 0xe12fff1c, // bx ip
12824 0xe50dc004, // str ip, [sp, #-4]
12826 0xe3ccc103, // bic ip, ip, #0xc0000000
12827 0xe59cc000, // ldr ip, [ip]
12828 0xe3ccc13f, // bic ip, ip, #0xc000000f
12829 0xe12fff1c, // bx ip
12832 template<bool big_endian>
12834 Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry(
12835 unsigned char* pov,
12836 Arm_address got_address,
12837 Arm_address plt_address)
12839 // Write first PLT entry. All but first two words are constants.
12840 const size_t num_first_plt_words = (sizeof(first_plt_entry)
12841 / sizeof(first_plt_entry[0]));
12843 int32_t got_displacement = got_address + 8 - (plt_address + 16);
12845 elfcpp::Swap<32, big_endian>::writeval
12846 (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement));
12847 elfcpp::Swap<32, big_endian>::writeval
12848 (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement));
12850 for (size_t i = 2; i < num_first_plt_words; ++i)
12851 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
12854 // Subsequent entries in the PLT.
12856 template<bool big_endian>
12857 const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] =
12859 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12860 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12861 0xe08cc00f, // add ip, ip, pc
12862 0xea000000, // b .Lplt_tail
12865 template<bool big_endian>
12867 Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry(
12868 unsigned char* pov,
12869 Arm_address got_address,
12870 Arm_address plt_address,
12871 unsigned int got_offset,
12872 unsigned int plt_offset)
12874 // Calculate the displacement between the PLT slot and the
12875 // common tail that's part of the special initial PLT slot.
12876 int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t))
12877 - (plt_address + plt_offset
12878 + sizeof(plt_entry) + sizeof(uint32_t)));
12879 gold_assert((tail_displacement & 3) == 0);
12880 tail_displacement >>= 2;
12882 gold_assert ((tail_displacement & 0xff000000) == 0
12883 || (-tail_displacement & 0xff000000) == 0);
12885 // Calculate the displacement between the PLT slot and the entry
12886 // in the GOT. The offset accounts for the value produced by
12887 // adding to pc in the penultimate instruction of the PLT stub.
12888 const int32_t got_displacement = (got_address + got_offset
12889 - (plt_address + sizeof(plt_entry)));
12891 elfcpp::Swap<32, big_endian>::writeval
12892 (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement));
12893 elfcpp::Swap<32, big_endian>::writeval
12894 (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement));
12895 elfcpp::Swap<32, big_endian>::writeval
12896 (pov + 8, plt_entry[2]);
12897 elfcpp::Swap<32, big_endian>::writeval
12898 (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff));
12901 // Target selectors.
12903 template<bool big_endian>
12904 class Target_selector_arm_nacl
12905 : public Target_selector_nacl<Target_selector_arm<big_endian>,
12906 Target_arm_nacl<big_endian> >
12909 Target_selector_arm_nacl()
12910 : Target_selector_nacl<Target_selector_arm<big_endian>,
12911 Target_arm_nacl<big_endian> >(
12913 big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12914 big_endian ? "armelfb_nacl" : "armelf_nacl")
12918 Target_selector_arm_nacl<false> target_selector_arm;
12919 Target_selector_arm_nacl<true> target_selector_armbe;
12921 } // End anonymous namespace.