1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
36 #include "svga_format.h"
37 #include "svga_screen.h"
38 #include "svga_context.h"
39 #include "svga_resource_texture.h"
40 #include "svga_resource_buffer.h"
41 #include "svga_sampler_view.h"
42 #include "svga_winsys.h"
43 #include "svga_debug.h"
46 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
47 * know about primary surfaces. Find a better way to accomplish this.
49 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
53 svga_transfer_dma_band(struct svga_context *svga,
54 struct svga_transfer *st,
55 SVGA3dTransferType transfer,
56 unsigned y, unsigned h, unsigned srcy,
57 SVGA3dSurfaceDMAFlags flags)
59 struct svga_texture *texture = svga_texture(st->base.resource);
63 box.x = st->base.box.x;
65 box.z = st->base.box.z;
66 box.w = st->base.box.width;
73 if (st->base.resource->target == PIPE_TEXTURE_CUBE) {
74 st->face = st->base.box.z;
80 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
81 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
87 st->base.box.x + st->base.box.width,
90 util_format_get_blocksize(texture->b.b.format) * 8 /
91 (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format)));
93 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
95 svga_context_flush(svga, NULL);
96 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
97 assert(ret == PIPE_OK);
103 svga_transfer_dma(struct svga_context *svga,
104 struct svga_transfer *st,
105 SVGA3dTransferType transfer,
106 SVGA3dSurfaceDMAFlags flags)
108 struct svga_texture *texture = svga_texture(st->base.resource);
109 struct svga_screen *screen = svga_screen(texture->b.b.screen);
110 struct svga_winsys_screen *sws = screen->sws;
111 struct pipe_fence_handle *fence = NULL;
113 if (transfer == SVGA3D_READ_HOST_VRAM) {
114 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
117 /* Ensure any pending operations on host surfaces are queued on the command
120 svga_surfaces_flush( svga );
123 /* Do the DMA transfer in a single go */
125 svga_transfer_dma_band(svga, st, transfer,
126 st->base.box.y, st->base.box.height, 0,
129 if(transfer == SVGA3D_READ_HOST_VRAM) {
130 svga_context_flush(svga, &fence);
131 sws->fence_finish(sws, fence, 0);
132 sws->fence_reference(sws, &fence, NULL);
137 unsigned blockheight = util_format_get_blockheight(st->base.resource->format);
138 h = st->hw_nblocksy * blockheight;
140 for(y = 0; y < st->base.box.height; y += h) {
141 unsigned offset, length;
144 if (y + h > st->base.box.height)
145 h = st->base.box.height - y;
147 /* Transfer band must be aligned to pixel block boundaries */
148 assert(y % blockheight == 0);
149 assert(h % blockheight == 0);
151 offset = y * st->base.stride / blockheight;
152 length = h * st->base.stride / blockheight;
154 sw = (uint8_t *)st->swbuf + offset;
156 if (transfer == SVGA3D_WRITE_HOST_VRAM) {
157 unsigned usage = PIPE_TRANSFER_WRITE;
159 /* Wait for the previous DMAs to complete */
160 /* TODO: keep one DMA (at half the size) in the background */
162 svga_context_flush(svga, NULL);
163 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
166 hw = sws->buffer_map(sws, st->hwbuf, usage);
169 memcpy(hw, sw, length);
170 sws->buffer_unmap(sws, st->hwbuf);
174 svga_transfer_dma_band(svga, st, transfer, y, h, srcy, flags);
177 * Prevent the texture contents to be discarded on the next band
181 flags.discard = FALSE;
183 if(transfer == SVGA3D_READ_HOST_VRAM) {
184 svga_context_flush(svga, &fence);
185 sws->fence_finish(sws, fence, 0);
187 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
190 memcpy(sw, hw, length);
191 sws->buffer_unmap(sws, st->hwbuf);
200 svga_texture_get_handle(struct pipe_screen *screen,
201 struct pipe_resource *texture,
202 struct winsys_handle *whandle)
204 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
207 assert(svga_texture(texture)->key.cachable == 0);
208 svga_texture(texture)->key.cachable = 0;
209 stride = util_format_get_nblocksx(texture->format, texture->width0) *
210 util_format_get_blocksize(texture->format);
211 return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
216 svga_texture_destroy(struct pipe_screen *screen,
217 struct pipe_resource *pt)
219 struct svga_screen *ss = svga_screen(screen);
220 struct svga_texture *tex = (struct svga_texture *)pt;
222 ss->texture_timestamp++;
224 svga_sampler_view_reference(&tex->cached_view, NULL);
227 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
229 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
230 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
236 /* XXX: Still implementing this as if it was a screen function, but
237 * can now modify it to queue transfers on the context.
239 static struct pipe_transfer *
240 svga_texture_get_transfer(struct pipe_context *pipe,
241 struct pipe_resource *texture,
244 const struct pipe_box *box)
246 struct svga_context *svga = svga_context(pipe);
247 struct svga_screen *ss = svga_screen(pipe->screen);
248 struct svga_winsys_screen *sws = ss->sws;
249 struct svga_transfer *st;
250 unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width);
251 unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
253 /* We can't map texture storage directly */
254 if (usage & (PIPE_TRANSFER_MAP_DIRECTLY | PIPE_TRANSFER_MAP_PERMANENTLY))
257 assert(box->depth == 1);
258 st = CALLOC_STRUCT(svga_transfer);
262 pipe_resource_reference(&st->base.resource, texture);
263 st->base.level = level;
264 st->base.usage = usage;
266 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
267 st->base.layer_stride = 0;
269 st->hw_nblocksy = nblocksy;
271 st->hwbuf = svga_winsys_buffer_create(svga,
274 st->hw_nblocksy*st->base.stride);
275 while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
276 st->hwbuf = svga_winsys_buffer_create(svga,
279 st->hw_nblocksy*st->base.stride);
285 if(st->hw_nblocksy < nblocksy) {
286 /* We couldn't allocate a hardware buffer big enough for the transfer,
287 * so allocate regular malloc memory instead */
289 debug_printf("%s: failed to allocate %u KB of DMA, "
290 "splitting into %u x %u KB DMA transfers\n",
292 (nblocksy*st->base.stride + 1023)/1024,
293 (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
294 (st->hw_nblocksy*st->base.stride + 1023)/1024);
297 st->swbuf = MALLOC(nblocksy*st->base.stride);
302 if (usage & PIPE_TRANSFER_READ) {
303 SVGA3dSurfaceDMAFlags flags;
304 memset(&flags, 0, sizeof flags);
305 svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
311 sws->buffer_destroy(sws, st->hwbuf);
318 /* XXX: Still implementing this as if it was a screen function, but
319 * can now modify it to queue transfers on the context.
322 svga_texture_transfer_map( struct pipe_context *pipe,
323 struct pipe_transfer *transfer )
325 struct svga_screen *ss = svga_screen(pipe->screen);
326 struct svga_winsys_screen *sws = ss->sws;
327 struct svga_transfer *st = svga_transfer(transfer);
332 /* The wait for read transfers already happened when svga_transfer_dma
334 return sws->buffer_map(sws, st->hwbuf, transfer->usage);
338 /* XXX: Still implementing this as if it was a screen function, but
339 * can now modify it to queue transfers on the context.
342 svga_texture_transfer_unmap(struct pipe_context *pipe,
343 struct pipe_transfer *transfer)
345 struct svga_screen *ss = svga_screen(pipe->screen);
346 struct svga_winsys_screen *sws = ss->sws;
347 struct svga_transfer *st = svga_transfer(transfer);
350 sws->buffer_unmap(sws, st->hwbuf);
355 svga_texture_transfer_destroy(struct pipe_context *pipe,
356 struct pipe_transfer *transfer)
358 struct svga_context *svga = svga_context(pipe);
359 struct svga_texture *tex = svga_texture(transfer->resource);
360 struct svga_screen *ss = svga_screen(pipe->screen);
361 struct svga_winsys_screen *sws = ss->sws;
362 struct svga_transfer *st = svga_transfer(transfer);
364 if (st->base.usage & PIPE_TRANSFER_WRITE) {
365 SVGA3dSurfaceDMAFlags flags;
367 memset(&flags, 0, sizeof flags);
368 if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
369 flags.discard = TRUE;
371 if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
372 flags.unsynchronized = TRUE;
375 svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
376 ss->texture_timestamp++;
377 tex->view_age[transfer->level] = ++(tex->age);
378 if (transfer->resource->target == PIPE_TEXTURE_CUBE)
379 tex->defined[transfer->box.z][transfer->level] = TRUE;
381 tex->defined[0][transfer->level] = TRUE;
384 pipe_resource_reference(&st->base.resource, NULL);
386 sws->buffer_destroy(sws, st->hwbuf);
391 struct u_resource_vtbl svga_texture_vtbl =
393 svga_texture_get_handle, /* get_handle */
394 svga_texture_destroy, /* resource_destroy */
395 svga_texture_get_transfer, /* get_transfer */
396 svga_texture_transfer_destroy, /* transfer_destroy */
397 svga_texture_transfer_map, /* transfer_map */
398 u_default_transfer_flush_region, /* transfer_flush_region */
399 svga_texture_transfer_unmap, /* transfer_unmap */
400 u_default_transfer_inline_write /* transfer_inline_write */
404 struct pipe_resource *
405 svga_texture_create(struct pipe_screen *screen,
406 const struct pipe_resource *template)
408 struct svga_screen *svgascreen = svga_screen(screen);
409 struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
414 tex->b.b = *template;
415 tex->b.vtbl = &svga_texture_vtbl;
416 pipe_reference_init(&tex->b.b.reference, 1);
417 tex->b.b.screen = screen;
419 assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
420 if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS)
424 tex->key.size.width = template->width0;
425 tex->key.size.height = template->height0;
426 tex->key.size.depth = template->depth0;
428 if(template->target == PIPE_TEXTURE_CUBE) {
429 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
430 tex->key.numFaces = 6;
433 tex->key.numFaces = 1;
436 /* XXX: Disabled for now */
437 tex->key.cachable = 0;
439 if (template->bind & PIPE_BIND_SAMPLER_VIEW)
440 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
442 if (template->bind & PIPE_BIND_DISPLAY_TARGET) {
443 tex->key.cachable = 0;
446 if (template->bind & PIPE_BIND_SHARED) {
447 tex->key.cachable = 0;
450 if (template->bind & (PIPE_BIND_SCANOUT |
452 tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
453 tex->key.cachable = 0;
457 * Note: Previously we never passed the
458 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
459 * know beforehand whether a texture will be used as a rendertarget or not
460 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
461 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
463 * However, this was changed since other state trackers
464 * (XA for example) uses it accurately and certain device versions
465 * relies on it in certain situations to render correctly.
467 if((template->bind & PIPE_BIND_RENDER_TARGET) &&
468 !util_format_is_s3tc(template->format))
469 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
471 if(template->bind & PIPE_BIND_DEPTH_STENCIL)
472 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
474 tex->key.numMipLevels = template->last_level + 1;
476 tex->key.format = svga_translate_format(svgascreen, template->format, template->bind);
477 if(tex->key.format == SVGA3D_FORMAT_INVALID)
480 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
481 tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
483 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
485 debug_reference(&tex->b.b.reference,
486 (debug_reference_descriptor)debug_describe_resource, 0);
497 struct pipe_resource *
498 svga_texture_from_handle(struct pipe_screen *screen,
499 const struct pipe_resource *template,
500 struct winsys_handle *whandle)
502 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
503 struct svga_winsys_surface *srf;
504 struct svga_texture *tex;
505 enum SVGA3dSurfaceFormat format = 0;
508 /* Only supports one type */
509 if ((template->target != PIPE_TEXTURE_2D &&
510 template->target != PIPE_TEXTURE_RECT) ||
511 template->last_level != 0 ||
512 template->depth0 != 1) {
516 srf = sws->surface_from_handle(sws, whandle, &format);
521 if (svga_translate_format(svga_screen(screen), template->format, template->bind) != format) {
522 unsigned f1 = svga_translate_format(svga_screen(screen), template->format, template->bind);
523 unsigned f2 = format;
525 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
526 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
527 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
528 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ||
529 (f1 == SVGA3D_Z_DF24 && f2 == SVGA3D_Z_D24S8_INT) ) ) {
530 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
535 tex = CALLOC_STRUCT(svga_texture);
539 tex->b.b = *template;
540 tex->b.vtbl = &svga_texture_vtbl;
541 pipe_reference_init(&tex->b.b.reference, 1);
542 tex->b.b.screen = screen;
544 if (format == SVGA3D_X8R8G8B8)
545 tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM;
546 else if (format == SVGA3D_A8R8G8B8)
547 tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM;
552 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
554 tex->key.cachable = 0;