4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu-common.h"
21 #ifdef CONFIG_USER_ONLY
32 #include "monitor/monitor.h"
33 #include "sysemu/char.h"
34 #include "sysemu/sysemu.h"
35 #include "exec/gdbstub.h"
38 #define MAX_PACKET_LENGTH 4096
41 #include "qemu/sockets.h"
42 #include "sysemu/kvm.h"
43 #include "qemu/bitops.h"
45 static inline int target_memory_rw_debug(CPUState *cpu, target_ulong addr,
46 uint8_t *buf, int len, bool is_write)
48 CPUClass *cc = CPU_GET_CLASS(cpu);
50 if (cc->memory_rw_debug) {
51 return cc->memory_rw_debug(cpu, addr, buf, len, is_write);
53 return cpu_memory_rw_debug(cpu, addr, buf, len, is_write);
65 GDB_SIGNAL_UNKNOWN = 143
68 #ifdef CONFIG_USER_ONLY
70 /* Map target signal numbers to GDB protocol signal numbers and vice
71 * versa. For user emulation's currently supported systems, we can
72 * assume most signals are defined.
75 static int gdb_signal_table[] = {
235 /* In system mode we only need SIGINT and SIGTRAP; other signals
236 are not yet supported. */
243 static int gdb_signal_table[] = {
253 #ifdef CONFIG_USER_ONLY
254 static int target_signal_to_gdb (int sig)
257 for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
258 if (gdb_signal_table[i] == sig)
260 return GDB_SIGNAL_UNKNOWN;
264 static int gdb_signal_to_target (int sig)
266 if (sig < ARRAY_SIZE (gdb_signal_table))
267 return gdb_signal_table[sig];
274 typedef struct GDBRegisterState {
280 struct GDBRegisterState *next;
290 typedef struct GDBState {
291 CPUState *c_cpu; /* current CPU for step/continue ops */
292 CPUState *g_cpu; /* current CPU for other ops */
293 CPUState *query_cpu; /* for q{f|s}ThreadInfo */
294 enum RSState state; /* parsing state */
295 char line_buf[MAX_PACKET_LENGTH];
298 uint8_t last_packet[MAX_PACKET_LENGTH + 4];
301 #ifdef CONFIG_USER_ONLY
305 CharDriverState *chr;
306 CharDriverState *mon_chr;
308 char syscall_buf[256];
309 gdb_syscall_complete_cb current_syscall_cb;
312 /* By default use no IRQs and no timers while single stepping so as to
313 * make single stepping like an ICE HW step.
315 static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
317 static GDBState *gdbserver_state;
319 /* This is an ugly hack to cope with both new and old gdb.
320 If gdb sends qXfer:features:read then assume we're talking to a newish
321 gdb that understands target descriptions. */
322 static int gdb_has_xml;
324 #ifdef CONFIG_USER_ONLY
325 /* XXX: This is not thread safe. Do we care? */
326 static int gdbserver_fd = -1;
328 static int get_char(GDBState *s)
334 ret = qemu_recv(s->fd, &ch, 1, 0);
336 if (errno == ECONNRESET)
338 if (errno != EINTR && errno != EAGAIN)
340 } else if (ret == 0) {
358 /* If gdb is connected when the first semihosting syscall occurs then use
359 remote gdb syscalls. Otherwise use native file IO. */
360 int use_gdb_syscalls(void)
362 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
363 gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
366 return gdb_syscall_mode == GDB_SYS_ENABLED;
369 /* Resume execution. */
370 static inline void gdb_continue(GDBState *s)
372 #ifdef CONFIG_USER_ONLY
373 s->running_state = 1;
375 if (runstate_check(RUN_STATE_GUEST_PANICKED)) {
376 runstate_set(RUN_STATE_DEBUG);
378 if (!runstate_needs_reset()) {
384 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
386 #ifdef CONFIG_USER_ONLY
390 ret = send(s->fd, buf, len, 0);
392 if (errno != EINTR && errno != EAGAIN)
400 qemu_chr_fe_write(s->chr, buf, len);
404 static inline int fromhex(int v)
406 if (v >= '0' && v <= '9')
408 else if (v >= 'A' && v <= 'F')
410 else if (v >= 'a' && v <= 'f')
416 static inline int tohex(int v)
424 static void memtohex(char *buf, const uint8_t *mem, int len)
429 for(i = 0; i < len; i++) {
431 *q++ = tohex(c >> 4);
432 *q++ = tohex(c & 0xf);
437 static void hextomem(uint8_t *mem, const char *buf, int len)
441 for(i = 0; i < len; i++) {
442 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
447 /* return -1 if error, 0 if OK */
448 static int put_packet_binary(GDBState *s, const char *buf, int len)
459 for(i = 0; i < len; i++) {
463 *(p++) = tohex((csum >> 4) & 0xf);
464 *(p++) = tohex((csum) & 0xf);
466 s->last_packet_len = p - s->last_packet;
467 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
469 #ifdef CONFIG_USER_ONLY
482 /* return -1 if error, 0 if OK */
483 static int put_packet(GDBState *s, const char *buf)
486 printf("reply='%s'\n", buf);
489 return put_packet_binary(s, buf, strlen(buf));
492 /* The GDB remote protocol transfers values in target byte order. This means
493 we can use the raw memory access routines to access the value buffer.
494 Conveniently, these also handle the case where the buffer is mis-aligned.
496 #define GET_REG8(val) do { \
497 stb_p(mem_buf, val); \
500 #define GET_REG16(val) do { \
501 stw_p(mem_buf, val); \
504 #define GET_REG32(val) do { \
505 stl_p(mem_buf, val); \
508 #define GET_REG64(val) do { \
509 stq_p(mem_buf, val); \
513 #if TARGET_LONG_BITS == 64
514 #define GET_REGL(val) GET_REG64(val)
515 #define ldtul_p(addr) ldq_p(addr)
517 #define GET_REGL(val) GET_REG32(val)
518 #define ldtul_p(addr) ldl_p(addr)
521 #if defined(TARGET_I386)
523 #include "target-i386/gdbstub.c"
525 #elif defined (TARGET_PPC)
527 #if defined (TARGET_PPC64)
528 #define GDB_CORE_XML "power64-core.xml"
530 #define GDB_CORE_XML "power-core.xml"
533 #include "target-ppc/gdbstub.c"
535 #elif defined (TARGET_SPARC)
537 #include "target-sparc/gdbstub.c"
539 #elif defined (TARGET_ARM)
541 #define GDB_CORE_XML "arm-core.xml"
543 #include "target-arm/gdbstub.c"
545 #elif defined (TARGET_M68K)
547 #define GDB_CORE_XML "cf-core.xml"
549 #include "target-m68k/gdbstub.c"
551 #elif defined (TARGET_MIPS)
553 static int cpu_gdb_read_register(CPUMIPSState *env, uint8_t *mem_buf, int n)
556 GET_REGL(env->active_tc.gpr[n]);
558 if (env->CP0_Config1 & (1 << CP0C1_FP)) {
559 if (n >= 38 && n < 70) {
560 if (env->CP0_Status & (1 << CP0St_FR)) {
561 GET_REGL(env->active_fpu.fpr[n - 38].d);
563 GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
568 GET_REGL((int32_t)env->active_fpu.fcr31);
570 GET_REGL((int32_t)env->active_fpu.fcr0);
575 GET_REGL((int32_t)env->CP0_Status);
577 GET_REGL(env->active_tc.LO[0]);
579 GET_REGL(env->active_tc.HI[0]);
581 GET_REGL(env->CP0_BadVAddr);
583 GET_REGL((int32_t)env->CP0_Cause);
585 GET_REGL(env->active_tc.PC | !!(env->hflags & MIPS_HFLAG_M16));
587 GET_REGL(0); /* fp */
589 GET_REGL((int32_t)env->CP0_PRid);
591 if (n >= 73 && n <= 88) {
592 /* 16 embedded regs. */
599 /* convert MIPS rounding mode in FCR31 to IEEE library */
600 static unsigned int ieee_rm[] = {
601 float_round_nearest_even,
606 #define RESTORE_ROUNDING_MODE \
607 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], \
608 &env->active_fpu.fp_status)
610 static int cpu_gdb_write_register(CPUMIPSState *env, uint8_t *mem_buf, int n)
614 tmp = ldtul_p(mem_buf);
617 env->active_tc.gpr[n] = tmp;
618 return sizeof(target_ulong);
620 if (env->CP0_Config1 & (1 << CP0C1_FP)
621 && n >= 38 && n < 73) {
623 if (env->CP0_Status & (1 << CP0St_FR)) {
624 env->active_fpu.fpr[n - 38].d = tmp;
626 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
631 env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
632 /* set rounding mode */
633 RESTORE_ROUNDING_MODE;
636 env->active_fpu.fcr0 = tmp;
639 return sizeof(target_ulong);
643 env->CP0_Status = tmp;
646 env->active_tc.LO[0] = tmp;
649 env->active_tc.HI[0] = tmp;
652 env->CP0_BadVAddr = tmp;
655 env->CP0_Cause = tmp;
658 env->active_tc.PC = tmp & ~(target_ulong)1;
660 env->hflags |= MIPS_HFLAG_M16;
662 env->hflags &= ~(MIPS_HFLAG_M16);
665 case 72: /* fp, ignored */
671 /* Other registers are readonly. Ignore writes. */
675 return sizeof(target_ulong);
677 #elif defined(TARGET_OPENRISC)
679 static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n)
682 GET_REG32(env->gpr[n]);
701 static int cpu_gdb_write_register(CPUOpenRISCState *env,
702 uint8_t *mem_buf, int n)
704 OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
705 CPUClass *cc = CPU_GET_CLASS(cpu);
708 if (n > cc->gdb_num_core_regs) {
712 tmp = ldl_p(mem_buf);
736 #elif defined (TARGET_SH4)
738 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
739 /* FIXME: We should use XML for this. */
741 static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n)
745 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
746 GET_REGL(env->gregs[n + 16]);
748 GET_REGL(env->gregs[n]);
751 GET_REGL(env->gregs[n]);
769 GET_REGL(env->fpscr);
771 if (env->fpscr & FPSCR_FR) {
772 stfl_p(mem_buf, env->fregs[n - 9]);
774 stfl_p(mem_buf, env->fregs[n - 25]);
782 GET_REGL(env->gregs[n - 43]);
784 GET_REGL(env->gregs[n - (51 - 16)]);
790 static int cpu_gdb_write_register(CPUSH4State *env, uint8_t *mem_buf, int n)
794 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
795 env->gregs[n + 16] = ldl_p(mem_buf);
797 env->gregs[n] = ldl_p(mem_buf);
801 env->gregs[n] = ldl_p(mem_buf);
804 env->pc = ldl_p(mem_buf);
807 env->pr = ldl_p(mem_buf);
810 env->gbr = ldl_p(mem_buf);
813 env->vbr = ldl_p(mem_buf);
816 env->mach = ldl_p(mem_buf);
819 env->macl = ldl_p(mem_buf);
822 env->sr = ldl_p(mem_buf);
825 env->fpul = ldl_p(mem_buf);
828 env->fpscr = ldl_p(mem_buf);
831 if (env->fpscr & FPSCR_FR) {
832 env->fregs[n - 9] = ldfl_p(mem_buf);
834 env->fregs[n - 25] = ldfl_p(mem_buf);
838 env->ssr = ldl_p(mem_buf);
841 env->spc = ldl_p(mem_buf);
844 env->gregs[n - 43] = ldl_p(mem_buf);
847 env->gregs[n - (51 - 16)] = ldl_p(mem_buf);
855 #elif defined (TARGET_MICROBLAZE)
857 static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n)
860 GET_REG32(env->regs[n]);
862 GET_REG32(env->sregs[n - 32]);
867 static int cpu_gdb_write_register(CPUMBState *env, uint8_t *mem_buf, int n)
869 MicroBlazeCPU *cpu = mb_env_get_cpu(env);
870 CPUClass *cc = CPU_GET_CLASS(cpu);
873 if (n > cc->gdb_num_core_regs) {
877 tmp = ldl_p(mem_buf);
882 env->sregs[n - 32] = tmp;
886 #elif defined (TARGET_CRIS)
889 read_register_crisv10(CPUCRISState *env, uint8_t *mem_buf, int n)
892 GET_REG32(env->regs[n]);
902 GET_REG8(env->pregs[n - 16]);
904 GET_REG8(env->pregs[n - 16]);
907 GET_REG16(env->pregs[n - 16]);
910 GET_REG32(env->pregs[n - 16]);
918 static int cpu_gdb_read_register(CPUCRISState *env, uint8_t *mem_buf, int n)
922 if (env->pregs[PR_VR] < 32) {
923 return read_register_crisv10(env, mem_buf, n);
926 srs = env->pregs[PR_SRS];
928 GET_REG32(env->regs[n]);
931 if (n >= 21 && n < 32) {
932 GET_REG32(env->pregs[n - 16]);
934 if (n >= 33 && n < 49) {
935 GET_REG32(env->sregs[srs][n - 33]);
939 GET_REG8(env->pregs[0]);
941 GET_REG8(env->pregs[1]);
943 GET_REG32(env->pregs[2]);
947 GET_REG16(env->pregs[4]);
955 static int cpu_gdb_write_register(CPUCRISState *env, uint8_t *mem_buf, int n)
963 tmp = ldl_p(mem_buf);
969 if (n >= 21 && n < 32) {
970 env->pregs[n - 16] = tmp;
973 /* FIXME: Should support function regs be writable? */
980 env->pregs[PR_PID] = tmp;
993 #elif defined (TARGET_ALPHA)
995 static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n)
1005 d.d = env->fir[n - 32];
1009 val = cpu_alpha_load_fpcr(env);
1019 /* 31 really is the zero register; 65 is unassigned in the
1020 gdb protocol, but is still required to occupy 8 bytes. */
1029 static int cpu_gdb_write_register(CPUAlphaState *env, uint8_t *mem_buf, int n)
1031 target_ulong tmp = ldtul_p(mem_buf);
1040 env->fir[n - 32] = d.d;
1043 cpu_alpha_store_fpcr(env, tmp);
1053 /* 31 really is the zero register; 65 is unassigned in the
1054 gdb protocol, but is still required to occupy 8 bytes. */
1061 #elif defined (TARGET_S390X)
1063 static int cpu_gdb_read_register(CPUS390XState *env, uint8_t *mem_buf, int n)
1069 case S390_PSWM_REGNUM:
1070 cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, env->cc_vr);
1071 val = deposit64(env->psw.mask, 44, 2, cc_op);
1073 case S390_PSWA_REGNUM:
1074 GET_REGL(env->psw.addr);
1075 case S390_R0_REGNUM ... S390_R15_REGNUM:
1076 GET_REGL(env->regs[n-S390_R0_REGNUM]);
1077 case S390_A0_REGNUM ... S390_A15_REGNUM:
1078 GET_REG32(env->aregs[n-S390_A0_REGNUM]);
1079 case S390_FPC_REGNUM:
1080 GET_REG32(env->fpc);
1081 case S390_F0_REGNUM ... S390_F15_REGNUM:
1082 GET_REG64(env->fregs[n-S390_F0_REGNUM].ll);
1088 static int cpu_gdb_write_register(CPUS390XState *env, uint8_t *mem_buf, int n)
1093 tmpl = ldtul_p(mem_buf);
1094 tmp32 = ldl_p(mem_buf);
1097 case S390_PSWM_REGNUM:
1098 env->psw.mask = tmpl;
1099 env->cc_op = extract64(tmpl, 44, 2);
1101 case S390_PSWA_REGNUM:
1102 env->psw.addr = tmpl;
1104 case S390_R0_REGNUM ... S390_R15_REGNUM:
1105 env->regs[n-S390_R0_REGNUM] = tmpl;
1107 case S390_A0_REGNUM ... S390_A15_REGNUM:
1108 env->aregs[n-S390_A0_REGNUM] = tmp32;
1111 case S390_FPC_REGNUM:
1115 case S390_F0_REGNUM ... S390_F15_REGNUM:
1116 env->fregs[n-S390_F0_REGNUM].ll = tmpl;
1123 #elif defined (TARGET_LM32)
1125 #include "hw/lm32/lm32_pic.h"
1127 static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n)
1130 GET_REG32(env->regs[n]);
1135 /* FIXME: put in right exception ID */
1139 GET_REG32(env->eba);
1141 GET_REG32(env->deba);
1145 GET_REG32(lm32_pic_get_im(env->pic_state));
1147 GET_REG32(lm32_pic_get_ip(env->pic_state));
1153 static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, int n)
1155 LM32CPU *cpu = lm32_env_get_cpu(env);
1156 CPUClass *cc = CPU_GET_CLASS(cpu);
1159 if (n > cc->gdb_num_core_regs) {
1163 tmp = ldl_p(mem_buf);
1182 lm32_pic_set_im(env->pic_state, tmp);
1185 lm32_pic_set_ip(env->pic_state, tmp);
1191 #elif defined(TARGET_XTENSA)
1193 static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
1195 const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
1197 if (n < 0 || n >= env->config->gdb_regmap.num_regs) {
1201 switch (reg->type) {
1206 xtensa_sync_phys_from_window(env);
1207 GET_REG32(env->phys_regs[(reg->targno & 0xff) % env->config->nareg]);
1210 GET_REG32(env->sregs[reg->targno & 0xff]);
1213 GET_REG32(env->uregs[reg->targno & 0xff]);
1216 GET_REG32(float32_val(env->fregs[reg->targno & 0x0f]));
1219 GET_REG32(env->regs[reg->targno & 0x0f]);
1222 qemu_log("%s from reg %d of unsupported type %d\n",
1223 __func__, n, reg->type);
1228 static int cpu_gdb_write_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
1231 const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
1233 if (n < 0 || n >= env->config->gdb_regmap.num_regs) {
1237 tmp = ldl_p(mem_buf);
1239 switch (reg->type) {
1245 env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp;
1246 xtensa_sync_window_from_phys(env);
1250 env->sregs[reg->targno & 0xff] = tmp;
1254 env->uregs[reg->targno & 0xff] = tmp;
1258 env->fregs[reg->targno & 0x0f] = make_float32(tmp);
1262 env->regs[reg->targno & 0x0f] = tmp;
1266 qemu_log("%s to reg %d of unsupported type %d\n",
1267 __func__, n, reg->type);
1275 static int cpu_gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int n)
1280 static int cpu_gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int n)
1288 /* Encode data using the encoding for 'x' packets. */
1289 static int memtox(char *buf, const char *mem, int len)
1297 case '#': case '$': case '*': case '}':
1309 static const char *get_feature_xml(const char *p, const char **newp)
1314 static char target_xml[1024];
1317 while (p[len] && p[len] != ':')
1322 if (strncmp(p, "target.xml", len) == 0) {
1323 /* Generate the XML description for this CPU. */
1324 if (!target_xml[0]) {
1325 GDBRegisterState *r;
1326 CPUState *cpu = first_cpu;
1328 snprintf(target_xml, sizeof(target_xml),
1329 "<?xml version=\"1.0\"?>"
1330 "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1332 "<xi:include href=\"%s\"/>",
1335 for (r = cpu->gdb_regs; r; r = r->next) {
1336 pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\"");
1337 pstrcat(target_xml, sizeof(target_xml), r->xml);
1338 pstrcat(target_xml, sizeof(target_xml), "\"/>");
1340 pstrcat(target_xml, sizeof(target_xml), "</target>");
1344 for (i = 0; ; i++) {
1345 name = xml_builtin[i][0];
1346 if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
1349 return name ? xml_builtin[i][1] : NULL;
1353 static int gdb_read_register(CPUState *cpu, uint8_t *mem_buf, int reg)
1355 CPUClass *cc = CPU_GET_CLASS(cpu);
1356 CPUArchState *env = cpu->env_ptr;
1357 GDBRegisterState *r;
1359 if (reg < cc->gdb_num_core_regs) {
1360 return cpu_gdb_read_register(env, mem_buf, reg);
1363 for (r = cpu->gdb_regs; r; r = r->next) {
1364 if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1365 return r->get_reg(env, mem_buf, reg - r->base_reg);
1371 static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg)
1373 CPUClass *cc = CPU_GET_CLASS(cpu);
1374 CPUArchState *env = cpu->env_ptr;
1375 GDBRegisterState *r;
1377 if (reg < cc->gdb_num_core_regs) {
1378 return cpu_gdb_write_register(env, mem_buf, reg);
1381 for (r = cpu->gdb_regs; r; r = r->next) {
1382 if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1383 return r->set_reg(env, mem_buf, reg - r->base_reg);
1389 /* Register a supplemental set of CPU registers. If g_pos is nonzero it
1390 specifies the first register number and these registers are included in
1391 a standard "g" packet. Direction is relative to gdb, i.e. get_reg is
1392 gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1395 void gdb_register_coprocessor(CPUState *cpu,
1396 gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1397 int num_regs, const char *xml, int g_pos)
1399 GDBRegisterState *s;
1400 GDBRegisterState **p;
1404 /* Check for duplicates. */
1405 if (strcmp((*p)->xml, xml) == 0)
1410 s = g_new0(GDBRegisterState, 1);
1411 s->base_reg = cpu->gdb_num_regs;
1412 s->num_regs = num_regs;
1413 s->get_reg = get_reg;
1414 s->set_reg = set_reg;
1417 /* Add to end of list. */
1418 cpu->gdb_num_regs += num_regs;
1421 if (g_pos != s->base_reg) {
1422 fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
1423 "Expected %d got %d\n", xml, g_pos, s->base_reg);
1428 #ifndef CONFIG_USER_ONLY
1429 static const int xlat_gdb_type[] = {
1430 [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE,
1431 [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ,
1432 [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
1436 static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
1442 if (kvm_enabled()) {
1443 return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1447 case GDB_BREAKPOINT_SW:
1448 case GDB_BREAKPOINT_HW:
1449 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1451 err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1456 #ifndef CONFIG_USER_ONLY
1457 case GDB_WATCHPOINT_WRITE:
1458 case GDB_WATCHPOINT_READ:
1459 case GDB_WATCHPOINT_ACCESS:
1460 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1462 err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1474 static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
1480 if (kvm_enabled()) {
1481 return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1485 case GDB_BREAKPOINT_SW:
1486 case GDB_BREAKPOINT_HW:
1487 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1489 err = cpu_breakpoint_remove(env, addr, BP_GDB);
1494 #ifndef CONFIG_USER_ONLY
1495 case GDB_WATCHPOINT_WRITE:
1496 case GDB_WATCHPOINT_READ:
1497 case GDB_WATCHPOINT_ACCESS:
1498 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1500 err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1511 static void gdb_breakpoint_remove_all(void)
1516 if (kvm_enabled()) {
1517 kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
1521 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1523 cpu_breakpoint_remove_all(env, BP_GDB);
1524 #ifndef CONFIG_USER_ONLY
1525 cpu_watchpoint_remove_all(env, BP_GDB);
1530 static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
1532 CPUState *cpu = s->c_cpu;
1533 CPUClass *cc = CPU_GET_CLASS(cpu);
1535 cpu_synchronize_state(cpu);
1537 cc->set_pc(cpu, pc);
1541 static CPUState *find_cpu(uint32_t thread_id)
1545 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1546 if (cpu_index(cpu) == thread_id) {
1554 static int gdb_handle_packet(GDBState *s, const char *line_buf)
1559 int ch, reg_size, type, res;
1560 char buf[MAX_PACKET_LENGTH];
1561 uint8_t mem_buf[MAX_PACKET_LENGTH];
1563 target_ulong addr, len;
1566 printf("command='%s'\n", line_buf);
1572 /* TODO: Make this return the correct value for user-mode. */
1573 snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
1574 cpu_index(s->c_cpu));
1576 /* Remove all the breakpoints when this query is issued,
1577 * because gdb is doing and initial connect and the state
1578 * should be cleaned up.
1580 gdb_breakpoint_remove_all();
1584 addr = strtoull(p, (char **)&p, 16);
1585 gdb_set_cpu_pc(s, addr);
1591 s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
1592 if (s->signal == -1)
1597 if (strncmp(p, "Cont", 4) == 0) {
1598 int res_signal, res_thread;
1602 put_packet(s, "vCont;c;C;s;S");
1617 if (action == 'C' || action == 'S') {
1618 signal = strtoul(p, (char **)&p, 16);
1619 } else if (action != 'c' && action != 's') {
1625 thread = strtoull(p+1, (char **)&p, 16);
1627 action = tolower(action);
1628 if (res == 0 || (res == 'c' && action == 's')) {
1630 res_signal = signal;
1631 res_thread = thread;
1635 if (res_thread != -1 && res_thread != 0) {
1636 cpu = find_cpu(res_thread);
1638 put_packet(s, "E22");
1644 cpu_single_step(s->c_cpu, sstep_flags);
1646 s->signal = res_signal;
1652 goto unknown_command;
1655 #ifdef CONFIG_USER_ONLY
1656 /* Kill the target */
1657 fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1662 gdb_breakpoint_remove_all();
1663 gdb_syscall_mode = GDB_SYS_DISABLED;
1665 put_packet(s, "OK");
1669 addr = strtoull(p, (char **)&p, 16);
1670 gdb_set_cpu_pc(s, addr);
1672 cpu_single_step(s->c_cpu, sstep_flags);
1680 ret = strtoull(p, (char **)&p, 16);
1683 err = strtoull(p, (char **)&p, 16);
1690 if (s->current_syscall_cb) {
1691 s->current_syscall_cb(s->c_cpu, ret, err);
1692 s->current_syscall_cb = NULL;
1695 put_packet(s, "T02");
1702 cpu_synchronize_state(s->g_cpu);
1704 for (addr = 0; addr < s->g_cpu->gdb_num_regs; addr++) {
1705 reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
1708 memtohex(buf, mem_buf, len);
1712 cpu_synchronize_state(s->g_cpu);
1713 registers = mem_buf;
1714 len = strlen(p) / 2;
1715 hextomem((uint8_t *)registers, p, len);
1716 for (addr = 0; addr < s->g_cpu->gdb_num_regs && len > 0; addr++) {
1717 reg_size = gdb_write_register(s->g_cpu, registers, addr);
1719 registers += reg_size;
1721 put_packet(s, "OK");
1724 addr = strtoull(p, (char **)&p, 16);
1727 len = strtoull(p, NULL, 16);
1728 if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len, false) != 0) {
1729 put_packet (s, "E14");
1731 memtohex(buf, mem_buf, len);
1736 addr = strtoull(p, (char **)&p, 16);
1739 len = strtoull(p, (char **)&p, 16);
1742 hextomem(mem_buf, p, len);
1743 if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len,
1745 put_packet(s, "E14");
1747 put_packet(s, "OK");
1751 /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1752 This works, but can be very slow. Anything new enough to
1753 understand XML also knows how to use this properly. */
1755 goto unknown_command;
1756 addr = strtoull(p, (char **)&p, 16);
1757 reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
1759 memtohex(buf, mem_buf, reg_size);
1762 put_packet(s, "E14");
1767 goto unknown_command;
1768 addr = strtoull(p, (char **)&p, 16);
1771 reg_size = strlen(p) / 2;
1772 hextomem(mem_buf, p, reg_size);
1773 gdb_write_register(s->g_cpu, mem_buf, addr);
1774 put_packet(s, "OK");
1778 type = strtoul(p, (char **)&p, 16);
1781 addr = strtoull(p, (char **)&p, 16);
1784 len = strtoull(p, (char **)&p, 16);
1786 res = gdb_breakpoint_insert(addr, len, type);
1788 res = gdb_breakpoint_remove(addr, len, type);
1790 put_packet(s, "OK");
1791 else if (res == -ENOSYS)
1794 put_packet(s, "E22");
1798 thread = strtoull(p, (char **)&p, 16);
1799 if (thread == -1 || thread == 0) {
1800 put_packet(s, "OK");
1803 cpu = find_cpu(thread);
1805 put_packet(s, "E22");
1811 put_packet(s, "OK");
1815 put_packet(s, "OK");
1818 put_packet(s, "E22");
1823 thread = strtoull(p, (char **)&p, 16);
1824 cpu = find_cpu(thread);
1827 put_packet(s, "OK");
1829 put_packet(s, "E22");
1834 /* parse any 'q' packets here */
1835 if (!strcmp(p,"qemu.sstepbits")) {
1836 /* Query Breakpoint bit definitions */
1837 snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1843 } else if (strncmp(p,"qemu.sstep",10) == 0) {
1844 /* Display or change the sstep_flags */
1847 /* Display current setting */
1848 snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
1853 type = strtoul(p, (char **)&p, 16);
1855 put_packet(s, "OK");
1857 } else if (strcmp(p,"C") == 0) {
1858 /* "Current thread" remains vague in the spec, so always return
1859 * the first CPU (gdb returns the first thread). */
1860 put_packet(s, "QC1");
1862 } else if (strcmp(p,"fThreadInfo") == 0) {
1863 s->query_cpu = first_cpu;
1864 goto report_cpuinfo;
1865 } else if (strcmp(p,"sThreadInfo") == 0) {
1868 snprintf(buf, sizeof(buf), "m%x", cpu_index(s->query_cpu));
1870 s->query_cpu = s->query_cpu->next_cpu;
1874 } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
1875 thread = strtoull(p+16, (char **)&p, 16);
1876 cpu = find_cpu(thread);
1878 cpu_synchronize_state(cpu);
1879 len = snprintf((char *)mem_buf, sizeof(mem_buf),
1880 "CPU#%d [%s]", cpu->cpu_index,
1881 cpu->halted ? "halted " : "running");
1882 memtohex(buf, mem_buf, len);
1887 #ifdef CONFIG_USER_ONLY
1888 else if (strncmp(p, "Offsets", 7) == 0) {
1889 CPUArchState *env = s->c_cpu->env_ptr;
1890 TaskState *ts = env->opaque;
1892 snprintf(buf, sizeof(buf),
1893 "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1894 ";Bss=" TARGET_ABI_FMT_lx,
1895 ts->info->code_offset,
1896 ts->info->data_offset,
1897 ts->info->data_offset);
1901 #else /* !CONFIG_USER_ONLY */
1902 else if (strncmp(p, "Rcmd,", 5) == 0) {
1903 int len = strlen(p + 5);
1905 if ((len % 2) != 0) {
1906 put_packet(s, "E01");
1909 hextomem(mem_buf, p + 5, len);
1912 qemu_chr_be_write(s->mon_chr, mem_buf, len);
1913 put_packet(s, "OK");
1916 #endif /* !CONFIG_USER_ONLY */
1917 if (strncmp(p, "Supported", 9) == 0) {
1918 snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
1920 pstrcat(buf, sizeof(buf), ";qXfer:features:read+");
1926 if (strncmp(p, "Xfer:features:read:", 19) == 0) {
1928 target_ulong total_len;
1932 xml = get_feature_xml(p, &p);
1934 snprintf(buf, sizeof(buf), "E00");
1941 addr = strtoul(p, (char **)&p, 16);
1944 len = strtoul(p, (char **)&p, 16);
1946 total_len = strlen(xml);
1947 if (addr > total_len) {
1948 snprintf(buf, sizeof(buf), "E00");
1952 if (len > (MAX_PACKET_LENGTH - 5) / 2)
1953 len = (MAX_PACKET_LENGTH - 5) / 2;
1954 if (len < total_len - addr) {
1956 len = memtox(buf + 1, xml + addr, len);
1959 len = memtox(buf + 1, xml + addr, total_len - addr);
1961 put_packet_binary(s, buf, len + 1);
1965 /* Unrecognised 'q' command. */
1966 goto unknown_command;
1970 /* put empty packet */
1978 void gdb_set_stop_cpu(CPUState *cpu)
1980 gdbserver_state->c_cpu = cpu;
1981 gdbserver_state->g_cpu = cpu;
1984 #ifndef CONFIG_USER_ONLY
1985 static void gdb_vm_state_change(void *opaque, int running, RunState state)
1987 GDBState *s = gdbserver_state;
1988 CPUArchState *env = s->c_cpu->env_ptr;
1989 CPUState *cpu = s->c_cpu;
1994 if (running || s->state == RS_INACTIVE) {
1997 /* Is there a GDB syscall waiting to be sent? */
1998 if (s->current_syscall_cb) {
1999 put_packet(s, s->syscall_buf);
2003 case RUN_STATE_DEBUG:
2004 if (env->watchpoint_hit) {
2005 switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
2016 snprintf(buf, sizeof(buf),
2017 "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
2018 GDB_SIGNAL_TRAP, cpu_index(cpu), type,
2019 env->watchpoint_hit->vaddr);
2020 env->watchpoint_hit = NULL;
2024 ret = GDB_SIGNAL_TRAP;
2026 case RUN_STATE_PAUSED:
2027 ret = GDB_SIGNAL_INT;
2029 case RUN_STATE_SHUTDOWN:
2030 ret = GDB_SIGNAL_QUIT;
2032 case RUN_STATE_IO_ERROR:
2033 ret = GDB_SIGNAL_IO;
2035 case RUN_STATE_WATCHDOG:
2036 ret = GDB_SIGNAL_ALRM;
2038 case RUN_STATE_INTERNAL_ERROR:
2039 ret = GDB_SIGNAL_ABRT;
2041 case RUN_STATE_SAVE_VM:
2042 case RUN_STATE_RESTORE_VM:
2044 case RUN_STATE_FINISH_MIGRATE:
2045 ret = GDB_SIGNAL_XCPU;
2048 ret = GDB_SIGNAL_UNKNOWN;
2051 snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, cpu_index(cpu));
2056 /* disable single step if it was enabled */
2057 cpu_single_step(cpu, 0);
2061 /* Send a gdb syscall request.
2062 This accepts limited printf-style format specifiers, specifically:
2063 %x - target_ulong argument printed in hex.
2064 %lx - 64-bit argument printed in hex.
2065 %s - string pointer (target_ulong) and length (int) pair. */
2066 void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
2075 s = gdbserver_state;
2078 s->current_syscall_cb = cb;
2079 #ifndef CONFIG_USER_ONLY
2080 vm_stop(RUN_STATE_DEBUG);
2084 p_end = &s->syscall_buf[sizeof(s->syscall_buf)];
2091 addr = va_arg(va, target_ulong);
2092 p += snprintf(p, p_end - p, TARGET_FMT_lx, addr);
2095 if (*(fmt++) != 'x')
2097 i64 = va_arg(va, uint64_t);
2098 p += snprintf(p, p_end - p, "%" PRIx64, i64);
2101 addr = va_arg(va, target_ulong);
2102 p += snprintf(p, p_end - p, TARGET_FMT_lx "/%x",
2103 addr, va_arg(va, int));
2107 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
2117 #ifdef CONFIG_USER_ONLY
2118 put_packet(s, s->syscall_buf);
2119 gdb_handlesig(s->c_cpu, 0);
2121 /* In this case wait to send the syscall packet until notification that
2122 the CPU has stopped. This must be done because if the packet is sent
2123 now the reply from the syscall request could be received while the CPU
2124 is still in the running state, which can cause packets to be dropped
2125 and state transition 'T' packets to be sent while the syscall is still
2131 static void gdb_read_byte(GDBState *s, int ch)
2136 #ifndef CONFIG_USER_ONLY
2137 if (s->last_packet_len) {
2138 /* Waiting for a response to the last packet. If we see the start
2139 of a new command then abandon the previous response. */
2142 printf("Got NACK, retransmitting\n");
2144 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
2148 printf("Got ACK\n");
2150 printf("Got '%c' when expecting ACK/NACK\n", ch);
2152 if (ch == '+' || ch == '$')
2153 s->last_packet_len = 0;
2157 if (runstate_is_running()) {
2158 /* when the CPU is running, we cannot do anything except stop
2159 it when receiving a char */
2160 vm_stop(RUN_STATE_PAUSED);
2167 s->line_buf_index = 0;
2168 s->state = RS_GETLINE;
2173 s->state = RS_CHKSUM1;
2174 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
2177 s->line_buf[s->line_buf_index++] = ch;
2181 s->line_buf[s->line_buf_index] = '\0';
2182 s->line_csum = fromhex(ch) << 4;
2183 s->state = RS_CHKSUM2;
2186 s->line_csum |= fromhex(ch);
2188 for(i = 0; i < s->line_buf_index; i++) {
2189 csum += s->line_buf[i];
2191 if (s->line_csum != (csum & 0xff)) {
2193 put_buffer(s, &reply, 1);
2197 put_buffer(s, &reply, 1);
2198 s->state = gdb_handle_packet(s, s->line_buf);
2207 /* Tell the remote gdb that the process has exited. */
2208 void gdb_exit(CPUArchState *env, int code)
2213 s = gdbserver_state;
2217 #ifdef CONFIG_USER_ONLY
2218 if (gdbserver_fd < 0 || s->fd < 0) {
2223 snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
2226 #ifndef CONFIG_USER_ONLY
2228 qemu_chr_delete(s->chr);
2233 #ifdef CONFIG_USER_ONLY
2239 s = gdbserver_state;
2241 if (gdbserver_fd < 0 || s->fd < 0)
2248 gdb_handlesig(CPUState *cpu, int sig)
2250 CPUArchState *env = cpu->env_ptr;
2255 s = gdbserver_state;
2256 if (gdbserver_fd < 0 || s->fd < 0) {
2260 /* disable single step if it was enabled */
2261 cpu_single_step(cpu, 0);
2265 snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
2268 /* put_packet() might have detected that the peer terminated the
2276 s->running_state = 0;
2277 while (s->running_state == 0) {
2278 n = read(s->fd, buf, 256);
2282 for (i = 0; i < n; i++) {
2283 gdb_read_byte(s, buf[i]);
2285 } else if (n == 0 || errno != EAGAIN) {
2286 /* XXX: Connection closed. Should probably wait for another
2287 connection before continuing. */
2296 /* Tell the remote gdb that the process has exited due to SIG. */
2297 void gdb_signalled(CPUArchState *env, int sig)
2302 s = gdbserver_state;
2303 if (gdbserver_fd < 0 || s->fd < 0) {
2307 snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb(sig));
2311 static void gdb_accept(void)
2314 struct sockaddr_in sockaddr;
2319 len = sizeof(sockaddr);
2320 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
2321 if (fd < 0 && errno != EINTR) {
2324 } else if (fd >= 0) {
2326 fcntl(fd, F_SETFD, FD_CLOEXEC);
2332 /* set short latency */
2333 socket_set_nodelay(fd);
2335 s = g_malloc0(sizeof(GDBState));
2336 s->c_cpu = first_cpu;
2337 s->g_cpu = first_cpu;
2341 gdbserver_state = s;
2343 fcntl(fd, F_SETFL, O_NONBLOCK);
2346 static int gdbserver_open(int port)
2348 struct sockaddr_in sockaddr;
2351 fd = socket(PF_INET, SOCK_STREAM, 0);
2357 fcntl(fd, F_SETFD, FD_CLOEXEC);
2360 /* allow fast reuse */
2362 qemu_setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &val, sizeof(val));
2364 sockaddr.sin_family = AF_INET;
2365 sockaddr.sin_port = htons(port);
2366 sockaddr.sin_addr.s_addr = 0;
2367 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
2373 ret = listen(fd, 0);
2382 int gdbserver_start(int port)
2384 gdbserver_fd = gdbserver_open(port);
2385 if (gdbserver_fd < 0)
2387 /* accept connections */
2392 /* Disable gdb stub for child processes. */
2393 void gdbserver_fork(CPUArchState *env)
2395 GDBState *s = gdbserver_state;
2396 if (gdbserver_fd < 0 || s->fd < 0)
2400 cpu_breakpoint_remove_all(env, BP_GDB);
2401 cpu_watchpoint_remove_all(env, BP_GDB);
2404 static int gdb_chr_can_receive(void *opaque)
2406 /* We can handle an arbitrarily large amount of data.
2407 Pick the maximum packet size, which is as good as anything. */
2408 return MAX_PACKET_LENGTH;
2411 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
2415 for (i = 0; i < size; i++) {
2416 gdb_read_byte(gdbserver_state, buf[i]);
2420 static void gdb_chr_event(void *opaque, int event)
2423 case CHR_EVENT_OPENED:
2424 vm_stop(RUN_STATE_PAUSED);
2432 static void gdb_monitor_output(GDBState *s, const char *msg, int len)
2434 char buf[MAX_PACKET_LENGTH];
2437 if (len > (MAX_PACKET_LENGTH/2) - 1)
2438 len = (MAX_PACKET_LENGTH/2) - 1;
2439 memtohex(buf + 1, (uint8_t *)msg, len);
2443 static int gdb_monitor_write(CharDriverState *chr, const uint8_t *buf, int len)
2445 const char *p = (const char *)buf;
2448 max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2;
2450 if (len <= max_sz) {
2451 gdb_monitor_output(gdbserver_state, p, len);
2454 gdb_monitor_output(gdbserver_state, p, max_sz);
2462 static void gdb_sigterm_handler(int signal)
2464 if (runstate_is_running()) {
2465 vm_stop(RUN_STATE_PAUSED);
2470 int gdbserver_start(const char *device)
2473 char gdbstub_device_name[128];
2474 CharDriverState *chr = NULL;
2475 CharDriverState *mon_chr;
2479 if (strcmp(device, "none") != 0) {
2480 if (strstart(device, "tcp:", NULL)) {
2481 /* enforce required TCP attributes */
2482 snprintf(gdbstub_device_name, sizeof(gdbstub_device_name),
2483 "%s,nowait,nodelay,server", device);
2484 device = gdbstub_device_name;
2487 else if (strcmp(device, "stdio") == 0) {
2488 struct sigaction act;
2490 memset(&act, 0, sizeof(act));
2491 act.sa_handler = gdb_sigterm_handler;
2492 sigaction(SIGINT, &act, NULL);
2495 chr = qemu_chr_new("gdb", device, NULL);
2499 qemu_chr_fe_claim_no_fail(chr);
2500 qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
2501 gdb_chr_event, NULL);
2504 s = gdbserver_state;
2506 s = g_malloc0(sizeof(GDBState));
2507 gdbserver_state = s;
2509 qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
2511 /* Initialize a monitor terminal for gdb */
2512 mon_chr = g_malloc0(sizeof(*mon_chr));
2513 mon_chr->chr_write = gdb_monitor_write;
2514 monitor_init(mon_chr, 0);
2517 qemu_chr_delete(s->chr);
2518 mon_chr = s->mon_chr;
2519 memset(s, 0, sizeof(GDBState));
2521 s->c_cpu = first_cpu;
2522 s->g_cpu = first_cpu;
2524 s->state = chr ? RS_IDLE : RS_INACTIVE;
2525 s->mon_chr = mon_chr;
2526 s->current_syscall_cb = NULL;