1 /* Target-dependent code for the NEC V850 for GDB, the GNU debugger.
3 Copyright (C) 1996-2013 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "frame-base.h"
23 #include "trad-frame.h"
24 #include "frame-unwind.h"
25 #include "dwarf2-frame.h"
28 #include "gdb_string.h"
29 #include "gdb_assert.h"
31 #include "arch-utils.h"
38 /* General purpose registers. */
42 E_R3_REGNUM, E_SP_REGNUM = E_R3_REGNUM,
45 E_R6_REGNUM, E_ARG0_REGNUM = E_R6_REGNUM,
48 E_R9_REGNUM, E_ARGLAST_REGNUM = E_R9_REGNUM,
49 E_R10_REGNUM, E_V0_REGNUM = E_R10_REGNUM,
50 E_R11_REGNUM, E_V1_REGNUM = E_R11_REGNUM,
68 E_R29_REGNUM, E_FP_REGNUM = E_R29_REGNUM,
69 E_R30_REGNUM, E_EP_REGNUM = E_R30_REGNUM,
70 E_R31_REGNUM, E_LP_REGNUM = E_R31_REGNUM,
72 /* System registers - main banks. */
73 E_R32_REGNUM, E_SR0_REGNUM = E_R32_REGNUM,
78 E_R37_REGNUM, E_PS_REGNUM = E_R37_REGNUM,
93 E_R52_REGNUM, E_CTBP_REGNUM = E_R52_REGNUM,
107 E_R64_REGNUM, E_PC_REGNUM = E_R64_REGNUM,
110 E_NUM_OF_V850E_REGS = E_NUM_OF_V850_REGS,
112 /* System registers - MPV (PROT00) bank. */
113 E_R66_REGNUM = E_NUM_OF_V850_REGS,
142 /* System registers - MPU (PROT01) bank. */
172 /* FPU system registers. */
179 E_R128_REGNUM, E_FPSR_REGNUM = E_R128_REGNUM,
180 E_R129_REGNUM, E_FPEPC_REGNUM = E_R129_REGNUM,
181 E_R130_REGNUM, E_FPST_REGNUM = E_R130_REGNUM,
182 E_R131_REGNUM, E_FPCC_REGNUM = E_R131_REGNUM,
183 E_R132_REGNUM, E_FPCFG_REGNUM = E_R132_REGNUM,
208 /* Size of return datatype which fits into all return registers. */
211 E_MAX_RETTYPE_SIZE_IN_REGS = 2 * v850_reg_size
214 struct v850_frame_cache
221 /* Flag showing that a frame has been created in the prologue code. */
224 /* Saved registers. */
225 struct trad_frame_saved_reg *saved_regs;
228 /* Info gleaned from scanning a function's prologue. */
229 struct pifsr /* Info about one saved register. */
231 int offset; /* Offset from sp or fp. */
232 int cur_frameoffset; /* Current frameoffset. */
233 int reg; /* Saved register number. */
237 v850_register_name (struct gdbarch *gdbarch, int regnum)
239 static const char *v850_reg_names[] =
240 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
241 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
242 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
243 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
244 "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
245 "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
246 "sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23",
247 "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
250 if (regnum < 0 || regnum > E_NUM_OF_V850_REGS)
252 return v850_reg_names[regnum];
256 v850e_register_name (struct gdbarch *gdbarch, int regnum)
258 static const char *v850e_reg_names[] =
260 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
261 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
262 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
263 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
264 "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
265 "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
266 "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
267 "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
270 if (regnum < 0 || regnum > E_NUM_OF_V850E_REGS)
272 return v850e_reg_names[regnum];
276 v850e2_register_name (struct gdbarch *gdbarch, int regnum)
278 static const char *v850e2_reg_names[] =
280 /* General purpose registers. */
281 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
282 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
283 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
284 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
286 /* System registers - main banks. */
287 "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "pid", "cfg",
288 "", "", "", "sccfg", "scbp", "eiic", "feic", "dbic",
289 "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "dir", "", "",
290 "", "", "", "", "eiwr", "fewr", "dbwr", "bsel",
296 /* System registers - MPV (PROT00) bank. */
297 "vsecr", "vstid", "vsadr", "", "vmecr", "vmtid", "vmadr", "",
298 "vpecr", "vptid", "vpadr", "", "", "", "", "",
299 "", "", "", "", "", "", "", "",
300 "mca", "mcs", "mcc", "mcr",
302 /* System registers - MPU (PROT01) bank. */
303 "mpm", "mpc", "tid", "", "", "", "ipa0l", "ipa0u",
304 "ipa1l", "ipa1u", "ipa2l", "ipa2u", "ipa3l", "ipa3u", "ipa4l", "ipa4u",
305 "dpa0l", "dpa0u", "dpa1l", "dpa1u", "dpa2l", "dpa2u", "dpa3l", "dpa3u",
306 "dpa4l", "dpa4u", "dpa5l", "dpa5u",
308 /* FPU system registers. */
309 "", "", "", "", "", "", "fpsr", "fpepc",
310 "fpst", "fpcc", "fpcfg", "fpec", "", "", "", "",
311 "", "", "", "", "", "", "", "",
314 if (regnum < 0 || regnum >= E_NUM_REGS)
316 return v850e2_reg_names[regnum];
319 /* Returns the default type for register N. */
322 v850_register_type (struct gdbarch *gdbarch, int regnum)
324 if (regnum == E_PC_REGNUM)
325 return builtin_type (gdbarch)->builtin_func_ptr;
326 return builtin_type (gdbarch)->builtin_int32;
330 v850_type_is_scalar (struct type *t)
332 return (TYPE_CODE (t) != TYPE_CODE_STRUCT
333 && TYPE_CODE (t) != TYPE_CODE_UNION
334 && TYPE_CODE (t) != TYPE_CODE_ARRAY);
337 /* Should call_function allocate stack space for a struct return? */
339 v850_use_struct_convention (struct type *type)
342 struct type *fld_type, *tgt_type;
344 /* 1. The value is greater than 8 bytes -> returned by copying. */
345 if (TYPE_LENGTH (type) > 8)
348 /* 2. The value is a single basic type -> returned in register. */
349 if (v850_type_is_scalar (type))
352 /* The value is a structure or union with a single element and that
353 element is either a single basic type or an array of a single basic
354 type whose size is greater than or equal to 4 -> returned in register. */
355 if ((TYPE_CODE (type) == TYPE_CODE_STRUCT
356 || TYPE_CODE (type) == TYPE_CODE_UNION)
357 && TYPE_NFIELDS (type) == 1)
359 fld_type = TYPE_FIELD_TYPE (type, 0);
360 if (v850_type_is_scalar (fld_type) && TYPE_LENGTH (fld_type) >= 4)
363 if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY)
365 tgt_type = TYPE_TARGET_TYPE (fld_type);
366 if (v850_type_is_scalar (tgt_type) && TYPE_LENGTH (tgt_type) >= 4)
371 /* The value is a structure whose first element is an integer or a float,
372 and which contains no arrays of more than two elements -> returned in
374 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
375 && v850_type_is_scalar (TYPE_FIELD_TYPE (type, 0))
376 && TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)) == 4)
378 for (i = 1; i < TYPE_NFIELDS (type); ++i)
380 fld_type = TYPE_FIELD_TYPE (type, 0);
381 if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY)
383 tgt_type = TYPE_TARGET_TYPE (fld_type);
384 if (TYPE_LENGTH (fld_type) >= 0 && TYPE_LENGTH (tgt_type) >= 0
385 && TYPE_LENGTH (fld_type) / TYPE_LENGTH (tgt_type) > 2)
392 /* The value is a union which contains at least one field which
393 would be returned in registers according to these rules ->
394 returned in register. */
395 if (TYPE_CODE (type) == TYPE_CODE_UNION)
397 for (i = 0; i < TYPE_NFIELDS (type); ++i)
399 fld_type = TYPE_FIELD_TYPE (type, 0);
400 if (!v850_use_struct_convention (fld_type))
408 /* Structure for mapping bits in register lists to register numbers. */
415 /* Helper function for v850_scan_prologue to handle prepare instruction. */
418 v850_handle_prepare (int insn, int insn2, CORE_ADDR * current_pc_ptr,
419 struct v850_frame_cache *pi, struct pifsr **pifsr_ptr)
421 CORE_ADDR current_pc = *current_pc_ptr;
422 struct pifsr *pifsr = *pifsr_ptr;
423 long next = insn2 & 0xffff;
424 long list12 = ((insn & 1) << 16) + (next & 0xffe0);
425 long offset = (insn & 0x3e) << 1;
426 static struct reg_list reg_table[] =
428 {0x00800, 20}, /* r20 */
429 {0x00400, 21}, /* r21 */
430 {0x00200, 22}, /* r22 */
431 {0x00100, 23}, /* r23 */
432 {0x08000, 24}, /* r24 */
433 {0x04000, 25}, /* r25 */
434 {0x02000, 26}, /* r26 */
435 {0x01000, 27}, /* r27 */
436 {0x00080, 28}, /* r28 */
437 {0x00040, 29}, /* r29 */
438 {0x10000, 30}, /* ep */
439 {0x00020, 31}, /* lp */
440 {0, 0} /* end of table */
444 if ((next & 0x1f) == 0x0b) /* skip imm16 argument */
446 else if ((next & 0x1f) == 0x13) /* skip imm16 argument */
448 else if ((next & 0x1f) == 0x1b) /* skip imm32 argument */
451 /* Calculate the total size of the saved registers, and add it to the
452 immediate value used to adjust SP. */
453 for (i = 0; reg_table[i].mask != 0; i++)
454 if (list12 & reg_table[i].mask)
455 offset += v850_reg_size;
456 pi->sp_offset -= offset;
458 /* Calculate the offsets of the registers relative to the value the SP
459 will have after the registers have been pushed and the imm5 value has
460 been subtracted from it. */
463 for (i = 0; reg_table[i].mask != 0; i++)
465 if (list12 & reg_table[i].mask)
467 int reg = reg_table[i].regno;
468 offset -= v850_reg_size;
470 pifsr->offset = offset;
471 pifsr->cur_frameoffset = pi->sp_offset;
477 /* Set result parameters. */
478 *current_pc_ptr = current_pc;
483 /* Helper function for v850_scan_prologue to handle pushm/pushl instructions.
484 The SR bit of the register list is not supported. gcc does not generate
488 v850_handle_pushm (int insn, int insn2, struct v850_frame_cache *pi,
489 struct pifsr **pifsr_ptr)
491 struct pifsr *pifsr = *pifsr_ptr;
492 long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0);
494 static struct reg_list pushml_reg_table[] =
496 {0x80000, E_PS_REGNUM}, /* PSW */
497 {0x40000, 1}, /* r1 */
498 {0x20000, 2}, /* r2 */
499 {0x10000, 3}, /* r3 */
500 {0x00800, 4}, /* r4 */
501 {0x00400, 5}, /* r5 */
502 {0x00200, 6}, /* r6 */
503 {0x00100, 7}, /* r7 */
504 {0x08000, 8}, /* r8 */
505 {0x04000, 9}, /* r9 */
506 {0x02000, 10}, /* r10 */
507 {0x01000, 11}, /* r11 */
508 {0x00080, 12}, /* r12 */
509 {0x00040, 13}, /* r13 */
510 {0x00020, 14}, /* r14 */
511 {0x00010, 15}, /* r15 */
512 {0, 0} /* end of table */
514 static struct reg_list pushmh_reg_table[] =
516 {0x80000, 16}, /* r16 */
517 {0x40000, 17}, /* r17 */
518 {0x20000, 18}, /* r18 */
519 {0x10000, 19}, /* r19 */
520 {0x00800, 20}, /* r20 */
521 {0x00400, 21}, /* r21 */
522 {0x00200, 22}, /* r22 */
523 {0x00100, 23}, /* r23 */
524 {0x08000, 24}, /* r24 */
525 {0x04000, 25}, /* r25 */
526 {0x02000, 26}, /* r26 */
527 {0x01000, 27}, /* r27 */
528 {0x00080, 28}, /* r28 */
529 {0x00040, 29}, /* r29 */
530 {0x00010, 30}, /* r30 */
531 {0x00020, 31}, /* r31 */
532 {0, 0} /* end of table */
534 struct reg_list *reg_table;
537 /* Is this a pushml or a pushmh? */
538 if ((insn2 & 7) == 1)
539 reg_table = pushml_reg_table;
541 reg_table = pushmh_reg_table;
543 /* Calculate the total size of the saved registers, and add it to the
544 immediate value used to adjust SP. */
545 for (i = 0; reg_table[i].mask != 0; i++)
546 if (list12 & reg_table[i].mask)
547 offset += v850_reg_size;
548 pi->sp_offset -= offset;
550 /* Calculate the offsets of the registers relative to the value the SP
551 will have after the registers have been pushed and the imm5 value is
552 subtracted from it. */
555 for (i = 0; reg_table[i].mask != 0; i++)
557 if (list12 & reg_table[i].mask)
559 int reg = reg_table[i].regno;
560 offset -= v850_reg_size;
562 pifsr->offset = offset;
563 pifsr->cur_frameoffset = pi->sp_offset;
569 /* Set result parameters. */
573 /* Helper function to evaluate if register is one of the "save" registers.
574 This allows to simplify conditionals in v850_analyze_prologue a lot. */
577 v850_is_save_register (int reg)
579 /* The caller-save registers are R2, R20 - R29 and R31. All other
580 registers are either special purpose (PC, SP), argument registers,
581 or just considered free for use in the caller. */
582 return reg == E_R2_REGNUM
583 || (reg >= E_R20_REGNUM && reg <= E_R29_REGNUM)
584 || reg == E_R31_REGNUM;
587 /* Scan the prologue of the function that contains PC, and record what
588 we find in PI. Returns the pc after the prologue. Note that the
589 addresses saved in frame->saved_regs are just frame relative (negative
590 offsets from the frame pointer). This is because we don't know the
591 actual value of the frame pointer yet. In some circumstances, the
592 frame pointer can't be determined till after we have scanned the
596 v850_analyze_prologue (struct gdbarch *gdbarch,
597 CORE_ADDR func_addr, CORE_ADDR pc,
598 struct v850_frame_cache *pi, ULONGEST ctbp)
600 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
601 CORE_ADDR prologue_end, current_pc;
602 struct pifsr pifsrs[E_NUM_REGS + 1];
603 struct pifsr *pifsr, *pifsr_tmp;
606 CORE_ADDR save_pc, save_end;
610 memset (&pifsrs, 0, sizeof pifsrs);
615 /* Now, search the prologue looking for instructions that setup fp, save
616 rp, adjust sp and such. We also record the frame offset of any saved
627 for (current_pc = func_addr; current_pc < prologue_end;)
630 int insn2 = -1; /* dummy value */
632 insn = read_memory_integer (current_pc, 2, byte_order);
634 if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */
636 insn2 = read_memory_integer (current_pc, 2, byte_order);
640 if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p)
641 { /* jarl <func>,10 */
642 long low_disp = insn2 & ~(long) 1;
643 long disp = (((((insn & 0x3f) << 16) + low_disp)
644 & ~(long) 1) ^ 0x00200000) - 0x00200000;
646 save_pc = current_pc;
647 save_end = prologue_end;
649 current_pc += disp - 4;
650 prologue_end = (current_pc
651 + (2 * 3) /* moves to/from ep */
652 + 4 /* addi <const>,sp,sp */
654 + (2 * 12) /* sst.w to save r2, r20-r29, r31 */
655 + 20); /* slop area */
657 else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p)
659 long adr = ctbp + ((insn & 0x3f) << 1);
661 save_pc = current_pc;
662 save_end = prologue_end;
664 current_pc = ctbp + (read_memory_unsigned_integer (adr, 2, byte_order)
666 prologue_end = (current_pc
667 + (2 * 3) /* prepare list2,imm5,sp/imm */
669 + 20); /* slop area */
672 else if ((insn & 0xffc0) == 0x0780) /* prepare list2,imm5 */
674 v850_handle_prepare (insn, insn2, ¤t_pc, pi, &pifsr);
677 else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144)
678 { /* ctret after processing register save. */
679 current_pc = save_pc;
680 prologue_end = save_end;
684 else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1)
685 { /* pushml, pushmh */
686 v850_handle_pushm (insn, insn2, pi, &pifsr);
689 else if ((insn & 0xffe0) == 0x0060 && regsave_func_p)
690 { /* jmp after processing register save. */
691 current_pc = save_pc;
692 prologue_end = save_end;
696 else if ((insn & 0x07c0) == 0x0780 /* jarl or jr */
697 || (insn & 0xffe0) == 0x0060 /* jmp */
698 || (insn & 0x0780) == 0x0580) /* branch */
700 break; /* Ran into end of prologue. */
703 else if ((insn & 0xffe0) == ((E_SP_REGNUM << 11) | 0x0240))
705 pi->sp_offset += ((insn & 0x1f) ^ 0x10) - 0x10;
706 else if (insn == ((E_SP_REGNUM << 11) | 0x0600 | E_SP_REGNUM))
707 /* addi <imm>,sp,sp */
708 pi->sp_offset += insn2;
709 else if (insn == ((E_FP_REGNUM << 11) | 0x0000 | E_SP_REGNUM))
712 else if (insn == ((E_R12_REGNUM << 11) | 0x0640 | E_R0_REGNUM))
713 /* movhi hi(const),r0,r12 */
714 r12_tmp = insn2 << 16;
715 else if (insn == ((E_R12_REGNUM << 11) | 0x0620 | E_R12_REGNUM))
716 /* movea lo(const),r12,r12 */
718 else if (insn == ((E_SP_REGNUM << 11) | 0x01c0 | E_R12_REGNUM) && r12_tmp)
720 pi->sp_offset += r12_tmp;
721 else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_SP_REGNUM))
724 else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_R1_REGNUM))
727 else if (((insn & 0x07ff) == (0x0760 | E_SP_REGNUM)
729 && (insn & 0x07ff) == (0x0760 | E_FP_REGNUM)))
731 && v850_is_save_register (reg = (insn >> 11) & 0x1f))
733 /* st.w <reg>,<offset>[sp] or st.w <reg>,<offset>[fp] */
735 pifsr->offset = insn2 & ~1;
736 pifsr->cur_frameoffset = pi->sp_offset;
740 && ((insn & 0x0781) == 0x0501)
742 && v850_is_save_register (reg = (insn >> 11) & 0x1f))
744 /* sst.w <reg>,<offset>[ep] */
746 pifsr->offset = (insn & 0x007e) << 1;
747 pifsr->cur_frameoffset = pi->sp_offset;
752 /* Fix up any offsets to the final offset. If a frame pointer was created,
753 use it instead of the stack pointer. */
754 for (pifsr_tmp = pifsrs; pifsr_tmp != pifsr; pifsr_tmp++)
756 pifsr_tmp->offset -= pi->sp_offset - pifsr_tmp->cur_frameoffset;
757 pi->saved_regs[pifsr_tmp->reg].addr = pifsr_tmp->offset;
763 /* Return the address of the first code past the prologue of the function. */
766 v850_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
768 CORE_ADDR func_addr, func_end;
770 /* See what the symbol table says. */
772 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
774 struct symtab_and_line sal;
776 sal = find_pc_line (func_addr, 0);
777 if (sal.line != 0 && sal.end < func_end)
780 /* Either there's no line info, or the line after the prologue is after
781 the end of the function. In this case, there probably isn't a
786 /* We can't find the start of this function, so there's nothing we
792 v850_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
797 /* Setup arguments and LP for a call to the target. First four args
798 go in R6->R9, subsequent args go into sp + 16 -> sp + ... Structs
799 are passed by reference. 64 bit quantities (doubles and long longs)
800 may be split between the regs and the stack. When calling a function
801 that returns a struct, a pointer to the struct is passed in as a secret
802 first argument (always in R6).
804 Stack space for the args has NOT been allocated: that job is up to us. */
807 v850_push_dummy_call (struct gdbarch *gdbarch,
808 struct value *function,
809 struct regcache *regcache,
815 CORE_ADDR struct_addr)
817 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
823 /* The offset onto the stack at which we will start copying parameters
824 (after the registers are used up) begins at 16 rather than at zero.
825 That's how the ABI is defined, though there's no indication that these
826 16 bytes are used for anything, not even for saving incoming
827 argument registers. */
830 /* Now make space on the stack for the args. */
831 for (argnum = 0; argnum < nargs; argnum++)
832 len += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3);
833 sp -= len + stack_offset;
835 argreg = E_ARG0_REGNUM;
836 /* The struct_return pointer occupies the first parameter register. */
838 regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
840 /* Now load as many as possible of the first arguments into
841 registers, and push the rest onto the stack. There are 16 bytes
842 in four registers available. Loop thru args from first to last. */
843 for (argnum = 0; argnum < nargs; argnum++)
847 gdb_byte valbuf[v850_reg_size];
849 if (!v850_type_is_scalar (value_type (*args))
850 && TYPE_LENGTH (value_type (*args)) > E_MAX_RETTYPE_SIZE_IN_REGS)
852 store_unsigned_integer (valbuf, 4, byte_order,
853 value_address (*args));
859 len = TYPE_LENGTH (value_type (*args));
860 val = (gdb_byte *) value_contents (*args);
864 if (argreg <= E_ARGLAST_REGNUM)
868 regval = extract_unsigned_integer (val, v850_reg_size, byte_order);
869 regcache_cooked_write_unsigned (regcache, argreg, regval);
871 len -= v850_reg_size;
872 val += v850_reg_size;
877 write_memory (sp + stack_offset, val, 4);
886 /* Store return address. */
887 regcache_cooked_write_unsigned (regcache, E_LP_REGNUM, bp_addr);
889 /* Update stack pointer. */
890 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
896 v850_extract_return_value (struct type *type, struct regcache *regcache,
899 struct gdbarch *gdbarch = get_regcache_arch (regcache);
900 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
901 int len = TYPE_LENGTH (type);
903 if (len <= v850_reg_size)
907 regcache_cooked_read_unsigned (regcache, E_V0_REGNUM, &val);
908 store_unsigned_integer (valbuf, len, byte_order, val);
910 else if (len <= 2 * v850_reg_size)
912 int i, regnum = E_V0_REGNUM;
913 gdb_byte buf[v850_reg_size];
914 for (i = 0; len > 0; i += 4, len -= 4)
916 regcache_raw_read (regcache, regnum++, buf);
917 memcpy (valbuf + i, buf, len > 4 ? 4 : len);
923 v850_store_return_value (struct type *type, struct regcache *regcache,
924 const gdb_byte *valbuf)
926 struct gdbarch *gdbarch = get_regcache_arch (regcache);
927 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
928 int len = TYPE_LENGTH (type);
930 if (len <= v850_reg_size)
931 regcache_cooked_write_unsigned
932 (regcache, E_V0_REGNUM,
933 extract_unsigned_integer (valbuf, len, byte_order));
934 else if (len <= 2 * v850_reg_size)
936 int i, regnum = E_V0_REGNUM;
937 for (i = 0; i < len; i += 4)
938 regcache_raw_write (regcache, regnum++, valbuf + i);
942 static enum return_value_convention
943 v850_return_value (struct gdbarch *gdbarch, struct value *function,
944 struct type *type, struct regcache *regcache,
945 gdb_byte *readbuf, const gdb_byte *writebuf)
947 if (v850_use_struct_convention (type))
948 return RETURN_VALUE_STRUCT_CONVENTION;
950 v850_store_return_value (type, regcache, writebuf);
952 v850_extract_return_value (type, regcache, readbuf);
953 return RETURN_VALUE_REGISTER_CONVENTION;
956 const static unsigned char *
957 v850_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
959 static unsigned char breakpoint[] = { 0x85, 0x05 };
960 *lenptr = sizeof (breakpoint);
964 static struct v850_frame_cache *
965 v850_alloc_frame_cache (struct frame_info *this_frame)
967 struct v850_frame_cache *cache;
969 cache = FRAME_OBSTACK_ZALLOC (struct v850_frame_cache);
970 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
974 cache->sp_offset = 0;
977 /* Frameless until proven otherwise. */
983 static struct v850_frame_cache *
984 v850_frame_cache (struct frame_info *this_frame, void **this_cache)
986 struct gdbarch *gdbarch = get_frame_arch (this_frame);
987 struct v850_frame_cache *cache;
988 CORE_ADDR current_pc;
994 cache = v850_alloc_frame_cache (this_frame);
997 /* In principle, for normal frames, fp holds the frame pointer,
998 which holds the base address for the current stack frame.
999 However, for functions that don't need it, the frame pointer is
1000 optional. For these "frameless" functions the frame pointer is
1001 actually the frame pointer of the calling frame. */
1002 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
1003 if (cache->base == 0)
1006 cache->pc = get_frame_func (this_frame);
1007 current_pc = get_frame_pc (this_frame);
1011 ctbp = get_frame_register_unsigned (this_frame, E_CTBP_REGNUM);
1012 v850_analyze_prologue (gdbarch, cache->pc, current_pc, cache, ctbp);
1015 if (!cache->uses_fp)
1017 /* We didn't find a valid frame, which means that CACHE->base
1018 currently holds the frame pointer for our calling frame. If
1019 we're at the start of a function, or somewhere half-way its
1020 prologue, the function's frame probably hasn't been fully
1021 setup yet. Try to reconstruct the base address for the stack
1022 frame by looking at the stack pointer. For truly "frameless"
1023 functions this might work too. */
1024 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1027 /* Now that we have the base address for the stack frame we can
1028 calculate the value of sp in the calling frame. */
1029 trad_frame_set_value (cache->saved_regs, E_SP_REGNUM,
1030 cache->base - cache->sp_offset);
1032 /* Adjust all the saved registers such that they contain addresses
1033 instead of offsets. */
1034 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
1035 if (trad_frame_addr_p (cache->saved_regs, i))
1036 cache->saved_regs[i].addr += cache->base;
1038 /* The call instruction moves the caller's PC in the callee's LP.
1039 Since this is an unwind, do the reverse. Copy the location of LP
1040 into PC (the address / regnum) so that a request for PC will be
1041 converted into a request for the LP. */
1043 cache->saved_regs[E_PC_REGNUM] = cache->saved_regs[E_LP_REGNUM];
1049 static struct value *
1050 v850_frame_prev_register (struct frame_info *this_frame,
1051 void **this_cache, int regnum)
1053 struct v850_frame_cache *cache = v850_frame_cache (this_frame, this_cache);
1055 gdb_assert (regnum >= 0);
1057 return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum);
1061 v850_frame_this_id (struct frame_info *this_frame, void **this_cache,
1062 struct frame_id *this_id)
1064 struct v850_frame_cache *cache = v850_frame_cache (this_frame, this_cache);
1066 /* This marks the outermost frame. */
1067 if (cache->base == 0)
1070 *this_id = frame_id_build (cache->saved_regs[E_SP_REGNUM].addr, cache->pc);
1073 static const struct frame_unwind v850_frame_unwind = {
1075 default_frame_unwind_stop_reason,
1077 v850_frame_prev_register,
1079 default_frame_sniffer
1083 v850_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1085 return frame_unwind_register_unsigned (next_frame,
1086 gdbarch_sp_regnum (gdbarch));
1090 v850_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1092 return frame_unwind_register_unsigned (next_frame,
1093 gdbarch_pc_regnum (gdbarch));
1096 static struct frame_id
1097 v850_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1099 CORE_ADDR sp = get_frame_register_unsigned (this_frame,
1100 gdbarch_sp_regnum (gdbarch));
1101 return frame_id_build (sp, get_frame_pc (this_frame));
1105 v850_frame_base_address (struct frame_info *this_frame, void **this_cache)
1107 struct v850_frame_cache *cache = v850_frame_cache (this_frame, this_cache);
1112 static const struct frame_base v850_frame_base = {
1114 v850_frame_base_address,
1115 v850_frame_base_address,
1116 v850_frame_base_address
1119 static struct gdbarch *
1120 v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1122 struct gdbarch *gdbarch;
1124 /* Change the register names based on the current machine type. */
1125 if (info.bfd_arch_info->arch != bfd_arch_v850)
1128 gdbarch = gdbarch_alloc (&info, NULL);
1130 switch (info.bfd_arch_info->mach)
1133 set_gdbarch_register_name (gdbarch, v850_register_name);
1134 set_gdbarch_num_regs (gdbarch, E_NUM_OF_V850_REGS);
1136 case bfd_mach_v850e:
1137 case bfd_mach_v850e1:
1138 set_gdbarch_register_name (gdbarch, v850e_register_name);
1139 set_gdbarch_num_regs (gdbarch, E_NUM_OF_V850E_REGS);
1141 case bfd_mach_v850e2:
1142 case bfd_mach_v850e2v3:
1143 set_gdbarch_register_name (gdbarch, v850e2_register_name);
1144 set_gdbarch_num_regs (gdbarch, E_NUM_REGS);
1148 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1149 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1150 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1151 set_gdbarch_fp0_regnum (gdbarch, -1);
1153 set_gdbarch_register_type (gdbarch, v850_register_type);
1155 set_gdbarch_char_signed (gdbarch, 1);
1156 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1157 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1158 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1159 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1161 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1162 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1163 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1165 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1166 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1168 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1169 set_gdbarch_breakpoint_from_pc (gdbarch, v850_breakpoint_from_pc);
1171 set_gdbarch_return_value (gdbarch, v850_return_value);
1172 set_gdbarch_push_dummy_call (gdbarch, v850_push_dummy_call);
1173 set_gdbarch_skip_prologue (gdbarch, v850_skip_prologue);
1175 set_gdbarch_print_insn (gdbarch, print_insn_v850);
1177 set_gdbarch_frame_align (gdbarch, v850_frame_align);
1178 set_gdbarch_unwind_sp (gdbarch, v850_unwind_sp);
1179 set_gdbarch_unwind_pc (gdbarch, v850_unwind_pc);
1180 set_gdbarch_dummy_id (gdbarch, v850_dummy_id);
1181 frame_base_set_default (gdbarch, &v850_frame_base);
1183 /* Hook in ABI-specific overrides, if they have been registered. */
1184 gdbarch_init_osabi (info, gdbarch);
1186 dwarf2_append_unwinders (gdbarch);
1187 frame_unwind_append_unwinder (gdbarch, &v850_frame_unwind);
1192 extern initialize_file_ftype _initialize_v850_tdep; /* -Wmissing-prototypes */
1195 _initialize_v850_tdep (void)
1197 register_gdbarch_init (bfd_arch_v850, v850_gdbarch_init);