1 /* Target-dependent code for the Tilera TILE-Gx processor.
3 Copyright (C) 2012-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "frame-base.h"
23 #include "frame-unwind.h"
24 #include "dwarf2-frame.h"
25 #include "trad-frame.h"
34 #include "arch-utils.h"
35 #include "floatformat.h"
40 #include "linux-tdep.h"
42 #include "solib-svr4.h"
43 #include "tilegx-tdep.h"
44 #include "opcode/tilegx.h"
46 struct tilegx_frame_cache
53 /* Table of saved registers. */
54 struct trad_frame_saved_reg *saved_regs;
57 /* Register state values used by analyze_prologue. */
60 REVERSE_STATE_REGISTER,
65 /* Register state used by analyze_prologue(). */
66 struct tilegx_reverse_regs
69 enum reverse_state state;
72 static const struct tilegx_reverse_regs
73 template_reverse_regs[TILEGX_NUM_PHYS_REGS] =
75 { TILEGX_R0_REGNUM, REVERSE_STATE_REGISTER },
76 { TILEGX_R1_REGNUM, REVERSE_STATE_REGISTER },
77 { TILEGX_R2_REGNUM, REVERSE_STATE_REGISTER },
78 { TILEGX_R3_REGNUM, REVERSE_STATE_REGISTER },
79 { TILEGX_R4_REGNUM, REVERSE_STATE_REGISTER },
80 { TILEGX_R5_REGNUM, REVERSE_STATE_REGISTER },
81 { TILEGX_R6_REGNUM, REVERSE_STATE_REGISTER },
82 { TILEGX_R7_REGNUM, REVERSE_STATE_REGISTER },
83 { TILEGX_R8_REGNUM, REVERSE_STATE_REGISTER },
84 { TILEGX_R9_REGNUM, REVERSE_STATE_REGISTER },
85 { TILEGX_R10_REGNUM, REVERSE_STATE_REGISTER },
86 { TILEGX_R11_REGNUM, REVERSE_STATE_REGISTER },
87 { TILEGX_R12_REGNUM, REVERSE_STATE_REGISTER },
88 { TILEGX_R13_REGNUM, REVERSE_STATE_REGISTER },
89 { TILEGX_R14_REGNUM, REVERSE_STATE_REGISTER },
90 { TILEGX_R15_REGNUM, REVERSE_STATE_REGISTER },
91 { TILEGX_R16_REGNUM, REVERSE_STATE_REGISTER },
92 { TILEGX_R17_REGNUM, REVERSE_STATE_REGISTER },
93 { TILEGX_R18_REGNUM, REVERSE_STATE_REGISTER },
94 { TILEGX_R19_REGNUM, REVERSE_STATE_REGISTER },
95 { TILEGX_R20_REGNUM, REVERSE_STATE_REGISTER },
96 { TILEGX_R21_REGNUM, REVERSE_STATE_REGISTER },
97 { TILEGX_R22_REGNUM, REVERSE_STATE_REGISTER },
98 { TILEGX_R23_REGNUM, REVERSE_STATE_REGISTER },
99 { TILEGX_R24_REGNUM, REVERSE_STATE_REGISTER },
100 { TILEGX_R25_REGNUM, REVERSE_STATE_REGISTER },
101 { TILEGX_R26_REGNUM, REVERSE_STATE_REGISTER },
102 { TILEGX_R27_REGNUM, REVERSE_STATE_REGISTER },
103 { TILEGX_R28_REGNUM, REVERSE_STATE_REGISTER },
104 { TILEGX_R29_REGNUM, REVERSE_STATE_REGISTER },
105 { TILEGX_R30_REGNUM, REVERSE_STATE_REGISTER },
106 { TILEGX_R31_REGNUM, REVERSE_STATE_REGISTER },
107 { TILEGX_R32_REGNUM, REVERSE_STATE_REGISTER },
108 { TILEGX_R33_REGNUM, REVERSE_STATE_REGISTER },
109 { TILEGX_R34_REGNUM, REVERSE_STATE_REGISTER },
110 { TILEGX_R35_REGNUM, REVERSE_STATE_REGISTER },
111 { TILEGX_R36_REGNUM, REVERSE_STATE_REGISTER },
112 { TILEGX_R37_REGNUM, REVERSE_STATE_REGISTER },
113 { TILEGX_R38_REGNUM, REVERSE_STATE_REGISTER },
114 { TILEGX_R39_REGNUM, REVERSE_STATE_REGISTER },
115 { TILEGX_R40_REGNUM, REVERSE_STATE_REGISTER },
116 { TILEGX_R41_REGNUM, REVERSE_STATE_REGISTER },
117 { TILEGX_R42_REGNUM, REVERSE_STATE_REGISTER },
118 { TILEGX_R43_REGNUM, REVERSE_STATE_REGISTER },
119 { TILEGX_R44_REGNUM, REVERSE_STATE_REGISTER },
120 { TILEGX_R45_REGNUM, REVERSE_STATE_REGISTER },
121 { TILEGX_R46_REGNUM, REVERSE_STATE_REGISTER },
122 { TILEGX_R47_REGNUM, REVERSE_STATE_REGISTER },
123 { TILEGX_R48_REGNUM, REVERSE_STATE_REGISTER },
124 { TILEGX_R49_REGNUM, REVERSE_STATE_REGISTER },
125 { TILEGX_R50_REGNUM, REVERSE_STATE_REGISTER },
126 { TILEGX_R51_REGNUM, REVERSE_STATE_REGISTER },
127 { TILEGX_R52_REGNUM, REVERSE_STATE_REGISTER },
128 { TILEGX_TP_REGNUM, REVERSE_STATE_REGISTER },
129 { TILEGX_SP_REGNUM, REVERSE_STATE_REGISTER },
130 { TILEGX_LR_REGNUM, REVERSE_STATE_REGISTER },
131 { 0, REVERSE_STATE_UNKNOWN },
132 { 0, REVERSE_STATE_UNKNOWN },
133 { 0, REVERSE_STATE_UNKNOWN },
134 { 0, REVERSE_STATE_UNKNOWN },
135 { 0, REVERSE_STATE_UNKNOWN },
136 { 0, REVERSE_STATE_UNKNOWN },
137 { 0, REVERSE_STATE_UNKNOWN },
138 { TILEGX_ZERO_REGNUM, REVERSE_STATE_VALUE }
141 /* Implement the "register_name" gdbarch method. */
144 tilegx_register_name (struct gdbarch *gdbarch, int regnum)
146 static const char *const register_names[TILEGX_NUM_REGS] =
148 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
149 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
150 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
151 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
152 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
153 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
154 "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr",
155 "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero",
159 if (regnum < 0 || regnum >= TILEGX_NUM_REGS)
160 internal_error (__FILE__, __LINE__,
161 "tilegx_register_name: invalid register number %d",
164 return register_names[regnum];
167 /* This is the implementation of gdbarch method register_type. */
170 tilegx_register_type (struct gdbarch *gdbarch, int regnum)
172 if (regnum == TILEGX_PC_REGNUM)
173 return builtin_type (gdbarch)->builtin_func_ptr;
175 return builtin_type (gdbarch)->builtin_uint64;
178 /* This is the implementation of gdbarch method dwarf2_reg_to_regnum. */
181 tilegx_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int num)
186 /* Makes the decision of whether a given type is a scalar type.
187 Scalar types are returned in the registers r2-r11 as they fit. */
190 tilegx_type_is_scalar (struct type *t)
192 return (TYPE_CODE(t) != TYPE_CODE_STRUCT
193 && TYPE_CODE(t) != TYPE_CODE_UNION
194 && TYPE_CODE(t) != TYPE_CODE_ARRAY);
197 /* Returns non-zero if the given struct type will be returned using
198 a special convention, rather than the normal function return method.
199 Used in the context of the "return" command, and target function
200 calls from the debugger. */
203 tilegx_use_struct_convention (struct type *type)
205 /* Only scalars which fit in R0 - R9 can be returned in registers.
206 Otherwise, they are returned via a pointer passed in R0. */
207 return (!tilegx_type_is_scalar (type)
208 && (TYPE_LENGTH (type) > (1 + TILEGX_R9_REGNUM - TILEGX_R0_REGNUM)
212 /* Find a function's return value in the appropriate registers (in
213 REGCACHE), and copy it into VALBUF. */
216 tilegx_extract_return_value (struct type *type, struct regcache *regcache,
219 int len = TYPE_LENGTH (type);
220 int i, regnum = TILEGX_R0_REGNUM;
222 for (i = 0; i < len; i += tilegx_reg_size)
223 regcache_raw_read (regcache, regnum++, valbuf + i);
226 /* Copy the function return value from VALBUF into the proper
227 location for a function return.
228 Called only in the context of the "return" command. */
231 tilegx_store_return_value (struct type *type, struct regcache *regcache,
234 if (TYPE_LENGTH (type) < tilegx_reg_size)
236 /* Add leading zeros to the (little-endian) value. */
237 gdb_byte buf[tilegx_reg_size] = { 0 };
239 memcpy (buf, valbuf, TYPE_LENGTH (type));
240 regcache_raw_write (regcache, TILEGX_R0_REGNUM, buf);
244 int len = TYPE_LENGTH (type);
245 int i, regnum = TILEGX_R0_REGNUM;
247 for (i = 0; i < len; i += tilegx_reg_size)
248 regcache_raw_write (regcache, regnum++, (gdb_byte *) valbuf + i);
252 /* This is the implementation of gdbarch method return_value. */
254 static enum return_value_convention
255 tilegx_return_value (struct gdbarch *gdbarch, struct value *function,
256 struct type *type, struct regcache *regcache,
257 gdb_byte *readbuf, const gdb_byte *writebuf)
259 if (tilegx_use_struct_convention (type))
260 return RETURN_VALUE_STRUCT_CONVENTION;
262 tilegx_store_return_value (type, regcache, writebuf);
264 tilegx_extract_return_value (type, regcache, readbuf);
265 return RETURN_VALUE_REGISTER_CONVENTION;
268 /* This is the implementation of gdbarch method frame_align. */
271 tilegx_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
277 /* Implement the "push_dummy_call" gdbarch method. */
280 tilegx_push_dummy_call (struct gdbarch *gdbarch,
281 struct value *function,
282 struct regcache *regcache,
283 CORE_ADDR bp_addr, int nargs,
285 CORE_ADDR sp, int struct_return,
286 CORE_ADDR struct_addr)
288 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
289 CORE_ADDR stack_dest = sp;
290 int argreg = TILEGX_R0_REGNUM;
292 int typelen, slacklen, alignlen;
293 static const gdb_byte four_zero_words[16] = { 0 };
295 /* If struct_return is 1, then the struct return address will
296 consume one argument-passing register. */
298 regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
300 /* Arguments are passed in R0 - R9, and as soon as an argument
301 will not fit completely in the remaining registers, then it,
302 and all remaining arguments, are put on the stack. */
303 for (i = 0; i < nargs && argreg <= TILEGX_R9_REGNUM; i++)
306 typelen = TYPE_LENGTH (value_enclosing_type (args[i]));
308 if (typelen > (TILEGX_R9_REGNUM - argreg + 1) * tilegx_reg_size)
311 /* Put argument into registers wordwise. */
312 val = value_contents (args[i]);
313 for (j = 0; j < typelen; j += tilegx_reg_size)
315 /* ISSUE: Why special handling for "typelen = 4x + 1"?
316 I don't ever see "typelen" values except 4 and 8. */
317 int n = (typelen - j == 1) ? 1 : tilegx_reg_size;
318 ULONGEST w = extract_unsigned_integer (val + j, n, byte_order);
320 regcache_cooked_write_unsigned (regcache, argreg++, w);
325 stack_dest = tilegx_frame_align (gdbarch, stack_dest);
327 /* Loop backwards through remaining arguments and push them on
328 the stack, word aligned. */
329 for (j = nargs - 1; j >= i; j--)
332 struct cleanup *back_to;
333 const gdb_byte *contents = value_contents (args[j]);
335 typelen = TYPE_LENGTH (value_enclosing_type (args[j]));
336 slacklen = align_up (typelen, 8) - typelen;
337 val = xmalloc (typelen + slacklen);
338 back_to = make_cleanup (xfree, val);
339 memcpy (val, contents, typelen);
340 memset (val + typelen, 0, slacklen);
342 /* Now write data to the stack. The stack grows downwards. */
343 stack_dest -= typelen + slacklen;
344 write_memory (stack_dest, val, typelen + slacklen);
345 do_cleanups (back_to);
348 /* Add 16 bytes for linkage space to the stack. */
349 stack_dest = stack_dest - 16;
350 write_memory (stack_dest, four_zero_words, 16);
352 /* Update stack pointer. */
353 regcache_cooked_write_unsigned (regcache, TILEGX_SP_REGNUM, stack_dest);
355 /* Set the return address register to point to the entry point of
356 the program, where a breakpoint lies in wait. */
357 regcache_cooked_write_unsigned (regcache, TILEGX_LR_REGNUM, bp_addr);
363 /* Decode the instructions within the given address range.
364 Decide when we must have reached the end of the function prologue.
365 If a frame_info pointer is provided, fill in its saved_regs etc.
366 Returns the address of the first instruction after the prologue.
367 NOTE: This is often called with start_addr being the start of some
368 function, and end_addr being the current PC. */
371 tilegx_analyze_prologue (struct gdbarch* gdbarch,
372 CORE_ADDR start_addr, CORE_ADDR end_addr,
373 struct tilegx_frame_cache *cache,
374 struct frame_info *next_frame)
376 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
378 CORE_ADDR prolog_end = end_addr;
379 ULONGEST inst, inst2;
382 gdb_byte instbuf[32 * TILEGX_BUNDLE_SIZE_IN_BYTES];
383 CORE_ADDR instbuf_start;
384 unsigned int instbuf_size;
387 struct tilegx_decoded_instruction
388 decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
390 struct tilegx_reverse_regs reverse_frame[TILEGX_NUM_PHYS_REGS];
391 struct tilegx_reverse_regs
392 new_reverse_frame[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
393 int dest_regs[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
394 int reverse_frame_valid, prolog_done, branch_seen, lr_saved_on_stack_p;
395 LONGEST prev_sp_value;
398 if (start_addr >= end_addr
399 || (start_addr % TILEGX_BUNDLE_ALIGNMENT_IN_BYTES) != 0)
402 /* Initialize the reverse frame. This maps the CURRENT frame's
403 registers to the outer frame's registers (the frame on the
404 stack goes the other way). */
405 memcpy (&reverse_frame, &template_reverse_regs, sizeof (reverse_frame));
410 lr_saved_on_stack_p = 0;
412 /* To cut down on round-trip overhead, we fetch multiple bundles
413 at once. These variables describe the range of memory we have
418 for (next_addr = start_addr;
419 next_addr < end_addr;
420 next_addr += TILEGX_BUNDLE_SIZE_IN_BYTES)
422 /* Retrieve the next instruction. */
423 if (next_addr - instbuf_start >= instbuf_size)
425 /* Figure out how many bytes to fetch. Don't span a page
426 boundary since that might cause an unnecessary memory
428 unsigned int size_on_same_page = 4096 - (next_addr & 4095);
430 instbuf_size = sizeof instbuf;
432 if (instbuf_size > size_on_same_page)
433 instbuf_size = size_on_same_page;
435 instbuf_size = min (instbuf_size, (end_addr - next_addr));
436 instbuf_start = next_addr;
438 status = safe_frame_unwind_memory (next_frame, instbuf_start,
439 instbuf, instbuf_size);
441 memory_error (status, next_addr);
444 reverse_frame_valid = 0;
446 bundle = extract_unsigned_integer (&instbuf[next_addr - instbuf_start],
449 num_insns = parse_insn_tilegx (bundle, next_addr, decoded);
451 for (i = 0; i < num_insns; i++)
453 struct tilegx_decoded_instruction *this_insn = &decoded[i];
454 int64_t *operands = (int64_t *) this_insn->operand_values;
455 const struct tilegx_opcode *opcode = this_insn->opcode;
457 switch (opcode->mnemonic)
461 && reverse_frame[operands[0]].state == REVERSE_STATE_VALUE
462 && reverse_frame[operands[1]].state
463 == REVERSE_STATE_REGISTER)
465 LONGEST saved_address = reverse_frame[operands[0]].value;
466 unsigned saved_register
467 = (unsigned) reverse_frame[operands[1]].value;
469 /* realreg >= 0 and addr != -1 indicates that the
470 value of saved_register is in memory location
471 saved_address. The value of realreg is not
472 meaningful in this case but it must be >= 0.
474 cache->saved_regs[saved_register].realreg = saved_register;
475 cache->saved_regs[saved_register].addr = saved_address;
478 && (operands[0] == TILEGX_SP_REGNUM)
479 && (operands[1] == TILEGX_LR_REGNUM))
480 lr_saved_on_stack_p = 1;
482 case TILEGX_OPC_ADDI:
483 case TILEGX_OPC_ADDLI:
485 && operands[0] == TILEGX_SP_REGNUM
486 && operands[1] == TILEGX_SP_REGNUM
487 && reverse_frame[operands[1]].state == REVERSE_STATE_REGISTER)
489 /* Special case. We're fixing up the stack frame. */
490 uint64_t hopefully_sp
491 = (unsigned) reverse_frame[operands[1]].value;
492 short op2_as_short = (short) operands[2];
493 signed char op2_as_char = (signed char) operands[2];
495 /* Fix up the sign-extension. */
496 if (opcode->mnemonic == TILEGX_OPC_ADDI)
497 op2_as_short = op2_as_char;
498 prev_sp_value = (cache->saved_regs[hopefully_sp].addr
501 new_reverse_frame[i].state = REVERSE_STATE_VALUE;
502 new_reverse_frame[i].value
503 = cache->saved_regs[hopefully_sp].addr;
504 trad_frame_set_value (cache->saved_regs,
505 hopefully_sp, prev_sp_value);
509 short op2_as_short = (short) operands[2];
510 signed char op2_as_char = (signed char) operands[2];
512 /* Fix up the sign-extension. */
513 if (opcode->mnemonic == TILEGX_OPC_ADDI)
514 op2_as_short = op2_as_char;
516 new_reverse_frame[i] = reverse_frame[operands[1]];
517 if (new_reverse_frame[i].state == REVERSE_STATE_VALUE)
518 new_reverse_frame[i].value += op2_as_short;
520 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
522 reverse_frame_valid |= 1 << i;
523 dest_regs[i] = operands[0];
526 if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE
527 && reverse_frame[operands[2]].state == REVERSE_STATE_VALUE)
529 /* We have values -- we can do this. */
530 new_reverse_frame[i] = reverse_frame[operands[2]];
531 new_reverse_frame[i].value
532 += reverse_frame[operands[i]].value;
536 /* We don't know anything about the values. Punt. */
537 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
539 reverse_frame_valid |= 1 << i;
540 dest_regs[i] = operands[0];
542 case TILEGX_OPC_MOVE:
543 new_reverse_frame[i] = reverse_frame[operands[1]];
544 reverse_frame_valid |= 1 << i;
545 dest_regs[i] = operands[0];
547 case TILEGX_OPC_MOVEI:
548 case TILEGX_OPC_MOVELI:
549 new_reverse_frame[i].state = REVERSE_STATE_VALUE;
550 new_reverse_frame[i].value = operands[1];
551 reverse_frame_valid |= 1 << i;
552 dest_regs[i] = operands[0];
555 if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE)
557 /* We have a value in A -- we can do this. */
558 new_reverse_frame[i] = reverse_frame[operands[1]];
559 new_reverse_frame[i].value
560 = reverse_frame[operands[1]].value | operands[2];
562 else if (operands[2] == 0)
564 /* This is a move. */
565 new_reverse_frame[i] = reverse_frame[operands[1]];
569 /* We don't know anything about the values. Punt. */
570 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
572 reverse_frame_valid |= 1 << i;
573 dest_regs[i] = operands[0];
576 if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE
577 && reverse_frame[operands[1]].value == 0)
579 /* This is a move. */
580 new_reverse_frame[i] = reverse_frame[operands[2]];
582 else if (reverse_frame[operands[2]].state == REVERSE_STATE_VALUE
583 && reverse_frame[operands[2]].value == 0)
585 /* This is a move. */
586 new_reverse_frame[i] = reverse_frame[operands[1]];
590 /* We don't know anything about the values. Punt. */
591 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
593 reverse_frame_valid |= 1 << i;
594 dest_regs[i] = operands[0];
597 if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE
598 && reverse_frame[operands[2]].state == REVERSE_STATE_VALUE)
600 /* We have values -- we can do this. */
601 new_reverse_frame[i] = reverse_frame[operands[1]];
602 new_reverse_frame[i].value
603 -= reverse_frame[operands[2]].value;
607 /* We don't know anything about the values. Punt. */
608 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
610 reverse_frame_valid |= 1 << i;
611 dest_regs[i] = operands[0];
614 case TILEGX_OPC_FNOP:
615 case TILEGX_OPC_INFO:
616 case TILEGX_OPC_INFOL:
617 /* Nothing to see here, move on.
618 Note that real NOP is treated as a 'real' instruction
619 because someone must have intended that it be there.
620 It therefore terminates the prolog. */
626 case TILEGX_OPC_BEQZ:
627 case TILEGX_OPC_BEQZT:
628 case TILEGX_OPC_BGEZ:
629 case TILEGX_OPC_BGEZT:
630 case TILEGX_OPC_BGTZ:
631 case TILEGX_OPC_BGTZT:
632 case TILEGX_OPC_BLBC:
633 case TILEGX_OPC_BLBCT:
634 case TILEGX_OPC_BLBS:
635 case TILEGX_OPC_BLBST:
636 case TILEGX_OPC_BLEZ:
637 case TILEGX_OPC_BLEZT:
638 case TILEGX_OPC_BLTZ:
639 case TILEGX_OPC_BLTZT:
640 case TILEGX_OPC_BNEZ:
641 case TILEGX_OPC_BNEZT:
643 case TILEGX_OPC_IRET:
644 case TILEGX_OPC_JALR:
645 case TILEGX_OPC_JALRP:
648 case TILEGX_OPC_SWINT0:
649 case TILEGX_OPC_SWINT1:
650 case TILEGX_OPC_SWINT2:
651 case TILEGX_OPC_SWINT3:
652 /* We're really done -- this is a branch. */
657 /* We don't know or care what this instruction is.
658 All we know is that it isn't part of a prolog, and if
659 there's a destination register, we're trashing it. */
661 for (j = 0; j < opcode->num_operands; j++)
663 if (this_insn->operands[j]->is_dest_reg)
665 dest_regs[i] = operands[j];
666 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
667 reverse_frame_valid |= 1 << i;
675 /* Now update the reverse frames. */
676 for (i = 0; i < num_insns; i++)
678 /* ISSUE: Does this properly handle "network" registers? */
679 if ((reverse_frame_valid & (1 << i))
680 && dest_regs[i] != TILEGX_ZERO_REGNUM)
681 reverse_frame[dest_regs[i]] = new_reverse_frame[i];
684 if (prev_sp_value != 0)
686 /* GCC uses R52 as a frame pointer. Have we seen "move r52, sp"? */
687 if (reverse_frame[TILEGX_R52_REGNUM].state == REVERSE_STATE_REGISTER
688 && reverse_frame[TILEGX_R52_REGNUM].value == TILEGX_SP_REGNUM)
690 reverse_frame[TILEGX_R52_REGNUM].state = REVERSE_STATE_VALUE;
691 reverse_frame[TILEGX_R52_REGNUM].value = prev_sp_value;
697 if (prolog_done && prolog_end == end_addr)
699 /* We found non-prolog code. As such, _this_ instruction
700 is the one after the prolog. We keep processing, because
701 there may be more prolog code in there, but this is what
703 /* ISSUE: There may not have actually been a prologue, and
704 we may have simply skipped some random instructions. */
705 prolog_end = next_addr;
709 /* We saw a branch. The prolog absolutely must be over. */
714 if (prolog_end == end_addr && cache)
716 /* We may have terminated the prolog early, and we're certainly
717 at THIS point right now. It's possible that the values of
718 registers we need are currently actually in other registers
719 (and haven't been written to memory yet). Go find them. */
720 for (i = 0; i < TILEGX_NUM_PHYS_REGS; i++)
722 if (reverse_frame[i].state == REVERSE_STATE_REGISTER
723 && reverse_frame[i].value != i)
725 unsigned saved_register = (unsigned) reverse_frame[i].value;
727 cache->saved_regs[saved_register].realreg = i;
728 cache->saved_regs[saved_register].addr = (LONGEST) -1;
733 if (lr_saved_on_stack_p)
735 cache->saved_regs[TILEGX_LR_REGNUM].realreg = TILEGX_LR_REGNUM;
736 cache->saved_regs[TILEGX_LR_REGNUM].addr =
737 cache->saved_regs[TILEGX_SP_REGNUM].addr;
743 /* This is the implementation of gdbarch method skip_prologue. */
746 tilegx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
748 CORE_ADDR func_start, end_pc;
749 struct obj_section *s;
751 /* This is the preferred method, find the end of the prologue by
752 using the debugging information. */
753 if (find_pc_partial_function (start_pc, NULL, &func_start, NULL))
755 CORE_ADDR post_prologue_pc
756 = skip_prologue_using_sal (gdbarch, func_start);
758 if (post_prologue_pc != 0)
759 return max (start_pc, post_prologue_pc);
762 /* Don't straddle a section boundary. */
763 s = find_pc_section (start_pc);
764 end_pc = start_pc + 8 * TILEGX_BUNDLE_SIZE_IN_BYTES;
766 end_pc = min (end_pc, obj_section_endaddr (s));
768 /* Otherwise, try to skip prologue the hard way. */
769 return tilegx_analyze_prologue (gdbarch,
775 /* This is the implementation of gdbarch method in_function_epilogue_p. */
778 tilegx_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
780 CORE_ADDR func_addr = 0, func_end = 0;
782 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
784 ULONGEST inst, inst2;
785 CORE_ADDR addr = func_end - TILEGX_BUNDLE_SIZE_IN_BYTES;
787 /* FIXME: Find the actual epilogue. */
788 /* HACK: Just assume the final bundle is the "ret" instruction". */
795 /* This is the implementation of gdbarch method get_longjmp_target. */
798 tilegx_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
800 struct gdbarch *gdbarch = get_frame_arch (frame);
801 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
805 jb_addr = get_frame_register_unsigned (frame, TILEGX_R0_REGNUM);
807 /* TileGX jmp_buf contains 32 elements of type __uint_reg_t which
808 has a size of 8 bytes. The return address is stored in the 25th
810 if (target_read_memory (jb_addr + 25 * 8, buf, 8))
813 *pc = extract_unsigned_integer (buf, 8, byte_order);
818 /* by assigning the 'faultnum' reg in kernel pt_regs with this value,
819 kernel do_signal will not check r0. see tilegx kernel/signal.c
821 #define INT_SWINT_1_SIGRETURN (~0)
823 /* Implement the "write_pc" gdbarch method. */
826 tilegx_write_pc (struct regcache *regcache, CORE_ADDR pc)
828 regcache_cooked_write_unsigned (regcache, TILEGX_PC_REGNUM, pc);
830 /* We must be careful with modifying the program counter. If we
831 just interrupted a system call, the kernel might try to restart
832 it when we resume the inferior. On restarting the system call,
833 the kernel will try backing up the program counter even though it
834 no longer points at the system call. This typically results in a
835 SIGSEGV or SIGILL. We can prevent this by writing INT_SWINT_1_SIGRETURN
836 in the "faultnum" pseudo-register.
838 Note that "faultnum" is saved when setting up a dummy call frame.
839 This means that it is properly restored when that frame is
840 popped, and that the interrupted system call will be restarted
841 when we resume the inferior on return from a function call from
842 within GDB. In all other cases the system call will not be
844 regcache_cooked_write_unsigned (regcache, TILEGX_FAULTNUM_REGNUM,
845 INT_SWINT_1_SIGRETURN);
848 /* This is the implementation of gdbarch method breakpoint_from_pc. */
850 static const unsigned char *
851 tilegx_breakpoint_from_pc (struct gdbarch *gdbarch,
852 CORE_ADDR *pcptr, int *lenptr)
854 /* 64-bit pattern for a { bpt ; nop } bundle. */
855 static const unsigned char breakpoint[] =
856 { 0x00, 0x50, 0x48, 0x51, 0xae, 0x44, 0x6a, 0x28 };
858 *lenptr = sizeof (breakpoint);
864 static struct tilegx_frame_cache *
865 tilegx_frame_cache (struct frame_info *this_frame, void **this_cache)
867 struct gdbarch *gdbarch = get_frame_arch (this_frame);
868 struct tilegx_frame_cache *cache;
869 CORE_ADDR current_pc;
875 cache = FRAME_OBSTACK_ZALLOC (struct tilegx_frame_cache);
877 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
879 cache->start_pc = get_frame_func (this_frame);
880 current_pc = get_frame_pc (this_frame);
882 cache->base = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM);
883 trad_frame_set_value (cache->saved_regs, TILEGX_SP_REGNUM, cache->base);
886 tilegx_analyze_prologue (gdbarch, cache->start_pc, current_pc,
889 cache->saved_regs[TILEGX_PC_REGNUM] = cache->saved_regs[TILEGX_LR_REGNUM];
894 /* Retrieve the value of REGNUM in FRAME. */
897 tilegx_frame_prev_register (struct frame_info *this_frame,
901 struct tilegx_frame_cache *info =
902 tilegx_frame_cache (this_frame, this_cache);
904 return trad_frame_get_prev_register (this_frame, info->saved_regs,
908 /* Build frame id. */
911 tilegx_frame_this_id (struct frame_info *this_frame, void **this_cache,
912 struct frame_id *this_id)
914 struct tilegx_frame_cache *info =
915 tilegx_frame_cache (this_frame, this_cache);
917 /* This marks the outermost frame. */
921 (*this_id) = frame_id_build (info->base, info->start_pc);
925 tilegx_frame_base_address (struct frame_info *this_frame, void **this_cache)
927 struct tilegx_frame_cache *cache =
928 tilegx_frame_cache (this_frame, this_cache);
933 static const struct frame_unwind tilegx_frame_unwind = {
935 default_frame_unwind_stop_reason,
936 tilegx_frame_this_id,
937 tilegx_frame_prev_register,
938 NULL, /* const struct frame_data *unwind_data */
939 default_frame_sniffer, /* frame_sniffer_ftype *sniffer */
940 NULL /* frame_prev_pc_ftype *prev_pc */
943 static const struct frame_base tilegx_frame_base = {
944 &tilegx_frame_unwind,
945 tilegx_frame_base_address,
946 tilegx_frame_base_address,
947 tilegx_frame_base_address
951 tilegx_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
953 return frame_unwind_register_unsigned (next_frame, TILEGX_SP_REGNUM);
957 tilegx_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
959 return frame_unwind_register_unsigned (next_frame, TILEGX_PC_REGNUM);
962 static struct frame_id
963 tilegx_unwind_dummy_id (struct gdbarch *gdbarch,
964 struct frame_info *this_frame)
968 sp = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM);
969 return frame_id_build (sp, get_frame_pc (this_frame));
973 /* We cannot read/write the "special" registers. */
976 tilegx_cannot_reference_register (struct gdbarch *gdbarch, int regno)
978 if (regno >= 0 && regno < TILEGX_NUM_EASY_REGS)
980 else if (regno == TILEGX_PC_REGNUM
981 || regno == TILEGX_FAULTNUM_REGNUM)
987 static struct gdbarch *
988 tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
990 struct gdbarch *gdbarch;
993 /* Handle arch_size == 32 or 64. Default to 64. */
995 arch_size = bfd_get_arch_size (info.abfd);
997 /* Try to find a pre-existing architecture. */
998 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1000 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1002 /* We only have two flavors -- just make sure arch_size matches. */
1003 if (gdbarch_ptr_bit (arches->gdbarch) == arch_size)
1004 return (arches->gdbarch);
1007 gdbarch = gdbarch_alloc (&info, NULL);
1009 /* Basic register fields and methods, datatype sizes and stuff. */
1011 /* There are 64 physical registers which can be referenced by
1012 instructions (although only 56 of them can actually be
1013 debugged) and 1 magic register (the PC). The other three
1014 magic registers (ex1, syscall, orig_r0) which are known to
1015 "ptrace" are ignored by "gdb". Note that we simply pretend
1016 that there are 65 registers, and no "pseudo registers". */
1017 set_gdbarch_num_regs (gdbarch, TILEGX_NUM_REGS);
1018 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1020 set_gdbarch_sp_regnum (gdbarch, TILEGX_SP_REGNUM);
1021 set_gdbarch_pc_regnum (gdbarch, TILEGX_PC_REGNUM);
1023 set_gdbarch_register_name (gdbarch, tilegx_register_name);
1024 set_gdbarch_register_type (gdbarch, tilegx_register_type);
1026 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1027 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1028 set_gdbarch_long_bit (gdbarch, arch_size);
1029 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1031 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1032 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1033 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1035 set_gdbarch_ptr_bit (gdbarch, arch_size);
1036 set_gdbarch_addr_bit (gdbarch, arch_size);
1038 set_gdbarch_cannot_fetch_register (gdbarch,
1039 tilegx_cannot_reference_register);
1040 set_gdbarch_cannot_store_register (gdbarch,
1041 tilegx_cannot_reference_register);
1043 /* Stack grows down. */
1044 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1047 set_gdbarch_unwind_sp (gdbarch, tilegx_unwind_sp);
1048 set_gdbarch_unwind_pc (gdbarch, tilegx_unwind_pc);
1049 set_gdbarch_dummy_id (gdbarch, tilegx_unwind_dummy_id);
1050 set_gdbarch_frame_align (gdbarch, tilegx_frame_align);
1051 frame_base_set_default (gdbarch, &tilegx_frame_base);
1053 set_gdbarch_skip_prologue (gdbarch, tilegx_skip_prologue);
1055 set_gdbarch_in_function_epilogue_p (gdbarch,
1056 tilegx_in_function_epilogue_p);
1058 /* Map debug registers into internal register numbers. */
1059 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, tilegx_dwarf2_reg_to_regnum);
1061 /* These values and methods are used when gdb calls a target function. */
1062 set_gdbarch_push_dummy_call (gdbarch, tilegx_push_dummy_call);
1063 set_gdbarch_get_longjmp_target (gdbarch, tilegx_get_longjmp_target);
1064 set_gdbarch_write_pc (gdbarch, tilegx_write_pc);
1065 set_gdbarch_breakpoint_from_pc (gdbarch, tilegx_breakpoint_from_pc);
1066 set_gdbarch_return_value (gdbarch, tilegx_return_value);
1068 set_gdbarch_print_insn (gdbarch, print_insn_tilegx);
1070 gdbarch_init_osabi (info, gdbarch);
1072 dwarf2_append_unwinders (gdbarch);
1073 frame_unwind_append_unwinder (gdbarch, &tilegx_frame_unwind);
1078 /* Provide a prototype to silence -Wmissing-prototypes. */
1079 extern initialize_file_ftype _initialize_tilegx_tdep;
1082 _initialize_tilegx_tdep (void)
1084 register_gdbarch_init (bfd_arch_tilegx, tilegx_gdbarch_init);