1 /* Target-dependent code for the Tilera TILE-Gx processor.
3 Copyright (C) 2012-2013 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "frame-base.h"
23 #include "frame-unwind.h"
24 #include "dwarf2-frame.h"
25 #include "trad-frame.h"
33 #include "gdb_string.h"
34 #include "gdb_assert.h"
35 #include "arch-utils.h"
36 #include "floatformat.h"
41 #include "linux-tdep.h"
43 #include "solib-svr4.h"
45 #include "tilegx-tdep.h"
46 #include "opcode/tilegx.h"
48 struct tilegx_frame_cache
55 /* Table of saved registers. */
56 struct trad_frame_saved_reg *saved_regs;
59 /* Register state values used by analyze_prologue. */
62 REVERSE_STATE_REGISTER,
67 /* Register state used by analyze_prologue(). */
68 struct tilegx_reverse_regs
71 enum reverse_state state;
74 static const struct tilegx_reverse_regs
75 template_reverse_regs[TILEGX_NUM_PHYS_REGS] =
77 { TILEGX_R0_REGNUM, REVERSE_STATE_REGISTER },
78 { TILEGX_R1_REGNUM, REVERSE_STATE_REGISTER },
79 { TILEGX_R2_REGNUM, REVERSE_STATE_REGISTER },
80 { TILEGX_R3_REGNUM, REVERSE_STATE_REGISTER },
81 { TILEGX_R4_REGNUM, REVERSE_STATE_REGISTER },
82 { TILEGX_R5_REGNUM, REVERSE_STATE_REGISTER },
83 { TILEGX_R6_REGNUM, REVERSE_STATE_REGISTER },
84 { TILEGX_R7_REGNUM, REVERSE_STATE_REGISTER },
85 { TILEGX_R8_REGNUM, REVERSE_STATE_REGISTER },
86 { TILEGX_R9_REGNUM, REVERSE_STATE_REGISTER },
87 { TILEGX_R10_REGNUM, REVERSE_STATE_REGISTER },
88 { TILEGX_R11_REGNUM, REVERSE_STATE_REGISTER },
89 { TILEGX_R12_REGNUM, REVERSE_STATE_REGISTER },
90 { TILEGX_R13_REGNUM, REVERSE_STATE_REGISTER },
91 { TILEGX_R14_REGNUM, REVERSE_STATE_REGISTER },
92 { TILEGX_R15_REGNUM, REVERSE_STATE_REGISTER },
93 { TILEGX_R16_REGNUM, REVERSE_STATE_REGISTER },
94 { TILEGX_R17_REGNUM, REVERSE_STATE_REGISTER },
95 { TILEGX_R18_REGNUM, REVERSE_STATE_REGISTER },
96 { TILEGX_R19_REGNUM, REVERSE_STATE_REGISTER },
97 { TILEGX_R20_REGNUM, REVERSE_STATE_REGISTER },
98 { TILEGX_R21_REGNUM, REVERSE_STATE_REGISTER },
99 { TILEGX_R22_REGNUM, REVERSE_STATE_REGISTER },
100 { TILEGX_R23_REGNUM, REVERSE_STATE_REGISTER },
101 { TILEGX_R24_REGNUM, REVERSE_STATE_REGISTER },
102 { TILEGX_R25_REGNUM, REVERSE_STATE_REGISTER },
103 { TILEGX_R26_REGNUM, REVERSE_STATE_REGISTER },
104 { TILEGX_R27_REGNUM, REVERSE_STATE_REGISTER },
105 { TILEGX_R28_REGNUM, REVERSE_STATE_REGISTER },
106 { TILEGX_R29_REGNUM, REVERSE_STATE_REGISTER },
107 { TILEGX_R30_REGNUM, REVERSE_STATE_REGISTER },
108 { TILEGX_R31_REGNUM, REVERSE_STATE_REGISTER },
109 { TILEGX_R32_REGNUM, REVERSE_STATE_REGISTER },
110 { TILEGX_R33_REGNUM, REVERSE_STATE_REGISTER },
111 { TILEGX_R34_REGNUM, REVERSE_STATE_REGISTER },
112 { TILEGX_R35_REGNUM, REVERSE_STATE_REGISTER },
113 { TILEGX_R36_REGNUM, REVERSE_STATE_REGISTER },
114 { TILEGX_R37_REGNUM, REVERSE_STATE_REGISTER },
115 { TILEGX_R38_REGNUM, REVERSE_STATE_REGISTER },
116 { TILEGX_R39_REGNUM, REVERSE_STATE_REGISTER },
117 { TILEGX_R40_REGNUM, REVERSE_STATE_REGISTER },
118 { TILEGX_R41_REGNUM, REVERSE_STATE_REGISTER },
119 { TILEGX_R42_REGNUM, REVERSE_STATE_REGISTER },
120 { TILEGX_R43_REGNUM, REVERSE_STATE_REGISTER },
121 { TILEGX_R44_REGNUM, REVERSE_STATE_REGISTER },
122 { TILEGX_R45_REGNUM, REVERSE_STATE_REGISTER },
123 { TILEGX_R46_REGNUM, REVERSE_STATE_REGISTER },
124 { TILEGX_R47_REGNUM, REVERSE_STATE_REGISTER },
125 { TILEGX_R48_REGNUM, REVERSE_STATE_REGISTER },
126 { TILEGX_R49_REGNUM, REVERSE_STATE_REGISTER },
127 { TILEGX_R50_REGNUM, REVERSE_STATE_REGISTER },
128 { TILEGX_R51_REGNUM, REVERSE_STATE_REGISTER },
129 { TILEGX_R52_REGNUM, REVERSE_STATE_REGISTER },
130 { TILEGX_TP_REGNUM, REVERSE_STATE_REGISTER },
131 { TILEGX_SP_REGNUM, REVERSE_STATE_REGISTER },
132 { TILEGX_LR_REGNUM, REVERSE_STATE_REGISTER },
133 { 0, REVERSE_STATE_UNKNOWN },
134 { 0, REVERSE_STATE_UNKNOWN },
135 { 0, REVERSE_STATE_UNKNOWN },
136 { 0, REVERSE_STATE_UNKNOWN },
137 { 0, REVERSE_STATE_UNKNOWN },
138 { 0, REVERSE_STATE_UNKNOWN },
139 { 0, REVERSE_STATE_UNKNOWN },
140 { TILEGX_ZERO_REGNUM, REVERSE_STATE_VALUE }
143 /* Implement the "register_name" gdbarch method. */
146 tilegx_register_name (struct gdbarch *gdbarch, int regnum)
148 static const char *const register_names[TILEGX_NUM_REGS] =
150 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
151 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
152 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
153 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
154 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
155 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
156 "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr",
157 "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero",
161 if (regnum < 0 || regnum >= TILEGX_NUM_REGS)
162 internal_error (__FILE__, __LINE__,
163 "tilegx_register_name: invalid register number %d",
166 return register_names[regnum];
169 /* This is the implementation of gdbarch method register_type. */
172 tilegx_register_type (struct gdbarch *gdbarch, int regnum)
174 if (regnum == TILEGX_PC_REGNUM)
175 return builtin_type (gdbarch)->builtin_func_ptr;
177 return builtin_type (gdbarch)->builtin_uint64;
180 /* This is the implementation of gdbarch method dwarf2_reg_to_regnum. */
183 tilegx_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int num)
188 /* Makes the decision of whether a given type is a scalar type.
189 Scalar types are returned in the registers r2-r11 as they fit. */
192 tilegx_type_is_scalar (struct type *t)
194 return (TYPE_CODE(t) != TYPE_CODE_STRUCT
195 && TYPE_CODE(t) != TYPE_CODE_UNION
196 && TYPE_CODE(t) != TYPE_CODE_ARRAY);
199 /* Returns non-zero if the given struct type will be returned using
200 a special convention, rather than the normal function return method.
201 Used in the context of the "return" command, and target function
202 calls from the debugger. */
205 tilegx_use_struct_convention (struct type *type)
207 /* Only scalars which fit in R0 - R9 can be returned in registers.
208 Otherwise, they are returned via a pointer passed in R0. */
209 return (!tilegx_type_is_scalar (type)
210 && (TYPE_LENGTH (type) > (1 + TILEGX_R9_REGNUM - TILEGX_R0_REGNUM)
214 /* Find a function's return value in the appropriate registers (in
215 REGCACHE), and copy it into VALBUF. */
218 tilegx_extract_return_value (struct type *type, struct regcache *regcache,
221 int len = TYPE_LENGTH (type);
222 int i, regnum = TILEGX_R0_REGNUM;
224 for (i = 0; i < len; i += tilegx_reg_size)
225 regcache_raw_read (regcache, regnum++, valbuf + i);
228 /* Copy the function return value from VALBUF into the proper
229 location for a function return.
230 Called only in the context of the "return" command. */
233 tilegx_store_return_value (struct type *type, struct regcache *regcache,
236 if (TYPE_LENGTH (type) < tilegx_reg_size)
238 /* Add leading zeros to the (little-endian) value. */
239 gdb_byte buf[tilegx_reg_size] = { 0 };
241 memcpy (buf, valbuf, TYPE_LENGTH (type));
242 regcache_raw_write (regcache, TILEGX_R0_REGNUM, buf);
246 int len = TYPE_LENGTH (type);
247 int i, regnum = TILEGX_R0_REGNUM;
249 for (i = 0; i < len; i += tilegx_reg_size)
250 regcache_raw_write (regcache, regnum++, (gdb_byte *) valbuf + i);
254 /* This is the implementation of gdbarch method return_value. */
256 static enum return_value_convention
257 tilegx_return_value (struct gdbarch *gdbarch, struct value *function,
258 struct type *type, struct regcache *regcache,
259 gdb_byte *readbuf, const gdb_byte *writebuf)
261 if (tilegx_use_struct_convention (type))
262 return RETURN_VALUE_STRUCT_CONVENTION;
264 tilegx_store_return_value (type, regcache, writebuf);
266 tilegx_extract_return_value (type, regcache, readbuf);
267 return RETURN_VALUE_REGISTER_CONVENTION;
270 /* This is the implementation of gdbarch method frame_align. */
273 tilegx_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
279 /* Implement the "push_dummy_call" gdbarch method. */
282 tilegx_push_dummy_call (struct gdbarch *gdbarch,
283 struct value *function,
284 struct regcache *regcache,
285 CORE_ADDR bp_addr, int nargs,
287 CORE_ADDR sp, int struct_return,
288 CORE_ADDR struct_addr)
290 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
291 CORE_ADDR stack_dest = sp;
292 int argreg = TILEGX_R0_REGNUM;
294 int typelen, slacklen, alignlen;
295 static const gdb_byte four_zero_words[16] = { 0 };
297 /* If struct_return is 1, then the struct return address will
298 consume one argument-passing register. */
300 regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
302 /* Arguments are passed in R0 - R9, and as soon as an argument
303 will not fit completely in the remaining registers, then it,
304 and all remaining arguments, are put on the stack. */
305 for (i = 0; i < nargs && argreg <= TILEGX_R9_REGNUM; i++)
308 typelen = TYPE_LENGTH (value_enclosing_type (args[i]));
310 if (typelen > (TILEGX_R9_REGNUM - argreg + 1) * tilegx_reg_size)
313 /* Put argument into registers wordwise. */
314 val = value_contents (args[i]);
315 for (j = 0; j < typelen; j += tilegx_reg_size)
317 /* ISSUE: Why special handling for "typelen = 4x + 1"?
318 I don't ever see "typelen" values except 4 and 8. */
319 int n = (typelen - j == 1) ? 1 : tilegx_reg_size;
320 ULONGEST w = extract_unsigned_integer (val + j, n, byte_order);
322 regcache_cooked_write_unsigned (regcache, argreg++, w);
327 stack_dest = tilegx_frame_align (gdbarch, stack_dest);
329 /* Loop backwards through remaining arguments and push them on
330 the stack, word aligned. */
331 for (j = nargs - 1; j >= i; j--)
334 struct cleanup *back_to;
335 const gdb_byte *contents = value_contents (args[j]);
337 typelen = TYPE_LENGTH (value_enclosing_type (args[j]));
338 slacklen = align_up (typelen, 8) - typelen;
339 val = xmalloc (typelen + slacklen);
340 back_to = make_cleanup (xfree, val);
341 memcpy (val, contents, typelen);
342 memset (val + typelen, 0, slacklen);
344 /* Now write data to the stack. The stack grows downwards. */
345 stack_dest -= typelen + slacklen;
346 write_memory (stack_dest, val, typelen + slacklen);
347 do_cleanups (back_to);
350 /* Add 16 bytes for linkage space to the stack. */
351 stack_dest = stack_dest - 16;
352 write_memory (stack_dest, four_zero_words, 16);
354 /* Update stack pointer. */
355 regcache_cooked_write_unsigned (regcache, TILEGX_SP_REGNUM, stack_dest);
357 /* Set the return address register to point to the entry point of
358 the program, where a breakpoint lies in wait. */
359 regcache_cooked_write_unsigned (regcache, TILEGX_LR_REGNUM, bp_addr);
365 /* Decode the instructions within the given address range.
366 Decide when we must have reached the end of the function prologue.
367 If a frame_info pointer is provided, fill in its saved_regs etc.
368 Returns the address of the first instruction after the prologue.
369 NOTE: This is often called with start_addr being the start of some
370 function, and end_addr being the current PC. */
373 tilegx_analyze_prologue (struct gdbarch* gdbarch,
374 CORE_ADDR start_addr, CORE_ADDR end_addr,
375 struct tilegx_frame_cache *cache,
376 struct frame_info *next_frame)
378 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
380 CORE_ADDR prolog_end = end_addr;
381 ULONGEST inst, inst2;
384 gdb_byte instbuf[32 * TILEGX_BUNDLE_SIZE_IN_BYTES];
385 CORE_ADDR instbuf_start;
386 unsigned int instbuf_size;
389 struct tilegx_decoded_instruction
390 decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
392 struct tilegx_reverse_regs reverse_frame[TILEGX_NUM_PHYS_REGS];
393 struct tilegx_reverse_regs
394 new_reverse_frame[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
395 int dest_regs[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
396 int reverse_frame_valid, prolog_done, branch_seen, lr_saved_on_stack_p;
397 LONGEST prev_sp_value;
400 if (start_addr >= end_addr
401 || (start_addr % TILEGX_BUNDLE_ALIGNMENT_IN_BYTES) != 0)
404 /* Initialize the reverse frame. This maps the CURRENT frame's
405 registers to the outer frame's registers (the frame on the
406 stack goes the other way). */
407 memcpy (&reverse_frame, &template_reverse_regs, sizeof (reverse_frame));
412 lr_saved_on_stack_p = 0;
414 /* To cut down on round-trip overhead, we fetch multiple bundles
415 at once. These variables describe the range of memory we have
420 for (next_addr = start_addr;
421 next_addr < end_addr;
422 next_addr += TILEGX_BUNDLE_SIZE_IN_BYTES)
424 /* Retrieve the next instruction. */
425 if (next_addr - instbuf_start >= instbuf_size)
427 /* Figure out how many bytes to fetch. Don't span a page
428 boundary since that might cause an unnecessary memory
430 unsigned int size_on_same_page = 4096 - (next_addr & 4095);
432 instbuf_size = sizeof instbuf;
434 if (instbuf_size > size_on_same_page)
435 instbuf_size = size_on_same_page;
436 instbuf_start = next_addr;
438 status = safe_frame_unwind_memory (next_frame, instbuf_start,
439 instbuf, instbuf_size);
441 memory_error (status, next_addr);
444 reverse_frame_valid = 0;
446 bundle = extract_unsigned_integer (&instbuf[next_addr - instbuf_start],
449 num_insns = parse_insn_tilegx (bundle, next_addr, decoded);
451 for (i = 0; i < num_insns; i++)
453 struct tilegx_decoded_instruction *this_insn = &decoded[i];
454 int64_t *operands = (int64_t *) this_insn->operand_values;
455 const struct tilegx_opcode *opcode = this_insn->opcode;
457 switch (opcode->mnemonic)
461 && reverse_frame[operands[0]].state == REVERSE_STATE_VALUE
462 && reverse_frame[operands[1]].state
463 == REVERSE_STATE_REGISTER)
465 LONGEST saved_address = reverse_frame[operands[0]].value;
466 unsigned saved_register
467 = (unsigned) reverse_frame[operands[1]].value;
469 /* realreg >= 0 and addr != -1 indicates that the
470 value of saved_register is in memory location
471 saved_address. The value of realreg is not
472 meaningful in this case but it must be >= 0.
474 cache->saved_regs[saved_register].realreg = saved_register;
475 cache->saved_regs[saved_register].addr = saved_address;
478 && (operands[0] == TILEGX_SP_REGNUM)
479 && (operands[1] == TILEGX_LR_REGNUM))
480 lr_saved_on_stack_p = 1;
482 case TILEGX_OPC_ADDI:
483 case TILEGX_OPC_ADDLI:
485 && operands[0] == TILEGX_SP_REGNUM
486 && operands[1] == TILEGX_SP_REGNUM
487 && reverse_frame[operands[1]].state == REVERSE_STATE_REGISTER)
489 /* Special case. We're fixing up the stack frame. */
490 uint64_t hopefully_sp
491 = (unsigned) reverse_frame[operands[1]].value;
492 short op2_as_short = (short) operands[2];
493 signed char op2_as_char = (signed char) operands[2];
495 /* Fix up the sign-extension. */
496 if (opcode->mnemonic == TILEGX_OPC_ADDI)
497 op2_as_short = op2_as_char;
498 prev_sp_value = (cache->saved_regs[hopefully_sp].addr
501 new_reverse_frame[i].state = REVERSE_STATE_VALUE;
502 new_reverse_frame[i].value
503 = cache->saved_regs[hopefully_sp].addr;
504 trad_frame_set_value (cache->saved_regs,
505 hopefully_sp, prev_sp_value);
509 short op2_as_short = (short) operands[2];
510 signed char op2_as_char = (signed char) operands[2];
512 /* Fix up the sign-extension. */
513 if (opcode->mnemonic == TILEGX_OPC_ADDI)
514 op2_as_short = op2_as_char;
516 new_reverse_frame[i] = reverse_frame[operands[1]];
517 if (new_reverse_frame[i].state == REVERSE_STATE_VALUE)
518 new_reverse_frame[i].value += op2_as_short;
520 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
522 reverse_frame_valid |= 1 << i;
523 dest_regs[i] = operands[0];
526 if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE
527 && reverse_frame[operands[2]].state == REVERSE_STATE_VALUE)
529 /* We have values -- we can do this. */
530 new_reverse_frame[i] = reverse_frame[operands[2]];
531 new_reverse_frame[i].value
532 += reverse_frame[operands[i]].value;
536 /* We don't know anything about the values. Punt. */
537 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
539 reverse_frame_valid |= 1 << i;
540 dest_regs[i] = operands[0];
542 case TILEGX_OPC_MOVE:
543 new_reverse_frame[i] = reverse_frame[operands[1]];
544 reverse_frame_valid |= 1 << i;
545 dest_regs[i] = operands[0];
547 case TILEGX_OPC_MOVEI:
548 case TILEGX_OPC_MOVELI:
549 new_reverse_frame[i].state = REVERSE_STATE_VALUE;
550 new_reverse_frame[i].value = operands[1];
551 reverse_frame_valid |= 1 << i;
552 dest_regs[i] = operands[0];
555 if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE)
557 /* We have a value in A -- we can do this. */
558 new_reverse_frame[i] = reverse_frame[operands[1]];
559 new_reverse_frame[i].value
560 = reverse_frame[operands[1]].value | operands[2];
562 else if (operands[2] == 0)
564 /* This is a move. */
565 new_reverse_frame[i] = reverse_frame[operands[1]];
569 /* We don't know anything about the values. Punt. */
570 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
572 reverse_frame_valid |= 1 << i;
573 dest_regs[i] = operands[0];
576 if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE
577 && reverse_frame[operands[1]].value == 0)
579 /* This is a move. */
580 new_reverse_frame[i] = reverse_frame[operands[2]];
582 else if (reverse_frame[operands[2]].state == REVERSE_STATE_VALUE
583 && reverse_frame[operands[2]].value == 0)
585 /* This is a move. */
586 new_reverse_frame[i] = reverse_frame[operands[1]];
590 /* We don't know anything about the values. Punt. */
591 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
593 reverse_frame_valid |= 1 << i;
594 dest_regs[i] = operands[0];
597 if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE
598 && reverse_frame[operands[2]].state == REVERSE_STATE_VALUE)
600 /* We have values -- we can do this. */
601 new_reverse_frame[i] = reverse_frame[operands[1]];
602 new_reverse_frame[i].value
603 -= reverse_frame[operands[2]].value;
607 /* We don't know anything about the values. Punt. */
608 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
610 reverse_frame_valid |= 1 << i;
611 dest_regs[i] = operands[0];
614 case TILEGX_OPC_FNOP:
615 case TILEGX_OPC_INFO:
616 case TILEGX_OPC_INFOL:
617 /* Nothing to see here, move on.
618 Note that real NOP is treated as a 'real' instruction
619 because someone must have intended that it be there.
620 It therefore terminates the prolog. */
626 case TILEGX_OPC_BEQZ:
627 case TILEGX_OPC_BEQZT:
628 case TILEGX_OPC_BGEZ:
629 case TILEGX_OPC_BGEZT:
630 case TILEGX_OPC_BGTZ:
631 case TILEGX_OPC_BGTZT:
632 case TILEGX_OPC_BLBC:
633 case TILEGX_OPC_BLBCT:
634 case TILEGX_OPC_BLBS:
635 case TILEGX_OPC_BLBST:
636 case TILEGX_OPC_BLEZ:
637 case TILEGX_OPC_BLEZT:
638 case TILEGX_OPC_BLTZ:
639 case TILEGX_OPC_BLTZT:
640 case TILEGX_OPC_BNEZ:
641 case TILEGX_OPC_BNEZT:
643 case TILEGX_OPC_IRET:
644 case TILEGX_OPC_JALR:
645 case TILEGX_OPC_JALRP:
648 case TILEGX_OPC_SWINT0:
649 case TILEGX_OPC_SWINT1:
650 case TILEGX_OPC_SWINT2:
651 case TILEGX_OPC_SWINT3:
652 /* We're really done -- this is a branch. */
657 /* We don't know or care what this instruction is.
658 All we know is that it isn't part of a prolog, and if
659 there's a destination register, we're trashing it. */
661 for (j = 0; j < opcode->num_operands; j++)
663 if (this_insn->operands[j]->is_dest_reg)
665 dest_regs[i] = operands[j];
666 new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
667 reverse_frame_valid |= 1 << i;
675 /* Now update the reverse frames. */
676 for (i = 0; i < num_insns; i++)
678 /* ISSUE: Does this properly handle "network" registers? */
679 if ((reverse_frame_valid & (1 << i))
680 && dest_regs[i] != TILEGX_ZERO_REGNUM)
681 reverse_frame[dest_regs[i]] = new_reverse_frame[i];
684 if (prev_sp_value != 0)
686 /* GCC uses R52 as a frame pointer. Have we seen "move r52, sp"? */
687 if (reverse_frame[TILEGX_R52_REGNUM].state == REVERSE_STATE_REGISTER
688 && reverse_frame[TILEGX_R52_REGNUM].value == TILEGX_SP_REGNUM)
690 reverse_frame[TILEGX_R52_REGNUM].state = REVERSE_STATE_VALUE;
691 reverse_frame[TILEGX_R52_REGNUM].value = prev_sp_value;
697 if (prolog_done && prolog_end == end_addr)
699 /* We found non-prolog code. As such, _this_ instruction
700 is the one after the prolog. We keep processing, because
701 there may be more prolog code in there, but this is what
703 /* ISSUE: There may not have actually been a prologue, and
704 we may have simply skipped some random instructions. */
705 prolog_end = next_addr;
709 /* We saw a branch. The prolog absolutely must be over. */
714 if (prolog_end == end_addr && cache)
716 /* We may have terminated the prolog early, and we're certainly
717 at THIS point right now. It's possible that the values of
718 registers we need are currently actually in other registers
719 (and haven't been written to memory yet). Go find them. */
720 for (i = 0; i < TILEGX_NUM_PHYS_REGS; i++)
722 if (reverse_frame[i].state == REVERSE_STATE_REGISTER
723 && reverse_frame[i].value != i)
725 unsigned saved_register = (unsigned) reverse_frame[i].value;
727 cache->saved_regs[saved_register].realreg = i;
728 cache->saved_regs[saved_register].addr = (LONGEST) -1;
733 if (lr_saved_on_stack_p)
735 cache->saved_regs[TILEGX_LR_REGNUM].realreg = TILEGX_LR_REGNUM;
736 cache->saved_regs[TILEGX_LR_REGNUM].addr =
737 cache->saved_regs[TILEGX_SP_REGNUM].addr;
743 /* This is the implementation of gdbarch method skip_prologue. */
746 tilegx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
748 CORE_ADDR func_start;
750 /* This is the preferred method, find the end of the prologue by
751 using the debugging information. */
752 if (find_pc_partial_function (start_pc, NULL, &func_start, NULL))
754 CORE_ADDR post_prologue_pc
755 = skip_prologue_using_sal (gdbarch, func_start);
757 if (post_prologue_pc != 0)
758 return max (start_pc, post_prologue_pc);
761 /* Otherwise, try to skip prologue the hard way. */
762 return tilegx_analyze_prologue (gdbarch,
764 start_pc + 8 * TILEGX_BUNDLE_SIZE_IN_BYTES,
768 /* This is the implementation of gdbarch method in_function_epilogue_p. */
771 tilegx_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
773 CORE_ADDR func_addr = 0, func_end = 0;
775 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
777 ULONGEST inst, inst2;
778 CORE_ADDR addr = func_end - TILEGX_BUNDLE_SIZE_IN_BYTES;
780 /* FIXME: Find the actual epilogue. */
781 /* HACK: Just assume the final bundle is the "ret" instruction". */
788 /* by assigning the 'faultnum' reg in kernel pt_regs with this value,
789 kernel do_signal will not check r0. see tilegx kernel/signal.c
791 #define INT_SWINT_1_SIGRETURN (~0)
793 /* Implement the "write_pc" gdbarch method. */
796 tilegx_write_pc (struct regcache *regcache, CORE_ADDR pc)
798 regcache_cooked_write_unsigned (regcache, TILEGX_PC_REGNUM, pc);
800 /* We must be careful with modifying the program counter. If we
801 just interrupted a system call, the kernel might try to restart
802 it when we resume the inferior. On restarting the system call,
803 the kernel will try backing up the program counter even though it
804 no longer points at the system call. This typically results in a
805 SIGSEGV or SIGILL. We can prevent this by writing INT_SWINT_1_SIGRETURN
806 in the "faultnum" pseudo-register.
808 Note that "faultnum" is saved when setting up a dummy call frame.
809 This means that it is properly restored when that frame is
810 popped, and that the interrupted system call will be restarted
811 when we resume the inferior on return from a function call from
812 within GDB. In all other cases the system call will not be
814 regcache_cooked_write_unsigned (regcache, TILEGX_FAULTNUM_REGNUM,
815 INT_SWINT_1_SIGRETURN);
818 /* This is the implementation of gdbarch method breakpoint_from_pc. */
820 static const unsigned char *
821 tilegx_breakpoint_from_pc (struct gdbarch *gdbarch,
822 CORE_ADDR *pcptr, int *lenptr)
824 /* 64-bit pattern for a { bpt ; nop } bundle. */
825 static const unsigned char breakpoint[] =
826 { 0x00, 0x50, 0x48, 0x51, 0xae, 0x44, 0x6a, 0x28 };
828 *lenptr = sizeof (breakpoint);
834 static struct tilegx_frame_cache *
835 tilegx_frame_cache (struct frame_info *this_frame, void **this_cache)
837 struct gdbarch *gdbarch = get_frame_arch (this_frame);
838 struct tilegx_frame_cache *cache;
839 CORE_ADDR current_pc;
845 cache = FRAME_OBSTACK_ZALLOC (struct tilegx_frame_cache);
847 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
849 cache->start_pc = get_frame_func (this_frame);
850 current_pc = get_frame_pc (this_frame);
852 cache->base = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM);
853 trad_frame_set_value (cache->saved_regs, TILEGX_SP_REGNUM, cache->base);
856 tilegx_analyze_prologue (gdbarch, cache->start_pc, current_pc,
859 cache->saved_regs[TILEGX_PC_REGNUM] = cache->saved_regs[TILEGX_LR_REGNUM];
864 /* Retrieve the value of REGNUM in FRAME. */
867 tilegx_frame_prev_register (struct frame_info *this_frame,
871 struct tilegx_frame_cache *info =
872 tilegx_frame_cache (this_frame, this_cache);
874 return trad_frame_get_prev_register (this_frame, info->saved_regs,
878 /* Build frame id. */
881 tilegx_frame_this_id (struct frame_info *this_frame, void **this_cache,
882 struct frame_id *this_id)
884 struct tilegx_frame_cache *info =
885 tilegx_frame_cache (this_frame, this_cache);
887 /* This marks the outermost frame. */
891 (*this_id) = frame_id_build (info->base, info->start_pc);
895 tilegx_frame_base_address (struct frame_info *this_frame, void **this_cache)
897 struct tilegx_frame_cache *cache =
898 tilegx_frame_cache (this_frame, this_cache);
903 static const struct frame_unwind tilegx_frame_unwind = {
905 default_frame_unwind_stop_reason,
906 tilegx_frame_this_id,
907 tilegx_frame_prev_register,
908 NULL, /* const struct frame_data *unwind_data */
909 default_frame_sniffer, /* frame_sniffer_ftype *sniffer */
910 NULL /* frame_prev_pc_ftype *prev_pc */
913 static const struct frame_base tilegx_frame_base = {
914 &tilegx_frame_unwind,
915 tilegx_frame_base_address,
916 tilegx_frame_base_address,
917 tilegx_frame_base_address
921 tilegx_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
923 return frame_unwind_register_unsigned (next_frame, TILEGX_SP_REGNUM);
927 tilegx_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
929 return frame_unwind_register_unsigned (next_frame, TILEGX_PC_REGNUM);
932 static struct frame_id
933 tilegx_unwind_dummy_id (struct gdbarch *gdbarch,
934 struct frame_info *this_frame)
938 sp = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM);
939 return frame_id_build (sp, get_frame_pc (this_frame));
943 /* We cannot read/write the "special" registers. */
946 tilegx_cannot_reference_register (struct gdbarch *gdbarch, int regno)
948 if (regno >= 0 && regno < TILEGX_NUM_EASY_REGS)
950 else if (regno == TILEGX_PC_REGNUM
951 || regno == TILEGX_FAULTNUM_REGNUM)
957 static struct gdbarch *
958 tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
960 struct gdbarch *gdbarch;
963 /* Handle arch_size == 32 or 64. Default to 64. */
965 arch_size = bfd_get_arch_size (info.abfd);
967 /* Try to find a pre-existing architecture. */
968 for (arches = gdbarch_list_lookup_by_info (arches, &info);
970 arches = gdbarch_list_lookup_by_info (arches->next, &info))
972 /* We only have two flavors -- just make sure arch_size matches. */
973 if (gdbarch_ptr_bit (arches->gdbarch) == arch_size)
974 return (arches->gdbarch);
977 gdbarch = gdbarch_alloc (&info, NULL);
979 /* Basic register fields and methods, datatype sizes and stuff. */
981 /* There are 64 physical registers which can be referenced by
982 instructions (although only 56 of them can actually be
983 debugged) and 1 magic register (the PC). The other three
984 magic registers (ex1, syscall, orig_r0) which are known to
985 "ptrace" are ignored by "gdb". Note that we simply pretend
986 that there are 65 registers, and no "pseudo registers". */
987 set_gdbarch_num_regs (gdbarch, TILEGX_NUM_REGS);
988 set_gdbarch_num_pseudo_regs (gdbarch, 0);
990 set_gdbarch_sp_regnum (gdbarch, TILEGX_SP_REGNUM);
991 set_gdbarch_pc_regnum (gdbarch, TILEGX_PC_REGNUM);
993 set_gdbarch_register_name (gdbarch, tilegx_register_name);
994 set_gdbarch_register_type (gdbarch, tilegx_register_type);
996 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
997 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
998 set_gdbarch_long_bit (gdbarch, arch_size);
999 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1001 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1002 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1003 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1005 set_gdbarch_ptr_bit (gdbarch, arch_size);
1006 set_gdbarch_addr_bit (gdbarch, arch_size);
1008 set_gdbarch_cannot_fetch_register (gdbarch,
1009 tilegx_cannot_reference_register);
1010 set_gdbarch_cannot_store_register (gdbarch,
1011 tilegx_cannot_reference_register);
1013 /* Stack grows down. */
1014 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1017 set_gdbarch_unwind_sp (gdbarch, tilegx_unwind_sp);
1018 set_gdbarch_unwind_pc (gdbarch, tilegx_unwind_pc);
1019 set_gdbarch_dummy_id (gdbarch, tilegx_unwind_dummy_id);
1020 set_gdbarch_frame_align (gdbarch, tilegx_frame_align);
1021 frame_base_set_default (gdbarch, &tilegx_frame_base);
1023 set_gdbarch_skip_prologue (gdbarch, tilegx_skip_prologue);
1025 set_gdbarch_in_function_epilogue_p (gdbarch,
1026 tilegx_in_function_epilogue_p);
1028 /* Map debug registers into internal register numbers. */
1029 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, tilegx_dwarf2_reg_to_regnum);
1031 /* These values and methods are used when gdb calls a target function. */
1032 set_gdbarch_push_dummy_call (gdbarch, tilegx_push_dummy_call);
1033 set_gdbarch_write_pc (gdbarch, tilegx_write_pc);
1034 set_gdbarch_breakpoint_from_pc (gdbarch, tilegx_breakpoint_from_pc);
1035 set_gdbarch_return_value (gdbarch, tilegx_return_value);
1037 set_gdbarch_print_insn (gdbarch, print_insn_tilegx);
1039 gdbarch_init_osabi (info, gdbarch);
1041 dwarf2_append_unwinders (gdbarch);
1042 frame_unwind_append_unwinder (gdbarch, &tilegx_frame_unwind);
1047 /* Provide a prototype to silence -Wmissing-prototypes. */
1048 extern initialize_file_ftype _initialize_tilegx_tdep;
1051 _initialize_tilegx_tdep (void)
1053 register_gdbarch_init (bfd_arch_tilegx, tilegx_gdbarch_init);