2 <xi:include href="core-regs.xml"/>
4 <vector id="v4int8" type="int8" count="4"/>
5 <vector id="v2int16" type="int16" count="2"/>
7 <field name="v4" type="v4int8"/>
8 <field name="v2" type="v2int16"/>
11 <reg name="extrareg" bitsize="32"/>
12 <reg name="uintreg" bitsize="32" type="uint32"/>
13 <reg name="vecreg" bitsize="32" type="v4int8"/>
14 <reg name="unionreg" bitsize="32" type="vecint"/>