1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006-2016 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
39 #include "reggroups.h"
40 #include "floatformat.h"
45 #include "dwarf2-frame.h"
50 /* The list of available "set spu " and "show spu " commands. */
51 static struct cmd_list_element *setspucmdlist = NULL;
52 static struct cmd_list_element *showspucmdlist = NULL;
54 /* Whether to stop for new SPE contexts. */
55 static int spu_stop_on_load_p = 0;
56 /* Whether to automatically flush the SW-managed cache. */
57 static int spu_auto_flush_cache_p = 1;
60 /* The tdep structure. */
63 /* The spufs ID identifying our address space. */
66 /* SPU-specific vector type. */
67 struct type *spu_builtin_type_vec128;
71 /* SPU-specific vector type. */
73 spu_builtin_type_vec128 (struct gdbarch *gdbarch)
75 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
77 if (!tdep->spu_builtin_type_vec128)
79 const struct builtin_type *bt = builtin_type (gdbarch);
82 t = arch_composite_type (gdbarch,
83 "__spu_builtin_type_vec128", TYPE_CODE_UNION);
84 append_composite_type_field (t, "uint128", bt->builtin_int128);
85 append_composite_type_field (t, "v2_int64",
86 init_vector_type (bt->builtin_int64, 2));
87 append_composite_type_field (t, "v4_int32",
88 init_vector_type (bt->builtin_int32, 4));
89 append_composite_type_field (t, "v8_int16",
90 init_vector_type (bt->builtin_int16, 8));
91 append_composite_type_field (t, "v16_int8",
92 init_vector_type (bt->builtin_int8, 16));
93 append_composite_type_field (t, "v2_double",
94 init_vector_type (bt->builtin_double, 2));
95 append_composite_type_field (t, "v4_float",
96 init_vector_type (bt->builtin_float, 4));
99 TYPE_NAME (t) = "spu_builtin_type_vec128";
101 tdep->spu_builtin_type_vec128 = t;
104 return tdep->spu_builtin_type_vec128;
108 /* The list of available "info spu " commands. */
109 static struct cmd_list_element *infospucmdlist = NULL;
114 spu_register_name (struct gdbarch *gdbarch, int reg_nr)
116 static char *register_names[] =
118 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
119 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
120 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
121 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
122 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
123 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
124 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
125 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
126 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
127 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
128 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
129 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
130 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
131 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
132 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
133 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
134 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
139 if (reg_nr >= sizeof register_names / sizeof *register_names)
142 return register_names[reg_nr];
146 spu_register_type (struct gdbarch *gdbarch, int reg_nr)
148 if (reg_nr < SPU_NUM_GPRS)
149 return spu_builtin_type_vec128 (gdbarch);
154 return builtin_type (gdbarch)->builtin_uint32;
157 return builtin_type (gdbarch)->builtin_func_ptr;
160 return builtin_type (gdbarch)->builtin_data_ptr;
162 case SPU_FPSCR_REGNUM:
163 return builtin_type (gdbarch)->builtin_uint128;
165 case SPU_SRR0_REGNUM:
166 return builtin_type (gdbarch)->builtin_uint32;
168 case SPU_LSLR_REGNUM:
169 return builtin_type (gdbarch)->builtin_uint32;
171 case SPU_DECR_REGNUM:
172 return builtin_type (gdbarch)->builtin_uint32;
174 case SPU_DECR_STATUS_REGNUM:
175 return builtin_type (gdbarch)->builtin_uint32;
178 internal_error (__FILE__, __LINE__, _("invalid regnum"));
182 /* Pseudo registers for preferred slots - stack pointer. */
184 static enum register_status
185 spu_pseudo_register_read_spu (struct regcache *regcache, const char *regname,
188 struct gdbarch *gdbarch = get_regcache_arch (regcache);
189 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
190 enum register_status status;
196 status = regcache_raw_read_unsigned (regcache, SPU_ID_REGNUM, &id);
197 if (status != REG_VALID)
199 xsnprintf (annex, sizeof annex, "%d/%s", (int) id, regname);
200 memset (reg, 0, sizeof reg);
201 target_read (¤t_target, TARGET_OBJECT_SPU, annex,
204 ul = strtoulst ((char *) reg, NULL, 16);
205 store_unsigned_integer (buf, 4, byte_order, ul);
209 static enum register_status
210 spu_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
211 int regnum, gdb_byte *buf)
216 enum register_status status;
221 status = regcache_raw_read (regcache, SPU_RAW_SP_REGNUM, reg);
222 if (status != REG_VALID)
224 memcpy (buf, reg, 4);
227 case SPU_FPSCR_REGNUM:
228 status = regcache_raw_read_unsigned (regcache, SPU_ID_REGNUM, &id);
229 if (status != REG_VALID)
231 xsnprintf (annex, sizeof annex, "%d/fpcr", (int) id);
232 target_read (¤t_target, TARGET_OBJECT_SPU, annex, buf, 0, 16);
235 case SPU_SRR0_REGNUM:
236 return spu_pseudo_register_read_spu (regcache, "srr0", buf);
238 case SPU_LSLR_REGNUM:
239 return spu_pseudo_register_read_spu (regcache, "lslr", buf);
241 case SPU_DECR_REGNUM:
242 return spu_pseudo_register_read_spu (regcache, "decr", buf);
244 case SPU_DECR_STATUS_REGNUM:
245 return spu_pseudo_register_read_spu (regcache, "decr_status", buf);
248 internal_error (__FILE__, __LINE__, _("invalid regnum"));
253 spu_pseudo_register_write_spu (struct regcache *regcache, const char *regname,
256 struct gdbarch *gdbarch = get_regcache_arch (regcache);
257 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
262 regcache_raw_read_unsigned (regcache, SPU_ID_REGNUM, &id);
263 xsnprintf (annex, sizeof annex, "%d/%s", (int) id, regname);
264 xsnprintf (reg, sizeof reg, "0x%s",
265 phex_nz (extract_unsigned_integer (buf, 4, byte_order), 4));
266 target_write (¤t_target, TARGET_OBJECT_SPU, annex,
267 (gdb_byte *) reg, 0, strlen (reg));
271 spu_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
272 int regnum, const gdb_byte *buf)
281 regcache_raw_read (regcache, SPU_RAW_SP_REGNUM, reg);
282 memcpy (reg, buf, 4);
283 regcache_raw_write (regcache, SPU_RAW_SP_REGNUM, reg);
286 case SPU_FPSCR_REGNUM:
287 regcache_raw_read_unsigned (regcache, SPU_ID_REGNUM, &id);
288 xsnprintf (annex, sizeof annex, "%d/fpcr", (int) id);
289 target_write (¤t_target, TARGET_OBJECT_SPU, annex, buf, 0, 16);
292 case SPU_SRR0_REGNUM:
293 spu_pseudo_register_write_spu (regcache, "srr0", buf);
296 case SPU_LSLR_REGNUM:
297 spu_pseudo_register_write_spu (regcache, "lslr", buf);
300 case SPU_DECR_REGNUM:
301 spu_pseudo_register_write_spu (regcache, "decr", buf);
304 case SPU_DECR_STATUS_REGNUM:
305 spu_pseudo_register_write_spu (regcache, "decr_status", buf);
309 internal_error (__FILE__, __LINE__, _("invalid regnum"));
314 spu_ax_pseudo_register_collect (struct gdbarch *gdbarch,
315 struct agent_expr *ax, int regnum)
320 ax_reg_mask (ax, SPU_RAW_SP_REGNUM);
323 case SPU_FPSCR_REGNUM:
324 case SPU_SRR0_REGNUM:
325 case SPU_LSLR_REGNUM:
326 case SPU_DECR_REGNUM:
327 case SPU_DECR_STATUS_REGNUM:
331 internal_error (__FILE__, __LINE__, _("invalid regnum"));
336 spu_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
337 struct agent_expr *ax, int regnum)
342 ax_reg (ax, SPU_RAW_SP_REGNUM);
345 case SPU_FPSCR_REGNUM:
346 case SPU_SRR0_REGNUM:
347 case SPU_LSLR_REGNUM:
348 case SPU_DECR_REGNUM:
349 case SPU_DECR_STATUS_REGNUM:
353 internal_error (__FILE__, __LINE__, _("invalid regnum"));
358 /* Value conversion -- access scalar values at the preferred slot. */
360 static struct value *
361 spu_value_from_register (struct gdbarch *gdbarch, struct type *type,
362 int regnum, struct frame_id frame_id)
364 struct value *value = default_value_from_register (gdbarch, type,
366 LONGEST len = TYPE_LENGTH (type);
368 if (regnum < SPU_NUM_GPRS && len < 16)
370 int preferred_slot = len < 4 ? 4 - len : 0;
371 set_value_offset (value, preferred_slot);
377 /* Register groups. */
380 spu_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
381 struct reggroup *group)
383 /* Registers displayed via 'info regs'. */
384 if (group == general_reggroup)
387 /* Registers displayed via 'info float'. */
388 if (group == float_reggroup)
391 /* Registers that need to be saved/restored in order to
392 push or pop frames. */
393 if (group == save_reggroup || group == restore_reggroup)
396 return default_register_reggroup_p (gdbarch, regnum, group);
399 /* DWARF-2 register numbers. */
402 spu_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
404 /* Use cooked instead of raw SP. */
405 return (reg == SPU_RAW_SP_REGNUM)? SPU_SP_REGNUM : reg;
409 /* Address handling. */
412 spu_gdbarch_id (struct gdbarch *gdbarch)
414 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
417 /* The objfile architecture of a standalone SPU executable does not
418 provide an SPU ID. Retrieve it from the objfile's relocated
419 address range in this special case. */
421 && symfile_objfile && symfile_objfile->obfd
422 && bfd_get_arch (symfile_objfile->obfd) == bfd_arch_spu
423 && symfile_objfile->sections != symfile_objfile->sections_end)
424 id = SPUADDR_SPU (obj_section_addr (symfile_objfile->sections));
430 spu_address_class_type_flags (int byte_size, int dwarf2_addr_class)
432 if (dwarf2_addr_class == 1)
433 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
439 spu_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
441 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
448 spu_address_class_name_to_type_flags (struct gdbarch *gdbarch,
449 const char *name, int *type_flags_ptr)
451 if (strcmp (name, "__ea") == 0)
453 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
461 spu_address_to_pointer (struct gdbarch *gdbarch,
462 struct type *type, gdb_byte *buf, CORE_ADDR addr)
464 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
465 store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
466 SPUADDR_ADDR (addr));
470 spu_pointer_to_address (struct gdbarch *gdbarch,
471 struct type *type, const gdb_byte *buf)
473 int id = spu_gdbarch_id (gdbarch);
474 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
476 = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
478 /* Do not convert __ea pointers. */
479 if (TYPE_ADDRESS_CLASS_1 (type))
482 return addr? SPUADDR (id, addr) : 0;
486 spu_integer_to_address (struct gdbarch *gdbarch,
487 struct type *type, const gdb_byte *buf)
489 int id = spu_gdbarch_id (gdbarch);
490 ULONGEST addr = unpack_long (type, buf);
492 return SPUADDR (id, addr);
496 /* Decoding SPU instructions. */
533 is_rr (unsigned int insn, int op, int *rt, int *ra, int *rb)
535 if ((insn >> 21) == op)
538 *ra = (insn >> 7) & 127;
539 *rb = (insn >> 14) & 127;
547 is_rrr (unsigned int insn, int op, int *rt, int *ra, int *rb, int *rc)
549 if ((insn >> 28) == op)
551 *rt = (insn >> 21) & 127;
552 *ra = (insn >> 7) & 127;
553 *rb = (insn >> 14) & 127;
562 is_ri7 (unsigned int insn, int op, int *rt, int *ra, int *i7)
564 if ((insn >> 21) == op)
567 *ra = (insn >> 7) & 127;
568 *i7 = (((insn >> 14) & 127) ^ 0x40) - 0x40;
576 is_ri10 (unsigned int insn, int op, int *rt, int *ra, int *i10)
578 if ((insn >> 24) == op)
581 *ra = (insn >> 7) & 127;
582 *i10 = (((insn >> 14) & 0x3ff) ^ 0x200) - 0x200;
590 is_ri16 (unsigned int insn, int op, int *rt, int *i16)
592 if ((insn >> 23) == op)
595 *i16 = (((insn >> 7) & 0xffff) ^ 0x8000) - 0x8000;
603 is_ri18 (unsigned int insn, int op, int *rt, int *i18)
605 if ((insn >> 25) == op)
608 *i18 = (((insn >> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
616 is_branch (unsigned int insn, int *offset, int *reg)
620 if (is_ri16 (insn, op_br, &rt, &i16)
621 || is_ri16 (insn, op_brsl, &rt, &i16)
622 || is_ri16 (insn, op_brnz, &rt, &i16)
623 || is_ri16 (insn, op_brz, &rt, &i16)
624 || is_ri16 (insn, op_brhnz, &rt, &i16)
625 || is_ri16 (insn, op_brhz, &rt, &i16))
627 *reg = SPU_PC_REGNUM;
632 if (is_ri16 (insn, op_bra, &rt, &i16)
633 || is_ri16 (insn, op_brasl, &rt, &i16))
640 if (is_ri7 (insn, op_bi, &rt, reg, &i7)
641 || is_ri7 (insn, op_bisl, &rt, reg, &i7)
642 || is_ri7 (insn, op_biz, &rt, reg, &i7)
643 || is_ri7 (insn, op_binz, &rt, reg, &i7)
644 || is_ri7 (insn, op_bihz, &rt, reg, &i7)
645 || is_ri7 (insn, op_bihnz, &rt, reg, &i7))
655 /* Prolog parsing. */
657 struct spu_prologue_data
659 /* Stack frame size. -1 if analysis was unsuccessful. */
662 /* How to find the CFA. The CFA is equal to SP at function entry. */
666 /* Offset relative to CFA where a register is saved. -1 if invalid. */
667 int reg_offset[SPU_NUM_GPRS];
671 spu_analyze_prologue (struct gdbarch *gdbarch,
672 CORE_ADDR start_pc, CORE_ADDR end_pc,
673 struct spu_prologue_data *data)
675 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
680 int reg_immed[SPU_NUM_GPRS];
682 CORE_ADDR prolog_pc = start_pc;
687 /* Initialize DATA to default values. */
690 data->cfa_reg = SPU_RAW_SP_REGNUM;
691 data->cfa_offset = 0;
693 for (i = 0; i < SPU_NUM_GPRS; i++)
694 data->reg_offset[i] = -1;
696 /* Set up REG_IMMED array. This is non-zero for a register if we know its
697 preferred slot currently holds this immediate value. */
698 for (i = 0; i < SPU_NUM_GPRS; i++)
701 /* Scan instructions until the first branch.
703 The following instructions are important prolog components:
705 - The first instruction to set up the stack pointer.
706 - The first instruction to set up the frame pointer.
707 - The first instruction to save the link register.
708 - The first instruction to save the backchain.
710 We return the instruction after the latest of these four,
711 or the incoming PC if none is found. The first instruction
712 to set up the stack pointer also defines the frame size.
714 Note that instructions saving incoming arguments to their stack
715 slots are not counted as important, because they are hard to
716 identify with certainty. This should not matter much, because
717 arguments are relevant only in code compiled with debug data,
718 and in such code the GDB core will advance until the first source
719 line anyway, using SAL data.
721 For purposes of stack unwinding, we analyze the following types
722 of instructions in addition:
724 - Any instruction adding to the current frame pointer.
725 - Any instruction loading an immediate constant into a register.
726 - Any instruction storing a register onto the stack.
728 These are used to compute the CFA and REG_OFFSET output. */
730 for (pc = start_pc; pc < end_pc; pc += 4)
733 int rt, ra, rb, rc, immed;
735 if (target_read_memory (pc, buf, 4))
737 insn = extract_unsigned_integer (buf, 4, byte_order);
739 /* AI is the typical instruction to set up a stack frame.
740 It is also used to initialize the frame pointer. */
741 if (is_ri10 (insn, op_ai, &rt, &ra, &immed))
743 if (rt == data->cfa_reg && ra == data->cfa_reg)
744 data->cfa_offset -= immed;
746 if (rt == SPU_RAW_SP_REGNUM && ra == SPU_RAW_SP_REGNUM
754 else if (rt == SPU_FP_REGNUM && ra == SPU_RAW_SP_REGNUM
760 data->cfa_reg = SPU_FP_REGNUM;
761 data->cfa_offset -= immed;
765 /* A is used to set up stack frames of size >= 512 bytes.
766 If we have tracked the contents of the addend register,
767 we can handle this as well. */
768 else if (is_rr (insn, op_a, &rt, &ra, &rb))
770 if (rt == data->cfa_reg && ra == data->cfa_reg)
772 if (reg_immed[rb] != 0)
773 data->cfa_offset -= reg_immed[rb];
775 data->cfa_reg = -1; /* We don't know the CFA any more. */
778 if (rt == SPU_RAW_SP_REGNUM && ra == SPU_RAW_SP_REGNUM
784 if (reg_immed[rb] != 0)
785 data->size = -reg_immed[rb];
789 /* We need to track IL and ILA used to load immediate constants
790 in case they are later used as input to an A instruction. */
791 else if (is_ri16 (insn, op_il, &rt, &immed))
793 reg_immed[rt] = immed;
795 if (rt == SPU_RAW_SP_REGNUM && !found_sp)
799 else if (is_ri18 (insn, op_ila, &rt, &immed))
801 reg_immed[rt] = immed & 0x3ffff;
803 if (rt == SPU_RAW_SP_REGNUM && !found_sp)
807 /* STQD is used to save registers to the stack. */
808 else if (is_ri10 (insn, op_stqd, &rt, &ra, &immed))
810 if (ra == data->cfa_reg)
811 data->reg_offset[rt] = data->cfa_offset - (immed << 4);
813 if (ra == data->cfa_reg && rt == SPU_LR_REGNUM
820 if (ra == SPU_RAW_SP_REGNUM
821 && (found_sp? immed == 0 : rt == SPU_RAW_SP_REGNUM)
829 /* _start uses SELB to set up the stack pointer. */
830 else if (is_rrr (insn, op_selb, &rt, &ra, &rb, &rc))
832 if (rt == SPU_RAW_SP_REGNUM && !found_sp)
836 /* We terminate if we find a branch. */
837 else if (is_branch (insn, &immed, &ra))
842 /* If we successfully parsed until here, and didn't find any instruction
843 modifying SP, we assume we have a frameless function. */
847 /* Return cooked instead of raw SP. */
848 if (data->cfa_reg == SPU_RAW_SP_REGNUM)
849 data->cfa_reg = SPU_SP_REGNUM;
854 /* Return the first instruction after the prologue starting at PC. */
856 spu_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
858 struct spu_prologue_data data;
859 return spu_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
862 /* Return the frame pointer in use at address PC. */
864 spu_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc,
865 int *reg, LONGEST *offset)
867 struct spu_prologue_data data;
868 spu_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
870 if (data.size != -1 && data.cfa_reg != -1)
872 /* The 'frame pointer' address is CFA minus frame size. */
874 *offset = data.cfa_offset - data.size;
878 /* ??? We don't really know ... */
879 *reg = SPU_SP_REGNUM;
884 /* Implement the stack_frame_destroyed_p gdbarch method.
886 1) scan forward from the point of execution:
887 a) If you find an instruction that modifies the stack pointer
888 or transfers control (except a return), execution is not in
890 b) Stop scanning if you find a return instruction or reach the
891 end of the function or reach the hard limit for the size of
893 2) scan backward from the point of execution:
894 a) If you find an instruction that modifies the stack pointer,
895 execution *is* in an epilogue, return.
896 b) Stop scanning if you reach an instruction that transfers
897 control or the beginning of the function or reach the hard
898 limit for the size of an epilogue. */
901 spu_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
903 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
904 CORE_ADDR scan_pc, func_start, func_end, epilogue_start, epilogue_end;
907 int rt, ra, rb, immed;
909 /* Find the search limits based on function boundaries and hard limit.
910 We assume the epilogue can be up to 64 instructions long. */
912 const int spu_max_epilogue_size = 64 * 4;
914 if (!find_pc_partial_function (pc, NULL, &func_start, &func_end))
917 if (pc - func_start < spu_max_epilogue_size)
918 epilogue_start = func_start;
920 epilogue_start = pc - spu_max_epilogue_size;
922 if (func_end - pc < spu_max_epilogue_size)
923 epilogue_end = func_end;
925 epilogue_end = pc + spu_max_epilogue_size;
927 /* Scan forward until next 'bi $0'. */
929 for (scan_pc = pc; scan_pc < epilogue_end; scan_pc += 4)
931 if (target_read_memory (scan_pc, buf, 4))
933 insn = extract_unsigned_integer (buf, 4, byte_order);
935 if (is_branch (insn, &immed, &ra))
937 if (immed == 0 && ra == SPU_LR_REGNUM)
943 if (is_ri10 (insn, op_ai, &rt, &ra, &immed)
944 || is_rr (insn, op_a, &rt, &ra, &rb)
945 || is_ri10 (insn, op_lqd, &rt, &ra, &immed))
947 if (rt == SPU_RAW_SP_REGNUM)
952 if (scan_pc >= epilogue_end)
955 /* Scan backward until adjustment to stack pointer (R1). */
957 for (scan_pc = pc - 4; scan_pc >= epilogue_start; scan_pc -= 4)
959 if (target_read_memory (scan_pc, buf, 4))
961 insn = extract_unsigned_integer (buf, 4, byte_order);
963 if (is_branch (insn, &immed, &ra))
966 if (is_ri10 (insn, op_ai, &rt, &ra, &immed)
967 || is_rr (insn, op_a, &rt, &ra, &rb)
968 || is_ri10 (insn, op_lqd, &rt, &ra, &immed))
970 if (rt == SPU_RAW_SP_REGNUM)
979 /* Normal stack frames. */
981 struct spu_unwind_cache
984 CORE_ADDR frame_base;
985 CORE_ADDR local_base;
987 struct trad_frame_saved_reg *saved_regs;
990 static struct spu_unwind_cache *
991 spu_frame_unwind_cache (struct frame_info *this_frame,
992 void **this_prologue_cache)
994 struct gdbarch *gdbarch = get_frame_arch (this_frame);
995 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
996 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
997 struct spu_unwind_cache *info;
998 struct spu_prologue_data data;
999 CORE_ADDR id = tdep->id;
1002 if (*this_prologue_cache)
1003 return (struct spu_unwind_cache *) *this_prologue_cache;
1005 info = FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache);
1006 *this_prologue_cache = info;
1007 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1008 info->frame_base = 0;
1009 info->local_base = 0;
1011 /* Find the start of the current function, and analyze its prologue. */
1012 info->func = get_frame_func (this_frame);
1013 if (info->func == 0)
1015 /* Fall back to using the current PC as frame ID. */
1016 info->func = get_frame_pc (this_frame);
1020 spu_analyze_prologue (gdbarch, info->func, get_frame_pc (this_frame),
1023 /* If successful, use prologue analysis data. */
1024 if (data.size != -1 && data.cfa_reg != -1)
1029 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
1030 get_frame_register (this_frame, data.cfa_reg, buf);
1031 cfa = extract_unsigned_integer (buf, 4, byte_order) + data.cfa_offset;
1032 cfa = SPUADDR (id, cfa);
1034 /* Call-saved register slots. */
1035 for (i = 0; i < SPU_NUM_GPRS; i++)
1036 if (i == SPU_LR_REGNUM
1037 || (i >= SPU_SAVED1_REGNUM && i <= SPU_SAVEDN_REGNUM))
1038 if (data.reg_offset[i] != -1)
1039 info->saved_regs[i].addr = cfa - data.reg_offset[i];
1042 info->frame_base = cfa;
1043 info->local_base = cfa - data.size;
1046 /* Otherwise, fall back to reading the backchain link. */
1054 /* Get local store limit. */
1055 lslr = get_frame_register_unsigned (this_frame, SPU_LSLR_REGNUM);
1057 lslr = (ULONGEST) -1;
1059 /* Get the backchain. */
1060 reg = get_frame_register_unsigned (this_frame, SPU_SP_REGNUM);
1061 status = safe_read_memory_integer (SPUADDR (id, reg), 4, byte_order,
1064 /* A zero backchain terminates the frame chain. Also, sanity
1065 check against the local store size limit. */
1066 if (status && backchain > 0 && backchain <= lslr)
1068 /* Assume the link register is saved into its slot. */
1069 if (backchain + 16 <= lslr)
1070 info->saved_regs[SPU_LR_REGNUM].addr = SPUADDR (id,
1074 info->frame_base = SPUADDR (id, backchain);
1075 info->local_base = SPUADDR (id, reg);
1079 /* If we didn't find a frame, we cannot determine SP / return address. */
1080 if (info->frame_base == 0)
1083 /* The previous SP is equal to the CFA. */
1084 trad_frame_set_value (info->saved_regs, SPU_SP_REGNUM,
1085 SPUADDR_ADDR (info->frame_base));
1087 /* Read full contents of the unwound link register in order to
1088 be able to determine the return address. */
1089 if (trad_frame_addr_p (info->saved_regs, SPU_LR_REGNUM))
1090 target_read_memory (info->saved_regs[SPU_LR_REGNUM].addr, buf, 16);
1092 get_frame_register (this_frame, SPU_LR_REGNUM, buf);
1094 /* Normally, the return address is contained in the slot 0 of the
1095 link register, and slots 1-3 are zero. For an overlay return,
1096 slot 0 contains the address of the overlay manager return stub,
1097 slot 1 contains the partition number of the overlay section to
1098 be returned to, and slot 2 contains the return address within
1099 that section. Return the latter address in that case. */
1100 if (extract_unsigned_integer (buf + 8, 4, byte_order) != 0)
1101 trad_frame_set_value (info->saved_regs, SPU_PC_REGNUM,
1102 extract_unsigned_integer (buf + 8, 4, byte_order));
1104 trad_frame_set_value (info->saved_regs, SPU_PC_REGNUM,
1105 extract_unsigned_integer (buf, 4, byte_order));
1111 spu_frame_this_id (struct frame_info *this_frame,
1112 void **this_prologue_cache, struct frame_id *this_id)
1114 struct spu_unwind_cache *info =
1115 spu_frame_unwind_cache (this_frame, this_prologue_cache);
1117 if (info->frame_base == 0)
1120 *this_id = frame_id_build (info->frame_base, info->func);
1123 static struct value *
1124 spu_frame_prev_register (struct frame_info *this_frame,
1125 void **this_prologue_cache, int regnum)
1127 struct spu_unwind_cache *info
1128 = spu_frame_unwind_cache (this_frame, this_prologue_cache);
1130 /* Special-case the stack pointer. */
1131 if (regnum == SPU_RAW_SP_REGNUM)
1132 regnum = SPU_SP_REGNUM;
1134 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1137 static const struct frame_unwind spu_frame_unwind = {
1139 default_frame_unwind_stop_reason,
1141 spu_frame_prev_register,
1143 default_frame_sniffer
1147 spu_frame_base_address (struct frame_info *this_frame, void **this_cache)
1149 struct spu_unwind_cache *info
1150 = spu_frame_unwind_cache (this_frame, this_cache);
1151 return info->local_base;
1154 static const struct frame_base spu_frame_base = {
1156 spu_frame_base_address,
1157 spu_frame_base_address,
1158 spu_frame_base_address
1162 spu_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1164 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1165 CORE_ADDR pc = frame_unwind_register_unsigned (next_frame, SPU_PC_REGNUM);
1166 /* Mask off interrupt enable bit. */
1167 return SPUADDR (tdep->id, pc & -4);
1171 spu_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1173 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1174 CORE_ADDR sp = frame_unwind_register_unsigned (next_frame, SPU_SP_REGNUM);
1175 return SPUADDR (tdep->id, sp);
1179 spu_read_pc (struct regcache *regcache)
1181 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
1183 regcache_cooked_read_unsigned (regcache, SPU_PC_REGNUM, &pc);
1184 /* Mask off interrupt enable bit. */
1185 return SPUADDR (tdep->id, pc & -4);
1189 spu_write_pc (struct regcache *regcache, CORE_ADDR pc)
1191 /* Keep interrupt enabled state unchanged. */
1194 regcache_cooked_read_unsigned (regcache, SPU_PC_REGNUM, &old_pc);
1195 regcache_cooked_write_unsigned (regcache, SPU_PC_REGNUM,
1196 (SPUADDR_ADDR (pc) & -4) | (old_pc & 3));
1200 /* Cell/B.E. cross-architecture unwinder support. */
1202 struct spu2ppu_cache
1204 struct frame_id frame_id;
1205 struct regcache *regcache;
1208 static struct gdbarch *
1209 spu2ppu_prev_arch (struct frame_info *this_frame, void **this_cache)
1211 struct spu2ppu_cache *cache = (struct spu2ppu_cache *) *this_cache;
1212 return get_regcache_arch (cache->regcache);
1216 spu2ppu_this_id (struct frame_info *this_frame,
1217 void **this_cache, struct frame_id *this_id)
1219 struct spu2ppu_cache *cache = (struct spu2ppu_cache *) *this_cache;
1220 *this_id = cache->frame_id;
1223 static struct value *
1224 spu2ppu_prev_register (struct frame_info *this_frame,
1225 void **this_cache, int regnum)
1227 struct spu2ppu_cache *cache = (struct spu2ppu_cache *) *this_cache;
1228 struct gdbarch *gdbarch = get_regcache_arch (cache->regcache);
1231 buf = (gdb_byte *) alloca (register_size (gdbarch, regnum));
1232 regcache_cooked_read (cache->regcache, regnum, buf);
1233 return frame_unwind_got_bytes (this_frame, regnum, buf);
1237 spu2ppu_sniffer (const struct frame_unwind *self,
1238 struct frame_info *this_frame, void **this_prologue_cache)
1240 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1241 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1242 CORE_ADDR base, func, backchain;
1245 if (gdbarch_bfd_arch_info (target_gdbarch ())->arch == bfd_arch_spu)
1248 base = get_frame_sp (this_frame);
1249 func = get_frame_pc (this_frame);
1250 if (target_read_memory (base, buf, 4))
1252 backchain = extract_unsigned_integer (buf, 4, byte_order);
1256 struct frame_info *fi;
1258 struct spu2ppu_cache *cache
1259 = FRAME_OBSTACK_CALLOC (1, struct spu2ppu_cache);
1261 cache->frame_id = frame_id_build (base + 16, func);
1263 for (fi = get_next_frame (this_frame); fi; fi = get_next_frame (fi))
1264 if (gdbarch_bfd_arch_info (get_frame_arch (fi))->arch != bfd_arch_spu)
1269 cache->regcache = frame_save_as_regcache (fi);
1270 *this_prologue_cache = cache;
1275 struct regcache *regcache;
1276 regcache = get_thread_arch_regcache (inferior_ptid, target_gdbarch ());
1277 cache->regcache = regcache_dup (regcache);
1278 *this_prologue_cache = cache;
1287 spu2ppu_dealloc_cache (struct frame_info *self, void *this_cache)
1289 struct spu2ppu_cache *cache = (struct spu2ppu_cache *) this_cache;
1290 regcache_xfree (cache->regcache);
1293 static const struct frame_unwind spu2ppu_unwind = {
1295 default_frame_unwind_stop_reason,
1297 spu2ppu_prev_register,
1300 spu2ppu_dealloc_cache,
1305 /* Function calling convention. */
1308 spu_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
1314 spu_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr,
1315 struct value **args, int nargs, struct type *value_type,
1316 CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
1317 struct regcache *regcache)
1319 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1320 sp = (sp - 4) & ~15;
1321 /* Store the address of that breakpoint */
1323 /* The call starts at the callee's entry point. */
1330 spu_scalar_value_p (struct type *type)
1332 switch (TYPE_CODE (type))
1335 case TYPE_CODE_ENUM:
1336 case TYPE_CODE_RANGE:
1337 case TYPE_CODE_CHAR:
1338 case TYPE_CODE_BOOL:
1341 return TYPE_LENGTH (type) <= 16;
1349 spu_value_to_regcache (struct regcache *regcache, int regnum,
1350 struct type *type, const gdb_byte *in)
1352 int len = TYPE_LENGTH (type);
1354 if (spu_scalar_value_p (type))
1356 int preferred_slot = len < 4 ? 4 - len : 0;
1357 regcache_cooked_write_part (regcache, regnum, preferred_slot, len, in);
1363 regcache_cooked_write (regcache, regnum++, in);
1369 regcache_cooked_write_part (regcache, regnum, 0, len, in);
1374 spu_regcache_to_value (struct regcache *regcache, int regnum,
1375 struct type *type, gdb_byte *out)
1377 int len = TYPE_LENGTH (type);
1379 if (spu_scalar_value_p (type))
1381 int preferred_slot = len < 4 ? 4 - len : 0;
1382 regcache_cooked_read_part (regcache, regnum, preferred_slot, len, out);
1388 regcache_cooked_read (regcache, regnum++, out);
1394 regcache_cooked_read_part (regcache, regnum, 0, len, out);
1399 spu_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1400 struct regcache *regcache, CORE_ADDR bp_addr,
1401 int nargs, struct value **args, CORE_ADDR sp,
1402 int struct_return, CORE_ADDR struct_addr)
1404 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1407 int regnum = SPU_ARG1_REGNUM;
1411 /* Set the return address. */
1412 memset (buf, 0, sizeof buf);
1413 store_unsigned_integer (buf, 4, byte_order, SPUADDR_ADDR (bp_addr));
1414 regcache_cooked_write (regcache, SPU_LR_REGNUM, buf);
1416 /* If STRUCT_RETURN is true, then the struct return address (in
1417 STRUCT_ADDR) will consume the first argument-passing register.
1418 Both adjust the register count and store that value. */
1421 memset (buf, 0, sizeof buf);
1422 store_unsigned_integer (buf, 4, byte_order, SPUADDR_ADDR (struct_addr));
1423 regcache_cooked_write (regcache, regnum++, buf);
1426 /* Fill in argument registers. */
1427 for (i = 0; i < nargs; i++)
1429 struct value *arg = args[i];
1430 struct type *type = check_typedef (value_type (arg));
1431 const gdb_byte *contents = value_contents (arg);
1432 int n_regs = align_up (TYPE_LENGTH (type), 16) / 16;
1434 /* If the argument doesn't wholly fit into registers, it and
1435 all subsequent arguments go to the stack. */
1436 if (regnum + n_regs - 1 > SPU_ARGN_REGNUM)
1442 spu_value_to_regcache (regcache, regnum, type, contents);
1446 /* Overflow arguments go to the stack. */
1447 if (stack_arg != -1)
1451 /* Allocate all required stack size. */
1452 for (i = stack_arg; i < nargs; i++)
1454 struct type *type = check_typedef (value_type (args[i]));
1455 sp -= align_up (TYPE_LENGTH (type), 16);
1458 /* Fill in stack arguments. */
1460 for (i = stack_arg; i < nargs; i++)
1462 struct value *arg = args[i];
1463 struct type *type = check_typedef (value_type (arg));
1464 int len = TYPE_LENGTH (type);
1467 if (spu_scalar_value_p (type))
1468 preferred_slot = len < 4 ? 4 - len : 0;
1472 target_write_memory (ap + preferred_slot, value_contents (arg), len);
1473 ap += align_up (TYPE_LENGTH (type), 16);
1477 /* Allocate stack frame header. */
1480 /* Store stack back chain. */
1481 regcache_cooked_read (regcache, SPU_RAW_SP_REGNUM, buf);
1482 target_write_memory (sp, buf, 16);
1484 /* Finally, update all slots of the SP register. */
1485 sp_delta = sp - extract_unsigned_integer (buf, 4, byte_order);
1486 for (i = 0; i < 4; i++)
1488 CORE_ADDR sp_slot = extract_unsigned_integer (buf + 4*i, 4, byte_order);
1489 store_unsigned_integer (buf + 4*i, 4, byte_order, sp_slot + sp_delta);
1491 regcache_cooked_write (regcache, SPU_RAW_SP_REGNUM, buf);
1496 static struct frame_id
1497 spu_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1499 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1500 CORE_ADDR pc = get_frame_register_unsigned (this_frame, SPU_PC_REGNUM);
1501 CORE_ADDR sp = get_frame_register_unsigned (this_frame, SPU_SP_REGNUM);
1502 return frame_id_build (SPUADDR (tdep->id, sp), SPUADDR (tdep->id, pc & -4));
1505 /* Function return value access. */
1507 static enum return_value_convention
1508 spu_return_value (struct gdbarch *gdbarch, struct value *function,
1509 struct type *type, struct regcache *regcache,
1510 gdb_byte *out, const gdb_byte *in)
1512 struct type *func_type = function ? value_type (function) : NULL;
1513 enum return_value_convention rvc;
1514 int opencl_vector = 0;
1518 func_type = check_typedef (func_type);
1520 if (TYPE_CODE (func_type) == TYPE_CODE_PTR)
1521 func_type = check_typedef (TYPE_TARGET_TYPE (func_type));
1523 if (TYPE_CODE (func_type) == TYPE_CODE_FUNC
1524 && TYPE_CALLING_CONVENTION (func_type) == DW_CC_GDB_IBM_OpenCL
1525 && TYPE_CODE (type) == TYPE_CODE_ARRAY
1526 && TYPE_VECTOR (type))
1530 if (TYPE_LENGTH (type) <= (SPU_ARGN_REGNUM - SPU_ARG1_REGNUM + 1) * 16)
1531 rvc = RETURN_VALUE_REGISTER_CONVENTION;
1533 rvc = RETURN_VALUE_STRUCT_CONVENTION;
1539 case RETURN_VALUE_REGISTER_CONVENTION:
1540 if (opencl_vector && TYPE_LENGTH (type) == 2)
1541 regcache_cooked_write_part (regcache, SPU_ARG1_REGNUM, 2, 2, in);
1543 spu_value_to_regcache (regcache, SPU_ARG1_REGNUM, type, in);
1546 case RETURN_VALUE_STRUCT_CONVENTION:
1547 error (_("Cannot set function return value."));
1555 case RETURN_VALUE_REGISTER_CONVENTION:
1556 if (opencl_vector && TYPE_LENGTH (type) == 2)
1557 regcache_cooked_read_part (regcache, SPU_ARG1_REGNUM, 2, 2, out);
1559 spu_regcache_to_value (regcache, SPU_ARG1_REGNUM, type, out);
1562 case RETURN_VALUE_STRUCT_CONVENTION:
1563 error (_("Function return value unknown."));
1573 constexpr gdb_byte spu_break_insn[] = { 0x00, 0x00, 0x3f, 0xff };
1575 typedef BP_MANIPULATION (spu_break_insn) spu_breakpoint;
1578 spu_memory_remove_breakpoint (struct gdbarch *gdbarch,
1579 struct bp_target_info *bp_tgt)
1581 /* We work around a problem in combined Cell/B.E. debugging here. Consider
1582 that in a combined application, we have some breakpoints inserted in SPU
1583 code, and now the application forks (on the PPU side). GDB common code
1584 will assume that the fork system call copied all breakpoints into the new
1585 process' address space, and that all those copies now need to be removed
1586 (see breakpoint.c:detach_breakpoints).
1588 While this is certainly true for PPU side breakpoints, it is not true
1589 for SPU side breakpoints. fork will clone the SPU context file
1590 descriptors, so that all the existing SPU contexts are in accessible
1591 in the new process. However, the contents of the SPU contexts themselves
1592 are *not* cloned. Therefore the effect of detach_breakpoints is to
1593 remove SPU breakpoints from the *original* SPU context's local store
1594 -- this is not the correct behaviour.
1596 The workaround is to check whether the PID we are asked to remove this
1597 breakpoint from (i.e. ptid_get_pid (inferior_ptid)) is different from the
1598 PID of the current inferior (i.e. current_inferior ()->pid). This is only
1599 true in the context of detach_breakpoints. If so, we simply do nothing.
1600 [ Note that for the fork child process, it does not matter if breakpoints
1601 remain inserted, because those SPU contexts are not runnable anyway --
1602 the Linux kernel allows only the original process to invoke spu_run. */
1604 if (ptid_get_pid (inferior_ptid) != current_inferior ()->pid)
1607 return default_memory_remove_breakpoint (gdbarch, bp_tgt);
1611 /* Software single-stepping support. */
1613 static VEC (CORE_ADDR) *
1614 spu_software_single_step (struct regcache *regcache)
1616 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1617 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1618 CORE_ADDR pc, next_pc;
1623 VEC (CORE_ADDR) *next_pcs = NULL;
1625 pc = regcache_read_pc (regcache);
1627 if (target_read_memory (pc, buf, 4))
1628 throw_error (MEMORY_ERROR, _("Could not read instruction at %s."),
1629 paddress (gdbarch, pc));
1631 insn = extract_unsigned_integer (buf, 4, byte_order);
1633 /* Get local store limit. */
1634 lslr = regcache_raw_get_unsigned (regcache, SPU_LSLR_REGNUM);
1636 lslr = (ULONGEST) -1;
1638 /* Next sequential instruction is at PC + 4, except if the current
1639 instruction is a PPE-assisted call, in which case it is at PC + 8.
1640 Wrap around LS limit to be on the safe side. */
1641 if ((insn & 0xffffff00) == 0x00002100)
1642 next_pc = (SPUADDR_ADDR (pc) + 8) & lslr;
1644 next_pc = (SPUADDR_ADDR (pc) + 4) & lslr;
1646 VEC_safe_push (CORE_ADDR, next_pcs, SPUADDR (SPUADDR_SPU (pc), next_pc));
1648 if (is_branch (insn, &offset, ®))
1650 CORE_ADDR target = offset;
1652 if (reg == SPU_PC_REGNUM)
1653 target += SPUADDR_ADDR (pc);
1655 target += regcache_raw_get_unsigned (regcache, reg) & -4;
1657 target = target & lslr;
1658 if (target != next_pc)
1659 VEC_safe_push (CORE_ADDR, next_pcs, SPUADDR (SPUADDR_SPU (pc),
1667 /* Longjmp support. */
1670 spu_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
1672 struct gdbarch *gdbarch = get_frame_arch (frame);
1673 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1674 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1679 /* Jump buffer is pointed to by the argument register $r3. */
1680 if (!get_frame_register_bytes (frame, SPU_ARG1_REGNUM, 0, 4, buf,
1684 jb_addr = extract_unsigned_integer (buf, 4, byte_order);
1685 if (target_read_memory (SPUADDR (tdep->id, jb_addr), buf, 4))
1688 *pc = extract_unsigned_integer (buf, 4, byte_order);
1689 *pc = SPUADDR (tdep->id, *pc);
1696 struct spu_dis_asm_data
1698 struct gdbarch *gdbarch;
1703 spu_dis_asm_print_address (bfd_vma addr, struct disassemble_info *info)
1705 struct spu_dis_asm_data *data
1706 = (struct spu_dis_asm_data *) info->application_data;
1707 print_address (data->gdbarch, SPUADDR (data->id, addr),
1708 (struct ui_file *) info->stream);
1712 gdb_print_insn_spu (bfd_vma memaddr, struct disassemble_info *info)
1714 /* The opcodes disassembler does 18-bit address arithmetic. Make
1715 sure the SPU ID encoded in the high bits is added back when we
1716 call print_address. */
1717 struct disassemble_info spu_info = *info;
1718 struct spu_dis_asm_data data;
1719 data.gdbarch = (struct gdbarch *) info->application_data;
1720 data.id = SPUADDR_SPU (memaddr);
1722 spu_info.application_data = &data;
1723 spu_info.print_address_func = spu_dis_asm_print_address;
1724 return print_insn_spu (memaddr, &spu_info);
1728 /* Target overlays for the SPU overlay manager.
1730 See the documentation of simple_overlay_update for how the
1731 interface is supposed to work.
1733 Data structures used by the overlay manager:
1741 } _ovly_table[]; -- one entry per overlay section
1743 struct ovly_buf_table
1746 } _ovly_buf_table[]; -- one entry per overlay buffer
1748 _ovly_table should never change.
1750 Both tables are aligned to a 16-byte boundary, the symbols
1751 _ovly_table and _ovly_buf_table are of type STT_OBJECT and their
1752 size set to the size of the respective array. buf in _ovly_table is
1753 an index into _ovly_buf_table.
1755 mapped is an index into _ovly_table. Both the mapped and buf indices start
1756 from one to reference the first entry in their respective tables. */
1758 /* Using the per-objfile private data mechanism, we store for each
1759 objfile an array of "struct spu_overlay_table" structures, one
1760 for each obj_section of the objfile. This structure holds two
1761 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1762 is *not* an overlay section. If it is non-zero, it represents
1763 a target address. The overlay section is mapped iff the target
1764 integer at this location equals MAPPED_VAL. */
1766 static const struct objfile_data *spu_overlay_data;
1768 struct spu_overlay_table
1770 CORE_ADDR mapped_ptr;
1771 CORE_ADDR mapped_val;
1774 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1775 the _ovly_table data structure from the target and initialize the
1776 spu_overlay_table data structure from it. */
1777 static struct spu_overlay_table *
1778 spu_get_overlay_table (struct objfile *objfile)
1780 enum bfd_endian byte_order = bfd_big_endian (objfile->obfd)?
1781 BFD_ENDIAN_BIG : BFD_ENDIAN_LITTLE;
1782 struct bound_minimal_symbol ovly_table_msym, ovly_buf_table_msym;
1783 CORE_ADDR ovly_table_base, ovly_buf_table_base;
1784 unsigned ovly_table_size, ovly_buf_table_size;
1785 struct spu_overlay_table *tbl;
1786 struct obj_section *osect;
1787 gdb_byte *ovly_table;
1790 tbl = (struct spu_overlay_table *) objfile_data (objfile, spu_overlay_data);
1794 ovly_table_msym = lookup_minimal_symbol ("_ovly_table", NULL, objfile);
1795 if (!ovly_table_msym.minsym)
1798 ovly_buf_table_msym = lookup_minimal_symbol ("_ovly_buf_table",
1800 if (!ovly_buf_table_msym.minsym)
1803 ovly_table_base = BMSYMBOL_VALUE_ADDRESS (ovly_table_msym);
1804 ovly_table_size = MSYMBOL_SIZE (ovly_table_msym.minsym);
1806 ovly_buf_table_base = BMSYMBOL_VALUE_ADDRESS (ovly_buf_table_msym);
1807 ovly_buf_table_size = MSYMBOL_SIZE (ovly_buf_table_msym.minsym);
1809 ovly_table = (gdb_byte *) xmalloc (ovly_table_size);
1810 read_memory (ovly_table_base, ovly_table, ovly_table_size);
1812 tbl = OBSTACK_CALLOC (&objfile->objfile_obstack,
1813 objfile->sections_end - objfile->sections,
1814 struct spu_overlay_table);
1816 for (i = 0; i < ovly_table_size / 16; i++)
1818 CORE_ADDR vma = extract_unsigned_integer (ovly_table + 16*i + 0,
1820 CORE_ADDR size = extract_unsigned_integer (ovly_table + 16*i + 4,
1822 CORE_ADDR pos = extract_unsigned_integer (ovly_table + 16*i + 8,
1824 CORE_ADDR buf = extract_unsigned_integer (ovly_table + 16*i + 12,
1827 if (buf == 0 || (buf - 1) * 4 >= ovly_buf_table_size)
1830 ALL_OBJFILE_OSECTIONS (objfile, osect)
1831 if (vma == bfd_section_vma (objfile->obfd, osect->the_bfd_section)
1832 && pos == osect->the_bfd_section->filepos)
1834 int ndx = osect - objfile->sections;
1835 tbl[ndx].mapped_ptr = ovly_buf_table_base + (buf - 1) * 4;
1836 tbl[ndx].mapped_val = i + 1;
1842 set_objfile_data (objfile, spu_overlay_data, tbl);
1846 /* Read _ovly_buf_table entry from the target to dermine whether
1847 OSECT is currently mapped, and update the mapped state. */
1849 spu_overlay_update_osect (struct obj_section *osect)
1851 enum bfd_endian byte_order = bfd_big_endian (osect->objfile->obfd)?
1852 BFD_ENDIAN_BIG : BFD_ENDIAN_LITTLE;
1853 struct spu_overlay_table *ovly_table;
1856 ovly_table = spu_get_overlay_table (osect->objfile);
1860 ovly_table += osect - osect->objfile->sections;
1861 if (ovly_table->mapped_ptr == 0)
1864 id = SPUADDR_SPU (obj_section_addr (osect));
1865 val = read_memory_unsigned_integer (SPUADDR (id, ovly_table->mapped_ptr),
1867 osect->ovly_mapped = (val == ovly_table->mapped_val);
1870 /* If OSECT is NULL, then update all sections' mapped state.
1871 If OSECT is non-NULL, then update only OSECT's mapped state. */
1873 spu_overlay_update (struct obj_section *osect)
1875 /* Just one section. */
1877 spu_overlay_update_osect (osect);
1882 struct objfile *objfile;
1884 ALL_OBJSECTIONS (objfile, osect)
1885 if (section_is_overlay (osect))
1886 spu_overlay_update_osect (osect);
1890 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1891 If there is one, go through all sections and make sure for non-
1892 overlay sections LMA equals VMA, while for overlay sections LMA
1893 is larger than SPU_OVERLAY_LMA. */
1895 spu_overlay_new_objfile (struct objfile *objfile)
1897 struct spu_overlay_table *ovly_table;
1898 struct obj_section *osect;
1900 /* If we've already touched this file, do nothing. */
1901 if (!objfile || objfile_data (objfile, spu_overlay_data) != NULL)
1904 /* Consider only SPU objfiles. */
1905 if (bfd_get_arch (objfile->obfd) != bfd_arch_spu)
1908 /* Check if this objfile has overlays. */
1909 ovly_table = spu_get_overlay_table (objfile);
1913 /* Now go and fiddle with all the LMAs. */
1914 ALL_OBJFILE_OSECTIONS (objfile, osect)
1916 bfd *obfd = objfile->obfd;
1917 asection *bsect = osect->the_bfd_section;
1918 int ndx = osect - objfile->sections;
1920 if (ovly_table[ndx].mapped_ptr == 0)
1921 bfd_section_lma (obfd, bsect) = bfd_section_vma (obfd, bsect);
1923 bfd_section_lma (obfd, bsect) = SPU_OVERLAY_LMA + bsect->filepos;
1928 /* Insert temporary breakpoint on "main" function of newly loaded
1929 SPE context OBJFILE. */
1931 spu_catch_start (struct objfile *objfile)
1933 struct bound_minimal_symbol minsym;
1934 struct compunit_symtab *cust;
1936 struct event_location *location;
1937 struct cleanup *back_to;
1939 /* Do this only if requested by "set spu stop-on-load on". */
1940 if (!spu_stop_on_load_p)
1943 /* Consider only SPU objfiles. */
1944 if (!objfile || bfd_get_arch (objfile->obfd) != bfd_arch_spu)
1947 /* The main objfile is handled differently. */
1948 if (objfile == symfile_objfile)
1951 /* There can be multiple symbols named "main". Search for the
1952 "main" in *this* objfile. */
1953 minsym = lookup_minimal_symbol ("main", NULL, objfile);
1957 /* If we have debugging information, try to use it -- this
1958 will allow us to properly skip the prologue. */
1959 pc = BMSYMBOL_VALUE_ADDRESS (minsym);
1961 = find_pc_sect_compunit_symtab (pc, MSYMBOL_OBJ_SECTION (minsym.objfile,
1965 const struct blockvector *bv = COMPUNIT_BLOCKVECTOR (cust);
1966 struct block *block = BLOCKVECTOR_BLOCK (bv, GLOBAL_BLOCK);
1968 struct symtab_and_line sal;
1970 sym = block_lookup_symbol (block, "main", VAR_DOMAIN);
1973 fixup_symbol_section (sym, objfile);
1974 sal = find_function_start_sal (sym, 1);
1979 /* Use a numerical address for the set_breakpoint command to avoid having
1980 the breakpoint re-set incorrectly. */
1981 location = new_address_location (pc, NULL, 0);
1982 back_to = make_cleanup_delete_event_location (location);
1983 create_breakpoint (get_objfile_arch (objfile), location,
1984 NULL /* cond_string */, -1 /* thread */,
1985 NULL /* extra_string */,
1986 0 /* parse_condition_and_thread */, 1 /* tempflag */,
1987 bp_breakpoint /* type_wanted */,
1988 0 /* ignore_count */,
1989 AUTO_BOOLEAN_FALSE /* pending_break_support */,
1990 &bkpt_breakpoint_ops /* ops */, 0 /* from_tty */,
1991 1 /* enabled */, 0 /* internal */, 0);
1992 do_cleanups (back_to);
1996 /* Look up OBJFILE loaded into FRAME's SPU context. */
1997 static struct objfile *
1998 spu_objfile_from_frame (struct frame_info *frame)
2000 struct gdbarch *gdbarch = get_frame_arch (frame);
2001 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2002 struct objfile *obj;
2004 if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
2009 if (obj->sections != obj->sections_end
2010 && SPUADDR_SPU (obj_section_addr (obj->sections)) == tdep->id)
2017 /* Flush cache for ea pointer access if available. */
2019 flush_ea_cache (void)
2021 struct bound_minimal_symbol msymbol;
2022 struct objfile *obj;
2024 if (!has_stack_frames ())
2027 obj = spu_objfile_from_frame (get_current_frame ());
2031 /* Lookup inferior function __cache_flush. */
2032 msymbol = lookup_minimal_symbol ("__cache_flush", NULL, obj);
2033 if (msymbol.minsym != NULL)
2038 type = objfile_type (obj)->builtin_void;
2039 type = lookup_function_type (type);
2040 type = lookup_pointer_type (type);
2041 addr = BMSYMBOL_VALUE_ADDRESS (msymbol);
2043 call_function_by_hand (value_from_pointer (type, addr), 0, NULL);
2047 /* This handler is called when the inferior has stopped. If it is stopped in
2048 SPU architecture then flush the ea cache if used. */
2050 spu_attach_normal_stop (struct bpstats *bs, int print_frame)
2052 if (!spu_auto_flush_cache_p)
2055 /* Temporarily reset spu_auto_flush_cache_p to avoid recursively
2056 re-entering this function when __cache_flush stops. */
2057 spu_auto_flush_cache_p = 0;
2059 spu_auto_flush_cache_p = 1;
2063 /* "info spu" commands. */
2066 info_spu_event_command (char *args, int from_tty)
2068 struct frame_info *frame = get_selected_frame (NULL);
2069 ULONGEST event_status = 0;
2070 ULONGEST event_mask = 0;
2071 struct cleanup *chain;
2077 if (gdbarch_bfd_arch_info (get_frame_arch (frame))->arch != bfd_arch_spu)
2078 error (_("\"info spu\" is only supported on the SPU architecture."));
2080 id = get_frame_register_unsigned (frame, SPU_ID_REGNUM);
2082 xsnprintf (annex, sizeof annex, "%d/event_status", id);
2083 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
2084 buf, 0, (sizeof (buf) - 1));
2086 error (_("Could not read event_status."));
2088 event_status = strtoulst ((char *) buf, NULL, 16);
2090 xsnprintf (annex, sizeof annex, "%d/event_mask", id);
2091 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
2092 buf, 0, (sizeof (buf) - 1));
2094 error (_("Could not read event_mask."));
2096 event_mask = strtoulst ((char *) buf, NULL, 16);
2098 chain = make_cleanup_ui_out_tuple_begin_end (current_uiout, "SPUInfoEvent");
2100 if (current_uiout->is_mi_like_p ())
2102 current_uiout->field_fmt ("event_status",
2103 "0x%s", phex_nz (event_status, 4));
2104 current_uiout->field_fmt ("event_mask",
2105 "0x%s", phex_nz (event_mask, 4));
2109 printf_filtered (_("Event Status 0x%s\n"), phex (event_status, 4));
2110 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask, 4));
2113 do_cleanups (chain);
2117 info_spu_signal_command (char *args, int from_tty)
2119 struct frame_info *frame = get_selected_frame (NULL);
2120 struct gdbarch *gdbarch = get_frame_arch (frame);
2121 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2122 ULONGEST signal1 = 0;
2123 ULONGEST signal1_type = 0;
2124 int signal1_pending = 0;
2125 ULONGEST signal2 = 0;
2126 ULONGEST signal2_type = 0;
2127 int signal2_pending = 0;
2128 struct cleanup *chain;
2134 if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
2135 error (_("\"info spu\" is only supported on the SPU architecture."));
2137 id = get_frame_register_unsigned (frame, SPU_ID_REGNUM);
2139 xsnprintf (annex, sizeof annex, "%d/signal1", id);
2140 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex, buf, 0, 4);
2142 error (_("Could not read signal1."));
2145 signal1 = extract_unsigned_integer (buf, 4, byte_order);
2146 signal1_pending = 1;
2149 xsnprintf (annex, sizeof annex, "%d/signal1_type", id);
2150 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
2151 buf, 0, (sizeof (buf) - 1));
2153 error (_("Could not read signal1_type."));
2155 signal1_type = strtoulst ((char *) buf, NULL, 16);
2157 xsnprintf (annex, sizeof annex, "%d/signal2", id);
2158 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex, buf, 0, 4);
2160 error (_("Could not read signal2."));
2163 signal2 = extract_unsigned_integer (buf, 4, byte_order);
2164 signal2_pending = 1;
2167 xsnprintf (annex, sizeof annex, "%d/signal2_type", id);
2168 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
2169 buf, 0, (sizeof (buf) - 1));
2171 error (_("Could not read signal2_type."));
2173 signal2_type = strtoulst ((char *) buf, NULL, 16);
2175 chain = make_cleanup_ui_out_tuple_begin_end (current_uiout, "SPUInfoSignal");
2177 if (current_uiout->is_mi_like_p ())
2179 current_uiout->field_int ("signal1_pending", signal1_pending);
2180 current_uiout->field_fmt ("signal1", "0x%s", phex_nz (signal1, 4));
2181 current_uiout->field_int ("signal1_type", signal1_type);
2182 current_uiout->field_int ("signal2_pending", signal2_pending);
2183 current_uiout->field_fmt ("signal2", "0x%s", phex_nz (signal2, 4));
2184 current_uiout->field_int ("signal2_type", signal2_type);
2188 if (signal1_pending)
2189 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1, 4));
2191 printf_filtered (_("Signal 1 not pending "));
2194 printf_filtered (_("(Type Or)\n"));
2196 printf_filtered (_("(Type Overwrite)\n"));
2198 if (signal2_pending)
2199 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2, 4));
2201 printf_filtered (_("Signal 2 not pending "));
2204 printf_filtered (_("(Type Or)\n"));
2206 printf_filtered (_("(Type Overwrite)\n"));
2209 do_cleanups (chain);
2213 info_spu_mailbox_list (gdb_byte *buf, int nr, enum bfd_endian byte_order,
2214 const char *field, const char *msg)
2216 struct cleanup *chain;
2222 chain = make_cleanup_ui_out_table_begin_end (current_uiout, 1, nr, "mbox");
2224 current_uiout->table_header (32, ui_left, field, msg);
2225 current_uiout->table_body ();
2227 for (i = 0; i < nr; i++)
2229 struct cleanup *val_chain;
2231 val_chain = make_cleanup_ui_out_tuple_begin_end (current_uiout, "mbox");
2232 val = extract_unsigned_integer (buf + 4*i, 4, byte_order);
2233 current_uiout->field_fmt (field, "0x%s", phex (val, 4));
2234 do_cleanups (val_chain);
2236 if (!current_uiout->is_mi_like_p ())
2237 printf_filtered ("\n");
2240 do_cleanups (chain);
2244 info_spu_mailbox_command (char *args, int from_tty)
2246 struct frame_info *frame = get_selected_frame (NULL);
2247 struct gdbarch *gdbarch = get_frame_arch (frame);
2248 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2249 struct cleanup *chain;
2255 if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
2256 error (_("\"info spu\" is only supported on the SPU architecture."));
2258 id = get_frame_register_unsigned (frame, SPU_ID_REGNUM);
2260 chain = make_cleanup_ui_out_tuple_begin_end (current_uiout, "SPUInfoMailbox");
2262 xsnprintf (annex, sizeof annex, "%d/mbox_info", id);
2263 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
2264 buf, 0, sizeof buf);
2266 error (_("Could not read mbox_info."));
2268 info_spu_mailbox_list (buf, len / 4, byte_order,
2269 "mbox", "SPU Outbound Mailbox");
2271 xsnprintf (annex, sizeof annex, "%d/ibox_info", id);
2272 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
2273 buf, 0, sizeof buf);
2275 error (_("Could not read ibox_info."));
2277 info_spu_mailbox_list (buf, len / 4, byte_order,
2278 "ibox", "SPU Outbound Interrupt Mailbox");
2280 xsnprintf (annex, sizeof annex, "%d/wbox_info", id);
2281 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
2282 buf, 0, sizeof buf);
2284 error (_("Could not read wbox_info."));
2286 info_spu_mailbox_list (buf, len / 4, byte_order,
2287 "wbox", "SPU Inbound Mailbox");
2289 do_cleanups (chain);
2293 spu_mfc_get_bitfield (ULONGEST word, int first, int last)
2295 ULONGEST mask = ~(~(ULONGEST)0 << (last - first + 1));
2296 return (word >> (63 - last)) & mask;
2300 info_spu_dma_cmdlist (gdb_byte *buf, int nr, enum bfd_endian byte_order)
2302 static char *spu_mfc_opcode[256] =
2304 /* 00 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2305 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2306 /* 10 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2307 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2308 /* 20 */ "put", "putb", "putf", NULL, "putl", "putlb", "putlf", NULL,
2309 "puts", "putbs", "putfs", NULL, NULL, NULL, NULL, NULL,
2310 /* 30 */ "putr", "putrb", "putrf", NULL, "putrl", "putrlb", "putrlf", NULL,
2311 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2312 /* 40 */ "get", "getb", "getf", NULL, "getl", "getlb", "getlf", NULL,
2313 "gets", "getbs", "getfs", NULL, NULL, NULL, NULL, NULL,
2314 /* 50 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2315 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2316 /* 60 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2317 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2318 /* 70 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2319 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2320 /* 80 */ "sdcrt", "sdcrtst", NULL, NULL, NULL, NULL, NULL, NULL,
2321 NULL, "sdcrz", NULL, NULL, NULL, "sdcrst", NULL, "sdcrf",
2322 /* 90 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2323 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2324 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL, NULL, NULL, NULL, NULL,
2325 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2326 /* b0 */ "putlluc", NULL, NULL, NULL, "putllc", NULL, NULL, NULL,
2327 "putqlluc", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2328 /* c0 */ "barrier", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2329 "mfceieio", NULL, NULL, NULL, "mfcsync", NULL, NULL, NULL,
2330 /* d0 */ "getllar", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2331 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2332 /* e0 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2333 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2334 /* f0 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2335 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2338 int *seq = XALLOCAVEC (int, nr);
2340 struct cleanup *chain;
2344 /* Determine sequence in which to display (valid) entries. */
2345 for (i = 0; i < nr; i++)
2347 /* Search for the first valid entry all of whose
2348 dependencies are met. */
2349 for (j = 0; j < nr; j++)
2351 ULONGEST mfc_cq_dw3;
2352 ULONGEST dependencies;
2354 if (done & (1 << (nr - 1 - j)))
2358 = extract_unsigned_integer (buf + 32*j + 24,8, byte_order);
2359 if (!spu_mfc_get_bitfield (mfc_cq_dw3, 16, 16))
2362 dependencies = spu_mfc_get_bitfield (mfc_cq_dw3, 0, nr - 1);
2363 if ((dependencies & done) != dependencies)
2367 done |= 1 << (nr - 1 - j);
2378 chain = make_cleanup_ui_out_table_begin_end (current_uiout, 10, nr,
2381 current_uiout->table_header (7, ui_left, "opcode", "Opcode");
2382 current_uiout->table_header (3, ui_left, "tag", "Tag");
2383 current_uiout->table_header (3, ui_left, "tid", "TId");
2384 current_uiout->table_header (3, ui_left, "rid", "RId");
2385 current_uiout->table_header (18, ui_left, "ea", "EA");
2386 current_uiout->table_header (7, ui_left, "lsa", "LSA");
2387 current_uiout->table_header (7, ui_left, "size", "Size");
2388 current_uiout->table_header (7, ui_left, "lstaddr", "LstAddr");
2389 current_uiout->table_header (7, ui_left, "lstsize", "LstSize");
2390 current_uiout->table_header (1, ui_left, "error_p", "E");
2392 current_uiout->table_body ();
2394 for (i = 0; i < nr; i++)
2396 struct cleanup *cmd_chain;
2397 ULONGEST mfc_cq_dw0;
2398 ULONGEST mfc_cq_dw1;
2399 ULONGEST mfc_cq_dw2;
2400 int mfc_cmd_opcode, mfc_cmd_tag, rclass_id, tclass_id;
2401 int list_lsa, list_size, mfc_lsa, mfc_size;
2403 int list_valid_p, qw_valid_p, ea_valid_p, cmd_error_p;
2405 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
2406 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
2409 = extract_unsigned_integer (buf + 32*seq[i], 8, byte_order);
2411 = extract_unsigned_integer (buf + 32*seq[i] + 8, 8, byte_order);
2413 = extract_unsigned_integer (buf + 32*seq[i] + 16, 8, byte_order);
2415 list_lsa = spu_mfc_get_bitfield (mfc_cq_dw0, 0, 14);
2416 list_size = spu_mfc_get_bitfield (mfc_cq_dw0, 15, 26);
2417 mfc_cmd_opcode = spu_mfc_get_bitfield (mfc_cq_dw0, 27, 34);
2418 mfc_cmd_tag = spu_mfc_get_bitfield (mfc_cq_dw0, 35, 39);
2419 list_valid_p = spu_mfc_get_bitfield (mfc_cq_dw0, 40, 40);
2420 rclass_id = spu_mfc_get_bitfield (mfc_cq_dw0, 41, 43);
2421 tclass_id = spu_mfc_get_bitfield (mfc_cq_dw0, 44, 46);
2423 mfc_ea = spu_mfc_get_bitfield (mfc_cq_dw1, 0, 51) << 12
2424 | spu_mfc_get_bitfield (mfc_cq_dw2, 25, 36);
2426 mfc_lsa = spu_mfc_get_bitfield (mfc_cq_dw2, 0, 13);
2427 mfc_size = spu_mfc_get_bitfield (mfc_cq_dw2, 14, 24);
2428 qw_valid_p = spu_mfc_get_bitfield (mfc_cq_dw2, 38, 38);
2429 ea_valid_p = spu_mfc_get_bitfield (mfc_cq_dw2, 39, 39);
2430 cmd_error_p = spu_mfc_get_bitfield (mfc_cq_dw2, 40, 40);
2432 cmd_chain = make_cleanup_ui_out_tuple_begin_end (current_uiout, "cmd");
2434 if (spu_mfc_opcode[mfc_cmd_opcode])
2435 current_uiout->field_string ("opcode", spu_mfc_opcode[mfc_cmd_opcode]);
2437 current_uiout->field_int ("opcode", mfc_cmd_opcode);
2439 current_uiout->field_int ("tag", mfc_cmd_tag);
2440 current_uiout->field_int ("tid", tclass_id);
2441 current_uiout->field_int ("rid", rclass_id);
2444 current_uiout->field_fmt ("ea", "0x%s", phex (mfc_ea, 8));
2446 current_uiout->field_skip ("ea");
2448 current_uiout->field_fmt ("lsa", "0x%05x", mfc_lsa << 4);
2450 current_uiout->field_fmt ("size", "0x%05x", mfc_size << 4);
2452 current_uiout->field_fmt ("size", "0x%05x", mfc_size);
2456 current_uiout->field_fmt ("lstaddr", "0x%05x", list_lsa << 3);
2457 current_uiout->field_fmt ("lstsize", "0x%05x", list_size << 3);
2461 current_uiout->field_skip ("lstaddr");
2462 current_uiout->field_skip ("lstsize");
2466 current_uiout->field_string ("error_p", "*");
2468 current_uiout->field_skip ("error_p");
2470 do_cleanups (cmd_chain);
2472 if (!current_uiout->is_mi_like_p ())
2473 printf_filtered ("\n");
2476 do_cleanups (chain);
2480 info_spu_dma_command (char *args, int from_tty)
2482 struct frame_info *frame = get_selected_frame (NULL);
2483 struct gdbarch *gdbarch = get_frame_arch (frame);
2484 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2485 ULONGEST dma_info_type;
2486 ULONGEST dma_info_mask;
2487 ULONGEST dma_info_status;
2488 ULONGEST dma_info_stall_and_notify;
2489 ULONGEST dma_info_atomic_command_status;
2490 struct cleanup *chain;
2496 if (gdbarch_bfd_arch_info (get_frame_arch (frame))->arch != bfd_arch_spu)
2497 error (_("\"info spu\" is only supported on the SPU architecture."));
2499 id = get_frame_register_unsigned (frame, SPU_ID_REGNUM);
2501 xsnprintf (annex, sizeof annex, "%d/dma_info", id);
2502 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
2503 buf, 0, 40 + 16 * 32);
2505 error (_("Could not read dma_info."));
2508 = extract_unsigned_integer (buf, 8, byte_order);
2510 = extract_unsigned_integer (buf + 8, 8, byte_order);
2512 = extract_unsigned_integer (buf + 16, 8, byte_order);
2513 dma_info_stall_and_notify
2514 = extract_unsigned_integer (buf + 24, 8, byte_order);
2515 dma_info_atomic_command_status
2516 = extract_unsigned_integer (buf + 32, 8, byte_order);
2518 chain = make_cleanup_ui_out_tuple_begin_end (current_uiout, "SPUInfoDMA");
2520 if (current_uiout->is_mi_like_p ())
2522 current_uiout->field_fmt ("dma_info_type", "0x%s",
2523 phex_nz (dma_info_type, 4));
2524 current_uiout->field_fmt ("dma_info_mask", "0x%s",
2525 phex_nz (dma_info_mask, 4));
2526 current_uiout->field_fmt ("dma_info_status", "0x%s",
2527 phex_nz (dma_info_status, 4));
2528 current_uiout->field_fmt ("dma_info_stall_and_notify", "0x%s",
2529 phex_nz (dma_info_stall_and_notify, 4));
2530 current_uiout->field_fmt ("dma_info_atomic_command_status", "0x%s",
2531 phex_nz (dma_info_atomic_command_status, 4));
2535 const char *query_msg = _("no query pending");
2537 if (dma_info_type & 4)
2538 switch (dma_info_type & 3)
2540 case 1: query_msg = _("'any' query pending"); break;
2541 case 2: query_msg = _("'all' query pending"); break;
2542 default: query_msg = _("undefined query type"); break;
2545 printf_filtered (_("Tag-Group Status 0x%s\n"),
2546 phex (dma_info_status, 4));
2547 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2548 phex (dma_info_mask, 4), query_msg);
2549 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2550 phex (dma_info_stall_and_notify, 4));
2551 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2552 phex (dma_info_atomic_command_status, 4));
2553 printf_filtered ("\n");
2556 info_spu_dma_cmdlist (buf + 40, 16, byte_order);
2557 do_cleanups (chain);
2561 info_spu_proxydma_command (char *args, int from_tty)
2563 struct frame_info *frame = get_selected_frame (NULL);
2564 struct gdbarch *gdbarch = get_frame_arch (frame);
2565 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2566 ULONGEST dma_info_type;
2567 ULONGEST dma_info_mask;
2568 ULONGEST dma_info_status;
2569 struct cleanup *chain;
2575 if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
2576 error (_("\"info spu\" is only supported on the SPU architecture."));
2578 id = get_frame_register_unsigned (frame, SPU_ID_REGNUM);
2580 xsnprintf (annex, sizeof annex, "%d/proxydma_info", id);
2581 len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
2582 buf, 0, 24 + 8 * 32);
2584 error (_("Could not read proxydma_info."));
2586 dma_info_type = extract_unsigned_integer (buf, 8, byte_order);
2587 dma_info_mask = extract_unsigned_integer (buf + 8, 8, byte_order);
2588 dma_info_status = extract_unsigned_integer (buf + 16, 8, byte_order);
2590 chain = make_cleanup_ui_out_tuple_begin_end (current_uiout,
2593 if (current_uiout->is_mi_like_p ())
2595 current_uiout->field_fmt ("proxydma_info_type", "0x%s",
2596 phex_nz (dma_info_type, 4));
2597 current_uiout->field_fmt ("proxydma_info_mask", "0x%s",
2598 phex_nz (dma_info_mask, 4));
2599 current_uiout->field_fmt ("proxydma_info_status", "0x%s",
2600 phex_nz (dma_info_status, 4));
2604 const char *query_msg;
2606 switch (dma_info_type & 3)
2608 case 0: query_msg = _("no query pending"); break;
2609 case 1: query_msg = _("'any' query pending"); break;
2610 case 2: query_msg = _("'all' query pending"); break;
2611 default: query_msg = _("undefined query type"); break;
2614 printf_filtered (_("Tag-Group Status 0x%s\n"),
2615 phex (dma_info_status, 4));
2616 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2617 phex (dma_info_mask, 4), query_msg);
2618 printf_filtered ("\n");
2621 info_spu_dma_cmdlist (buf + 24, 8, byte_order);
2622 do_cleanups (chain);
2626 info_spu_command (char *args, int from_tty)
2628 printf_unfiltered (_("\"info spu\" must be followed by "
2629 "the name of an SPU facility.\n"));
2630 help_list (infospucmdlist, "info spu ", all_commands, gdb_stdout);
2634 /* Root of all "set spu "/"show spu " commands. */
2637 show_spu_command (char *args, int from_tty)
2639 help_list (showspucmdlist, "show spu ", all_commands, gdb_stdout);
2643 set_spu_command (char *args, int from_tty)
2645 help_list (setspucmdlist, "set spu ", all_commands, gdb_stdout);
2649 show_spu_stop_on_load (struct ui_file *file, int from_tty,
2650 struct cmd_list_element *c, const char *value)
2652 fprintf_filtered (file, _("Stopping for new SPE threads is %s.\n"),
2657 show_spu_auto_flush_cache (struct ui_file *file, int from_tty,
2658 struct cmd_list_element *c, const char *value)
2660 fprintf_filtered (file, _("Automatic software-cache flush is %s.\n"),
2665 /* Set up gdbarch struct. */
2667 static struct gdbarch *
2668 spu_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2670 struct gdbarch *gdbarch;
2671 struct gdbarch_tdep *tdep;
2674 /* Which spufs ID was requested as address space? */
2676 id = *(int *)info.tdep_info;
2677 /* For objfile architectures of SPU solibs, decode the ID from the name.
2678 This assumes the filename convention employed by solib-spu.c. */
2681 const char *name = strrchr (info.abfd->filename, '@');
2683 sscanf (name, "@0x%*x <%d>", &id);
2686 /* Find a candidate among extant architectures. */
2687 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2689 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2691 tdep = gdbarch_tdep (arches->gdbarch);
2692 if (tdep && tdep->id == id)
2693 return arches->gdbarch;
2696 /* None found, so create a new architecture. */
2697 tdep = XCNEW (struct gdbarch_tdep);
2699 gdbarch = gdbarch_alloc (&info, tdep);
2702 set_gdbarch_print_insn (gdbarch, gdb_print_insn_spu);
2705 set_gdbarch_num_regs (gdbarch, SPU_NUM_REGS);
2706 set_gdbarch_num_pseudo_regs (gdbarch, SPU_NUM_PSEUDO_REGS);
2707 set_gdbarch_sp_regnum (gdbarch, SPU_SP_REGNUM);
2708 set_gdbarch_pc_regnum (gdbarch, SPU_PC_REGNUM);
2709 set_gdbarch_read_pc (gdbarch, spu_read_pc);
2710 set_gdbarch_write_pc (gdbarch, spu_write_pc);
2711 set_gdbarch_register_name (gdbarch, spu_register_name);
2712 set_gdbarch_register_type (gdbarch, spu_register_type);
2713 set_gdbarch_pseudo_register_read (gdbarch, spu_pseudo_register_read);
2714 set_gdbarch_pseudo_register_write (gdbarch, spu_pseudo_register_write);
2715 set_gdbarch_value_from_register (gdbarch, spu_value_from_register);
2716 set_gdbarch_register_reggroup_p (gdbarch, spu_register_reggroup_p);
2717 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, spu_dwarf_reg_to_regnum);
2718 set_gdbarch_ax_pseudo_register_collect
2719 (gdbarch, spu_ax_pseudo_register_collect);
2720 set_gdbarch_ax_pseudo_register_push_stack
2721 (gdbarch, spu_ax_pseudo_register_push_stack);
2724 set_gdbarch_char_signed (gdbarch, 0);
2725 set_gdbarch_ptr_bit (gdbarch, 32);
2726 set_gdbarch_addr_bit (gdbarch, 32);
2727 set_gdbarch_short_bit (gdbarch, 16);
2728 set_gdbarch_int_bit (gdbarch, 32);
2729 set_gdbarch_long_bit (gdbarch, 32);
2730 set_gdbarch_long_long_bit (gdbarch, 64);
2731 set_gdbarch_float_bit (gdbarch, 32);
2732 set_gdbarch_double_bit (gdbarch, 64);
2733 set_gdbarch_long_double_bit (gdbarch, 64);
2734 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
2735 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
2736 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
2738 /* Address handling. */
2739 set_gdbarch_address_to_pointer (gdbarch, spu_address_to_pointer);
2740 set_gdbarch_pointer_to_address (gdbarch, spu_pointer_to_address);
2741 set_gdbarch_integer_to_address (gdbarch, spu_integer_to_address);
2742 set_gdbarch_address_class_type_flags (gdbarch, spu_address_class_type_flags);
2743 set_gdbarch_address_class_type_flags_to_name
2744 (gdbarch, spu_address_class_type_flags_to_name);
2745 set_gdbarch_address_class_name_to_type_flags
2746 (gdbarch, spu_address_class_name_to_type_flags);
2749 /* Inferior function calls. */
2750 set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
2751 set_gdbarch_frame_align (gdbarch, spu_frame_align);
2752 set_gdbarch_frame_red_zone_size (gdbarch, 2000);
2753 set_gdbarch_push_dummy_code (gdbarch, spu_push_dummy_code);
2754 set_gdbarch_push_dummy_call (gdbarch, spu_push_dummy_call);
2755 set_gdbarch_dummy_id (gdbarch, spu_dummy_id);
2756 set_gdbarch_return_value (gdbarch, spu_return_value);
2758 /* Frame handling. */
2759 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2760 dwarf2_append_unwinders (gdbarch);
2761 frame_unwind_append_unwinder (gdbarch, &spu_frame_unwind);
2762 frame_base_set_default (gdbarch, &spu_frame_base);
2763 set_gdbarch_unwind_pc (gdbarch, spu_unwind_pc);
2764 set_gdbarch_unwind_sp (gdbarch, spu_unwind_sp);
2765 set_gdbarch_virtual_frame_pointer (gdbarch, spu_virtual_frame_pointer);
2766 set_gdbarch_frame_args_skip (gdbarch, 0);
2767 set_gdbarch_skip_prologue (gdbarch, spu_skip_prologue);
2768 set_gdbarch_stack_frame_destroyed_p (gdbarch, spu_stack_frame_destroyed_p);
2770 /* Cell/B.E. cross-architecture unwinder support. */
2771 frame_unwind_prepend_unwinder (gdbarch, &spu2ppu_unwind);
2774 set_gdbarch_decr_pc_after_break (gdbarch, 4);
2775 set_gdbarch_breakpoint_kind_from_pc (gdbarch, spu_breakpoint::kind_from_pc);
2776 set_gdbarch_sw_breakpoint_from_kind (gdbarch, spu_breakpoint::bp_from_kind);
2777 set_gdbarch_memory_remove_breakpoint (gdbarch, spu_memory_remove_breakpoint);
2778 set_gdbarch_software_single_step (gdbarch, spu_software_single_step);
2779 set_gdbarch_get_longjmp_target (gdbarch, spu_get_longjmp_target);
2782 set_gdbarch_overlay_update (gdbarch, spu_overlay_update);
2787 /* Provide a prototype to silence -Wmissing-prototypes. */
2788 extern initialize_file_ftype _initialize_spu_tdep;
2791 _initialize_spu_tdep (void)
2793 register_gdbarch_init (bfd_arch_spu, spu_gdbarch_init);
2795 /* Add ourselves to objfile event chain. */
2796 observer_attach_new_objfile (spu_overlay_new_objfile);
2797 spu_overlay_data = register_objfile_data ();
2799 /* Install spu stop-on-load handler. */
2800 observer_attach_new_objfile (spu_catch_start);
2802 /* Add ourselves to normal_stop event chain. */
2803 observer_attach_normal_stop (spu_attach_normal_stop);
2805 /* Add root prefix command for all "set spu"/"show spu" commands. */
2806 add_prefix_cmd ("spu", no_class, set_spu_command,
2807 _("Various SPU specific commands."),
2808 &setspucmdlist, "set spu ", 0, &setlist);
2809 add_prefix_cmd ("spu", no_class, show_spu_command,
2810 _("Various SPU specific commands."),
2811 &showspucmdlist, "show spu ", 0, &showlist);
2813 /* Toggle whether or not to add a temporary breakpoint at the "main"
2814 function of new SPE contexts. */
2815 add_setshow_boolean_cmd ("stop-on-load", class_support,
2816 &spu_stop_on_load_p, _("\
2817 Set whether to stop for new SPE threads."),
2819 Show whether to stop for new SPE threads."),
2821 Use \"on\" to give control to the user when a new SPE thread\n\
2822 enters its \"main\" function.\n\
2823 Use \"off\" to disable stopping for new SPE threads."),
2825 show_spu_stop_on_load,
2826 &setspucmdlist, &showspucmdlist);
2828 /* Toggle whether or not to automatically flush the software-managed
2829 cache whenever SPE execution stops. */
2830 add_setshow_boolean_cmd ("auto-flush-cache", class_support,
2831 &spu_auto_flush_cache_p, _("\
2832 Set whether to automatically flush the software-managed cache."),
2834 Show whether to automatically flush the software-managed cache."),
2836 Use \"on\" to automatically flush the software-managed cache\n\
2837 whenever SPE execution stops.\n\
2838 Use \"off\" to never automatically flush the software-managed cache."),
2840 show_spu_auto_flush_cache,
2841 &setspucmdlist, &showspucmdlist);
2843 /* Add root prefix command for all "info spu" commands. */
2844 add_prefix_cmd ("spu", class_info, info_spu_command,
2845 _("Various SPU specific commands."),
2846 &infospucmdlist, "info spu ", 0, &infolist);
2848 /* Add various "info spu" commands. */
2849 add_cmd ("event", class_info, info_spu_event_command,
2850 _("Display SPU event facility status.\n"),
2852 add_cmd ("signal", class_info, info_spu_signal_command,
2853 _("Display SPU signal notification facility status.\n"),
2855 add_cmd ("mailbox", class_info, info_spu_mailbox_command,
2856 _("Display SPU mailbox facility status.\n"),
2858 add_cmd ("dma", class_info, info_spu_dma_command,
2859 _("Display MFC DMA status.\n"),
2861 add_cmd ("proxydma", class_info, info_spu_proxydma_command,
2862 _("Display MFC Proxy-DMA status.\n"),