1 /* Target-dependent code for SPARC.
3 Copyright 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 #include "arch-utils.h"
25 #include "floatformat.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
39 #include "gdb_assert.h"
40 #include "gdb_string.h"
42 #include "sparc-tdep.h"
44 /* This file implements the The SPARC 32-bit ABI as defined by the
45 section "Low-Level System Information" of the SPARC Compliance
46 Definition (SCD) 2.4.1, which is the 32-bit System V psABI for
47 SPARC. The SCD lists changes with respect to the origional 32-bit
48 psABI as defined in the "System V ABI, SPARC Processor
51 Note that if we talk about SunOS, we mean SunOS 4.x, which was
52 BSD-based, which is sometimes (retroactively?) referred to as
53 Solaris 1.x. If we talk about Solaris we mean Solaris 2.x and
54 above (Solaris 7, 8 and 9 are nothing but Solaris 2.7, 2.8 and 2.9
55 suffering from severe version number inflation). Solaris 2.x is
56 also known as SunOS 5.x, since that's what uname(1) says. Solaris
59 /* Please use the sparc32_-prefix for 32-bit specific code, the
60 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
61 code that can handle both. The 64-bit specific code lives in
62 sparc64-tdep.c; don't add any here. */
64 /* The SPARC Floating-Point Quad-Precision format is similar to
65 big-endian IA-64 Quad-recision format. */
66 #define floatformat_sparc_quad floatformat_ia64_quad_big
68 /* The stack pointer is offset from the stack frame by a BIAS of 2047
69 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
70 hosts, so undefine it first. */
74 /* Macros to extract fields from SPARC instructions. */
75 #define X_OP(i) (((i) >> 30) & 0x3)
76 #define X_RD(i) (((i) >> 25) & 0x1f)
77 #define X_A(i) (((i) >> 29) & 1)
78 #define X_COND(i) (((i) >> 25) & 0xf)
79 #define X_OP2(i) (((i) >> 22) & 0x7)
80 #define X_IMM22(i) ((i) & 0x3fffff)
81 #define X_OP3(i) (((i) >> 19) & 0x3f)
82 #define X_I(i) (((i) >> 13) & 1)
83 /* Sign extension macros. */
84 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
85 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
87 /* Fetch the instruction at PC. Instructions are always big-endian
88 even if the processor operates in little-endian mode. */
91 sparc_fetch_instruction (CORE_ADDR pc)
97 read_memory (pc, buf, sizeof (buf));
100 for (i = 0; i < sizeof (buf); i++)
101 insn = (insn << 8) | buf[i];
105 /* Return the contents if register REGNUM as an address. */
108 sparc_address_from_register (int regnum)
112 regcache_cooked_read_unsigned (current_regcache, regnum, &addr);
117 /* The functions on this page are intended to be used to classify
118 function arguments. */
120 /* Check whether TYPE is "Integral or Pointer". */
123 sparc_integral_or_pointer_p (const struct type *type)
125 switch (TYPE_CODE (type))
131 case TYPE_CODE_RANGE:
133 /* We have byte, half-word, word and extended-word/doubleword
134 integral types. The doubleword is an extension to the
135 origional 32-bit ABI by the SCD 2.4.x. */
136 int len = TYPE_LENGTH (type);
137 return (len == 1 || len == 2 || len == 4 || len == 8);
143 /* Allow either 32-bit or 64-bit pointers. */
144 int len = TYPE_LENGTH (type);
145 return (len == 4 || len == 8);
155 /* Check whether TYPE is "Floating". */
158 sparc_floating_p (const struct type *type)
160 switch (TYPE_CODE (type))
164 int len = TYPE_LENGTH (type);
165 return (len == 4 || len == 8 || len == 16);
174 /* Check whether TYPE is "Structure or Union". */
177 sparc_structure_or_union_p (const struct type *type)
179 switch (TYPE_CODE (type))
181 case TYPE_CODE_STRUCT:
182 case TYPE_CODE_UNION:
191 /* Register information. */
193 static const char *sparc32_register_names[] =
195 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
196 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
197 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
198 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
200 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
201 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
202 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
203 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
205 "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
208 /* Total number of registers. */
209 #define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
211 /* We provide the aliases %d0..%d30 for the floating registers as
212 "psuedo" registers. */
214 static const char *sparc32_pseudo_register_names[] =
216 "d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
217 "d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30"
220 /* Total number of pseudo registers. */
221 #define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names)
223 /* Return the name of register REGNUM. */
226 sparc32_register_name (int regnum)
228 if (regnum >= 0 && regnum < SPARC32_NUM_REGS)
229 return sparc32_register_names[regnum];
231 if (regnum < SPARC32_NUM_REGS + SPARC32_NUM_PSEUDO_REGS)
232 return sparc32_pseudo_register_names[regnum - SPARC32_NUM_REGS];
237 /* Return the GDB type object for the "standard" data type of data in
241 sparc32_register_type (struct gdbarch *gdbarch, int regnum)
243 if (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F31_REGNUM)
244 return builtin_type_float;
246 if (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM)
247 return builtin_type_double;
249 if (regnum == SPARC_SP_REGNUM || regnum == SPARC_FP_REGNUM)
250 return builtin_type_void_data_ptr;
252 if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM)
253 return builtin_type_void_func_ptr;
255 return builtin_type_int32;
259 sparc32_pseudo_register_read (struct gdbarch *gdbarch,
260 struct regcache *regcache,
261 int regnum, void *buf)
263 gdb_assert (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM);
265 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC32_D0_REGNUM);
266 regcache_raw_read (regcache, regnum, buf);
267 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
271 sparc32_pseudo_register_write (struct gdbarch *gdbarch,
272 struct regcache *regcache,
273 int regnum, const void *buf)
275 gdb_assert (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM);
277 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC32_D0_REGNUM);
278 regcache_raw_write (regcache, regnum, buf);
279 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
284 sparc32_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
285 CORE_ADDR funcaddr, int using_gcc,
286 struct value **args, int nargs,
287 struct type *value_type,
288 CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
293 if (using_struct_return (value_type, using_gcc))
297 /* This is an UNIMP instruction. */
298 store_unsigned_integer (buf, 4, TYPE_LENGTH (value_type) & 0x1fff);
299 write_memory (sp - 8, buf, 4);
307 sparc32_store_arguments (struct regcache *regcache, int nargs,
308 struct value **args, CORE_ADDR sp,
309 int struct_return, CORE_ADDR struct_addr)
311 /* Number of words in the "parameter array". */
312 int num_elements = 0;
316 for (i = 0; i < nargs; i++)
318 struct type *type = VALUE_TYPE (args[i]);
319 int len = TYPE_LENGTH (type);
321 if (sparc_structure_or_union_p (type)
322 || (sparc_floating_p (type) && len == 16))
324 /* Structure, Union and Quad-Precision Arguments. */
327 /* Use doubleword alignment for these values. That's always
328 correct, and wasting a few bytes shouldn't be a problem. */
331 write_memory (sp, VALUE_CONTENTS (args[i]), len);
332 args[i] = value_from_pointer (lookup_pointer_type (type), sp);
335 else if (sparc_floating_p (type))
337 /* Floating arguments. */
338 gdb_assert (len == 4 || len == 8);
339 num_elements += (len / 4);
343 /* Integral and pointer arguments. */
344 gdb_assert (sparc_integral_or_pointer_p (type));
347 args[i] = value_cast (builtin_type_int32, args[i]);
348 num_elements += ((len + 3) / 4);
352 /* Always allocate at least six words. */
353 sp -= max (6, num_elements) * 4;
355 /* The psABI says that "Software convention requires space for the
356 struct/union return value pointer, even if the word is unused." */
359 /* The psABI says that "Although software convention and the
360 operating system require every stack frame to be doubleword
364 for (i = 0; i < nargs; i++)
366 char *valbuf = VALUE_CONTENTS (args[i]);
367 struct type *type = VALUE_TYPE (args[i]);
368 int len = TYPE_LENGTH (type);
370 gdb_assert (len == 4 || len == 8);
374 int regnum = SPARC_O0_REGNUM + element;
376 regcache_cooked_write (regcache, regnum, valbuf);
377 if (len > 4 && element < 5)
378 regcache_cooked_write (regcache, regnum + 1, valbuf + 4);
381 /* Always store the argument in memory. */
382 write_memory (sp + 4 + element * 4, valbuf, len);
386 gdb_assert (element == num_elements);
392 store_unsigned_integer (buf, 4, struct_addr);
393 write_memory (sp, buf, 4);
400 sparc32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
401 struct regcache *regcache, CORE_ADDR bp_addr,
402 int nargs, struct value **args, CORE_ADDR sp,
403 int struct_return, CORE_ADDR struct_addr)
405 CORE_ADDR call_pc = (struct_return ? (bp_addr - 12) : (bp_addr - 8));
407 /* Set return address. */
408 regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, call_pc);
410 /* Set up function arguments. */
411 sp = sparc32_store_arguments (regcache, nargs, args, sp,
412 struct_return, struct_addr);
414 /* Allocate the 16-word window save area. */
417 /* Stack should be doubleword aligned at this point. */
418 gdb_assert (sp % 8 == 0);
420 /* Finally, update the stack pointer. */
421 regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
427 /* Use the program counter to determine the contents and size of a
428 breakpoint instruction. Return a pointer to a string of bytes that
429 encode a breakpoint instruction, store the length of the string in
430 *LEN and optionally adjust *PC to point to the correct memory
431 location for inserting the breakpoint. */
433 static const unsigned char *
434 sparc_breakpoint_from_pc (CORE_ADDR *pc, int *len)
436 static unsigned char break_insn[] = { 0x91, 0xd0, 0x20, 0x01 };
438 *len = sizeof (break_insn);
443 /* Allocate and initialize a frame cache. */
445 static struct sparc_frame_cache *
446 sparc_alloc_frame_cache (void)
448 struct sparc_frame_cache *cache;
451 cache = FRAME_OBSTACK_ZALLOC (struct sparc_frame_cache);
457 /* Frameless until proven otherwise. */
458 cache->frameless_p = 1;
460 cache->struct_return_p = 0;
466 sparc_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
467 struct sparc_frame_cache *cache)
469 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
474 if (current_pc <= pc)
477 /* We have to handle to "Procedure Linkage Table" (PLT) special. On
478 SPARC the linker usually defines a symbol (typically
479 _PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
480 This symbol makes us end up here with PC pointing at the start of
481 the PLT and CURRENT_PC probably pointing at a PLT entry. If we
482 would do our normal prologue analysis, we would probably conclude
483 that we've got a frame when in reality we don't, since the
484 dynamic linker patches up the first PLT with some code that
485 starts with a SAVE instruction. Patch up PC such that it points
486 at the start of our PLT entry. */
487 if (tdep->plt_entry_size > 0 && in_plt_section (current_pc, NULL))
488 pc = current_pc - ((current_pc - pc) % tdep->plt_entry_size);
490 insn = sparc_fetch_instruction (pc);
492 /* Recognize a SETHI insn and record its destination. */
493 if (X_OP (insn) == 0 && X_OP2 (insn) == 0x04)
498 insn = sparc_fetch_instruction (pc + 4);
501 /* Allow for an arithmetic operation on DEST or %g1. */
502 if (X_OP (insn) == 2 && X_I (insn)
503 && (X_RD (insn) == 1 || X_RD (insn) == dest))
507 insn = sparc_fetch_instruction (pc + 8);
510 /* Check for the SAVE instruction that sets up the frame. */
511 if (X_OP (insn) == 2 && X_OP3 (insn) == 0x3c)
513 cache->frameless_p = 0;
514 return pc + offset + 4;
521 sparc_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
523 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
524 return frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
527 /* Return PC of first real instruction of the function starting at
531 sparc32_skip_prologue (CORE_ADDR start_pc)
533 struct symtab_and_line sal;
534 CORE_ADDR func_start, func_end;
535 struct sparc_frame_cache cache;
537 /* This is the preferred method, find the end of the prologue by
538 using the debugging information. */
539 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
541 sal = find_pc_line (func_start, 0);
543 if (sal.end < func_end
544 && start_pc <= sal.end)
548 return sparc_analyze_prologue (start_pc, 0xffffffffUL, &cache);
553 struct sparc_frame_cache *
554 sparc_frame_cache (struct frame_info *next_frame, void **this_cache)
556 struct sparc_frame_cache *cache;
561 cache = sparc_alloc_frame_cache ();
564 /* In priciple, for normal frames, %fp (%i6) holds the frame
565 pointer, which holds the base address for the current stack
568 cache->base = frame_unwind_register_unsigned (next_frame, SPARC_FP_REGNUM);
569 if (cache->base == 0)
572 cache->pc = frame_func_unwind (next_frame);
575 CORE_ADDR addr_in_block = frame_unwind_address_in_block (next_frame);
576 sparc_analyze_prologue (cache->pc, addr_in_block, cache);
579 if (cache->frameless_p)
581 /* We didn't find a valid frame, which means that CACHE->base
582 currently holds the frame pointer for our calling frame. */
583 cache->base = frame_unwind_register_unsigned (next_frame,
590 struct sparc_frame_cache *
591 sparc32_frame_cache (struct frame_info *next_frame, void **this_cache)
593 struct sparc_frame_cache *cache;
599 cache = sparc_frame_cache (next_frame, this_cache);
601 sym = find_pc_function (cache->pc);
604 struct type *type = check_typedef (SYMBOL_TYPE (sym));
605 enum type_code code = TYPE_CODE (type);
607 if (code == TYPE_CODE_FUNC || code == TYPE_CODE_METHOD)
609 type = check_typedef (TYPE_TARGET_TYPE (type));
610 if (sparc_structure_or_union_p (type)
611 || (sparc_floating_p (type) && TYPE_LENGTH (type) == 16))
612 cache->struct_return_p = 1;
620 sparc32_frame_this_id (struct frame_info *next_frame, void **this_cache,
621 struct frame_id *this_id)
623 struct sparc_frame_cache *cache =
624 sparc32_frame_cache (next_frame, this_cache);
626 /* This marks the outermost frame. */
627 if (cache->base == 0)
630 (*this_id) = frame_id_build (cache->base, cache->pc);
634 sparc32_frame_prev_register (struct frame_info *next_frame, void **this_cache,
635 int regnum, int *optimizedp,
636 enum lval_type *lvalp, CORE_ADDR *addrp,
637 int *realnump, void *valuep)
639 struct sparc_frame_cache *cache =
640 sparc32_frame_cache (next_frame, this_cache);
642 if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM)
650 CORE_ADDR pc = (regnum == SPARC32_NPC_REGNUM) ? 4 : 0;
652 /* If this functions has a Structure, Union or
653 Quad-Precision return value, we have to skip the UNIMP
654 instruction that encodes the size of the structure. */
655 if (cache->struct_return_p)
658 regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
659 pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
660 store_unsigned_integer (valuep, 4, pc);
665 /* The previous frame's `local' and `in' registers have been saved
666 in the register save area. */
667 if (!cache->frameless_p
668 && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
671 *lvalp = lval_memory;
672 *addrp = cache->base + (regnum - SPARC_L0_REGNUM) * 4;
676 struct gdbarch *gdbarch = get_frame_arch (next_frame);
678 /* Read the value in from memory. */
679 read_memory (*addrp, valuep, register_size (gdbarch, regnum));
684 /* The previous frame's `out' registers are accessable as the
685 current frame's `in' registers. */
686 if (!cache->frameless_p
687 && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
688 regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
690 frame_register_unwind (next_frame, regnum,
691 optimizedp, lvalp, addrp, realnump, valuep);
694 static const struct frame_unwind sparc32_frame_unwind =
697 sparc32_frame_this_id,
698 sparc32_frame_prev_register
701 static const struct frame_unwind *
702 sparc32_frame_sniffer (struct frame_info *next_frame)
704 return &sparc32_frame_unwind;
709 sparc32_frame_base_address (struct frame_info *next_frame, void **this_cache)
711 struct sparc_frame_cache *cache =
712 sparc32_frame_cache (next_frame, this_cache);
717 static const struct frame_base sparc32_frame_base =
719 &sparc32_frame_unwind,
720 sparc32_frame_base_address,
721 sparc32_frame_base_address,
722 sparc32_frame_base_address
725 static struct frame_id
726 sparc_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
730 sp = frame_unwind_register_unsigned (next_frame, SPARC_SP_REGNUM);
731 return frame_id_build (sp, frame_pc_unwind (next_frame));
735 /* Extract from an array REGBUF containing the (raw) register state, a
736 function return value of TYPE, and copy that into VALBUF. */
739 sparc32_extract_return_value (struct type *type, struct regcache *regcache,
742 int len = TYPE_LENGTH (type);
745 gdb_assert (!sparc_structure_or_union_p (type));
746 gdb_assert (!(sparc_floating_p (type) && len == 16));
748 if (sparc_floating_p (type))
750 /* Floating return values. */
751 regcache_cooked_read (regcache, SPARC_F0_REGNUM, buf);
753 regcache_cooked_read (regcache, SPARC_F1_REGNUM, buf + 4);
754 memcpy (valbuf, buf, len);
758 /* Integral and pointer return values. */
759 gdb_assert (sparc_integral_or_pointer_p (type));
761 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
764 regcache_cooked_read (regcache, SPARC_O1_REGNUM, buf + 4);
765 gdb_assert (len == 8);
766 memcpy (valbuf, buf, 8);
770 /* Just stripping off any unused bytes should preserve the
771 signed-ness just fine. */
772 memcpy (valbuf, buf + 4 - len, len);
777 /* Write into the appropriate registers a function return value stored
778 in VALBUF of type TYPE. */
781 sparc32_store_return_value (struct type *type, struct regcache *regcache,
784 int len = TYPE_LENGTH (type);
787 gdb_assert (!sparc_structure_or_union_p (type));
788 gdb_assert (!(sparc_floating_p (type) && len == 16));
790 if (sparc_floating_p (type))
792 /* Floating return values. */
793 memcpy (buf, valbuf, len);
794 regcache_cooked_write (regcache, SPARC_F0_REGNUM, buf);
796 regcache_cooked_write (regcache, SPARC_F1_REGNUM, buf + 4);
800 /* Integral and pointer return values. */
801 gdb_assert (sparc_integral_or_pointer_p (type));
805 gdb_assert (len == 8);
806 memcpy (buf, valbuf, 8);
807 regcache_cooked_write (regcache, SPARC_O1_REGNUM, buf + 4);
811 /* ??? Do we need to do any sign-extension here? */
812 memcpy (buf + 4 - len, valbuf, len);
814 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
818 /* Extract from REGCACHE, which contains the (raw) register state, the
819 address in which a function should return its structure value, as a
823 sparc_extract_struct_value_address (struct regcache *regcache)
827 regcache_cooked_read_unsigned (regcache, SPARC_O0_REGNUM, &addr);
832 sparc32_use_struct_convention (int gcc_p, struct type *type)
834 gdb_assert (sparc_structure_or_union_p (type));
839 sparc32_return_value_on_stack (struct type *type)
841 gdb_assert (!sparc_structure_or_union_p (type));
842 return (sparc_floating_p (type) && TYPE_LENGTH (type) == 16);
846 sparc32_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
848 return (sparc_structure_or_union_p (type)
849 || (sparc_floating_p (type) && TYPE_LENGTH (type) == 16));
853 /* The SPARC Architecture doesn't have hardware single-step support,
854 and most operating systems don't implement it either, so we provide
855 software single-step mechanism. */
858 sparc_analyze_control_transfer (CORE_ADDR pc, CORE_ADDR *npc)
860 unsigned long insn = sparc_fetch_instruction (pc);
861 int conditional_p = X_COND (insn) & 0x7;
863 long offset = 0; /* Must be signed for sign-extend. */
865 if (X_OP (insn) == 0 && X_OP2 (insn) == 3 && (insn & 0x1000000) == 0)
867 /* Branch on Integer Register with Prediction (BPr). */
871 else if (X_OP (insn) == 0 && X_OP2 (insn) == 6)
873 /* Branch on Floating-Point Condition Codes (FBfcc). */
875 offset = 4 * X_DISP22 (insn);
877 else if (X_OP (insn) == 0 && X_OP2 (insn) == 5)
879 /* Branch on Floating-Point Condition Codes with Prediction
882 offset = 4 * X_DISP19 (insn);
884 else if (X_OP (insn) == 0 && X_OP2 (insn) == 2)
886 /* Branch on Integer Condition Codes (Bicc). */
888 offset = 4 * X_DISP22 (insn);
890 else if (X_OP (insn) == 0 && X_OP2 (insn) == 1)
892 /* Branch on Integer Condition Codes with Prediction (BPcc). */
894 offset = 4 * X_DISP19 (insn);
897 /* FIXME: Handle DONE and RETRY instructions. */
899 /* FIXME: Handle the Trap instruction. */
905 /* For conditional branches, return nPC + 4 iff the annul
907 return (X_A (insn) ? *npc + 4 : 0);
911 /* For unconditional branches, return the target if its
912 specified condition is "always" and return nPC + 4 if the
913 condition is "never". If the annul bit is 1, set *NPC to
915 if (X_COND (insn) == 0x0)
916 pc = *npc, offset = 4;
920 gdb_assert (offset != 0);
929 sparc_software_single_step (enum target_signal sig, int insert_breakpoints_p)
931 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
932 static CORE_ADDR npc, nnpc;
933 static char npc_save[4], nnpc_save[4];
935 if (insert_breakpoints_p)
939 pc = sparc_address_from_register (tdep->pc_regnum);
940 npc = sparc_address_from_register (tdep->npc_regnum);
942 /* Analyze the instruction at PC. */
943 nnpc = sparc_analyze_control_transfer (pc, &npc);
945 target_insert_breakpoint (npc, npc_save);
947 target_insert_breakpoint (nnpc, nnpc_save);
949 /* Assert that we have set at least one breakpoint, and that
950 they're not set at the same spot. */
951 gdb_assert (npc != 0 || nnpc != 0);
952 gdb_assert (nnpc != npc);
957 target_remove_breakpoint (npc, npc_save);
959 target_remove_breakpoint (nnpc, nnpc_save);
964 sparc_write_pc (CORE_ADDR pc, ptid_t ptid)
966 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
968 write_register_pid (tdep->pc_regnum, pc, ptid);
969 write_register_pid (tdep->npc_regnum, pc + 4, ptid);
972 /* Unglobalize NAME. */
975 sparc_stabs_unglobalize_name (char *name)
977 /* The Sun compilers (Sun ONE Studio, Forte Developer, Sun WorkShop,
978 SunPRO) convert file static variables into global values, a
979 process known as globalization. In order to do this, the
980 compiler will create a unique prefix and prepend it to each file
981 static variable. For static variables within a function, this
982 globalization prefix is followed by the function name (nested
983 static variables within a function are supposed to generate a
984 warning message, and are left alone). The procedure is
985 documented in the Stabs Interface Manual, which is distrubuted
986 with the compilers, although version 4.0 of the manual seems to
987 be incorrect in some places, at least for SPARC. The
988 globalization prefix is encoded into an N_OPT stab, with the form
989 "G=<prefix>". The globalization prefix always seems to start
990 with a dollar sign '$'; a dot '.' is used as a seperator. So we
991 simply strip everything up until the last dot. */
995 char *p = strrchr (name, '.');
1004 static struct gdbarch *
1005 sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1007 struct gdbarch_tdep *tdep;
1008 struct gdbarch *gdbarch;
1010 /* If there is already a candidate, use it. */
1011 arches = gdbarch_list_lookup_by_info (arches, &info);
1013 return arches->gdbarch;
1015 /* Allocate space for the new architecture. */
1016 tdep = XMALLOC (struct gdbarch_tdep);
1017 gdbarch = gdbarch_alloc (&info, tdep);
1019 tdep->pc_regnum = SPARC32_PC_REGNUM;
1020 tdep->npc_regnum = SPARC32_NPC_REGNUM;
1021 tdep->plt_entry_size = 0;
1023 set_gdbarch_long_double_bit (gdbarch, 128);
1024 set_gdbarch_long_double_format (gdbarch, &floatformat_sparc_quad);
1026 set_gdbarch_num_regs (gdbarch, SPARC32_NUM_REGS);
1027 set_gdbarch_register_name (gdbarch, sparc32_register_name);
1028 set_gdbarch_register_type (gdbarch, sparc32_register_type);
1029 set_gdbarch_num_pseudo_regs (gdbarch, SPARC32_NUM_PSEUDO_REGS);
1030 set_gdbarch_pseudo_register_read (gdbarch, sparc32_pseudo_register_read);
1031 set_gdbarch_pseudo_register_write (gdbarch, sparc32_pseudo_register_write);
1033 /* Register numbers of various important registers. */
1034 set_gdbarch_sp_regnum (gdbarch, SPARC_SP_REGNUM); /* %sp */
1035 set_gdbarch_pc_regnum (gdbarch, SPARC32_PC_REGNUM); /* %pc */
1036 set_gdbarch_fp0_regnum (gdbarch, SPARC_F0_REGNUM); /* %f0 */
1038 /* Call dummy code. */
1039 set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
1040 set_gdbarch_push_dummy_code (gdbarch, sparc32_push_dummy_code);
1041 set_gdbarch_push_dummy_call (gdbarch, sparc32_push_dummy_call);
1043 set_gdbarch_extract_return_value (gdbarch, sparc32_extract_return_value);
1044 set_gdbarch_store_return_value (gdbarch, sparc32_store_return_value);
1045 set_gdbarch_extract_struct_value_address
1046 (gdbarch, sparc_extract_struct_value_address);
1047 set_gdbarch_use_struct_convention (gdbarch, sparc32_use_struct_convention);
1048 set_gdbarch_return_value_on_stack (gdbarch, sparc32_return_value_on_stack);
1049 set_gdbarch_stabs_argument_has_addr
1050 (gdbarch, sparc32_stabs_argument_has_addr);
1052 set_gdbarch_skip_prologue (gdbarch, sparc32_skip_prologue);
1054 /* Stack grows downward. */
1055 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1057 set_gdbarch_breakpoint_from_pc (gdbarch, sparc_breakpoint_from_pc);
1058 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1059 set_gdbarch_function_start_offset (gdbarch, 0);
1061 set_gdbarch_frame_args_skip (gdbarch, 8);
1063 set_gdbarch_print_insn (gdbarch, print_insn_sparc);
1065 set_gdbarch_software_single_step (gdbarch, sparc_software_single_step);
1066 set_gdbarch_write_pc (gdbarch, sparc_write_pc);
1068 set_gdbarch_unwind_dummy_id (gdbarch, sparc_unwind_dummy_id);
1070 set_gdbarch_unwind_pc (gdbarch, sparc_unwind_pc);
1072 frame_base_set_default (gdbarch, &sparc32_frame_base);
1074 /* Hook in ABI-specific overrides, if they have been registered. */
1075 gdbarch_init_osabi (info, gdbarch);
1077 frame_unwind_append_sniffer (gdbarch, sparc32_frame_sniffer);
1082 /* Helper functions for dealing with register windows. */
1085 sparc_supply_rwindow (struct regcache *regcache, CORE_ADDR sp, int regnum)
1093 /* Registers are 64-bit. */
1096 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1098 if (regnum == i || regnum == -1)
1100 target_read_memory (sp + ((i - SPARC_L0_REGNUM) * 8), buf, 8);
1101 regcache_raw_supply (regcache, i, buf);
1107 /* Registers are 32-bit. Toss any sign-extension of the stack
1111 /* Clear out the top half of the temporary buffer, and put the
1112 register value in the bottom half if we're in 64-bit mode. */
1113 if (gdbarch_ptr_bit (current_gdbarch) == 64)
1119 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1121 if (regnum == i || regnum == -1)
1123 target_read_memory (sp + ((i - SPARC_L0_REGNUM) * 4),
1125 regcache_raw_supply (regcache, i, buf);
1132 sparc_collect_rwindow (const struct regcache *regcache,
1133 CORE_ADDR sp, int regnum)
1141 /* Registers are 64-bit. */
1144 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1146 if (regnum == -1 || regnum == SPARC_SP_REGNUM || regnum == i)
1148 regcache_raw_collect (regcache, i, buf);
1149 target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 8), buf, 8);
1155 /* Registers are 32-bit. Toss any sign-extension of the stack
1159 /* Only use the bottom half if we're in 64-bit mode. */
1160 if (gdbarch_ptr_bit (current_gdbarch) == 64)
1163 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1165 if (regnum == -1 || regnum == SPARC_SP_REGNUM || regnum == i)
1167 regcache_raw_collect (regcache, i, buf);
1168 target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 4),
1175 /* Helper functions for dealing with register sets. */
1178 sparc32_supply_gregset (const struct sparc_gregset *gregset,
1179 struct regcache *regcache,
1180 int regnum, const void *gregs)
1182 const char *regs = gregs;
1185 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1186 regcache_raw_supply (regcache, SPARC32_PSR_REGNUM,
1187 regs + gregset->r_psr_offset);
1189 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1190 regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
1191 regs + gregset->r_pc_offset);
1193 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1194 regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
1195 regs + gregset->r_npc_offset);
1197 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
1198 regcache_raw_supply (regcache, SPARC32_Y_REGNUM,
1199 regs + gregset->r_y_offset);
1201 if (regnum == SPARC_G0_REGNUM || regnum == -1)
1202 regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
1204 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1206 int offset = gregset->r_g1_offset;
1208 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1210 if (regnum == i || regnum == -1)
1211 regcache_raw_supply (regcache, i, regs + offset);
1216 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1218 /* Not all of the register set variants include Locals and
1219 Inputs. For those that don't, we read them off the stack. */
1220 if (gregset->r_l0_offset == -1)
1224 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
1225 sparc_supply_rwindow (regcache, sp, regnum);
1229 int offset = gregset->r_l0_offset;
1231 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1233 if (regnum == i || regnum == -1)
1234 regcache_raw_supply (regcache, i, regs + offset);
1242 sparc32_collect_gregset (const struct sparc_gregset *gregset,
1243 const struct regcache *regcache,
1244 int regnum, void *gregs)
1249 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1250 regcache_raw_collect (regcache, SPARC32_PSR_REGNUM,
1251 regs + gregset->r_psr_offset);
1253 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1254 regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
1255 regs + gregset->r_pc_offset);
1257 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1258 regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
1259 regs + gregset->r_npc_offset);
1261 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
1262 regcache_raw_collect (regcache, SPARC32_Y_REGNUM,
1263 regs + gregset->r_y_offset);
1265 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1267 int offset = gregset->r_g1_offset;
1269 /* %g0 is always zero. */
1270 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1272 if (regnum == i || regnum == -1)
1273 regcache_raw_collect (regcache, i, regs + offset);
1278 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1280 /* Not all of the register set variants include Locals and
1281 Inputs. For those that don't, we read them off the stack. */
1282 if (gregset->r_l0_offset != -1)
1284 int offset = gregset->r_l0_offset;
1286 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1288 if (regnum == i || regnum == -1)
1289 regcache_raw_collect (regcache, i, regs + offset);
1297 sparc32_supply_fpregset (struct regcache *regcache,
1298 int regnum, const void *fpregs)
1300 const char *regs = fpregs;
1303 for (i = 0; i < 32; i++)
1305 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1306 regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1309 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1310 regcache_raw_supply (regcache, SPARC32_FSR_REGNUM, regs + (32 * 4) + 4);
1314 sparc32_collect_fpregset (const struct regcache *regcache,
1315 int regnum, void *fpregs)
1317 char *regs = fpregs;
1320 for (i = 0; i < 32; i++)
1322 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1323 regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1326 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1327 regcache_raw_collect (regcache, SPARC32_FSR_REGNUM, regs + (32 * 4) + 4);
1333 /* From <machine/reg.h>. */
1334 const struct sparc_gregset sparc32_sunos4_gregset =
1347 /* Provide a prototype to silence -Wmissing-prototypes. */
1348 void _initialize_sparc_tdep (void);
1351 _initialize_sparc_tdep (void)
1353 register_gdbarch_init (bfd_arch_sparc, sparc32_gdbarch_init);