1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
4 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation,
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
27 #include "arch-utils.h"
33 #include "gdb_string.h"
38 #include <sys/procfs.h>
39 /* Prototypes for supply_gregset etc. */
44 #include "gdb_assert.h"
46 #include "symfile.h" /* for 'entry_point_address' */
49 * Some local macros that have multi-arch and non-multi-arch versions:
52 #if (GDB_MULTI_ARCH > 0)
55 // OBSOLETE /* Does the target have Floating Point registers? */
56 // OBSOLETE #define SPARC_HAS_FPU (gdbarch_tdep (current_gdbarch)->has_fpu)
58 #define SPARC_HAS_FPU 1
59 /* Number of bytes devoted to Floating Point registers: */
60 #define FP_REGISTER_BYTES (gdbarch_tdep (current_gdbarch)->fp_register_bytes)
61 /* Highest numbered Floating Point register. */
62 #define FP_MAX_REGNUM (gdbarch_tdep (current_gdbarch)->fp_max_regnum)
63 /* Size of a general (integer) register: */
64 #define SPARC_INTREG_SIZE (gdbarch_tdep (current_gdbarch)->intreg_size)
65 /* Offset within the call dummy stack of the saved registers. */
66 #define DUMMY_REG_SAVE_OFFSET (gdbarch_tdep (current_gdbarch)->reg_save_offset)
68 #else /* non-multi-arch */
71 /* Does the target have Floating Point registers? */
73 // OBSOLETE #if defined(TARGET_SPARCLET) || defined(TARGET_SPARCLITE)
74 // OBSOLETE #define SPARC_HAS_FPU 0
76 // OBSOLETE #define SPARC_HAS_FPU 1
79 #define SPARC_HAS_FPU 1
81 /* Number of bytes devoted to Floating Point registers: */
82 #if (GDB_TARGET_IS_SPARC64)
83 #define FP_REGISTER_BYTES (64 * 4)
86 #define FP_REGISTER_BYTES (32 * 4)
88 #define FP_REGISTER_BYTES 0
92 /* Highest numbered Floating Point register. */
93 #if (GDB_TARGET_IS_SPARC64)
94 #define FP_MAX_REGNUM (FP0_REGNUM + 48)
96 #define FP_MAX_REGNUM (FP0_REGNUM + 32)
99 /* Size of a general (integer) register: */
100 #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
102 /* Offset within the call dummy stack of the saved registers. */
103 #if (GDB_TARGET_IS_SPARC64)
104 #define DUMMY_REG_SAVE_OFFSET (128 + 16)
106 #define DUMMY_REG_SAVE_OFFSET 0x60
109 #endif /* GDB_MULTI_ARCH */
114 // OBSOLETE int has_fpu;
116 int fp_register_bytes;
121 int call_dummy_call_offset;
125 /* Now make GDB_TARGET_IS_SPARC64 a runtime test. */
126 /* FIXME MVS: or try testing bfd_arch_info.arch and bfd_arch_info.mach ...
127 * define GDB_TARGET_IS_SPARC64 \
128 * (TARGET_ARCHITECTURE->arch == bfd_arch_sparc && \
129 * (TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9 || \
130 * TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9a))
134 extern int stop_after_trap;
136 /* We don't store all registers immediately when requested, since they
137 get sent over in large chunks anyway. Instead, we accumulate most
138 of the changes and send them over once. "deferred_stores" keeps
139 track of which sets of registers we have locally-changed copies of,
140 so we only need send the groups that have changed. */
142 int deferred_stores = 0; /* Accumulated stores we want to do eventually. */
146 // OBSOLETE /* Some machines, such as Fujitsu SPARClite 86x, have a bi-endian mode
147 // OBSOLETE where instructions are big-endian and data are little-endian.
148 // OBSOLETE This flag is set when we detect that the target is of this type. */
150 // OBSOLETE int bi_endian = 0;
154 /* Fetch a single instruction. Even on bi-endian machines
155 such as sparc86x, instructions are always big-endian. */
158 fetch_instruction (CORE_ADDR pc)
160 unsigned long retval;
162 unsigned char buf[4];
164 read_memory (pc, buf, sizeof (buf));
166 /* Start at the most significant end of the integer, and work towards
167 the least significant. */
169 for (i = 0; i < sizeof (buf); ++i)
170 retval = (retval << 8) | buf[i];
175 /* Branches with prediction are treated like their non-predicting cousins. */
176 /* FIXME: What about floating point branches? */
178 /* Macros to extract fields from sparc instructions. */
179 #define X_OP(i) (((i) >> 30) & 0x3)
180 #define X_RD(i) (((i) >> 25) & 0x1f)
181 #define X_A(i) (((i) >> 29) & 1)
182 #define X_COND(i) (((i) >> 25) & 0xf)
183 #define X_OP2(i) (((i) >> 22) & 0x7)
184 #define X_IMM22(i) ((i) & 0x3fffff)
185 #define X_OP3(i) (((i) >> 19) & 0x3f)
186 #define X_RS1(i) (((i) >> 14) & 0x1f)
187 #define X_I(i) (((i) >> 13) & 1)
188 #define X_IMM13(i) ((i) & 0x1fff)
189 /* Sign extension macros. */
190 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
191 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
192 #define X_CC(i) (((i) >> 20) & 3)
193 #define X_P(i) (((i) >> 19) & 1)
194 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
195 #define X_RCOND(i) (((i) >> 25) & 7)
196 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
197 #define X_FCN(i) (((i) >> 25) & 31)
201 Error, not_branch, bicc, bicca, ba, baa, ticc, ta, done_retry
204 /* Simulate single-step ptrace call for sun4. Code written by Gary
205 Beihl (beihl@mcc.com). */
207 /* npc4 and next_pc describe the situation at the time that the
208 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
209 static CORE_ADDR next_pc, npc4, target;
210 static int brknpc4, brktrg;
211 typedef char binsn_quantum[BREAKPOINT_MAX];
212 static binsn_quantum break_mem[3];
214 static branch_type isbranch (long, CORE_ADDR, CORE_ADDR *);
216 /* single_step() is called just before we want to resume the inferior,
217 if we want to single-step it but there is no hardware or kernel single-step
218 support (as on all SPARCs). We find all the possible targets of the
219 coming instruction and breakpoint them.
221 single_step is also called just after the inferior stops. If we had
222 set up a simulated single-step, we undo our damage. */
225 sparc_software_single_step (enum target_signal ignore, /* pid, but we don't need it */
226 int insert_breakpoints_p)
232 if (insert_breakpoints_p)
234 /* Always set breakpoint for NPC. */
235 next_pc = read_register (NPC_REGNUM);
236 npc4 = next_pc + 4; /* branch not taken */
238 target_insert_breakpoint (next_pc, break_mem[0]);
239 /* printf_unfiltered ("set break at %x\n",next_pc); */
241 pc = read_register (PC_REGNUM);
242 pc_instruction = fetch_instruction (pc);
243 br = isbranch (pc_instruction, pc, &target);
244 brknpc4 = brktrg = 0;
248 /* Conditional annulled branch will either end up at
249 npc (if taken) or at npc+4 (if not taken).
252 target_insert_breakpoint (npc4, break_mem[1]);
254 else if (br == baa && target != next_pc)
256 /* Unconditional annulled branch will always end up at
259 target_insert_breakpoint (target, break_mem[2]);
261 else if (GDB_TARGET_IS_SPARC64 && br == done_retry)
264 target_insert_breakpoint (target, break_mem[2]);
269 /* Remove breakpoints */
270 target_remove_breakpoint (next_pc, break_mem[0]);
273 target_remove_breakpoint (npc4, break_mem[1]);
276 target_remove_breakpoint (target, break_mem[2]);
280 struct frame_extra_info
285 /* Following fields only relevant for flat frames. */
288 /* Add this to ->frame to get the value of the stack pointer at the
289 time of the register saves. */
293 /* Call this for each newly created frame. For SPARC, we need to
294 calculate the bottom of the frame, and do some extra work if the
295 prologue has been generated via the -mflat option to GCC. In
296 particular, we need to know where the previous fp and the pc have
297 been stashed, since their exact position within the frame may vary. */
300 sparc_init_extra_frame_info (int fromleaf, struct frame_info *fi)
303 CORE_ADDR prologue_start, prologue_end;
306 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
307 frame_saved_regs_zalloc (fi);
309 get_frame_extra_info (fi)->bottom =
311 ? (get_frame_base (fi) == get_frame_base (get_next_frame (fi))
312 ? get_frame_extra_info (get_next_frame (fi))->bottom
313 : get_frame_base (get_next_frame (fi)))
316 /* If fi->next is NULL, then we already set ->frame by passing
317 deprecated_read_fp() to create_new_frame. */
318 if (get_next_frame (fi))
322 buf = alloca (MAX_REGISTER_RAW_SIZE);
324 /* Compute ->frame as if not flat. If it is flat, we'll change
326 if (get_next_frame (get_next_frame (fi)) != NULL
327 && ((get_frame_type (get_next_frame (get_next_frame (fi))) == SIGTRAMP_FRAME)
328 || deprecated_frame_in_dummy (get_next_frame (get_next_frame (fi))))
329 && frameless_look_for_prologue (get_next_frame (fi)))
331 /* A frameless function interrupted by a signal did not change
332 the frame pointer, fix up frame pointer accordingly. */
333 deprecated_update_frame_base_hack (fi, get_frame_base (get_next_frame (fi)));
334 get_frame_extra_info (fi)->bottom =
335 get_frame_extra_info (get_next_frame (fi))->bottom;
339 /* Should we adjust for stack bias here? */
341 frame_read_unsigned_register (fi, DEPRECATED_FP_REGNUM, &tmp);
342 deprecated_update_frame_base_hack (fi, tmp);
343 if (GDB_TARGET_IS_SPARC64 && (get_frame_base (fi) & 1))
344 deprecated_update_frame_base_hack (fi, get_frame_base (fi) + 2047);
348 /* Decide whether this is a function with a ``flat register window''
349 frame. For such functions, the frame pointer is actually in %i7. */
350 get_frame_extra_info (fi)->flat = 0;
351 get_frame_extra_info (fi)->in_prologue = 0;
352 if (find_pc_partial_function (get_frame_pc (fi), &name, &prologue_start, &prologue_end))
354 /* See if the function starts with an add (which will be of a
355 negative number if a flat frame) to the sp. FIXME: Does not
356 handle large frames which will need more than one instruction
358 insn = fetch_instruction (prologue_start);
359 if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0
360 && X_I (insn) && X_SIMM13 (insn) < 0)
362 int offset = X_SIMM13 (insn);
364 /* Then look for a save of %i7 into the frame. */
365 insn = fetch_instruction (prologue_start + 4);
369 && X_RS1 (insn) == 14)
373 buf = alloca (MAX_REGISTER_RAW_SIZE);
375 /* We definitely have a flat frame now. */
376 get_frame_extra_info (fi)->flat = 1;
378 get_frame_extra_info (fi)->sp_offset = offset;
380 /* Overwrite the frame's address with the value in %i7. */
383 frame_read_unsigned_register (fi, I7_REGNUM, &tmp);
384 deprecated_update_frame_base_hack (fi, tmp);
387 if (GDB_TARGET_IS_SPARC64 && (get_frame_base (fi) & 1))
388 deprecated_update_frame_base_hack (fi, get_frame_base (fi) + 2047);
390 /* Record where the fp got saved. */
391 get_frame_extra_info (fi)->fp_addr =
392 get_frame_base (fi) + get_frame_extra_info (fi)->sp_offset + X_SIMM13 (insn);
394 /* Also try to collect where the pc got saved to. */
395 get_frame_extra_info (fi)->pc_addr = 0;
396 insn = fetch_instruction (prologue_start + 12);
400 && X_RS1 (insn) == 14)
401 get_frame_extra_info (fi)->pc_addr =
402 get_frame_base (fi) + get_frame_extra_info (fi)->sp_offset + X_SIMM13 (insn);
407 /* Check if the PC is in the function prologue before a SAVE
408 instruction has been executed yet. If so, set the frame
409 to the current value of the stack pointer and set
410 the in_prologue flag. */
412 struct symtab_and_line sal;
414 sal = find_pc_line (prologue_start, 0);
415 if (sal.line == 0) /* no line info, use PC */
416 prologue_end = get_frame_pc (fi);
417 else if (sal.end < prologue_end)
418 prologue_end = sal.end;
419 if (get_frame_pc (fi) < prologue_end)
421 for (addr = prologue_start; addr < get_frame_pc (fi); addr += 4)
423 insn = read_memory_integer (addr, 4);
424 if (X_OP (insn) == 2 && X_OP3 (insn) == 0x3c)
425 break; /* SAVE seen, stop searching */
427 if (addr >= get_frame_pc (fi))
429 get_frame_extra_info (fi)->in_prologue = 1;
430 deprecated_update_frame_base_hack (fi, read_register (SP_REGNUM));
435 if (get_next_frame (fi) && get_frame_base (fi) == 0)
437 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
438 deprecated_update_frame_base_hack (fi, get_frame_base (get_next_frame (fi)));
439 deprecated_update_frame_pc_hack (fi, get_frame_pc (get_next_frame (fi)));
444 sparc_frame_chain (struct frame_info *frame)
446 /* Value that will cause DEPRECATED_FRAME_CHAIN_VALID to not worry
447 about the chain value. If it really is zero, we detect it later
448 in sparc_init_prev_frame.
450 Note: kevinb/2003-02-18: The constant 1 used to be returned here,
451 but, after some recent changes to legacy_frame_chain_valid(),
452 this value is no longer suitable for causing
453 legacy_frame_chain_valid() to "not worry about the chain value."
454 The constant ~0 (i.e, 0xfff...) causes the failing test in
455 legacy_frame_chain_valid() to succeed thus preserving the "not
456 worry" property. I had considered using something like
457 ``get_frame_base (frame) + 1''. However, I think a constant
458 value is better, because when debugging this problem, I knew that
459 something funny was going on as soon as I saw the constant 1
460 being used as the frame chain elsewhere in GDB. */
462 return ~ (CORE_ADDR) 0;
466 sparc_extract_struct_value_address (char *regbuf)
468 return extract_address (regbuf + REGISTER_BYTE (O0_REGNUM),
469 REGISTER_RAW_SIZE (O0_REGNUM));
472 /* Find the pc saved in frame FRAME. */
475 sparc_frame_saved_pc (struct frame_info *frame)
480 buf = alloca (MAX_REGISTER_RAW_SIZE);
481 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
483 /* This is the signal trampoline frame.
484 Get the saved PC from the sigcontext structure. */
486 #ifndef SIGCONTEXT_PC_OFFSET
487 #define SIGCONTEXT_PC_OFFSET 12
490 CORE_ADDR sigcontext_addr;
492 int saved_pc_offset = SIGCONTEXT_PC_OFFSET;
495 scbuf = alloca (TARGET_PTR_BIT / HOST_CHAR_BIT);
497 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
498 as the third parameter. The offset to the saved pc is 12. */
499 find_pc_partial_function (get_frame_pc (frame), &name,
500 (CORE_ADDR *) NULL, (CORE_ADDR *) NULL);
501 if (name && STREQ (name, "ucbsigvechandler"))
502 saved_pc_offset = 12;
504 /* The sigcontext address is contained in register O2. */
507 frame_read_unsigned_register (frame, O0_REGNUM + 2, &tmp);
508 sigcontext_addr = tmp;
511 /* Don't cause a memory_error when accessing sigcontext in case the
512 stack layout has changed or the stack is corrupt. */
513 target_read_memory (sigcontext_addr + saved_pc_offset,
514 scbuf, sizeof (scbuf));
515 return extract_address (scbuf, sizeof (scbuf));
517 else if (get_frame_extra_info (frame)->in_prologue ||
518 (get_next_frame (frame) != NULL &&
519 ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME) ||
520 deprecated_frame_in_dummy (get_next_frame (frame))) &&
521 frameless_look_for_prologue (frame)))
523 /* A frameless function interrupted by a signal did not save
524 the PC, it is still in %o7. */
526 frame_read_unsigned_register (frame, O7_REGNUM, &tmp);
527 return PC_ADJUST (tmp);
529 if (get_frame_extra_info (frame)->flat)
530 addr = get_frame_extra_info (frame)->pc_addr;
532 addr = get_frame_extra_info (frame)->bottom + FRAME_SAVED_I0 +
533 SPARC_INTREG_SIZE * (I7_REGNUM - I0_REGNUM);
536 /* A flat frame leaf function might not save the PC anywhere,
537 just leave it in %o7. */
538 return PC_ADJUST (read_register (O7_REGNUM));
540 read_memory (addr, buf, SPARC_INTREG_SIZE);
541 return PC_ADJUST (extract_address (buf, SPARC_INTREG_SIZE));
544 /* Since an individual frame in the frame cache is defined by two
545 arguments (a frame pointer and a stack pointer), we need two
546 arguments to get info for an arbitrary stack frame. This routine
547 takes two arguments and makes the cached frames look as if these
548 two arguments defined a frame on the cache. This allows the rest
549 of info frame to extract the important arguments without
553 setup_arbitrary_frame (int argc, CORE_ADDR *argv)
555 struct frame_info *frame;
558 error ("Sparc frame specifications require two arguments: fp and sp");
560 frame = create_new_frame (argv[0], 0);
563 internal_error (__FILE__, __LINE__,
564 "create_new_frame returned invalid frame");
566 get_frame_extra_info (frame)->bottom = argv[1];
567 deprecated_update_frame_pc_hack (frame, DEPRECATED_FRAME_SAVED_PC (frame));
571 /* Given a pc value, skip it forward past the function prologue by
572 disassembling instructions that appear to be a prologue.
574 If FRAMELESS_P is set, we are only testing to see if the function
575 is frameless. This allows a quicker answer.
577 This routine should be more specific in its actions; making sure
578 that it uses the same register in the initial prologue section. */
580 static CORE_ADDR examine_prologue (CORE_ADDR, int, struct frame_info *,
584 examine_prologue (CORE_ADDR start_pc, int frameless_p, struct frame_info *fi,
585 CORE_ADDR *saved_regs)
589 CORE_ADDR pc = start_pc;
592 insn = fetch_instruction (pc);
594 /* Recognize the `sethi' insn and record its destination. */
595 if (X_OP (insn) == 0 && X_OP2 (insn) == 4)
599 insn = fetch_instruction (pc);
602 /* Recognize an add immediate value to register to either %g1 or
603 the destination register recorded above. Actually, this might
604 well recognize several different arithmetic operations.
605 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
606 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
607 I imagine any compiler really does that, however). */
610 && (X_RD (insn) == 1 || X_RD (insn) == dest))
613 insn = fetch_instruction (pc);
616 /* Recognize any SAVE insn. */
617 if (X_OP (insn) == 2 && X_OP3 (insn) == 60)
620 if (frameless_p) /* If the save is all we care about, */
621 return pc; /* return before doing more work */
622 insn = fetch_instruction (pc);
624 /* Recognize add to %sp. */
625 else if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0)
628 if (frameless_p) /* If the add is all we care about, */
629 return pc; /* return before doing more work */
631 insn = fetch_instruction (pc);
632 /* Recognize store of frame pointer (i7). */
636 && X_RS1 (insn) == 14)
639 insn = fetch_instruction (pc);
641 /* Recognize sub %sp, <anything>, %i7. */
644 && X_RS1 (insn) == 14
645 && X_RD (insn) == 31)
648 insn = fetch_instruction (pc);
657 /* Without a save or add instruction, it's not a prologue. */
662 /* Recognize stores into the frame from the input registers.
663 This recognizes all non alternate stores of an input register,
664 into a location offset from the frame pointer between
667 /* The above will fail for arguments that are promoted
668 (eg. shorts to ints or floats to doubles), because the compiler
669 will pass them in positive-offset frame space, but the prologue
670 will save them (after conversion) in negative frame space at an
671 unpredictable offset. Therefore I am going to remove the
672 restriction on the target-address of the save, on the theory
673 that any unbroken sequence of saves from input registers must
674 be part of the prologue. In un-optimized code (at least), I'm
675 fairly sure that the compiler would emit SOME other instruction
676 (eg. a move or add) before emitting another save that is actually
677 a part of the function body.
679 Besides, the reserved stack space is different for SPARC64 anyway.
684 && (X_OP3 (insn) & 0x3c) == 4 /* Store, non-alternate. */
685 && (X_RD (insn) & 0x18) == 0x18 /* Input register. */
686 && X_I (insn) /* Immediate mode. */
687 && X_RS1 (insn) == 30) /* Off of frame pointer. */
688 ; /* empty statement -- fall thru to end of loop */
689 else if (GDB_TARGET_IS_SPARC64
691 && (X_OP3 (insn) & 0x3c) == 12 /* store, extended (64-bit) */
692 && (X_RD (insn) & 0x18) == 0x18 /* input register */
693 && X_I (insn) /* immediate mode */
694 && X_RS1 (insn) == 30) /* off of frame pointer */
695 ; /* empty statement -- fall thru to end of loop */
696 else if (X_OP (insn) == 3
697 && (X_OP3 (insn) & 0x3c) == 36 /* store, floating-point */
698 && X_I (insn) /* immediate mode */
699 && X_RS1 (insn) == 30) /* off of frame pointer */
700 ; /* empty statement -- fall thru to end of loop */
703 && X_OP3 (insn) == 4 /* store? */
704 && X_RS1 (insn) == 14) /* off of frame pointer */
706 if (saved_regs && X_I (insn))
707 saved_regs[X_RD (insn)] =
708 get_frame_base (fi) + get_frame_extra_info (fi)->sp_offset + X_SIMM13 (insn);
713 insn = fetch_instruction (pc);
719 /* Advance PC across any function entry prologue instructions to reach
723 sparc_skip_prologue (CORE_ADDR start_pc)
725 struct symtab_and_line sal;
726 CORE_ADDR func_start, func_end;
728 /* This is the preferred method, find the end of the prologue by
729 using the debugging information. */
730 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
732 sal = find_pc_line (func_start, 0);
734 if (sal.end < func_end
735 && start_pc <= sal.end)
739 /* Oh well, examine the code by hand. */
740 return examine_prologue (start_pc, 0, NULL, NULL);
743 /* Is the prologue at IP frameless? */
746 sparc_prologue_frameless_p (CORE_ADDR ip)
748 return ip == examine_prologue (ip, 1, NULL, NULL);
751 /* Check instruction at ADDR to see if it is a branch.
752 All non-annulled instructions will go to NPC or will trap.
753 Set *TARGET if we find a candidate branch; set to zero if not.
755 This isn't static as it's used by remote-sa.sparc.c. */
758 isbranch (long instruction, CORE_ADDR addr, CORE_ADDR *target)
760 branch_type val = not_branch;
761 long int offset = 0; /* Must be signed for sign-extend. */
765 if (X_OP (instruction) == 0
766 && (X_OP2 (instruction) == 2
767 || X_OP2 (instruction) == 6
768 || X_OP2 (instruction) == 1
769 || X_OP2 (instruction) == 3
770 || X_OP2 (instruction) == 5
771 || (GDB_TARGET_IS_SPARC64 && X_OP2 (instruction) == 7)))
773 if (X_COND (instruction) == 8)
774 val = X_A (instruction) ? baa : ba;
776 val = X_A (instruction) ? bicca : bicc;
777 switch (X_OP2 (instruction))
780 if (!GDB_TARGET_IS_SPARC64)
785 offset = 4 * X_DISP22 (instruction);
789 offset = 4 * X_DISP19 (instruction);
792 offset = 4 * X_DISP16 (instruction);
795 *target = addr + offset;
797 else if (GDB_TARGET_IS_SPARC64
798 && X_OP (instruction) == 2
799 && X_OP3 (instruction) == 62)
801 if (X_FCN (instruction) == 0)
804 *target = read_register (TNPC_REGNUM);
807 else if (X_FCN (instruction) == 1)
810 *target = read_register (TPC_REGNUM);
818 /* Find register number REGNUM relative to FRAME and put its
819 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
820 was optimized out (and thus can't be fetched). If the variable
821 was fetched from memory, set *ADDRP to where it was fetched from,
822 otherwise it was fetched from a register.
824 The argument RAW_BUFFER must point to aligned memory. */
827 sparc_get_saved_register (char *raw_buffer, int *optimized, CORE_ADDR *addrp,
828 struct frame_info *frame, int regnum,
829 enum lval_type *lval)
831 struct frame_info *frame1;
834 if (!target_has_registers)
835 error ("No registers.");
842 /* FIXME This code extracted from infcmd.c; should put elsewhere! */
845 /* error ("No selected frame."); */
846 if (!target_has_registers)
847 error ("The program has no registers now.");
848 if (deprecated_selected_frame == NULL)
849 error ("No selected frame.");
850 /* Try to use selected frame */
851 frame = get_prev_frame (deprecated_selected_frame);
853 error ("Cmd not meaningful in the outermost frame.");
857 frame1 = get_next_frame (frame);
859 /* Get saved PC from the frame info if not in innermost frame. */
860 if (regnum == PC_REGNUM && frame1 != NULL)
864 if (raw_buffer != NULL)
866 /* Put it back in target format. */
867 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), get_frame_pc (frame));
874 while (frame1 != NULL)
876 /* FIXME MVS: wrong test for dummy frame at entry. */
878 if (get_frame_pc (frame1) >= (get_frame_extra_info (frame1)->bottom
879 ? get_frame_extra_info (frame1)->bottom
881 && get_frame_pc (frame1) <= get_frame_base (frame1))
883 /* Dummy frame. All but the window regs are in there somewhere.
884 The window registers are saved on the stack, just like in a
886 if (regnum >= G1_REGNUM && regnum < G1_REGNUM + 7)
887 addr = get_frame_base (frame1) + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE
888 - (FP_REGISTER_BYTES + 8 * SPARC_INTREG_SIZE);
889 else if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8)
890 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
891 is safe/cheap - there will always be a prev frame.
892 This is because frame1 is initialized to frame->next
893 (frame1->prev == frame) and is then advanced towards
894 the innermost (next) frame. */
895 addr = (get_frame_extra_info (get_prev_frame (frame1))->bottom
896 + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
898 else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8)
899 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
900 is safe/cheap - there will always be a prev frame.
901 This is because frame1 is initialized to frame->next
902 (frame1->prev == frame) and is then advanced towards
903 the innermost (next) frame. */
904 addr = (get_frame_extra_info (get_prev_frame (frame1))->bottom
905 + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
907 else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8)
908 addr = get_frame_base (frame1) + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE
909 - (FP_REGISTER_BYTES + 16 * SPARC_INTREG_SIZE);
910 else if (SPARC_HAS_FPU &&
911 regnum >= FP0_REGNUM && regnum < FP0_REGNUM + 32)
912 addr = get_frame_base (frame1) + (regnum - FP0_REGNUM) * 4
913 - (FP_REGISTER_BYTES);
914 else if (GDB_TARGET_IS_SPARC64 && SPARC_HAS_FPU &&
915 regnum >= FP0_REGNUM + 32 && regnum < FP_MAX_REGNUM)
916 addr = get_frame_base (frame1) + 32 * 4 + (regnum - FP0_REGNUM - 32) * 8
917 - (FP_REGISTER_BYTES);
918 else if (regnum >= Y_REGNUM && regnum < NUM_REGS)
919 addr = get_frame_base (frame1) + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE
920 - (FP_REGISTER_BYTES + 24 * SPARC_INTREG_SIZE);
922 else if (get_frame_extra_info (frame1)->flat)
925 if (regnum == RP_REGNUM)
926 addr = get_frame_extra_info (frame1)->pc_addr;
927 else if (regnum == I7_REGNUM)
928 addr = get_frame_extra_info (frame1)->fp_addr;
931 CORE_ADDR func_start;
934 regs = alloca (NUM_REGS * sizeof (CORE_ADDR));
935 memset (regs, 0, NUM_REGS * sizeof (CORE_ADDR));
937 find_pc_partial_function (get_frame_pc (frame1), NULL, &func_start, NULL);
938 examine_prologue (func_start, 0, frame1, regs);
944 /* Normal frame. Local and In registers are saved on stack. */
945 if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8)
946 addr = (get_frame_extra_info (get_prev_frame (frame1))->bottom
947 + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
949 else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8)
950 addr = (get_frame_extra_info (get_prev_frame (frame1))->bottom
951 + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
953 else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8)
955 /* Outs become ins. */
957 frame_register (frame1, (regnum - O0_REGNUM + I0_REGNUM),
958 optimized, lval, addrp, &realnum, raw_buffer);
964 frame1 = get_next_frame (frame1);
970 if (regnum == SP_REGNUM)
972 if (raw_buffer != NULL)
974 /* Put it back in target format. */
975 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), addr);
981 if (raw_buffer != NULL)
982 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
987 *lval = lval_register;
988 addr = REGISTER_BYTE (regnum);
989 if (raw_buffer != NULL)
990 deprecated_read_register_gen (regnum, raw_buffer);
996 /* Push an empty stack frame, and record in it the current PC, regs, etc.
998 We save the non-windowed registers and the ins. The locals and outs
999 are new; they don't need to be saved. The i's and l's of
1000 the last frame were already saved on the stack. */
1002 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1004 /* See tm-sparc.h for how this is calculated. */
1006 #define DUMMY_STACK_REG_BUF_SIZE \
1007 (((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
1008 #define DUMMY_STACK_SIZE \
1009 (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
1012 sparc_push_dummy_frame (void)
1014 CORE_ADDR sp, old_sp;
1015 char *register_temp;
1017 register_temp = alloca (DUMMY_STACK_SIZE);
1019 old_sp = sp = read_sp ();
1021 if (GDB_TARGET_IS_SPARC64)
1023 /* PC, NPC, CCR, FSR, FPRS, Y, ASI */
1024 deprecated_read_register_bytes (REGISTER_BYTE (PC_REGNUM),
1026 REGISTER_RAW_SIZE (PC_REGNUM) * 7);
1027 deprecated_read_register_bytes (REGISTER_BYTE (PSTATE_REGNUM),
1028 ®ister_temp[7 * SPARC_INTREG_SIZE],
1029 REGISTER_RAW_SIZE (PSTATE_REGNUM));
1030 /* FIXME: not sure what needs to be saved here. */
1034 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
1035 deprecated_read_register_bytes (REGISTER_BYTE (Y_REGNUM),
1037 REGISTER_RAW_SIZE (Y_REGNUM) * 8);
1040 deprecated_read_register_bytes (REGISTER_BYTE (O0_REGNUM),
1041 ®ister_temp[8 * SPARC_INTREG_SIZE],
1042 SPARC_INTREG_SIZE * 8);
1044 deprecated_read_register_bytes (REGISTER_BYTE (G0_REGNUM),
1045 ®ister_temp[16 * SPARC_INTREG_SIZE],
1046 SPARC_INTREG_SIZE * 8);
1049 deprecated_read_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1050 ®ister_temp[24 * SPARC_INTREG_SIZE],
1053 sp -= DUMMY_STACK_SIZE;
1055 DEPRECATED_DUMMY_WRITE_SP (sp);
1057 write_memory (sp + DUMMY_REG_SAVE_OFFSET, ®ister_temp[0],
1058 DUMMY_STACK_REG_BUF_SIZE);
1060 if (strcmp (target_shortname, "sim") != 0)
1062 /* NOTE: cagney/2002-04-04: The code below originally contained
1063 GDB's _only_ call to write_fp(). That call was eliminated by
1064 inlining the corresponding code. For the 64 bit case, the
1065 old function (sparc64_write_fp) did the below although I'm
1066 not clear why. The same goes for why this is only done when
1067 the underlying target is a simulator. */
1068 if (GDB_TARGET_IS_SPARC64)
1070 /* Target is a 64 bit SPARC. */
1071 CORE_ADDR oldfp = read_register (DEPRECATED_FP_REGNUM);
1073 write_register (DEPRECATED_FP_REGNUM, old_sp - 2047);
1075 write_register (DEPRECATED_FP_REGNUM, old_sp);
1079 /* Target is a 32 bit SPARC. */
1080 write_register (DEPRECATED_FP_REGNUM, old_sp);
1082 /* Set return address register for the call dummy to the current PC. */
1083 write_register (I7_REGNUM, read_pc () - 8);
1087 /* The call dummy will write this value to FP before executing
1088 the 'save'. This ensures that register window flushes work
1089 correctly in the simulator. */
1090 write_register (G0_REGNUM + 1, read_register (DEPRECATED_FP_REGNUM));
1092 /* The call dummy will write this value to FP after executing
1094 write_register (G0_REGNUM + 2, old_sp);
1096 /* The call dummy will write this value to the return address (%i7) after
1097 executing the 'save'. */
1098 write_register (G0_REGNUM + 3, read_pc () - 8);
1100 /* Set the FP that the call dummy will be using after the 'save'.
1101 This makes backtraces from an inferior function call work properly. */
1102 write_register (DEPRECATED_FP_REGNUM, old_sp);
1106 /* sparc_frame_find_saved_regs (). This function is here only because
1107 pop_frame uses it. Note there is an interesting corner case which
1108 I think few ports of GDB get right--if you are popping a frame
1109 which does not save some register that *is* saved by a more inner
1110 frame (such a frame will never be a dummy frame because dummy
1111 frames save all registers).
1113 NOTE: cagney/2003-03-12: Since pop_frame has been rewritten to use
1114 frame_unwind_register() the need for this function is questionable.
1116 Stores, into an array of CORE_ADDR,
1117 the addresses of the saved registers of frame described by FRAME_INFO.
1118 This includes special registers such as pc and fp saved in special
1119 ways in the stack frame. sp is even more special:
1120 the address we return for it IS the sp for the next frame.
1122 Note that on register window machines, we are currently making the
1123 assumption that window registers are being saved somewhere in the
1124 frame in which they are being used. If they are stored in an
1125 inferior frame, find_saved_register will break.
1127 On the Sun 4, the only time all registers are saved is when
1128 a dummy frame is involved. Otherwise, the only saved registers
1129 are the LOCAL and IN registers which are saved as a result
1130 of the "save/restore" opcodes. This condition is determined
1131 by address rather than by value.
1133 The "pc" is not stored in a frame on the SPARC. (What is stored
1134 is a return address minus 8.) sparc_pop_frame knows how to
1135 deal with that. Other routines might or might not.
1137 See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
1138 about how this works. */
1140 static void sparc_frame_find_saved_regs (struct frame_info *, CORE_ADDR *);
1143 sparc_frame_find_saved_regs (struct frame_info *fi, CORE_ADDR *saved_regs_addr)
1145 register int regnum;
1146 CORE_ADDR frame_addr = get_frame_base (fi);
1148 gdb_assert (fi != NULL);
1150 memset (saved_regs_addr, 0, NUM_REGS * sizeof (CORE_ADDR));
1152 if (get_frame_pc (fi) >= (get_frame_extra_info (fi)->bottom
1153 ? get_frame_extra_info (fi)->bottom
1155 && get_frame_pc (fi) <= get_frame_base (fi))
1157 /* Dummy frame. All but the window regs are in there somewhere. */
1158 for (regnum = G1_REGNUM; regnum < G1_REGNUM + 7; regnum++)
1159 saved_regs_addr[regnum] =
1160 frame_addr + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE
1161 - DUMMY_STACK_REG_BUF_SIZE + 16 * SPARC_INTREG_SIZE;
1163 for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; regnum++)
1164 saved_regs_addr[regnum] =
1165 frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
1166 - DUMMY_STACK_REG_BUF_SIZE + 8 * SPARC_INTREG_SIZE;
1169 for (regnum = FP0_REGNUM; regnum < FP_MAX_REGNUM; regnum++)
1170 saved_regs_addr[regnum] = frame_addr + (regnum - FP0_REGNUM) * 4
1171 - DUMMY_STACK_REG_BUF_SIZE + 24 * SPARC_INTREG_SIZE;
1173 if (GDB_TARGET_IS_SPARC64)
1175 for (regnum = PC_REGNUM; regnum < PC_REGNUM + 7; regnum++)
1177 saved_regs_addr[regnum] =
1178 frame_addr + (regnum - PC_REGNUM) * SPARC_INTREG_SIZE
1179 - DUMMY_STACK_REG_BUF_SIZE;
1181 saved_regs_addr[PSTATE_REGNUM] =
1182 frame_addr + 8 * SPARC_INTREG_SIZE - DUMMY_STACK_REG_BUF_SIZE;
1185 for (regnum = Y_REGNUM; regnum < NUM_REGS; regnum++)
1186 saved_regs_addr[regnum] =
1187 frame_addr + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE
1188 - DUMMY_STACK_REG_BUF_SIZE;
1190 frame_addr = (get_frame_extra_info (fi)->bottom
1191 ? get_frame_extra_info (fi)->bottom
1194 else if (get_frame_extra_info (fi)->flat)
1196 CORE_ADDR func_start;
1197 find_pc_partial_function (get_frame_pc (fi), NULL, &func_start, NULL);
1198 examine_prologue (func_start, 0, fi, saved_regs_addr);
1200 /* Flat register window frame. */
1201 saved_regs_addr[RP_REGNUM] = get_frame_extra_info (fi)->pc_addr;
1202 saved_regs_addr[I7_REGNUM] = get_frame_extra_info (fi)->fp_addr;
1206 /* Normal frame. Just Local and In registers */
1207 frame_addr = (get_frame_extra_info (fi)->bottom
1208 ? get_frame_extra_info (fi)->bottom
1210 for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; regnum++)
1211 saved_regs_addr[regnum] =
1212 (frame_addr + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
1214 for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; regnum++)
1215 saved_regs_addr[regnum] =
1216 (frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
1219 if (get_next_frame (fi))
1221 if (get_frame_extra_info (fi)->flat)
1223 saved_regs_addr[O7_REGNUM] = get_frame_extra_info (fi)->pc_addr;
1227 /* Pull off either the next frame pointer or the stack pointer */
1228 CORE_ADDR next_next_frame_addr =
1229 (get_frame_extra_info (get_next_frame (fi))->bottom
1230 ? get_frame_extra_info (get_next_frame (fi))->bottom
1232 for (regnum = O0_REGNUM; regnum < O0_REGNUM + 8; regnum++)
1233 saved_regs_addr[regnum] =
1234 (next_next_frame_addr
1235 + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE
1239 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
1240 /* FIXME -- should this adjust for the sparc64 offset? */
1241 saved_regs_addr[SP_REGNUM] = get_frame_base (fi);
1244 /* Discard from the stack the innermost frame, restoring all saved registers.
1246 Note that the values stored in fsr by
1247 deprecated_get_frame_saved_regs are *in the context of the called
1248 frame*. What this means is that the i regs of fsr must be restored
1249 into the o regs of the (calling) frame that we pop into. We don't
1250 care about the output regs of the calling frame, since unless it's
1251 a dummy frame, it won't have any output regs in it.
1253 We never have to bother with %l (local) regs, since the called routine's
1254 locals get tossed, and the calling routine's locals are already saved
1257 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1260 sparc_pop_frame (void)
1262 register struct frame_info *frame = get_current_frame ();
1263 register CORE_ADDR pc;
1268 fsr = alloca (NUM_REGS * sizeof (CORE_ADDR));
1269 raw_buffer = alloca (REGISTER_BYTES);
1270 sparc_frame_find_saved_regs (frame, &fsr[0]);
1273 if (fsr[FP0_REGNUM])
1275 read_memory (fsr[FP0_REGNUM], raw_buffer, FP_REGISTER_BYTES);
1276 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1277 raw_buffer, FP_REGISTER_BYTES);
1279 if (!(GDB_TARGET_IS_SPARC64))
1281 if (fsr[FPS_REGNUM])
1283 read_memory (fsr[FPS_REGNUM], raw_buffer, SPARC_INTREG_SIZE);
1284 deprecated_write_register_gen (FPS_REGNUM, raw_buffer);
1286 if (fsr[CPS_REGNUM])
1288 read_memory (fsr[CPS_REGNUM], raw_buffer, SPARC_INTREG_SIZE);
1289 deprecated_write_register_gen (CPS_REGNUM, raw_buffer);
1295 read_memory (fsr[G1_REGNUM], raw_buffer, 7 * SPARC_INTREG_SIZE);
1296 deprecated_write_register_bytes (REGISTER_BYTE (G1_REGNUM), raw_buffer,
1297 7 * SPARC_INTREG_SIZE);
1300 if (get_frame_extra_info (frame)->flat)
1302 /* Each register might or might not have been saved, need to test
1304 for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; ++regnum)
1306 write_register (regnum, read_memory_integer (fsr[regnum],
1307 SPARC_INTREG_SIZE));
1308 for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; ++regnum)
1310 write_register (regnum, read_memory_integer (fsr[regnum],
1311 SPARC_INTREG_SIZE));
1313 /* Handle all outs except stack pointer (o0-o5; o7). */
1314 for (regnum = O0_REGNUM; regnum < O0_REGNUM + 6; ++regnum)
1316 write_register (regnum, read_memory_integer (fsr[regnum],
1317 SPARC_INTREG_SIZE));
1318 if (fsr[O0_REGNUM + 7])
1319 write_register (O0_REGNUM + 7,
1320 read_memory_integer (fsr[O0_REGNUM + 7],
1321 SPARC_INTREG_SIZE));
1323 DEPRECATED_DUMMY_WRITE_SP (get_frame_base (frame));
1325 else if (fsr[I0_REGNUM])
1331 reg_temp = alloca (SPARC_INTREG_SIZE * 16);
1333 read_memory (fsr[I0_REGNUM], raw_buffer, 8 * SPARC_INTREG_SIZE);
1335 /* Get the ins and locals which we are about to restore. Just
1336 moving the stack pointer is all that is really needed, except
1337 store_inferior_registers is then going to write the ins and
1338 locals from the registers array, so we need to muck with the
1340 sp = fsr[SP_REGNUM];
1342 if (GDB_TARGET_IS_SPARC64 && (sp & 1))
1345 read_memory (sp, reg_temp, SPARC_INTREG_SIZE * 16);
1347 /* Restore the out registers.
1348 Among other things this writes the new stack pointer. */
1349 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM), raw_buffer,
1350 SPARC_INTREG_SIZE * 8);
1352 deprecated_write_register_bytes (REGISTER_BYTE (L0_REGNUM), reg_temp,
1353 SPARC_INTREG_SIZE * 16);
1356 if (!(GDB_TARGET_IS_SPARC64))
1358 write_register (PS_REGNUM,
1359 read_memory_integer (fsr[PS_REGNUM],
1360 REGISTER_RAW_SIZE (PS_REGNUM)));
1363 write_register (Y_REGNUM,
1364 read_memory_integer (fsr[Y_REGNUM],
1365 REGISTER_RAW_SIZE (Y_REGNUM)));
1368 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
1369 write_register (PC_REGNUM,
1370 read_memory_integer (fsr[PC_REGNUM],
1371 REGISTER_RAW_SIZE (PC_REGNUM)));
1372 if (fsr[NPC_REGNUM])
1373 write_register (NPC_REGNUM,
1374 read_memory_integer (fsr[NPC_REGNUM],
1375 REGISTER_RAW_SIZE (NPC_REGNUM)));
1377 else if (get_frame_extra_info (frame)->flat)
1379 if (get_frame_extra_info (frame)->pc_addr)
1380 pc = PC_ADJUST ((CORE_ADDR)
1381 read_memory_integer (get_frame_extra_info (frame)->pc_addr,
1382 REGISTER_RAW_SIZE (PC_REGNUM)));
1385 /* I think this happens only in the innermost frame, if so then
1386 it is a complicated way of saying
1387 "pc = read_register (O7_REGNUM);". */
1389 frame_read_unsigned_register (frame, O7_REGNUM, &tmp);
1390 pc = PC_ADJUST (tmp);
1393 write_register (PC_REGNUM, pc);
1394 write_register (NPC_REGNUM, pc + 4);
1396 else if (fsr[I7_REGNUM])
1398 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1399 pc = PC_ADJUST ((CORE_ADDR) read_memory_integer (fsr[I7_REGNUM],
1400 SPARC_INTREG_SIZE));
1401 write_register (PC_REGNUM, pc);
1402 write_register (NPC_REGNUM, pc + 4);
1404 flush_cached_frames ();
1407 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1408 encodes the structure size being returned. If we detect such
1409 a fake insn, step past it. */
1412 sparc_pc_adjust (CORE_ADDR pc)
1418 err = target_read_memory (pc + 8, buf, 4);
1419 insn = extract_unsigned_integer (buf, 4);
1420 if ((err == 0) && (insn & 0xffc00000) == 0)
1426 /* If pc is in a shared library trampoline, return its target.
1427 The SunOs 4.x linker rewrites the jump table entries for PIC
1428 compiled modules in the main executable to bypass the dynamic linker
1429 with jumps of the form
1432 and removes the corresponding jump table relocation entry in the
1433 dynamic relocations.
1434 find_solib_trampoline_target relies on the presence of the jump
1435 table relocation entry, so we have to detect these jump instructions
1439 sunos4_skip_trampoline_code (CORE_ADDR pc)
1441 unsigned long insn1;
1445 err = target_read_memory (pc, buf, 4);
1446 insn1 = extract_unsigned_integer (buf, 4);
1447 if (err == 0 && (insn1 & 0xffc00000) == 0x03000000)
1449 unsigned long insn2;
1451 err = target_read_memory (pc + 4, buf, 4);
1452 insn2 = extract_unsigned_integer (buf, 4);
1453 if (err == 0 && (insn2 & 0xffffe000) == 0x81c06000)
1455 CORE_ADDR target_pc = (insn1 & 0x3fffff) << 10;
1456 int delta = insn2 & 0x1fff;
1458 /* Sign extend the displacement. */
1461 return target_pc + delta;
1464 return find_solib_trampoline_target (pc);
1467 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1469 /* The /proc interface divides the target machine's register set up into
1470 two different sets, the general register set (gregset) and the floating
1471 point register set (fpregset). For each set, there is an ioctl to get
1472 the current register set and another ioctl to set the current values.
1474 The actual structure passed through the ioctl interface is, of course,
1475 naturally machine dependent, and is different for each set of registers.
1476 For the sparc for example, the general register set is typically defined
1479 typedef int gregset_t[38];
1485 and the floating point set by:
1487 typedef struct prfpregset {
1490 double pr_dregs[16];
1495 u_char pr_q_entrysize;
1500 These routines provide the packing and unpacking of gregset_t and
1501 fpregset_t formatted data.
1506 /* Given a pointer to a general register set in /proc format (gregset_t *),
1507 unpack the register contents and supply them as gdb's idea of the current
1511 supply_gregset (gdb_gregset_t *gregsetp)
1513 prgreg_t *regp = (prgreg_t *) gregsetp;
1514 int regi, offset = 0;
1516 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1517 then the gregset may contain 64-bit ints while supply_register
1518 is expecting 32-bit ints. Compensate. */
1519 if (sizeof (regp[0]) == 8 && SPARC_INTREG_SIZE == 4)
1522 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1523 /* FIXME MVS: assumes the order of the first 32 elements... */
1524 for (regi = G0_REGNUM; regi <= I7_REGNUM; regi++)
1526 supply_register (regi, ((char *) (regp + regi)) + offset);
1529 /* These require a bit more care. */
1530 supply_register (PC_REGNUM, ((char *) (regp + R_PC)) + offset);
1531 supply_register (NPC_REGNUM, ((char *) (regp + R_nPC)) + offset);
1532 supply_register (Y_REGNUM, ((char *) (regp + R_Y)) + offset);
1534 if (GDB_TARGET_IS_SPARC64)
1537 supply_register (CCR_REGNUM, ((char *) (regp + R_CCR)) + offset);
1539 supply_register (CCR_REGNUM, NULL);
1542 supply_register (FPRS_REGNUM, ((char *) (regp + R_FPRS)) + offset);
1544 supply_register (FPRS_REGNUM, NULL);
1547 supply_register (ASI_REGNUM, ((char *) (regp + R_ASI)) + offset);
1549 supply_register (ASI_REGNUM, NULL);
1555 supply_register (PS_REGNUM, ((char *) (regp + R_PS)) + offset);
1557 supply_register (PS_REGNUM, NULL);
1560 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1561 Steal R_ASI and R_FPRS, and hope for the best! */
1563 #if !defined (R_WIM) && defined (R_ASI)
1567 #if !defined (R_TBR) && defined (R_FPRS)
1568 #define R_TBR R_FPRS
1572 supply_register (WIM_REGNUM, ((char *) (regp + R_WIM)) + offset);
1574 supply_register (WIM_REGNUM, NULL);
1578 supply_register (TBR_REGNUM, ((char *) (regp + R_TBR)) + offset);
1580 supply_register (TBR_REGNUM, NULL);
1584 /* Fill inaccessible registers with zero. */
1585 if (GDB_TARGET_IS_SPARC64)
1588 * don't know how to get value of any of the following:
1590 supply_register (VER_REGNUM, NULL);
1591 supply_register (TICK_REGNUM, NULL);
1592 supply_register (PIL_REGNUM, NULL);
1593 supply_register (PSTATE_REGNUM, NULL);
1594 supply_register (TSTATE_REGNUM, NULL);
1595 supply_register (TBA_REGNUM, NULL);
1596 supply_register (TL_REGNUM, NULL);
1597 supply_register (TT_REGNUM, NULL);
1598 supply_register (TPC_REGNUM, NULL);
1599 supply_register (TNPC_REGNUM, NULL);
1600 supply_register (WSTATE_REGNUM, NULL);
1601 supply_register (CWP_REGNUM, NULL);
1602 supply_register (CANSAVE_REGNUM, NULL);
1603 supply_register (CANRESTORE_REGNUM, NULL);
1604 supply_register (CLEANWIN_REGNUM, NULL);
1605 supply_register (OTHERWIN_REGNUM, NULL);
1606 supply_register (ASR16_REGNUM, NULL);
1607 supply_register (ASR17_REGNUM, NULL);
1608 supply_register (ASR18_REGNUM, NULL);
1609 supply_register (ASR19_REGNUM, NULL);
1610 supply_register (ASR20_REGNUM, NULL);
1611 supply_register (ASR21_REGNUM, NULL);
1612 supply_register (ASR22_REGNUM, NULL);
1613 supply_register (ASR23_REGNUM, NULL);
1614 supply_register (ASR24_REGNUM, NULL);
1615 supply_register (ASR25_REGNUM, NULL);
1616 supply_register (ASR26_REGNUM, NULL);
1617 supply_register (ASR27_REGNUM, NULL);
1618 supply_register (ASR28_REGNUM, NULL);
1619 supply_register (ASR29_REGNUM, NULL);
1620 supply_register (ASR30_REGNUM, NULL);
1621 supply_register (ASR31_REGNUM, NULL);
1622 supply_register (ICC_REGNUM, NULL);
1623 supply_register (XCC_REGNUM, NULL);
1627 supply_register (CPS_REGNUM, NULL);
1632 fill_gregset (gdb_gregset_t *gregsetp, int regno)
1634 prgreg_t *regp = (prgreg_t *) gregsetp;
1635 int regi, offset = 0;
1637 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1638 then the gregset may contain 64-bit ints while supply_register
1639 is expecting 32-bit ints. Compensate. */
1640 if (sizeof (regp[0]) == 8 && SPARC_INTREG_SIZE == 4)
1643 for (regi = 0; regi <= R_I7; regi++)
1644 if ((regno == -1) || (regno == regi))
1645 deprecated_read_register_gen (regi, (char *) (regp + regi) + offset);
1647 if ((regno == -1) || (regno == PC_REGNUM))
1648 deprecated_read_register_gen (PC_REGNUM, (char *) (regp + R_PC) + offset);
1650 if ((regno == -1) || (regno == NPC_REGNUM))
1651 deprecated_read_register_gen (NPC_REGNUM, (char *) (regp + R_nPC) + offset);
1653 if ((regno == -1) || (regno == Y_REGNUM))
1654 deprecated_read_register_gen (Y_REGNUM, (char *) (regp + R_Y) + offset);
1656 if (GDB_TARGET_IS_SPARC64)
1659 if (regno == -1 || regno == CCR_REGNUM)
1660 deprecated_read_register_gen (CCR_REGNUM, ((char *) (regp + R_CCR)) + offset);
1663 if (regno == -1 || regno == FPRS_REGNUM)
1664 deprecated_read_register_gen (FPRS_REGNUM, ((char *) (regp + R_FPRS)) + offset);
1667 if (regno == -1 || regno == ASI_REGNUM)
1668 deprecated_read_register_gen (ASI_REGNUM, ((char *) (regp + R_ASI)) + offset);
1674 if (regno == -1 || regno == PS_REGNUM)
1675 deprecated_read_register_gen (PS_REGNUM, ((char *) (regp + R_PS)) + offset);
1678 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1679 Steal R_ASI and R_FPRS, and hope for the best! */
1681 #if !defined (R_WIM) && defined (R_ASI)
1685 #if !defined (R_TBR) && defined (R_FPRS)
1686 #define R_TBR R_FPRS
1690 if (regno == -1 || regno == WIM_REGNUM)
1691 deprecated_read_register_gen (WIM_REGNUM, ((char *) (regp + R_WIM)) + offset);
1693 if (regno == -1 || regno == WIM_REGNUM)
1694 deprecated_read_register_gen (WIM_REGNUM, NULL);
1698 if (regno == -1 || regno == TBR_REGNUM)
1699 deprecated_read_register_gen (TBR_REGNUM, ((char *) (regp + R_TBR)) + offset);
1701 if (regno == -1 || regno == TBR_REGNUM)
1702 deprecated_read_register_gen (TBR_REGNUM, NULL);
1707 /* Given a pointer to a floating point register set in /proc format
1708 (fpregset_t *), unpack the register contents and supply them as gdb's
1709 idea of the current floating point register values. */
1712 supply_fpregset (gdb_fpregset_t *fpregsetp)
1720 for (regi = FP0_REGNUM; regi < FP_MAX_REGNUM; regi++)
1722 from = (char *) &fpregsetp->pr_fr.pr_regs[regi - FP0_REGNUM];
1723 supply_register (regi, from);
1726 if (GDB_TARGET_IS_SPARC64)
1729 * don't know how to get value of the following.
1731 supply_register (FSR_REGNUM, NULL); /* zero it out for now */
1732 supply_register (FCC0_REGNUM, NULL);
1733 supply_register (FCC1_REGNUM, NULL); /* don't know how to get value */
1734 supply_register (FCC2_REGNUM, NULL); /* don't know how to get value */
1735 supply_register (FCC3_REGNUM, NULL); /* don't know how to get value */
1739 supply_register (FPS_REGNUM, (char *) &(fpregsetp->pr_fsr));
1743 /* Given a pointer to a floating point register set in /proc format
1744 (fpregset_t *), update the register specified by REGNO from gdb's idea
1745 of the current floating point register set. If REGNO is -1, update
1747 /* This will probably need some changes for sparc64. */
1750 fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
1759 for (regi = FP0_REGNUM; regi < FP_MAX_REGNUM; regi++)
1761 if ((regno == -1) || (regno == regi))
1763 from = (char *) &deprecated_registers[REGISTER_BYTE (regi)];
1764 to = (char *) &fpregsetp->pr_fr.pr_regs[regi - FP0_REGNUM];
1765 memcpy (to, from, REGISTER_RAW_SIZE (regi));
1769 if (!(GDB_TARGET_IS_SPARC64)) /* FIXME: does Sparc64 have this register? */
1770 if ((regno == -1) || (regno == FPS_REGNUM))
1772 from = (char *)&deprecated_registers[REGISTER_BYTE (FPS_REGNUM)];
1773 to = (char *) &fpregsetp->pr_fsr;
1774 memcpy (to, from, REGISTER_RAW_SIZE (FPS_REGNUM));
1778 #endif /* USE_PROC_FS */
1780 /* Because of Multi-arch, GET_LONGJMP_TARGET is always defined. So test
1781 for a definition of JB_PC. */
1784 /* Figure out where the longjmp will land. We expect that we have just entered
1785 longjmp and haven't yet setup the stack frame, so the args are still in the
1786 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1787 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1788 This routine returns true on success */
1791 get_longjmp_target (CORE_ADDR *pc)
1794 #define LONGJMP_TARGET_SIZE 4
1795 char buf[LONGJMP_TARGET_SIZE];
1797 jb_addr = read_register (O0_REGNUM);
1799 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
1800 LONGJMP_TARGET_SIZE))
1803 *pc = extract_address (buf, LONGJMP_TARGET_SIZE);
1807 #endif /* GET_LONGJMP_TARGET */
1809 #ifdef STATIC_TRANSFORM_NAME
1810 /* SunPRO (3.0 at least), encodes the static variables. This is not
1811 related to C++ mangling, it is done for C too. */
1814 sunpro_static_transform_name (char *name)
1819 /* For file-local statics there will be a dollar sign, a bunch
1820 of junk (the contents of which match a string given in the
1821 N_OPT), a period and the name. For function-local statics
1822 there will be a bunch of junk (which seems to change the
1823 second character from 'A' to 'B'), a period, the name of the
1824 function, and the name. So just skip everything before the
1826 p = strrchr (name, '.');
1832 #endif /* STATIC_TRANSFORM_NAME */
1835 /* Utilities for printing registers.
1836 Page numbers refer to the SPARC Architecture Manual. */
1838 static void dump_ccreg (char *, int);
1841 dump_ccreg (char *reg, int val)
1844 printf_unfiltered ("%s:%s,%s,%s,%s", reg,
1845 val & 8 ? "N" : "NN",
1846 val & 4 ? "Z" : "NZ",
1847 val & 2 ? "O" : "NO",
1848 val & 1 ? "C" : "NC");
1852 decode_asi (int val)
1858 return "ASI_NUCLEUS";
1860 return "ASI_NUCLEUS_LITTLE";
1862 return "ASI_AS_IF_USER_PRIMARY";
1864 return "ASI_AS_IF_USER_SECONDARY";
1866 return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1868 return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1870 return "ASI_PRIMARY";
1872 return "ASI_SECONDARY";
1874 return "ASI_PRIMARY_NOFAULT";
1876 return "ASI_SECONDARY_NOFAULT";
1878 return "ASI_PRIMARY_LITTLE";
1880 return "ASI_SECONDARY_LITTLE";
1882 return "ASI_PRIMARY_NOFAULT_LITTLE";
1884 return "ASI_SECONDARY_NOFAULT_LITTLE";
1890 /* Pretty print various registers. */
1891 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1894 sparc_print_register_hook (int regno)
1898 /* Handle double/quad versions of lower 32 fp regs. */
1899 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32
1900 && (regno & 1) == 0)
1904 if (frame_register_read (deprecated_selected_frame, regno, value)
1905 && frame_register_read (deprecated_selected_frame, regno + 1, value + 4))
1907 printf_unfiltered ("\t");
1908 print_floating (value, builtin_type_double, gdb_stdout);
1910 #if 0 /* FIXME: gdb doesn't handle long doubles */
1911 if ((regno & 3) == 0)
1913 if (frame_register_read (deprecated_selected_frame, regno + 2, value + 8)
1914 && frame_register_read (deprecated_selected_frame, regno + 3, value + 12))
1916 printf_unfiltered ("\t");
1917 print_floating (value, builtin_type_long_double, gdb_stdout);
1924 #if 0 /* FIXME: gdb doesn't handle long doubles */
1925 /* Print upper fp regs as long double if appropriate. */
1926 if (regno >= FP0_REGNUM + 32 && regno < FP_MAX_REGNUM
1927 /* We test for even numbered regs and not a multiple of 4 because
1928 the upper fp regs are recorded as doubles. */
1929 && (regno & 1) == 0)
1933 if (frame_register_read (deprecated_selected_frame, regno, value)
1934 && frame_register_read (deprecated_selected_frame, regno + 1, value + 8))
1936 printf_unfiltered ("\t");
1937 print_floating (value, builtin_type_long_double, gdb_stdout);
1943 /* FIXME: Some of these are priviledged registers.
1944 Not sure how they should be handled. */
1946 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1948 val = read_register (regno);
1951 if (GDB_TARGET_IS_SPARC64)
1955 printf_unfiltered ("\t");
1956 dump_ccreg ("xcc", val >> 4);
1957 printf_unfiltered (", ");
1958 dump_ccreg ("icc", val & 15);
1961 printf ("\tfef:%d, du:%d, dl:%d",
1962 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1966 static char *fcc[4] =
1967 {"=", "<", ">", "?"};
1968 static char *rd[4] =
1969 {"N", "0", "+", "-"};
1970 /* Long, but I'd rather leave it as is and use a wide screen. */
1971 printf_filtered ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ",
1972 fcc[BITS (10, 3)], fcc[BITS (32, 3)],
1973 fcc[BITS (34, 3)], fcc[BITS (36, 3)],
1974 rd[BITS (30, 3)], BITS (23, 31));
1975 printf_filtered ("ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1976 BITS (22, 1), BITS (17, 7), BITS (14, 7),
1977 BITS (13, 1), BITS (5, 31), BITS (0, 31));
1982 char *asi = decode_asi (val);
1984 printf ("\t%s", asi);
1988 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1989 BITS (48, 0xffff), BITS (32, 0xffff),
1990 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1994 static char *mm[4] =
1995 {"tso", "pso", "rso", "?"};
1996 printf_filtered ("\tcle:%d, tle:%d, mm:%s, red:%d, ",
1997 BITS (9, 1), BITS (8, 1),
1998 mm[BITS (6, 3)], BITS (5, 1));
1999 printf_filtered ("pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
2000 BITS (4, 1), BITS (3, 1), BITS (2, 1),
2001 BITS (1, 1), BITS (0, 1));
2005 /* FIXME: print all 4? */
2008 /* FIXME: print all 4? */
2011 /* FIXME: print all 4? */
2014 /* FIXME: print all 4? */
2017 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
2020 printf ("\t%d", BITS (0, 31));
2022 case CANSAVE_REGNUM:
2023 printf ("\t%-2d before spill", BITS (0, 31));
2025 case CANRESTORE_REGNUM:
2026 printf ("\t%-2d before fill", BITS (0, 31));
2028 case CLEANWIN_REGNUM:
2029 printf ("\t%-2d before clean", BITS (0, 31));
2031 case OTHERWIN_REGNUM:
2032 printf ("\t%d", BITS (0, 31));
2039 printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
2040 BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
2041 BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
2042 BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
2047 static char *fcc[4] =
2048 {"=", "<", ">", "?"};
2049 static char *rd[4] =
2050 {"N", "0", "+", "-"};
2051 /* Long, but I'd rather leave it as is and use a wide screen. */
2052 printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
2053 "fcc:%s, aexc:%d, cexc:%d",
2054 rd[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
2055 BITS (14, 7), BITS (13, 1), fcc[BITS (10, 3)], BITS (5, 31),
2065 sparc_print_registers (struct gdbarch *gdbarch,
2066 struct ui_file *file,
2067 struct frame_info *frame,
2068 int regnum, int print_all,
2069 void (*print_register_hook) (int))
2072 const int numregs = NUM_REGS + NUM_PSEUDO_REGS;
2073 char raw_buffer[MAX_REGISTER_SIZE];
2074 char virtual_buffer[MAX_REGISTER_SIZE];
2076 for (i = 0; i < numregs; i++)
2078 /* Decide between printing all regs, non-float / vector regs, or
2084 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i)) == TYPE_CODE_FLT)
2086 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i)))
2096 /* If the register name is empty, it is undefined for this
2097 processor, so don't display anything. */
2098 if (REGISTER_NAME (i) == NULL || *(REGISTER_NAME (i)) == '\0')
2101 fputs_filtered (REGISTER_NAME (i), file);
2102 print_spaces_filtered (15 - strlen (REGISTER_NAME (i)), file);
2104 /* Get the data in raw format. */
2105 if (! frame_register_read (frame, i, raw_buffer))
2107 fprintf_filtered (file, "*value not available*\n");
2111 /* FIXME: cagney/2002-08-03: This code shouldn't be necessary.
2112 The function frame_register_read() should have returned the
2113 pre-cooked register so no conversion is necessary. */
2114 /* Convert raw data to virtual format if necessary. */
2115 if (REGISTER_CONVERTIBLE (i))
2117 REGISTER_CONVERT_TO_VIRTUAL (i, REGISTER_VIRTUAL_TYPE (i),
2118 raw_buffer, virtual_buffer);
2122 memcpy (virtual_buffer, raw_buffer,
2123 REGISTER_VIRTUAL_SIZE (i));
2126 /* If virtual format is floating, print it that way, and in raw
2128 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i)) == TYPE_CODE_FLT)
2132 val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
2133 file, 0, 1, 0, Val_pretty_default);
2135 fprintf_filtered (file, "\t(raw 0x");
2136 for (j = 0; j < REGISTER_RAW_SIZE (i); j++)
2139 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
2142 idx = REGISTER_RAW_SIZE (i) - 1 - j;
2143 fprintf_filtered (file, "%02x", (unsigned char) raw_buffer[idx]);
2145 fprintf_filtered (file, ")");
2149 /* Print the register in hex. */
2150 val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
2151 file, 'x', 1, 0, Val_pretty_default);
2152 /* If not a vector register, print it also according to its
2154 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i)) == 0)
2156 fprintf_filtered (file, "\t");
2157 val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
2158 file, 0, 1, 0, Val_pretty_default);
2162 /* Some sparc specific info. */
2163 if (print_register_hook != NULL)
2164 print_register_hook (i);
2166 fprintf_filtered (file, "\n");
2171 sparc_print_registers_info (struct gdbarch *gdbarch,
2172 struct ui_file *file,
2173 struct frame_info *frame,
2174 int regnum, int print_all)
2176 sparc_print_registers (gdbarch, file, frame, regnum, print_all,
2177 sparc_print_register_hook);
2181 sparc_do_registers_info (int regnum, int all)
2183 sparc_print_registers_info (current_gdbarch, gdb_stdout, deprecated_selected_frame,
2188 // OBSOLETE static void
2189 // OBSOLETE sparclet_print_registers_info (struct gdbarch *gdbarch,
2190 // OBSOLETE struct ui_file *file,
2191 // OBSOLETE struct frame_info *frame,
2192 // OBSOLETE int regnum, int print_all)
2194 // OBSOLETE sparc_print_registers (gdbarch, file, frame, regnum, print_all, NULL);
2198 // OBSOLETE sparclet_do_registers_info (int regnum, int all)
2200 // OBSOLETE sparclet_print_registers_info (current_gdbarch, gdb_stdout,
2201 // OBSOLETE deprecated_selected_frame, regnum, all);
2207 gdb_print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
2209 /* It's necessary to override mach again because print_insn messes it up. */
2210 info->mach = TARGET_ARCHITECTURE->mach;
2211 return print_insn_sparc (memaddr, info);
2214 /* The SPARC passes the arguments on the stack; arguments smaller
2215 than an int are promoted to an int. The first 6 words worth of
2216 args are also passed in registers o0 - o5. */
2219 sparc32_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
2220 int struct_return, CORE_ADDR struct_addr)
2223 int accumulate_size = 0;
2230 struct sparc_arg *sparc_args =
2231 (struct sparc_arg *) alloca (nargs * sizeof (struct sparc_arg));
2232 struct sparc_arg *m_arg;
2234 /* Promote arguments if necessary, and calculate their stack offsets
2236 for (i = 0, m_arg = sparc_args; i < nargs; i++, m_arg++)
2238 struct value *arg = args[i];
2239 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
2240 /* Cast argument to long if necessary as the compiler does it too. */
2241 switch (TYPE_CODE (arg_type))
2244 case TYPE_CODE_BOOL:
2245 case TYPE_CODE_CHAR:
2246 case TYPE_CODE_RANGE:
2247 case TYPE_CODE_ENUM:
2248 if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
2250 arg_type = builtin_type_long;
2251 arg = value_cast (arg_type, arg);
2257 m_arg->len = TYPE_LENGTH (arg_type);
2258 m_arg->offset = accumulate_size;
2259 accumulate_size = (accumulate_size + m_arg->len + 3) & ~3;
2260 m_arg->contents = VALUE_CONTENTS (arg);
2263 /* Make room for the arguments on the stack. */
2264 accumulate_size += DEPRECATED_CALL_DUMMY_STACK_ADJUST;
2265 sp = ((sp - accumulate_size) & ~7) + DEPRECATED_CALL_DUMMY_STACK_ADJUST;
2267 /* `Push' arguments on the stack. */
2268 for (i = 0, oregnum = 0, m_arg = sparc_args;
2272 write_memory (sp + m_arg->offset, m_arg->contents, m_arg->len);
2274 j < m_arg->len && oregnum < 6;
2275 j += SPARC_INTREG_SIZE, oregnum++)
2276 deprecated_write_register_gen (O0_REGNUM + oregnum, m_arg->contents + j);
2283 /* Extract from an array REGBUF containing the (raw) register state
2284 a function return value of type TYPE, and copy that, in virtual format,
2288 sparc32_extract_return_value (struct type *type, char *regbuf, char *valbuf)
2290 int typelen = TYPE_LENGTH (type);
2291 int regsize = REGISTER_RAW_SIZE (O0_REGNUM);
2293 if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
2294 memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM)], typelen);
2297 ®buf[O0_REGNUM * regsize +
2299 || TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE ? 0
2300 : regsize - typelen)],
2305 /* Write into appropriate registers a function return value
2306 of type TYPE, given in virtual format. On SPARCs with FPUs,
2307 float values are returned in %f0 (and %f1). In all other cases,
2308 values are returned in register %o0. */
2311 sparc_store_return_value (struct type *type, char *valbuf)
2316 buffer = alloca (MAX_REGISTER_RAW_SIZE);
2318 if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
2319 /* Floating-point values are returned in the register pair */
2320 /* formed by %f0 and %f1 (doubles are, anyway). */
2323 /* Other values are returned in register %o0. */
2326 /* Add leading zeros to the value. */
2327 if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (regno))
2329 memset (buffer, 0, REGISTER_RAW_SIZE (regno));
2330 memcpy (buffer + REGISTER_RAW_SIZE (regno) - TYPE_LENGTH (type), valbuf,
2331 TYPE_LENGTH (type));
2332 deprecated_write_register_gen (regno, buffer);
2335 deprecated_write_register_bytes (REGISTER_BYTE (regno), valbuf,
2336 TYPE_LENGTH (type));
2340 // OBSOLETE extern void
2341 // OBSOLETE sparclet_store_return_value (struct type *type, char *valbuf)
2343 // OBSOLETE /* Other values are returned in register %o0. */
2344 // OBSOLETE deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM), valbuf,
2345 // OBSOLETE TYPE_LENGTH (type));
2350 #ifndef CALL_DUMMY_CALL_OFFSET
2351 #define CALL_DUMMY_CALL_OFFSET \
2352 (gdbarch_tdep (current_gdbarch)->call_dummy_call_offset)
2353 #endif /* CALL_DUMMY_CALL_OFFSET */
2355 /* Insert the function address into a call dummy instruction sequence
2358 For structs and unions, if the function was compiled with Sun cc,
2359 it expects 'unimp' after the call. But gcc doesn't use that
2360 (twisted) convention. So leave a nop there for gcc
2361 (DEPRECATED_FIX_CALL_DUMMY can assume it is operating on a pristine
2362 CALL_DUMMY, not one that has already been customized for a
2363 different function). */
2366 sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
2367 struct type *value_type, int using_gcc)
2371 /* Store the relative adddress of the target function into the
2372 'call' instruction. */
2373 store_unsigned_integer (dummy + CALL_DUMMY_CALL_OFFSET, 4,
2375 | (((fun - (pc + CALL_DUMMY_CALL_OFFSET)) >> 2)
2378 /* If the called function returns an aggregate value, fill in the UNIMP
2379 instruction containing the size of the returned aggregate return value,
2380 which follows the call instruction.
2381 For details see the SPARC Architecture Manual Version 8, Appendix D.3.
2383 Adjust the call_dummy_breakpoint_offset for the bp_call_dummy breakpoint
2384 to the proper address in the call dummy, so that `finish' after a stop
2385 in a call dummy works.
2387 Tweeking current_gdbarch is not an optimal solution, but the call
2388 to sparc_fix_call_dummy is immediately followed by a call to
2389 call_function_by_hand, which is the only function where
2390 dummy_breakpoint_offset is actually used, if it is non-zero. */
2391 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
2392 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
2394 store_unsigned_integer (dummy + CALL_DUMMY_CALL_OFFSET + 8, 4,
2395 TYPE_LENGTH (value_type) & 0x1fff);
2396 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch, 0x30);
2399 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch, 0x2c);
2401 if (!(GDB_TARGET_IS_SPARC64))
2403 /* If this is not a simulator target, change the first four
2404 instructions of the call dummy to NOPs. Those instructions
2405 include a 'save' instruction and are designed to work around
2406 problems with register window flushing in the simulator. */
2408 if (strcmp (target_shortname, "sim") != 0)
2410 for (i = 0; i < 4; i++)
2411 store_unsigned_integer (dummy + (i * 4), 4, 0x01000000);
2416 // OBSOLETE /* If this is a bi-endian target, GDB has written the call dummy
2417 // OBSOLETE in little-endian order. We must byte-swap it back to big-endian. */
2418 // OBSOLETE if (bi_endian)
2420 // OBSOLETE for (i = 0; i < CALL_DUMMY_LENGTH; i += 4)
2422 // OBSOLETE char tmp = dummy[i];
2423 // OBSOLETE dummy[i] = dummy[i + 3];
2424 // OBSOLETE dummy[i + 3] = tmp;
2425 // OBSOLETE tmp = dummy[i + 1];
2426 // OBSOLETE dummy[i + 1] = dummy[i + 2];
2427 // OBSOLETE dummy[i + 2] = tmp;
2435 // OBSOLETE /* Set target byte order based on machine type. */
2437 // OBSOLETE static int
2438 // OBSOLETE sparc_target_architecture_hook (const bfd_arch_info_type *ap)
2440 // OBSOLETE int i, j;
2442 // OBSOLETE if (ap->mach == bfd_mach_sparc_sparclite_le)
2444 // OBSOLETE target_byte_order = BFD_ENDIAN_LITTLE;
2445 // OBSOLETE bi_endian = 1;
2448 // OBSOLETE bi_endian = 0;
2449 // OBSOLETE return 1;
2454 * Module "constructor" function.
2457 static struct gdbarch * sparc_gdbarch_init (struct gdbarch_info info,
2458 struct gdbarch_list *arches);
2459 static void sparc_dump_tdep (struct gdbarch *, struct ui_file *);
2462 _initialize_sparc_tdep (void)
2464 /* Hook us into the gdbarch mechanism. */
2465 gdbarch_register (bfd_arch_sparc, sparc_gdbarch_init, sparc_dump_tdep);
2467 deprecated_tm_print_insn = gdb_print_insn_sparc;
2468 deprecated_tm_print_insn_info.mach = TM_PRINT_INSN_MACH; /* Selects sparc/sparclite */
2469 /* OBSOLETE target_architecture_hook = sparc_target_architecture_hook; */
2472 /* Compensate for stack bias. Note that we currently don't handle
2473 mixed 32/64 bit code. */
2476 sparc64_read_sp (void)
2478 CORE_ADDR sp = read_register (SP_REGNUM);
2486 sparc64_read_fp (void)
2488 CORE_ADDR fp = read_register (DEPRECATED_FP_REGNUM);
2496 sparc64_write_sp (CORE_ADDR val)
2498 CORE_ADDR oldsp = read_register (SP_REGNUM);
2500 write_register (SP_REGNUM, val - 2047);
2502 write_register (SP_REGNUM, val);
2505 /* The SPARC 64 ABI passes floating-point arguments in FP0 to FP31,
2506 and all other arguments in O0 to O5. They are also copied onto
2507 the stack in the correct places. Apparently (empirically),
2508 structs of less than 16 bytes are passed member-by-member in
2509 separate registers, but I am unable to figure out the algorithm.
2510 Some members go in floating point regs, but I don't know which.
2512 FIXME: Handle small structs (less than 16 bytes containing floats).
2514 The counting regimen for using both integer and FP registers
2515 for argument passing is rather odd -- a single counter is used
2516 for both; this means that if the arguments alternate between
2517 int and float, we will waste every other register of both types. */
2520 sparc64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
2521 int struct_return, CORE_ADDR struct_retaddr)
2523 int i, j, register_counter = 0;
2525 struct type *sparc_intreg_type =
2526 TYPE_LENGTH (builtin_type_long) == SPARC_INTREG_SIZE ?
2527 builtin_type_long : builtin_type_long_long;
2529 sp = (sp & ~(((unsigned long) SPARC_INTREG_SIZE) - 1UL));
2531 /* Figure out how much space we'll need. */
2532 for (i = nargs - 1; i >= 0; i--)
2534 int len = TYPE_LENGTH (check_typedef (VALUE_TYPE (args[i])));
2535 struct value *copyarg = args[i];
2538 if (copylen < SPARC_INTREG_SIZE)
2540 copyarg = value_cast (sparc_intreg_type, copyarg);
2541 copylen = SPARC_INTREG_SIZE;
2550 /* if STRUCT_RETURN, then first argument is the struct return location. */
2552 write_register (O0_REGNUM + register_counter++, struct_retaddr);
2554 /* Now write the arguments onto the stack, while writing FP
2555 arguments into the FP registers, and other arguments into the
2556 first six 'O' registers. */
2558 for (i = 0; i < nargs; i++)
2560 int len = TYPE_LENGTH (check_typedef (VALUE_TYPE (args[i])));
2561 struct value *copyarg = args[i];
2562 enum type_code typecode = TYPE_CODE (VALUE_TYPE (args[i]));
2565 if (typecode == TYPE_CODE_INT ||
2566 typecode == TYPE_CODE_BOOL ||
2567 typecode == TYPE_CODE_CHAR ||
2568 typecode == TYPE_CODE_RANGE ||
2569 typecode == TYPE_CODE_ENUM)
2570 if (len < SPARC_INTREG_SIZE)
2572 /* Small ints will all take up the size of one intreg on
2574 copyarg = value_cast (sparc_intreg_type, copyarg);
2575 copylen = SPARC_INTREG_SIZE;
2578 write_memory (tempsp, VALUE_CONTENTS (copyarg), copylen);
2581 /* Corner case: Structs consisting of a single float member are floats.
2582 * FIXME! I don't know about structs containing multiple floats!
2583 * Structs containing mixed floats and ints are even more weird.
2588 /* Separate float args from all other args. */
2589 if (typecode == TYPE_CODE_FLT && SPARC_HAS_FPU)
2591 if (register_counter < 16)
2593 /* This arg gets copied into a FP register. */
2597 case 4: /* Single-precision (float) */
2598 fpreg = FP0_REGNUM + 2 * register_counter + 1;
2599 register_counter += 1;
2601 case 8: /* Double-precision (double) */
2602 fpreg = FP0_REGNUM + 2 * register_counter;
2603 register_counter += 1;
2605 case 16: /* Quad-precision (long double) */
2606 fpreg = FP0_REGNUM + 2 * register_counter;
2607 register_counter += 2;
2610 internal_error (__FILE__, __LINE__, "bad switch");
2612 deprecated_write_register_bytes (REGISTER_BYTE (fpreg),
2613 VALUE_CONTENTS (args[i]),
2617 else /* all other args go into the first six 'o' registers */
2620 j < len && register_counter < 6;
2621 j += SPARC_INTREG_SIZE)
2623 int oreg = O0_REGNUM + register_counter;
2625 deprecated_write_register_gen (oreg, VALUE_CONTENTS (copyarg) + j);
2626 register_counter += 1;
2633 /* Values <= 32 bytes are returned in o0-o3 (floating-point values are
2634 returned in f0-f3). */
2637 sp64_extract_return_value (struct type *type, char *regbuf, char *valbuf,
2640 int typelen = TYPE_LENGTH (type);
2641 int regsize = REGISTER_RAW_SIZE (O0_REGNUM);
2643 if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
2645 memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM)], typelen);
2649 if (TYPE_CODE (type) != TYPE_CODE_STRUCT
2650 || (TYPE_LENGTH (type) > 32))
2653 ®buf[O0_REGNUM * regsize +
2654 (typelen >= regsize ? 0 : regsize - typelen)],
2660 char *o0 = ®buf[O0_REGNUM * regsize];
2661 char *f0 = ®buf[FP0_REGNUM * regsize];
2664 for (x = 0; x < TYPE_NFIELDS (type); x++)
2666 struct field *f = &TYPE_FIELDS (type)[x];
2667 /* FIXME: We may need to handle static fields here. */
2668 int whichreg = (f->loc.bitpos + bitoffset) / 32;
2669 int remainder = ((f->loc.bitpos + bitoffset) % 32) / 8;
2670 int where = (f->loc.bitpos + bitoffset) / 8;
2671 int size = TYPE_LENGTH (f->type);
2672 int typecode = TYPE_CODE (f->type);
2674 if (typecode == TYPE_CODE_STRUCT)
2676 sp64_extract_return_value (f->type,
2679 bitoffset + f->loc.bitpos);
2681 else if (typecode == TYPE_CODE_FLT && SPARC_HAS_FPU)
2683 memcpy (valbuf + where, &f0[whichreg * 4] + remainder, size);
2687 memcpy (valbuf + where, &o0[whichreg * 4] + remainder, size);
2694 sparc64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
2696 sp64_extract_return_value (type, regbuf, valbuf, 0);
2700 // OBSOLETE extern void
2701 // OBSOLETE sparclet_extract_return_value (struct type *type,
2702 // OBSOLETE char *regbuf,
2703 // OBSOLETE char *valbuf)
2705 // OBSOLETE regbuf += REGISTER_RAW_SIZE (O0_REGNUM) * 8;
2706 // OBSOLETE if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (O0_REGNUM))
2707 // OBSOLETE regbuf += REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH (type);
2709 // OBSOLETE memcpy ((void *) valbuf, regbuf, TYPE_LENGTH (type));
2714 sparc32_stack_align (CORE_ADDR addr)
2716 return ((addr + 7) & -8);
2720 sparc64_stack_align (CORE_ADDR addr)
2722 return ((addr + 15) & -16);
2726 sparc_print_extra_frame_info (struct frame_info *fi)
2728 if (fi && get_frame_extra_info (fi) && get_frame_extra_info (fi)->flat)
2729 printf_filtered (" flat, pc saved at 0x%s, fp saved at 0x%s\n",
2730 paddr_nz (get_frame_extra_info (fi)->pc_addr),
2731 paddr_nz (get_frame_extra_info (fi)->fp_addr));
2734 /* MULTI_ARCH support */
2737 sparc32_register_name (int regno)
2739 static char *register_names[] =
2740 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2741 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2742 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2743 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2745 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2746 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2747 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2748 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2750 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr"
2754 regno >= (sizeof (register_names) / sizeof (register_names[0])))
2757 return register_names[regno];
2761 sparc64_register_name (int regno)
2763 static char *register_names[] =
2764 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2765 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2766 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2767 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2769 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2770 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2771 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2772 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2773 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
2774 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
2776 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", "ver",
2777 "tick", "pil", "pstate", "tstate", "tba", "tl", "tt", "tpc",
2778 "tnpc", "wstate", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
2779 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", "asr22", "asr23",
2780 "asr24", "asr25", "asr26", "asr27", "asr28", "asr29", "asr30", "asr31",
2781 /* These are here at the end to simplify removing them if we have to. */
2782 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"
2786 regno >= (sizeof (register_names) / sizeof (register_names[0])))
2789 return register_names[regno];
2793 // OBSOLETE static const char *
2794 // OBSOLETE sparclite_register_name (int regno)
2796 // OBSOLETE static char *register_names[] =
2797 // OBSOLETE { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2798 // OBSOLETE "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2799 // OBSOLETE "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2800 // OBSOLETE "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2802 // OBSOLETE "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2803 // OBSOLETE "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2804 // OBSOLETE "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2805 // OBSOLETE "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2807 // OBSOLETE "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr",
2808 // OBSOLETE "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr"
2811 // OBSOLETE if (regno < 0 ||
2812 // OBSOLETE regno >= (sizeof (register_names) / sizeof (register_names[0])))
2813 // OBSOLETE return NULL;
2815 // OBSOLETE return register_names[regno];
2820 // OBSOLETE static const char *
2821 // OBSOLETE sparclet_register_name (int regno)
2823 // OBSOLETE static char *register_names[] =
2824 // OBSOLETE { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2825 // OBSOLETE "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2826 // OBSOLETE "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2827 // OBSOLETE "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2829 // OBSOLETE "", "", "", "", "", "", "", "", /* no floating point registers */
2830 // OBSOLETE "", "", "", "", "", "", "", "",
2831 // OBSOLETE "", "", "", "", "", "", "", "",
2832 // OBSOLETE "", "", "", "", "", "", "", "",
2834 // OBSOLETE "y", "psr", "wim", "tbr", "pc", "npc", "", "", /* no FPSR or CPSR */
2835 // OBSOLETE "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "",
2837 // OBSOLETE /* ASR15 ASR19 (don't display them) */
2838 // OBSOLETE "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22"
2839 // OBSOLETE /* None of the rest get displayed */
2841 // OBSOLETE "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7",
2842 // OBSOLETE "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15",
2843 // OBSOLETE "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23",
2844 // OBSOLETE "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31",
2846 // OBSOLETE #endif /* 0 */
2849 // OBSOLETE if (regno < 0 ||
2850 // OBSOLETE regno >= (sizeof (register_names) / sizeof (register_names[0])))
2851 // OBSOLETE return NULL;
2853 // OBSOLETE return register_names[regno];
2858 sparc_push_return_address (CORE_ADDR pc_unused, CORE_ADDR sp)
2860 if (CALL_DUMMY_LOCATION == AT_ENTRY_POINT)
2862 /* The return PC of the dummy_frame is the former 'current' PC
2863 (where we were before we made the target function call).
2864 This is saved in %i7 by push_dummy_frame.
2866 We will save the 'call dummy location' (ie. the address
2867 to which the target function will return) in %o7.
2868 This address will actually be the program's entry point.
2869 There will be a special call_dummy breakpoint there. */
2871 write_register (O7_REGNUM,
2872 CALL_DUMMY_ADDRESS () - 8);
2878 /* Should call_function allocate stack space for a struct return? */
2881 sparc64_use_struct_convention (int gcc_p, struct type *type)
2883 return (TYPE_LENGTH (type) > 32);
2886 /* Store the address of the place in which to copy the structure the
2887 subroutine will return. This is called from call_function_by_hand.
2888 The ultimate mystery is, tho, what is the value "16"?
2890 MVS: That's the offset from where the sp is now, to where the
2891 subroutine is gonna expect to find the struct return address. */
2894 sparc32_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
2899 val = alloca (SPARC_INTREG_SIZE);
2900 store_unsigned_integer (val, SPARC_INTREG_SIZE, addr);
2901 write_memory (sp + (16 * SPARC_INTREG_SIZE), val, SPARC_INTREG_SIZE);
2903 if (CALL_DUMMY_LOCATION == AT_ENTRY_POINT)
2905 /* Now adjust the value of the link register, which was previously
2906 stored by push_return_address. Functions that return structs are
2907 peculiar in that they return to link register + 12, rather than
2908 link register + 8. */
2910 o7 = read_register (O7_REGNUM);
2911 write_register (O7_REGNUM, o7 - 4);
2916 sparc64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
2918 /* FIXME: V9 uses %o0 for this. */
2919 /* FIXME MVS: Only for small enough structs!!! */
2921 target_write_memory (sp + (16 * SPARC_INTREG_SIZE),
2922 (char *) &addr, SPARC_INTREG_SIZE);
2924 if (CALL_DUMMY_LOCATION == AT_ENTRY_POINT)
2926 /* Now adjust the value of the link register, which was previously
2927 stored by push_return_address. Functions that return structs are
2928 peculiar in that they return to link register + 12, rather than
2929 link register + 8. */
2931 write_register (O7_REGNUM, read_register (O7_REGNUM) - 4);
2936 /* Default target data type for register REGNO. */
2938 static struct type *
2939 sparc32_register_virtual_type (int regno)
2941 if (regno == PC_REGNUM ||
2942 regno == DEPRECATED_FP_REGNUM ||
2944 return builtin_type_unsigned_int;
2946 return builtin_type_int;
2948 return builtin_type_float;
2949 return builtin_type_int;
2952 static struct type *
2953 sparc64_register_virtual_type (int regno)
2955 if (regno == PC_REGNUM ||
2956 regno == DEPRECATED_FP_REGNUM ||
2958 return builtin_type_unsigned_long_long;
2960 return builtin_type_long_long;
2962 return builtin_type_float;
2964 return builtin_type_double;
2965 return builtin_type_long_long;
2968 /* Number of bytes of storage in the actual machine representation for
2972 sparc32_register_size (int regno)
2978 sparc64_register_size (int regno)
2980 return (regno < 32 ? 8 : regno < 64 ? 4 : 8);
2983 /* Index within the `registers' buffer of the first byte of the space
2984 for register REGNO. */
2987 sparc32_register_byte (int regno)
2993 sparc64_register_byte (int regno)
2997 else if (regno < 64)
2998 return 32 * 8 + (regno - 32) * 4;
2999 else if (regno < 80)
3000 return 32 * 8 + 32 * 4 + (regno - 64) * 8;
3002 return 64 * 8 + (regno - 80) * 8;
3005 /* Immediately after a function call, return the saved pc.
3006 Can't go through the frames for this because on some machines
3007 the new frame is not set up until the new function executes
3008 some instructions. */
3011 sparc_saved_pc_after_call (struct frame_info *fi)
3013 return sparc_pc_adjust (read_register (RP_REGNUM));
3016 /* Convert registers between 'raw' and 'virtual' formats.
3017 They are the same on sparc, so there's nothing to do. */
3020 sparc_convert_to_virtual (int regnum, struct type *type, char *from, char *to)
3021 { /* do nothing (should never be called) */
3025 sparc_convert_to_raw (struct type *type, int regnum, char *from, char *to)
3026 { /* do nothing (should never be called) */
3029 /* Init saved regs: nothing to do, just a place-holder function. */
3032 sparc_frame_init_saved_regs (struct frame_info *fi_ignored)
3036 /* gdbarch fix call dummy:
3037 All this function does is rearrange the arguments before calling
3038 sparc_fix_call_dummy (which does the real work). */
3041 sparc_gdbarch_fix_call_dummy (char *dummy,
3045 struct value **args,
3049 if (CALL_DUMMY_LOCATION == ON_STACK)
3050 sparc_fix_call_dummy (dummy, pc, fun, type, gcc_p);
3053 /* CALL_DUMMY_ADDRESS: fetch the breakpoint address for a call dummy. */
3056 sparc_call_dummy_address (void)
3058 return (DEPRECATED_CALL_DUMMY_START_OFFSET) + DEPRECATED_CALL_DUMMY_BREAKPOINT_OFFSET;
3061 /* Supply the Y register number to those that need it. */
3064 sparc_y_regnum (void)
3066 return gdbarch_tdep (current_gdbarch)->y_regnum;
3070 sparc_reg_struct_has_addr (int gcc_p, struct type *type)
3072 if (GDB_TARGET_IS_SPARC64)
3073 return (TYPE_LENGTH (type) > 32);
3075 return (gcc_p != 1);
3079 sparc_intreg_size (void)
3081 return SPARC_INTREG_SIZE;
3085 sparc_return_value_on_stack (struct type *type)
3087 if (TYPE_CODE (type) == TYPE_CODE_FLT &&
3088 TYPE_LENGTH (type) > 8)
3095 * Gdbarch "constructor" function.
3098 #define SPARC32_CALL_DUMMY_ON_STACK
3100 #define SPARC_SP_REGNUM 14
3101 #define SPARC_FP_REGNUM 30
3102 #define SPARC_FP0_REGNUM 32
3103 #define SPARC32_NPC_REGNUM 69
3104 #define SPARC32_PC_REGNUM 68
3105 #define SPARC32_Y_REGNUM 64
3106 #define SPARC64_PC_REGNUM 80
3107 #define SPARC64_NPC_REGNUM 81
3108 #define SPARC64_Y_REGNUM 85
3110 static struct gdbarch *
3111 sparc_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3113 struct gdbarch *gdbarch;
3114 struct gdbarch_tdep *tdep;
3116 static LONGEST call_dummy_32[] =
3117 { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,
3118 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,
3119 0xd203a048, 0x40000000, 0xd003a044, 0x01000000,
3120 0x91d02001, 0x01000000
3122 static LONGEST call_dummy_64[] =
3123 { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,
3124 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,
3125 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,
3126 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,
3127 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,
3128 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,
3129 0xf03fa73f01000000LL, 0x0100000001000000LL,
3130 0x0100000091580000LL, 0xd027a72b93500000LL,
3131 0xd027a72791480000LL, 0xd027a72391400000LL,
3132 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,
3133 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,
3134 0x0100000091d02001LL, 0x0100000001000000LL
3136 static LONGEST call_dummy_nil[] = {0};
3138 /* Try to determine the OS ABI of the object we are loading. */
3140 if (info.abfd != NULL
3141 && info.osabi == GDB_OSABI_UNKNOWN)
3143 /* If it's an ELF file, assume it's Solaris. */
3144 if (bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
3145 info.osabi = GDB_OSABI_SOLARIS;
3148 /* First see if there is already a gdbarch that can satisfy the request. */
3149 arches = gdbarch_list_lookup_by_info (arches, &info);
3151 return arches->gdbarch;
3153 /* None found: is the request for a sparc architecture? */
3154 if (info.bfd_arch_info->arch != bfd_arch_sparc)
3155 return NULL; /* No; then it's not for us. */
3157 /* Yes: create a new gdbarch for the specified machine type. */
3158 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
3159 gdbarch = gdbarch_alloc (&info, tdep);
3161 /* First set settings that are common for all sparc architectures. */
3162 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
3163 set_gdbarch_breakpoint_from_pc (gdbarch, memory_breakpoint_from_pc);
3164 set_gdbarch_decr_pc_after_break (gdbarch, 0);
3165 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
3166 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, sparc_extract_struct_value_address);
3167 set_gdbarch_deprecated_fix_call_dummy (gdbarch, sparc_gdbarch_fix_call_dummy);
3168 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
3169 set_gdbarch_deprecated_fp_regnum (gdbarch, SPARC_FP_REGNUM);
3170 set_gdbarch_fp0_regnum (gdbarch, SPARC_FP0_REGNUM);
3171 set_gdbarch_deprecated_frame_chain (gdbarch, sparc_frame_chain);
3172 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sparc_frame_init_saved_regs);
3173 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
3174 set_gdbarch_deprecated_frame_saved_pc (gdbarch, sparc_frame_saved_pc);
3175 set_gdbarch_frameless_function_invocation (gdbarch,
3176 frameless_look_for_prologue);
3177 set_gdbarch_deprecated_get_saved_register (gdbarch, sparc_get_saved_register);
3178 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, sparc_init_extra_frame_info);
3179 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
3180 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
3181 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
3182 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
3183 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 8);
3184 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 8);
3185 set_gdbarch_deprecated_pop_frame (gdbarch, sparc_pop_frame);
3186 set_gdbarch_deprecated_push_return_address (gdbarch, sparc_push_return_address);
3187 set_gdbarch_deprecated_push_dummy_frame (gdbarch, sparc_push_dummy_frame);
3188 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
3189 set_gdbarch_register_convert_to_raw (gdbarch, sparc_convert_to_raw);
3190 set_gdbarch_register_convert_to_virtual (gdbarch,
3191 sparc_convert_to_virtual);
3192 set_gdbarch_register_convertible (gdbarch,
3193 generic_register_convertible_not);
3194 set_gdbarch_reg_struct_has_addr (gdbarch, sparc_reg_struct_has_addr);
3195 set_gdbarch_return_value_on_stack (gdbarch, sparc_return_value_on_stack);
3196 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, sparc_saved_pc_after_call);
3197 set_gdbarch_prologue_frameless_p (gdbarch, sparc_prologue_frameless_p);
3198 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
3199 set_gdbarch_skip_prologue (gdbarch, sparc_skip_prologue);
3200 set_gdbarch_sp_regnum (gdbarch, SPARC_SP_REGNUM);
3201 set_gdbarch_deprecated_use_generic_dummy_frames (gdbarch, 0);
3202 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
3205 * Settings that depend only on 32/64 bit word size
3208 switch (info.bfd_arch_info->mach)
3210 case bfd_mach_sparc:
3212 // OBSOLETE case bfd_mach_sparc_sparclet:
3213 // OBSOLETE case bfd_mach_sparc_sparclite:
3215 case bfd_mach_sparc_v8plus:
3216 case bfd_mach_sparc_v8plusa:
3218 // OBSOLETE case bfd_mach_sparc_sparclite_le:
3220 /* 32-bit machine types: */
3222 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3223 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_on_stack);
3224 set_gdbarch_call_dummy_address (gdbarch, sparc_call_dummy_address);
3225 set_gdbarch_deprecated_call_dummy_breakpoint_offset (gdbarch, 0x30);
3226 set_gdbarch_deprecated_call_dummy_length (gdbarch, 0x38);
3228 /* NOTE: cagney/2003-05-01: Using the just added push_dummy_code
3229 architecture method, it is now possible to implement a
3230 generic dummy frames based inferior function call that stores
3231 the breakpoint (and struct info) on the stack. Further, by
3232 treating a SIGSEG at a breakpoint as equivalent to a SIGTRAP
3233 it is even possible to make this work when the stack is
3236 NOTE: cagney/2002-04-26: Based from info posted by Peter
3237 Schauer around Oct '99. Briefly, due to aspects of the SPARC
3238 ABI, it isn't possible to use ON_STACK with a strictly
3241 Peter Schauer writes ...
3243 No, any call from GDB to a user function returning a
3244 struct/union will fail miserably. Try this:
3263 for (i = 0; i < 4; i++)
3269 Set a breakpoint at the gx = sret () statement, run to it and
3270 issue a `print sret()'. It will not succed with your
3271 approach, and I doubt that continuing the program will work
3274 For details of the ABI see the Sparc Architecture Manual. I
3275 have Version 8 (Prentice Hall ISBN 0-13-825001-4) and the
3276 calling conventions for functions returning aggregate values
3277 are explained in Appendix D.3. */
3279 set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
3280 set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_32);
3282 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point);
3283 set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_nil);
3285 set_gdbarch_deprecated_call_dummy_stack_adjust (gdbarch, 68);
3286 set_gdbarch_frame_args_skip (gdbarch, 68);
3287 set_gdbarch_function_start_offset (gdbarch, 0);
3288 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
3289 set_gdbarch_npc_regnum (gdbarch, SPARC32_NPC_REGNUM);
3290 set_gdbarch_pc_regnum (gdbarch, SPARC32_PC_REGNUM);
3291 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
3292 set_gdbarch_deprecated_push_arguments (gdbarch, sparc32_push_arguments);
3293 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
3295 set_gdbarch_register_byte (gdbarch, sparc32_register_byte);
3296 set_gdbarch_register_raw_size (gdbarch, sparc32_register_size);
3297 set_gdbarch_deprecated_register_size (gdbarch, 4);
3298 set_gdbarch_register_virtual_size (gdbarch, sparc32_register_size);
3299 set_gdbarch_register_virtual_type (gdbarch,
3300 sparc32_register_virtual_type);
3301 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3302 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (call_dummy_32));
3304 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, 0);
3306 set_gdbarch_stack_align (gdbarch, sparc32_stack_align);
3307 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch, 1);
3308 set_gdbarch_deprecated_store_struct_return (gdbarch, sparc32_store_struct_return);
3309 set_gdbarch_use_struct_convention (gdbarch,
3310 generic_use_struct_convention);
3311 set_gdbarch_deprecated_dummy_write_sp (gdbarch, generic_target_write_sp);
3312 tdep->y_regnum = SPARC32_Y_REGNUM;
3313 tdep->fp_max_regnum = SPARC_FP0_REGNUM + 32;
3314 tdep->intreg_size = 4;
3315 tdep->reg_save_offset = 0x60;
3316 tdep->call_dummy_call_offset = 0x24;
3319 case bfd_mach_sparc_v9:
3320 case bfd_mach_sparc_v9a:
3321 /* 64-bit machine types: */
3322 default: /* Any new machine type is likely to be 64-bit. */
3324 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3325 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_on_stack);
3326 set_gdbarch_call_dummy_address (gdbarch, sparc_call_dummy_address);
3327 set_gdbarch_deprecated_call_dummy_breakpoint_offset (gdbarch, 8 * 4);
3328 set_gdbarch_deprecated_call_dummy_length (gdbarch, 192);
3329 set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
3330 set_gdbarch_deprecated_call_dummy_start_offset (gdbarch, 148);
3331 set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_64);
3333 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point);
3334 set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_nil);
3336 set_gdbarch_deprecated_call_dummy_stack_adjust (gdbarch, 128);
3337 set_gdbarch_frame_args_skip (gdbarch, 136);
3338 set_gdbarch_function_start_offset (gdbarch, 0);
3339 set_gdbarch_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
3340 set_gdbarch_npc_regnum (gdbarch, SPARC64_NPC_REGNUM);
3341 set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM);
3342 set_gdbarch_ptr_bit (gdbarch, 8 * TARGET_CHAR_BIT);
3343 set_gdbarch_deprecated_push_arguments (gdbarch, sparc64_push_arguments);
3344 /* NOTE different for at_entry */
3345 set_gdbarch_deprecated_target_read_fp (gdbarch, sparc64_read_fp);
3346 set_gdbarch_read_sp (gdbarch, sparc64_read_sp);
3347 /* Some of the registers aren't 64 bits, but it's a lot simpler just
3348 to assume they all are (since most of them are). */
3349 set_gdbarch_register_byte (gdbarch, sparc64_register_byte);
3350 set_gdbarch_register_raw_size (gdbarch, sparc64_register_size);
3351 set_gdbarch_deprecated_register_size (gdbarch, 8);
3352 set_gdbarch_register_virtual_size (gdbarch, sparc64_register_size);
3353 set_gdbarch_register_virtual_type (gdbarch,
3354 sparc64_register_virtual_type);
3355 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3356 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (call_dummy_64));
3358 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, 0);
3360 set_gdbarch_stack_align (gdbarch, sparc64_stack_align);
3361 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch, 1);
3362 set_gdbarch_deprecated_store_struct_return (gdbarch, sparc64_store_struct_return);
3363 set_gdbarch_use_struct_convention (gdbarch,
3364 sparc64_use_struct_convention);
3365 set_gdbarch_deprecated_dummy_write_sp (gdbarch, sparc64_write_sp);
3366 tdep->y_regnum = SPARC64_Y_REGNUM;
3367 tdep->fp_max_regnum = SPARC_FP0_REGNUM + 48;
3368 tdep->intreg_size = 8;
3369 tdep->reg_save_offset = 0x90;
3370 tdep->call_dummy_call_offset = 148 + 4 * 5;
3375 * Settings that vary per-architecture:
3378 switch (info.bfd_arch_info->mach)
3380 case bfd_mach_sparc:
3381 set_gdbarch_deprecated_extract_return_value (gdbarch, sparc32_extract_return_value);
3382 set_gdbarch_num_regs (gdbarch, 72);
3383 set_gdbarch_register_bytes (gdbarch, 32*4 + 32*4 + 8*4);
3384 set_gdbarch_register_name (gdbarch, sparc32_register_name);
3385 set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3387 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3389 tdep->fp_register_bytes = 32 * 4;
3390 tdep->print_insn_mach = bfd_mach_sparc;
3393 // OBSOLETE case bfd_mach_sparc_sparclet:
3394 // OBSOLETE set_gdbarch_deprecated_extract_return_value (gdbarch, sparclet_extract_return_value);
3395 // OBSOLETE set_gdbarch_num_regs (gdbarch, 32 + 32 + 8 + 8 + 8);
3396 // OBSOLETE set_gdbarch_register_bytes (gdbarch, 32*4 + 32*4 + 8*4 + 8*4 + 8*4);
3397 // OBSOLETE set_gdbarch_register_name (gdbarch, sparclet_register_name);
3398 // OBSOLETE set_gdbarch_deprecated_store_return_value (gdbarch, sparclet_store_return_value);
3399 // OBSOLETE tdep->has_fpu = 0; /* (all but sparclet and sparclite) */
3400 // OBSOLETE tdep->fp_register_bytes = 0;
3401 // OBSOLETE tdep->print_insn_mach = bfd_mach_sparc_sparclet;
3405 // OBSOLETE case bfd_mach_sparc_sparclite:
3406 // OBSOLETE set_gdbarch_deprecated_extract_return_value (gdbarch, sparc32_extract_return_value);
3407 // OBSOLETE set_gdbarch_num_regs (gdbarch, 80);
3408 // OBSOLETE set_gdbarch_register_bytes (gdbarch, 32*4 + 32*4 + 8*4 + 8*4);
3409 // OBSOLETE set_gdbarch_register_name (gdbarch, sparclite_register_name);
3410 // OBSOLETE set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3411 // OBSOLETE tdep->has_fpu = 0; /* (all but sparclet and sparclite) */
3412 // OBSOLETE tdep->fp_register_bytes = 0;
3413 // OBSOLETE tdep->print_insn_mach = bfd_mach_sparc_sparclite;
3416 case bfd_mach_sparc_v8plus:
3417 set_gdbarch_deprecated_extract_return_value (gdbarch, sparc32_extract_return_value);
3418 set_gdbarch_num_regs (gdbarch, 72);
3419 set_gdbarch_register_bytes (gdbarch, 32*4 + 32*4 + 8*4);
3420 set_gdbarch_register_name (gdbarch, sparc32_register_name);
3421 set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3422 tdep->print_insn_mach = bfd_mach_sparc;
3423 tdep->fp_register_bytes = 32 * 4;
3425 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3428 case bfd_mach_sparc_v8plusa:
3429 set_gdbarch_deprecated_extract_return_value (gdbarch, sparc32_extract_return_value);
3430 set_gdbarch_num_regs (gdbarch, 72);
3431 set_gdbarch_register_bytes (gdbarch, 32*4 + 32*4 + 8*4);
3432 set_gdbarch_register_name (gdbarch, sparc32_register_name);
3433 set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3435 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3437 tdep->fp_register_bytes = 32 * 4;
3438 tdep->print_insn_mach = bfd_mach_sparc;
3441 // OBSOLETE case bfd_mach_sparc_sparclite_le:
3442 // OBSOLETE set_gdbarch_deprecated_extract_return_value (gdbarch, sparc32_extract_return_value);
3443 // OBSOLETE set_gdbarch_num_regs (gdbarch, 80);
3444 // OBSOLETE set_gdbarch_register_bytes (gdbarch, 32*4 + 32*4 + 8*4 + 8*4);
3445 // OBSOLETE set_gdbarch_register_name (gdbarch, sparclite_register_name);
3446 // OBSOLETE set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3447 // OBSOLETE tdep->has_fpu = 0; /* (all but sparclet and sparclite) */
3448 // OBSOLETE tdep->fp_register_bytes = 0;
3449 // OBSOLETE tdep->print_insn_mach = bfd_mach_sparc_sparclite;
3452 case bfd_mach_sparc_v9:
3453 set_gdbarch_deprecated_extract_return_value (gdbarch, sparc64_extract_return_value);
3454 set_gdbarch_num_regs (gdbarch, 125);
3455 set_gdbarch_register_bytes (gdbarch, 32*8 + 32*8 + 45*8);
3456 set_gdbarch_register_name (gdbarch, sparc64_register_name);
3457 set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3459 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3461 tdep->fp_register_bytes = 64 * 4;
3462 tdep->print_insn_mach = bfd_mach_sparc_v9a;
3464 case bfd_mach_sparc_v9a:
3465 set_gdbarch_deprecated_extract_return_value (gdbarch, sparc64_extract_return_value);
3466 set_gdbarch_num_regs (gdbarch, 125);
3467 set_gdbarch_register_bytes (gdbarch, 32*8 + 32*8 + 45*8);
3468 set_gdbarch_register_name (gdbarch, sparc64_register_name);
3469 set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3471 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3473 tdep->fp_register_bytes = 64 * 4;
3474 tdep->print_insn_mach = bfd_mach_sparc_v9a;
3478 /* Hook in OS ABI-specific overrides, if they have been registered. */
3479 gdbarch_init_osabi (info, gdbarch);
3485 sparc_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
3487 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
3493 // OBSOLETE fprintf_unfiltered (file, "sparc_dump_tdep: has_fpu = %d\n",
3494 // OBSOLETE tdep->has_fpu);
3496 fprintf_unfiltered (file, "sparc_dump_tdep: fp_register_bytes = %d\n",
3497 tdep->fp_register_bytes);
3498 fprintf_unfiltered (file, "sparc_dump_tdep: y_regnum = %d\n",
3500 fprintf_unfiltered (file, "sparc_dump_tdep: fp_max_regnum = %d\n",
3501 tdep->fp_max_regnum);
3502 fprintf_unfiltered (file, "sparc_dump_tdep: intreg_size = %d\n",
3504 fprintf_unfiltered (file, "sparc_dump_tdep: reg_save_offset = %d\n",
3505 tdep->reg_save_offset);
3506 fprintf_unfiltered (file, "sparc_dump_tdep: call_dummy_call_offset = %d\n",
3507 tdep->call_dummy_call_offset);
3508 fprintf_unfiltered (file, "sparc_dump_tdep: print_insn_match = %d\n",
3509 tdep->print_insn_mach);