1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 Contributed by Steve Chamberlain
35 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
36 #include "gdb_string.h"
38 /* A set of original names, to be used when restoring back to generic
39 registers from a specific set. */
42 static char *sh_generic_reg_names[] = {
43 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
44 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
45 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
47 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
48 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
50 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
51 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
54 static char *sh_reg_names[] = {
55 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
56 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
57 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
59 "", "", "", "", "", "", "", "",
60 "", "", "", "", "", "", "", "",
62 "", "", "", "", "", "", "", "",
63 "", "", "", "", "", "", "", "",
66 static char *sh3_reg_names[] = {
67 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
68 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
69 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
71 "", "", "", "", "", "", "", "",
72 "", "", "", "", "", "", "", "",
74 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
75 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
78 static char *sh3e_reg_names[] = {
79 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
80 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
81 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
83 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
84 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
86 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
87 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
91 char **sh_register_names = sh_generic_reg_names;
96 } sh_processor_type_table[] = {
97 { sh_reg_names, bfd_mach_sh },
98 { sh3_reg_names, bfd_mach_sh3 },
99 { sh3e_reg_names, bfd_mach_sh3e },
100 { sh3e_reg_names, bfd_mach_sh4 },
104 /* Prologue looks like
105 [mov.l <regs>,@-r15]...
111 #define IS_STS(x) ((x) == 0x4f22)
112 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
113 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
114 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
115 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
116 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
117 #define IS_SHLL_R3(x) ((x) == 0x4300)
118 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
119 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
120 #define FPSCR_SZ (1 << 20)
123 /* Should call_function allocate stack space for a struct return? */
125 sh_use_struct_convention (gcc_p, type)
129 return (TYPE_LENGTH (type) > 1);
133 /* Skip any prologue before the guts of a function */
136 sh_skip_prologue (start_pc)
141 w = read_memory_integer (start_pc, 2);
152 w = read_memory_integer (start_pc, 2);
158 /* Disassemble an instruction. */
161 gdb_print_insn_sh (memaddr, info)
163 disassemble_info *info;
165 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
166 return print_insn_sh (memaddr, info);
168 return print_insn_shl (memaddr, info);
171 /* Given a GDB frame, determine the address of the calling function's frame.
172 This will be used to create a new GDB frame struct, and then
173 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
175 For us, the frame address is its stack pointer value, so we look up
176 the function prologue to determine the caller's sp value, and return it. */
179 sh_frame_chain (frame)
180 struct frame_info *frame;
182 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
183 return frame->frame; /* dummy frame same as caller's frame */
184 if (!inside_entry_file (frame->pc))
185 return read_memory_integer (FRAME_FP (frame) + frame->f_offset, 4);
190 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
191 we might want to do here is to check REGNUM against the clobber mask, and
192 somehow flag it as invalid if it isn't saved on the stack somewhere. This
193 would provide a graceful failure mode when trying to get the value of
194 caller-saves registers for an inner frame. */
197 sh_find_callers_reg (fi, regnum)
198 struct frame_info *fi;
201 struct frame_saved_regs fsr;
203 for (; fi; fi = fi->next)
204 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
205 /* When the caller requests PR from the dummy frame, we return PC because
206 that's where the previous routine appears to have done a call from. */
207 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
210 FRAME_FIND_SAVED_REGS(fi, fsr);
211 if (fsr.regs[regnum] != 0)
212 return read_memory_integer (fsr.regs[regnum],
213 REGISTER_RAW_SIZE(regnum));
215 return read_register (regnum);
218 /* Put here the code to store, into a struct frame_saved_regs, the
219 addresses of the saved registers of frame described by FRAME_INFO.
220 This includes special registers such as pc and fp saved in special
221 ways in the stack frame. sp is even more special: the address we
222 return for it IS the sp for the next frame. */
225 sh_frame_find_saved_regs (fi, fsr)
226 struct frame_info *fi;
227 struct frame_saved_regs *fsr;
237 char * dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
241 /* DANGER! This is ONLY going to work if the char buffer format of
242 the saved registers is byte-for-byte identical to the
243 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
244 memcpy (&fsr->regs, dummy_regs, sizeof(fsr));
248 opc = pc = get_pc_function_start (fi->pc);
250 insn = read_memory_integer (pc, 2);
252 fi->leaf_function = 1;
255 for (rn = 0; rn < NUM_REGS; rn++)
260 /* Loop around examining the prologue insns until we find something
261 that does not appear to be part of the prologue. But give up
262 after 20 of them, since we're getting silly then. */
264 while (pc < opc + 20 * 2)
266 /* See where the registers will be saved to */
270 rn = GET_PUSHED_REG (insn);
272 insn = read_memory_integer (pc, 2);
275 else if (IS_STS (insn))
278 where[PR_REGNUM] = depth;
279 insn = read_memory_integer (pc, 2);
280 /* If we're storing the pr then this isn't a leaf */
281 fi->leaf_function = 0;
284 else if (IS_MOV_R3 (insn))
286 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
288 insn = read_memory_integer (pc, 2);
290 else if (IS_SHLL_R3 (insn))
294 insn = read_memory_integer (pc, 2);
296 else if (IS_ADD_R3SP (insn))
300 insn = read_memory_integer (pc, 2);
302 else if (IS_ADD_SP (insn))
305 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
306 insn = read_memory_integer (pc, 2);
308 else if (IS_FMOV (insn))
311 insn = read_memory_integer (pc, 2);
312 if (read_register (FPSCR_REGNUM) & FPSCR_SZ)
325 /* Now we know how deep things are, we can work out their addresses */
327 for (rn = 0; rn < NUM_REGS; rn++)
334 fsr->regs[rn] = fi->frame - where[rn] + depth - 4;
344 fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[FP_REGNUM], 4);
348 fsr->regs[SP_REGNUM] = fi->frame - 4;
351 fi->f_offset = depth - where[FP_REGNUM] - 4;
352 /* Work out the return pc - either from the saved pr or the pr
356 /* initialize the extra info saved in a FRAME */
359 sh_init_extra_frame_info (fromleaf, fi)
361 struct frame_info *fi;
363 struct frame_saved_regs fsr;
366 fi->pc = FRAME_SAVED_PC (fi->next);
368 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
370 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
371 by assuming it's always FP. */
372 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
374 fi->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
376 fi->f_offset = -(CALL_DUMMY_LENGTH + 4);
377 fi->leaf_function = 0;
382 FRAME_FIND_SAVED_REGS (fi, fsr);
383 fi->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
387 /* Discard from the stack the innermost frame,
388 restoring all saved registers. */
393 register struct frame_info *frame = get_current_frame ();
394 register CORE_ADDR fp;
396 struct frame_saved_regs fsr;
398 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
399 generic_pop_dummy_frame ();
402 fp = FRAME_FP (frame);
403 get_frame_saved_regs (frame, &fsr);
405 /* Copy regs from where they were saved in the frame */
406 for (regnum = 0; regnum < NUM_REGS; regnum++)
407 if (fsr.regs[regnum])
408 write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
410 write_register (PC_REGNUM, frame->return_pc);
411 write_register (SP_REGNUM, fp + 4);
413 flush_cached_frames ();
416 /* Function: push_arguments
417 Setup the function arguments for calling a function in the inferior.
419 On the Hitachi SH architecture, there are four registers (R4 to R7)
420 which are dedicated for passing function arguments. Up to the first
421 four arguments (depending on size) may go into these registers.
422 The rest go on the stack.
424 Arguments that are smaller than 4 bytes will still take up a whole
425 register or a whole 32-bit word on the stack, and will be
426 right-justified in the register or the stack word. This includes
427 chars, shorts, and small aggregate types.
429 Arguments that are larger than 4 bytes may be split between two or
430 more registers. If there are not enough registers free, an argument
431 may be passed partly in a register (or registers), and partly on the
432 stack. This includes doubles, long longs, and larger aggregates.
433 As far as I know, there is no upper limit to the size of aggregates
434 that will be passed in this way; in other words, the convention of
435 passing a pointer to a large aggregate instead of a copy is not used.
437 An exceptional case exists for struct arguments (and possibly other
438 aggregates such as arrays) if the size is larger than 4 bytes but
439 not a multiple of 4 bytes. In this case the argument is never split
440 between the registers and the stack, but instead is copied in its
441 entirety onto the stack, AND also copied into as many registers as
442 there is room for. In other words, space in registers permitting,
443 two copies of the same argument are passed in. As far as I can tell,
444 only the one on the stack is used, although that may be a function
445 of the level of compiler optimization. I suspect this is a compiler
446 bug. Arguments of these odd sizes are left-justified within the
447 word (as opposed to arguments smaller than 4 bytes, which are
451 If the function is to return an aggregate type such as a struct, it
452 is either returned in the normal return value register R0 (if its
453 size is no greater than one byte), or else the caller must allocate
454 space into which the callee will copy the return value (if the size
455 is greater than one byte). In this case, a pointer to the return
456 value location is passed into the callee in register R2, which does
457 not displace any of the other arguments passed in via registers R4
461 sh_push_arguments (nargs, args, sp, struct_return, struct_addr)
465 unsigned char struct_return;
466 CORE_ADDR struct_addr;
468 int stack_offset, stack_alloc;
476 int odd_sized_struct;
478 /* first force sp to a 4-byte alignment */
481 /* The "struct return pointer" pseudo-argument has its own dedicated
484 write_register (STRUCT_RETURN_REGNUM, struct_addr);
486 /* Now make sure there's space on the stack */
487 for (argnum = 0, stack_alloc = 0;
488 argnum < nargs; argnum++)
489 stack_alloc += ((TYPE_LENGTH(VALUE_TYPE(args[argnum])) + 3) & ~3);
490 sp -= stack_alloc; /* make room on stack for args */
493 /* Now load as many as possible of the first arguments into
494 registers, and push the rest onto the stack. There are 16 bytes
495 in four registers available. Loop thru args from first to last. */
497 argreg = ARG0_REGNUM;
498 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
500 type = VALUE_TYPE (args[argnum]);
501 len = TYPE_LENGTH (type);
502 memset(valbuf, 0, sizeof(valbuf));
504 { /* value gets right-justified in the register or stack word */
505 memcpy(valbuf + (4 - len),
506 (char *) VALUE_CONTENTS (args[argnum]), len);
510 val = (char *) VALUE_CONTENTS (args[argnum]);
512 if (len > 4 && (len & 3) != 0)
513 odd_sized_struct = 1; /* such structs go entirely on stack */
515 odd_sized_struct = 0;
518 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
519 { /* must go on the stack */
520 write_memory (sp + stack_offset, val, 4);
523 /* NOTE WELL!!!!! This is not an "else if" clause!!!
524 That's because some *&^%$ things get passed on the stack
525 AND in the registers! */
526 if (argreg <= ARGLAST_REGNUM)
527 { /* there's room in a register */
528 regval = extract_address (val, REGISTER_RAW_SIZE(argreg));
529 write_register (argreg++, regval);
531 /* Store the value 4 bytes at a time. This means that things
532 larger than 4 bytes may go partly in registers and partly
534 len -= REGISTER_RAW_SIZE(argreg);
535 val += REGISTER_RAW_SIZE(argreg);
541 /* Function: push_return_address (pc)
542 Set up the return address for the inferior function call.
543 Needed for targets where we don't actually execute a JSR/BSR instruction */
546 sh_push_return_address (pc, sp)
550 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
554 /* Function: fix_call_dummy
555 Poke the callee function's address into the destination part of
556 the CALL_DUMMY. The address is actually stored in a data word
557 following the actualy CALL_DUMMY instructions, which will load
558 it into a register using PC-relative addressing. This function
559 expects the CALL_DUMMY to look like this:
570 sh_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
579 *(unsigned long *) (dummy + 8) = fun;
584 /* Modify the actual processor type. */
587 sh_target_architecture_hook (ap)
588 const bfd_arch_info_type *ap;
592 if (ap->arch != bfd_arch_sh)
595 for (i = 0; sh_processor_type_table[i].regnames != NULL; i++)
597 if (sh_processor_type_table[i].mach == ap->mach)
599 sh_register_names = sh_processor_type_table[i].regnames;
604 fatal ("Architecture `%s' unreconized", ap->printable_name);
607 /* Print the registers in a form similar to the E7000 */
610 sh_show_regs (args, from_tty)
615 if (TARGET_ARCHITECTURE->arch == bfd_arch_sh)
616 cpu = TARGET_ARCHITECTURE->mach;
620 /* FIXME: sh4 has more registers */
621 if (cpu == bfd_mach_sh4)
624 printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
625 read_register (PC_REGNUM),
626 read_register (SR_REGNUM),
627 read_register (PR_REGNUM),
628 read_register (MACH_REGNUM),
629 read_register (MACL_REGNUM));
631 printf_filtered ("GBR=%08x VBR=%08x",
632 read_register (GBR_REGNUM),
633 read_register (VBR_REGNUM));
634 if (cpu == bfd_mach_sh3 || cpu == bfd_mach_sh3e)
636 printf_filtered (" SSR=%08x SPC=%08x",
637 read_register (SSR_REGNUM),
638 read_register (SPC_REGNUM));
639 if (cpu == bfd_mach_sh3e)
641 printf_filtered (" FPUL=%08x FPSCR=%08x",
642 read_register (FPUL_REGNUM),
643 read_register (FPSCR_REGNUM));
647 printf_filtered ("\nR0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
656 printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
665 if (cpu == bfd_mach_sh3e)
667 printf_filtered ("FP0-FP7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
668 read_register (FP0_REGNUM + 0),
669 read_register (FP0_REGNUM + 1),
670 read_register (FP0_REGNUM + 2),
671 read_register (FP0_REGNUM + 3),
672 read_register (FP0_REGNUM + 4),
673 read_register (FP0_REGNUM + 5),
674 read_register (FP0_REGNUM + 6),
675 read_register (FP0_REGNUM + 7));
676 printf_filtered ("FP8-FP15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
677 read_register (FP0_REGNUM + 8),
678 read_register (FP0_REGNUM + 9),
679 read_register (FP0_REGNUM + 10),
680 read_register (FP0_REGNUM + 11),
681 read_register (FP0_REGNUM + 12),
682 read_register (FP0_REGNUM + 13),
683 read_register (FP0_REGNUM + 14),
684 read_register (FP0_REGNUM + 15));
688 /* Function: extract_return_value
689 Find a function's return value in the appropriate registers (in regbuf),
690 and copy it into valbuf. */
693 sh_extract_return_value (type, regbuf, valbuf)
698 int len = TYPE_LENGTH(type);
701 memcpy (valbuf, ((char *) regbuf) + 4 - len, len);
703 memcpy (valbuf, ((char *) regbuf) + 8 - len, len);
705 error ("bad size for return value");
709 _initialize_sh_tdep ()
711 struct cmd_list_element *c;
713 tm_print_insn = gdb_print_insn_sh;
715 target_architecture_hook = sh_target_architecture_hook;
717 add_com ("regs", class_vars, sh_show_regs, "Print all registers");