1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Contributed by Steve Chamberlain
36 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
37 #include "gdb_string.h"
39 /* A set of original names, to be used when restoring back to generic
40 registers from a specific set. */
42 static char *sh_generic_reg_names[] = {
43 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
44 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
45 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
47 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
48 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
50 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
51 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
54 static char *sh_reg_names[] = {
55 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
56 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
57 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
59 "", "", "", "", "", "", "", "",
60 "", "", "", "", "", "", "", "",
62 "", "", "", "", "", "", "", "",
63 "", "", "", "", "", "", "", "",
66 static char *sh3_reg_names[] = {
67 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
68 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
69 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
71 "", "", "", "", "", "", "", "",
72 "", "", "", "", "", "", "", "",
74 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
75 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
78 static char *sh3e_reg_names[] = {
79 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
80 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
81 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
83 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
84 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
86 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
87 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
92 char **sh_register_names = sh3_reg_names;
94 char **sh_register_names = sh_generic_reg_names;
102 sh_processor_type_table[] =
105 sh_reg_names, bfd_mach_sh
109 sh3_reg_names, bfd_mach_sh3
113 sh3e_reg_names, bfd_mach_sh3e
121 /* Prologue looks like
122 [mov.l <regs>,@-r15]...
128 #define IS_STS(x) ((x) == 0x4f22)
129 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
130 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
131 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
132 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
133 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
134 #define IS_SHLL_R3(x) ((x) == 0x4300)
135 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
136 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
137 #define FPSCR_SZ (1 << 20)
140 /* Should call_function allocate stack space for a struct return? */
142 sh_use_struct_convention (gcc_p, type)
146 return (TYPE_LENGTH (type) > 1);
150 /* Skip any prologue before the guts of a function */
153 sh_skip_prologue (start_pc)
158 w = read_memory_integer (start_pc, 2);
169 w = read_memory_integer (start_pc, 2);
175 /* Disassemble an instruction. */
178 gdb_print_insn_sh (memaddr, info)
180 disassemble_info *info;
182 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
183 return print_insn_sh (memaddr, info);
185 return print_insn_shl (memaddr, info);
188 /* Given a GDB frame, determine the address of the calling function's frame.
189 This will be used to create a new GDB frame struct, and then
190 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
192 For us, the frame address is its stack pointer value, so we look up
193 the function prologue to determine the caller's sp value, and return it. */
196 sh_frame_chain (frame)
197 struct frame_info *frame;
199 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
200 return frame->frame; /* dummy frame same as caller's frame */
201 if (!inside_entry_file (frame->pc))
202 return read_memory_integer (FRAME_FP (frame) + frame->f_offset, 4);
207 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
208 we might want to do here is to check REGNUM against the clobber mask, and
209 somehow flag it as invalid if it isn't saved on the stack somewhere. This
210 would provide a graceful failure mode when trying to get the value of
211 caller-saves registers for an inner frame. */
214 sh_find_callers_reg (fi, regnum)
215 struct frame_info *fi;
218 struct frame_saved_regs fsr;
220 for (; fi; fi = fi->next)
221 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
222 /* When the caller requests PR from the dummy frame, we return PC because
223 that's where the previous routine appears to have done a call from. */
224 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
227 FRAME_FIND_SAVED_REGS (fi, fsr);
228 if (fsr.regs[regnum] != 0)
229 return read_memory_integer (fsr.regs[regnum],
230 REGISTER_RAW_SIZE (regnum));
232 return read_register (regnum);
235 /* Put here the code to store, into a struct frame_saved_regs, the
236 addresses of the saved registers of frame described by FRAME_INFO.
237 This includes special registers such as pc and fp saved in special
238 ways in the stack frame. sp is even more special: the address we
239 return for it IS the sp for the next frame. */
242 sh_frame_find_saved_regs (fi, fsr)
243 struct frame_info *fi;
244 struct frame_saved_regs *fsr;
254 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
258 /* DANGER! This is ONLY going to work if the char buffer format of
259 the saved registers is byte-for-byte identical to the
260 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
261 memcpy (&fsr->regs, dummy_regs, sizeof (fsr));
265 opc = pc = get_pc_function_start (fi->pc);
267 insn = read_memory_integer (pc, 2);
269 fi->leaf_function = 1;
272 for (rn = 0; rn < NUM_REGS; rn++)
277 /* Loop around examining the prologue insns until we find something
278 that does not appear to be part of the prologue. But give up
279 after 20 of them, since we're getting silly then. */
281 while (pc < opc + 20 * 2)
283 /* See where the registers will be saved to */
287 rn = GET_PUSHED_REG (insn);
289 insn = read_memory_integer (pc, 2);
292 else if (IS_STS (insn))
295 where[PR_REGNUM] = depth;
296 insn = read_memory_integer (pc, 2);
297 /* If we're storing the pr then this isn't a leaf */
298 fi->leaf_function = 0;
301 else if (IS_MOV_R3 (insn))
303 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
305 insn = read_memory_integer (pc, 2);
307 else if (IS_SHLL_R3 (insn))
311 insn = read_memory_integer (pc, 2);
313 else if (IS_ADD_R3SP (insn))
317 insn = read_memory_integer (pc, 2);
319 else if (IS_ADD_SP (insn))
322 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
323 insn = read_memory_integer (pc, 2);
325 else if (IS_FMOV (insn))
328 insn = read_memory_integer (pc, 2);
329 if (read_register (FPSCR_REGNUM) & FPSCR_SZ)
342 /* Now we know how deep things are, we can work out their addresses */
344 for (rn = 0; rn < NUM_REGS; rn++)
351 fsr->regs[rn] = fi->frame - where[rn] + depth - 4;
361 fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[FP_REGNUM], 4);
365 fsr->regs[SP_REGNUM] = fi->frame - 4;
368 fi->f_offset = depth - where[FP_REGNUM] - 4;
369 /* Work out the return pc - either from the saved pr or the pr
373 /* initialize the extra info saved in a FRAME */
376 sh_init_extra_frame_info (fromleaf, fi)
378 struct frame_info *fi;
380 struct frame_saved_regs fsr;
383 fi->pc = FRAME_SAVED_PC (fi->next);
385 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
387 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
388 by assuming it's always FP. */
389 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
391 fi->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
393 fi->f_offset = -(CALL_DUMMY_LENGTH + 4);
394 fi->leaf_function = 0;
399 FRAME_FIND_SAVED_REGS (fi, fsr);
400 fi->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
404 /* Discard from the stack the innermost frame,
405 restoring all saved registers. */
410 register struct frame_info *frame = get_current_frame ();
411 register CORE_ADDR fp;
413 struct frame_saved_regs fsr;
415 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
416 generic_pop_dummy_frame ();
419 fp = FRAME_FP (frame);
420 get_frame_saved_regs (frame, &fsr);
422 /* Copy regs from where they were saved in the frame */
423 for (regnum = 0; regnum < NUM_REGS; regnum++)
424 if (fsr.regs[regnum])
425 write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
427 write_register (PC_REGNUM, frame->return_pc);
428 write_register (SP_REGNUM, fp + 4);
430 flush_cached_frames ();
433 /* Function: push_arguments
434 Setup the function arguments for calling a function in the inferior.
436 On the Hitachi SH architecture, there are four registers (R4 to R7)
437 which are dedicated for passing function arguments. Up to the first
438 four arguments (depending on size) may go into these registers.
439 The rest go on the stack.
441 Arguments that are smaller than 4 bytes will still take up a whole
442 register or a whole 32-bit word on the stack, and will be
443 right-justified in the register or the stack word. This includes
444 chars, shorts, and small aggregate types.
446 Arguments that are larger than 4 bytes may be split between two or
447 more registers. If there are not enough registers free, an argument
448 may be passed partly in a register (or registers), and partly on the
449 stack. This includes doubles, long longs, and larger aggregates.
450 As far as I know, there is no upper limit to the size of aggregates
451 that will be passed in this way; in other words, the convention of
452 passing a pointer to a large aggregate instead of a copy is not used.
454 An exceptional case exists for struct arguments (and possibly other
455 aggregates such as arrays) if the size is larger than 4 bytes but
456 not a multiple of 4 bytes. In this case the argument is never split
457 between the registers and the stack, but instead is copied in its
458 entirety onto the stack, AND also copied into as many registers as
459 there is room for. In other words, space in registers permitting,
460 two copies of the same argument are passed in. As far as I can tell,
461 only the one on the stack is used, although that may be a function
462 of the level of compiler optimization. I suspect this is a compiler
463 bug. Arguments of these odd sizes are left-justified within the
464 word (as opposed to arguments smaller than 4 bytes, which are
468 If the function is to return an aggregate type such as a struct, it
469 is either returned in the normal return value register R0 (if its
470 size is no greater than one byte), or else the caller must allocate
471 space into which the callee will copy the return value (if the size
472 is greater than one byte). In this case, a pointer to the return
473 value location is passed into the callee in register R2, which does
474 not displace any of the other arguments passed in via registers R4
478 sh_push_arguments (nargs, args, sp, struct_return, struct_addr)
482 unsigned char struct_return;
483 CORE_ADDR struct_addr;
485 int stack_offset, stack_alloc;
493 int odd_sized_struct;
495 /* first force sp to a 4-byte alignment */
498 /* The "struct return pointer" pseudo-argument has its own dedicated
501 write_register (STRUCT_RETURN_REGNUM, struct_addr);
503 /* Now make sure there's space on the stack */
504 for (argnum = 0, stack_alloc = 0;
505 argnum < nargs; argnum++)
506 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
507 sp -= stack_alloc; /* make room on stack for args */
510 /* Now load as many as possible of the first arguments into
511 registers, and push the rest onto the stack. There are 16 bytes
512 in four registers available. Loop thru args from first to last. */
514 argreg = ARG0_REGNUM;
515 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
517 type = VALUE_TYPE (args[argnum]);
518 len = TYPE_LENGTH (type);
519 memset (valbuf, 0, sizeof (valbuf));
521 { /* value gets right-justified in the register or stack word */
522 memcpy (valbuf + (4 - len),
523 (char *) VALUE_CONTENTS (args[argnum]), len);
527 val = (char *) VALUE_CONTENTS (args[argnum]);
529 if (len > 4 && (len & 3) != 0)
530 odd_sized_struct = 1; /* such structs go entirely on stack */
532 odd_sized_struct = 0;
535 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
536 { /* must go on the stack */
537 write_memory (sp + stack_offset, val, 4);
540 /* NOTE WELL!!!!! This is not an "else if" clause!!!
541 That's because some *&^%$ things get passed on the stack
542 AND in the registers! */
543 if (argreg <= ARGLAST_REGNUM)
544 { /* there's room in a register */
545 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
546 write_register (argreg++, regval);
548 /* Store the value 4 bytes at a time. This means that things
549 larger than 4 bytes may go partly in registers and partly
551 len -= REGISTER_RAW_SIZE (argreg);
552 val += REGISTER_RAW_SIZE (argreg);
558 /* Function: push_return_address (pc)
559 Set up the return address for the inferior function call.
560 Needed for targets where we don't actually execute a JSR/BSR instruction */
563 sh_push_return_address (pc, sp)
567 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
571 /* Function: fix_call_dummy
572 Poke the callee function's address into the destination part of
573 the CALL_DUMMY. The address is actually stored in a data word
574 following the actualy CALL_DUMMY instructions, which will load
575 it into a register using PC-relative addressing. This function
576 expects the CALL_DUMMY to look like this:
587 sh_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
596 *(unsigned long *) (dummy + 8) = fun;
601 /* Modify the actual processor type. */
604 sh_target_architecture_hook (ap)
605 const bfd_arch_info_type *ap;
609 if (ap->arch != bfd_arch_sh)
612 for (i = 0; sh_processor_type_table[i].regnames != NULL; i++)
614 if (sh_processor_type_table[i].mach == ap->mach)
616 sh_register_names = sh_processor_type_table[i].regnames;
621 internal_error ("Architecture `%s' unreconized", ap->printable_name);
624 /* Print the registers in a form similar to the E7000 */
627 sh_show_regs (args, from_tty)
632 if (TARGET_ARCHITECTURE->arch == bfd_arch_sh)
633 cpu = TARGET_ARCHITECTURE->mach;
637 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
638 paddr (read_register (PC_REGNUM)),
639 (long) read_register (SR_REGNUM),
640 (long) read_register (PR_REGNUM),
641 (long) read_register (MACH_REGNUM),
642 (long) read_register (MACL_REGNUM));
644 printf_filtered ("GBR=%08lx VBR=%08lx",
645 (long) read_register (GBR_REGNUM),
646 (long) read_register (VBR_REGNUM));
647 if (cpu == bfd_mach_sh3 || cpu == bfd_mach_sh3e)
649 printf_filtered (" SSR=%08lx SPC=%08lx",
650 (long) read_register (SSR_REGNUM),
651 (long) read_register (SPC_REGNUM));
652 if (cpu == bfd_mach_sh3e)
654 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
655 (long) read_register (FPUL_REGNUM),
656 (long) read_register (FPSCR_REGNUM));
660 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
661 (long) read_register (0),
662 (long) read_register (1),
663 (long) read_register (2),
664 (long) read_register (3),
665 (long) read_register (4),
666 (long) read_register (5),
667 (long) read_register (6),
668 (long) read_register (7));
669 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
670 (long) read_register (8),
671 (long) read_register (9),
672 (long) read_register (10),
673 (long) read_register (11),
674 (long) read_register (12),
675 (long) read_register (13),
676 (long) read_register (14),
677 (long) read_register (15));
678 if (cpu == bfd_mach_sh3e)
680 printf_filtered ("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
681 (long) read_register (FP0_REGNUM + 0),
682 (long) read_register (FP0_REGNUM + 1),
683 (long) read_register (FP0_REGNUM + 2),
684 (long) read_register (FP0_REGNUM + 3),
685 (long) read_register (FP0_REGNUM + 4),
686 (long) read_register (FP0_REGNUM + 5),
687 (long) read_register (FP0_REGNUM + 6),
688 (long) read_register (FP0_REGNUM + 7));
689 printf_filtered ("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
690 (long) read_register (FP0_REGNUM + 8),
691 (long) read_register (FP0_REGNUM + 9),
692 (long) read_register (FP0_REGNUM + 10),
693 (long) read_register (FP0_REGNUM + 11),
694 (long) read_register (FP0_REGNUM + 12),
695 (long) read_register (FP0_REGNUM + 13),
696 (long) read_register (FP0_REGNUM + 14),
697 (long) read_register (FP0_REGNUM + 15));
701 /* Function: extract_return_value
702 Find a function's return value in the appropriate registers (in regbuf),
703 and copy it into valbuf. */
706 sh_extract_return_value (type, regbuf, valbuf)
711 int len = TYPE_LENGTH (type);
714 memcpy (valbuf, ((char *) regbuf) + 4 - len, len);
716 memcpy (valbuf, ((char *) regbuf) + 8 - len, len);
718 error ("bad size for return value");
722 _initialize_sh_tdep ()
724 struct cmd_list_element *c;
726 tm_print_insn = gdb_print_insn_sh;
728 target_architecture_hook = sh_target_architecture_hook;
730 add_com ("regs", class_vars, sh_show_regs, "Print all registers");