1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Contributed by Steve Chamberlain
36 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
37 #include "gdb_string.h"
39 /* A set of original names, to be used when restoring back to generic
40 registers from a specific set. */
42 static char *sh_generic_reg_names[] = {
43 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
44 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
45 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
47 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
48 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
50 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
51 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
54 static char *sh_reg_names[] = {
55 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
56 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
57 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
59 "", "", "", "", "", "", "", "",
60 "", "", "", "", "", "", "", "",
62 "", "", "", "", "", "", "", "",
63 "", "", "", "", "", "", "", "",
66 static char *sh3_reg_names[] = {
67 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
68 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
69 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
71 "", "", "", "", "", "", "", "",
72 "", "", "", "", "", "", "", "",
74 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
75 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
78 static char *sh3e_reg_names[] = {
79 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
80 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
81 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
83 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
84 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
86 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
87 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
93 char **sh_register_names = sh_generic_reg_names;
100 sh_processor_type_table[] =
103 sh_reg_names, bfd_mach_sh
107 sh3_reg_names, bfd_mach_sh3
111 sh3e_reg_names, bfd_mach_sh3e
119 /* Prologue looks like
120 [mov.l <regs>,@-r15]...
126 #define IS_STS(x) ((x) == 0x4f22)
127 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
128 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
129 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
130 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
131 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
132 #define IS_SHLL_R3(x) ((x) == 0x4300)
133 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
134 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
135 #define FPSCR_SZ (1 << 20)
138 /* Should call_function allocate stack space for a struct return? */
140 sh_use_struct_convention (gcc_p, type)
144 return (TYPE_LENGTH (type) > 1);
148 /* Skip any prologue before the guts of a function */
151 sh_skip_prologue (start_pc)
156 w = read_memory_integer (start_pc, 2);
167 w = read_memory_integer (start_pc, 2);
173 /* Disassemble an instruction. */
176 gdb_print_insn_sh (memaddr, info)
178 disassemble_info *info;
180 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
181 return print_insn_sh (memaddr, info);
183 return print_insn_shl (memaddr, info);
186 /* Given a GDB frame, determine the address of the calling function's frame.
187 This will be used to create a new GDB frame struct, and then
188 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
190 For us, the frame address is its stack pointer value, so we look up
191 the function prologue to determine the caller's sp value, and return it. */
194 sh_frame_chain (frame)
195 struct frame_info *frame;
197 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
198 return frame->frame; /* dummy frame same as caller's frame */
199 if (!inside_entry_file (frame->pc))
200 return read_memory_integer (FRAME_FP (frame) + frame->f_offset, 4);
205 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
206 we might want to do here is to check REGNUM against the clobber mask, and
207 somehow flag it as invalid if it isn't saved on the stack somewhere. This
208 would provide a graceful failure mode when trying to get the value of
209 caller-saves registers for an inner frame. */
212 sh_find_callers_reg (fi, regnum)
213 struct frame_info *fi;
216 struct frame_saved_regs fsr;
218 for (; fi; fi = fi->next)
219 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
220 /* When the caller requests PR from the dummy frame, we return PC because
221 that's where the previous routine appears to have done a call from. */
222 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
225 FRAME_FIND_SAVED_REGS (fi, fsr);
226 if (fsr.regs[regnum] != 0)
227 return read_memory_integer (fsr.regs[regnum],
228 REGISTER_RAW_SIZE (regnum));
230 return read_register (regnum);
233 /* Put here the code to store, into a struct frame_saved_regs, the
234 addresses of the saved registers of frame described by FRAME_INFO.
235 This includes special registers such as pc and fp saved in special
236 ways in the stack frame. sp is even more special: the address we
237 return for it IS the sp for the next frame. */
240 sh_frame_find_saved_regs (fi, fsr)
241 struct frame_info *fi;
242 struct frame_saved_regs *fsr;
252 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
256 /* DANGER! This is ONLY going to work if the char buffer format of
257 the saved registers is byte-for-byte identical to the
258 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
259 memcpy (&fsr->regs, dummy_regs, sizeof (fsr));
263 opc = pc = get_pc_function_start (fi->pc);
265 insn = read_memory_integer (pc, 2);
267 fi->leaf_function = 1;
270 for (rn = 0; rn < NUM_REGS; rn++)
275 /* Loop around examining the prologue insns until we find something
276 that does not appear to be part of the prologue. But give up
277 after 20 of them, since we're getting silly then. */
279 while (pc < opc + 20 * 2)
281 /* See where the registers will be saved to */
285 rn = GET_PUSHED_REG (insn);
287 insn = read_memory_integer (pc, 2);
290 else if (IS_STS (insn))
293 where[PR_REGNUM] = depth;
294 insn = read_memory_integer (pc, 2);
295 /* If we're storing the pr then this isn't a leaf */
296 fi->leaf_function = 0;
299 else if (IS_MOV_R3 (insn))
301 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
303 insn = read_memory_integer (pc, 2);
305 else if (IS_SHLL_R3 (insn))
309 insn = read_memory_integer (pc, 2);
311 else if (IS_ADD_R3SP (insn))
315 insn = read_memory_integer (pc, 2);
317 else if (IS_ADD_SP (insn))
320 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
321 insn = read_memory_integer (pc, 2);
323 else if (IS_FMOV (insn))
326 insn = read_memory_integer (pc, 2);
327 if (read_register (FPSCR_REGNUM) & FPSCR_SZ)
340 /* Now we know how deep things are, we can work out their addresses */
342 for (rn = 0; rn < NUM_REGS; rn++)
349 fsr->regs[rn] = fi->frame - where[rn] + depth - 4;
359 fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[FP_REGNUM], 4);
363 fsr->regs[SP_REGNUM] = fi->frame - 4;
366 fi->f_offset = depth - where[FP_REGNUM] - 4;
367 /* Work out the return pc - either from the saved pr or the pr
371 /* initialize the extra info saved in a FRAME */
374 sh_init_extra_frame_info (fromleaf, fi)
376 struct frame_info *fi;
378 struct frame_saved_regs fsr;
381 fi->pc = FRAME_SAVED_PC (fi->next);
383 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
385 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
386 by assuming it's always FP. */
387 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
389 fi->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
391 fi->f_offset = -(CALL_DUMMY_LENGTH + 4);
392 fi->leaf_function = 0;
397 FRAME_FIND_SAVED_REGS (fi, fsr);
398 fi->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
402 /* Discard from the stack the innermost frame,
403 restoring all saved registers. */
408 register struct frame_info *frame = get_current_frame ();
409 register CORE_ADDR fp;
411 struct frame_saved_regs fsr;
413 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
414 generic_pop_dummy_frame ();
417 fp = FRAME_FP (frame);
418 get_frame_saved_regs (frame, &fsr);
420 /* Copy regs from where they were saved in the frame */
421 for (regnum = 0; regnum < NUM_REGS; regnum++)
422 if (fsr.regs[regnum])
423 write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
425 write_register (PC_REGNUM, frame->return_pc);
426 write_register (SP_REGNUM, fp + 4);
428 flush_cached_frames ();
431 /* Function: push_arguments
432 Setup the function arguments for calling a function in the inferior.
434 On the Hitachi SH architecture, there are four registers (R4 to R7)
435 which are dedicated for passing function arguments. Up to the first
436 four arguments (depending on size) may go into these registers.
437 The rest go on the stack.
439 Arguments that are smaller than 4 bytes will still take up a whole
440 register or a whole 32-bit word on the stack, and will be
441 right-justified in the register or the stack word. This includes
442 chars, shorts, and small aggregate types.
444 Arguments that are larger than 4 bytes may be split between two or
445 more registers. If there are not enough registers free, an argument
446 may be passed partly in a register (or registers), and partly on the
447 stack. This includes doubles, long longs, and larger aggregates.
448 As far as I know, there is no upper limit to the size of aggregates
449 that will be passed in this way; in other words, the convention of
450 passing a pointer to a large aggregate instead of a copy is not used.
452 An exceptional case exists for struct arguments (and possibly other
453 aggregates such as arrays) if the size is larger than 4 bytes but
454 not a multiple of 4 bytes. In this case the argument is never split
455 between the registers and the stack, but instead is copied in its
456 entirety onto the stack, AND also copied into as many registers as
457 there is room for. In other words, space in registers permitting,
458 two copies of the same argument are passed in. As far as I can tell,
459 only the one on the stack is used, although that may be a function
460 of the level of compiler optimization. I suspect this is a compiler
461 bug. Arguments of these odd sizes are left-justified within the
462 word (as opposed to arguments smaller than 4 bytes, which are
466 If the function is to return an aggregate type such as a struct, it
467 is either returned in the normal return value register R0 (if its
468 size is no greater than one byte), or else the caller must allocate
469 space into which the callee will copy the return value (if the size
470 is greater than one byte). In this case, a pointer to the return
471 value location is passed into the callee in register R2, which does
472 not displace any of the other arguments passed in via registers R4
476 sh_push_arguments (nargs, args, sp, struct_return, struct_addr)
480 unsigned char struct_return;
481 CORE_ADDR struct_addr;
483 int stack_offset, stack_alloc;
491 int odd_sized_struct;
493 /* first force sp to a 4-byte alignment */
496 /* The "struct return pointer" pseudo-argument has its own dedicated
499 write_register (STRUCT_RETURN_REGNUM, struct_addr);
501 /* Now make sure there's space on the stack */
502 for (argnum = 0, stack_alloc = 0;
503 argnum < nargs; argnum++)
504 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
505 sp -= stack_alloc; /* make room on stack for args */
508 /* Now load as many as possible of the first arguments into
509 registers, and push the rest onto the stack. There are 16 bytes
510 in four registers available. Loop thru args from first to last. */
512 argreg = ARG0_REGNUM;
513 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
515 type = VALUE_TYPE (args[argnum]);
516 len = TYPE_LENGTH (type);
517 memset (valbuf, 0, sizeof (valbuf));
519 { /* value gets right-justified in the register or stack word */
520 memcpy (valbuf + (4 - len),
521 (char *) VALUE_CONTENTS (args[argnum]), len);
525 val = (char *) VALUE_CONTENTS (args[argnum]);
527 if (len > 4 && (len & 3) != 0)
528 odd_sized_struct = 1; /* such structs go entirely on stack */
530 odd_sized_struct = 0;
533 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
534 { /* must go on the stack */
535 write_memory (sp + stack_offset, val, 4);
538 /* NOTE WELL!!!!! This is not an "else if" clause!!!
539 That's because some *&^%$ things get passed on the stack
540 AND in the registers! */
541 if (argreg <= ARGLAST_REGNUM)
542 { /* there's room in a register */
543 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
544 write_register (argreg++, regval);
546 /* Store the value 4 bytes at a time. This means that things
547 larger than 4 bytes may go partly in registers and partly
549 len -= REGISTER_RAW_SIZE (argreg);
550 val += REGISTER_RAW_SIZE (argreg);
556 /* Function: push_return_address (pc)
557 Set up the return address for the inferior function call.
558 Needed for targets where we don't actually execute a JSR/BSR instruction */
561 sh_push_return_address (pc, sp)
565 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
569 /* Function: fix_call_dummy
570 Poke the callee function's address into the destination part of
571 the CALL_DUMMY. The address is actually stored in a data word
572 following the actualy CALL_DUMMY instructions, which will load
573 it into a register using PC-relative addressing. This function
574 expects the CALL_DUMMY to look like this:
585 sh_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
594 *(unsigned long *) (dummy + 8) = fun;
599 /* Modify the actual processor type. */
602 sh_target_architecture_hook (ap)
603 const bfd_arch_info_type *ap;
607 if (ap->arch != bfd_arch_sh)
610 for (i = 0; sh_processor_type_table[i].regnames != NULL; i++)
612 if (sh_processor_type_table[i].mach == ap->mach)
614 sh_register_names = sh_processor_type_table[i].regnames;
619 internal_error ("Architecture `%s' unreconized", ap->printable_name);
622 /* Print the registers in a form similar to the E7000 */
625 sh_show_regs (args, from_tty)
630 if (TARGET_ARCHITECTURE->arch == bfd_arch_sh)
631 cpu = TARGET_ARCHITECTURE->mach;
635 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
636 paddr (read_register (PC_REGNUM)),
637 (long) read_register (SR_REGNUM),
638 (long) read_register (PR_REGNUM),
639 (long) read_register (MACH_REGNUM),
640 (long) read_register (MACL_REGNUM));
642 printf_filtered ("GBR=%08lx VBR=%08lx",
643 (long) read_register (GBR_REGNUM),
644 (long) read_register (VBR_REGNUM));
645 if (cpu == bfd_mach_sh3 || cpu == bfd_mach_sh3e)
647 printf_filtered (" SSR=%08lx SPC=%08lx",
648 (long) read_register (SSR_REGNUM),
649 (long) read_register (SPC_REGNUM));
650 if (cpu == bfd_mach_sh3e)
652 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
653 (long) read_register (FPUL_REGNUM),
654 (long) read_register (FPSCR_REGNUM));
658 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
659 (long) read_register (0),
660 (long) read_register (1),
661 (long) read_register (2),
662 (long) read_register (3),
663 (long) read_register (4),
664 (long) read_register (5),
665 (long) read_register (6),
666 (long) read_register (7));
667 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
668 (long) read_register (8),
669 (long) read_register (9),
670 (long) read_register (10),
671 (long) read_register (11),
672 (long) read_register (12),
673 (long) read_register (13),
674 (long) read_register (14),
675 (long) read_register (15));
676 if (cpu == bfd_mach_sh3e)
678 printf_filtered ("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
679 (long) read_register (FP0_REGNUM + 0),
680 (long) read_register (FP0_REGNUM + 1),
681 (long) read_register (FP0_REGNUM + 2),
682 (long) read_register (FP0_REGNUM + 3),
683 (long) read_register (FP0_REGNUM + 4),
684 (long) read_register (FP0_REGNUM + 5),
685 (long) read_register (FP0_REGNUM + 6),
686 (long) read_register (FP0_REGNUM + 7));
687 printf_filtered ("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
688 (long) read_register (FP0_REGNUM + 8),
689 (long) read_register (FP0_REGNUM + 9),
690 (long) read_register (FP0_REGNUM + 10),
691 (long) read_register (FP0_REGNUM + 11),
692 (long) read_register (FP0_REGNUM + 12),
693 (long) read_register (FP0_REGNUM + 13),
694 (long) read_register (FP0_REGNUM + 14),
695 (long) read_register (FP0_REGNUM + 15));
699 /* Function: extract_return_value
700 Find a function's return value in the appropriate registers (in regbuf),
701 and copy it into valbuf. */
704 sh_extract_return_value (type, regbuf, valbuf)
709 int len = TYPE_LENGTH (type);
712 memcpy (valbuf, ((char *) regbuf) + 4 - len, len);
714 memcpy (valbuf, ((char *) regbuf) + 8 - len, len);
716 error ("bad size for return value");
720 _initialize_sh_tdep ()
722 struct cmd_list_element *c;
724 tm_print_insn = gdb_print_insn_sh;
726 target_architecture_hook = sh_target_architecture_hook;
728 add_com ("regs", class_vars, sh_show_regs, "Print all registers");