1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
39 #include "libbfd.h" /* for bfd_default_set_arch_mach */
40 #include "coff/internal.h" /* for libcoff.h */
41 #include "libcoff.h" /* for xcoff_data */
42 #include "coff/xcoff.h"
47 #include "solib-svr4.h"
50 #include "gdb_assert.h"
53 /* If the kernel has to deliver a signal, it pushes a sigcontext
54 structure on the stack and then calls the signal handler, passing
55 the address of the sigcontext in an argument register. Usually
56 the signal handler doesn't save this register, so we have to
57 access the sigcontext structure via an offset from the signal handler
59 The following constants were determined by experimentation on AIX 3.2. */
60 #define SIG_FRAME_PC_OFFSET 96
61 #define SIG_FRAME_LR_OFFSET 108
62 #define SIG_FRAME_FP_OFFSET 284
64 /* To be used by skip_prologue. */
66 struct rs6000_framedata
68 int offset; /* total size of frame --- the distance
69 by which we decrement sp to allocate
71 int saved_gpr; /* smallest # of saved gpr */
72 int saved_fpr; /* smallest # of saved fpr */
73 int saved_vr; /* smallest # of saved vr */
74 int saved_ev; /* smallest # of saved ev */
75 int alloca_reg; /* alloca register number (frame ptr) */
76 char frameless; /* true if frameless functions. */
77 char nosavedpc; /* true if pc not saved. */
78 int gpr_offset; /* offset of saved gprs from prev sp */
79 int fpr_offset; /* offset of saved fprs from prev sp */
80 int vr_offset; /* offset of saved vrs from prev sp */
81 int ev_offset; /* offset of saved evs from prev sp */
82 int lr_offset; /* offset of saved lr */
83 int cr_offset; /* offset of saved cr */
84 int vrsave_offset; /* offset of saved vrsave register */
87 /* Description of a single register. */
91 char *name; /* name of register */
92 unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */
93 unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */
94 unsigned char fpr; /* whether register is floating-point */
95 unsigned char pseudo; /* whether register is pseudo */
98 /* Breakpoint shadows for the single step instructions will be kept here. */
100 static struct sstep_breaks
102 /* Address, or 0 if this is not in use. */
104 /* Shadow contents. */
109 /* Hook for determining the TOC address when calling functions in the
110 inferior under AIX. The initialization code in rs6000-nat.c sets
111 this hook to point to find_toc_address. */
113 CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
115 /* Hook to set the current architecture when starting a child process.
116 rs6000-nat.c sets this. */
118 void (*rs6000_set_host_arch_hook) (int) = NULL;
120 /* Static function prototypes */
122 static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc,
124 static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR,
125 struct rs6000_framedata *);
126 static void frame_get_saved_regs (struct frame_info * fi,
127 struct rs6000_framedata * fdatap);
128 static CORE_ADDR frame_initial_stack_address (struct frame_info *);
130 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
132 altivec_register_p (int regno)
134 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
135 if (tdep->ppc_vr0_regnum < 0 || tdep->ppc_vrsave_regnum < 0)
138 return (regno >= tdep->ppc_vr0_regnum && regno <= tdep->ppc_vrsave_regnum);
141 /* Use the architectures FP registers? */
143 ppc_floating_point_unit_p (struct gdbarch *gdbarch)
145 const struct bfd_arch_info *info = gdbarch_bfd_arch_info (gdbarch);
146 if (info->arch == bfd_arch_powerpc)
147 return (info->mach != bfd_mach_ppc_e500);
148 if (info->arch == bfd_arch_rs6000)
153 /* Read a LEN-byte address from debugged memory address MEMADDR. */
156 read_memory_addr (CORE_ADDR memaddr, int len)
158 return read_memory_unsigned_integer (memaddr, len);
162 rs6000_skip_prologue (CORE_ADDR pc)
164 struct rs6000_framedata frame;
165 pc = skip_prologue (pc, 0, &frame);
170 /* Fill in fi->saved_regs */
172 struct frame_extra_info
174 /* Functions calling alloca() change the value of the stack
175 pointer. We need to use initial stack pointer (which is saved in
176 r31 by gcc) in such cases. If a compiler emits traceback table,
177 then we should use the alloca register specified in traceback
179 CORE_ADDR initial_sp; /* initial stack pointer. */
183 rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi)
185 struct frame_extra_info *extra_info =
186 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
187 extra_info->initial_sp = 0;
188 if (get_next_frame (fi) != NULL
189 && get_frame_pc (fi) < TEXT_SEGMENT_BASE)
190 /* We're in get_prev_frame */
191 /* and this is a special signal frame. */
192 /* (fi->pc will be some low address in the kernel, */
193 /* to which the signal handler returns). */
194 deprecated_set_frame_type (fi, SIGTRAMP_FRAME);
197 /* Put here the code to store, into a struct frame_saved_regs,
198 the addresses of the saved registers of frame described by FRAME_INFO.
199 This includes special registers such as pc and fp saved in special
200 ways in the stack frame. sp is even more special:
201 the address we return for it IS the sp for the next frame. */
203 /* In this implementation for RS/6000, we do *not* save sp. I am
204 not sure if it will be needed. The following function takes care of gpr's
208 rs6000_frame_init_saved_regs (struct frame_info *fi)
210 frame_get_saved_regs (fi, NULL);
214 rs6000_init_frame_pc_first (int fromleaf, struct frame_info *prev)
217 ? DEPRECATED_SAVED_PC_AFTER_CALL (get_next_frame (prev))
218 : frame_relative_level (prev) > 0
219 ? DEPRECATED_FRAME_SAVED_PC (get_next_frame (prev))
224 rs6000_frame_args_address (struct frame_info *fi)
226 struct frame_extra_info *extra_info = get_frame_extra_info (fi);
227 if (extra_info->initial_sp != 0)
228 return extra_info->initial_sp;
230 return frame_initial_stack_address (fi);
233 /* Immediately after a function call, return the saved pc.
234 Can't go through the frames for this because on some machines
235 the new frame is not set up until the new function executes
236 some instructions. */
239 rs6000_saved_pc_after_call (struct frame_info *fi)
241 return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
244 /* Get the ith function argument for the current function. */
246 rs6000_fetch_pointer_argument (struct frame_info *frame, int argi,
250 get_frame_register (frame, 3 + argi, &addr);
254 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
257 branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
264 absolute = (int) ((instr >> 1) & 1);
269 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
273 dest = pc + immediate;
277 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
281 dest = pc + immediate;
285 ext_op = (instr >> 1) & 0x3ff;
287 if (ext_op == 16) /* br conditional register */
289 dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
291 /* If we are about to return from a signal handler, dest is
292 something like 0x3c90. The current frame is a signal handler
293 caller frame, upon completion of the sigreturn system call
294 execution will return to the saved PC in the frame. */
295 if (dest < TEXT_SEGMENT_BASE)
297 struct frame_info *fi;
299 fi = get_current_frame ();
301 dest = read_memory_addr (get_frame_base (fi) + SIG_FRAME_PC_OFFSET,
302 gdbarch_tdep (current_gdbarch)->wordsize);
306 else if (ext_op == 528) /* br cond to count reg */
308 dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum) & ~3;
310 /* If we are about to execute a system call, dest is something
311 like 0x22fc or 0x3b00. Upon completion the system call
312 will return to the address in the link register. */
313 if (dest < TEXT_SEGMENT_BASE)
314 dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
323 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
327 /* Sequence of bytes for breakpoint instruction. */
329 const static unsigned char *
330 rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
332 static unsigned char big_breakpoint[] = { 0x7d, 0x82, 0x10, 0x08 };
333 static unsigned char little_breakpoint[] = { 0x08, 0x10, 0x82, 0x7d };
335 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
336 return big_breakpoint;
338 return little_breakpoint;
342 /* AIX does not support PT_STEP. Simulate it. */
345 rs6000_software_single_step (enum target_signal signal,
346 int insert_breakpoints_p)
350 const char *breakp = rs6000_breakpoint_from_pc (&dummy, &breakp_sz);
356 if (insert_breakpoints_p)
361 insn = read_memory_integer (loc, 4);
363 breaks[0] = loc + breakp_sz;
365 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
367 /* Don't put two breakpoints on the same address. */
368 if (breaks[1] == breaks[0])
371 stepBreaks[1].address = 0;
373 for (ii = 0; ii < 2; ++ii)
376 /* ignore invalid breakpoint. */
377 if (breaks[ii] == -1)
379 target_insert_breakpoint (breaks[ii], stepBreaks[ii].data);
380 stepBreaks[ii].address = breaks[ii];
387 /* remove step breakpoints. */
388 for (ii = 0; ii < 2; ++ii)
389 if (stepBreaks[ii].address != 0)
390 target_remove_breakpoint (stepBreaks[ii].address,
391 stepBreaks[ii].data);
393 errno = 0; /* FIXME, don't ignore errors! */
394 /* What errors? {read,write}_memory call error(). */
398 /* return pc value after skipping a function prologue and also return
399 information about a function frame.
401 in struct rs6000_framedata fdata:
402 - frameless is TRUE, if function does not have a frame.
403 - nosavedpc is TRUE, if function does not save %pc value in its frame.
404 - offset is the initial size of this stack frame --- the amount by
405 which we decrement the sp to allocate the frame.
406 - saved_gpr is the number of the first saved gpr.
407 - saved_fpr is the number of the first saved fpr.
408 - saved_vr is the number of the first saved vr.
409 - saved_ev is the number of the first saved ev.
410 - alloca_reg is the number of the register used for alloca() handling.
412 - gpr_offset is the offset of the first saved gpr from the previous frame.
413 - fpr_offset is the offset of the first saved fpr from the previous frame.
414 - vr_offset is the offset of the first saved vr from the previous frame.
415 - ev_offset is the offset of the first saved ev from the previous frame.
416 - lr_offset is the offset of the saved lr
417 - cr_offset is the offset of the saved cr
418 - vrsave_offset is the offset of the saved vrsave register
421 #define SIGNED_SHORT(x) \
422 ((sizeof (short) == 2) \
423 ? ((int)(short)(x)) \
424 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
426 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
428 /* Limit the number of skipped non-prologue instructions, as the examining
429 of the prologue is expensive. */
430 static int max_skip_non_prologue_insns = 10;
432 /* Given PC representing the starting address of a function, and
433 LIM_PC which is the (sloppy) limit to which to scan when looking
434 for a prologue, attempt to further refine this limit by using
435 the line data in the symbol table. If successful, a better guess
436 on where the prologue ends is returned, otherwise the previous
437 value of lim_pc is returned. */
439 /* FIXME: cagney/2004-02-14: This function and logic have largely been
440 superseded by skip_prologue_using_sal. */
443 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc)
445 struct symtab_and_line prologue_sal;
447 prologue_sal = find_pc_line (pc, 0);
448 if (prologue_sal.line != 0)
451 CORE_ADDR addr = prologue_sal.end;
453 /* Handle the case in which compiler's optimizer/scheduler
454 has moved instructions into the prologue. We scan ahead
455 in the function looking for address ranges whose corresponding
456 line number is less than or equal to the first one that we
457 found for the function. (It can be less than when the
458 scheduler puts a body instruction before the first prologue
460 for (i = 2 * max_skip_non_prologue_insns;
461 i > 0 && (lim_pc == 0 || addr < lim_pc);
464 struct symtab_and_line sal;
466 sal = find_pc_line (addr, 0);
469 if (sal.line <= prologue_sal.line
470 && sal.symtab == prologue_sal.symtab)
477 if (lim_pc == 0 || prologue_sal.end < lim_pc)
478 lim_pc = prologue_sal.end;
485 skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
487 CORE_ADDR orig_pc = pc;
488 CORE_ADDR last_prologue_pc = pc;
489 CORE_ADDR li_found_pc = 0;
493 long vr_saved_offset = 0;
502 int minimal_toc_loaded = 0;
503 int prev_insn_was_prologue_insn = 1;
504 int num_skip_non_prologue_insns = 0;
505 const struct bfd_arch_info *arch_info = gdbarch_bfd_arch_info (current_gdbarch);
506 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
508 /* Attempt to find the end of the prologue when no limit is specified.
509 Note that refine_prologue_limit() has been written so that it may
510 be used to "refine" the limits of non-zero PC values too, but this
511 is only safe if we 1) trust the line information provided by the
512 compiler and 2) iterate enough to actually find the end of the
515 It may become a good idea at some point (for both performance and
516 accuracy) to unconditionally call refine_prologue_limit(). But,
517 until we can make a clear determination that this is beneficial,
518 we'll play it safe and only use it to obtain a limit when none
519 has been specified. */
521 lim_pc = refine_prologue_limit (pc, lim_pc);
523 memset (fdata, 0, sizeof (struct rs6000_framedata));
524 fdata->saved_gpr = -1;
525 fdata->saved_fpr = -1;
526 fdata->saved_vr = -1;
527 fdata->saved_ev = -1;
528 fdata->alloca_reg = -1;
529 fdata->frameless = 1;
530 fdata->nosavedpc = 1;
534 /* Sometimes it isn't clear if an instruction is a prologue
535 instruction or not. When we encounter one of these ambiguous
536 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
537 Otherwise, we'll assume that it really is a prologue instruction. */
538 if (prev_insn_was_prologue_insn)
539 last_prologue_pc = pc;
541 /* Stop scanning if we've hit the limit. */
542 if (lim_pc != 0 && pc >= lim_pc)
545 prev_insn_was_prologue_insn = 1;
547 /* Fetch the instruction and convert it to an integer. */
548 if (target_read_memory (pc, buf, 4))
550 op = extract_signed_integer (buf, 4);
552 if ((op & 0xfc1fffff) == 0x7c0802a6)
554 lr_reg = (op & 0x03e00000);
558 else if ((op & 0xfc1fffff) == 0x7c000026)
560 cr_reg = (op & 0x03e00000);
564 else if ((op & 0xfc1f0000) == 0xd8010000)
565 { /* stfd Rx,NUM(r1) */
566 reg = GET_SRC_REG (op);
567 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg)
569 fdata->saved_fpr = reg;
570 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
575 else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
576 (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
577 (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
578 (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
581 reg = GET_SRC_REG (op);
582 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg)
584 fdata->saved_gpr = reg;
585 if ((op & 0xfc1f0003) == 0xf8010000)
587 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
592 else if ((op & 0xffff0000) == 0x60000000)
595 /* Allow nops in the prologue, but do not consider them to
596 be part of the prologue unless followed by other prologue
598 prev_insn_was_prologue_insn = 0;
602 else if ((op & 0xffff0000) == 0x3c000000)
603 { /* addis 0,0,NUM, used
605 fdata->offset = (op & 0x0000ffff) << 16;
606 fdata->frameless = 0;
610 else if ((op & 0xffff0000) == 0x60000000)
611 { /* ori 0,0,NUM, 2nd ha
612 lf of >= 32k frames */
613 fdata->offset |= (op & 0x0000ffff);
614 fdata->frameless = 0;
618 else if (lr_reg != -1 &&
619 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
620 (((op & 0xffff0000) == (lr_reg | 0xf8010000)) ||
621 /* stw Rx, NUM(r1) */
622 ((op & 0xffff0000) == (lr_reg | 0x90010000)) ||
623 /* stwu Rx, NUM(r1) */
624 ((op & 0xffff0000) == (lr_reg | 0x94010000))))
625 { /* where Rx == lr */
626 fdata->lr_offset = offset;
627 fdata->nosavedpc = 0;
629 if ((op & 0xfc000003) == 0xf8000000 || /* std */
630 (op & 0xfc000000) == 0x90000000) /* stw */
632 /* Does not update r1, so add displacement to lr_offset. */
633 fdata->lr_offset += SIGNED_SHORT (op);
638 else if (cr_reg != -1 &&
639 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
640 (((op & 0xffff0000) == (cr_reg | 0xf8010000)) ||
641 /* stw Rx, NUM(r1) */
642 ((op & 0xffff0000) == (cr_reg | 0x90010000)) ||
643 /* stwu Rx, NUM(r1) */
644 ((op & 0xffff0000) == (cr_reg | 0x94010000))))
645 { /* where Rx == cr */
646 fdata->cr_offset = offset;
648 if ((op & 0xfc000003) == 0xf8000000 ||
649 (op & 0xfc000000) == 0x90000000)
651 /* Does not update r1, so add displacement to cr_offset. */
652 fdata->cr_offset += SIGNED_SHORT (op);
657 else if (op == 0x48000005)
663 else if (op == 0x48000004)
668 else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
669 in V.4 -mminimal-toc */
670 (op & 0xffff0000) == 0x3bde0000)
671 { /* addi 30,30,foo@l */
675 else if ((op & 0xfc000001) == 0x48000001)
679 fdata->frameless = 0;
680 /* Don't skip over the subroutine call if it is not within
681 the first three instructions of the prologue. */
682 if ((pc - orig_pc) > 8)
685 op = read_memory_integer (pc + 4, 4);
687 /* At this point, make sure this is not a trampoline
688 function (a function that simply calls another functions,
689 and nothing else). If the next is not a nop, this branch
690 was part of the function prologue. */
692 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
693 break; /* don't skip over
698 /* update stack pointer */
699 else if ((op & 0xfc1f0000) == 0x94010000)
700 { /* stu rX,NUM(r1) || stwu rX,NUM(r1) */
701 fdata->frameless = 0;
702 fdata->offset = SIGNED_SHORT (op);
703 offset = fdata->offset;
706 else if ((op & 0xfc1f016a) == 0x7c01016e)
707 { /* stwux rX,r1,rY */
708 /* no way to figure out what r1 is going to be */
709 fdata->frameless = 0;
710 offset = fdata->offset;
713 else if ((op & 0xfc1f0003) == 0xf8010001)
714 { /* stdu rX,NUM(r1) */
715 fdata->frameless = 0;
716 fdata->offset = SIGNED_SHORT (op & ~3UL);
717 offset = fdata->offset;
720 else if ((op & 0xfc1f016a) == 0x7c01016a)
721 { /* stdux rX,r1,rY */
722 /* no way to figure out what r1 is going to be */
723 fdata->frameless = 0;
724 offset = fdata->offset;
727 /* Load up minimal toc pointer */
728 else if (((op >> 22) == 0x20f || /* l r31,... or l r30,... */
729 (op >> 22) == 0x3af) /* ld r31,... or ld r30,... */
730 && !minimal_toc_loaded)
732 minimal_toc_loaded = 1;
735 /* move parameters from argument registers to local variable
738 else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
739 (((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
740 (((op >> 21) & 31) <= 10) &&
741 ((long) ((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */
745 /* store parameters in stack */
747 else if ((op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
748 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
749 (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
753 /* store parameters in stack via frame pointer */
756 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
757 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
758 (op & 0xfc1f0000) == 0xfc1f0000))
759 { /* frsp, fp?,NUM(r1) */
762 /* Set up frame pointer */
764 else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
767 fdata->frameless = 0;
769 fdata->alloca_reg = (tdep->ppc_gp0_regnum + 31);
772 /* Another way to set up the frame pointer. */
774 else if ((op & 0xfc1fffff) == 0x38010000)
775 { /* addi rX, r1, 0x0 */
776 fdata->frameless = 0;
778 fdata->alloca_reg = (tdep->ppc_gp0_regnum
779 + ((op & ~0x38010000) >> 21));
782 /* AltiVec related instructions. */
783 /* Store the vrsave register (spr 256) in another register for
784 later manipulation, or load a register into the vrsave
785 register. 2 instructions are used: mfvrsave and
786 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
787 and mtspr SPR256, Rn. */
788 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
789 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
790 else if ((op & 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
792 vrsave_reg = GET_SRC_REG (op);
795 else if ((op & 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
799 /* Store the register where vrsave was saved to onto the stack:
800 rS is the register where vrsave was stored in a previous
802 /* 100100 sssss 00001 dddddddd dddddddd */
803 else if ((op & 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
805 if (vrsave_reg == GET_SRC_REG (op))
807 fdata->vrsave_offset = SIGNED_SHORT (op) + offset;
812 /* Compute the new value of vrsave, by modifying the register
813 where vrsave was saved to. */
814 else if (((op & 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
815 || ((op & 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
819 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
820 in a pair of insns to save the vector registers on the
822 /* 001110 00000 00000 iiii iiii iiii iiii */
823 /* 001110 01110 00000 iiii iiii iiii iiii */
824 else if ((op & 0xffff0000) == 0x38000000 /* li r0, SIMM */
825 || (op & 0xffff0000) == 0x39c00000) /* li r14, SIMM */
828 vr_saved_offset = SIGNED_SHORT (op);
830 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
831 /* 011111 sssss 11111 00000 00111001110 */
832 else if ((op & 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
834 if (pc == (li_found_pc + 4))
836 vr_reg = GET_SRC_REG (op);
837 /* If this is the first vector reg to be saved, or if
838 it has a lower number than others previously seen,
839 reupdate the frame info. */
840 if (fdata->saved_vr == -1 || fdata->saved_vr > vr_reg)
842 fdata->saved_vr = vr_reg;
843 fdata->vr_offset = vr_saved_offset + offset;
845 vr_saved_offset = -1;
850 /* End AltiVec related instructions. */
852 /* Start BookE related instructions. */
853 /* Store gen register S at (r31+uimm).
854 Any register less than r13 is volatile, so we don't care. */
855 /* 000100 sssss 11111 iiiii 01100100001 */
856 else if (arch_info->mach == bfd_mach_ppc_e500
857 && (op & 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
859 if ((op & 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
862 ev_reg = GET_SRC_REG (op);
863 imm = (op >> 11) & 0x1f;
865 /* If this is the first vector reg to be saved, or if
866 it has a lower number than others previously seen,
867 reupdate the frame info. */
868 if (fdata->saved_ev == -1 || fdata->saved_ev > ev_reg)
870 fdata->saved_ev = ev_reg;
871 fdata->ev_offset = ev_offset + offset;
876 /* Store gen register rS at (r1+rB). */
877 /* 000100 sssss 00001 bbbbb 01100100000 */
878 else if (arch_info->mach == bfd_mach_ppc_e500
879 && (op & 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
881 if (pc == (li_found_pc + 4))
883 ev_reg = GET_SRC_REG (op);
884 /* If this is the first vector reg to be saved, or if
885 it has a lower number than others previously seen,
886 reupdate the frame info. */
887 /* We know the contents of rB from the previous instruction. */
888 if (fdata->saved_ev == -1 || fdata->saved_ev > ev_reg)
890 fdata->saved_ev = ev_reg;
891 fdata->ev_offset = vr_saved_offset + offset;
893 vr_saved_offset = -1;
899 /* Store gen register r31 at (rA+uimm). */
900 /* 000100 11111 aaaaa iiiii 01100100001 */
901 else if (arch_info->mach == bfd_mach_ppc_e500
902 && (op & 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
904 /* Wwe know that the source register is 31 already, but
905 it can't hurt to compute it. */
906 ev_reg = GET_SRC_REG (op);
907 ev_offset = ((op >> 11) & 0x1f) * 8;
908 /* If this is the first vector reg to be saved, or if
909 it has a lower number than others previously seen,
910 reupdate the frame info. */
911 if (fdata->saved_ev == -1 || fdata->saved_ev > ev_reg)
913 fdata->saved_ev = ev_reg;
914 fdata->ev_offset = ev_offset + offset;
919 /* Store gen register S at (r31+r0).
920 Store param on stack when offset from SP bigger than 4 bytes. */
921 /* 000100 sssss 11111 00000 01100100000 */
922 else if (arch_info->mach == bfd_mach_ppc_e500
923 && (op & 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
925 if (pc == (li_found_pc + 4))
927 if ((op & 0x03e00000) >= 0x01a00000)
929 ev_reg = GET_SRC_REG (op);
930 /* If this is the first vector reg to be saved, or if
931 it has a lower number than others previously seen,
932 reupdate the frame info. */
933 /* We know the contents of r0 from the previous
935 if (fdata->saved_ev == -1 || fdata->saved_ev > ev_reg)
937 fdata->saved_ev = ev_reg;
938 fdata->ev_offset = vr_saved_offset + offset;
942 vr_saved_offset = -1;
947 /* End BookE related instructions. */
951 /* Not a recognized prologue instruction.
952 Handle optimizer code motions into the prologue by continuing
953 the search if we have no valid frame yet or if the return
954 address is not yet saved in the frame. */
955 if (fdata->frameless == 0
956 && (lr_reg == -1 || fdata->nosavedpc == 0))
959 if (op == 0x4e800020 /* blr */
960 || op == 0x4e800420) /* bctr */
961 /* Do not scan past epilogue in frameless functions or
964 if ((op & 0xf4000000) == 0x40000000) /* bxx */
965 /* Never skip branches. */
968 if (num_skip_non_prologue_insns++ > max_skip_non_prologue_insns)
969 /* Do not scan too many insns, scanning insns is expensive with
973 /* Continue scanning. */
974 prev_insn_was_prologue_insn = 0;
980 /* I have problems with skipping over __main() that I need to address
981 * sometime. Previously, I used to use misc_function_vector which
982 * didn't work as well as I wanted to be. -MGO */
984 /* If the first thing after skipping a prolog is a branch to a function,
985 this might be a call to an initializer in main(), introduced by gcc2.
986 We'd like to skip over it as well. Fortunately, xlc does some extra
987 work before calling a function right after a prologue, thus we can
988 single out such gcc2 behaviour. */
991 if ((op & 0xfc000001) == 0x48000001)
992 { /* bl foo, an initializer function? */
993 op = read_memory_integer (pc + 4, 4);
995 if (op == 0x4def7b82)
996 { /* cror 0xf, 0xf, 0xf (nop) */
998 /* Check and see if we are in main. If so, skip over this
999 initializer function as well. */
1001 tmp = find_pc_misc_function (pc);
1003 && strcmp (misc_function_vector[tmp].name, main_name ()) == 0)
1009 fdata->offset = -fdata->offset;
1010 return last_prologue_pc;
1014 /*************************************************************************
1015 Support for creating pushing a dummy frame into the stack, and popping
1017 *************************************************************************/
1020 /* Pop the innermost frame, go back to the caller. */
1023 rs6000_pop_frame (void)
1025 CORE_ADDR pc, lr, sp, prev_sp, addr; /* %pc, %lr, %sp */
1026 struct rs6000_framedata fdata;
1027 struct frame_info *frame = get_current_frame ();
1031 sp = get_frame_base (frame);
1033 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1034 get_frame_base (frame),
1035 get_frame_base (frame)))
1037 generic_pop_dummy_frame ();
1038 flush_cached_frames ();
1042 /* Make sure that all registers are valid. */
1043 deprecated_read_register_bytes (0, NULL, DEPRECATED_REGISTER_BYTES);
1045 /* Figure out previous %pc value. If the function is frameless, it is
1046 still in the link register, otherwise walk the frames and retrieve the
1047 saved %pc value in the previous frame. */
1049 addr = get_frame_func (frame);
1050 (void) skip_prologue (addr, get_frame_pc (frame), &fdata);
1052 wordsize = gdbarch_tdep (current_gdbarch)->wordsize;
1053 if (fdata.frameless)
1056 prev_sp = read_memory_addr (sp, wordsize);
1057 if (fdata.lr_offset == 0)
1058 lr = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
1060 lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize);
1062 /* reset %pc value. */
1063 write_register (PC_REGNUM, lr);
1065 /* reset register values if any was saved earlier. */
1067 if (fdata.saved_gpr != -1)
1069 addr = prev_sp + fdata.gpr_offset;
1070 for (ii = fdata.saved_gpr; ii <= 31; ++ii)
1072 read_memory (addr, &deprecated_registers[DEPRECATED_REGISTER_BYTE (ii)],
1078 if (fdata.saved_fpr != -1)
1080 addr = prev_sp + fdata.fpr_offset;
1081 for (ii = fdata.saved_fpr; ii <= 31; ++ii)
1083 read_memory (addr, &deprecated_registers[DEPRECATED_REGISTER_BYTE (ii + FP0_REGNUM)], 8);
1088 write_register (SP_REGNUM, prev_sp);
1089 target_store_registers (-1);
1090 flush_cached_frames ();
1093 /* All the ABI's require 16 byte alignment. */
1095 rs6000_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1097 return (addr & -16);
1100 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1101 the first eight words of the argument list (that might be less than
1102 eight parameters if some parameters occupy more than one word) are
1103 passed in r3..r10 registers. float and double parameters are
1104 passed in fpr's, in addition to that. Rest of the parameters if any
1105 are passed in user stack. There might be cases in which half of the
1106 parameter is copied into registers, the other half is pushed into
1109 Stack must be aligned on 64-bit boundaries when synthesizing
1112 If the function is returning a structure, then the return address is passed
1113 in r3, then the first 7 words of the parameters can be passed in registers,
1114 starting from r4. */
1117 rs6000_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
1118 struct regcache *regcache, CORE_ADDR bp_addr,
1119 int nargs, struct value **args, CORE_ADDR sp,
1120 int struct_return, CORE_ADDR struct_addr)
1122 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1125 int argno; /* current argument number */
1126 int argbytes; /* current argument byte */
1127 char tmp_buffer[50];
1128 int f_argno = 0; /* current floating point argno */
1129 int wordsize = gdbarch_tdep (current_gdbarch)->wordsize;
1131 struct value *arg = 0;
1136 /* The first eight words of ther arguments are passed in registers.
1137 Copy them appropriately. */
1140 /* If the function is returning a `struct', then the first word
1141 (which will be passed in r3) is used for struct return address.
1142 In that case we should advance one word and start from r4
1143 register to copy parameters. */
1146 regcache_raw_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1152 effectively indirect call... gcc does...
1154 return_val example( float, int);
1157 float in fp0, int in r3
1158 offset of stack on overflow 8/16
1159 for varargs, must go by type.
1161 float in r3&r4, int in r5
1162 offset of stack on overflow different
1164 return in r3 or f0. If no float, must study how gcc emulates floats;
1165 pay attention to arg promotion.
1166 User may have to cast\args to handle promotion correctly
1167 since gdb won't know if prototype supplied or not.
1170 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
1172 int reg_size = DEPRECATED_REGISTER_RAW_SIZE (ii + 3);
1175 type = check_typedef (VALUE_TYPE (arg));
1176 len = TYPE_LENGTH (type);
1178 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1181 /* Floating point arguments are passed in fpr's, as well as gpr's.
1182 There are 13 fpr's reserved for passing parameters. At this point
1183 there is no way we would run out of them. */
1187 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
1189 memcpy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
1190 VALUE_CONTENTS (arg),
1198 /* Argument takes more than one register. */
1199 while (argbytes < len)
1201 memset (&deprecated_registers[DEPRECATED_REGISTER_BYTE (ii + 3)], 0,
1203 memcpy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (ii + 3)],
1204 ((char *) VALUE_CONTENTS (arg)) + argbytes,
1205 (len - argbytes) > reg_size
1206 ? reg_size : len - argbytes);
1207 ++ii, argbytes += reg_size;
1210 goto ran_out_of_registers_for_arguments;
1217 /* Argument can fit in one register. No problem. */
1218 int adj = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? reg_size - len : 0;
1219 memset (&deprecated_registers[DEPRECATED_REGISTER_BYTE (ii + 3)], 0, reg_size);
1220 memcpy ((char *)&deprecated_registers[DEPRECATED_REGISTER_BYTE (ii + 3)] + adj,
1221 VALUE_CONTENTS (arg), len);
1226 ran_out_of_registers_for_arguments:
1228 saved_sp = read_sp ();
1230 /* Location for 8 parameters are always reserved. */
1233 /* Another six words for back chain, TOC register, link register, etc. */
1236 /* Stack pointer must be quadword aligned. */
1239 /* If there are more arguments, allocate space for them in
1240 the stack, then push them starting from the ninth one. */
1242 if ((argno < nargs) || argbytes)
1248 space += ((len - argbytes + 3) & -4);
1254 for (; jj < nargs; ++jj)
1256 struct value *val = args[jj];
1257 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
1260 /* Add location required for the rest of the parameters. */
1261 space = (space + 15) & -16;
1264 /* This is another instance we need to be concerned about
1265 securing our stack space. If we write anything underneath %sp
1266 (r1), we might conflict with the kernel who thinks he is free
1267 to use this area. So, update %sp first before doing anything
1270 regcache_raw_write_signed (regcache, SP_REGNUM, sp);
1272 /* If the last argument copied into the registers didn't fit there
1273 completely, push the rest of it into stack. */
1277 write_memory (sp + 24 + (ii * 4),
1278 ((char *) VALUE_CONTENTS (arg)) + argbytes,
1281 ii += ((len - argbytes + 3) & -4) / 4;
1284 /* Push the rest of the arguments into stack. */
1285 for (; argno < nargs; ++argno)
1289 type = check_typedef (VALUE_TYPE (arg));
1290 len = TYPE_LENGTH (type);
1293 /* Float types should be passed in fpr's, as well as in the
1295 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
1300 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
1302 memcpy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
1303 VALUE_CONTENTS (arg),
1308 write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len);
1309 ii += ((len + 3) & -4) / 4;
1313 /* Set the stack pointer. According to the ABI, the SP is meant to
1314 be set _before_ the corresponding stack space is used. On AIX,
1315 this even applies when the target has been completely stopped!
1316 Not doing this can lead to conflicts with the kernel which thinks
1317 that it still has control over this not-yet-allocated stack
1319 regcache_raw_write_signed (regcache, SP_REGNUM, sp);
1321 /* Set back chain properly. */
1322 store_unsigned_integer (tmp_buffer, 4, saved_sp);
1323 write_memory (sp, tmp_buffer, 4);
1325 /* Point the inferior function call's return address at the dummy's
1327 regcache_raw_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1329 /* Set the TOC register, get the value from the objfile reader
1330 which, in turn, gets it from the VMAP table. */
1331 if (rs6000_find_toc_address_hook != NULL)
1333 CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (func_addr);
1334 regcache_raw_write_signed (regcache, tdep->ppc_toc_regnum, tocvalue);
1337 target_store_registers (-1);
1341 /* PowerOpen always puts structures in memory. Vectors, which were
1342 added later, do get returned in a register though. */
1345 rs6000_use_struct_convention (int gcc_p, struct type *value_type)
1347 if ((TYPE_LENGTH (value_type) == 16 || TYPE_LENGTH (value_type) == 8)
1348 && TYPE_VECTOR (value_type))
1354 rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf)
1357 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1359 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
1364 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1365 We need to truncate the return value into float size (4 byte) if
1368 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
1370 ®buf[DEPRECATED_REGISTER_BYTE (FP0_REGNUM + 1)],
1371 TYPE_LENGTH (valtype));
1374 memcpy (&dd, ®buf[DEPRECATED_REGISTER_BYTE (FP0_REGNUM + 1)], 8);
1376 memcpy (valbuf, &ff, sizeof (float));
1379 else if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1380 && TYPE_LENGTH (valtype) == 16
1381 && TYPE_VECTOR (valtype))
1383 memcpy (valbuf, regbuf + DEPRECATED_REGISTER_BYTE (tdep->ppc_vr0_regnum + 2),
1384 TYPE_LENGTH (valtype));
1388 /* return value is copied starting from r3. */
1389 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
1390 && TYPE_LENGTH (valtype) < DEPRECATED_REGISTER_RAW_SIZE (3))
1391 offset = DEPRECATED_REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
1394 regbuf + DEPRECATED_REGISTER_BYTE (3) + offset,
1395 TYPE_LENGTH (valtype));
1399 /* Return whether handle_inferior_event() should proceed through code
1400 starting at PC in function NAME when stepping.
1402 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1403 handle memory references that are too distant to fit in instructions
1404 generated by the compiler. For example, if 'foo' in the following
1409 is greater than 32767, the linker might replace the lwz with a branch to
1410 somewhere in @FIX1 that does the load in 2 instructions and then branches
1411 back to where execution should continue.
1413 GDB should silently step over @FIX code, just like AIX dbx does.
1414 Unfortunately, the linker uses the "b" instruction for the branches,
1415 meaning that the link register doesn't get set. Therefore, GDB's usual
1416 step_over_function() mechanism won't work.
1418 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1419 in handle_inferior_event() to skip past @FIX code. */
1422 rs6000_in_solib_return_trampoline (CORE_ADDR pc, char *name)
1424 return name && !strncmp (name, "@FIX", 4);
1427 /* Skip code that the user doesn't want to see when stepping:
1429 1. Indirect function calls use a piece of trampoline code to do context
1430 switching, i.e. to set the new TOC table. Skip such code if we are on
1431 its first instruction (as when we have single-stepped to here).
1433 2. Skip shared library trampoline code (which is different from
1434 indirect function call trampolines).
1436 3. Skip bigtoc fixup code.
1438 Result is desired PC to step until, or NULL if we are not in
1439 code that should be skipped. */
1442 rs6000_skip_trampoline_code (CORE_ADDR pc)
1444 unsigned int ii, op;
1446 CORE_ADDR solib_target_pc;
1447 struct minimal_symbol *msymbol;
1449 static unsigned trampoline_code[] =
1451 0x800b0000, /* l r0,0x0(r11) */
1452 0x90410014, /* st r2,0x14(r1) */
1453 0x7c0903a6, /* mtctr r0 */
1454 0x804b0004, /* l r2,0x4(r11) */
1455 0x816b0008, /* l r11,0x8(r11) */
1456 0x4e800420, /* bctr */
1457 0x4e800020, /* br */
1461 /* Check for bigtoc fixup code. */
1462 msymbol = lookup_minimal_symbol_by_pc (pc);
1463 if (msymbol && rs6000_in_solib_return_trampoline (pc, DEPRECATED_SYMBOL_NAME (msymbol)))
1465 /* Double-check that the third instruction from PC is relative "b". */
1466 op = read_memory_integer (pc + 8, 4);
1467 if ((op & 0xfc000003) == 0x48000000)
1469 /* Extract bits 6-29 as a signed 24-bit relative word address and
1470 add it to the containing PC. */
1471 rel = ((int)(op << 6) >> 6);
1472 return pc + 8 + rel;
1476 /* If pc is in a shared library trampoline, return its target. */
1477 solib_target_pc = find_solib_trampoline_target (pc);
1478 if (solib_target_pc)
1479 return solib_target_pc;
1481 for (ii = 0; trampoline_code[ii]; ++ii)
1483 op = read_memory_integer (pc + (ii * 4), 4);
1484 if (op != trampoline_code[ii])
1487 ii = read_register (11); /* r11 holds destination addr */
1488 pc = read_memory_addr (ii, gdbarch_tdep (current_gdbarch)->wordsize); /* (r11) value */
1492 /* Determines whether the function FI has a frame on the stack or not. */
1495 rs6000_frameless_function_invocation (struct frame_info *fi)
1497 CORE_ADDR func_start;
1498 struct rs6000_framedata fdata;
1500 /* Don't even think about framelessness except on the innermost frame
1501 or if the function was interrupted by a signal. */
1502 if (get_next_frame (fi) != NULL
1503 && !(get_frame_type (get_next_frame (fi)) == SIGTRAMP_FRAME))
1506 func_start = get_frame_func (fi);
1508 /* If we failed to find the start of the function, it is a mistake
1509 to inspect the instructions. */
1513 /* A frame with a zero PC is usually created by dereferencing a NULL
1514 function pointer, normally causing an immediate core dump of the
1515 inferior. Mark function as frameless, as the inferior has no chance
1516 of setting up a stack frame. */
1517 if (get_frame_pc (fi) == 0)
1523 (void) skip_prologue (func_start, get_frame_pc (fi), &fdata);
1524 return fdata.frameless;
1527 /* Return the PC saved in a frame. */
1530 rs6000_frame_saved_pc (struct frame_info *fi)
1532 CORE_ADDR func_start;
1533 struct rs6000_framedata fdata;
1534 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1535 int wordsize = tdep->wordsize;
1537 if ((get_frame_type (fi) == SIGTRAMP_FRAME))
1538 return read_memory_addr (get_frame_base (fi) + SIG_FRAME_PC_OFFSET,
1541 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi),
1542 get_frame_base (fi),
1543 get_frame_base (fi)))
1544 return deprecated_read_register_dummy (get_frame_pc (fi),
1545 get_frame_base (fi), PC_REGNUM);
1547 func_start = get_frame_func (fi);
1549 /* If we failed to find the start of the function, it is a mistake
1550 to inspect the instructions. */
1554 (void) skip_prologue (func_start, get_frame_pc (fi), &fdata);
1556 if (fdata.lr_offset == 0 && get_next_frame (fi) != NULL)
1558 if ((get_frame_type (get_next_frame (fi)) == SIGTRAMP_FRAME))
1559 return read_memory_addr ((get_frame_base (get_next_frame (fi))
1560 + SIG_FRAME_LR_OFFSET),
1562 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi)), 0, 0))
1563 /* The link register wasn't saved by this frame and the next
1564 (inner, newer) frame is a dummy. Get the link register
1565 value by unwinding it from that [dummy] frame. */
1568 frame_unwind_unsigned_register (get_next_frame (fi),
1569 tdep->ppc_lr_regnum, &lr);
1573 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi)
1574 + tdep->lr_frame_offset,
1578 if (fdata.lr_offset == 0)
1579 return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
1581 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi) + fdata.lr_offset,
1585 /* If saved registers of frame FI are not known yet, read and cache them.
1586 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1587 in which case the framedata are read. */
1590 frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap)
1592 CORE_ADDR frame_addr;
1593 struct rs6000_framedata work_fdata;
1594 struct gdbarch_tdep * tdep = gdbarch_tdep (current_gdbarch);
1595 int wordsize = tdep->wordsize;
1597 if (deprecated_get_frame_saved_regs (fi))
1602 fdatap = &work_fdata;
1603 (void) skip_prologue (get_frame_func (fi), get_frame_pc (fi), fdatap);
1606 frame_saved_regs_zalloc (fi);
1608 /* If there were any saved registers, figure out parent's stack
1610 /* The following is true only if the frame doesn't have a call to
1613 if (fdatap->saved_fpr == 0
1614 && fdatap->saved_gpr == 0
1615 && fdatap->saved_vr == 0
1616 && fdatap->saved_ev == 0
1617 && fdatap->lr_offset == 0
1618 && fdatap->cr_offset == 0
1619 && fdatap->vr_offset == 0
1620 && fdatap->ev_offset == 0)
1623 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1624 address of the current frame. Things might be easier if the
1625 ->frame pointed to the outer-most address of the frame. In the
1626 mean time, the address of the prev frame is used as the base
1627 address of this frame. */
1628 frame_addr = DEPRECATED_FRAME_CHAIN (fi);
1630 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1631 All fpr's from saved_fpr to fp31 are saved. */
1633 if (fdatap->saved_fpr >= 0)
1636 CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset;
1637 for (i = fdatap->saved_fpr; i < 32; i++)
1639 deprecated_get_frame_saved_regs (fi)[FP0_REGNUM + i] = fpr_addr;
1644 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1645 All gpr's from saved_gpr to gpr31 are saved. */
1647 if (fdatap->saved_gpr >= 0)
1650 CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset;
1651 for (i = fdatap->saved_gpr; i < 32; i++)
1653 deprecated_get_frame_saved_regs (fi)[tdep->ppc_gp0_regnum + i] = gpr_addr;
1654 gpr_addr += wordsize;
1658 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1659 All vr's from saved_vr to vr31 are saved. */
1660 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
1662 if (fdatap->saved_vr >= 0)
1665 CORE_ADDR vr_addr = frame_addr + fdatap->vr_offset;
1666 for (i = fdatap->saved_vr; i < 32; i++)
1668 deprecated_get_frame_saved_regs (fi)[tdep->ppc_vr0_regnum + i] = vr_addr;
1669 vr_addr += DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
1674 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1675 All vr's from saved_ev to ev31 are saved. ????? */
1676 if (tdep->ppc_ev0_regnum != -1 && tdep->ppc_ev31_regnum != -1)
1678 if (fdatap->saved_ev >= 0)
1681 CORE_ADDR ev_addr = frame_addr + fdatap->ev_offset;
1682 for (i = fdatap->saved_ev; i < 32; i++)
1684 deprecated_get_frame_saved_regs (fi)[tdep->ppc_ev0_regnum + i] = ev_addr;
1685 deprecated_get_frame_saved_regs (fi)[tdep->ppc_gp0_regnum + i] = ev_addr + 4;
1686 ev_addr += DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_ev0_regnum);
1691 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1693 if (fdatap->cr_offset != 0)
1694 deprecated_get_frame_saved_regs (fi)[tdep->ppc_cr_regnum] = frame_addr + fdatap->cr_offset;
1696 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1698 if (fdatap->lr_offset != 0)
1699 deprecated_get_frame_saved_regs (fi)[tdep->ppc_lr_regnum] = frame_addr + fdatap->lr_offset;
1701 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1703 if (fdatap->vrsave_offset != 0)
1704 deprecated_get_frame_saved_regs (fi)[tdep->ppc_vrsave_regnum] = frame_addr + fdatap->vrsave_offset;
1707 /* Return the address of a frame. This is the inital %sp value when the frame
1708 was first allocated. For functions calling alloca(), it might be saved in
1709 an alloca register. */
1712 frame_initial_stack_address (struct frame_info *fi)
1715 struct rs6000_framedata fdata;
1716 struct frame_info *callee_fi;
1718 /* If the initial stack pointer (frame address) of this frame is known,
1721 if (get_frame_extra_info (fi)->initial_sp)
1722 return get_frame_extra_info (fi)->initial_sp;
1724 /* Find out if this function is using an alloca register. */
1726 (void) skip_prologue (get_frame_func (fi), get_frame_pc (fi), &fdata);
1728 /* If saved registers of this frame are not known yet, read and
1731 if (!deprecated_get_frame_saved_regs (fi))
1732 frame_get_saved_regs (fi, &fdata);
1734 /* If no alloca register used, then fi->frame is the value of the %sp for
1735 this frame, and it is good enough. */
1737 if (fdata.alloca_reg < 0)
1739 get_frame_extra_info (fi)->initial_sp = get_frame_base (fi);
1740 return get_frame_extra_info (fi)->initial_sp;
1743 /* There is an alloca register, use its value, in the current frame,
1744 as the initial stack pointer. */
1746 char tmpbuf[MAX_REGISTER_SIZE];
1747 if (frame_register_read (fi, fdata.alloca_reg, tmpbuf))
1749 get_frame_extra_info (fi)->initial_sp
1750 = extract_unsigned_integer (tmpbuf,
1751 DEPRECATED_REGISTER_RAW_SIZE (fdata.alloca_reg));
1754 /* NOTE: cagney/2002-04-17: At present the only time
1755 frame_register_read will fail is when the register isn't
1756 available. If that does happen, use the frame. */
1757 get_frame_extra_info (fi)->initial_sp = get_frame_base (fi);
1759 return get_frame_extra_info (fi)->initial_sp;
1762 /* Describe the pointer in each stack frame to the previous stack frame
1765 /* DEPRECATED_FRAME_CHAIN takes a frame's nominal address and produces
1766 the frame's chain-pointer. */
1768 /* In the case of the RS/6000, the frame's nominal address
1769 is the address of a 4-byte word containing the calling frame's address. */
1772 rs6000_frame_chain (struct frame_info *thisframe)
1774 CORE_ADDR fp, fpp, lr;
1775 int wordsize = gdbarch_tdep (current_gdbarch)->wordsize;
1777 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe),
1778 get_frame_base (thisframe),
1779 get_frame_base (thisframe)))
1780 /* A dummy frame always correctly chains back to the previous
1782 return read_memory_addr (get_frame_base (thisframe), wordsize);
1784 if (deprecated_inside_entry_file (get_frame_pc (thisframe))
1785 || get_frame_pc (thisframe) == entry_point_address ())
1788 if ((get_frame_type (thisframe) == SIGTRAMP_FRAME))
1789 fp = read_memory_addr (get_frame_base (thisframe) + SIG_FRAME_FP_OFFSET,
1791 else if (get_next_frame (thisframe) != NULL
1792 && (get_frame_type (get_next_frame (thisframe)) == SIGTRAMP_FRAME)
1793 && (DEPRECATED_FRAMELESS_FUNCTION_INVOCATION_P ()
1794 && DEPRECATED_FRAMELESS_FUNCTION_INVOCATION (thisframe)))
1795 /* A frameless function interrupted by a signal did not change the
1797 fp = get_frame_base (thisframe);
1799 fp = read_memory_addr (get_frame_base (thisframe), wordsize);
1803 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1804 isn't available with that word size, return 0. */
1807 regsize (const struct reg *reg, int wordsize)
1809 return wordsize == 8 ? reg->sz64 : reg->sz32;
1812 /* Return the name of register number N, or null if no such register exists
1813 in the current architecture. */
1816 rs6000_register_name (int n)
1818 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1819 const struct reg *reg = tdep->regs + n;
1821 if (!regsize (reg, tdep->wordsize))
1826 /* Index within `registers' of the first byte of the space for
1830 rs6000_register_byte (int n)
1832 return gdbarch_tdep (current_gdbarch)->regoff[n];
1835 /* Return the number of bytes of storage in the actual machine representation
1836 for register N if that register is available, else return 0. */
1839 rs6000_register_raw_size (int n)
1841 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1842 const struct reg *reg = tdep->regs + n;
1843 return regsize (reg, tdep->wordsize);
1846 /* Return the GDB type object for the "standard" data type
1847 of data in register N. */
1849 static struct type *
1850 rs6000_register_virtual_type (int n)
1852 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1853 const struct reg *reg = tdep->regs + n;
1856 return builtin_type_double;
1859 int size = regsize (reg, tdep->wordsize);
1863 return builtin_type_int0;
1865 return builtin_type_int32;
1867 if (tdep->ppc_ev0_regnum <= n && n <= tdep->ppc_ev31_regnum)
1868 return builtin_type_vec64;
1870 return builtin_type_int64;
1873 return builtin_type_vec128;
1876 internal_error (__FILE__, __LINE__, "Register %d size %d unknown",
1882 /* Return whether register N requires conversion when moving from raw format
1885 The register format for RS/6000 floating point registers is always
1886 double, we need a conversion if the memory format is float. */
1889 rs6000_register_convertible (int n)
1891 const struct reg *reg = gdbarch_tdep (current_gdbarch)->regs + n;
1895 /* Convert data from raw format for register N in buffer FROM
1896 to virtual format with type TYPE in buffer TO. */
1899 rs6000_register_convert_to_virtual (int n, struct type *type,
1900 char *from, char *to)
1902 if (TYPE_LENGTH (type) != DEPRECATED_REGISTER_RAW_SIZE (n))
1904 double val = deprecated_extract_floating (from, DEPRECATED_REGISTER_RAW_SIZE (n));
1905 deprecated_store_floating (to, TYPE_LENGTH (type), val);
1908 memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (n));
1911 /* Convert data from virtual format with type TYPE in buffer FROM
1912 to raw format for register N in buffer TO. */
1915 rs6000_register_convert_to_raw (struct type *type, int n,
1916 const char *from, char *to)
1918 if (TYPE_LENGTH (type) != DEPRECATED_REGISTER_RAW_SIZE (n))
1920 double val = deprecated_extract_floating (from, TYPE_LENGTH (type));
1921 deprecated_store_floating (to, DEPRECATED_REGISTER_RAW_SIZE (n), val);
1924 memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (n));
1928 e500_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1929 int reg_nr, void *buffer)
1933 char temp_buffer[MAX_REGISTER_SIZE];
1934 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1936 if (reg_nr >= tdep->ppc_gp0_regnum
1937 && reg_nr <= tdep->ppc_gplast_regnum)
1939 base_regnum = reg_nr - tdep->ppc_gp0_regnum + tdep->ppc_ev0_regnum;
1941 /* Build the value in the provided buffer. */
1942 /* Read the raw register of which this one is the lower portion. */
1943 regcache_raw_read (regcache, base_regnum, temp_buffer);
1944 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1946 memcpy ((char *) buffer, temp_buffer + offset, 4);
1951 e500_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1952 int reg_nr, const void *buffer)
1956 char temp_buffer[MAX_REGISTER_SIZE];
1957 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1959 if (reg_nr >= tdep->ppc_gp0_regnum
1960 && reg_nr <= tdep->ppc_gplast_regnum)
1962 base_regnum = reg_nr - tdep->ppc_gp0_regnum + tdep->ppc_ev0_regnum;
1963 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1964 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1967 /* Let's read the value of the base register into a temporary
1968 buffer, so that overwriting the last four bytes with the new
1969 value of the pseudo will leave the upper 4 bytes unchanged. */
1970 regcache_raw_read (regcache, base_regnum, temp_buffer);
1972 /* Write as an 8 byte quantity. */
1973 memcpy (temp_buffer + offset, (char *) buffer, 4);
1974 regcache_raw_write (regcache, base_regnum, temp_buffer);
1978 /* Convert a dwarf2 register number to a gdb REGNUM. */
1980 e500_dwarf2_reg_to_regnum (int num)
1983 if (0 <= num && num <= 31)
1984 return num + gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum;
1989 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1992 rs6000_stab_reg_to_regnum (int num)
1998 regnum = gdbarch_tdep (current_gdbarch)->ppc_mq_regnum;
2001 regnum = gdbarch_tdep (current_gdbarch)->ppc_lr_regnum;
2004 regnum = gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum;
2007 regnum = gdbarch_tdep (current_gdbarch)->ppc_xer_regnum;
2017 rs6000_store_return_value (struct type *type, char *valbuf)
2019 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
2021 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2023 /* Floating point values are returned starting from FPR1 and up.
2024 Say a double_double_double type could be returned in
2025 FPR1/FPR2/FPR3 triple. */
2027 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (FP0_REGNUM + 1), valbuf,
2028 TYPE_LENGTH (type));
2029 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY)
2031 if (TYPE_LENGTH (type) == 16
2032 && TYPE_VECTOR (type))
2033 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (tdep->ppc_vr0_regnum + 2),
2034 valbuf, TYPE_LENGTH (type));
2037 /* Everything else is returned in GPR3 and up. */
2038 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum + 3),
2039 valbuf, TYPE_LENGTH (type));
2042 /* Extract from an array REGBUF containing the (raw) register state
2043 the address in which a function should return its structure value,
2044 as a CORE_ADDR (or an expression that can be used as one). */
2047 rs6000_extract_struct_value_address (struct regcache *regcache)
2049 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2050 function call GDB knows the address of the struct return value
2051 and hence, should not need to call this function. Unfortunately,
2052 the current call_function_by_hand() code only saves the most
2053 recent struct address leading to occasional calls. The code
2054 should instead maintain a stack of such addresses (in the dummy
2056 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2057 really got no idea where the return value is being stored. While
2058 r3, on function entry, contained the address it will have since
2059 been reused (scratch) and hence wouldn't be valid */
2063 /* Hook called when a new child process is started. */
2066 rs6000_create_inferior (int pid)
2068 if (rs6000_set_host_arch_hook)
2069 rs6000_set_host_arch_hook (pid);
2072 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
2074 Usually a function pointer's representation is simply the address
2075 of the function. On the RS/6000 however, a function pointer is
2076 represented by a pointer to a TOC entry. This TOC entry contains
2077 three words, the first word is the address of the function, the
2078 second word is the TOC pointer (r2), and the third word is the
2079 static chain value. Throughout GDB it is currently assumed that a
2080 function pointer contains the address of the function, which is not
2081 easy to fix. In addition, the conversion of a function address to
2082 a function pointer would require allocation of a TOC entry in the
2083 inferior's memory space, with all its drawbacks. To be able to
2084 call C++ virtual methods in the inferior (which are called via
2085 function pointers), find_function_addr uses this function to get the
2086 function address from a function pointer. */
2088 /* Return real function address if ADDR (a function pointer) is in the data
2089 space and is therefore a special function pointer. */
2092 rs6000_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
2094 struct target_ops *targ)
2096 struct obj_section *s;
2098 s = find_pc_section (addr);
2099 if (s && s->the_bfd_section->flags & SEC_CODE)
2102 /* ADDR is in the data space, so it's a special function pointer. */
2103 return read_memory_addr (addr, gdbarch_tdep (current_gdbarch)->wordsize);
2107 /* Handling the various POWER/PowerPC variants. */
2110 /* The arrays here called registers_MUMBLE hold information about available
2113 For each family of PPC variants, I've tried to isolate out the
2114 common registers and put them up front, so that as long as you get
2115 the general family right, GDB will correctly identify the registers
2116 common to that family. The common register sets are:
2118 For the 60x family: hid0 hid1 iabr dabr pir
2120 For the 505 and 860 family: eie eid nri
2122 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2123 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2126 Most of these register groups aren't anything formal. I arrived at
2127 them by looking at the registers that occurred in more than one
2130 Note: kevinb/2002-04-30: Support for the fpscr register was added
2131 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2132 for Power. For PowerPC, slot 70 was unused and was already in the
2133 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2134 slot 70 was being used for "mq", so the next available slot (71)
2135 was chosen. It would have been nice to be able to make the
2136 register numbers the same across processor cores, but this wasn't
2137 possible without either 1) renumbering some registers for some
2138 processors or 2) assigning fpscr to a really high slot that's
2139 larger than any current register number. Doing (1) is bad because
2140 existing stubs would break. Doing (2) is undesirable because it
2141 would introduce a really large gap between fpscr and the rest of
2142 the registers for most processors. */
2144 /* Convenience macros for populating register arrays. */
2146 /* Within another macro, convert S to a string. */
2150 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2151 and 64 bits on 64-bit systems. */
2152 #define R(name) { STR(name), 4, 8, 0, 0 }
2154 /* Return a struct reg defining register NAME that's 32 bits on all
2156 #define R4(name) { STR(name), 4, 4, 0, 0 }
2158 /* Return a struct reg defining register NAME that's 64 bits on all
2160 #define R8(name) { STR(name), 8, 8, 0, 0 }
2162 /* Return a struct reg defining register NAME that's 128 bits on all
2164 #define R16(name) { STR(name), 16, 16, 0, 0 }
2166 /* Return a struct reg defining floating-point register NAME. */
2167 #define F(name) { STR(name), 8, 8, 1, 0 }
2169 /* Return a struct reg defining a pseudo register NAME. */
2170 #define P(name) { STR(name), 4, 8, 0, 1}
2172 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2173 systems and that doesn't exist on 64-bit systems. */
2174 #define R32(name) { STR(name), 4, 0, 0, 0 }
2176 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2177 systems and that doesn't exist on 32-bit systems. */
2178 #define R64(name) { STR(name), 0, 8, 0, 0 }
2180 /* Return a struct reg placeholder for a register that doesn't exist. */
2181 #define R0 { 0, 0, 0, 0, 0 }
2183 /* UISA registers common across all architectures, including POWER. */
2185 #define COMMON_UISA_REGS \
2186 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2187 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2188 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2189 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2190 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2191 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2192 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2193 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2194 /* 64 */ R(pc), R(ps)
2196 #define COMMON_UISA_NOFP_REGS \
2197 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2198 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2199 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2200 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2201 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2202 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2203 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2204 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2205 /* 64 */ R(pc), R(ps)
2207 /* UISA-level SPRs for PowerPC. */
2208 #define PPC_UISA_SPRS \
2209 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2211 /* UISA-level SPRs for PowerPC without floating point support. */
2212 #define PPC_UISA_NOFP_SPRS \
2213 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2215 /* Segment registers, for PowerPC. */
2216 #define PPC_SEGMENT_REGS \
2217 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2218 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2219 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2220 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2222 /* OEA SPRs for PowerPC. */
2223 #define PPC_OEA_SPRS \
2225 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2226 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2227 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2228 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2229 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2230 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2231 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2232 /* 116 */ R4(dec), R(dabr), R4(ear)
2234 /* AltiVec registers. */
2235 #define PPC_ALTIVEC_REGS \
2236 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2237 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2238 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2239 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2240 /*151*/R4(vscr), R4(vrsave)
2242 /* Vectors of hi-lo general purpose registers. */
2243 #define PPC_EV_REGS \
2244 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2245 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2246 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2247 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2249 /* Lower half of the EV registers. */
2250 #define PPC_GPRS_PSEUDO_REGS \
2251 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2252 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2253 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2254 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
2256 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2257 user-level SPR's. */
2258 static const struct reg registers_power[] =
2261 /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq),
2265 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2266 view of the PowerPC. */
2267 static const struct reg registers_powerpc[] =
2274 /* PowerPC UISA - a PPC processor as viewed by user-level
2275 code, but without floating point registers. */
2276 static const struct reg registers_powerpc_nofp[] =
2278 COMMON_UISA_NOFP_REGS,
2282 /* IBM PowerPC 403. */
2283 static const struct reg registers_403[] =
2289 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
2290 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
2291 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
2292 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
2293 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
2294 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2)
2297 /* IBM PowerPC 403GC. */
2298 static const struct reg registers_403GC[] =
2304 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
2305 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
2306 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
2307 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
2308 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
2309 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2),
2310 /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr),
2311 /* 147 */ R(tbhu), R(tblu)
2314 /* Motorola PowerPC 505. */
2315 static const struct reg registers_505[] =
2321 /* 119 */ R(eie), R(eid), R(nri)
2324 /* Motorola PowerPC 860 or 850. */
2325 static const struct reg registers_860[] =
2331 /* 119 */ R(eie), R(eid), R(nri), R(cmpa),
2332 /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr),
2333 /* 127 */ R(der), R(counta), R(countb), R(cmpe),
2334 /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1),
2335 /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst),
2336 /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr),
2337 /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr),
2338 /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc),
2339 /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap),
2340 /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn),
2341 /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1),
2342 /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1)
2345 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2346 for reading and writing RTCU and RTCL. However, how one reads and writes a
2347 register is the stub's problem. */
2348 static const struct reg registers_601[] =
2354 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
2355 /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl)
2358 /* Motorola PowerPC 602. */
2359 static const struct reg registers_602[] =
2365 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
2366 /* 123 */ R0, R(tcr), R(ibr), R(esassr),
2367 /* 127 */ R(sebr), R(ser), R(sp), R(lt)
2370 /* Motorola/IBM PowerPC 603 or 603e. */
2371 static const struct reg registers_603[] =
2377 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
2378 /* 123 */ R0, R(dmiss), R(dcmp), R(hash1),
2379 /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa)
2382 /* Motorola PowerPC 604 or 604e. */
2383 static const struct reg registers_604[] =
2389 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
2390 /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2),
2391 /* 127 */ R(sia), R(sda)
2394 /* Motorola/IBM PowerPC 750 or 740. */
2395 static const struct reg registers_750[] =
2401 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
2402 /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2),
2403 /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4),
2404 /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia),
2405 /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr),
2406 /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3)
2410 /* Motorola PowerPC 7400. */
2411 static const struct reg registers_7400[] =
2413 /* gpr0-gpr31, fpr0-fpr31 */
2415 /* ctr, xre, lr, cr */
2420 /* vr0-vr31, vrsave, vscr */
2422 /* FIXME? Add more registers? */
2425 /* Motorola e500. */
2426 static const struct reg registers_e500[] =
2429 /* cr, lr, ctr, xer, "" */
2433 R8(acc), R(spefscr),
2434 /* NOTE: Add new registers here the end of the raw register
2435 list and just before the first pseudo register. */
2437 PPC_GPRS_PSEUDO_REGS
2440 /* Information about a particular processor variant. */
2444 /* Name of this variant. */
2447 /* English description of the variant. */
2450 /* bfd_arch_info.arch corresponding to variant. */
2451 enum bfd_architecture arch;
2453 /* bfd_arch_info.mach corresponding to variant. */
2456 /* Number of real registers. */
2459 /* Number of pseudo registers. */
2462 /* Number of total registers (the sum of nregs and npregs). */
2465 /* Table of register names; registers[R] is the name of the register
2467 const struct reg *regs;
2470 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2473 num_registers (const struct reg *reg_list, int num_tot_regs)
2478 for (i = 0; i < num_tot_regs; i++)
2479 if (!reg_list[i].pseudo)
2486 num_pseudo_registers (const struct reg *reg_list, int num_tot_regs)
2491 for (i = 0; i < num_tot_regs; i++)
2492 if (reg_list[i].pseudo)
2498 /* Information in this table comes from the following web sites:
2499 IBM: http://www.chips.ibm.com:80/products/embedded/
2500 Motorola: http://www.mot.com/SPS/PowerPC/
2502 I'm sure I've got some of the variant descriptions not quite right.
2503 Please report any inaccuracies you find to GDB's maintainer.
2505 If you add entries to this table, please be sure to allow the new
2506 value as an argument to the --with-cpu flag, in configure.in. */
2508 static struct variant variants[] =
2511 {"powerpc", "PowerPC user-level", bfd_arch_powerpc,
2512 bfd_mach_ppc, -1, -1, tot_num_registers (registers_powerpc),
2514 {"power", "POWER user-level", bfd_arch_rs6000,
2515 bfd_mach_rs6k, -1, -1, tot_num_registers (registers_power),
2517 {"403", "IBM PowerPC 403", bfd_arch_powerpc,
2518 bfd_mach_ppc_403, -1, -1, tot_num_registers (registers_403),
2520 {"601", "Motorola PowerPC 601", bfd_arch_powerpc,
2521 bfd_mach_ppc_601, -1, -1, tot_num_registers (registers_601),
2523 {"602", "Motorola PowerPC 602", bfd_arch_powerpc,
2524 bfd_mach_ppc_602, -1, -1, tot_num_registers (registers_602),
2526 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc,
2527 bfd_mach_ppc_603, -1, -1, tot_num_registers (registers_603),
2529 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc,
2530 604, -1, -1, tot_num_registers (registers_604),
2532 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc,
2533 bfd_mach_ppc_403gc, -1, -1, tot_num_registers (registers_403GC),
2535 {"505", "Motorola PowerPC 505", bfd_arch_powerpc,
2536 bfd_mach_ppc_505, -1, -1, tot_num_registers (registers_505),
2538 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc,
2539 bfd_mach_ppc_860, -1, -1, tot_num_registers (registers_860),
2541 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc,
2542 bfd_mach_ppc_750, -1, -1, tot_num_registers (registers_750),
2544 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc,
2545 bfd_mach_ppc_7400, -1, -1, tot_num_registers (registers_7400),
2547 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc,
2548 bfd_mach_ppc_e500, -1, -1, tot_num_registers (registers_e500),
2552 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc,
2553 bfd_mach_ppc64, -1, -1, tot_num_registers (registers_powerpc),
2555 {"620", "Motorola PowerPC 620", bfd_arch_powerpc,
2556 bfd_mach_ppc_620, -1, -1, tot_num_registers (registers_powerpc),
2558 {"630", "Motorola PowerPC 630", bfd_arch_powerpc,
2559 bfd_mach_ppc_630, -1, -1, tot_num_registers (registers_powerpc),
2561 {"a35", "PowerPC A35", bfd_arch_powerpc,
2562 bfd_mach_ppc_a35, -1, -1, tot_num_registers (registers_powerpc),
2564 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc,
2565 bfd_mach_ppc_rs64ii, -1, -1, tot_num_registers (registers_powerpc),
2567 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc,
2568 bfd_mach_ppc_rs64iii, -1, -1, tot_num_registers (registers_powerpc),
2571 /* FIXME: I haven't checked the register sets of the following. */
2572 {"rs1", "IBM POWER RS1", bfd_arch_rs6000,
2573 bfd_mach_rs6k_rs1, -1, -1, tot_num_registers (registers_power),
2575 {"rsc", "IBM POWER RSC", bfd_arch_rs6000,
2576 bfd_mach_rs6k_rsc, -1, -1, tot_num_registers (registers_power),
2578 {"rs2", "IBM POWER RS2", bfd_arch_rs6000,
2579 bfd_mach_rs6k_rs2, -1, -1, tot_num_registers (registers_power),
2582 {0, 0, 0, 0, 0, 0, 0, 0}
2585 /* Initialize the number of registers and pseudo registers in each variant. */
2588 init_variants (void)
2592 for (v = variants; v->name; v++)
2595 v->nregs = num_registers (v->regs, v->num_tot_regs);
2596 if (v->npregs == -1)
2597 v->npregs = num_pseudo_registers (v->regs, v->num_tot_regs);
2601 /* Return the variant corresponding to architecture ARCH and machine number
2602 MACH. If no such variant exists, return null. */
2604 static const struct variant *
2605 find_variant_by_arch (enum bfd_architecture arch, unsigned long mach)
2607 const struct variant *v;
2609 for (v = variants; v->name; v++)
2610 if (arch == v->arch && mach == v->mach)
2617 gdb_print_insn_powerpc (bfd_vma memaddr, disassemble_info *info)
2619 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
2620 return print_insn_big_powerpc (memaddr, info);
2622 return print_insn_little_powerpc (memaddr, info);
2625 /* Initialize the current architecture based on INFO. If possible, re-use an
2626 architecture from ARCHES, which is a list of architectures already created
2627 during this debugging session.
2629 Called e.g. at program startup, when reading a core file, and when reading
2632 static struct gdbarch *
2633 rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2635 struct gdbarch *gdbarch;
2636 struct gdbarch_tdep *tdep;
2637 int wordsize, from_xcoff_exec, from_elf_exec, power, i, off;
2639 const struct variant *v;
2640 enum bfd_architecture arch;
2646 from_xcoff_exec = info.abfd && info.abfd->format == bfd_object &&
2647 bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;
2649 from_elf_exec = info.abfd && info.abfd->format == bfd_object &&
2650 bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2652 sysv_abi = info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2654 /* Check word size. If INFO is from a binary file, infer it from
2655 that, else choose a likely default. */
2656 if (from_xcoff_exec)
2658 if (bfd_xcoff_is_xcoff64 (info.abfd))
2663 else if (from_elf_exec)
2665 if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
2672 if (info.bfd_arch_info != NULL && info.bfd_arch_info->bits_per_word != 0)
2673 wordsize = info.bfd_arch_info->bits_per_word /
2674 info.bfd_arch_info->bits_per_byte;
2679 /* Find a candidate among extant architectures. */
2680 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2682 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2684 /* Word size in the various PowerPC bfd_arch_info structs isn't
2685 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2686 separate word size check. */
2687 tdep = gdbarch_tdep (arches->gdbarch);
2688 if (tdep && tdep->wordsize == wordsize)
2689 return arches->gdbarch;
2692 /* None found, create a new architecture from INFO, whose bfd_arch_info
2693 validity depends on the source:
2694 - executable useless
2695 - rs6000_host_arch() good
2697 - "set arch" trust blindly
2698 - GDB startup useless but harmless */
2700 if (!from_xcoff_exec)
2702 arch = info.bfd_arch_info->arch;
2703 mach = info.bfd_arch_info->mach;
2707 arch = bfd_arch_powerpc;
2708 bfd_default_set_arch_mach (&abfd, arch, 0);
2709 info.bfd_arch_info = bfd_get_arch_info (&abfd);
2710 mach = info.bfd_arch_info->mach;
2712 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2713 tdep->wordsize = wordsize;
2715 /* For e500 executables, the apuinfo section is of help here. Such
2716 section contains the identifier and revision number of each
2717 Application-specific Processing Unit that is present on the
2718 chip. The content of the section is determined by the assembler
2719 which looks at each instruction and determines which unit (and
2720 which version of it) can execute it. In our case we just look for
2721 the existance of the section. */
2725 sect = bfd_get_section_by_name (info.abfd, ".PPC.EMB.apuinfo");
2728 arch = info.bfd_arch_info->arch;
2729 mach = bfd_mach_ppc_e500;
2730 bfd_default_set_arch_mach (&abfd, arch, mach);
2731 info.bfd_arch_info = bfd_get_arch_info (&abfd);
2735 gdbarch = gdbarch_alloc (&info, tdep);
2736 power = arch == bfd_arch_rs6000;
2738 /* Initialize the number of real and pseudo registers in each variant. */
2741 /* Choose variant. */
2742 v = find_variant_by_arch (arch, mach);
2746 tdep->regs = v->regs;
2748 tdep->ppc_gp0_regnum = 0;
2749 tdep->ppc_gplast_regnum = 31;
2750 tdep->ppc_toc_regnum = 2;
2751 tdep->ppc_ps_regnum = 65;
2752 tdep->ppc_cr_regnum = 66;
2753 tdep->ppc_lr_regnum = 67;
2754 tdep->ppc_ctr_regnum = 68;
2755 tdep->ppc_xer_regnum = 69;
2756 if (v->mach == bfd_mach_ppc_601)
2757 tdep->ppc_mq_regnum = 124;
2759 tdep->ppc_mq_regnum = 70;
2761 tdep->ppc_mq_regnum = -1;
2762 tdep->ppc_fpscr_regnum = power ? 71 : 70;
2764 set_gdbarch_pc_regnum (gdbarch, 64);
2765 set_gdbarch_sp_regnum (gdbarch, 1);
2766 set_gdbarch_deprecated_fp_regnum (gdbarch, 1);
2767 if (sysv_abi && wordsize == 8)
2768 set_gdbarch_return_value (gdbarch, ppc64_sysv_abi_return_value);
2769 else if (sysv_abi && wordsize == 4)
2770 set_gdbarch_return_value (gdbarch, ppc_sysv_abi_return_value);
2773 set_gdbarch_deprecated_extract_return_value (gdbarch, rs6000_extract_return_value);
2774 set_gdbarch_deprecated_store_return_value (gdbarch, rs6000_store_return_value);
2777 if (v->arch == bfd_arch_powerpc)
2781 tdep->ppc_vr0_regnum = 71;
2782 tdep->ppc_vrsave_regnum = 104;
2783 tdep->ppc_ev0_regnum = -1;
2784 tdep->ppc_ev31_regnum = -1;
2786 case bfd_mach_ppc_7400:
2787 tdep->ppc_vr0_regnum = 119;
2788 tdep->ppc_vrsave_regnum = 152;
2789 tdep->ppc_ev0_regnum = -1;
2790 tdep->ppc_ev31_regnum = -1;
2792 case bfd_mach_ppc_e500:
2793 tdep->ppc_gp0_regnum = 41;
2794 tdep->ppc_gplast_regnum = tdep->ppc_gp0_regnum + 32 - 1;
2795 tdep->ppc_toc_regnum = -1;
2796 tdep->ppc_ps_regnum = 1;
2797 tdep->ppc_cr_regnum = 2;
2798 tdep->ppc_lr_regnum = 3;
2799 tdep->ppc_ctr_regnum = 4;
2800 tdep->ppc_xer_regnum = 5;
2801 tdep->ppc_ev0_regnum = 7;
2802 tdep->ppc_ev31_regnum = 38;
2803 set_gdbarch_pc_regnum (gdbarch, 0);
2804 set_gdbarch_sp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
2805 set_gdbarch_deprecated_fp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
2806 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, e500_dwarf2_reg_to_regnum);
2807 set_gdbarch_pseudo_register_read (gdbarch, e500_pseudo_register_read);
2808 set_gdbarch_pseudo_register_write (gdbarch, e500_pseudo_register_write);
2811 tdep->ppc_vr0_regnum = -1;
2812 tdep->ppc_vrsave_regnum = -1;
2813 tdep->ppc_ev0_regnum = -1;
2814 tdep->ppc_ev31_regnum = -1;
2818 /* Sanity check on registers. */
2819 gdb_assert (strcmp (tdep->regs[tdep->ppc_gp0_regnum].name, "r0") == 0);
2821 /* Set lr_frame_offset. */
2823 tdep->lr_frame_offset = 16;
2825 tdep->lr_frame_offset = 4;
2827 tdep->lr_frame_offset = 8;
2829 /* Calculate byte offsets in raw register array. */
2830 tdep->regoff = xmalloc (v->num_tot_regs * sizeof (int));
2831 for (i = off = 0; i < v->num_tot_regs; i++)
2833 tdep->regoff[i] = off;
2834 off += regsize (v->regs + i, wordsize);
2837 /* Select instruction printer. */
2839 set_gdbarch_print_insn (gdbarch, print_insn_rs6000);
2841 set_gdbarch_print_insn (gdbarch, gdb_print_insn_powerpc);
2843 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2845 set_gdbarch_num_regs (gdbarch, v->nregs);
2846 set_gdbarch_num_pseudo_regs (gdbarch, v->npregs);
2847 set_gdbarch_register_name (gdbarch, rs6000_register_name);
2848 set_gdbarch_deprecated_register_size (gdbarch, wordsize);
2849 set_gdbarch_deprecated_register_bytes (gdbarch, off);
2850 set_gdbarch_deprecated_register_byte (gdbarch, rs6000_register_byte);
2851 set_gdbarch_deprecated_register_raw_size (gdbarch, rs6000_register_raw_size);
2852 set_gdbarch_deprecated_register_virtual_type (gdbarch, rs6000_register_virtual_type);
2854 set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2855 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2856 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2857 set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2858 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2859 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2860 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2862 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
2864 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2865 set_gdbarch_char_signed (gdbarch, 0);
2867 set_gdbarch_frame_align (gdbarch, rs6000_frame_align);
2868 if (sysv_abi && wordsize == 8)
2870 set_gdbarch_frame_red_zone_size (gdbarch, 288);
2871 else if (!sysv_abi && wordsize == 4)
2872 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
2873 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
2874 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
2876 set_gdbarch_frame_red_zone_size (gdbarch, 224);
2877 set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
2878 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2880 set_gdbarch_deprecated_register_convertible (gdbarch, rs6000_register_convertible);
2881 set_gdbarch_deprecated_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual);
2882 set_gdbarch_deprecated_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw);
2883 set_gdbarch_stab_reg_to_regnum (gdbarch, rs6000_stab_reg_to_regnum);
2884 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2885 is correct for the SysV ABI when the wordsize is 8, but I'm also
2886 fairly certain that ppc_sysv_abi_push_arguments() will give even
2887 worse results since it only works for 32-bit code. So, for the moment,
2888 we're better off calling rs6000_push_arguments() since it works for
2889 64-bit code. At some point in the future, this matter needs to be
2891 if (sysv_abi && wordsize == 4)
2892 set_gdbarch_push_dummy_call (gdbarch, ppc_sysv_abi_push_dummy_call);
2893 else if (sysv_abi && wordsize == 8)
2894 set_gdbarch_push_dummy_call (gdbarch, ppc64_sysv_abi_push_dummy_call);
2896 set_gdbarch_push_dummy_call (gdbarch, rs6000_push_dummy_call);
2898 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address);
2899 set_gdbarch_deprecated_pop_frame (gdbarch, rs6000_pop_frame);
2901 set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue);
2902 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2903 set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc);
2905 /* Handle the 64-bit SVR4 minimal-symbol convention of using "FN"
2906 for the descriptor and ".FN" for the entry-point -- a user
2907 specifying "break FN" will unexpectedly end up with a breakpoint
2908 on the descriptor and not the function. This architecture method
2909 transforms any breakpoints on descriptors into breakpoints on the
2910 corresponding entry point. */
2911 if (sysv_abi && wordsize == 8)
2912 set_gdbarch_adjust_breakpoint_address (gdbarch, ppc64_sysv_abi_adjust_breakpoint_address);
2914 /* Not sure on this. FIXMEmgo */
2915 set_gdbarch_frame_args_skip (gdbarch, 8);
2918 set_gdbarch_use_struct_convention (gdbarch,
2919 rs6000_use_struct_convention);
2921 set_gdbarch_deprecated_frameless_function_invocation (gdbarch, rs6000_frameless_function_invocation);
2922 set_gdbarch_deprecated_frame_chain (gdbarch, rs6000_frame_chain);
2923 set_gdbarch_deprecated_frame_saved_pc (gdbarch, rs6000_frame_saved_pc);
2925 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs);
2926 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info);
2927 set_gdbarch_deprecated_init_frame_pc_first (gdbarch, rs6000_init_frame_pc_first);
2931 /* Handle RS/6000 function pointers (which are really function
2933 set_gdbarch_convert_from_func_ptr_addr (gdbarch,
2934 rs6000_convert_from_func_ptr_addr);
2936 set_gdbarch_deprecated_frame_args_address (gdbarch, rs6000_frame_args_address);
2937 set_gdbarch_deprecated_frame_locals_address (gdbarch, rs6000_frame_args_address);
2938 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call);
2940 /* Helpers for function argument information. */
2941 set_gdbarch_fetch_pointer_argument (gdbarch, rs6000_fetch_pointer_argument);
2943 /* Hook in ABI-specific overrides, if they have been registered. */
2944 gdbarch_init_osabi (info, gdbarch);
2946 if (from_xcoff_exec)
2948 /* NOTE: jimix/2003-06-09: This test should really check for
2949 GDB_OSABI_AIX when that is defined and becomes
2950 available. (Actually, once things are properly split apart,
2951 the test goes away.) */
2952 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
2953 set_gdbarch_software_single_step (gdbarch, rs6000_software_single_step);
2960 rs6000_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
2962 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
2967 /* FIXME: Dump gdbarch_tdep. */
2970 static struct cmd_list_element *info_powerpc_cmdlist = NULL;
2973 rs6000_info_powerpc_command (char *args, int from_tty)
2975 help_list (info_powerpc_cmdlist, "info powerpc ", class_info, gdb_stdout);
2978 /* Initialization code. */
2980 extern initialize_file_ftype _initialize_rs6000_tdep; /* -Wmissing-prototypes */
2983 _initialize_rs6000_tdep (void)
2985 gdbarch_register (bfd_arch_rs6000, rs6000_gdbarch_init, rs6000_dump_tdep);
2986 gdbarch_register (bfd_arch_powerpc, rs6000_gdbarch_init, rs6000_dump_tdep);
2988 /* Add root prefix command for "info powerpc" commands */
2989 add_prefix_cmd ("powerpc", class_info, rs6000_info_powerpc_command,
2990 "Various POWERPC info specific commands.",
2991 &info_powerpc_cmdlist, "info powerpc ", 0, &infolist);