1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
38 #include "libbfd.h" /* for bfd_default_set_arch_mach */
39 #include "coff/internal.h" /* for libcoff.h */
40 #include "libcoff.h" /* for xcoff_data */
41 #include "coff/xcoff.h"
46 #include "solib-svr4.h"
49 /* If the kernel has to deliver a signal, it pushes a sigcontext
50 structure on the stack and then calls the signal handler, passing
51 the address of the sigcontext in an argument register. Usually
52 the signal handler doesn't save this register, so we have to
53 access the sigcontext structure via an offset from the signal handler
55 The following constants were determined by experimentation on AIX 3.2. */
56 #define SIG_FRAME_PC_OFFSET 96
57 #define SIG_FRAME_LR_OFFSET 108
58 #define SIG_FRAME_FP_OFFSET 284
60 /* To be used by skip_prologue. */
62 struct rs6000_framedata
64 int offset; /* total size of frame --- the distance
65 by which we decrement sp to allocate
67 int saved_gpr; /* smallest # of saved gpr */
68 int saved_fpr; /* smallest # of saved fpr */
69 int saved_vr; /* smallest # of saved vr */
70 int saved_ev; /* smallest # of saved ev */
71 int alloca_reg; /* alloca register number (frame ptr) */
72 char frameless; /* true if frameless functions. */
73 char nosavedpc; /* true if pc not saved. */
74 int gpr_offset; /* offset of saved gprs from prev sp */
75 int fpr_offset; /* offset of saved fprs from prev sp */
76 int vr_offset; /* offset of saved vrs from prev sp */
77 int ev_offset; /* offset of saved evs from prev sp */
78 int lr_offset; /* offset of saved lr */
79 int cr_offset; /* offset of saved cr */
80 int vrsave_offset; /* offset of saved vrsave register */
83 /* Description of a single register. */
87 char *name; /* name of register */
88 unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */
89 unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */
90 unsigned char fpr; /* whether register is floating-point */
91 unsigned char pseudo; /* whether register is pseudo */
94 /* Breakpoint shadows for the single step instructions will be kept here. */
96 static struct sstep_breaks
98 /* Address, or 0 if this is not in use. */
100 /* Shadow contents. */
105 /* Hook for determining the TOC address when calling functions in the
106 inferior under AIX. The initialization code in rs6000-nat.c sets
107 this hook to point to find_toc_address. */
109 CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
111 /* Hook to set the current architecture when starting a child process.
112 rs6000-nat.c sets this. */
114 void (*rs6000_set_host_arch_hook) (int) = NULL;
116 /* Static function prototypes */
118 static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc,
120 static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR,
121 struct rs6000_framedata *);
122 static void frame_get_saved_regs (struct frame_info * fi,
123 struct rs6000_framedata * fdatap);
124 static CORE_ADDR frame_initial_stack_address (struct frame_info *);
126 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
128 altivec_register_p (int regno)
130 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
131 if (tdep->ppc_vr0_regnum < 0 || tdep->ppc_vrsave_regnum < 0)
134 return (regno >= tdep->ppc_vr0_regnum && regno <= tdep->ppc_vrsave_regnum);
137 /* Read a LEN-byte address from debugged memory address MEMADDR. */
140 read_memory_addr (CORE_ADDR memaddr, int len)
142 return read_memory_unsigned_integer (memaddr, len);
146 rs6000_skip_prologue (CORE_ADDR pc)
148 struct rs6000_framedata frame;
149 pc = skip_prologue (pc, 0, &frame);
154 /* Fill in fi->saved_regs */
156 struct frame_extra_info
158 /* Functions calling alloca() change the value of the stack
159 pointer. We need to use initial stack pointer (which is saved in
160 r31 by gcc) in such cases. If a compiler emits traceback table,
161 then we should use the alloca register specified in traceback
163 CORE_ADDR initial_sp; /* initial stack pointer. */
167 rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi)
169 struct frame_extra_info *extra_info =
170 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
171 extra_info->initial_sp = 0;
172 if (get_next_frame (fi) != NULL
173 && get_frame_pc (fi) < TEXT_SEGMENT_BASE)
174 /* We're in get_prev_frame */
175 /* and this is a special signal frame. */
176 /* (fi->pc will be some low address in the kernel, */
177 /* to which the signal handler returns). */
178 deprecated_set_frame_type (fi, SIGTRAMP_FRAME);
181 /* Put here the code to store, into a struct frame_saved_regs,
182 the addresses of the saved registers of frame described by FRAME_INFO.
183 This includes special registers such as pc and fp saved in special
184 ways in the stack frame. sp is even more special:
185 the address we return for it IS the sp for the next frame. */
187 /* In this implementation for RS/6000, we do *not* save sp. I am
188 not sure if it will be needed. The following function takes care of gpr's
192 rs6000_frame_init_saved_regs (struct frame_info *fi)
194 frame_get_saved_regs (fi, NULL);
198 rs6000_frame_args_address (struct frame_info *fi)
200 struct frame_extra_info *extra_info = get_frame_extra_info (fi);
201 if (extra_info->initial_sp != 0)
202 return extra_info->initial_sp;
204 return frame_initial_stack_address (fi);
207 /* Immediately after a function call, return the saved pc.
208 Can't go through the frames for this because on some machines
209 the new frame is not set up until the new function executes
210 some instructions. */
213 rs6000_saved_pc_after_call (struct frame_info *fi)
215 return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
218 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
221 branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
228 absolute = (int) ((instr >> 1) & 1);
233 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
237 dest = pc + immediate;
241 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
245 dest = pc + immediate;
249 ext_op = (instr >> 1) & 0x3ff;
251 if (ext_op == 16) /* br conditional register */
253 dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
255 /* If we are about to return from a signal handler, dest is
256 something like 0x3c90. The current frame is a signal handler
257 caller frame, upon completion of the sigreturn system call
258 execution will return to the saved PC in the frame. */
259 if (dest < TEXT_SEGMENT_BASE)
261 struct frame_info *fi;
263 fi = get_current_frame ();
265 dest = read_memory_addr (get_frame_base (fi) + SIG_FRAME_PC_OFFSET,
266 gdbarch_tdep (current_gdbarch)->wordsize);
270 else if (ext_op == 528) /* br cond to count reg */
272 dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum) & ~3;
274 /* If we are about to execute a system call, dest is something
275 like 0x22fc or 0x3b00. Upon completion the system call
276 will return to the address in the link register. */
277 if (dest < TEXT_SEGMENT_BASE)
278 dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
287 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
291 /* Sequence of bytes for breakpoint instruction. */
293 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
294 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
296 const static unsigned char *
297 rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
299 static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
300 static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
302 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
303 return big_breakpoint;
305 return little_breakpoint;
309 /* AIX does not support PT_STEP. Simulate it. */
312 rs6000_software_single_step (enum target_signal signal,
313 int insert_breakpoints_p)
317 const char *breakp = rs6000_breakpoint_from_pc (&dummy, &breakp_sz);
323 if (insert_breakpoints_p)
328 insn = read_memory_integer (loc, 4);
330 breaks[0] = loc + breakp_sz;
332 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
334 /* Don't put two breakpoints on the same address. */
335 if (breaks[1] == breaks[0])
338 stepBreaks[1].address = 0;
340 for (ii = 0; ii < 2; ++ii)
343 /* ignore invalid breakpoint. */
344 if (breaks[ii] == -1)
346 target_insert_breakpoint (breaks[ii], stepBreaks[ii].data);
347 stepBreaks[ii].address = breaks[ii];
354 /* remove step breakpoints. */
355 for (ii = 0; ii < 2; ++ii)
356 if (stepBreaks[ii].address != 0)
357 target_remove_breakpoint (stepBreaks[ii].address,
358 stepBreaks[ii].data);
360 errno = 0; /* FIXME, don't ignore errors! */
361 /* What errors? {read,write}_memory call error(). */
365 /* return pc value after skipping a function prologue and also return
366 information about a function frame.
368 in struct rs6000_framedata fdata:
369 - frameless is TRUE, if function does not have a frame.
370 - nosavedpc is TRUE, if function does not save %pc value in its frame.
371 - offset is the initial size of this stack frame --- the amount by
372 which we decrement the sp to allocate the frame.
373 - saved_gpr is the number of the first saved gpr.
374 - saved_fpr is the number of the first saved fpr.
375 - saved_vr is the number of the first saved vr.
376 - saved_ev is the number of the first saved ev.
377 - alloca_reg is the number of the register used for alloca() handling.
379 - gpr_offset is the offset of the first saved gpr from the previous frame.
380 - fpr_offset is the offset of the first saved fpr from the previous frame.
381 - vr_offset is the offset of the first saved vr from the previous frame.
382 - ev_offset is the offset of the first saved ev from the previous frame.
383 - lr_offset is the offset of the saved lr
384 - cr_offset is the offset of the saved cr
385 - vrsave_offset is the offset of the saved vrsave register
388 #define SIGNED_SHORT(x) \
389 ((sizeof (short) == 2) \
390 ? ((int)(short)(x)) \
391 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
393 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
395 /* Limit the number of skipped non-prologue instructions, as the examining
396 of the prologue is expensive. */
397 static int max_skip_non_prologue_insns = 10;
399 /* Given PC representing the starting address of a function, and
400 LIM_PC which is the (sloppy) limit to which to scan when looking
401 for a prologue, attempt to further refine this limit by using
402 the line data in the symbol table. If successful, a better guess
403 on where the prologue ends is returned, otherwise the previous
404 value of lim_pc is returned. */
406 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc)
408 struct symtab_and_line prologue_sal;
410 prologue_sal = find_pc_line (pc, 0);
411 if (prologue_sal.line != 0)
414 CORE_ADDR addr = prologue_sal.end;
416 /* Handle the case in which compiler's optimizer/scheduler
417 has moved instructions into the prologue. We scan ahead
418 in the function looking for address ranges whose corresponding
419 line number is less than or equal to the first one that we
420 found for the function. (It can be less than when the
421 scheduler puts a body instruction before the first prologue
423 for (i = 2 * max_skip_non_prologue_insns;
424 i > 0 && (lim_pc == 0 || addr < lim_pc);
427 struct symtab_and_line sal;
429 sal = find_pc_line (addr, 0);
432 if (sal.line <= prologue_sal.line
433 && sal.symtab == prologue_sal.symtab)
440 if (lim_pc == 0 || prologue_sal.end < lim_pc)
441 lim_pc = prologue_sal.end;
448 skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
450 CORE_ADDR orig_pc = pc;
451 CORE_ADDR last_prologue_pc = pc;
452 CORE_ADDR li_found_pc = 0;
456 long vr_saved_offset = 0;
465 int minimal_toc_loaded = 0;
466 int prev_insn_was_prologue_insn = 1;
467 int num_skip_non_prologue_insns = 0;
468 const struct bfd_arch_info *arch_info = gdbarch_bfd_arch_info (current_gdbarch);
469 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
471 /* Attempt to find the end of the prologue when no limit is specified.
472 Note that refine_prologue_limit() has been written so that it may
473 be used to "refine" the limits of non-zero PC values too, but this
474 is only safe if we 1) trust the line information provided by the
475 compiler and 2) iterate enough to actually find the end of the
478 It may become a good idea at some point (for both performance and
479 accuracy) to unconditionally call refine_prologue_limit(). But,
480 until we can make a clear determination that this is beneficial,
481 we'll play it safe and only use it to obtain a limit when none
482 has been specified. */
484 lim_pc = refine_prologue_limit (pc, lim_pc);
486 memset (fdata, 0, sizeof (struct rs6000_framedata));
487 fdata->saved_gpr = -1;
488 fdata->saved_fpr = -1;
489 fdata->saved_vr = -1;
490 fdata->saved_ev = -1;
491 fdata->alloca_reg = -1;
492 fdata->frameless = 1;
493 fdata->nosavedpc = 1;
497 /* Sometimes it isn't clear if an instruction is a prologue
498 instruction or not. When we encounter one of these ambiguous
499 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
500 Otherwise, we'll assume that it really is a prologue instruction. */
501 if (prev_insn_was_prologue_insn)
502 last_prologue_pc = pc;
504 /* Stop scanning if we've hit the limit. */
505 if (lim_pc != 0 && pc >= lim_pc)
508 prev_insn_was_prologue_insn = 1;
510 /* Fetch the instruction and convert it to an integer. */
511 if (target_read_memory (pc, buf, 4))
513 op = extract_signed_integer (buf, 4);
515 if ((op & 0xfc1fffff) == 0x7c0802a6)
517 lr_reg = (op & 0x03e00000) | 0x90010000;
521 else if ((op & 0xfc1fffff) == 0x7c000026)
523 cr_reg = (op & 0x03e00000) | 0x90010000;
527 else if ((op & 0xfc1f0000) == 0xd8010000)
528 { /* stfd Rx,NUM(r1) */
529 reg = GET_SRC_REG (op);
530 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg)
532 fdata->saved_fpr = reg;
533 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
538 else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
539 (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
540 (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
541 (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
544 reg = GET_SRC_REG (op);
545 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg)
547 fdata->saved_gpr = reg;
548 if ((op & 0xfc1f0003) == 0xf8010000)
550 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
555 else if ((op & 0xffff0000) == 0x60000000)
558 /* Allow nops in the prologue, but do not consider them to
559 be part of the prologue unless followed by other prologue
561 prev_insn_was_prologue_insn = 0;
565 else if ((op & 0xffff0000) == 0x3c000000)
566 { /* addis 0,0,NUM, used
568 fdata->offset = (op & 0x0000ffff) << 16;
569 fdata->frameless = 0;
573 else if ((op & 0xffff0000) == 0x60000000)
574 { /* ori 0,0,NUM, 2nd ha
575 lf of >= 32k frames */
576 fdata->offset |= (op & 0x0000ffff);
577 fdata->frameless = 0;
581 else if (lr_reg != -1 && (op & 0xffff0000) == lr_reg)
584 fdata->lr_offset = SIGNED_SHORT (op) + offset;
585 fdata->nosavedpc = 0;
590 else if (cr_reg != -1 && (op & 0xffff0000) == cr_reg)
593 fdata->cr_offset = SIGNED_SHORT (op) + offset;
598 else if (op == 0x48000005)
604 else if (op == 0x48000004)
609 else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
610 in V.4 -mminimal-toc */
611 (op & 0xffff0000) == 0x3bde0000)
612 { /* addi 30,30,foo@l */
616 else if ((op & 0xfc000001) == 0x48000001)
620 fdata->frameless = 0;
621 /* Don't skip over the subroutine call if it is not within
622 the first three instructions of the prologue. */
623 if ((pc - orig_pc) > 8)
626 op = read_memory_integer (pc + 4, 4);
628 /* At this point, make sure this is not a trampoline
629 function (a function that simply calls another functions,
630 and nothing else). If the next is not a nop, this branch
631 was part of the function prologue. */
633 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
634 break; /* don't skip over
638 /* update stack pointer */
640 else if ((op & 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
641 (op & 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
643 fdata->frameless = 0;
644 if ((op & 0xffff0003) == 0xf8210001)
646 fdata->offset = SIGNED_SHORT (op);
647 offset = fdata->offset;
651 else if (op == 0x7c21016e)
653 fdata->frameless = 0;
654 offset = fdata->offset;
657 /* Load up minimal toc pointer */
659 else if ((op >> 22) == 0x20f
660 && !minimal_toc_loaded)
661 { /* l r31,... or l r30,... */
662 minimal_toc_loaded = 1;
665 /* move parameters from argument registers to local variable
668 else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
669 (((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
670 (((op >> 21) & 31) <= 10) &&
671 ((long) ((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */
675 /* store parameters in stack */
677 else if ((op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
678 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
679 (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
683 /* store parameters in stack via frame pointer */
686 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
687 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
688 (op & 0xfc1f0000) == 0xfc1f0000))
689 { /* frsp, fp?,NUM(r1) */
692 /* Set up frame pointer */
694 else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
697 fdata->frameless = 0;
699 fdata->alloca_reg = (tdep->ppc_gp0_regnum + 31);
702 /* Another way to set up the frame pointer. */
704 else if ((op & 0xfc1fffff) == 0x38010000)
705 { /* addi rX, r1, 0x0 */
706 fdata->frameless = 0;
708 fdata->alloca_reg = (tdep->ppc_gp0_regnum
709 + ((op & ~0x38010000) >> 21));
712 /* AltiVec related instructions. */
713 /* Store the vrsave register (spr 256) in another register for
714 later manipulation, or load a register into the vrsave
715 register. 2 instructions are used: mfvrsave and
716 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
717 and mtspr SPR256, Rn. */
718 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
719 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
720 else if ((op & 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
722 vrsave_reg = GET_SRC_REG (op);
725 else if ((op & 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
729 /* Store the register where vrsave was saved to onto the stack:
730 rS is the register where vrsave was stored in a previous
732 /* 100100 sssss 00001 dddddddd dddddddd */
733 else if ((op & 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
735 if (vrsave_reg == GET_SRC_REG (op))
737 fdata->vrsave_offset = SIGNED_SHORT (op) + offset;
742 /* Compute the new value of vrsave, by modifying the register
743 where vrsave was saved to. */
744 else if (((op & 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
745 || ((op & 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
749 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
750 in a pair of insns to save the vector registers on the
752 /* 001110 00000 00000 iiii iiii iiii iiii */
753 /* 001110 01110 00000 iiii iiii iiii iiii */
754 else if ((op & 0xffff0000) == 0x38000000 /* li r0, SIMM */
755 || (op & 0xffff0000) == 0x39c00000) /* li r14, SIMM */
758 vr_saved_offset = SIGNED_SHORT (op);
760 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
761 /* 011111 sssss 11111 00000 00111001110 */
762 else if ((op & 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
764 if (pc == (li_found_pc + 4))
766 vr_reg = GET_SRC_REG (op);
767 /* If this is the first vector reg to be saved, or if
768 it has a lower number than others previously seen,
769 reupdate the frame info. */
770 if (fdata->saved_vr == -1 || fdata->saved_vr > vr_reg)
772 fdata->saved_vr = vr_reg;
773 fdata->vr_offset = vr_saved_offset + offset;
775 vr_saved_offset = -1;
780 /* End AltiVec related instructions. */
782 /* Start BookE related instructions. */
783 /* Store gen register S at (r31+uimm).
784 Any register less than r13 is volatile, so we don't care. */
785 /* 000100 sssss 11111 iiiii 01100100001 */
786 else if (arch_info->mach == bfd_mach_ppc_e500
787 && (op & 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
789 if ((op & 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
792 ev_reg = GET_SRC_REG (op);
793 imm = (op >> 11) & 0x1f;
795 /* If this is the first vector reg to be saved, or if
796 it has a lower number than others previously seen,
797 reupdate the frame info. */
798 if (fdata->saved_ev == -1 || fdata->saved_ev > ev_reg)
800 fdata->saved_ev = ev_reg;
801 fdata->ev_offset = ev_offset + offset;
806 /* Store gen register rS at (r1+rB). */
807 /* 000100 sssss 00001 bbbbb 01100100000 */
808 else if (arch_info->mach == bfd_mach_ppc_e500
809 && (op & 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
811 if (pc == (li_found_pc + 4))
813 ev_reg = GET_SRC_REG (op);
814 /* If this is the first vector reg to be saved, or if
815 it has a lower number than others previously seen,
816 reupdate the frame info. */
817 /* We know the contents of rB from the previous instruction. */
818 if (fdata->saved_ev == -1 || fdata->saved_ev > ev_reg)
820 fdata->saved_ev = ev_reg;
821 fdata->ev_offset = vr_saved_offset + offset;
823 vr_saved_offset = -1;
829 /* Store gen register r31 at (rA+uimm). */
830 /* 000100 11111 aaaaa iiiii 01100100001 */
831 else if (arch_info->mach == bfd_mach_ppc_e500
832 && (op & 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
834 /* Wwe know that the source register is 31 already, but
835 it can't hurt to compute it. */
836 ev_reg = GET_SRC_REG (op);
837 ev_offset = ((op >> 11) & 0x1f) * 8;
838 /* If this is the first vector reg to be saved, or if
839 it has a lower number than others previously seen,
840 reupdate the frame info. */
841 if (fdata->saved_ev == -1 || fdata->saved_ev > ev_reg)
843 fdata->saved_ev = ev_reg;
844 fdata->ev_offset = ev_offset + offset;
849 /* Store gen register S at (r31+r0).
850 Store param on stack when offset from SP bigger than 4 bytes. */
851 /* 000100 sssss 11111 00000 01100100000 */
852 else if (arch_info->mach == bfd_mach_ppc_e500
853 && (op & 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
855 if (pc == (li_found_pc + 4))
857 if ((op & 0x03e00000) >= 0x01a00000)
859 ev_reg = GET_SRC_REG (op);
860 /* If this is the first vector reg to be saved, or if
861 it has a lower number than others previously seen,
862 reupdate the frame info. */
863 /* We know the contents of r0 from the previous
865 if (fdata->saved_ev == -1 || fdata->saved_ev > ev_reg)
867 fdata->saved_ev = ev_reg;
868 fdata->ev_offset = vr_saved_offset + offset;
872 vr_saved_offset = -1;
877 /* End BookE related instructions. */
881 /* Not a recognized prologue instruction.
882 Handle optimizer code motions into the prologue by continuing
883 the search if we have no valid frame yet or if the return
884 address is not yet saved in the frame. */
885 if (fdata->frameless == 0
886 && (lr_reg == -1 || fdata->nosavedpc == 0))
889 if (op == 0x4e800020 /* blr */
890 || op == 0x4e800420) /* bctr */
891 /* Do not scan past epilogue in frameless functions or
894 if ((op & 0xf4000000) == 0x40000000) /* bxx */
895 /* Never skip branches. */
898 if (num_skip_non_prologue_insns++ > max_skip_non_prologue_insns)
899 /* Do not scan too many insns, scanning insns is expensive with
903 /* Continue scanning. */
904 prev_insn_was_prologue_insn = 0;
910 /* I have problems with skipping over __main() that I need to address
911 * sometime. Previously, I used to use misc_function_vector which
912 * didn't work as well as I wanted to be. -MGO */
914 /* If the first thing after skipping a prolog is a branch to a function,
915 this might be a call to an initializer in main(), introduced by gcc2.
916 We'd like to skip over it as well. Fortunately, xlc does some extra
917 work before calling a function right after a prologue, thus we can
918 single out such gcc2 behaviour. */
921 if ((op & 0xfc000001) == 0x48000001)
922 { /* bl foo, an initializer function? */
923 op = read_memory_integer (pc + 4, 4);
925 if (op == 0x4def7b82)
926 { /* cror 0xf, 0xf, 0xf (nop) */
928 /* Check and see if we are in main. If so, skip over this
929 initializer function as well. */
931 tmp = find_pc_misc_function (pc);
932 if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, main_name ()))
938 fdata->offset = -fdata->offset;
939 return last_prologue_pc;
943 /*************************************************************************
944 Support for creating pushing a dummy frame into the stack, and popping
946 *************************************************************************/
949 /* Pop the innermost frame, go back to the caller. */
952 rs6000_pop_frame (void)
954 CORE_ADDR pc, lr, sp, prev_sp, addr; /* %pc, %lr, %sp */
955 struct rs6000_framedata fdata;
956 struct frame_info *frame = get_current_frame ();
960 sp = get_frame_base (frame);
962 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
963 get_frame_base (frame),
964 get_frame_base (frame)))
966 generic_pop_dummy_frame ();
967 flush_cached_frames ();
971 /* Make sure that all registers are valid. */
972 deprecated_read_register_bytes (0, NULL, REGISTER_BYTES);
974 /* Figure out previous %pc value. If the function is frameless, it is
975 still in the link register, otherwise walk the frames and retrieve the
976 saved %pc value in the previous frame. */
978 addr = get_pc_function_start (get_frame_pc (frame));
979 (void) skip_prologue (addr, get_frame_pc (frame), &fdata);
981 wordsize = gdbarch_tdep (current_gdbarch)->wordsize;
985 prev_sp = read_memory_addr (sp, wordsize);
986 if (fdata.lr_offset == 0)
987 lr = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
989 lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize);
991 /* reset %pc value. */
992 write_register (PC_REGNUM, lr);
994 /* reset register values if any was saved earlier. */
996 if (fdata.saved_gpr != -1)
998 addr = prev_sp + fdata.gpr_offset;
999 for (ii = fdata.saved_gpr; ii <= 31; ++ii)
1001 read_memory (addr, &deprecated_registers[REGISTER_BYTE (ii)],
1007 if (fdata.saved_fpr != -1)
1009 addr = prev_sp + fdata.fpr_offset;
1010 for (ii = fdata.saved_fpr; ii <= 31; ++ii)
1012 read_memory (addr, &deprecated_registers[REGISTER_BYTE (ii + FP0_REGNUM)], 8);
1017 write_register (SP_REGNUM, prev_sp);
1018 target_store_registers (-1);
1019 flush_cached_frames ();
1022 /* Fixup the call sequence of a dummy function, with the real function
1023 address. Its arguments will be passed by gdb. */
1026 rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun,
1027 int nargs, struct value **args, struct type *type,
1031 CORE_ADDR target_addr;
1033 if (rs6000_find_toc_address_hook != NULL)
1035 CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun);
1036 write_register (gdbarch_tdep (current_gdbarch)->ppc_toc_regnum,
1041 /* All the ABI's require 16 byte alignment. */
1043 rs6000_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1045 return (addr & -16);
1048 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1049 the first eight words of the argument list (that might be less than
1050 eight parameters if some parameters occupy more than one word) are
1051 passed in r3..r10 registers. float and double parameters are
1052 passed in fpr's, in addition to that. Rest of the parameters if any
1053 are passed in user stack. There might be cases in which half of the
1054 parameter is copied into registers, the other half is pushed into
1057 Stack must be aligned on 64-bit boundaries when synthesizing
1060 If the function is returning a structure, then the return address is passed
1061 in r3, then the first 7 words of the parameters can be passed in registers,
1062 starting from r4. */
1065 rs6000_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
1066 int struct_return, CORE_ADDR struct_addr)
1070 int argno; /* current argument number */
1071 int argbytes; /* current argument byte */
1072 char tmp_buffer[50];
1073 int f_argno = 0; /* current floating point argno */
1074 int wordsize = gdbarch_tdep (current_gdbarch)->wordsize;
1076 struct value *arg = 0;
1081 /* The first eight words of ther arguments are passed in registers.
1082 Copy them appropriately.
1084 If the function is returning a `struct', then the first word (which
1085 will be passed in r3) is used for struct return address. In that
1086 case we should advance one word and start from r4 register to copy
1089 ii = struct_return ? 1 : 0;
1092 effectively indirect call... gcc does...
1094 return_val example( float, int);
1097 float in fp0, int in r3
1098 offset of stack on overflow 8/16
1099 for varargs, must go by type.
1101 float in r3&r4, int in r5
1102 offset of stack on overflow different
1104 return in r3 or f0. If no float, must study how gcc emulates floats;
1105 pay attention to arg promotion.
1106 User may have to cast\args to handle promotion correctly
1107 since gdb won't know if prototype supplied or not.
1110 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
1112 int reg_size = REGISTER_RAW_SIZE (ii + 3);
1115 type = check_typedef (VALUE_TYPE (arg));
1116 len = TYPE_LENGTH (type);
1118 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1121 /* Floating point arguments are passed in fpr's, as well as gpr's.
1122 There are 13 fpr's reserved for passing parameters. At this point
1123 there is no way we would run out of them. */
1127 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
1129 memcpy (&deprecated_registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
1130 VALUE_CONTENTS (arg),
1138 /* Argument takes more than one register. */
1139 while (argbytes < len)
1141 memset (&deprecated_registers[REGISTER_BYTE (ii + 3)], 0,
1143 memcpy (&deprecated_registers[REGISTER_BYTE (ii + 3)],
1144 ((char *) VALUE_CONTENTS (arg)) + argbytes,
1145 (len - argbytes) > reg_size
1146 ? reg_size : len - argbytes);
1147 ++ii, argbytes += reg_size;
1150 goto ran_out_of_registers_for_arguments;
1157 /* Argument can fit in one register. No problem. */
1158 int adj = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? reg_size - len : 0;
1159 memset (&deprecated_registers[REGISTER_BYTE (ii + 3)], 0, reg_size);
1160 memcpy ((char *)&deprecated_registers[REGISTER_BYTE (ii + 3)] + adj,
1161 VALUE_CONTENTS (arg), len);
1166 ran_out_of_registers_for_arguments:
1168 saved_sp = read_sp ();
1170 /* Location for 8 parameters are always reserved. */
1173 /* Another six words for back chain, TOC register, link register, etc. */
1176 /* Stack pointer must be quadword aligned. */
1179 /* If there are more arguments, allocate space for them in
1180 the stack, then push them starting from the ninth one. */
1182 if ((argno < nargs) || argbytes)
1188 space += ((len - argbytes + 3) & -4);
1194 for (; jj < nargs; ++jj)
1196 struct value *val = args[jj];
1197 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
1200 /* Add location required for the rest of the parameters. */
1201 space = (space + 15) & -16;
1204 /* This is another instance we need to be concerned about
1205 securing our stack space. If we write anything underneath %sp
1206 (r1), we might conflict with the kernel who thinks he is free
1207 to use this area. So, update %sp first before doing anything
1210 write_register (SP_REGNUM, sp);
1212 /* If the last argument copied into the registers didn't fit there
1213 completely, push the rest of it into stack. */
1217 write_memory (sp + 24 + (ii * 4),
1218 ((char *) VALUE_CONTENTS (arg)) + argbytes,
1221 ii += ((len - argbytes + 3) & -4) / 4;
1224 /* Push the rest of the arguments into stack. */
1225 for (; argno < nargs; ++argno)
1229 type = check_typedef (VALUE_TYPE (arg));
1230 len = TYPE_LENGTH (type);
1233 /* Float types should be passed in fpr's, as well as in the
1235 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
1240 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
1242 memcpy (&deprecated_registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
1243 VALUE_CONTENTS (arg),
1248 write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len);
1249 ii += ((len + 3) & -4) / 4;
1253 /* Secure stack areas first, before doing anything else. */
1254 write_register (SP_REGNUM, sp);
1256 /* set back chain properly */
1257 store_address (tmp_buffer, 4, saved_sp);
1258 write_memory (sp, tmp_buffer, 4);
1260 target_store_registers (-1);
1264 /* Function: ppc_push_return_address (pc, sp)
1265 Set up the return address for the inferior function call. */
1268 ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1270 write_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum,
1271 CALL_DUMMY_ADDRESS ());
1275 /* Extract a function return value of type TYPE from raw register array
1276 REGBUF, and copy that return value into VALBUF in virtual format. */
1278 e500_extract_return_value (struct type *valtype, struct regcache *regbuf, void *valbuf)
1281 int vallen = TYPE_LENGTH (valtype);
1282 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1284 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1286 && TYPE_VECTOR (valtype))
1288 regcache_raw_read (regbuf, tdep->ppc_ev0_regnum + 3, valbuf);
1292 /* Return value is copied starting from r3. Note that r3 for us
1293 is a pseudo register. */
1295 int return_regnum = tdep->ppc_gp0_regnum + 3;
1296 int reg_size = REGISTER_RAW_SIZE (return_regnum);
1302 /* Compute where we will start storing the value from. */
1303 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1305 if (vallen <= reg_size)
1306 offset = reg_size - vallen;
1308 offset = reg_size + (reg_size - vallen);
1311 /* How big does the local buffer need to be? */
1312 if (vallen <= reg_size)
1313 val_buffer = alloca (reg_size);
1315 val_buffer = alloca (vallen);
1317 /* Read all we need into our private buffer. We copy it in
1318 chunks that are as long as one register, never shorter, even
1319 if the value is smaller than the register. */
1320 while (copied < vallen)
1322 reg_part_size = REGISTER_RAW_SIZE (return_regnum + i);
1323 /* It is a pseudo/cooked register. */
1324 regcache_cooked_read (regbuf, return_regnum + i,
1325 val_buffer + copied);
1326 copied += reg_part_size;
1329 /* Put the stuff in the return buffer. */
1330 memcpy (valbuf, val_buffer + offset, vallen);
1335 rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf)
1338 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1340 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
1345 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1346 We need to truncate the return value into float size (4 byte) if
1349 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
1351 ®buf[REGISTER_BYTE (FP0_REGNUM + 1)],
1352 TYPE_LENGTH (valtype));
1355 memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
1357 memcpy (valbuf, &ff, sizeof (float));
1360 else if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1361 && TYPE_LENGTH (valtype) == 16
1362 && TYPE_VECTOR (valtype))
1364 memcpy (valbuf, regbuf + REGISTER_BYTE (tdep->ppc_vr0_regnum + 2),
1365 TYPE_LENGTH (valtype));
1369 /* return value is copied starting from r3. */
1370 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
1371 && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
1372 offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
1375 regbuf + REGISTER_BYTE (3) + offset,
1376 TYPE_LENGTH (valtype));
1380 /* Return whether handle_inferior_event() should proceed through code
1381 starting at PC in function NAME when stepping.
1383 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1384 handle memory references that are too distant to fit in instructions
1385 generated by the compiler. For example, if 'foo' in the following
1390 is greater than 32767, the linker might replace the lwz with a branch to
1391 somewhere in @FIX1 that does the load in 2 instructions and then branches
1392 back to where execution should continue.
1394 GDB should silently step over @FIX code, just like AIX dbx does.
1395 Unfortunately, the linker uses the "b" instruction for the branches,
1396 meaning that the link register doesn't get set. Therefore, GDB's usual
1397 step_over_function() mechanism won't work.
1399 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1400 in handle_inferior_event() to skip past @FIX code. */
1403 rs6000_in_solib_return_trampoline (CORE_ADDR pc, char *name)
1405 return name && !strncmp (name, "@FIX", 4);
1408 /* Skip code that the user doesn't want to see when stepping:
1410 1. Indirect function calls use a piece of trampoline code to do context
1411 switching, i.e. to set the new TOC table. Skip such code if we are on
1412 its first instruction (as when we have single-stepped to here).
1414 2. Skip shared library trampoline code (which is different from
1415 indirect function call trampolines).
1417 3. Skip bigtoc fixup code.
1419 Result is desired PC to step until, or NULL if we are not in
1420 code that should be skipped. */
1423 rs6000_skip_trampoline_code (CORE_ADDR pc)
1425 register unsigned int ii, op;
1427 CORE_ADDR solib_target_pc;
1428 struct minimal_symbol *msymbol;
1430 static unsigned trampoline_code[] =
1432 0x800b0000, /* l r0,0x0(r11) */
1433 0x90410014, /* st r2,0x14(r1) */
1434 0x7c0903a6, /* mtctr r0 */
1435 0x804b0004, /* l r2,0x4(r11) */
1436 0x816b0008, /* l r11,0x8(r11) */
1437 0x4e800420, /* bctr */
1438 0x4e800020, /* br */
1442 /* Check for bigtoc fixup code. */
1443 msymbol = lookup_minimal_symbol_by_pc (pc);
1444 if (msymbol && rs6000_in_solib_return_trampoline (pc, SYMBOL_NAME (msymbol)))
1446 /* Double-check that the third instruction from PC is relative "b". */
1447 op = read_memory_integer (pc + 8, 4);
1448 if ((op & 0xfc000003) == 0x48000000)
1450 /* Extract bits 6-29 as a signed 24-bit relative word address and
1451 add it to the containing PC. */
1452 rel = ((int)(op << 6) >> 6);
1453 return pc + 8 + rel;
1457 /* If pc is in a shared library trampoline, return its target. */
1458 solib_target_pc = find_solib_trampoline_target (pc);
1459 if (solib_target_pc)
1460 return solib_target_pc;
1462 for (ii = 0; trampoline_code[ii]; ++ii)
1464 op = read_memory_integer (pc + (ii * 4), 4);
1465 if (op != trampoline_code[ii])
1468 ii = read_register (11); /* r11 holds destination addr */
1469 pc = read_memory_addr (ii, gdbarch_tdep (current_gdbarch)->wordsize); /* (r11) value */
1473 /* Determines whether the function FI has a frame on the stack or not. */
1476 rs6000_frameless_function_invocation (struct frame_info *fi)
1478 CORE_ADDR func_start;
1479 struct rs6000_framedata fdata;
1481 /* Don't even think about framelessness except on the innermost frame
1482 or if the function was interrupted by a signal. */
1483 if (get_next_frame (fi) != NULL
1484 && !(get_frame_type (get_next_frame (fi)) == SIGTRAMP_FRAME))
1487 func_start = get_pc_function_start (get_frame_pc (fi));
1489 /* If we failed to find the start of the function, it is a mistake
1490 to inspect the instructions. */
1494 /* A frame with a zero PC is usually created by dereferencing a NULL
1495 function pointer, normally causing an immediate core dump of the
1496 inferior. Mark function as frameless, as the inferior has no chance
1497 of setting up a stack frame. */
1498 if (get_frame_pc (fi) == 0)
1504 (void) skip_prologue (func_start, get_frame_pc (fi), &fdata);
1505 return fdata.frameless;
1508 /* Return the PC saved in a frame. */
1511 rs6000_frame_saved_pc (struct frame_info *fi)
1513 CORE_ADDR func_start;
1514 struct rs6000_framedata fdata;
1515 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1516 int wordsize = tdep->wordsize;
1518 if ((get_frame_type (fi) == SIGTRAMP_FRAME))
1519 return read_memory_addr (get_frame_base (fi) + SIG_FRAME_PC_OFFSET,
1522 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi),
1523 get_frame_base (fi),
1524 get_frame_base (fi)))
1525 return deprecated_read_register_dummy (get_frame_pc (fi),
1526 get_frame_base (fi), PC_REGNUM);
1528 func_start = get_pc_function_start (get_frame_pc (fi));
1530 /* If we failed to find the start of the function, it is a mistake
1531 to inspect the instructions. */
1535 (void) skip_prologue (func_start, get_frame_pc (fi), &fdata);
1537 if (fdata.lr_offset == 0 && get_next_frame (fi) != NULL)
1539 if ((get_frame_type (get_next_frame (fi)) == SIGTRAMP_FRAME))
1540 return read_memory_addr ((get_frame_base (get_next_frame (fi))
1541 + SIG_FRAME_LR_OFFSET),
1543 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi)), 0, 0))
1544 /* The link register wasn't saved by this frame and the next
1545 (inner, newer) frame is a dummy. Get the link register
1546 value by unwinding it from that [dummy] frame. */
1549 frame_unwind_unsigned_register (get_next_frame (fi),
1550 tdep->ppc_lr_regnum, &lr);
1554 return read_memory_addr (FRAME_CHAIN (fi) + tdep->lr_frame_offset,
1558 if (fdata.lr_offset == 0)
1559 return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
1561 return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize);
1564 /* If saved registers of frame FI are not known yet, read and cache them.
1565 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1566 in which case the framedata are read. */
1569 frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap)
1571 CORE_ADDR frame_addr;
1572 struct rs6000_framedata work_fdata;
1573 struct gdbarch_tdep * tdep = gdbarch_tdep (current_gdbarch);
1574 int wordsize = tdep->wordsize;
1576 if (get_frame_saved_regs (fi))
1581 fdatap = &work_fdata;
1582 (void) skip_prologue (get_pc_function_start (get_frame_pc (fi)),
1583 get_frame_pc (fi), fdatap);
1586 frame_saved_regs_zalloc (fi);
1588 /* If there were any saved registers, figure out parent's stack
1590 /* The following is true only if the frame doesn't have a call to
1593 if (fdatap->saved_fpr == 0
1594 && fdatap->saved_gpr == 0
1595 && fdatap->saved_vr == 0
1596 && fdatap->saved_ev == 0
1597 && fdatap->lr_offset == 0
1598 && fdatap->cr_offset == 0
1599 && fdatap->vr_offset == 0
1600 && fdatap->ev_offset == 0)
1603 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1604 address of the current frame. Things might be easier if the
1605 ->frame pointed to the outer-most address of the frame. In the
1606 mean time, the address of the prev frame is used as the base
1607 address of this frame. */
1608 frame_addr = FRAME_CHAIN (fi);
1610 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1611 All fpr's from saved_fpr to fp31 are saved. */
1613 if (fdatap->saved_fpr >= 0)
1616 CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset;
1617 for (i = fdatap->saved_fpr; i < 32; i++)
1619 get_frame_saved_regs (fi)[FP0_REGNUM + i] = fpr_addr;
1624 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1625 All gpr's from saved_gpr to gpr31 are saved. */
1627 if (fdatap->saved_gpr >= 0)
1630 CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset;
1631 for (i = fdatap->saved_gpr; i < 32; i++)
1633 get_frame_saved_regs (fi)[i] = gpr_addr;
1634 gpr_addr += wordsize;
1638 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1639 All vr's from saved_vr to vr31 are saved. */
1640 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
1642 if (fdatap->saved_vr >= 0)
1645 CORE_ADDR vr_addr = frame_addr + fdatap->vr_offset;
1646 for (i = fdatap->saved_vr; i < 32; i++)
1648 get_frame_saved_regs (fi)[tdep->ppc_vr0_regnum + i] = vr_addr;
1649 vr_addr += REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
1654 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1655 All vr's from saved_ev to ev31 are saved. ????? */
1656 if (tdep->ppc_ev0_regnum != -1 && tdep->ppc_ev31_regnum != -1)
1658 if (fdatap->saved_ev >= 0)
1661 CORE_ADDR ev_addr = frame_addr + fdatap->ev_offset;
1662 for (i = fdatap->saved_ev; i < 32; i++)
1664 get_frame_saved_regs (fi)[tdep->ppc_ev0_regnum + i] = ev_addr;
1665 get_frame_saved_regs (fi)[tdep->ppc_gp0_regnum + i] = ev_addr + 4;
1666 ev_addr += REGISTER_RAW_SIZE (tdep->ppc_ev0_regnum);
1671 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1673 if (fdatap->cr_offset != 0)
1674 get_frame_saved_regs (fi)[tdep->ppc_cr_regnum] = frame_addr + fdatap->cr_offset;
1676 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1678 if (fdatap->lr_offset != 0)
1679 get_frame_saved_regs (fi)[tdep->ppc_lr_regnum] = frame_addr + fdatap->lr_offset;
1681 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1683 if (fdatap->vrsave_offset != 0)
1684 get_frame_saved_regs (fi)[tdep->ppc_vrsave_regnum] = frame_addr + fdatap->vrsave_offset;
1687 /* Return the address of a frame. This is the inital %sp value when the frame
1688 was first allocated. For functions calling alloca(), it might be saved in
1689 an alloca register. */
1692 frame_initial_stack_address (struct frame_info *fi)
1695 struct rs6000_framedata fdata;
1696 struct frame_info *callee_fi;
1698 /* If the initial stack pointer (frame address) of this frame is known,
1701 if (get_frame_extra_info (fi)->initial_sp)
1702 return get_frame_extra_info (fi)->initial_sp;
1704 /* Find out if this function is using an alloca register. */
1706 (void) skip_prologue (get_pc_function_start (get_frame_pc (fi)),
1707 get_frame_pc (fi), &fdata);
1709 /* If saved registers of this frame are not known yet, read and
1712 if (!get_frame_saved_regs (fi))
1713 frame_get_saved_regs (fi, &fdata);
1715 /* If no alloca register used, then fi->frame is the value of the %sp for
1716 this frame, and it is good enough. */
1718 if (fdata.alloca_reg < 0)
1720 get_frame_extra_info (fi)->initial_sp = get_frame_base (fi);
1721 return get_frame_extra_info (fi)->initial_sp;
1724 /* There is an alloca register, use its value, in the current frame,
1725 as the initial stack pointer. */
1727 char *tmpbuf = alloca (MAX_REGISTER_RAW_SIZE);
1728 if (frame_register_read (fi, fdata.alloca_reg, tmpbuf))
1730 get_frame_extra_info (fi)->initial_sp
1731 = extract_unsigned_integer (tmpbuf,
1732 REGISTER_RAW_SIZE (fdata.alloca_reg));
1735 /* NOTE: cagney/2002-04-17: At present the only time
1736 frame_register_read will fail is when the register isn't
1737 available. If that does happen, use the frame. */
1738 get_frame_extra_info (fi)->initial_sp = get_frame_base (fi);
1740 return get_frame_extra_info (fi)->initial_sp;
1743 /* Describe the pointer in each stack frame to the previous stack frame
1746 /* FRAME_CHAIN takes a frame's nominal address
1747 and produces the frame's chain-pointer. */
1749 /* In the case of the RS/6000, the frame's nominal address
1750 is the address of a 4-byte word containing the calling frame's address. */
1753 rs6000_frame_chain (struct frame_info *thisframe)
1755 CORE_ADDR fp, fpp, lr;
1756 int wordsize = gdbarch_tdep (current_gdbarch)->wordsize;
1758 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe),
1759 get_frame_base (thisframe),
1760 get_frame_base (thisframe)))
1761 /* A dummy frame always correctly chains back to the previous
1763 return read_memory_addr (get_frame_base (thisframe), wordsize);
1765 if (inside_entry_file (get_frame_pc (thisframe))
1766 || get_frame_pc (thisframe) == entry_point_address ())
1769 if ((get_frame_type (thisframe) == SIGTRAMP_FRAME))
1770 fp = read_memory_addr (get_frame_base (thisframe) + SIG_FRAME_FP_OFFSET,
1772 else if (get_next_frame (thisframe) != NULL
1773 && (get_frame_type (get_next_frame (thisframe)) == SIGTRAMP_FRAME)
1774 && FRAMELESS_FUNCTION_INVOCATION (thisframe))
1775 /* A frameless function interrupted by a signal did not change the
1777 fp = get_frame_base (thisframe);
1779 fp = read_memory_addr (get_frame_base (thisframe), wordsize);
1783 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1784 isn't available with that word size, return 0. */
1787 regsize (const struct reg *reg, int wordsize)
1789 return wordsize == 8 ? reg->sz64 : reg->sz32;
1792 /* Return the name of register number N, or null if no such register exists
1793 in the current architecture. */
1796 rs6000_register_name (int n)
1798 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1799 const struct reg *reg = tdep->regs + n;
1801 if (!regsize (reg, tdep->wordsize))
1806 /* Index within `registers' of the first byte of the space for
1810 rs6000_register_byte (int n)
1812 return gdbarch_tdep (current_gdbarch)->regoff[n];
1815 /* Return the number of bytes of storage in the actual machine representation
1816 for register N if that register is available, else return 0. */
1819 rs6000_register_raw_size (int n)
1821 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1822 const struct reg *reg = tdep->regs + n;
1823 return regsize (reg, tdep->wordsize);
1826 /* Return the GDB type object for the "standard" data type
1827 of data in register N. */
1829 static struct type *
1830 rs6000_register_virtual_type (int n)
1832 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1833 const struct reg *reg = tdep->regs + n;
1836 return builtin_type_double;
1839 int size = regsize (reg, tdep->wordsize);
1843 if (tdep->ppc_ev0_regnum <= n && n <= tdep->ppc_ev31_regnum)
1844 return builtin_type_vec64;
1846 return builtin_type_int64;
1849 return builtin_type_vec128;
1852 return builtin_type_int32;
1858 /* Return whether register N requires conversion when moving from raw format
1861 The register format for RS/6000 floating point registers is always
1862 double, we need a conversion if the memory format is float. */
1865 rs6000_register_convertible (int n)
1867 const struct reg *reg = gdbarch_tdep (current_gdbarch)->regs + n;
1871 /* Convert data from raw format for register N in buffer FROM
1872 to virtual format with type TYPE in buffer TO. */
1875 rs6000_register_convert_to_virtual (int n, struct type *type,
1876 char *from, char *to)
1878 if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
1880 double val = extract_floating (from, REGISTER_RAW_SIZE (n));
1881 store_floating (to, TYPE_LENGTH (type), val);
1884 memcpy (to, from, REGISTER_RAW_SIZE (n));
1887 /* Convert data from virtual format with type TYPE in buffer FROM
1888 to raw format for register N in buffer TO. */
1891 rs6000_register_convert_to_raw (struct type *type, int n,
1892 char *from, char *to)
1894 if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
1896 double val = extract_floating (from, TYPE_LENGTH (type));
1897 store_floating (to, REGISTER_RAW_SIZE (n), val);
1900 memcpy (to, from, REGISTER_RAW_SIZE (n));
1904 e500_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1905 int reg_nr, void *buffer)
1909 char *temp_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE);
1910 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1912 if (reg_nr >= tdep->ppc_gp0_regnum
1913 && reg_nr <= tdep->ppc_gplast_regnum)
1915 base_regnum = reg_nr - tdep->ppc_gp0_regnum + tdep->ppc_ev0_regnum;
1917 /* Build the value in the provided buffer. */
1918 /* Read the raw register of which this one is the lower portion. */
1919 regcache_raw_read (regcache, base_regnum, temp_buffer);
1920 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1922 memcpy ((char *) buffer, temp_buffer + offset, 4);
1927 e500_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1928 int reg_nr, const void *buffer)
1932 char *temp_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE);
1933 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1935 if (reg_nr >= tdep->ppc_gp0_regnum
1936 && reg_nr <= tdep->ppc_gplast_regnum)
1938 base_regnum = reg_nr - tdep->ppc_gp0_regnum + tdep->ppc_ev0_regnum;
1939 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1940 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1943 /* Let's read the value of the base register into a temporary
1944 buffer, so that overwriting the last four bytes with the new
1945 value of the pseudo will leave the upper 4 bytes unchanged. */
1946 regcache_raw_read (regcache, base_regnum, temp_buffer);
1948 /* Write as an 8 byte quantity. */
1949 memcpy (temp_buffer + offset, (char *) buffer, 4);
1950 regcache_raw_write (regcache, base_regnum, temp_buffer);
1954 /* Convert a dwarf2 register number to a gdb REGNUM. */
1956 e500_dwarf2_reg_to_regnum (int num)
1959 if (0 <= num && num <= 31)
1960 return num + gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum;
1965 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1968 rs6000_stab_reg_to_regnum (int num)
1974 regnum = gdbarch_tdep (current_gdbarch)->ppc_mq_regnum;
1977 regnum = gdbarch_tdep (current_gdbarch)->ppc_lr_regnum;
1980 regnum = gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum;
1983 regnum = gdbarch_tdep (current_gdbarch)->ppc_xer_regnum;
1992 /* Store the address of the place in which to copy the structure the
1993 subroutine will return. */
1996 rs6000_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1998 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1999 write_register (tdep->ppc_gp0_regnum + 3, addr);
2002 /* Write into appropriate registers a function return value
2003 of type TYPE, given in virtual format. */
2005 e500_store_return_value (struct type *type, char *valbuf)
2007 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
2009 /* Everything is returned in GPR3 and up. */
2012 int len = TYPE_LENGTH (type);
2013 while (copied < len)
2015 int regnum = gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum + 3 + i;
2016 int reg_size = REGISTER_RAW_SIZE (regnum);
2017 char *reg_val_buf = alloca (reg_size);
2019 memcpy (reg_val_buf, valbuf + copied, reg_size);
2021 deprecated_write_register_gen (regnum, reg_val_buf);
2027 rs6000_store_return_value (struct type *type, char *valbuf)
2029 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
2031 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2033 /* Floating point values are returned starting from FPR1 and up.
2034 Say a double_double_double type could be returned in
2035 FPR1/FPR2/FPR3 triple. */
2037 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf,
2038 TYPE_LENGTH (type));
2039 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY)
2041 if (TYPE_LENGTH (type) == 16
2042 && TYPE_VECTOR (type))
2043 deprecated_write_register_bytes (REGISTER_BYTE (tdep->ppc_vr0_regnum + 2),
2044 valbuf, TYPE_LENGTH (type));
2047 /* Everything else is returned in GPR3 and up. */
2048 deprecated_write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum + 3),
2049 valbuf, TYPE_LENGTH (type));
2052 /* Extract from an array REGBUF containing the (raw) register state
2053 the address in which a function should return its structure value,
2054 as a CORE_ADDR (or an expression that can be used as one). */
2057 rs6000_extract_struct_value_address (struct regcache *regcache)
2059 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2060 function call GDB knows the address of the struct return value
2061 and hence, should not need to call this function. Unfortunately,
2062 the current hand_function_call() code only saves the most recent
2063 struct address leading to occasional calls. The code should
2064 instead maintain a stack of such addresses (in the dummy frame
2066 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2067 really got no idea where the return value is being stored. While
2068 r3, on function entry, contained the address it will have since
2069 been reused (scratch) and hence wouldn't be valid */
2073 /* Return whether PC is in a dummy function call.
2075 FIXME: This just checks for the end of the stack, which is broken
2076 for things like stepping through gcc nested function stubs. */
2079 rs6000_pc_in_call_dummy (CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR fp)
2081 return sp < pc && pc < fp;
2084 /* Hook called when a new child process is started. */
2087 rs6000_create_inferior (int pid)
2089 if (rs6000_set_host_arch_hook)
2090 rs6000_set_host_arch_hook (pid);
2093 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
2095 Usually a function pointer's representation is simply the address
2096 of the function. On the RS/6000 however, a function pointer is
2097 represented by a pointer to a TOC entry. This TOC entry contains
2098 three words, the first word is the address of the function, the
2099 second word is the TOC pointer (r2), and the third word is the
2100 static chain value. Throughout GDB it is currently assumed that a
2101 function pointer contains the address of the function, which is not
2102 easy to fix. In addition, the conversion of a function address to
2103 a function pointer would require allocation of a TOC entry in the
2104 inferior's memory space, with all its drawbacks. To be able to
2105 call C++ virtual methods in the inferior (which are called via
2106 function pointers), find_function_addr uses this function to get the
2107 function address from a function pointer. */
2109 /* Return real function address if ADDR (a function pointer) is in the data
2110 space and is therefore a special function pointer. */
2113 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr)
2115 struct obj_section *s;
2117 s = find_pc_section (addr);
2118 if (s && s->the_bfd_section->flags & SEC_CODE)
2121 /* ADDR is in the data space, so it's a special function pointer. */
2122 return read_memory_addr (addr, gdbarch_tdep (current_gdbarch)->wordsize);
2126 /* Handling the various POWER/PowerPC variants. */
2129 /* The arrays here called registers_MUMBLE hold information about available
2132 For each family of PPC variants, I've tried to isolate out the
2133 common registers and put them up front, so that as long as you get
2134 the general family right, GDB will correctly identify the registers
2135 common to that family. The common register sets are:
2137 For the 60x family: hid0 hid1 iabr dabr pir
2139 For the 505 and 860 family: eie eid nri
2141 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2142 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2145 Most of these register groups aren't anything formal. I arrived at
2146 them by looking at the registers that occurred in more than one
2149 Note: kevinb/2002-04-30: Support for the fpscr register was added
2150 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2151 for Power. For PowerPC, slot 70 was unused and was already in the
2152 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2153 slot 70 was being used for "mq", so the next available slot (71)
2154 was chosen. It would have been nice to be able to make the
2155 register numbers the same across processor cores, but this wasn't
2156 possible without either 1) renumbering some registers for some
2157 processors or 2) assigning fpscr to a really high slot that's
2158 larger than any current register number. Doing (1) is bad because
2159 existing stubs would break. Doing (2) is undesirable because it
2160 would introduce a really large gap between fpscr and the rest of
2161 the registers for most processors. */
2163 /* Convenience macros for populating register arrays. */
2165 /* Within another macro, convert S to a string. */
2169 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2170 and 64 bits on 64-bit systems. */
2171 #define R(name) { STR(name), 4, 8, 0, 0 }
2173 /* Return a struct reg defining register NAME that's 32 bits on all
2175 #define R4(name) { STR(name), 4, 4, 0, 0 }
2177 /* Return a struct reg defining register NAME that's 64 bits on all
2179 #define R8(name) { STR(name), 8, 8, 0, 0 }
2181 /* Return a struct reg defining register NAME that's 128 bits on all
2183 #define R16(name) { STR(name), 16, 16, 0, 0 }
2185 /* Return a struct reg defining floating-point register NAME. */
2186 #define F(name) { STR(name), 8, 8, 1, 0 }
2188 /* Return a struct reg defining a pseudo register NAME. */
2189 #define P(name) { STR(name), 4, 8, 0, 1}
2191 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2192 systems and that doesn't exist on 64-bit systems. */
2193 #define R32(name) { STR(name), 4, 0, 0, 0 }
2195 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2196 systems and that doesn't exist on 32-bit systems. */
2197 #define R64(name) { STR(name), 0, 8, 0, 0 }
2199 /* Return a struct reg placeholder for a register that doesn't exist. */
2200 #define R0 { 0, 0, 0, 0, 0 }
2202 /* UISA registers common across all architectures, including POWER. */
2204 #define COMMON_UISA_REGS \
2205 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2206 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2207 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2208 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2209 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2210 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2211 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2212 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2213 /* 64 */ R(pc), R(ps)
2215 #define COMMON_UISA_NOFP_REGS \
2216 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2217 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2218 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2219 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2220 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2221 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2222 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2223 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2224 /* 64 */ R(pc), R(ps)
2226 /* UISA-level SPRs for PowerPC. */
2227 #define PPC_UISA_SPRS \
2228 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2230 /* UISA-level SPRs for PowerPC without floating point support. */
2231 #define PPC_UISA_NOFP_SPRS \
2232 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2234 /* Segment registers, for PowerPC. */
2235 #define PPC_SEGMENT_REGS \
2236 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2237 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2238 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2239 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2241 /* OEA SPRs for PowerPC. */
2242 #define PPC_OEA_SPRS \
2244 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2245 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2246 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2247 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2248 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2249 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2250 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2251 /* 116 */ R4(dec), R(dabr), R4(ear)
2253 /* AltiVec registers. */
2254 #define PPC_ALTIVEC_REGS \
2255 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2256 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2257 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2258 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2259 /*151*/R4(vscr), R4(vrsave)
2261 /* Vectors of hi-lo general purpose registers. */
2262 #define PPC_EV_REGS \
2263 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2264 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2265 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2266 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2268 /* Lower half of the EV registers. */
2269 #define PPC_GPRS_PSEUDO_REGS \
2270 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2271 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2272 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2273 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31), \
2275 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2276 user-level SPR's. */
2277 static const struct reg registers_power[] =
2280 /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq),
2284 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2285 view of the PowerPC. */
2286 static const struct reg registers_powerpc[] =
2293 /* PowerPC UISA - a PPC processor as viewed by user-level
2294 code, but without floating point registers. */
2295 static const struct reg registers_powerpc_nofp[] =
2297 COMMON_UISA_NOFP_REGS,
2301 /* IBM PowerPC 403. */
2302 static const struct reg registers_403[] =
2308 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
2309 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
2310 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
2311 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
2312 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
2313 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2)
2316 /* IBM PowerPC 403GC. */
2317 static const struct reg registers_403GC[] =
2323 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
2324 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
2325 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
2326 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
2327 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
2328 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2),
2329 /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr),
2330 /* 147 */ R(tbhu), R(tblu)
2333 /* Motorola PowerPC 505. */
2334 static const struct reg registers_505[] =
2340 /* 119 */ R(eie), R(eid), R(nri)
2343 /* Motorola PowerPC 860 or 850. */
2344 static const struct reg registers_860[] =
2350 /* 119 */ R(eie), R(eid), R(nri), R(cmpa),
2351 /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr),
2352 /* 127 */ R(der), R(counta), R(countb), R(cmpe),
2353 /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1),
2354 /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst),
2355 /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr),
2356 /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr),
2357 /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc),
2358 /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap),
2359 /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn),
2360 /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1),
2361 /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1)
2364 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2365 for reading and writing RTCU and RTCL. However, how one reads and writes a
2366 register is the stub's problem. */
2367 static const struct reg registers_601[] =
2373 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
2374 /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl)
2377 /* Motorola PowerPC 602. */
2378 static const struct reg registers_602[] =
2384 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
2385 /* 123 */ R0, R(tcr), R(ibr), R(esassr),
2386 /* 127 */ R(sebr), R(ser), R(sp), R(lt)
2389 /* Motorola/IBM PowerPC 603 or 603e. */
2390 static const struct reg registers_603[] =
2396 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
2397 /* 123 */ R0, R(dmiss), R(dcmp), R(hash1),
2398 /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa)
2401 /* Motorola PowerPC 604 or 604e. */
2402 static const struct reg registers_604[] =
2408 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
2409 /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2),
2410 /* 127 */ R(sia), R(sda)
2413 /* Motorola/IBM PowerPC 750 or 740. */
2414 static const struct reg registers_750[] =
2420 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
2421 /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2),
2422 /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4),
2423 /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia),
2424 /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr),
2425 /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3)
2429 /* Motorola PowerPC 7400. */
2430 static const struct reg registers_7400[] =
2432 /* gpr0-gpr31, fpr0-fpr31 */
2434 /* ctr, xre, lr, cr */
2439 /* vr0-vr31, vrsave, vscr */
2441 /* FIXME? Add more registers? */
2444 /* Motorola e500. */
2445 static const struct reg registers_e500[] =
2448 /* cr, lr, ctr, xer, "" */
2453 PPC_GPRS_PSEUDO_REGS
2456 /* Information about a particular processor variant. */
2460 /* Name of this variant. */
2463 /* English description of the variant. */
2466 /* bfd_arch_info.arch corresponding to variant. */
2467 enum bfd_architecture arch;
2469 /* bfd_arch_info.mach corresponding to variant. */
2472 /* Number of real registers. */
2475 /* Number of pseudo registers. */
2478 /* Number of total registers (the sum of nregs and npregs). */
2481 /* Table of register names; registers[R] is the name of the register
2483 const struct reg *regs;
2486 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2489 num_registers (const struct reg *reg_list, int num_tot_regs)
2494 for (i = 0; i < num_tot_regs; i++)
2495 if (!reg_list[i].pseudo)
2502 num_pseudo_registers (const struct reg *reg_list, int num_tot_regs)
2507 for (i = 0; i < num_tot_regs; i++)
2508 if (reg_list[i].pseudo)
2514 /* Information in this table comes from the following web sites:
2515 IBM: http://www.chips.ibm.com:80/products/embedded/
2516 Motorola: http://www.mot.com/SPS/PowerPC/
2518 I'm sure I've got some of the variant descriptions not quite right.
2519 Please report any inaccuracies you find to GDB's maintainer.
2521 If you add entries to this table, please be sure to allow the new
2522 value as an argument to the --with-cpu flag, in configure.in. */
2524 static struct variant variants[] =
2527 {"powerpc", "PowerPC user-level", bfd_arch_powerpc,
2528 bfd_mach_ppc, -1, -1, tot_num_registers (registers_powerpc),
2530 {"power", "POWER user-level", bfd_arch_rs6000,
2531 bfd_mach_rs6k, -1, -1, tot_num_registers (registers_power),
2533 {"403", "IBM PowerPC 403", bfd_arch_powerpc,
2534 bfd_mach_ppc_403, -1, -1, tot_num_registers (registers_403),
2536 {"601", "Motorola PowerPC 601", bfd_arch_powerpc,
2537 bfd_mach_ppc_601, -1, -1, tot_num_registers (registers_601),
2539 {"602", "Motorola PowerPC 602", bfd_arch_powerpc,
2540 bfd_mach_ppc_602, -1, -1, tot_num_registers (registers_602),
2542 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc,
2543 bfd_mach_ppc_603, -1, -1, tot_num_registers (registers_603),
2545 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc,
2546 604, -1, -1, tot_num_registers (registers_604),
2548 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc,
2549 bfd_mach_ppc_403gc, -1, -1, tot_num_registers (registers_403GC),
2551 {"505", "Motorola PowerPC 505", bfd_arch_powerpc,
2552 bfd_mach_ppc_505, -1, -1, tot_num_registers (registers_505),
2554 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc,
2555 bfd_mach_ppc_860, -1, -1, tot_num_registers (registers_860),
2557 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc,
2558 bfd_mach_ppc_750, -1, -1, tot_num_registers (registers_750),
2560 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc,
2561 bfd_mach_ppc_7400, -1, -1, tot_num_registers (registers_7400),
2563 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc,
2564 bfd_mach_ppc_e500, -1, -1, tot_num_registers (registers_e500),
2568 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc,
2569 bfd_mach_ppc64, -1, -1, tot_num_registers (registers_powerpc),
2571 {"620", "Motorola PowerPC 620", bfd_arch_powerpc,
2572 bfd_mach_ppc_620, -1, -1, tot_num_registers (registers_powerpc),
2574 {"630", "Motorola PowerPC 630", bfd_arch_powerpc,
2575 bfd_mach_ppc_630, -1, -1, tot_num_registers (registers_powerpc),
2577 {"a35", "PowerPC A35", bfd_arch_powerpc,
2578 bfd_mach_ppc_a35, -1, -1, tot_num_registers (registers_powerpc),
2580 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc,
2581 bfd_mach_ppc_rs64ii, -1, -1, tot_num_registers (registers_powerpc),
2583 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc,
2584 bfd_mach_ppc_rs64iii, -1, -1, tot_num_registers (registers_powerpc),
2587 /* FIXME: I haven't checked the register sets of the following. */
2588 {"rs1", "IBM POWER RS1", bfd_arch_rs6000,
2589 bfd_mach_rs6k_rs1, -1, -1, tot_num_registers (registers_power),
2591 {"rsc", "IBM POWER RSC", bfd_arch_rs6000,
2592 bfd_mach_rs6k_rsc, -1, -1, tot_num_registers (registers_power),
2594 {"rs2", "IBM POWER RS2", bfd_arch_rs6000,
2595 bfd_mach_rs6k_rs2, -1, -1, tot_num_registers (registers_power),
2598 {0, 0, 0, 0, 0, 0, 0, 0}
2601 /* Initialize the number of registers and pseudo registers in each variant. */
2604 init_variants (void)
2608 for (v = variants; v->name; v++)
2611 v->nregs = num_registers (v->regs, v->num_tot_regs);
2612 if (v->npregs == -1)
2613 v->npregs = num_pseudo_registers (v->regs, v->num_tot_regs);
2617 /* Return the variant corresponding to architecture ARCH and machine number
2618 MACH. If no such variant exists, return null. */
2620 static const struct variant *
2621 find_variant_by_arch (enum bfd_architecture arch, unsigned long mach)
2623 const struct variant *v;
2625 for (v = variants; v->name; v++)
2626 if (arch == v->arch && mach == v->mach)
2633 gdb_print_insn_powerpc (bfd_vma memaddr, disassemble_info *info)
2635 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
2636 return print_insn_big_powerpc (memaddr, info);
2638 return print_insn_little_powerpc (memaddr, info);
2641 /* Initialize the current architecture based on INFO. If possible, re-use an
2642 architecture from ARCHES, which is a list of architectures already created
2643 during this debugging session.
2645 Called e.g. at program startup, when reading a core file, and when reading
2648 static struct gdbarch *
2649 rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2651 struct gdbarch *gdbarch;
2652 struct gdbarch_tdep *tdep;
2653 int wordsize, from_xcoff_exec, from_elf_exec, power, i, off;
2655 const struct variant *v;
2656 enum bfd_architecture arch;
2660 enum gdb_osabi osabi = GDB_OSABI_UNKNOWN;
2663 from_xcoff_exec = info.abfd && info.abfd->format == bfd_object &&
2664 bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;
2666 from_elf_exec = info.abfd && info.abfd->format == bfd_object &&
2667 bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2669 sysv_abi = info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2672 osabi = gdbarch_lookup_osabi (info.abfd);
2674 /* Check word size. If INFO is from a binary file, infer it from
2675 that, else choose a likely default. */
2676 if (from_xcoff_exec)
2678 if (bfd_xcoff_is_xcoff64 (info.abfd))
2683 else if (from_elf_exec)
2685 if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
2692 if (info.bfd_arch_info != NULL && info.bfd_arch_info->bits_per_word != 0)
2693 wordsize = info.bfd_arch_info->bits_per_word /
2694 info.bfd_arch_info->bits_per_byte;
2699 /* Find a candidate among extant architectures. */
2700 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2702 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2704 /* Word size in the various PowerPC bfd_arch_info structs isn't
2705 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2706 separate word size check. */
2707 tdep = gdbarch_tdep (arches->gdbarch);
2708 if (tdep && tdep->wordsize == wordsize && tdep->osabi == osabi)
2709 return arches->gdbarch;
2712 /* None found, create a new architecture from INFO, whose bfd_arch_info
2713 validity depends on the source:
2714 - executable useless
2715 - rs6000_host_arch() good
2717 - "set arch" trust blindly
2718 - GDB startup useless but harmless */
2720 if (!from_xcoff_exec)
2722 arch = info.bfd_arch_info->arch;
2723 mach = info.bfd_arch_info->mach;
2727 arch = bfd_arch_powerpc;
2729 bfd_default_set_arch_mach (&abfd, arch, mach);
2730 info.bfd_arch_info = bfd_get_arch_info (&abfd);
2732 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2733 tdep->wordsize = wordsize;
2734 tdep->osabi = osabi;
2736 /* For e500 executables, the apuinfo section is of help here. Such
2737 section contains the identifier and revision number of each
2738 Application-specific Processing Unit that is present on the
2739 chip. The content of the section is determined by the assembler
2740 which looks at each instruction and determines which unit (and
2741 which version of it) can execute it. In our case we just look for
2742 the existance of the section. */
2746 sect = bfd_get_section_by_name (info.abfd, ".PPC.EMB.apuinfo");
2749 arch = info.bfd_arch_info->arch;
2750 mach = bfd_mach_ppc_e500;
2751 bfd_default_set_arch_mach (&abfd, arch, mach);
2752 info.bfd_arch_info = bfd_get_arch_info (&abfd);
2756 gdbarch = gdbarch_alloc (&info, tdep);
2757 power = arch == bfd_arch_rs6000;
2759 /* Initialize the number of real and pseudo registers in each variant. */
2762 /* Choose variant. */
2763 v = find_variant_by_arch (arch, mach);
2767 tdep->regs = v->regs;
2769 tdep->ppc_gp0_regnum = 0;
2770 tdep->ppc_gplast_regnum = 31;
2771 tdep->ppc_toc_regnum = 2;
2772 tdep->ppc_ps_regnum = 65;
2773 tdep->ppc_cr_regnum = 66;
2774 tdep->ppc_lr_regnum = 67;
2775 tdep->ppc_ctr_regnum = 68;
2776 tdep->ppc_xer_regnum = 69;
2777 if (v->mach == bfd_mach_ppc_601)
2778 tdep->ppc_mq_regnum = 124;
2780 tdep->ppc_mq_regnum = 70;
2782 tdep->ppc_mq_regnum = -1;
2783 tdep->ppc_fpscr_regnum = power ? 71 : 70;
2785 set_gdbarch_pc_regnum (gdbarch, 64);
2786 set_gdbarch_sp_regnum (gdbarch, 1);
2787 set_gdbarch_fp_regnum (gdbarch, 1);
2788 set_gdbarch_deprecated_extract_return_value (gdbarch,
2789 rs6000_extract_return_value);
2790 set_gdbarch_deprecated_store_return_value (gdbarch, rs6000_store_return_value);
2792 if (v->arch == bfd_arch_powerpc)
2796 tdep->ppc_vr0_regnum = 71;
2797 tdep->ppc_vrsave_regnum = 104;
2798 tdep->ppc_ev0_regnum = -1;
2799 tdep->ppc_ev31_regnum = -1;
2801 case bfd_mach_ppc_7400:
2802 tdep->ppc_vr0_regnum = 119;
2803 tdep->ppc_vrsave_regnum = 152;
2804 tdep->ppc_ev0_regnum = -1;
2805 tdep->ppc_ev31_regnum = -1;
2807 case bfd_mach_ppc_e500:
2808 tdep->ppc_gp0_regnum = 39;
2809 tdep->ppc_gplast_regnum = 70;
2810 tdep->ppc_toc_regnum = -1;
2811 tdep->ppc_ps_regnum = 1;
2812 tdep->ppc_cr_regnum = 2;
2813 tdep->ppc_lr_regnum = 3;
2814 tdep->ppc_ctr_regnum = 4;
2815 tdep->ppc_xer_regnum = 5;
2816 tdep->ppc_ev0_regnum = 7;
2817 tdep->ppc_ev31_regnum = 38;
2818 set_gdbarch_pc_regnum (gdbarch, 0);
2819 set_gdbarch_sp_regnum (gdbarch, 40);
2820 set_gdbarch_fp_regnum (gdbarch, 40);
2821 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, e500_dwarf2_reg_to_regnum);
2822 set_gdbarch_pseudo_register_read (gdbarch, e500_pseudo_register_read);
2823 set_gdbarch_pseudo_register_write (gdbarch, e500_pseudo_register_write);
2824 set_gdbarch_extract_return_value (gdbarch, e500_extract_return_value);
2825 set_gdbarch_deprecated_store_return_value (gdbarch, e500_store_return_value);
2828 tdep->ppc_vr0_regnum = -1;
2829 tdep->ppc_vrsave_regnum = -1;
2830 tdep->ppc_ev0_regnum = -1;
2831 tdep->ppc_ev31_regnum = -1;
2835 /* Set lr_frame_offset. */
2837 tdep->lr_frame_offset = 16;
2839 tdep->lr_frame_offset = 4;
2841 tdep->lr_frame_offset = 8;
2843 /* Calculate byte offsets in raw register array. */
2844 tdep->regoff = xmalloc (v->num_tot_regs * sizeof (int));
2845 for (i = off = 0; i < v->num_tot_regs; i++)
2847 tdep->regoff[i] = off;
2848 off += regsize (v->regs + i, wordsize);
2851 /* Select instruction printer. */
2853 set_gdbarch_print_insn (gdbarch, print_insn_rs6000);
2855 set_gdbarch_print_insn (gdbarch, gdb_print_insn_powerpc);
2857 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2858 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2859 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2860 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2861 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2863 set_gdbarch_num_regs (gdbarch, v->nregs);
2864 set_gdbarch_num_pseudo_regs (gdbarch, v->npregs);
2865 set_gdbarch_register_name (gdbarch, rs6000_register_name);
2866 set_gdbarch_register_size (gdbarch, wordsize);
2867 set_gdbarch_register_bytes (gdbarch, off);
2868 set_gdbarch_register_byte (gdbarch, rs6000_register_byte);
2869 set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size);
2870 set_gdbarch_max_register_raw_size (gdbarch, 16);
2871 set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
2872 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2873 set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type);
2875 set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2876 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2877 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2878 set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2879 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2880 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2881 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2882 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2883 set_gdbarch_char_signed (gdbarch, 0);
2885 set_gdbarch_call_dummy_length (gdbarch, 0);
2886 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2887 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2888 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2889 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2890 set_gdbarch_call_dummy_p (gdbarch, 1);
2891 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2892 set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy);
2893 set_gdbarch_frame_align (gdbarch, rs6000_frame_align);
2894 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2895 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
2896 set_gdbarch_push_return_address (gdbarch, ppc_push_return_address);
2897 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2899 set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible);
2900 set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual);
2901 set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw);
2902 set_gdbarch_stab_reg_to_regnum (gdbarch, rs6000_stab_reg_to_regnum);
2903 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2904 is correct for the SysV ABI when the wordsize is 8, but I'm also
2905 fairly certain that ppc_sysv_abi_push_arguments() will give even
2906 worse results since it only works for 32-bit code. So, for the moment,
2907 we're better off calling rs6000_push_arguments() since it works for
2908 64-bit code. At some point in the future, this matter needs to be
2910 if (sysv_abi && wordsize == 4)
2911 set_gdbarch_push_arguments (gdbarch, ppc_sysv_abi_push_arguments);
2913 set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments);
2915 set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return);
2916 set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address);
2917 set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame);
2919 set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue);
2920 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2921 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2922 set_gdbarch_function_start_offset (gdbarch, 0);
2923 set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc);
2925 /* Not sure on this. FIXMEmgo */
2926 set_gdbarch_frame_args_skip (gdbarch, 8);
2929 set_gdbarch_use_struct_convention (gdbarch,
2930 ppc_sysv_abi_use_struct_convention);
2932 set_gdbarch_use_struct_convention (gdbarch,
2933 generic_use_struct_convention);
2935 set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid);
2937 set_gdbarch_frameless_function_invocation (gdbarch,
2938 rs6000_frameless_function_invocation);
2939 set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain);
2940 set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc);
2942 set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs);
2943 set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info);
2947 /* Handle RS/6000 function pointers (which are really function
2949 set_gdbarch_convert_from_func_ptr_addr (gdbarch,
2950 rs6000_convert_from_func_ptr_addr);
2952 set_gdbarch_frame_args_address (gdbarch, rs6000_frame_args_address);
2953 set_gdbarch_frame_locals_address (gdbarch, rs6000_frame_args_address);
2954 set_gdbarch_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call);
2956 /* We can't tell how many args there are
2957 now that the C compiler delays popping them. */
2958 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2960 /* Hook in ABI-specific overrides, if they have been registered. */
2961 gdbarch_init_osabi (info, gdbarch, osabi);
2967 rs6000_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
2969 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
2974 fprintf_unfiltered (file, "rs6000_dump_tdep: OS ABI = %s\n",
2975 gdbarch_osabi_name (tdep->osabi));
2978 static struct cmd_list_element *info_powerpc_cmdlist = NULL;
2981 rs6000_info_powerpc_command (char *args, int from_tty)
2983 help_list (info_powerpc_cmdlist, "info powerpc ", class_info, gdb_stdout);
2986 /* Initialization code. */
2989 _initialize_rs6000_tdep (void)
2991 gdbarch_register (bfd_arch_rs6000, rs6000_gdbarch_init, rs6000_dump_tdep);
2992 gdbarch_register (bfd_arch_powerpc, rs6000_gdbarch_init, rs6000_dump_tdep);
2994 /* Add root prefix command for "info powerpc" commands */
2995 add_prefix_cmd ("powerpc", class_info, rs6000_info_powerpc_command,
2996 "Various POWERPC info specific commands.",
2997 &info_powerpc_cmdlist, "info powerpc ", 0, &infolist);