1 /* Target-dependent code for the Renesas RL78 for GDB, the GNU debugger.
3 Copyright (C) 2011-2012 Free Software Foundation, Inc.
5 Contributed by Red Hat, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
24 #include "prologue-value.h"
27 #include "opcode/rl78.h"
31 #include "frame-unwind.h"
32 #include "frame-base.h"
35 #include "dwarf2-frame.h"
49 RL78_REGS_PER_BANK = 8
52 /* Register Numbers. */
56 /* All general purpose registers are 8 bits wide. */
57 RL78_BANK0_R0_REGNUM = 0,
93 RL78_PSW_REGNUM, /* 8 bits */
94 RL78_ES_REGNUM, /* 8 bits */
95 RL78_CS_REGNUM, /* 8 bits */
96 RL78_PC_REGNUM, /* 20 bits; we'll use 32 bits for it. */
98 /* Fixed address SFRs (some of those above are SFRs too.) */
99 RL78_SPL_REGNUM, /* 8 bits; lower half of SP */
100 RL78_SPH_REGNUM, /* 8 bits; upper half of SP */
101 RL78_PMC_REGNUM, /* 8 bits */
102 RL78_MEM_REGNUM, /* 8 bits ?? */
106 /* Pseudo registers. */
107 RL78_BANK0_RP0_REGNUM = RL78_NUM_REGS,
108 RL78_BANK0_RP1_REGNUM,
109 RL78_BANK0_RP2_REGNUM,
110 RL78_BANK0_RP3_REGNUM,
112 RL78_BANK1_RP0_REGNUM,
113 RL78_BANK1_RP1_REGNUM,
114 RL78_BANK1_RP2_REGNUM,
115 RL78_BANK1_RP3_REGNUM,
117 RL78_BANK2_RP0_REGNUM,
118 RL78_BANK2_RP1_REGNUM,
119 RL78_BANK2_RP2_REGNUM,
120 RL78_BANK2_RP3_REGNUM,
122 RL78_BANK3_RP0_REGNUM,
123 RL78_BANK3_RP1_REGNUM,
124 RL78_BANK3_RP2_REGNUM,
125 RL78_BANK3_RP3_REGNUM,
143 RL78_NUM_PSEUDO_REGS = RL78_NUM_TOTAL_REGS - RL78_NUM_REGS
146 /* Architecture specific data. */
150 /* The ELF header flags specify the multilib used. */
153 struct type *rl78_void,
164 /* This structure holds the results of a prologue analysis. */
168 /* The offset from the frame base to the stack pointer --- always
171 Calling this a "size" is a bit misleading, but given that the
172 stack grows downwards, using offsets for everything keeps one
173 from going completely sign-crazy: you never change anything's
174 sign for an ADD instruction; always change the second operand's
175 sign for a SUB instruction; and everything takes care of
179 /* Non-zero if this function has initialized the frame pointer from
180 the stack pointer, zero otherwise. */
183 /* If has_frame_ptr is non-zero, this is the offset from the frame
184 base to where the frame pointer points. This is always zero or
186 int frame_ptr_offset;
188 /* The address of the first instruction at which the frame has been
189 set up and the arguments are where the debug info says they are
190 --- as best as we can tell. */
191 CORE_ADDR prologue_end;
193 /* reg_offset[R] is the offset from the CFA at which register R is
194 saved, or 1 if register R has not been saved. (Real values are
195 always zero or negative.) */
196 int reg_offset[RL78_NUM_TOTAL_REGS];
199 /* Implement the "register_type" gdbarch method. */
202 rl78_register_type (struct gdbarch *gdbarch, int reg_nr)
204 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
206 if (reg_nr == RL78_PC_REGNUM)
207 return tdep->rl78_code_pointer;
208 else if (reg_nr <= RL78_MEM_REGNUM
209 || (RL78_X_REGNUM <= reg_nr && reg_nr <= RL78_H_REGNUM))
210 return tdep->rl78_int8;
212 return tdep->rl78_data_pointer;
215 /* Implement the "register_name" gdbarch method. */
218 rl78_register_name (struct gdbarch *gdbarch, int regnr)
220 static const char *const reg_names[] =
305 return reg_names[regnr];
308 /* Strip bits to form an instruction address. (When fetching a
309 32-bit address from the stack, the high eight bits are garbage.
310 This function strips off those unused bits.) */
313 rl78_make_instruction_address (CORE_ADDR addr)
315 return addr & 0xffffff;
318 /* Set / clear bits necessary to make a data address. */
321 rl78_make_data_address (CORE_ADDR addr)
323 return (addr & 0xffff) | 0xf0000;
326 /* Implement the "pseudo_register_read" gdbarch method. */
328 static enum register_status
329 rl78_pseudo_register_read (struct gdbarch *gdbarch,
330 struct regcache *regcache,
331 int reg, gdb_byte *buffer)
333 enum register_status status;
335 if (RL78_BANK0_RP0_REGNUM <= reg && reg <= RL78_BANK3_RP3_REGNUM)
337 int raw_regnum = 2 * (reg - RL78_BANK0_RP0_REGNUM)
338 + RL78_BANK0_R0_REGNUM;
340 status = regcache_raw_read (regcache, raw_regnum, buffer);
341 if (status == REG_VALID)
342 status = regcache_raw_read (regcache, raw_regnum + 1, buffer + 1);
344 else if (reg == RL78_SP_REGNUM)
346 status = regcache_raw_read (regcache, RL78_SPL_REGNUM, buffer);
347 if (status == REG_VALID)
348 status = regcache_raw_read (regcache, RL78_SPH_REGNUM, buffer + 1);
350 else if (RL78_X_REGNUM <= reg && reg <= RL78_H_REGNUM)
354 status = regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
355 if (status == REG_VALID)
357 /* RSB0 is at bit 3; RSBS1 is at bit 5. */
358 int bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
359 int raw_regnum = RL78_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
360 + (reg - RL78_X_REGNUM);
361 status = regcache_raw_read (regcache, raw_regnum, buffer);
364 else if (RL78_AX_REGNUM <= reg && reg <= RL78_HL_REGNUM)
368 status = regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
369 if (status == REG_VALID)
371 /* RSB0 is at bit 3; RSBS1 is at bit 5. */
372 int bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
373 int raw_regnum = RL78_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
374 + 2 * (reg - RL78_AX_REGNUM);
375 status = regcache_raw_read (regcache, raw_regnum, buffer);
376 if (status == REG_VALID)
377 status = regcache_raw_read (regcache, raw_regnum + 1,
382 gdb_assert_not_reached ("invalid pseudo register number");
386 /* Implement the "pseudo_register_write" gdbarch method. */
389 rl78_pseudo_register_write (struct gdbarch *gdbarch,
390 struct regcache *regcache,
391 int reg, const gdb_byte *buffer)
393 if (RL78_BANK0_RP0_REGNUM <= reg && reg <= RL78_BANK3_RP3_REGNUM)
395 int raw_regnum = 2 * (reg - RL78_BANK0_RP0_REGNUM)
396 + RL78_BANK0_R0_REGNUM;
398 regcache_raw_write (regcache, raw_regnum, buffer);
399 regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
401 else if (reg == RL78_SP_REGNUM)
403 regcache_raw_write (regcache, RL78_SPL_REGNUM, buffer);
404 regcache_raw_write (regcache, RL78_SPH_REGNUM, buffer + 1);
406 else if (RL78_X_REGNUM <= reg && reg <= RL78_H_REGNUM)
412 regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
413 bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
414 /* RSB0 is at bit 3; RSBS1 is at bit 5. */
415 raw_regnum = RL78_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
416 + (reg - RL78_X_REGNUM);
417 regcache_raw_write (regcache, raw_regnum, buffer);
419 else if (RL78_AX_REGNUM <= reg && reg <= RL78_HL_REGNUM)
422 int bank, raw_regnum;
424 regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
425 bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
426 /* RSB0 is at bit 3; RSBS1 is at bit 5. */
427 raw_regnum = RL78_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
428 + 2 * (reg - RL78_AX_REGNUM);
429 regcache_raw_write (regcache, raw_regnum, buffer);
430 regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
433 gdb_assert_not_reached ("invalid pseudo register number");
436 /* Implement the "breakpoint_from_pc" gdbarch method. */
439 rl78_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
442 /* The documented BRK instruction is actually a two byte sequence,
443 {0x61, 0xcc}, but instructions may be as short as one byte.
444 Correspondence with Renesas revealed that the one byte sequence
445 0xff is used when a one byte breakpoint instruction is required. */
446 static gdb_byte breakpoint[] = { 0xff };
448 *lenptr = sizeof breakpoint;
452 /* Define a "handle" struct for fetching the next opcode. */
454 struct rl78_get_opcode_byte_handle
459 /* Fetch a byte on behalf of the opcode decoder. HANDLE contains
460 the memory address of the next byte to fetch. If successful,
461 the address in the handle is updated and the byte fetched is
462 returned as the value of the function. If not successful, -1
466 rl78_get_opcode_byte (void *handle)
468 struct rl78_get_opcode_byte_handle *opcdata = handle;
472 status = target_read_memory (opcdata->pc, &byte, 1);
482 /* Function for finding saved registers in a 'struct pv_area'; this
483 function is passed to pv_area_scan.
485 If VALUE is a saved register, ADDR says it was saved at a constant
486 offset from the frame base, and SIZE indicates that the whole
487 register was saved, record its offset. */
490 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size,
493 struct rl78_prologue *result = (struct rl78_prologue *) result_untyped;
495 if (value.kind == pvk_register
497 && pv_is_register (addr, RL78_SP_REGNUM)
498 && size == register_size (target_gdbarch, value.reg))
499 result->reg_offset[value.reg] = addr.k;
502 /* Analyze a prologue starting at START_PC, going no further than
503 LIMIT_PC. Fill in RESULT as appropriate. */
506 rl78_analyze_prologue (CORE_ADDR start_pc,
507 CORE_ADDR limit_pc, struct rl78_prologue *result)
509 CORE_ADDR pc, next_pc;
511 pv_t reg[RL78_NUM_TOTAL_REGS];
512 struct pv_area *stack;
513 struct cleanup *back_to;
514 CORE_ADDR after_last_frame_setup_insn = start_pc;
517 memset (result, 0, sizeof (*result));
519 for (rn = 0; rn < RL78_NUM_TOTAL_REGS; rn++)
521 reg[rn] = pv_register (rn, 0);
522 result->reg_offset[rn] = 1;
525 stack = make_pv_area (RL78_SP_REGNUM, gdbarch_addr_bit (target_gdbarch));
526 back_to = make_cleanup_free_pv_area (stack);
528 /* The call instruction has saved the return address on the stack. */
529 reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -4);
530 pv_area_store (stack, reg[RL78_SP_REGNUM], 4, reg[RL78_PC_REGNUM]);
533 while (pc < limit_pc)
536 struct rl78_get_opcode_byte_handle opcode_handle;
537 RL78_Opcode_Decoded opc;
539 opcode_handle.pc = pc;
540 bytes_read = rl78_decode_opcode (pc, &opc, rl78_get_opcode_byte,
542 next_pc = pc + bytes_read;
544 if (opc.id == RLO_sel)
546 bank = opc.op[1].addend;
548 else if (opc.id == RLO_mov
549 && opc.op[0].type == RL78_Operand_PreDec
550 && opc.op[0].reg == RL78_Reg_SP
551 && opc.op[1].type == RL78_Operand_Register)
553 int rsrc = (bank * RL78_REGS_PER_BANK)
554 + 2 * (opc.op[1].reg - RL78_Reg_AX);
556 reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -1);
557 pv_area_store (stack, reg[RL78_SP_REGNUM], 1, reg[rsrc]);
558 reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -1);
559 pv_area_store (stack, reg[RL78_SP_REGNUM], 1, reg[rsrc + 1]);
560 after_last_frame_setup_insn = next_pc;
562 else if (opc.id == RLO_sub
563 && opc.op[0].type == RL78_Operand_Register
564 && opc.op[0].reg == RL78_Reg_SP
565 && opc.op[1].type == RL78_Operand_Immediate)
567 int addend = opc.op[1].addend;
569 reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM],
571 after_last_frame_setup_insn = next_pc;
575 /* Terminate the prologue scan. */
582 /* Is the frame size (offset, really) a known constant? */
583 if (pv_is_register (reg[RL78_SP_REGNUM], RL78_SP_REGNUM))
584 result->frame_size = reg[RL78_SP_REGNUM].k;
586 /* Record where all the registers were saved. */
587 pv_area_scan (stack, check_for_saved, (void *) result);
589 result->prologue_end = after_last_frame_setup_insn;
591 do_cleanups (back_to);
594 /* Implement the "addr_bits_remove" gdbarch method. */
597 rl78_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
599 return addr & 0xffffff;
602 /* Implement the "address_to_pointer" gdbarch method. */
605 rl78_address_to_pointer (struct gdbarch *gdbarch,
606 struct type *type, gdb_byte *buf, CORE_ADDR addr)
608 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
610 store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
614 /* Implement the "pointer_to_address" gdbarch method. */
617 rl78_pointer_to_address (struct gdbarch *gdbarch,
618 struct type *type, const gdb_byte *buf)
620 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
622 = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
624 /* Is it a code address? */
625 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
626 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
627 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))
628 || TYPE_LENGTH (type) == 4)
629 return rl78_make_instruction_address (addr);
631 return rl78_make_data_address (addr);
634 /* Implement the "skip_prologue" gdbarch method. */
637 rl78_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
640 CORE_ADDR func_addr, func_end;
641 struct rl78_prologue p;
643 /* Try to find the extent of the function that contains PC. */
644 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
647 rl78_analyze_prologue (pc, func_end, &p);
648 return p.prologue_end;
651 /* Implement the "unwind_pc" gdbarch method. */
654 rl78_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
656 return rl78_addr_bits_remove
657 (arch, frame_unwind_register_unsigned (next_frame,
661 /* Implement the "unwind_sp" gdbarch method. */
664 rl78_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
666 return frame_unwind_register_unsigned (next_frame, RL78_SP_REGNUM);
669 /* Given a frame described by THIS_FRAME, decode the prologue of its
670 associated function if there is not cache entry as specified by
671 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
672 return that struct as the value of this function. */
674 static struct rl78_prologue *
675 rl78_analyze_frame_prologue (struct frame_info *this_frame,
676 void **this_prologue_cache)
678 if (!*this_prologue_cache)
680 CORE_ADDR func_start, stop_addr;
682 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct rl78_prologue);
684 func_start = get_frame_func (this_frame);
685 stop_addr = get_frame_pc (this_frame);
687 /* If we couldn't find any function containing the PC, then
688 just initialize the prologue cache, but don't do anything. */
690 stop_addr = func_start;
692 rl78_analyze_prologue (func_start, stop_addr, *this_prologue_cache);
695 return *this_prologue_cache;
698 /* Given a frame and a prologue cache, return this frame's base. */
701 rl78_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
703 struct rl78_prologue *p
704 = rl78_analyze_frame_prologue (this_frame, this_prologue_cache);
705 CORE_ADDR sp = get_frame_register_unsigned (this_frame, RL78_SP_REGNUM);
707 return rl78_make_data_address (sp - p->frame_size);
710 /* Implement the "frame_this_id" method for unwinding frames. */
713 rl78_this_id (struct frame_info *this_frame,
714 void **this_prologue_cache, struct frame_id *this_id)
716 *this_id = frame_id_build (rl78_frame_base (this_frame,
717 this_prologue_cache),
718 get_frame_func (this_frame));
721 /* Implement the "frame_prev_register" method for unwinding frames. */
723 static struct value *
724 rl78_prev_register (struct frame_info *this_frame,
725 void **this_prologue_cache, int regnum)
727 struct rl78_prologue *p
728 = rl78_analyze_frame_prologue (this_frame, this_prologue_cache);
729 CORE_ADDR frame_base = rl78_frame_base (this_frame, this_prologue_cache);
731 if (regnum == RL78_SP_REGNUM)
732 return frame_unwind_got_constant (this_frame, regnum, frame_base);
734 else if (regnum == RL78_SPL_REGNUM)
735 return frame_unwind_got_constant (this_frame, regnum,
736 (frame_base & 0xff));
738 else if (regnum == RL78_SPH_REGNUM)
739 return frame_unwind_got_constant (this_frame, regnum,
740 ((frame_base >> 8) & 0xff));
742 /* If prologue analysis says we saved this register somewhere,
743 return a description of the stack slot holding it. */
744 else if (p->reg_offset[regnum] != 1)
747 frame_unwind_got_memory (this_frame, regnum,
748 frame_base + p->reg_offset[regnum]);
750 if (regnum == RL78_PC_REGNUM)
752 ULONGEST pc = rl78_make_instruction_address (value_as_long (rv));
754 return frame_unwind_got_constant (this_frame, regnum, pc);
759 /* Otherwise, presume we haven't changed the value of this
760 register, and get it from the next frame. */
762 return frame_unwind_got_register (this_frame, regnum, regnum);
765 static const struct frame_unwind rl78_unwind =
768 default_frame_unwind_stop_reason,
772 default_frame_sniffer
775 /* Implement the "dwarf_reg_to_regnum" gdbarch method. */
778 rl78_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
780 if (0 <= reg && reg <= 31)
783 /* Map even registers to their 16-bit counterparts. This
784 is usually what is required from the DWARF info. */
785 return (reg >> 1) + RL78_BANK0_RP0_REGNUM;
790 return RL78_SP_REGNUM;
792 return RL78_PC_REGNUM;
794 internal_error (__FILE__, __LINE__,
795 _("Undefined dwarf2 register mapping of reg %d"),
799 /* Implement the "return_value" gdbarch method. */
801 static enum return_value_convention
802 rl78_return_value (struct gdbarch *gdbarch,
803 struct type *func_type,
804 struct type *valtype,
805 struct regcache *regcache,
806 gdb_byte *readbuf, const gdb_byte *writebuf)
808 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
809 ULONGEST valtype_len = TYPE_LENGTH (valtype);
812 return RETURN_VALUE_STRUCT_CONVENTION;
817 int argreg = RL78_BANK1_R0_REGNUM;
820 while (valtype_len > 0)
822 regcache_cooked_read_unsigned (regcache, argreg, &u);
823 store_unsigned_integer (readbuf + offset, 1, byte_order, u);
833 int argreg = RL78_BANK1_R0_REGNUM;
836 while (valtype_len > 0)
838 u = extract_unsigned_integer (writebuf + offset, 1, byte_order);
839 regcache_cooked_write_unsigned (regcache, argreg, u);
846 return RETURN_VALUE_REGISTER_CONVENTION;
850 /* Implement the "frame_align" gdbarch method. */
853 rl78_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
855 return rl78_make_data_address (align_down (sp, 2));
859 /* Implement the "dummy_id" gdbarch method. */
861 static struct frame_id
862 rl78_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
865 frame_id_build (rl78_make_data_address
866 (get_frame_register_unsigned
867 (this_frame, RL78_SP_REGNUM)),
868 get_frame_pc (this_frame));
872 /* Implement the "push_dummy_call" gdbarch method. */
875 rl78_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
876 struct regcache *regcache, CORE_ADDR bp_addr,
877 int nargs, struct value **args, CORE_ADDR sp,
878 int struct_return, CORE_ADDR struct_addr)
880 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
884 /* Push arguments in reverse order. */
885 for (i = nargs - 1; i >= 0; i--)
887 struct type *value_type = value_enclosing_type (args[i]);
888 int len = TYPE_LENGTH (value_type);
889 int container_len = (len + 1) & ~1;
893 write_memory (rl78_make_data_address (sp),
894 value_contents_all (args[i]), len);
897 /* Store struct value address. */
900 store_unsigned_integer (buf, 2, byte_order, struct_addr);
902 write_memory (rl78_make_data_address (sp), buf, 2);
905 /* Store return address. */
907 store_unsigned_integer (buf, 4, byte_order, bp_addr);
908 write_memory (rl78_make_data_address (sp), buf, 4);
910 /* Finally, update the stack pointer... */
911 regcache_cooked_write_unsigned (regcache, RL78_SP_REGNUM, sp);
913 /* DWARF2/GCC uses the stack address *before* the function call as a
915 return rl78_make_data_address (sp + 4);
918 /* Allocate and initialize a gdbarch object. */
920 static struct gdbarch *
921 rl78_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
923 struct gdbarch *gdbarch;
924 struct gdbarch_tdep *tdep;
927 /* Extract the elf_flags if available. */
928 if (info.abfd != NULL
929 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
930 elf_flags = elf_elfheader (info.abfd)->e_flags;
935 /* Try to find the architecture in the list of already defined
937 for (arches = gdbarch_list_lookup_by_info (arches, &info);
939 arches = gdbarch_list_lookup_by_info (arches->next, &info))
941 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
944 return arches->gdbarch;
947 /* None found, create a new architecture from the information
949 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
950 gdbarch = gdbarch_alloc (&info, tdep);
951 tdep->elf_flags = elf_flags;
953 /* Initialize types. */
954 tdep->rl78_void = arch_type (gdbarch, TYPE_CODE_VOID, 1, "void");
955 tdep->rl78_uint8 = arch_integer_type (gdbarch, 8, 1, "uint8_t");
956 tdep->rl78_int8 = arch_integer_type (gdbarch, 8, 0, "int8_t");
957 tdep->rl78_uint16 = arch_integer_type (gdbarch, 16, 1, "uint16_t");
958 tdep->rl78_int16 = arch_integer_type (gdbarch, 16, 0, "int16_t");
959 tdep->rl78_uint32 = arch_integer_type (gdbarch, 32, 1, "uint32_t");
960 tdep->rl78_int32 = arch_integer_type (gdbarch, 32, 0, "int32_t");
962 tdep->rl78_data_pointer
963 = arch_type (gdbarch, TYPE_CODE_PTR, 16 / TARGET_CHAR_BIT,
964 xstrdup ("rl78_data_addr_t"));
965 TYPE_TARGET_TYPE (tdep->rl78_data_pointer) = tdep->rl78_void;
966 TYPE_UNSIGNED (tdep->rl78_data_pointer) = 1;
968 tdep->rl78_code_pointer
969 = arch_type (gdbarch, TYPE_CODE_PTR, 32 / TARGET_CHAR_BIT,
970 xstrdup ("rl78_code_addr_t"));
971 TYPE_TARGET_TYPE (tdep->rl78_code_pointer) = tdep->rl78_void;
972 TYPE_UNSIGNED (tdep->rl78_code_pointer) = 1;
975 set_gdbarch_num_regs (gdbarch, RL78_NUM_REGS);
976 set_gdbarch_num_pseudo_regs (gdbarch, RL78_NUM_PSEUDO_REGS);
977 set_gdbarch_register_name (gdbarch, rl78_register_name);
978 set_gdbarch_register_type (gdbarch, rl78_register_type);
979 set_gdbarch_pc_regnum (gdbarch, RL78_PC_REGNUM);
980 set_gdbarch_sp_regnum (gdbarch, RL78_SP_REGNUM);
981 set_gdbarch_pseudo_register_read (gdbarch, rl78_pseudo_register_read);
982 set_gdbarch_pseudo_register_write (gdbarch, rl78_pseudo_register_write);
983 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rl78_dwarf_reg_to_regnum);
986 set_gdbarch_char_signed (gdbarch, 0);
987 set_gdbarch_short_bit (gdbarch, 16);
988 set_gdbarch_int_bit (gdbarch, 16);
989 set_gdbarch_long_bit (gdbarch, 32);
990 set_gdbarch_long_long_bit (gdbarch, 64);
991 set_gdbarch_ptr_bit (gdbarch, 16);
992 set_gdbarch_addr_bit (gdbarch, 32);
993 set_gdbarch_float_bit (gdbarch, 32);
994 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
995 set_gdbarch_double_bit (gdbarch, 32);
996 set_gdbarch_long_double_bit (gdbarch, 64);
997 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
998 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
999 set_gdbarch_pointer_to_address (gdbarch, rl78_pointer_to_address);
1000 set_gdbarch_address_to_pointer (gdbarch, rl78_address_to_pointer);
1001 set_gdbarch_addr_bits_remove (gdbarch, rl78_addr_bits_remove);
1004 set_gdbarch_breakpoint_from_pc (gdbarch, rl78_breakpoint_from_pc);
1005 set_gdbarch_decr_pc_after_break (gdbarch, 1);
1008 set_gdbarch_print_insn (gdbarch, print_insn_rl78);
1010 /* Frames, prologues, etc. */
1011 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1012 set_gdbarch_skip_prologue (gdbarch, rl78_skip_prologue);
1013 set_gdbarch_unwind_pc (gdbarch, rl78_unwind_pc);
1014 set_gdbarch_unwind_sp (gdbarch, rl78_unwind_sp);
1015 set_gdbarch_frame_align (gdbarch, rl78_frame_align);
1016 frame_unwind_append_unwinder (gdbarch, &rl78_unwind);
1018 /* Dummy frames, return values. */
1019 set_gdbarch_dummy_id (gdbarch, rl78_dummy_id);
1020 set_gdbarch_push_dummy_call (gdbarch, rl78_push_dummy_call);
1021 set_gdbarch_return_value (gdbarch, rl78_return_value);
1023 /* Virtual tables. */
1024 set_gdbarch_vbit_in_delta (gdbarch, 1);
1029 /* Register the above initialization routine. */
1032 _initialize_rl78_tdep (void)
1034 register_gdbarch_init (bfd_arch_rl78, rl78_gdbarch_init);