1 /* MIPS-dependent portions of the RPC protocol
2 used with a VxWorks target
4 Contributed by Wind River Systems.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
26 #include "vx-share/regPacket.h"
34 #include "symfile.h" /* for struct complaint */
36 #include "gdb_string.h"
40 #include <sys/types.h>
42 #include <sys/socket.h>
44 #include <sys/time.h> /* UTek's <rpc/rpc.h> doesn't #incl this */
46 #include "vx-share/ptrace.h"
47 #include "vx-share/xdr_ptrace.h"
48 #include "vx-share/xdr_ld.h"
49 #include "vx-share/xdr_rdb.h"
50 #include "vx-share/dbgRpcLib.h"
52 /* get rid of value.h if possible */
56 /* Flag set if target has fpu */
58 extern int target_has_fp;
60 /* Generic register read/write routines in remote-vx.c. */
62 extern void net_read_registers ();
63 extern void net_write_registers ();
65 /* Read a register or registers from the VxWorks target.
66 REGNO is the register to read, or -1 for all; currently,
67 it is ignored. FIXME look at regno to improve efficiency. */
70 vx_read_register (int regno)
72 char mips_greg_packet[MIPS_GREG_PLEN];
73 char mips_fpreg_packet[MIPS_FPREG_PLEN];
75 /* Get general-purpose registers. */
77 net_read_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_GETREGS);
79 /* this code copies the registers obtained by RPC
80 stored in a structure(s) like this :
89 into a stucture like this:
95 0x8C BAD --- Not available currently
96 0x90 CAUSE --- Not available currently
100 0x11C FIR --- Not available currently
101 0x120 FP --- Not available currently
103 structure is 0x124 (292) bytes in length */
105 /* Copy the general registers. */
107 bcopy (&mips_greg_packet[MIPS_R_GP0], ®isters[0], 32 * MIPS_GREG_SIZE);
109 /* Copy SR, LO, HI, and PC. */
111 bcopy (&mips_greg_packet[MIPS_R_SR],
112 ®isters[REGISTER_BYTE (PS_REGNUM)], MIPS_GREG_SIZE);
113 bcopy (&mips_greg_packet[MIPS_R_LO],
114 ®isters[REGISTER_BYTE (LO_REGNUM)], MIPS_GREG_SIZE);
115 bcopy (&mips_greg_packet[MIPS_R_HI],
116 ®isters[REGISTER_BYTE (HI_REGNUM)], MIPS_GREG_SIZE);
117 bcopy (&mips_greg_packet[MIPS_R_PC],
118 ®isters[REGISTER_BYTE (PC_REGNUM)], MIPS_GREG_SIZE);
120 /* If the target has floating point registers, fetch them.
121 Otherwise, zero the floating point register values in
122 registers[] for good measure, even though we might not
127 net_read_registers (mips_fpreg_packet, MIPS_FPREG_PLEN,
130 /* Copy the floating point registers. */
132 bcopy (&mips_fpreg_packet[MIPS_R_FP0],
133 ®isters[REGISTER_BYTE (FP0_REGNUM)],
134 REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
136 /* Copy the floating point control/status register (fpcsr). */
138 bcopy (&mips_fpreg_packet[MIPS_R_FPCSR],
139 ®isters[REGISTER_BYTE (FCRCS_REGNUM)],
140 REGISTER_RAW_SIZE (FCRCS_REGNUM));
144 bzero ((char *) ®isters[REGISTER_BYTE (FP0_REGNUM)],
145 REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
146 bzero ((char *) ®isters[REGISTER_BYTE (FCRCS_REGNUM)],
147 REGISTER_RAW_SIZE (FCRCS_REGNUM));
150 /* Mark the register cache valid. */
152 registers_fetched ();
155 /* Store a register or registers into the VxWorks target.
156 REGNO is the register to store, or -1 for all; currently,
157 it is ignored. FIXME look at regno to improve efficiency. */
159 vx_write_register (int regno)
161 char mips_greg_packet[MIPS_GREG_PLEN];
162 char mips_fpreg_packet[MIPS_FPREG_PLEN];
164 /* Store general registers. */
166 bcopy (®isters[0], &mips_greg_packet[MIPS_R_GP0], 32 * MIPS_GREG_SIZE);
168 /* Copy SR, LO, HI, and PC. */
170 bcopy (®isters[REGISTER_BYTE (PS_REGNUM)],
171 &mips_greg_packet[MIPS_R_SR], MIPS_GREG_SIZE);
172 bcopy (®isters[REGISTER_BYTE (LO_REGNUM)],
173 &mips_greg_packet[MIPS_R_LO], MIPS_GREG_SIZE);
174 bcopy (®isters[REGISTER_BYTE (HI_REGNUM)],
175 &mips_greg_packet[MIPS_R_HI], MIPS_GREG_SIZE);
176 bcopy (®isters[REGISTER_BYTE (PC_REGNUM)],
177 &mips_greg_packet[MIPS_R_PC], MIPS_GREG_SIZE);
179 net_write_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_SETREGS);
181 /* Store floating point registers if the target has them. */
185 /* Copy the floating point data registers. */
187 bcopy (®isters[REGISTER_BYTE (FP0_REGNUM)],
188 &mips_fpreg_packet[MIPS_R_FP0],
189 REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
191 /* Copy the floating point control/status register (fpcsr). */
193 bcopy (®isters[REGISTER_BYTE (FCRCS_REGNUM)],
194 &mips_fpreg_packet[MIPS_R_FPCSR],
195 REGISTER_RAW_SIZE (FCRCS_REGNUM));
197 net_write_registers (mips_fpreg_packet, MIPS_FPREG_PLEN,