1 /* Target-dependent code for NetBSD/powerpc.
3 Copyright (C) 2002-2014 Free Software Foundation, Inc.
5 Contributed by Wasabi Systems, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
27 #include "trad-frame.h"
28 #include "tramp-frame.h"
33 #include "ppcnbsd-tdep.h"
34 #include "solib-svr4.h"
36 /* Register offsets from <machine/reg.h>. */
37 struct ppc_reg_offsets ppcnbsd_reg_offsets;
40 /* Core file support. */
42 /* NetBSD/powerpc register sets. */
44 const struct regset ppcnbsd_gregset =
50 const struct regset ppcnbsd_fpregset =
56 /* Return the appropriate register set for the core section identified
57 by SECT_NAME and SECT_SIZE. */
59 static const struct regset *
60 ppcnbsd_regset_from_core_section (struct gdbarch *gdbarch,
61 const char *sect_name, size_t sect_size)
63 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 148)
64 return &ppcnbsd_gregset;
66 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= 264)
67 return &ppcnbsd_fpregset;
73 /* NetBSD is confused. It appears that 1.5 was using the correct SVR4
74 convention but, 1.6 switched to the below broken convention. For
75 the moment use the broken convention. Ulgh! */
77 static enum return_value_convention
78 ppcnbsd_return_value (struct gdbarch *gdbarch, struct value *function,
79 struct type *valtype, struct regcache *regcache,
80 gdb_byte *readbuf, const gdb_byte *writebuf)
83 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
84 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
85 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
86 && TYPE_VECTOR (valtype))
87 && !(TYPE_LENGTH (valtype) == 1
88 || TYPE_LENGTH (valtype) == 2
89 || TYPE_LENGTH (valtype) == 4
90 || TYPE_LENGTH (valtype) == 8))
91 return RETURN_VALUE_STRUCT_CONVENTION;
94 return ppc_sysv_abi_broken_return_value (gdbarch, function, valtype,
95 regcache, readbuf, writebuf);
99 /* Signal trampolines. */
101 static const struct tramp_frame ppcnbsd2_sigtramp;
104 ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
105 struct frame_info *this_frame,
106 struct trad_frame_cache *this_cache,
109 struct gdbarch *gdbarch = get_frame_arch (this_frame);
110 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
111 CORE_ADDR addr, base;
114 base = get_frame_register_unsigned (this_frame,
115 gdbarch_sp_regnum (gdbarch));
116 if (self == &ppcnbsd2_sigtramp)
117 addr = base + 0x10 + 2 * tdep->wordsize;
119 addr = base + 0x18 + 2 * tdep->wordsize;
120 for (i = 0; i < ppc_num_gprs; i++, addr += tdep->wordsize)
122 int regnum = i + tdep->ppc_gp0_regnum;
123 trad_frame_set_reg_addr (this_cache, regnum, addr);
125 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, addr);
126 addr += tdep->wordsize;
127 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, addr);
128 addr += tdep->wordsize;
129 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, addr);
130 addr += tdep->wordsize;
131 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, addr);
132 addr += tdep->wordsize;
133 trad_frame_set_reg_addr (this_cache, gdbarch_pc_regnum (gdbarch),
135 addr += tdep->wordsize;
137 /* Construct the frame ID using the function start. */
138 trad_frame_set_id (this_cache, frame_id_build (base, func));
141 static const struct tramp_frame ppcnbsd_sigtramp =
146 { 0x3821fff0, -1 }, /* add r1,r1,-16 */
147 { 0x4e800021, -1 }, /* blrl */
148 { 0x38610018, -1 }, /* addi r3,r1,24 */
149 { 0x38000127, -1 }, /* li r0,295 */
150 { 0x44000002, -1 }, /* sc */
151 { 0x38000001, -1 }, /* li r0,1 */
152 { 0x44000002, -1 }, /* sc */
153 { TRAMP_SENTINEL_INSN, -1 }
155 ppcnbsd_sigtramp_cache_init
158 /* NetBSD 2.0 introduced a slightly different signal trampoline. */
160 static const struct tramp_frame ppcnbsd2_sigtramp =
165 { 0x3821fff0, -1 }, /* add r1,r1,-16 */
166 { 0x4e800021, -1 }, /* blrl */
167 { 0x38610010, -1 }, /* addi r3,r1,16 */
168 { 0x38000127, -1 }, /* li r0,295 */
169 { 0x44000002, -1 }, /* sc */
170 { 0x38000001, -1 }, /* li r0,1 */
171 { 0x44000002, -1 }, /* sc */
172 { TRAMP_SENTINEL_INSN, -1 }
174 ppcnbsd_sigtramp_cache_init
179 ppcnbsd_init_abi (struct gdbarch_info info,
180 struct gdbarch *gdbarch)
182 /* For NetBSD, this is an on again, off again thing. Some systems
183 do use the broken struct convention, and some don't. */
184 set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
186 /* NetBSD uses SVR4-style shared libraries. */
187 set_solib_svr4_fetch_link_map_offsets
188 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
190 set_gdbarch_regset_from_core_section
191 (gdbarch, ppcnbsd_regset_from_core_section);
193 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
194 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd2_sigtramp);
198 /* Provide a prototype to silence -Wmissing-prototypes. */
199 void _initialize_ppcnbsd_tdep (void);
202 _initialize_ppcnbsd_tdep (void)
204 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
207 /* Avoid initializing the register offsets again if they were
208 already initailized by ppcnbsd-nat.c. */
209 if (ppcnbsd_reg_offsets.pc_offset == 0)
211 /* General-purpose registers. */
212 ppcnbsd_reg_offsets.r0_offset = 0;
213 ppcnbsd_reg_offsets.gpr_size = 4;
214 ppcnbsd_reg_offsets.xr_size = 4;
215 ppcnbsd_reg_offsets.lr_offset = 128;
216 ppcnbsd_reg_offsets.cr_offset = 132;
217 ppcnbsd_reg_offsets.xer_offset = 136;
218 ppcnbsd_reg_offsets.ctr_offset = 140;
219 ppcnbsd_reg_offsets.pc_offset = 144;
220 ppcnbsd_reg_offsets.ps_offset = -1;
221 ppcnbsd_reg_offsets.mq_offset = -1;
223 /* Floating-point registers. */
224 ppcnbsd_reg_offsets.f0_offset = 0;
225 ppcnbsd_reg_offsets.fpscr_offset = 256;
226 ppcnbsd_reg_offsets.fpscr_size = 4;
228 /* AltiVec registers. */
229 ppcnbsd_reg_offsets.vr0_offset = 0;
230 ppcnbsd_reg_offsets.vrsave_offset = 512;
231 ppcnbsd_reg_offsets.vscr_offset = 524;