1 /* Target-dependent code for NetBSD/powerpc.
3 Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 Contributed by Wasabi Systems, Inc.
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
28 #include "trad-frame.h"
29 #include "tramp-frame.h"
31 #include "gdb_assert.h"
32 #include "gdb_string.h"
35 #include "ppcnbsd-tdep.h"
36 #include "solib-svr4.h"
38 /* Register offsets from <machine/reg.h>. */
39 struct ppc_reg_offsets ppcnbsd_reg_offsets;
42 /* Core file support. */
44 /* NetBSD/powerpc register sets. */
46 struct regset ppcnbsd_gregset =
52 struct regset ppcnbsd_fpregset =
58 /* Return the appropriate register set for the core section identified
59 by SECT_NAME and SECT_SIZE. */
61 static const struct regset *
62 ppcnbsd_regset_from_core_section (struct gdbarch *gdbarch,
63 const char *sect_name, size_t sect_size)
65 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 148)
66 return &ppcnbsd_gregset;
68 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= 264)
69 return &ppcnbsd_fpregset;
75 /* NetBSD is confused. It appears that 1.5 was using the correct SVR4
76 convention but, 1.6 switched to the below broken convention. For
77 the moment use the broken convention. Ulgh!. */
79 static enum return_value_convention
80 ppcnbsd_return_value (struct gdbarch *gdbarch, struct type *valtype,
81 struct regcache *regcache, gdb_byte *readbuf,
82 const gdb_byte *writebuf)
85 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
86 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
87 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
88 && TYPE_VECTOR (valtype))
89 && !(TYPE_LENGTH (valtype) == 1
90 || TYPE_LENGTH (valtype) == 2
91 || TYPE_LENGTH (valtype) == 4
92 || TYPE_LENGTH (valtype) == 8))
93 return RETURN_VALUE_STRUCT_CONVENTION;
96 return ppc_sysv_abi_broken_return_value (gdbarch, valtype, regcache,
101 /* Signal trampolines. */
103 static const struct tramp_frame ppcnbsd2_sigtramp;
106 ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
107 struct frame_info *next_frame,
108 struct trad_frame_cache *this_cache,
111 struct gdbarch *gdbarch = get_frame_arch (next_frame);
112 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
113 CORE_ADDR addr, base;
116 base = frame_unwind_register_unsigned (next_frame,
117 gdbarch_sp_regnum (gdbarch));
118 if (self == &ppcnbsd2_sigtramp)
119 addr = base + 0x10 + 2 * tdep->wordsize;
121 addr = base + 0x18 + 2 * tdep->wordsize;
122 for (i = 0; i < ppc_num_gprs; i++, addr += tdep->wordsize)
124 int regnum = i + tdep->ppc_gp0_regnum;
125 trad_frame_set_reg_addr (this_cache, regnum, addr);
127 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, addr);
128 addr += tdep->wordsize;
129 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, addr);
130 addr += tdep->wordsize;
131 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, addr);
132 addr += tdep->wordsize;
133 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, addr);
134 addr += tdep->wordsize;
135 trad_frame_set_reg_addr (this_cache, gdbarch_pc_regnum (gdbarch),
137 addr += tdep->wordsize;
139 /* Construct the frame ID using the function start. */
140 trad_frame_set_id (this_cache, frame_id_build (base, func));
143 static const struct tramp_frame ppcnbsd_sigtramp =
148 { 0x3821fff0, -1 }, /* add r1,r1,-16 */
149 { 0x4e800021, -1 }, /* blrl */
150 { 0x38610018, -1 }, /* addi r3,r1,24 */
151 { 0x38000127, -1 }, /* li r0,295 */
152 { 0x44000002, -1 }, /* sc */
153 { 0x38000001, -1 }, /* li r0,1 */
154 { 0x44000002, -1 }, /* sc */
155 { TRAMP_SENTINEL_INSN, -1 }
157 ppcnbsd_sigtramp_cache_init
160 /* NetBSD 2.0 introduced a slightly different signal trampoline. */
162 static const struct tramp_frame ppcnbsd2_sigtramp =
167 { 0x3821fff0, -1 }, /* add r1,r1,-16 */
168 { 0x4e800021, -1 }, /* blrl */
169 { 0x38610010, -1 }, /* addi r3,r1,16 */
170 { 0x38000127, -1 }, /* li r0,295 */
171 { 0x44000002, -1 }, /* sc */
172 { 0x38000001, -1 }, /* li r0,1 */
173 { 0x44000002, -1 }, /* sc */
174 { TRAMP_SENTINEL_INSN, -1 }
176 ppcnbsd_sigtramp_cache_init
181 ppcnbsd_init_abi (struct gdbarch_info info,
182 struct gdbarch *gdbarch)
184 /* For NetBSD, this is an on again, off again thing. Some systems
185 do use the broken struct convention, and some don't. */
186 set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
188 /* NetBSD uses SVR4-style shared libraries. */
189 set_solib_svr4_fetch_link_map_offsets
190 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
192 set_gdbarch_regset_from_core_section
193 (gdbarch, ppcnbsd_regset_from_core_section);
195 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
196 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd2_sigtramp);
200 /* Provide a prototype to silence -Wmissing-prototypes. */
201 void _initialize_ppcnbsd_tdep (void);
204 _initialize_ppcnbsd_tdep (void)
206 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
209 /* Avoid initializing the register offsets again if they were
210 already initailized by ppcnbsd-nat.c. */
211 if (ppcnbsd_reg_offsets.pc_offset == 0)
213 /* General-purpose registers. */
214 ppcnbsd_reg_offsets.r0_offset = 0;
215 ppcnbsd_reg_offsets.gpr_size = 4;
216 ppcnbsd_reg_offsets.xr_size = 4;
217 ppcnbsd_reg_offsets.lr_offset = 128;
218 ppcnbsd_reg_offsets.cr_offset = 132;
219 ppcnbsd_reg_offsets.xer_offset = 136;
220 ppcnbsd_reg_offsets.ctr_offset = 140;
221 ppcnbsd_reg_offsets.pc_offset = 144;
222 ppcnbsd_reg_offsets.ps_offset = -1;
223 ppcnbsd_reg_offsets.mq_offset = -1;
225 /* Floating-point registers. */
226 ppcnbsd_reg_offsets.f0_offset = 0;
227 ppcnbsd_reg_offsets.fpscr_offset = 256;
228 ppcnbsd_reg_offsets.fpscr_size = 4;
230 /* AltiVec registers. */
231 ppcnbsd_reg_offsets.vr0_offset = 0;
232 ppcnbsd_reg_offsets.vrsave_offset = 512;
233 ppcnbsd_reg_offsets.vscr_offset = 524;