1 /* Target-dependent code for PowerPC systems running NetBSD.
3 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
5 Contributed by Wasabi Systems, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
28 #include "breakpoint.h"
33 #include "ppcnbsd-tdep.h"
34 #include "nbsd-tdep.h"
35 #include "tramp-frame.h"
36 #include "trad-frame.h"
37 #include "gdb_assert.h"
38 #include "solib-svr4.h"
40 #define REG_FIXREG_OFFSET(x) ((x) * 4)
41 #define REG_LR_OFFSET (32 * 4)
42 #define REG_CR_OFFSET (33 * 4)
43 #define REG_XER_OFFSET (34 * 4)
44 #define REG_CTR_OFFSET (35 * 4)
45 #define REG_PC_OFFSET (36 * 4)
46 #define SIZEOF_STRUCT_REG (37 * 4)
48 #define FPREG_FPR_OFFSET(x) ((x) * 8)
49 #define FPREG_FPSCR_OFFSET (32 * 8)
50 #define SIZEOF_STRUCT_FPREG (33 * 8)
53 ppcnbsd_supply_reg (char *regs, int regno)
55 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
58 for (i = 0; i < ppc_num_gprs; i++)
60 if (regno == tdep->ppc_gp0_regnum + i || regno == -1)
61 regcache_raw_supply (current_regcache, tdep->ppc_gp0_regnum + i,
62 regs + REG_FIXREG_OFFSET (i));
65 if (regno == tdep->ppc_lr_regnum || regno == -1)
66 regcache_raw_supply (current_regcache, tdep->ppc_lr_regnum,
67 regs + REG_LR_OFFSET);
69 if (regno == tdep->ppc_cr_regnum || regno == -1)
70 regcache_raw_supply (current_regcache, tdep->ppc_cr_regnum,
71 regs + REG_CR_OFFSET);
73 if (regno == tdep->ppc_xer_regnum || regno == -1)
74 regcache_raw_supply (current_regcache, tdep->ppc_xer_regnum,
75 regs + REG_XER_OFFSET);
77 if (regno == tdep->ppc_ctr_regnum || regno == -1)
78 regcache_raw_supply (current_regcache, tdep->ppc_ctr_regnum,
79 regs + REG_CTR_OFFSET);
81 if (regno == PC_REGNUM || regno == -1)
82 regcache_raw_supply (current_regcache, PC_REGNUM,
83 regs + REG_PC_OFFSET);
87 ppcnbsd_fill_reg (char *regs, int regno)
89 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
92 for (i = 0; i < ppc_num_gprs; i++)
94 if (regno == tdep->ppc_gp0_regnum + i || regno == -1)
95 regcache_collect (tdep->ppc_gp0_regnum + i,
96 regs + REG_FIXREG_OFFSET (i));
99 if (regno == tdep->ppc_lr_regnum || regno == -1)
100 regcache_collect (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
102 if (regno == tdep->ppc_cr_regnum || regno == -1)
103 regcache_collect (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
105 if (regno == tdep->ppc_xer_regnum || regno == -1)
106 regcache_collect (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
108 if (regno == tdep->ppc_ctr_regnum || regno == -1)
109 regcache_collect (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
111 if (regno == PC_REGNUM || regno == -1)
112 regcache_collect (PC_REGNUM, regs + REG_PC_OFFSET);
116 ppcnbsd_supply_fpreg (char *fpregs, int regno)
118 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
121 /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
122 point registers. Traditionally, GDB's register set has still
123 listed the floating point registers for such machines, so this
124 code is harmless. However, the new E500 port actually omits the
125 floating point registers entirely from the register set --- they
126 don't even have register numbers assigned to them.
128 It's not clear to me how best to update this code, so this assert
129 will alert the first person to encounter the NetBSD/E500
130 combination to the problem. */
131 gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
133 for (i = 0; i < ppc_num_fprs; i++)
135 if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
136 regcache_raw_supply (current_regcache, tdep->ppc_fp0_regnum + i,
137 fpregs + FPREG_FPR_OFFSET (i));
140 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
141 regcache_raw_supply (current_regcache, tdep->ppc_fpscr_regnum,
142 fpregs + FPREG_FPSCR_OFFSET);
146 ppcnbsd_fill_fpreg (char *fpregs, int regno)
148 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
151 /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
152 point registers. Traditionally, GDB's register set has still
153 listed the floating point registers for such machines, so this
154 code is harmless. However, the new E500 port actually omits the
155 floating point registers entirely from the register set --- they
156 don't even have register numbers assigned to them.
158 It's not clear to me how best to update this code, so this assert
159 will alert the first person to encounter the NetBSD/E500
160 combination to the problem. */
161 gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
163 for (i = 0; i < ppc_num_fprs; i++)
165 if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
166 regcache_collect (tdep->ppc_fp0_regnum + i,
167 fpregs + FPREG_FPR_OFFSET (i));
170 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
171 regcache_collect (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
175 fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
180 /* We get everything from one section. */
184 regs = core_reg_sect;
185 fpregs = core_reg_sect + SIZEOF_STRUCT_REG;
187 /* Integer registers. */
188 ppcnbsd_supply_reg (regs, -1);
190 /* Floating point registers. */
191 ppcnbsd_supply_fpreg (fpregs, -1);
195 fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
200 case 0: /* Integer registers. */
201 if (core_reg_size != SIZEOF_STRUCT_REG)
202 warning ("Wrong size register set in core file.");
204 ppcnbsd_supply_reg (core_reg_sect, -1);
207 case 2: /* Floating point registers. */
208 if (core_reg_size != SIZEOF_STRUCT_FPREG)
209 warning ("Wrong size FP register set in core file.");
211 ppcnbsd_supply_fpreg (core_reg_sect, -1);
215 /* Don't know what kind of register request this is; just ignore it. */
220 static struct core_fns ppcnbsd_core_fns =
222 bfd_target_unknown_flavour, /* core_flavour */
223 default_check_format, /* check_format */
224 default_core_sniffer, /* core_sniffer */
225 fetch_core_registers, /* core_read_registers */
229 static struct core_fns ppcnbsd_elfcore_fns =
231 bfd_target_elf_flavour, /* core_flavour */
232 default_check_format, /* check_format */
233 default_core_sniffer, /* core_sniffer */
234 fetch_elfcore_registers, /* core_read_registers */
238 /* NetBSD is confused. It appears that 1.5 was using the correct SVr4
239 convention but, 1.6 switched to the below broken convention. For
240 the moment use the broken convention. Ulgh!. */
242 static enum return_value_convention
243 ppcnbsd_return_value (struct gdbarch *gdbarch, struct type *valtype,
244 struct regcache *regcache, void *readbuf,
245 const void *writebuf)
247 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
248 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
249 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
250 && TYPE_VECTOR (valtype))
251 && !(TYPE_LENGTH (valtype) == 1
252 || TYPE_LENGTH (valtype) == 2
253 || TYPE_LENGTH (valtype) == 4
254 || TYPE_LENGTH (valtype) == 8))
255 return RETURN_VALUE_STRUCT_CONVENTION;
257 return ppc_sysv_abi_broken_return_value (gdbarch, valtype, regcache,
262 ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
263 struct frame_info *next_frame,
264 struct trad_frame_cache *this_cache,
270 struct gdbarch *gdbarch = get_frame_arch (next_frame);
271 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
273 base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
274 offset = base + 0x18 + 2 * tdep->wordsize;
275 for (i = 0; i < ppc_num_gprs; i++)
277 int regnum = i + tdep->ppc_gp0_regnum;
278 trad_frame_set_reg_addr (this_cache, regnum, offset);
279 offset += tdep->wordsize;
281 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, offset);
282 offset += tdep->wordsize;
283 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, offset);
284 offset += tdep->wordsize;
285 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, offset);
286 offset += tdep->wordsize;
287 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, offset);
288 offset += tdep->wordsize;
289 trad_frame_set_reg_addr (this_cache, PC_REGNUM, offset); /* SRR0? */
290 offset += tdep->wordsize;
292 /* Construct the frame ID using the function start. */
293 trad_frame_set_id (this_cache, frame_id_build (base, func));
296 /* Given the NEXT frame, examine the instructions at and around this
297 frame's resume address (aka PC) to see of they look like a signal
298 trampoline. Return the address of the trampolines first
299 instruction, or zero if it isn't a signal trampoline. */
301 static const struct tramp_frame ppcnbsd_sigtramp = {
305 { 0x38610018, -1 }, /* addi r3,r1,24 */
306 { 0x38000127, -1 }, /* li r0,295 */
307 { 0x44000002, -1 }, /* sc */
308 { 0x38000001, -1 }, /* li r0,1 */
309 { 0x44000002, -1 }, /* sc */
310 { TRAMP_SENTINEL_INSN, -1 }
312 ppcnbsd_sigtramp_cache_init
316 ppcnbsd_init_abi (struct gdbarch_info info,
317 struct gdbarch *gdbarch)
319 /* For NetBSD, this is an on again, off again thing. Some systems
320 do use the broken struct convention, and some don't. */
321 set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
322 set_solib_svr4_fetch_link_map_offsets (gdbarch,
323 nbsd_ilp32_solib_svr4_fetch_link_map_offsets);
324 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
328 _initialize_ppcnbsd_tdep (void)
330 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
333 deprecated_add_core_fns (&ppcnbsd_core_fns);
334 deprecated_add_core_fns (&ppcnbsd_elfcore_fns);