1 /* Target-dependent code for NetBSD/powerpc.
3 Copyright (C) 2002-2013 Free Software Foundation, Inc.
5 Contributed by Wasabi Systems, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
27 #include "trad-frame.h"
28 #include "tramp-frame.h"
30 #include "gdb_assert.h"
34 #include "ppcnbsd-tdep.h"
35 #include "solib-svr4.h"
37 /* Register offsets from <machine/reg.h>. */
38 struct ppc_reg_offsets ppcnbsd_reg_offsets;
41 /* Core file support. */
43 /* NetBSD/powerpc register sets. */
45 struct regset ppcnbsd_gregset =
51 struct regset ppcnbsd_fpregset =
57 /* Return the appropriate register set for the core section identified
58 by SECT_NAME and SECT_SIZE. */
60 static const struct regset *
61 ppcnbsd_regset_from_core_section (struct gdbarch *gdbarch,
62 const char *sect_name, size_t sect_size)
64 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 148)
65 return &ppcnbsd_gregset;
67 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= 264)
68 return &ppcnbsd_fpregset;
74 /* NetBSD is confused. It appears that 1.5 was using the correct SVR4
75 convention but, 1.6 switched to the below broken convention. For
76 the moment use the broken convention. Ulgh! */
78 static enum return_value_convention
79 ppcnbsd_return_value (struct gdbarch *gdbarch, struct value *function,
80 struct type *valtype, struct regcache *regcache,
81 gdb_byte *readbuf, const gdb_byte *writebuf)
84 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
85 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
86 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
87 && TYPE_VECTOR (valtype))
88 && !(TYPE_LENGTH (valtype) == 1
89 || TYPE_LENGTH (valtype) == 2
90 || TYPE_LENGTH (valtype) == 4
91 || TYPE_LENGTH (valtype) == 8))
92 return RETURN_VALUE_STRUCT_CONVENTION;
95 return ppc_sysv_abi_broken_return_value (gdbarch, function, valtype,
96 regcache, readbuf, writebuf);
100 /* Signal trampolines. */
102 static const struct tramp_frame ppcnbsd2_sigtramp;
105 ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
106 struct frame_info *this_frame,
107 struct trad_frame_cache *this_cache,
110 struct gdbarch *gdbarch = get_frame_arch (this_frame);
111 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
112 CORE_ADDR addr, base;
115 base = get_frame_register_unsigned (this_frame,
116 gdbarch_sp_regnum (gdbarch));
117 if (self == &ppcnbsd2_sigtramp)
118 addr = base + 0x10 + 2 * tdep->wordsize;
120 addr = base + 0x18 + 2 * tdep->wordsize;
121 for (i = 0; i < ppc_num_gprs; i++, addr += tdep->wordsize)
123 int regnum = i + tdep->ppc_gp0_regnum;
124 trad_frame_set_reg_addr (this_cache, regnum, addr);
126 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, addr);
127 addr += tdep->wordsize;
128 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, addr);
129 addr += tdep->wordsize;
130 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, addr);
131 addr += tdep->wordsize;
132 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, addr);
133 addr += tdep->wordsize;
134 trad_frame_set_reg_addr (this_cache, gdbarch_pc_regnum (gdbarch),
136 addr += tdep->wordsize;
138 /* Construct the frame ID using the function start. */
139 trad_frame_set_id (this_cache, frame_id_build (base, func));
142 static const struct tramp_frame ppcnbsd_sigtramp =
147 { 0x3821fff0, -1 }, /* add r1,r1,-16 */
148 { 0x4e800021, -1 }, /* blrl */
149 { 0x38610018, -1 }, /* addi r3,r1,24 */
150 { 0x38000127, -1 }, /* li r0,295 */
151 { 0x44000002, -1 }, /* sc */
152 { 0x38000001, -1 }, /* li r0,1 */
153 { 0x44000002, -1 }, /* sc */
154 { TRAMP_SENTINEL_INSN, -1 }
156 ppcnbsd_sigtramp_cache_init
159 /* NetBSD 2.0 introduced a slightly different signal trampoline. */
161 static const struct tramp_frame ppcnbsd2_sigtramp =
166 { 0x3821fff0, -1 }, /* add r1,r1,-16 */
167 { 0x4e800021, -1 }, /* blrl */
168 { 0x38610010, -1 }, /* addi r3,r1,16 */
169 { 0x38000127, -1 }, /* li r0,295 */
170 { 0x44000002, -1 }, /* sc */
171 { 0x38000001, -1 }, /* li r0,1 */
172 { 0x44000002, -1 }, /* sc */
173 { TRAMP_SENTINEL_INSN, -1 }
175 ppcnbsd_sigtramp_cache_init
180 ppcnbsd_init_abi (struct gdbarch_info info,
181 struct gdbarch *gdbarch)
183 /* For NetBSD, this is an on again, off again thing. Some systems
184 do use the broken struct convention, and some don't. */
185 set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
187 /* NetBSD uses SVR4-style shared libraries. */
188 set_solib_svr4_fetch_link_map_offsets
189 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
191 set_gdbarch_regset_from_core_section
192 (gdbarch, ppcnbsd_regset_from_core_section);
194 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
195 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd2_sigtramp);
199 /* Provide a prototype to silence -Wmissing-prototypes. */
200 void _initialize_ppcnbsd_tdep (void);
203 _initialize_ppcnbsd_tdep (void)
205 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
208 /* Avoid initializing the register offsets again if they were
209 already initailized by ppcnbsd-nat.c. */
210 if (ppcnbsd_reg_offsets.pc_offset == 0)
212 /* General-purpose registers. */
213 ppcnbsd_reg_offsets.r0_offset = 0;
214 ppcnbsd_reg_offsets.gpr_size = 4;
215 ppcnbsd_reg_offsets.xr_size = 4;
216 ppcnbsd_reg_offsets.lr_offset = 128;
217 ppcnbsd_reg_offsets.cr_offset = 132;
218 ppcnbsd_reg_offsets.xer_offset = 136;
219 ppcnbsd_reg_offsets.ctr_offset = 140;
220 ppcnbsd_reg_offsets.pc_offset = 144;
221 ppcnbsd_reg_offsets.ps_offset = -1;
222 ppcnbsd_reg_offsets.mq_offset = -1;
224 /* Floating-point registers. */
225 ppcnbsd_reg_offsets.f0_offset = 0;
226 ppcnbsd_reg_offsets.fpscr_offset = 256;
227 ppcnbsd_reg_offsets.fpscr_size = 4;
229 /* AltiVec registers. */
230 ppcnbsd_reg_offsets.vr0_offset = 0;
231 ppcnbsd_reg_offsets.vrsave_offset = 512;
232 ppcnbsd_reg_offsets.vscr_offset = 524;