1 /* PPC GNU/Linux native support.
3 Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002,
4 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "gdb_string.h"
30 #include <sys/types.h>
31 #include <sys/param.h>
34 #include <sys/ioctl.h>
37 #include <sys/procfs.h>
38 #include <sys/ptrace.h>
40 /* Prototypes for supply_gregset etc. */
45 #define PT_READ_U PTRACE_PEEKUSR
48 #define PT_WRITE_U PTRACE_POKEUSR
51 /* Default the type of the ptrace transfer to int. */
52 #ifndef PTRACE_XFER_TYPE
53 #define PTRACE_XFER_TYPE int
56 /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
57 configure time check. Some older glibc's (for instance 2.2.1)
58 don't have a specific powerpc version of ptrace.h, and fall back on
59 a generic one. In such cases, sys/ptrace.h defines
60 PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
61 ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
62 PTRACE_SETVRREGS to be. This also makes a configury check pretty
65 /* These definitions should really come from the glibc header files,
66 but Glibc doesn't know about the vrregs yet. */
67 #ifndef PTRACE_GETVRREGS
68 #define PTRACE_GETVRREGS 18
69 #define PTRACE_SETVRREGS 19
72 /* This oddity is because the Linux kernel defines elf_vrregset_t as
73 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
74 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
75 the vrsave as an extra 4 bytes at the end. I opted for creating a
76 flat array of chars, so that it is easier to manipulate for gdb.
78 There are 32 vector registers 16 bytes longs, plus a VSCR register
79 which is only 4 bytes long, but is fetched as a 16 bytes
80 quantity. Up to here we have the elf_vrregset_t structure.
81 Appended to this there is space for the VRSAVE register: 4 bytes.
82 Even though this vrsave register is not included in the regset
83 typedef, it is handled by the ptrace requests.
85 Note that GNU/Linux doesn't support little endian PPC hardware,
86 therefore the offset at which the real value of the VSCR register
87 is located will be always 12 bytes.
89 The layout is like this (where x is the actual value of the vscr reg): */
93 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
94 <-------> <-------><-------><->
99 #define SIZEOF_VRREGS 33*16+4
101 typedef char gdb_vrregset_t[SIZEOF_VRREGS];
103 /* For runtime check of ptrace support for VRREGS. */
104 int have_ptrace_getvrregs = 1;
109 return (sizeof (struct user));
113 /* registers layout, as presented by the ptrace interface:
114 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
115 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
116 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
117 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
118 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
119 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
120 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
121 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
122 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
126 ppc_register_u_addr (int regno)
129 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
130 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
131 interface, and not the wordsize of the program's ABI. */
132 int wordsize = sizeof (PTRACE_XFER_TYPE);
134 /* General purpose registers occupy 1 slot each in the buffer */
135 if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum )
136 u_addr = ((PT_R0 + regno) * wordsize);
138 /* Floating point regs: eight bytes each in both 32- and 64-bit
139 ptrace interfaces. Thus, two slots each in 32-bit interface, one
140 slot each in 64-bit interface. */
141 if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
142 u_addr = (PT_FPR0 * wordsize) + ((regno - FP0_REGNUM) * 8);
144 /* UISA special purpose registers: 1 slot each */
145 if (regno == PC_REGNUM)
146 u_addr = PT_NIP * wordsize;
147 if (regno == tdep->ppc_lr_regnum)
148 u_addr = PT_LNK * wordsize;
149 if (regno == tdep->ppc_cr_regnum)
150 u_addr = PT_CCR * wordsize;
151 if (regno == tdep->ppc_xer_regnum)
152 u_addr = PT_XER * wordsize;
153 if (regno == tdep->ppc_ctr_regnum)
154 u_addr = PT_CTR * wordsize;
156 if (regno == tdep->ppc_mq_regnum)
157 u_addr = PT_MQ * wordsize;
159 if (regno == tdep->ppc_ps_regnum)
160 u_addr = PT_MSR * wordsize;
161 if (regno == tdep->ppc_fpscr_regnum)
162 u_addr = PT_FPSCR * wordsize;
168 ppc_ptrace_cannot_fetch_store_register (int regno)
170 return (ppc_register_u_addr (regno) == -1);
173 /* The Linux kernel ptrace interface for AltiVec registers uses the
174 registers set mechanism, as opposed to the interface for all the
175 other registers, that stores/fetches each register individually. */
177 fetch_altivec_register (int tid, int regno)
182 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
183 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
185 ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
190 have_ptrace_getvrregs = 0;
193 perror_with_name ("Unable to fetch AltiVec register");
196 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
197 long on the hardware. We deal only with the lower 4 bytes of the
198 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
199 there is no need to define an offset for it. */
200 if (regno == (tdep->ppc_vrsave_regnum - 1))
201 offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
203 supply_register (regno,
204 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
208 fetch_register (int tid, int regno)
210 /* This isn't really an address. But ptrace thinks of it as one. */
211 char mess[128]; /* For messages */
213 unsigned int offset; /* Offset of registers within the u area. */
214 char buf[MAX_REGISTER_SIZE];
215 CORE_ADDR regaddr = ppc_register_u_addr (regno);
217 if (altivec_register_p (regno))
219 /* If this is the first time through, or if it is not the first
220 time through, and we have comfirmed that there is kernel
221 support for such a ptrace request, then go and fetch the
223 if (have_ptrace_getvrregs)
225 fetch_altivec_register (tid, regno);
228 /* If we have discovered that there is no ptrace support for
229 AltiVec registers, fall through and return zeroes, because
230 regaddr will be -1 in this case. */
235 memset (buf, '\0', DEPRECATED_REGISTER_RAW_SIZE (regno)); /* Supply zeroes */
236 supply_register (regno, buf);
240 /* Read the raw register using PTRACE_XFER_TYPE sized chunks. On a
241 32-bit platform, 64-bit floating-point registers will require two
243 for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
246 *(PTRACE_XFER_TYPE *) & buf[i] = ptrace (PT_READ_U, tid,
247 (PTRACE_ARG3_TYPE) regaddr, 0);
248 regaddr += sizeof (PTRACE_XFER_TYPE);
251 sprintf (mess, "reading register %s (#%d)",
252 REGISTER_NAME (regno), regno);
253 perror_with_name (mess);
257 /* Now supply the register. Be careful to map between ptrace's and
258 the current_regcache's idea of the current wordsize. */
259 if ((regno >= FP0_REGNUM && regno < FP0_REGNUM +32)
260 || gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
261 /* FPs are always 64 bits. Little endian values are always found
262 at the left-hand end of the register. */
263 regcache_raw_supply (current_regcache, regno, buf);
265 /* Big endian register, need to fetch the right-hand end. */
266 regcache_raw_supply (current_regcache, regno,
267 (buf + sizeof (PTRACE_XFER_TYPE)
268 - register_size (current_gdbarch, regno)));
272 supply_vrregset (gdb_vrregset_t *vrregsetp)
275 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
276 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
277 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
278 int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
280 for (i = 0; i < num_of_vrregs; i++)
282 /* The last 2 registers of this set are only 32 bit long, not
283 128. However an offset is necessary only for VSCR because it
284 occupies a whole vector, while VRSAVE occupies a full 4 bytes
286 if (i == (num_of_vrregs - 2))
287 supply_register (tdep->ppc_vr0_regnum + i,
288 *vrregsetp + i * vrregsize + offset);
290 supply_register (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
295 fetch_altivec_registers (int tid)
300 ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
305 have_ptrace_getvrregs = 0;
308 perror_with_name ("Unable to fetch AltiVec registers");
310 supply_vrregset (®s);
314 fetch_ppc_registers (int tid)
317 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
319 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
320 fetch_register (tid, i);
321 if (tdep->ppc_mq_regnum != -1)
322 fetch_register (tid, tdep->ppc_mq_regnum);
323 if (have_ptrace_getvrregs)
324 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
325 fetch_altivec_registers (tid);
328 /* Fetch registers from the child process. Fetch all registers if
329 regno == -1, otherwise fetch all general registers or all floating
330 point registers depending upon the value of regno. */
332 fetch_inferior_registers (int regno)
334 /* Overload thread id onto process id */
335 int tid = TIDGET (inferior_ptid);
337 /* No thread id, just use process id */
339 tid = PIDGET (inferior_ptid);
342 fetch_ppc_registers (tid);
344 fetch_register (tid, regno);
347 /* Store one register. */
349 store_altivec_register (int tid, int regno)
354 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
355 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
357 ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
362 have_ptrace_getvrregs = 0;
365 perror_with_name ("Unable to fetch AltiVec register");
368 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
369 long on the hardware. */
370 if (regno == (tdep->ppc_vrsave_regnum - 1))
371 offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
373 regcache_collect (regno,
374 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
376 ret = ptrace (PTRACE_SETVRREGS, tid, 0, ®s);
378 perror_with_name ("Unable to store AltiVec register");
382 store_register (int tid, int regno)
384 /* This isn't really an address. But ptrace thinks of it as one. */
385 CORE_ADDR regaddr = ppc_register_u_addr (regno);
386 char mess[128]; /* For messages */
388 unsigned int offset; /* Offset of registers within the u area. */
389 char buf[MAX_REGISTER_SIZE];
391 if (altivec_register_p (regno))
393 store_altivec_register (tid, regno);
400 /* First collect the register value from the regcache. Be careful
401 to to convert the regcache's wordsize into ptrace's wordsize. */
402 memset (buf, 0, sizeof buf);
403 if ((regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
404 || TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
405 /* Floats are always 64-bit. Little endian registers are always
406 at the left-hand end of the register cache. */
407 regcache_raw_collect (current_regcache, regno, buf);
409 /* Big-endian registers belong at the right-hand end of the
411 regcache_raw_collect (current_regcache, regno,
412 (buf + sizeof (PTRACE_XFER_TYPE)
413 - register_size (current_gdbarch, regno)));
415 for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
418 ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr,
419 *(PTRACE_XFER_TYPE *) & buf[i]);
420 regaddr += sizeof (PTRACE_XFER_TYPE);
423 && regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum)
425 /* Some older kernel versions don't allow fpscr to be written. */
431 sprintf (mess, "writing register %s (#%d)",
432 REGISTER_NAME (regno), regno);
433 perror_with_name (mess);
439 fill_vrregset (gdb_vrregset_t *vrregsetp)
442 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
443 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
444 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
445 int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
447 for (i = 0; i < num_of_vrregs; i++)
449 /* The last 2 registers of this set are only 32 bit long, not
450 128, but only VSCR is fetched as a 16 bytes quantity. */
451 if (i == (num_of_vrregs - 2))
452 regcache_collect (tdep->ppc_vr0_regnum + i,
453 *vrregsetp + i * vrregsize + offset);
455 regcache_collect (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
460 store_altivec_registers (int tid)
465 ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
470 have_ptrace_getvrregs = 0;
473 perror_with_name ("Couldn't get AltiVec registers");
476 fill_vrregset (®s);
478 if (ptrace (PTRACE_SETVRREGS, tid, 0, ®s) < 0)
479 perror_with_name ("Couldn't write AltiVec registers");
483 store_ppc_registers (int tid)
486 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
488 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
489 store_register (tid, i);
490 if (tdep->ppc_mq_regnum != -1)
491 store_register (tid, tdep->ppc_mq_regnum);
492 if (have_ptrace_getvrregs)
493 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
494 store_altivec_registers (tid);
498 store_inferior_registers (int regno)
500 /* Overload thread id onto process id */
501 int tid = TIDGET (inferior_ptid);
503 /* No thread id, just use process id */
505 tid = PIDGET (inferior_ptid);
508 store_register (tid, regno);
510 store_ppc_registers (tid);
514 supply_gregset (gdb_gregset_t *gregsetp)
516 ppc_linux_supply_gregset ((char *) gregsetp);
520 fill_gregset (gdb_gregset_t *gregsetp, int regno)
523 elf_greg_t *regp = (elf_greg_t *) gregsetp;
524 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
526 for (regi = 0; regi < 32; regi++)
528 if ((regno == -1) || regno == regi)
529 regcache_collect (regi, regp + PT_R0 + regi);
532 if ((regno == -1) || regno == PC_REGNUM)
533 regcache_collect (PC_REGNUM, regp + PT_NIP);
534 if ((regno == -1) || regno == tdep->ppc_lr_regnum)
535 regcache_collect (tdep->ppc_lr_regnum, regp + PT_LNK);
536 if ((regno == -1) || regno == tdep->ppc_cr_regnum)
537 regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR);
538 if ((regno == -1) || regno == tdep->ppc_xer_regnum)
539 regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER);
540 if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
541 regcache_collect (tdep->ppc_ctr_regnum, regp + PT_CTR);
543 if (((regno == -1) || regno == tdep->ppc_mq_regnum)
544 && (tdep->ppc_mq_regnum != -1))
545 regcache_collect (tdep->ppc_mq_regnum, regp + PT_MQ);
547 if ((regno == -1) || regno == tdep->ppc_ps_regnum)
548 regcache_collect (tdep->ppc_ps_regnum, regp + PT_MSR);
552 supply_fpregset (gdb_fpregset_t * fpregsetp)
554 ppc_linux_supply_fpregset ((char *) fpregsetp);
557 /* Given a pointer to a floating point register set in /proc format
558 (fpregset_t *), update the register specified by REGNO from gdb's
559 idea of the current floating point register set. If REGNO is -1,
562 fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
565 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
567 for (regi = 0; regi < 32; regi++)
569 if ((regno == -1) || (regno == FP0_REGNUM + regi))
570 regcache_collect (FP0_REGNUM + regi, (char *) (*fpregsetp + regi));
572 if ((regno == -1) || regno == tdep->ppc_fpscr_regnum)
573 regcache_collect (tdep->ppc_fpscr_regnum, (char *) (*fpregsetp + regi));