1 /* Target-machine dependent code for Nios II, for GDB.
2 Copyright (C) 2012-2014 Free Software Foundation, Inc.
3 Contributed by Peter Brookes (pbrookes@altera.com)
4 and Andrew Draper (adraper@altera.com).
5 Contributed by Mentor Graphics, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "frame-unwind.h"
25 #include "frame-base.h"
26 #include "trad-frame.h"
27 #include "dwarf2-frame.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
43 #include "target-descriptions.h"
45 /* To get entry_point_address. */
48 /* Nios II ISA specific encodings and macros. */
49 #include "opcode/nios2.h"
51 /* Nios II specific header. */
52 #include "nios2-tdep.h"
54 #include "features/nios2.c"
56 /* Control debugging information emitted in this file. */
58 static int nios2_debug = 0;
60 /* The following structures are used in the cache for prologue
61 analysis; see the reg_value and reg_saved tables in
62 struct nios2_unwind_cache, respectively. */
64 /* struct reg_value is used to record that a register has the same value
65 as reg at the given offset from the start of a function. */
73 /* struct reg_saved is used to record that a register value has been saved at
74 basereg + addr, for basereg >= 0. If basereg < 0, that indicates
75 that the register is not known to have been saved. Note that when
76 basereg == NIOS2_Z_REGNUM (that is, r0, which holds value 0),
77 addr is an absolute address. */
85 struct nios2_unwind_cache
87 /* The frame's base, optionally used by the high-level debug info. */
90 /* The previous frame's inner most stack address. Used as this
91 frame ID's stack_addr. */
94 /* The address of the first instruction in this function. */
97 /* Which register holds the return address for the frame. */
100 /* Table indicating what changes have been made to each register. */
101 struct reg_value reg_value[NIOS2_NUM_REGS];
103 /* Table indicating where each register has been saved. */
104 struct reg_saved reg_saved[NIOS2_NUM_REGS];
108 /* This array is a mapping from Dwarf-2 register numbering to GDB's. */
110 static int nios2_dwarf2gdb_regno_map[] =
119 NIOS2_GP_REGNUM, /* 26 */
120 NIOS2_SP_REGNUM, /* 27 */
121 NIOS2_FP_REGNUM, /* 28 */
122 NIOS2_EA_REGNUM, /* 29 */
123 NIOS2_BA_REGNUM, /* 30 */
124 NIOS2_RA_REGNUM, /* 31 */
125 NIOS2_PC_REGNUM, /* 32 */
126 NIOS2_STATUS_REGNUM, /* 33 */
127 NIOS2_ESTATUS_REGNUM, /* 34 */
128 NIOS2_BSTATUS_REGNUM, /* 35 */
129 NIOS2_IENABLE_REGNUM, /* 36 */
130 NIOS2_IPENDING_REGNUM, /* 37 */
131 NIOS2_CPUID_REGNUM, /* 38 */
132 39, /* CTL6 */ /* 39 */
133 NIOS2_EXCEPTION_REGNUM, /* 40 */
134 NIOS2_PTEADDR_REGNUM, /* 41 */
135 NIOS2_TLBACC_REGNUM, /* 42 */
136 NIOS2_TLBMISC_REGNUM, /* 43 */
137 NIOS2_ECCINJ_REGNUM, /* 44 */
138 NIOS2_BADADDR_REGNUM, /* 45 */
139 NIOS2_CONFIG_REGNUM, /* 46 */
140 NIOS2_MPUBASE_REGNUM, /* 47 */
141 NIOS2_MPUACC_REGNUM /* 48 */
145 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
148 nios2_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
150 if (dw_reg < 0 || dw_reg > NIOS2_NUM_REGS)
152 warning (_("Dwarf-2 uses unmapped register #%d"), dw_reg);
156 return nios2_dwarf2gdb_regno_map[dw_reg];
159 /* Canonical names for the 49 registers. */
161 static const char *const nios2_reg_names[NIOS2_NUM_REGS] =
163 "zero", "at", "r2", "r3", "r4", "r5", "r6", "r7",
164 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
165 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
166 "et", "bt", "gp", "sp", "fp", "ea", "sstatus", "ra",
168 "status", "estatus", "bstatus", "ienable",
169 "ipending", "cpuid", "ctl6", "exception",
170 "pteaddr", "tlbacc", "tlbmisc", "eccinj",
171 "badaddr", "config", "mpubase", "mpuacc"
174 /* Implement the register_name gdbarch method. */
177 nios2_register_name (struct gdbarch *gdbarch, int regno)
179 /* Use mnemonic aliases for GPRs. */
180 if (regno >= 0 && regno < NIOS2_NUM_REGS)
181 return nios2_reg_names[regno];
183 return tdesc_register_name (gdbarch, regno);
186 /* Implement the register_type gdbarch method. */
189 nios2_register_type (struct gdbarch *gdbarch, int regno)
191 /* If the XML description has register information, use that to
192 determine the register type. */
193 if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
194 return tdesc_register_type (gdbarch, regno);
196 if (regno == NIOS2_PC_REGNUM)
197 return builtin_type (gdbarch)->builtin_func_ptr;
198 else if (regno == NIOS2_SP_REGNUM)
199 return builtin_type (gdbarch)->builtin_data_ptr;
201 return builtin_type (gdbarch)->builtin_uint32;
204 /* Given a return value in REGCACHE with a type VALTYPE,
205 extract and copy its value into VALBUF. */
208 nios2_extract_return_value (struct gdbarch *gdbarch, struct type *valtype,
209 struct regcache *regcache, gdb_byte *valbuf)
211 int len = TYPE_LENGTH (valtype);
213 /* Return values of up to 8 bytes are returned in $r2 $r3. */
214 if (len <= register_size (gdbarch, NIOS2_R2_REGNUM))
215 regcache_cooked_read (regcache, NIOS2_R2_REGNUM, valbuf);
218 gdb_assert (len <= (register_size (gdbarch, NIOS2_R2_REGNUM)
219 + register_size (gdbarch, NIOS2_R3_REGNUM)));
220 regcache_cooked_read (regcache, NIOS2_R2_REGNUM, valbuf);
221 regcache_cooked_read (regcache, NIOS2_R3_REGNUM, valbuf + 4);
225 /* Write into appropriate registers a function return value
226 of type TYPE, given in virtual format. */
229 nios2_store_return_value (struct gdbarch *gdbarch, struct type *valtype,
230 struct regcache *regcache, const gdb_byte *valbuf)
232 int len = TYPE_LENGTH (valtype);
234 /* Return values of up to 8 bytes are returned in $r2 $r3. */
235 if (len <= register_size (gdbarch, NIOS2_R2_REGNUM))
236 regcache_cooked_write (regcache, NIOS2_R2_REGNUM, valbuf);
239 gdb_assert (len <= (register_size (gdbarch, NIOS2_R2_REGNUM)
240 + register_size (gdbarch, NIOS2_R3_REGNUM)));
241 regcache_cooked_write (regcache, NIOS2_R2_REGNUM, valbuf);
242 regcache_cooked_write (regcache, NIOS2_R3_REGNUM, valbuf + 4);
247 /* Set up the default values of the registers. */
250 nios2_setup_default (struct nios2_unwind_cache *cache)
254 for (i = 0; i < NIOS2_NUM_REGS; i++)
256 /* All registers start off holding their previous values. */
257 cache->reg_value[i].reg = i;
258 cache->reg_value[i].offset = 0;
260 /* All registers start off not saved. */
261 cache->reg_saved[i].basereg = -1;
262 cache->reg_saved[i].addr = 0;
266 /* Initialize the unwind cache. */
269 nios2_init_cache (struct nios2_unwind_cache *cache, CORE_ADDR pc)
274 cache->return_regnum = NIOS2_RA_REGNUM;
275 nios2_setup_default (cache);
278 /* Helper function to identify when we're in a function epilogue;
279 that is, the part of the function from the point at which the
280 stack adjustment is made, to the return or sibcall. On Nios II,
281 we want to check that the CURRENT_PC is a return-type instruction
282 and that the previous instruction is a stack adjustment.
283 START_PC is the beginning of the function in question. */
286 nios2_in_epilogue_p (struct gdbarch *gdbarch,
287 CORE_ADDR current_pc,
290 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
292 /* There has to be a previous instruction in the function. */
293 if (current_pc > start_pc)
296 /* Check whether the previous instruction was a stack
299 = read_memory_unsigned_integer (current_pc - NIOS2_OPCODE_SIZE,
300 NIOS2_OPCODE_SIZE, byte_order);
302 if ((insn & 0xffc0003c) == 0xdec00004 /* ADDI sp, sp, */
303 || (insn & 0xffc1ffff) == 0xdec1883a /* ADD sp, sp, */
304 || (insn & 0xffc0003f) == 0xdec00017) /* LDW sp, constant(sp) */
306 /* Then check if it's followed by a return or a tail
308 insn = read_memory_unsigned_integer (current_pc, NIOS2_OPCODE_SIZE,
311 if (insn == 0xf800283a /* RET */
312 || insn == 0xe800083a /* ERET */
313 || (insn & 0x07ffffff) == 0x0000683a /* JMP */
314 || (insn & 0xffc0003f) == 6) /* BR */
321 /* Implement the in_function_epilogue_p gdbarch method. */
324 nios2_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
328 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
329 return nios2_in_epilogue_p (gdbarch, pc, func_addr);
334 /* Do prologue analysis, returning the PC of the first instruction
335 after the function prologue. Assumes CACHE has already been
336 initialized. THIS_FRAME can be null, in which case we are only
337 interested in skipping the prologue. Otherwise CACHE is filled in
338 from the frame information.
340 The prologue will consist of the following parts:
341 1) Optional profiling instrumentation.
342 This uses two or three instructions (the last of
343 these might get merged in with the STW which saves RA to the
344 stack). We interpret these.
349 2) A stack adjustment or stack which, which will be one of:
350 addi sp, sp, -constant
356 addi r8, r8, constant
359 movhi rx, %hiadj(newstack)
360 addhi rx, rx, %lo(newstack)
364 3) An optional stack check, which can take either of these forms:
368 bltu sp, rx, .Lstack_overflow
373 4) Saving any registers which need to be saved. These will
374 normally just be stored onto the stack:
376 but in the large frame case will use r8 as an offset back
379 stw rx, -constant(r8)
381 Saving control registers looks slightly different:
385 5) An optional FP setup, either if the user has requested a
386 frame pointer or if the function calls alloca.
390 The prologue instructions may be interleaved, and the register
391 saves and FP setup can occur in either order.
393 To cope with all this variability we decode all the instructions
394 from the start of the prologue until we hit a branch, call or
395 return. For each of the instructions mentioned in 3, 4 and 5 we
396 handle the limited cases of stores to the stack and operations
397 on constant values. */
400 nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
401 const CORE_ADDR current_pc,
402 struct nios2_unwind_cache *cache,
403 struct frame_info *this_frame)
405 /* Maximum lines of prologue to check.
406 Note that this number should not be too large, else we can
407 potentially end up iterating through unmapped memory. */
408 CORE_ADDR limit_pc = start_pc + 200;
410 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
412 /* Does the frame set up the FP register? */
415 struct reg_value *value = cache->reg_value;
416 struct reg_value temp_value[NIOS2_NUM_REGS];
420 /* Save the starting PC so we can correct the pc after running
421 through the prolog, using symbol info. */
422 CORE_ADDR pc = start_pc;
424 /* Is this an exception handler? */
425 int exception_handler = 0;
427 /* What was the original value of SP (or fake original value for
428 functions which switch stacks? */
429 CORE_ADDR frame_high;
431 /* Is this the end of the prologue? */
432 int within_prologue = 1;
434 CORE_ADDR prologue_end;
436 /* Is this the innermost function? */
437 int innermost = (this_frame ? (frame_relative_level (this_frame) == 0) : 1);
440 fprintf_unfiltered (gdb_stdlog,
441 "{ nios2_analyze_prologue start=%s, current=%s ",
442 paddress (gdbarch, start_pc),
443 paddress (gdbarch, current_pc));
445 /* Set up the default values of the registers. */
446 nios2_setup_default (cache);
447 prologue_end = start_pc;
449 /* Find the prologue instructions. */
450 while (pc < limit_pc && within_prologue)
452 /* Present instruction. */
455 int prologue_insn = 0;
457 if (pc == current_pc)
459 /* When we reach the current PC we must save the current
460 register state (for the backtrace) but keep analysing
461 because there might be more to find out (eg. is this an
462 exception handler). */
463 memcpy (temp_value, value, sizeof (temp_value));
466 fprintf_unfiltered (gdb_stdlog, "*");
469 insn = read_memory_unsigned_integer (pc, NIOS2_OPCODE_SIZE, byte_order);
470 pc += NIOS2_OPCODE_SIZE;
473 fprintf_unfiltered (gdb_stdlog, "[%08X]", insn);
475 /* The following instructions can appear in the prologue. */
477 if ((insn & MASK_R1_ADD) == MATCH_R1_ADD)
479 /* ADD rc, ra, rb (also used for MOV) */
481 int ra = GET_IW_R_A (insn);
482 int rb = GET_IW_R_B (insn);
483 int rc = GET_IW_R_C (insn);
485 if (rc == NIOS2_SP_REGNUM
487 && value[ra].reg == cache->reg_saved[NIOS2_SP_REGNUM].basereg)
489 /* If the previous value of SP is available somewhere
490 near the new stack pointer value then this is a
493 /* If any registers were saved on the stack before then
494 we can't backtrace into them now. */
495 for (i = 0 ; i < NIOS2_NUM_REGS ; i++)
497 if (cache->reg_saved[i].basereg == NIOS2_SP_REGNUM)
498 cache->reg_saved[i].basereg = -1;
499 if (value[i].reg == NIOS2_SP_REGNUM)
503 /* Create a fake "high water mark" 4 bytes above where SP
504 was stored and fake up the registers to be consistent
506 value[NIOS2_SP_REGNUM].reg = NIOS2_SP_REGNUM;
507 value[NIOS2_SP_REGNUM].offset
509 - cache->reg_saved[NIOS2_SP_REGNUM].addr
511 cache->reg_saved[NIOS2_SP_REGNUM].basereg = NIOS2_SP_REGNUM;
512 cache->reg_saved[NIOS2_SP_REGNUM].addr = -4;
517 if (value[rb].reg == 0)
518 value[rc].reg = value[ra].reg;
519 else if (value[ra].reg == 0)
520 value[rc].reg = value[rb].reg;
523 value[rc].offset = value[ra].offset + value[rb].offset;
528 else if ((insn & MASK_R1_SUB) == MATCH_R1_SUB)
532 int ra = GET_IW_R_A (insn);
533 int rb = GET_IW_R_B (insn);
534 int rc = GET_IW_R_C (insn);
538 if (value[rb].reg == 0)
539 value[rc].reg = value[ra].reg;
542 value[rc].offset = value[ra].offset - value[rb].offset;
546 else if ((insn & MASK_R1_ADDI) == MATCH_R1_ADDI)
548 /* ADDI rb, ra, immed (also used for MOVI) */
549 short immed = GET_IW_I_IMM16 (insn);
550 int ra = GET_IW_I_A (insn);
551 int rb = GET_IW_I_B (insn);
553 /* The first stack adjustment is part of the prologue.
554 Any subsequent stack adjustments are either down to
555 alloca or the epilogue so stop analysing when we hit
557 if (rb == NIOS2_SP_REGNUM
558 && (value[rb].offset != 0 || value[ra].reg != NIOS2_SP_REGNUM))
563 value[rb].reg = value[ra].reg;
564 value[rb].offset = value[ra].offset + immed;
570 else if ((insn & MASK_R1_ORHI) == MATCH_R1_ORHI)
572 /* ORHI rb, ra, immed (also used for MOVHI) */
573 unsigned int immed = GET_IW_I_IMM16 (insn);
574 int ra = GET_IW_I_A (insn);
575 int rb = GET_IW_I_B (insn);
579 value[rb].reg = (value[ra].reg == 0) ? 0 : -1;
580 value[rb].offset = value[ra].offset | (immed << 16);
584 else if ((insn & MASK_R1_STW) == MATCH_R1_STW
585 || (insn & MASK_R1_STWIO) == MATCH_R1_STWIO)
587 /* STW rb, immediate(ra) */
589 short immed16 = GET_IW_I_IMM16 (insn);
590 int ra = GET_IW_I_A (insn);
591 int rb = GET_IW_I_B (insn);
593 /* Are we storing the original value of a register?
594 For exception handlers the value of EA-4 (return
595 address from interrupts etc) is sometimes stored. */
596 int orig = value[rb].reg;
598 && (value[rb].offset == 0
599 || (orig == NIOS2_EA_REGNUM && value[rb].offset == -4)))
601 /* We are most interested in stores to the stack, but
602 also take note of stores to other places as they
603 might be useful later. */
604 if ((value[ra].reg == NIOS2_SP_REGNUM
605 && cache->reg_saved[orig].basereg != NIOS2_SP_REGNUM)
606 || cache->reg_saved[orig].basereg == -1)
610 /* Save off callee saved registers. */
611 cache->reg_saved[orig].basereg = value[ra].reg;
612 cache->reg_saved[orig].addr = value[ra].offset + immed16;
617 if (orig == NIOS2_EA_REGNUM || orig == NIOS2_ESTATUS_REGNUM)
618 exception_handler = 1;
622 /* Non-stack memory writes are not part of the
627 else if ((insn & MASK_R1_RDCTL) == MATCH_R1_RDCTL)
630 int rc = GET_IW_R_C (insn);
631 int n = GET_IW_R_A (insn);
635 value[rc].reg = NIOS2_STATUS_REGNUM + n;
636 value[rc].offset = 0;
642 else if ((insn & MASK_R1_CALL) == MATCH_R1_CALL
643 && value[8].reg == NIOS2_RA_REGNUM
644 && value[8].offset == 0
645 && value[NIOS2_SP_REGNUM].reg == NIOS2_SP_REGNUM
646 && value[NIOS2_SP_REGNUM].offset == 0)
648 /* A CALL instruction. This is treated as a call to mcount
649 if ra has been stored into r8 beforehand and if it's
650 before the stack adjust.
651 Note mcount corrupts r2-r3, r9-r15 & ra. */
652 for (i = 2 ; i <= 3 ; i++)
654 for (i = 9 ; i <= 15 ; i++)
656 value[NIOS2_RA_REGNUM].reg = -1;
661 else if ((insn & 0xf83fffff) == 0xd800012e)
665 This instruction sequence is used in stack checking;
667 unsigned int next_insn
668 = read_memory_unsigned_integer (pc, NIOS2_OPCODE_SIZE, byte_order);
670 if (next_insn != 0x003da0fa)
673 pc += NIOS2_OPCODE_SIZE;
676 else if ((insn & 0xf800003f) == 0xd8000036)
678 /* BLTU sp, rx, .Lstackoverflow
679 If the location branched to holds a BREAK 3 instruction
680 then this is also stack overflow detection. We can
682 CORE_ADDR target_pc = pc + ((insn & 0x3fffc0) >> 6);
683 unsigned int target_insn
684 = read_memory_unsigned_integer (target_pc, NIOS2_OPCODE_SIZE,
687 if (target_insn != 0x003da0fa)
691 /* Any other instructions are allowed to be moved up into the
692 prologue. If we reach a branch, call or return then the
693 prologue is considered over. We also consider a second stack
694 adjustment as terminating the prologue (see above). */
697 switch (GET_IW_R1_OP (insn))
710 if (GET_IW_R_OPX (insn) == R1_OPX_RET
711 || GET_IW_R_OPX (insn) == R1_OPX_ERET
712 || GET_IW_R_OPX (insn) == R1_OPX_BRET
713 || GET_IW_R_OPX (insn) == R1_OPX_CALLR
714 || GET_IW_R_OPX (insn) == R1_OPX_JMP)
726 /* If THIS_FRAME is NULL, we are being called from skip_prologue
727 and are only interested in the PROLOGUE_END value, so just
728 return that now and skip over the cache updates, which depend
729 on having frame information. */
730 if (this_frame == NULL)
733 /* If we are in the function epilogue and have already popped
734 registers off the stack in preparation for returning, then we
735 want to go back to the original register values. */
736 if (innermost && nios2_in_epilogue_p (gdbarch, current_pc, start_pc))
737 nios2_setup_default (cache);
739 /* Exception handlers use a different return address register. */
740 if (exception_handler)
741 cache->return_regnum = NIOS2_EA_REGNUM;
744 fprintf_unfiltered (gdb_stdlog, "\n-> retreg=%d, ", cache->return_regnum);
746 if (cache->reg_value[NIOS2_FP_REGNUM].reg == NIOS2_SP_REGNUM)
747 /* If the FP now holds an offset from the CFA then this is a
748 normal frame which uses the frame pointer. */
749 base_reg = NIOS2_FP_REGNUM;
750 else if (cache->reg_value[NIOS2_SP_REGNUM].reg == NIOS2_SP_REGNUM)
751 /* FP doesn't hold an offset from the CFA. If SP still holds an
752 offset from the CFA then we might be in a function which omits
753 the frame pointer, or we might be partway through the prologue.
754 In both cases we can find the CFA using SP. */
755 base_reg = NIOS2_SP_REGNUM;
758 /* Somehow the stack pointer has been corrupted.
761 fprintf_unfiltered (gdb_stdlog, "<can't reach cfa> }\n");
765 if (cache->reg_value[base_reg].offset == 0
766 || cache->reg_saved[NIOS2_RA_REGNUM].basereg != NIOS2_SP_REGNUM
767 || cache->reg_saved[cache->return_regnum].basereg != NIOS2_SP_REGNUM)
769 /* If the frame didn't adjust the stack, didn't save RA or
770 didn't save EA in an exception handler then it must either
771 be a leaf function (doesn't call any other functions) or it
772 can't return. If it has called another function then it
773 can't be a leaf, so set base == 0 to indicate that we can't
774 backtrace past it. */
778 /* If it isn't the innermost function then it can't be a
779 leaf, unless it was interrupted. Check whether RA for
780 this frame is the same as PC. If so then it probably
781 wasn't interrupted. */
783 = get_frame_register_unsigned (this_frame, NIOS2_RA_REGNUM);
785 if (ra == current_pc)
790 "<noreturn ADJUST %s, r31@r%d+?>, r%d@r%d+?> }\n",
791 paddress (gdbarch, cache->reg_value[base_reg].offset),
792 cache->reg_saved[NIOS2_RA_REGNUM].basereg,
793 cache->return_regnum,
794 cache->reg_saved[cache->return_regnum].basereg);
800 /* Get the value of whichever register we are using for the
802 cache->base = get_frame_register_unsigned (this_frame, base_reg);
804 /* What was the value of SP at the start of this function (or just
805 after the stack switch). */
806 frame_high = cache->base - cache->reg_value[base_reg].offset;
808 /* Adjust all the saved registers such that they contain addresses
809 instead of offsets. */
810 for (i = 0; i < NIOS2_NUM_REGS; i++)
811 if (cache->reg_saved[i].basereg == NIOS2_SP_REGNUM)
813 cache->reg_saved[i].basereg = NIOS2_Z_REGNUM;
814 cache->reg_saved[i].addr += frame_high;
817 for (i = 0; i < NIOS2_NUM_REGS; i++)
818 if (cache->reg_saved[i].basereg == NIOS2_GP_REGNUM)
820 CORE_ADDR gp = get_frame_register_unsigned (this_frame,
823 for ( ; i < NIOS2_NUM_REGS; i++)
824 if (cache->reg_saved[i].basereg == NIOS2_GP_REGNUM)
826 cache->reg_saved[i].basereg = NIOS2_Z_REGNUM;
827 cache->reg_saved[i].addr += gp;
831 /* Work out what the value of SP was on the first instruction of
832 this function. If we didn't switch stacks then this can be
833 trivially computed from the base address. */
834 if (cache->reg_saved[NIOS2_SP_REGNUM].basereg == NIOS2_Z_REGNUM)
836 = read_memory_unsigned_integer (cache->reg_saved[NIOS2_SP_REGNUM].addr,
839 cache->cfa = frame_high;
841 /* Exception handlers restore ESTATUS into STATUS. */
842 if (exception_handler)
844 cache->reg_saved[NIOS2_STATUS_REGNUM]
845 = cache->reg_saved[NIOS2_ESTATUS_REGNUM];
846 cache->reg_saved[NIOS2_ESTATUS_REGNUM].basereg = -1;
850 fprintf_unfiltered (gdb_stdlog, "cfa=%s }\n",
851 paddress (gdbarch, cache->cfa));
856 /* Implement the skip_prologue gdbarch hook. */
859 nios2_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
864 struct nios2_unwind_cache cache;
866 /* See if we can determine the end of the prologue via the symbol
867 table. If so, then return either PC, or the PC after the
868 prologue, whichever is greater. */
869 if (find_pc_partial_function (start_pc, NULL, &func_addr, NULL))
871 CORE_ADDR post_prologue_pc
872 = skip_prologue_using_sal (gdbarch, func_addr);
874 if (post_prologue_pc != 0)
875 return max (start_pc, post_prologue_pc);
878 /* Prologue analysis does the rest.... */
879 nios2_init_cache (&cache, start_pc);
880 return nios2_analyze_prologue (gdbarch, start_pc, start_pc, &cache, NULL);
883 /* Implement the breakpoint_from_pc gdbarch hook. */
885 static const gdb_byte*
886 nios2_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
889 /* break encoding: 31->27 26->22 21->17 16->11 10->6 5->0 */
890 /* 00000 00000 0x1d 0x2d 11111 0x3a */
891 /* 00000 00000 11101 101101 11111 111010 */
892 /* In bytes: 00000000 00111011 01101111 11111010 */
893 /* 0x0 0x3b 0x6f 0xfa */
894 static const gdb_byte breakpoint_le[] = {0xfa, 0x6f, 0x3b, 0x0};
895 static const gdb_byte breakpoint_be[] = {0x0, 0x3b, 0x6f, 0xfa};
897 enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
900 if (gdbarch_byte_order_for_code (gdbarch) == BFD_ENDIAN_BIG)
901 return breakpoint_be;
903 return breakpoint_le;
906 /* Implement the print_insn gdbarch method. */
909 nios2_print_insn (bfd_vma memaddr, disassemble_info *info)
911 if (info->endian == BFD_ENDIAN_BIG)
912 return print_insn_big_nios2 (memaddr, info);
914 return print_insn_little_nios2 (memaddr, info);
918 /* Implement the frame_align gdbarch method. */
921 nios2_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
923 return align_down (addr, 4);
927 /* Implement the return_value gdbarch method. */
929 static enum return_value_convention
930 nios2_return_value (struct gdbarch *gdbarch, struct value *function,
931 struct type *type, struct regcache *regcache,
932 gdb_byte *readbuf, const gdb_byte *writebuf)
934 if (TYPE_LENGTH (type) > 8)
935 return RETURN_VALUE_STRUCT_CONVENTION;
938 nios2_extract_return_value (gdbarch, type, regcache, readbuf);
940 nios2_store_return_value (gdbarch, type, regcache, writebuf);
942 return RETURN_VALUE_REGISTER_CONVENTION;
945 /* Implement the dummy_id gdbarch method. */
947 static struct frame_id
948 nios2_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
950 return frame_id_build
951 (get_frame_register_unsigned (this_frame, NIOS2_SP_REGNUM),
952 get_frame_pc (this_frame));
955 /* Implement the push_dummy_call gdbarch method. */
958 nios2_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
959 struct regcache *regcache, CORE_ADDR bp_addr,
960 int nargs, struct value **args, CORE_ADDR sp,
961 int struct_return, CORE_ADDR struct_addr)
967 int stack_offset = 0;
968 CORE_ADDR func_addr = find_function_addr (function, NULL);
969 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
971 /* Set the return address register to point to the entry point of
972 the program, where a breakpoint lies in wait. */
973 regcache_cooked_write_signed (regcache, NIOS2_RA_REGNUM, bp_addr);
975 /* Now make space on the stack for the args. */
976 for (argnum = 0; argnum < nargs; argnum++)
977 len += align_up (TYPE_LENGTH (value_type (args[argnum])), 4);
980 /* Initialize the register pointer. */
981 argreg = NIOS2_FIRST_ARGREG;
983 /* The struct_return pointer occupies the first parameter-passing
986 regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
988 /* Now load as many as possible of the first arguments into
989 registers, and push the rest onto the stack. Loop through args
990 from first to last. */
991 for (argnum = 0; argnum < nargs; argnum++)
994 gdb_byte valbuf[MAX_REGISTER_SIZE];
995 struct value *arg = args[argnum];
996 struct type *arg_type = check_typedef (value_type (arg));
997 int len = TYPE_LENGTH (arg_type);
998 enum type_code typecode = TYPE_CODE (arg_type);
1000 val = value_contents (arg);
1002 /* Copy the argument to general registers or the stack in
1003 register-sized pieces. Large arguments are split between
1004 registers and stack. */
1007 int partial_len = (len < 4 ? len : 4);
1009 if (argreg <= NIOS2_LAST_ARGREG)
1011 /* The argument is being passed in a register. */
1012 CORE_ADDR regval = extract_unsigned_integer (val, partial_len,
1015 regcache_cooked_write_unsigned (regcache, argreg, regval);
1020 /* The argument is being passed on the stack. */
1021 CORE_ADDR addr = sp + stack_offset;
1023 write_memory (addr, val, partial_len);
1024 stack_offset += align_up (partial_len, 4);
1032 regcache_cooked_write_signed (regcache, NIOS2_SP_REGNUM, sp);
1034 /* Return adjusted stack pointer. */
1038 /* Implement the unwind_pc gdbarch method. */
1041 nios2_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1045 frame_unwind_register (next_frame, NIOS2_PC_REGNUM, buf);
1046 return extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr);
1049 /* Implement the unwind_sp gdbarch method. */
1052 nios2_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
1054 return frame_unwind_register_unsigned (this_frame, NIOS2_SP_REGNUM);
1057 /* Use prologue analysis to fill in the register cache
1058 *THIS_PROLOGUE_CACHE for THIS_FRAME. This function initializes
1059 *THIS_PROLOGUE_CACHE first. */
1061 static struct nios2_unwind_cache *
1062 nios2_frame_unwind_cache (struct frame_info *this_frame,
1063 void **this_prologue_cache)
1065 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1066 CORE_ADDR current_pc;
1067 struct nios2_unwind_cache *cache;
1070 if (*this_prologue_cache)
1071 return *this_prologue_cache;
1073 cache = FRAME_OBSTACK_ZALLOC (struct nios2_unwind_cache);
1074 *this_prologue_cache = cache;
1076 /* Zero all fields. */
1077 nios2_init_cache (cache, get_frame_func (this_frame));
1079 /* Prologue analysis does the rest... */
1080 current_pc = get_frame_pc (this_frame);
1082 nios2_analyze_prologue (gdbarch, cache->pc, current_pc, cache, this_frame);
1087 /* Implement the this_id function for the normal unwinder. */
1090 nios2_frame_this_id (struct frame_info *this_frame, void **this_cache,
1091 struct frame_id *this_id)
1093 struct nios2_unwind_cache *cache =
1094 nios2_frame_unwind_cache (this_frame, this_cache);
1096 /* This marks the outermost frame. */
1097 if (cache->base == 0)
1100 *this_id = frame_id_build (cache->cfa, cache->pc);
1103 /* Implement the prev_register function for the normal unwinder. */
1105 static struct value *
1106 nios2_frame_prev_register (struct frame_info *this_frame, void **this_cache,
1109 struct nios2_unwind_cache *cache =
1110 nios2_frame_unwind_cache (this_frame, this_cache);
1112 gdb_assert (regnum >= 0 && regnum < NIOS2_NUM_REGS);
1114 /* The PC of the previous frame is stored in the RA register of
1115 the current frame. Frob regnum so that we pull the value from
1116 the correct place. */
1117 if (regnum == NIOS2_PC_REGNUM)
1118 regnum = cache->return_regnum;
1120 if (regnum == NIOS2_SP_REGNUM && cache->cfa)
1121 return frame_unwind_got_constant (this_frame, regnum, cache->cfa);
1123 /* If we've worked out where a register is stored then load it from
1125 if (cache->reg_saved[regnum].basereg == NIOS2_Z_REGNUM)
1126 return frame_unwind_got_memory (this_frame, regnum,
1127 cache->reg_saved[regnum].addr);
1129 return frame_unwind_got_register (this_frame, regnum, regnum);
1132 /* Implement the this_base, this_locals, and this_args hooks
1133 for the normal unwinder. */
1136 nios2_frame_base_address (struct frame_info *this_frame, void **this_cache)
1138 struct nios2_unwind_cache *info
1139 = nios2_frame_unwind_cache (this_frame, this_cache);
1144 /* Data structures for the normal prologue-analysis-based
1147 static const struct frame_unwind nios2_frame_unwind =
1150 default_frame_unwind_stop_reason,
1151 nios2_frame_this_id,
1152 nios2_frame_prev_register,
1154 default_frame_sniffer
1157 static const struct frame_base nios2_frame_base =
1159 &nios2_frame_unwind,
1160 nios2_frame_base_address,
1161 nios2_frame_base_address,
1162 nios2_frame_base_address
1165 /* Fill in the register cache *THIS_CACHE for THIS_FRAME for use
1166 in the stub unwinder. */
1168 static struct trad_frame_cache *
1169 nios2_stub_frame_cache (struct frame_info *this_frame, void **this_cache)
1172 CORE_ADDR start_addr;
1173 CORE_ADDR stack_addr;
1174 struct trad_frame_cache *this_trad_cache;
1175 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1176 int num_regs = gdbarch_num_regs (gdbarch);
1178 if (*this_cache != NULL)
1180 this_trad_cache = trad_frame_cache_zalloc (this_frame);
1181 *this_cache = this_trad_cache;
1183 /* The return address is in the link register. */
1184 trad_frame_set_reg_realreg (this_trad_cache,
1185 gdbarch_pc_regnum (gdbarch),
1188 /* Frame ID, since it's a frameless / stackless function, no stack
1189 space is allocated and SP on entry is the current SP. */
1190 pc = get_frame_pc (this_frame);
1191 find_pc_partial_function (pc, NULL, &start_addr, NULL);
1192 stack_addr = get_frame_register_unsigned (this_frame, NIOS2_SP_REGNUM);
1193 trad_frame_set_id (this_trad_cache, frame_id_build (start_addr, stack_addr));
1194 /* Assume that the frame's base is the same as the stack pointer. */
1195 trad_frame_set_this_base (this_trad_cache, stack_addr);
1197 return this_trad_cache;
1200 /* Implement the this_id function for the stub unwinder. */
1203 nios2_stub_frame_this_id (struct frame_info *this_frame, void **this_cache,
1204 struct frame_id *this_id)
1206 struct trad_frame_cache *this_trad_cache
1207 = nios2_stub_frame_cache (this_frame, this_cache);
1209 trad_frame_get_id (this_trad_cache, this_id);
1212 /* Implement the prev_register function for the stub unwinder. */
1214 static struct value *
1215 nios2_stub_frame_prev_register (struct frame_info *this_frame,
1216 void **this_cache, int regnum)
1218 struct trad_frame_cache *this_trad_cache
1219 = nios2_stub_frame_cache (this_frame, this_cache);
1221 return trad_frame_get_register (this_trad_cache, this_frame, regnum);
1224 /* Implement the sniffer function for the stub unwinder.
1225 This unwinder is used for cases where the normal
1226 prologue-analysis-based unwinder can't work,
1227 such as PLT stubs. */
1230 nios2_stub_frame_sniffer (const struct frame_unwind *self,
1231 struct frame_info *this_frame, void **cache)
1234 struct obj_section *s;
1235 CORE_ADDR pc = get_frame_address_in_block (this_frame);
1237 /* Use the stub unwinder for unreadable code. */
1238 if (target_read_memory (get_frame_pc (this_frame), dummy, 4) != 0)
1241 if (in_plt_section (pc))
1247 /* Define the data structures for the stub unwinder. */
1249 static const struct frame_unwind nios2_stub_frame_unwind =
1252 default_frame_unwind_stop_reason,
1253 nios2_stub_frame_this_id,
1254 nios2_stub_frame_prev_register,
1256 nios2_stub_frame_sniffer
1259 /* Helper function to read an instruction at PC. */
1261 static unsigned long
1262 nios2_fetch_instruction (struct gdbarch *gdbarch, CORE_ADDR pc)
1264 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1266 return read_memory_unsigned_integer (pc, NIOS2_OPCODE_SIZE, byte_order);
1269 /* Determine where to set a single step breakpoint while considering
1270 branch prediction. */
1273 nios2_get_next_pc (struct frame_info *frame, CORE_ADDR pc)
1275 struct gdbarch *gdbarch = get_frame_arch (frame);
1276 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1287 inst = nios2_fetch_instruction (gdbarch, pc);
1288 pc += NIOS2_OPCODE_SIZE;
1290 imm16 = (short) GET_IW_I_IMM16 (inst);
1291 ra = GET_IW_I_A (inst);
1292 rb = GET_IW_I_B (inst);
1293 ras = get_frame_register_signed (frame, ra);
1294 rbs = get_frame_register_signed (frame, rb);
1295 rau = get_frame_register_unsigned (frame, ra);
1296 rbu = get_frame_register_unsigned (frame, rb);
1298 switch (GET_IW_R1_OP (inst))
1336 pc = (pc & 0xf0000000) | (GET_IW_J_IMM26 (inst) << 2);
1340 switch (GET_IW_R_OPX (inst))
1349 if (tdep->syscall_next_pc != NULL)
1350 return tdep->syscall_next_pc (frame);
1362 /* Implement the software_single_step gdbarch method. */
1365 nios2_software_single_step (struct frame_info *frame)
1367 struct gdbarch *gdbarch = get_frame_arch (frame);
1368 struct address_space *aspace = get_frame_address_space (frame);
1369 CORE_ADDR next_pc = nios2_get_next_pc (frame, get_frame_pc (frame));
1371 insert_single_step_breakpoint (gdbarch, aspace, next_pc);
1376 /* Implement the get_longjump_target gdbarch method. */
1379 nios2_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
1381 struct gdbarch *gdbarch = get_frame_arch (frame);
1382 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1383 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1384 CORE_ADDR jb_addr = get_frame_register_unsigned (frame, NIOS2_R4_REGNUM);
1387 if (target_read_memory (jb_addr + (tdep->jb_pc * 4), buf, 4))
1390 *pc = extract_unsigned_integer (buf, 4, byte_order);
1394 /* Initialize the Nios II gdbarch. */
1396 static struct gdbarch *
1397 nios2_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1399 struct gdbarch *gdbarch;
1400 struct gdbarch_tdep *tdep;
1401 int register_bytes, i;
1402 struct tdesc_arch_data *tdesc_data = NULL;
1403 const struct target_desc *tdesc = info.target_desc;
1405 if (!tdesc_has_registers (tdesc))
1406 /* Pick a default target description. */
1407 tdesc = tdesc_nios2;
1409 /* Check any target description for validity. */
1410 if (tdesc_has_registers (tdesc))
1412 const struct tdesc_feature *feature;
1415 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.nios2.cpu");
1416 if (feature == NULL)
1419 tdesc_data = tdesc_data_alloc ();
1423 for (i = 0; i < NIOS2_NUM_REGS; i++)
1424 valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
1425 nios2_reg_names[i]);
1429 tdesc_data_cleanup (tdesc_data);
1434 /* Find a candidate among the list of pre-declared architectures. */
1435 arches = gdbarch_list_lookup_by_info (arches, &info);
1437 return arches->gdbarch;
1439 /* None found, create a new architecture from the information
1441 tdep = xcalloc (1, sizeof (struct gdbarch_tdep));
1442 gdbarch = gdbarch_alloc (&info, tdep);
1444 /* longjmp support not enabled by default. */
1447 /* Data type sizes. */
1448 set_gdbarch_ptr_bit (gdbarch, 32);
1449 set_gdbarch_addr_bit (gdbarch, 32);
1450 set_gdbarch_short_bit (gdbarch, 16);
1451 set_gdbarch_int_bit (gdbarch, 32);
1452 set_gdbarch_long_bit (gdbarch, 32);
1453 set_gdbarch_long_long_bit (gdbarch, 64);
1454 set_gdbarch_float_bit (gdbarch, 32);
1455 set_gdbarch_double_bit (gdbarch, 64);
1457 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1458 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1460 /* The register set. */
1461 set_gdbarch_num_regs (gdbarch, NIOS2_NUM_REGS);
1462 set_gdbarch_sp_regnum (gdbarch, NIOS2_SP_REGNUM);
1463 set_gdbarch_pc_regnum (gdbarch, NIOS2_PC_REGNUM); /* Pseudo register PC */
1465 set_gdbarch_register_name (gdbarch, nios2_register_name);
1466 set_gdbarch_register_type (gdbarch, nios2_register_type);
1468 /* Provide register mappings for stabs and dwarf2. */
1469 set_gdbarch_stab_reg_to_regnum (gdbarch, nios2_dwarf_reg_to_regnum);
1470 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, nios2_dwarf_reg_to_regnum);
1472 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1474 /* Call dummy code. */
1475 set_gdbarch_frame_align (gdbarch, nios2_frame_align);
1477 set_gdbarch_return_value (gdbarch, nios2_return_value);
1479 set_gdbarch_skip_prologue (gdbarch, nios2_skip_prologue);
1480 set_gdbarch_in_function_epilogue_p (gdbarch, nios2_in_function_epilogue_p);
1481 set_gdbarch_breakpoint_from_pc (gdbarch, nios2_breakpoint_from_pc);
1483 set_gdbarch_dummy_id (gdbarch, nios2_dummy_id);
1484 set_gdbarch_unwind_pc (gdbarch, nios2_unwind_pc);
1485 set_gdbarch_unwind_sp (gdbarch, nios2_unwind_sp);
1487 /* The dwarf2 unwinder will normally produce the best results if
1488 the debug information is available, so register it first. */
1489 dwarf2_append_unwinders (gdbarch);
1490 frame_unwind_append_unwinder (gdbarch, &nios2_stub_frame_unwind);
1491 frame_unwind_append_unwinder (gdbarch, &nios2_frame_unwind);
1493 /* Single stepping. */
1494 set_gdbarch_software_single_step (gdbarch, nios2_software_single_step);
1496 /* Hook in ABI-specific overrides, if they have been registered. */
1497 gdbarch_init_osabi (info, gdbarch);
1499 if (tdep->jb_pc >= 0)
1500 set_gdbarch_get_longjmp_target (gdbarch, nios2_get_longjmp_target);
1502 frame_base_set_default (gdbarch, &nios2_frame_base);
1504 set_gdbarch_print_insn (gdbarch, nios2_print_insn);
1506 /* Enable inferior call support. */
1507 set_gdbarch_push_dummy_call (gdbarch, nios2_push_dummy_call);
1510 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
1515 extern initialize_file_ftype _initialize_nios2_tdep; /* -Wmissing-prototypes */
1518 _initialize_nios2_tdep (void)
1520 gdbarch_register (bfd_arch_nios2, nios2_gdbarch_init, NULL);
1521 initialize_tdesc_nios2 ();
1523 /* Allow debugging this file's internals. */
1524 add_setshow_boolean_cmd ("nios2", class_maintenance, &nios2_debug,
1525 _("Set Nios II debugging."),
1526 _("Show Nios II debugging."),
1527 _("When on, Nios II specific debugging is enabled."),
1530 &setdebuglist, &showdebuglist);