1 /* Target-machine dependent code for Nios II, for GDB.
2 Copyright (C) 2012-2013 Free Software Foundation, Inc.
3 Contributed by Peter Brookes (pbrookes@altera.com)
4 and Andrew Draper (adraper@altera.com).
5 Contributed by Mentor Graphics, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "frame-unwind.h"
25 #include "frame-base.h"
26 #include "trad-frame.h"
27 #include "dwarf2-frame.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
41 #include "gdb_assert.h"
44 #include "target-descriptions.h"
46 /* To get entry_point_address. */
49 /* Nios II ISA specific encodings and macros. */
50 #include "opcode/nios2.h"
52 /* Nios II specific header. */
53 #include "nios2-tdep.h"
55 #include "features/nios2.c"
57 /* Control debugging information emitted in this file. */
59 static int nios2_debug = 0;
61 /* The following structures are used in the cache for prologue
62 analysis; see the reg_value and reg_saved tables in
63 struct nios2_unwind_cache, respectively. */
65 /* struct reg_value is used to record that a register has the same value
66 as reg at the given offset from the start of a function. */
74 /* struct reg_saved is used to record that a register value has been saved at
75 basereg + addr, for basereg >= 0. If basereg < 0, that indicates
76 that the register is not known to have been saved. Note that when
77 basereg == NIOS2_Z_REGNUM (that is, r0, which holds value 0),
78 addr is an absolute address. */
86 struct nios2_unwind_cache
88 /* The frame's base, optionally used by the high-level debug info. */
91 /* The previous frame's inner most stack address. Used as this
92 frame ID's stack_addr. */
95 /* The address of the first instruction in this function. */
98 /* Which register holds the return address for the frame. */
101 /* Table indicating what changes have been made to each register. */
102 struct reg_value reg_value[NIOS2_NUM_REGS];
104 /* Table indicating where each register has been saved. */
105 struct reg_saved reg_saved[NIOS2_NUM_REGS];
109 /* This array is a mapping from Dwarf-2 register numbering to GDB's. */
111 static int nios2_dwarf2gdb_regno_map[] =
120 NIOS2_GP_REGNUM, /* 26 */
121 NIOS2_SP_REGNUM, /* 27 */
122 NIOS2_FP_REGNUM, /* 28 */
123 NIOS2_EA_REGNUM, /* 29 */
124 NIOS2_BA_REGNUM, /* 30 */
125 NIOS2_RA_REGNUM, /* 31 */
126 NIOS2_PC_REGNUM, /* 32 */
127 NIOS2_STATUS_REGNUM, /* 33 */
128 NIOS2_ESTATUS_REGNUM, /* 34 */
129 NIOS2_BSTATUS_REGNUM, /* 35 */
130 NIOS2_IENABLE_REGNUM, /* 36 */
131 NIOS2_IPENDING_REGNUM, /* 37 */
132 NIOS2_CPUID_REGNUM, /* 38 */
133 39, /* CTL6 */ /* 39 */
134 NIOS2_EXCEPTION_REGNUM, /* 40 */
135 NIOS2_PTEADDR_REGNUM, /* 41 */
136 NIOS2_TLBACC_REGNUM, /* 42 */
137 NIOS2_TLBMISC_REGNUM, /* 43 */
138 NIOS2_ECCINJ_REGNUM, /* 44 */
139 NIOS2_BADADDR_REGNUM, /* 45 */
140 NIOS2_CONFIG_REGNUM, /* 46 */
141 NIOS2_MPUBASE_REGNUM, /* 47 */
142 NIOS2_MPUACC_REGNUM /* 48 */
146 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
149 nios2_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
151 if (dw_reg < 0 || dw_reg > NIOS2_NUM_REGS)
153 warning (_("Dwarf-2 uses unmapped register #%d"), dw_reg);
157 return nios2_dwarf2gdb_regno_map[dw_reg];
160 /* Canonical names for the 49 registers. */
162 static const char *const nios2_reg_names[NIOS2_NUM_REGS] =
164 "zero", "at", "r2", "r3", "r4", "r5", "r6", "r7",
165 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
166 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
167 "et", "bt", "gp", "sp", "fp", "ea", "ba", "ra",
169 "status", "estatus", "bstatus", "ienable",
170 "ipending", "cpuid", "ctl6", "exception",
171 "pteaddr", "tlbacc", "tlbmisc", "eccinj",
172 "badaddr", "config", "mpubase", "mpuacc"
175 /* Implement the register_name gdbarch method. */
178 nios2_register_name (struct gdbarch *gdbarch, int regno)
180 /* Use mnemonic aliases for GPRs. */
181 if (regno >= 0 && regno < NIOS2_NUM_REGS)
182 return nios2_reg_names[regno];
184 return tdesc_register_name (gdbarch, regno);
187 /* Implement the register_type gdbarch method. */
190 nios2_register_type (struct gdbarch *gdbarch, int regno)
192 /* If the XML description has register information, use that to
193 determine the register type. */
194 if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
195 return tdesc_register_type (gdbarch, regno);
197 if (regno == NIOS2_PC_REGNUM)
198 return builtin_type (gdbarch)->builtin_func_ptr;
199 else if (regno == NIOS2_SP_REGNUM)
200 return builtin_type (gdbarch)->builtin_data_ptr;
202 return builtin_type (gdbarch)->builtin_uint32;
205 /* Given a return value in REGCACHE with a type VALTYPE,
206 extract and copy its value into VALBUF. */
209 nios2_extract_return_value (struct gdbarch *gdbarch, struct type *valtype,
210 struct regcache *regcache, gdb_byte *valbuf)
212 int len = TYPE_LENGTH (valtype);
214 /* Return values of up to 8 bytes are returned in $r2 $r3. */
215 if (len <= register_size (gdbarch, NIOS2_R2_REGNUM))
216 regcache_cooked_read (regcache, NIOS2_R2_REGNUM, valbuf);
219 gdb_assert (len <= (register_size (gdbarch, NIOS2_R2_REGNUM)
220 + register_size (gdbarch, NIOS2_R3_REGNUM)));
221 regcache_cooked_read (regcache, NIOS2_R2_REGNUM, valbuf);
222 regcache_cooked_read (regcache, NIOS2_R3_REGNUM, valbuf + 4);
226 /* Write into appropriate registers a function return value
227 of type TYPE, given in virtual format. */
230 nios2_store_return_value (struct gdbarch *gdbarch, struct type *valtype,
231 struct regcache *regcache, const gdb_byte *valbuf)
233 int len = TYPE_LENGTH (valtype);
235 /* Return values of up to 8 bytes are returned in $r2 $r3. */
236 if (len <= register_size (gdbarch, NIOS2_R2_REGNUM))
237 regcache_cooked_write (regcache, NIOS2_R2_REGNUM, valbuf);
240 gdb_assert (len <= (register_size (gdbarch, NIOS2_R2_REGNUM)
241 + register_size (gdbarch, NIOS2_R3_REGNUM)));
242 regcache_cooked_write (regcache, NIOS2_R2_REGNUM, valbuf);
243 regcache_cooked_write (regcache, NIOS2_R3_REGNUM, valbuf + 4);
248 /* Set up the default values of the registers. */
251 nios2_setup_default (struct nios2_unwind_cache *cache)
255 for (i = 0; i < NIOS2_NUM_REGS; i++)
257 /* All registers start off holding their previous values. */
258 cache->reg_value[i].reg = i;
259 cache->reg_value[i].offset = 0;
261 /* All registers start off not saved. */
262 cache->reg_saved[i].basereg = -1;
263 cache->reg_saved[i].addr = 0;
267 /* Initialize the unwind cache. */
270 nios2_init_cache (struct nios2_unwind_cache *cache, CORE_ADDR pc)
275 cache->return_regnum = NIOS2_RA_REGNUM;
276 nios2_setup_default (cache);
279 /* Helper function to identify when we're in a function epilogue;
280 that is, the part of the function from the point at which the
281 stack adjustment is made, to the return or sibcall. On Nios II,
282 we want to check that the CURRENT_PC is a return-type instruction
283 and that the previous instruction is a stack adjustment.
284 START_PC is the beginning of the function in question. */
287 nios2_in_epilogue_p (struct gdbarch *gdbarch,
288 CORE_ADDR current_pc,
291 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
293 /* There has to be a previous instruction in the function. */
294 if (current_pc > start_pc)
297 /* Check whether the previous instruction was a stack
300 = read_memory_unsigned_integer (current_pc - NIOS2_OPCODE_SIZE,
301 NIOS2_OPCODE_SIZE, byte_order);
303 if ((insn & 0xffc0003c) == 0xdec00004 /* ADDI sp, sp, */
304 || (insn & 0xffc1ffff) == 0xdec1883a /* ADD sp, sp, */
305 || (insn & 0xffc0003f) == 0xdec00017) /* LDW sp, constant(sp) */
307 /* Then check if it's followed by a return or a tail
309 insn = read_memory_unsigned_integer (current_pc, NIOS2_OPCODE_SIZE,
312 if (insn == 0xf800283a /* RET */
313 || insn == 0xe800083a /* ERET */
314 || (insn & 0x07ffffff) == 0x0000683a /* JMP */
315 || (insn & 0xffc0003f) == 6) /* BR */
322 /* Implement the in_function_epilogue_p gdbarch method. */
325 nios2_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
329 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
330 return nios2_in_epilogue_p (gdbarch, pc, func_addr);
335 /* Define some instruction patterns supporting wildcard bits via a
344 static const wild_insn profiler_insn[] =
346 { 0x0010e03a, 0x00000000 }, /* nextpc r8 */
347 { 0xf813883a, 0x00000000 }, /* mov r9,ra */
348 { 0x02800034, 0x003fffc0 }, /* movhi r10,257 */
349 { 0x52800004, 0x003fffc0 }, /* addi r10,r10,-31992 */
350 { 0x00000000, 0xffffffc0 }, /* call <mcount> */
351 { 0x483f883a, 0x00000000 } /* mov ra,r9 */
354 static const wild_insn irqentry_insn[] =
356 { 0x0031307a, 0x00000000 }, /* rdctl et,estatus */
357 { 0xc600004c, 0x00000000 }, /* andi et,et,1 */
358 { 0xc0000026, 0x003fffc0 }, /* beq et,zero, <software_exception> */
359 { 0x0031313a, 0x00000000 }, /* rdctl et,ipending */
360 { 0xc0000026, 0x003fffc0 } /* beq et,zero, <software_exception> */
364 /* Attempt to match SEQUENCE, which is COUNT insns long, at START_PC. */
367 nios2_match_sequence (struct gdbarch *gdbarch, CORE_ADDR start_pc,
368 const wild_insn *sequence, int count)
370 CORE_ADDR pc = start_pc;
373 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
375 for (i = 0 ; i < count ; i++)
377 insn = read_memory_unsigned_integer (pc, NIOS2_OPCODE_SIZE, byte_order);
378 if ((insn & ~sequence[i].mask) != sequence[i].insn)
381 pc += NIOS2_OPCODE_SIZE;
387 /* Do prologue analysis, returning the PC of the first instruction
388 after the function prologue. Assumes CACHE has already been
389 initialized. THIS_FRAME can be null, in which case we are only
390 interested in skipping the prologue. Otherwise CACHE is filled in
391 from the frame information.
393 The prologue will consist of the following parts:
394 1) Optional profiling instrumentation. The old version uses six
395 instructions. We step over this if there is an exact match.
398 movhi r10, %hiadj(.LP2)
399 addi r10, r10, %lo(.LP2)
402 The new version uses two or three instructions (the last of
403 these might get merged in with the STW which saves RA to the
404 stack). We interpret these.
409 2) Optional interrupt entry decision. Again, we step over
410 this if there is an exact match.
413 beq et,zero, <software_exception>
415 beq et,zero, <software_exception>
417 3) A stack adjustment or stack which, which will be one of:
418 addi sp, sp, -constant
424 addi r8, r8, constant
427 movhi rx, %hiadj(newstack)
428 addhi rx, rx, %lo(newstack)
432 4) An optional stack check, which can take either of these forms:
436 bltu sp, rx, .Lstack_overflow
441 5) Saving any registers which need to be saved. These will
442 normally just be stored onto the stack:
444 but in the large frame case will use r8 as an offset back
447 stw rx, -constant(r8)
449 Saving control registers looks slightly different:
453 6) An optional FP setup, either if the user has requested a
454 frame pointer or if the function calls alloca.
458 The prologue instructions may be interleaved, and the register
459 saves and FP setup can occur in either order.
461 To cope with all this variability we decode all the instructions
462 from the start of the prologue until we hit a branch, call or
463 return. For each of the instructions mentioned in 3, 4 and 5 we
464 handle the limited cases of stores to the stack and operations
465 on constant values. */
468 nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
469 const CORE_ADDR current_pc,
470 struct nios2_unwind_cache *cache,
471 struct frame_info *this_frame)
473 /* Maximum lines of prologue to check.
474 Note that this number should not be too large, else we can
475 potentially end up iterating through unmapped memory. */
476 CORE_ADDR limit_pc = start_pc + 200;
478 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
480 /* Does the frame set up the FP register? */
483 struct reg_value *value = cache->reg_value;
484 struct reg_value temp_value[NIOS2_NUM_REGS];
488 /* Save the starting PC so we can correct the pc after running
489 through the prolog, using symbol info. */
490 CORE_ADDR pc = start_pc;
492 /* Is this an exception handler? */
493 int exception_handler = 0;
495 /* What was the original value of SP (or fake original value for
496 functions which switch stacks? */
497 CORE_ADDR frame_high;
499 /* Is this the end of the prologue? */
500 int within_prologue = 1;
502 CORE_ADDR prologue_end;
504 /* Is this the innermost function? */
505 int innermost = (this_frame ? (frame_relative_level (this_frame) == 0) : 1);
508 fprintf_unfiltered (gdb_stdlog,
509 "{ nios2_analyze_prologue start=%s, current=%s ",
510 paddress (gdbarch, start_pc),
511 paddress (gdbarch, current_pc));
513 /* Set up the default values of the registers. */
514 nios2_setup_default (cache);
516 /* If the first few instructions are the profile entry, then skip
517 over them. Newer versions of the compiler use more efficient
519 if (nios2_match_sequence (gdbarch, pc, profiler_insn,
520 ARRAY_SIZE (profiler_insn)))
521 pc += ARRAY_SIZE (profiler_insn) * NIOS2_OPCODE_SIZE;
523 /* If the first few instructions are an interrupt entry, then skip
525 if (nios2_match_sequence (gdbarch, pc, irqentry_insn,
526 ARRAY_SIZE (irqentry_insn)))
528 pc += ARRAY_SIZE (irqentry_insn) * NIOS2_OPCODE_SIZE;
529 exception_handler = 1;
532 prologue_end = start_pc;
534 /* Find the prologue instructions. */
535 while (pc < limit_pc && within_prologue)
537 /* Present instruction. */
540 int prologue_insn = 0;
542 if (pc == current_pc)
544 /* When we reach the current PC we must save the current
545 register state (for the backtrace) but keep analysing
546 because there might be more to find out (eg. is this an
547 exception handler). */
548 memcpy (temp_value, value, sizeof (temp_value));
551 fprintf_unfiltered (gdb_stdlog, "*");
554 insn = read_memory_unsigned_integer (pc, NIOS2_OPCODE_SIZE, byte_order);
555 pc += NIOS2_OPCODE_SIZE;
558 fprintf_unfiltered (gdb_stdlog, "[%08X]", insn);
560 /* The following instructions can appear in the prologue. */
562 if ((insn & 0x0001ffff) == 0x0001883a)
564 /* ADD rc, ra, rb (also used for MOV) */
566 int ra = GET_IW_A (insn);
567 int rb = GET_IW_B (insn);
568 int rc = GET_IW_C (insn);
570 if (rc == NIOS2_SP_REGNUM
572 && value[ra].reg == cache->reg_saved[NIOS2_SP_REGNUM].basereg)
574 /* If the previous value of SP is available somewhere
575 near the new stack pointer value then this is a
578 /* If any registers were saved on the stack before then
579 we can't backtrace into them now. */
580 for (i = 0 ; i < NIOS2_NUM_REGS ; i++)
582 if (cache->reg_saved[i].basereg == NIOS2_SP_REGNUM)
583 cache->reg_saved[i].basereg = -1;
584 if (value[i].reg == NIOS2_SP_REGNUM)
588 /* Create a fake "high water mark" 4 bytes above where SP
589 was stored and fake up the registers to be consistent
591 value[NIOS2_SP_REGNUM].reg = NIOS2_SP_REGNUM;
592 value[NIOS2_SP_REGNUM].offset
594 - cache->reg_saved[NIOS2_SP_REGNUM].addr
596 cache->reg_saved[NIOS2_SP_REGNUM].basereg = NIOS2_SP_REGNUM;
597 cache->reg_saved[NIOS2_SP_REGNUM].addr = -4;
602 if (value[rb].reg == 0)
603 value[rc].reg = value[ra].reg;
604 else if (value[ra].reg == 0)
605 value[rc].reg = value[rb].reg;
608 value[rc].offset = value[ra].offset + value[rb].offset;
613 else if ((insn & 0x0001ffff) == 0x0001983a)
617 int ra = GET_IW_A (insn);
618 int rb = GET_IW_B (insn);
619 int rc = GET_IW_C (insn);
623 if (value[rb].reg == 0)
624 value[rc].reg = value[ra].reg;
627 value[rc].offset = value[ra].offset - value[rb].offset;
631 else if ((insn & 0x0000003f) == 0x00000004)
633 /* ADDI rb, ra, immed (also used for MOVI) */
634 short immed = GET_IW_IMM16 (insn);
635 int ra = GET_IW_A (insn);
636 int rb = GET_IW_B (insn);
638 /* The first stack adjustment is part of the prologue.
639 Any subsequent stack adjustments are either down to
640 alloca or the epilogue so stop analysing when we hit
642 if (rb == NIOS2_SP_REGNUM
643 && (value[rb].offset != 0 || value[ra].reg != NIOS2_SP_REGNUM))
648 value[rb].reg = value[ra].reg;
649 value[rb].offset = value[ra].offset + immed;
655 else if ((insn & 0x0000003f) == 0x00000034)
657 /* ORHI rb, ra, immed (also used for MOVHI) */
658 unsigned int immed = GET_IW_IMM16 (insn);
659 int ra = GET_IW_A (insn);
660 int rb = GET_IW_B (insn);
664 value[rb].reg = (value[ra].reg == 0) ? 0 : -1;
665 value[rb].offset = value[ra].offset | (immed << 16);
669 else if ((insn & IW_OP_MASK) == OP_STW
670 || (insn & IW_OP_MASK) == OP_STWIO)
672 /* STW rb, immediate(ra) */
674 short immed16 = GET_IW_IMM16 (insn);
675 int ra = GET_IW_A (insn);
676 int rb = GET_IW_B (insn);
678 /* Are we storing the original value of a register?
679 For exception handlers the value of EA-4 (return
680 address from interrupts etc) is sometimes stored. */
681 int orig = value[rb].reg;
683 && (value[rb].offset == 0
684 || (orig == NIOS2_EA_REGNUM && value[rb].offset == -4)))
686 /* We are most interested in stores to the stack, but
687 also take note of stores to other places as they
688 might be useful later. */
689 if ((value[ra].reg == NIOS2_SP_REGNUM
690 && cache->reg_saved[orig].basereg != NIOS2_SP_REGNUM)
691 || cache->reg_saved[orig].basereg == -1)
695 /* Save off callee saved registers. */
696 cache->reg_saved[orig].basereg = value[ra].reg;
697 cache->reg_saved[orig].addr
698 = value[ra].offset + GET_IW_IMM16 (insn);
703 if (orig == NIOS2_EA_REGNUM || orig == NIOS2_ESTATUS_REGNUM)
704 exception_handler = 1;
708 /* Non-stack memory writes are not part of the
713 else if ((insn & 0xffc1f83f) == 0x0001303a)
716 int rc = GET_IW_C (insn);
717 int n = GET_IW_CONTROL_REGNUM (insn);
721 value[rc].reg = NIOS2_STATUS_REGNUM + n;
722 value[rc].offset = 0;
728 else if ((insn & 0x0000003f) == 0
729 && value[8].reg == NIOS2_RA_REGNUM
730 && value[8].offset == 0
731 && value[NIOS2_SP_REGNUM].reg == NIOS2_SP_REGNUM
732 && value[NIOS2_SP_REGNUM].offset == 0)
734 /* A CALL instruction. This is treated as a call to mcount
735 if ra has been stored into r8 beforehand and if it's
736 before the stack adjust.
737 Note mcount corrupts r2-r3, r9-r15 & ra. */
738 for (i = 2 ; i <= 3 ; i++)
740 for (i = 9 ; i <= 15 ; i++)
742 value[NIOS2_RA_REGNUM].reg = -1;
747 else if ((insn & 0xf83fffff) == 0xd800012e)
751 This instruction sequence is used in stack checking;
753 unsigned int next_insn
754 = read_memory_unsigned_integer (pc, NIOS2_OPCODE_SIZE, byte_order);
756 if (next_insn != 0x003da0fa)
759 pc += NIOS2_OPCODE_SIZE;
762 else if ((insn & 0xf800003f) == 0xd8000036)
764 /* BLTU sp, rx, .Lstackoverflow
765 If the location branched to holds a BREAK 3 instruction
766 then this is also stack overflow detection. We can
768 CORE_ADDR target_pc = pc + ((insn & 0x3fffc0) >> 6);
769 unsigned int target_insn
770 = read_memory_unsigned_integer (target_pc, NIOS2_OPCODE_SIZE,
773 if (target_insn != 0x003da0fa)
777 /* Any other instructions are allowed to be moved up into the
778 prologue. If we reach a branch, call or return then the
779 prologue is considered over. We also consider a second stack
780 adjustment as terminating the prologue (see above). */
783 switch (GET_IW_OP (insn))
796 if (GET_IW_OPX (insn) == OPX_RET
797 || GET_IW_OPX (insn) == OPX_ERET
798 || GET_IW_OPX (insn) == OPX_BRET
799 || GET_IW_OPX (insn) == OPX_CALLR
800 || GET_IW_OPX (insn) == OPX_JMP)
812 /* If THIS_FRAME is NULL, we are being called from skip_prologue
813 and are only interested in the PROLOGUE_END value, so just
814 return that now and skip over the cache updates, which depend
815 on having frame information. */
816 if (this_frame == NULL)
819 /* If we are in the function epilogue and have already popped
820 registers off the stack in preparation for returning, then we
821 want to go back to the original register values. */
822 if (innermost && nios2_in_epilogue_p (gdbarch, current_pc, start_pc))
823 nios2_setup_default (cache);
825 /* Exception handlers use a different return address register. */
826 if (exception_handler)
827 cache->return_regnum = NIOS2_EA_REGNUM;
830 fprintf_unfiltered (gdb_stdlog, "\n-> retreg=%d, ", cache->return_regnum);
832 if (cache->reg_value[NIOS2_FP_REGNUM].reg == NIOS2_SP_REGNUM)
833 /* If the FP now holds an offset from the CFA then this is a
834 normal frame which uses the frame pointer. */
835 base_reg = NIOS2_FP_REGNUM;
836 else if (cache->reg_value[NIOS2_SP_REGNUM].reg == NIOS2_SP_REGNUM)
837 /* FP doesn't hold an offset from the CFA. If SP still holds an
838 offset from the CFA then we might be in a function which omits
839 the frame pointer, or we might be partway through the prologue.
840 In both cases we can find the CFA using SP. */
841 base_reg = NIOS2_SP_REGNUM;
844 /* Somehow the stack pointer has been corrupted.
847 fprintf_unfiltered (gdb_stdlog, "<can't reach cfa> }\n");
851 if (cache->reg_value[base_reg].offset == 0
852 || cache->reg_saved[NIOS2_RA_REGNUM].basereg != NIOS2_SP_REGNUM
853 || cache->reg_saved[cache->return_regnum].basereg != NIOS2_SP_REGNUM)
855 /* If the frame didn't adjust the stack, didn't save RA or
856 didn't save EA in an exception handler then it must either
857 be a leaf function (doesn't call any other functions) or it
858 can't return. If it has called another function then it
859 can't be a leaf, so set base == 0 to indicate that we can't
860 backtrace past it. */
864 /* If it isn't the innermost function then it can't be a
865 leaf, unless it was interrupted. Check whether RA for
866 this frame is the same as PC. If so then it probably
867 wasn't interrupted. */
869 = get_frame_register_unsigned (this_frame, NIOS2_RA_REGNUM);
871 if (ra == current_pc)
876 "<noreturn ADJUST %s, r31@r%d+?>, r%d@r%d+?> }\n",
877 paddress (gdbarch, cache->reg_value[base_reg].offset),
878 cache->reg_saved[NIOS2_RA_REGNUM].basereg,
879 cache->return_regnum,
880 cache->reg_saved[cache->return_regnum].basereg);
886 /* Get the value of whichever register we are using for the
888 cache->base = get_frame_register_unsigned (this_frame, base_reg);
890 /* What was the value of SP at the start of this function (or just
891 after the stack switch). */
892 frame_high = cache->base - cache->reg_value[base_reg].offset;
894 /* Adjust all the saved registers such that they contain addresses
895 instead of offsets. */
896 for (i = 0; i < NIOS2_NUM_REGS; i++)
897 if (cache->reg_saved[i].basereg == NIOS2_SP_REGNUM)
899 cache->reg_saved[i].basereg = NIOS2_Z_REGNUM;
900 cache->reg_saved[i].addr += frame_high;
903 for (i = 0; i < NIOS2_NUM_REGS; i++)
904 if (cache->reg_saved[i].basereg == NIOS2_GP_REGNUM)
906 CORE_ADDR gp = get_frame_register_unsigned (this_frame,
909 for ( ; i < NIOS2_NUM_REGS; i++)
910 if (cache->reg_saved[i].basereg == NIOS2_GP_REGNUM)
912 cache->reg_saved[i].basereg = NIOS2_Z_REGNUM;
913 cache->reg_saved[i].addr += gp;
917 /* Work out what the value of SP was on the first instruction of
918 this function. If we didn't switch stacks then this can be
919 trivially computed from the base address. */
920 if (cache->reg_saved[NIOS2_SP_REGNUM].basereg == NIOS2_Z_REGNUM)
922 = read_memory_unsigned_integer (cache->reg_saved[NIOS2_SP_REGNUM].addr,
925 cache->cfa = frame_high;
927 /* Exception handlers restore ESTATUS into STATUS. */
928 if (exception_handler)
930 cache->reg_saved[NIOS2_STATUS_REGNUM]
931 = cache->reg_saved[NIOS2_ESTATUS_REGNUM];
932 cache->reg_saved[NIOS2_ESTATUS_REGNUM].basereg = -1;
936 fprintf_unfiltered (gdb_stdlog, "cfa=%s }\n",
937 paddress (gdbarch, cache->cfa));
942 /* Implement the skip_prologue gdbarch hook. */
945 nios2_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
950 struct nios2_unwind_cache cache;
952 /* See if we can determine the end of the prologue via the symbol
953 table. If so, then return either PC, or the PC after the
954 prologue, whichever is greater. */
955 if (find_pc_partial_function (start_pc, NULL, &func_addr, NULL))
957 CORE_ADDR post_prologue_pc
958 = skip_prologue_using_sal (gdbarch, func_addr);
960 if (post_prologue_pc != 0)
961 return max (start_pc, post_prologue_pc);
964 /* Prologue analysis does the rest.... */
965 nios2_init_cache (&cache, start_pc);
966 return nios2_analyze_prologue (gdbarch, start_pc, start_pc, &cache, NULL);
969 /* Implement the breakpoint_from_pc gdbarch hook. */
971 static const gdb_byte*
972 nios2_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
975 /* break encoding: 31->27 26->22 21->17 16->11 10->6 5->0 */
976 /* 00000 00000 0x1d 0x2d 11111 0x3a */
977 /* 00000 00000 11101 101101 11111 111010 */
978 /* In bytes: 00000000 00111011 01101111 11111010 */
979 /* 0x0 0x3b 0x6f 0xfa */
980 static const gdb_byte breakpoint_le[] = {0xfa, 0x6f, 0x3b, 0x0};
981 static const gdb_byte breakpoint_be[] = {0x0, 0x3b, 0x6f, 0xfa};
983 enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
986 if (gdbarch_byte_order_for_code (gdbarch) == BFD_ENDIAN_BIG)
987 return breakpoint_be;
989 return breakpoint_le;
992 /* Implement the print_insn gdbarch method. */
995 nios2_print_insn (bfd_vma memaddr, disassemble_info *info)
997 if (info->endian == BFD_ENDIAN_BIG)
998 return print_insn_big_nios2 (memaddr, info);
1000 return print_insn_little_nios2 (memaddr, info);
1004 /* Implement the frame_align gdbarch method. */
1007 nios2_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1009 return align_down (addr, 4);
1013 /* Implement the return_value gdbarch method. */
1015 static enum return_value_convention
1016 nios2_return_value (struct gdbarch *gdbarch, struct value *function,
1017 struct type *type, struct regcache *regcache,
1018 gdb_byte *readbuf, const gdb_byte *writebuf)
1020 if (TYPE_LENGTH (type) > 8)
1021 return RETURN_VALUE_STRUCT_CONVENTION;
1024 nios2_extract_return_value (gdbarch, type, regcache, readbuf);
1026 nios2_store_return_value (gdbarch, type, regcache, writebuf);
1028 return RETURN_VALUE_REGISTER_CONVENTION;
1031 /* Implement the dummy_id gdbarch method. */
1033 static struct frame_id
1034 nios2_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1036 return frame_id_build
1037 (get_frame_register_unsigned (this_frame, NIOS2_SP_REGNUM),
1038 get_frame_pc (this_frame));
1041 /* Implement the push_dummy_call gdbarch method. */
1044 nios2_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1045 struct regcache *regcache, CORE_ADDR bp_addr,
1046 int nargs, struct value **args, CORE_ADDR sp,
1047 int struct_return, CORE_ADDR struct_addr)
1053 int stack_offset = 0;
1054 CORE_ADDR func_addr = find_function_addr (function, NULL);
1055 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1057 /* Set the return address register to point to the entry point of
1058 the program, where a breakpoint lies in wait. */
1059 regcache_cooked_write_signed (regcache, NIOS2_RA_REGNUM, bp_addr);
1061 /* Now make space on the stack for the args. */
1062 for (argnum = 0; argnum < nargs; argnum++)
1063 len += align_up (TYPE_LENGTH (value_type (args[argnum])), 4);
1066 /* Initialize the register pointer. */
1067 argreg = NIOS2_FIRST_ARGREG;
1069 /* The struct_return pointer occupies the first parameter-passing
1072 regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
1074 /* Now load as many as possible of the first arguments into
1075 registers, and push the rest onto the stack. Loop through args
1076 from first to last. */
1077 for (argnum = 0; argnum < nargs; argnum++)
1079 const gdb_byte *val;
1080 gdb_byte valbuf[MAX_REGISTER_SIZE];
1081 struct value *arg = args[argnum];
1082 struct type *arg_type = check_typedef (value_type (arg));
1083 int len = TYPE_LENGTH (arg_type);
1084 enum type_code typecode = TYPE_CODE (arg_type);
1086 val = value_contents (arg);
1088 /* Copy the argument to general registers or the stack in
1089 register-sized pieces. Large arguments are split between
1090 registers and stack. */
1093 int partial_len = (len < 4 ? len : 4);
1095 if (argreg <= NIOS2_LAST_ARGREG)
1097 /* The argument is being passed in a register. */
1098 CORE_ADDR regval = extract_unsigned_integer (val, partial_len,
1101 regcache_cooked_write_unsigned (regcache, argreg, regval);
1106 /* The argument is being passed on the stack. */
1107 CORE_ADDR addr = sp + stack_offset;
1109 write_memory (addr, val, partial_len);
1110 stack_offset += align_up (partial_len, 4);
1118 regcache_cooked_write_signed (regcache, NIOS2_SP_REGNUM, sp);
1120 /* Return adjusted stack pointer. */
1124 /* Implement the unwind_pc gdbarch method. */
1127 nios2_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1131 frame_unwind_register (next_frame, NIOS2_PC_REGNUM, buf);
1132 return extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr);
1135 /* Implement the unwind_sp gdbarch method. */
1138 nios2_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
1140 return frame_unwind_register_unsigned (this_frame, NIOS2_SP_REGNUM);
1143 /* Use prologue analysis to fill in the register cache
1144 *THIS_PROLOGUE_CACHE for THIS_FRAME. This function initializes
1145 *THIS_PROLOGUE_CACHE first. */
1147 static struct nios2_unwind_cache *
1148 nios2_frame_unwind_cache (struct frame_info *this_frame,
1149 void **this_prologue_cache)
1151 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1152 CORE_ADDR current_pc;
1153 struct nios2_unwind_cache *cache;
1156 if (*this_prologue_cache)
1157 return *this_prologue_cache;
1159 cache = FRAME_OBSTACK_ZALLOC (struct nios2_unwind_cache);
1160 *this_prologue_cache = cache;
1162 /* Zero all fields. */
1163 nios2_init_cache (cache, get_frame_func (this_frame));
1165 /* Prologue analysis does the rest... */
1166 current_pc = get_frame_pc (this_frame);
1168 nios2_analyze_prologue (gdbarch, cache->pc, current_pc, cache, this_frame);
1173 /* Implement the this_id function for the normal unwinder. */
1176 nios2_frame_this_id (struct frame_info *this_frame, void **this_cache,
1177 struct frame_id *this_id)
1179 struct nios2_unwind_cache *cache =
1180 nios2_frame_unwind_cache (this_frame, this_cache);
1182 /* This marks the outermost frame. */
1183 if (cache->base == 0)
1186 *this_id = frame_id_build (cache->cfa, cache->pc);
1189 /* Implement the prev_register function for the normal unwinder. */
1191 static struct value *
1192 nios2_frame_prev_register (struct frame_info *this_frame, void **this_cache,
1195 struct nios2_unwind_cache *cache =
1196 nios2_frame_unwind_cache (this_frame, this_cache);
1198 gdb_assert (regnum >= 0 && regnum < NIOS2_NUM_REGS);
1200 /* The PC of the previous frame is stored in the RA register of
1201 the current frame. Frob regnum so that we pull the value from
1202 the correct place. */
1203 if (regnum == NIOS2_PC_REGNUM)
1204 regnum = cache->return_regnum;
1206 if (regnum == NIOS2_SP_REGNUM && cache->cfa)
1207 return frame_unwind_got_constant (this_frame, regnum, cache->cfa);
1209 /* If we've worked out where a register is stored then load it from
1211 if (cache->reg_saved[regnum].basereg == NIOS2_Z_REGNUM)
1212 return frame_unwind_got_memory (this_frame, regnum,
1213 cache->reg_saved[regnum].addr);
1215 return frame_unwind_got_register (this_frame, regnum, regnum);
1218 /* Implement the this_base, this_locals, and this_args hooks
1219 for the normal unwinder. */
1222 nios2_frame_base_address (struct frame_info *this_frame, void **this_cache)
1224 struct nios2_unwind_cache *info
1225 = nios2_frame_unwind_cache (this_frame, this_cache);
1230 /* Data structures for the normal prologue-analysis-based
1233 static const struct frame_unwind nios2_frame_unwind =
1236 default_frame_unwind_stop_reason,
1237 nios2_frame_this_id,
1238 nios2_frame_prev_register,
1240 default_frame_sniffer
1243 static const struct frame_base nios2_frame_base =
1245 &nios2_frame_unwind,
1246 nios2_frame_base_address,
1247 nios2_frame_base_address,
1248 nios2_frame_base_address
1251 /* Fill in the register cache *THIS_CACHE for THIS_FRAME for use
1252 in the stub unwinder. */
1254 static struct trad_frame_cache *
1255 nios2_stub_frame_cache (struct frame_info *this_frame, void **this_cache)
1258 CORE_ADDR start_addr;
1259 CORE_ADDR stack_addr;
1260 struct trad_frame_cache *this_trad_cache;
1261 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1262 int num_regs = gdbarch_num_regs (gdbarch);
1264 if (*this_cache != NULL)
1266 this_trad_cache = trad_frame_cache_zalloc (this_frame);
1267 *this_cache = this_trad_cache;
1269 /* The return address is in the link register. */
1270 trad_frame_set_reg_realreg (this_trad_cache,
1271 gdbarch_pc_regnum (gdbarch),
1274 /* Frame ID, since it's a frameless / stackless function, no stack
1275 space is allocated and SP on entry is the current SP. */
1276 pc = get_frame_pc (this_frame);
1277 find_pc_partial_function (pc, NULL, &start_addr, NULL);
1278 stack_addr = get_frame_register_unsigned (this_frame, NIOS2_SP_REGNUM);
1279 trad_frame_set_id (this_trad_cache, frame_id_build (start_addr, stack_addr));
1280 /* Assume that the frame's base is the same as the stack pointer. */
1281 trad_frame_set_this_base (this_trad_cache, stack_addr);
1283 return this_trad_cache;
1286 /* Implement the this_id function for the stub unwinder. */
1289 nios2_stub_frame_this_id (struct frame_info *this_frame, void **this_cache,
1290 struct frame_id *this_id)
1292 struct trad_frame_cache *this_trad_cache
1293 = nios2_stub_frame_cache (this_frame, this_cache);
1295 trad_frame_get_id (this_trad_cache, this_id);
1298 /* Implement the prev_register function for the stub unwinder. */
1300 static struct value *
1301 nios2_stub_frame_prev_register (struct frame_info *this_frame,
1302 void **this_cache, int regnum)
1304 struct trad_frame_cache *this_trad_cache
1305 = nios2_stub_frame_cache (this_frame, this_cache);
1307 return trad_frame_get_register (this_trad_cache, this_frame, regnum);
1310 /* Implement the sniffer function for the stub unwinder.
1311 This unwinder is used for cases where the normal
1312 prologue-analysis-based unwinder can't work,
1313 such as PLT stubs. */
1316 nios2_stub_frame_sniffer (const struct frame_unwind *self,
1317 struct frame_info *this_frame, void **cache)
1320 struct obj_section *s;
1321 CORE_ADDR pc = get_frame_address_in_block (this_frame);
1323 /* Use the stub unwinder for unreadable code. */
1324 if (target_read_memory (get_frame_pc (this_frame), dummy, 4) != 0)
1327 if (in_plt_section (pc, NULL))
1333 /* Implement the this_base, this_locals, and this_args hooks
1334 for the stub unwinder. */
1337 nios2_stub_frame_base_address (struct frame_info *this_frame, void **this_cache)
1339 struct trad_frame_cache *this_trad_cache
1340 = nios2_stub_frame_cache (this_frame, this_cache);
1342 return trad_frame_get_this_base (this_trad_cache);
1345 /* Define the data structures for the stub unwinder. */
1347 static const struct frame_unwind nios2_stub_frame_unwind =
1350 default_frame_unwind_stop_reason,
1351 nios2_stub_frame_this_id,
1352 nios2_stub_frame_prev_register,
1354 nios2_stub_frame_sniffer
1357 static const struct frame_base nios2_stub_frame_base =
1359 &nios2_stub_frame_unwind,
1360 nios2_stub_frame_base_address,
1361 nios2_stub_frame_base_address,
1362 nios2_stub_frame_base_address
1365 /* Helper function to read an instruction at PC. */
1367 static unsigned long
1368 nios2_fetch_instruction (struct gdbarch *gdbarch, CORE_ADDR pc)
1370 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1372 return read_memory_unsigned_integer (pc, NIOS2_OPCODE_SIZE, byte_order);
1375 /* Determine where to set a single step breakpoint while considering
1376 branch prediction. */
1379 nios2_get_next_pc (struct frame_info *frame, CORE_ADDR pc)
1381 struct gdbarch *gdbarch = get_frame_arch (frame);
1382 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1393 inst = nios2_fetch_instruction (gdbarch, pc);
1394 pc += NIOS2_OPCODE_SIZE;
1396 imm16 = (short) GET_IW_IMM16 (inst);
1397 ra = GET_IW_A (inst);
1398 rb = GET_IW_B (inst);
1399 ras = get_frame_register_signed (frame, ra);
1400 rbs = get_frame_register_signed (frame, rb);
1401 rau = get_frame_register_unsigned (frame, ra);
1402 rbu = get_frame_register_unsigned (frame, rb);
1404 switch (GET_IW_OP (inst))
1442 pc = (pc & 0xf0000000) | (GET_IW_IMM26 (inst) << 2);
1446 switch (GET_IW_OPX (inst))
1455 if (tdep->syscall_next_pc != NULL)
1456 return tdep->syscall_next_pc (frame);
1468 /* Implement the software_single_step gdbarch method. */
1471 nios2_software_single_step (struct frame_info *frame)
1473 struct gdbarch *gdbarch = get_frame_arch (frame);
1474 struct address_space *aspace = get_frame_address_space (frame);
1475 CORE_ADDR next_pc = nios2_get_next_pc (frame, get_frame_pc (frame));
1477 insert_single_step_breakpoint (gdbarch, aspace, next_pc);
1482 /* Implement the get_longjump_target gdbarch method. */
1485 nios2_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
1487 struct gdbarch *gdbarch = get_frame_arch (frame);
1488 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1489 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1490 CORE_ADDR jb_addr = get_frame_register_unsigned (frame, NIOS2_R4_REGNUM);
1493 if (target_read_memory (jb_addr + (tdep->jb_pc * 4), buf, 4))
1496 *pc = extract_unsigned_integer (buf, 4, byte_order);
1500 /* Initialize the Nios II gdbarch. */
1502 static struct gdbarch *
1503 nios2_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1505 struct gdbarch *gdbarch;
1506 struct gdbarch_tdep *tdep;
1507 int register_bytes, i;
1508 struct tdesc_arch_data *tdesc_data = NULL;
1509 const struct target_desc *tdesc = info.target_desc;
1511 if (!tdesc_has_registers (tdesc))
1512 /* Pick a default target description. */
1513 tdesc = tdesc_nios2;
1515 /* Check any target description for validity. */
1516 if (tdesc_has_registers (tdesc))
1518 const struct tdesc_feature *feature;
1521 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.nios2.cpu");
1522 if (feature == NULL)
1525 tdesc_data = tdesc_data_alloc ();
1529 for (i = 0; i < NIOS2_NUM_REGS; i++)
1530 valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
1531 nios2_reg_names[i]);
1535 tdesc_data_cleanup (tdesc_data);
1540 /* Find a candidate among the list of pre-declared architectures. */
1541 arches = gdbarch_list_lookup_by_info (arches, &info);
1543 return arches->gdbarch;
1545 /* None found, create a new architecture from the information
1547 tdep = xcalloc (1, sizeof (struct gdbarch_tdep));
1548 gdbarch = gdbarch_alloc (&info, tdep);
1550 /* longjmp support not enabled by default. */
1553 /* Data type sizes. */
1554 set_gdbarch_ptr_bit (gdbarch, 32);
1555 set_gdbarch_addr_bit (gdbarch, 32);
1556 set_gdbarch_short_bit (gdbarch, 16);
1557 set_gdbarch_int_bit (gdbarch, 32);
1558 set_gdbarch_long_bit (gdbarch, 32);
1559 set_gdbarch_long_long_bit (gdbarch, 64);
1560 set_gdbarch_float_bit (gdbarch, 32);
1561 set_gdbarch_double_bit (gdbarch, 64);
1563 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1564 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1566 /* The register set. */
1567 set_gdbarch_num_regs (gdbarch, NIOS2_NUM_REGS);
1568 set_gdbarch_sp_regnum (gdbarch, NIOS2_SP_REGNUM);
1569 set_gdbarch_pc_regnum (gdbarch, NIOS2_PC_REGNUM); /* Pseudo register PC */
1571 set_gdbarch_register_name (gdbarch, nios2_register_name);
1572 set_gdbarch_register_type (gdbarch, nios2_register_type);
1574 /* Provide register mappings for stabs and dwarf2. */
1575 set_gdbarch_stab_reg_to_regnum (gdbarch, nios2_dwarf_reg_to_regnum);
1576 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, nios2_dwarf_reg_to_regnum);
1578 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1580 /* Call dummy code. */
1581 set_gdbarch_frame_align (gdbarch, nios2_frame_align);
1583 set_gdbarch_return_value (gdbarch, nios2_return_value);
1585 set_gdbarch_skip_prologue (gdbarch, nios2_skip_prologue);
1586 set_gdbarch_in_function_epilogue_p (gdbarch, nios2_in_function_epilogue_p);
1587 set_gdbarch_breakpoint_from_pc (gdbarch, nios2_breakpoint_from_pc);
1589 set_gdbarch_dummy_id (gdbarch, nios2_dummy_id);
1590 set_gdbarch_unwind_pc (gdbarch, nios2_unwind_pc);
1591 set_gdbarch_unwind_sp (gdbarch, nios2_unwind_sp);
1593 /* The dwarf2 unwinder will normally produce the best results if
1594 the debug information is available, so register it first. */
1595 dwarf2_append_unwinders (gdbarch);
1596 frame_unwind_append_unwinder (gdbarch, &nios2_stub_frame_unwind);
1597 frame_unwind_append_unwinder (gdbarch, &nios2_frame_unwind);
1599 /* Single stepping. */
1600 set_gdbarch_software_single_step (gdbarch, nios2_software_single_step);
1602 /* Hook in ABI-specific overrides, if they have been registered. */
1603 gdbarch_init_osabi (info, gdbarch);
1605 if (tdep->jb_pc >= 0)
1606 set_gdbarch_get_longjmp_target (gdbarch, nios2_get_longjmp_target);
1608 frame_base_set_default (gdbarch, &nios2_frame_base);
1610 set_gdbarch_print_insn (gdbarch, nios2_print_insn);
1612 /* Enable inferior call support. */
1613 set_gdbarch_push_dummy_call (gdbarch, nios2_push_dummy_call);
1616 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
1621 extern initialize_file_ftype _initialize_nios2_tdep; /* -Wmissing-prototypes */
1624 _initialize_nios2_tdep (void)
1626 gdbarch_register (bfd_arch_nios2, nios2_gdbarch_init, NULL);
1627 initialize_tdesc_nios2 ();
1629 /* Allow debugging this file's internals. */
1630 add_setshow_boolean_cmd ("nios2", class_maintenance, &nios2_debug,
1631 _("Set Nios II debugging."),
1632 _("Show Nios II debugging."),
1633 _("When on, Nios II specific debugging is enabled."),
1636 &setdebuglist, &showdebuglist);