1 /* Target-dependent code for Morpho mt processor, for GDB.
3 Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 /* Contributed by Michael Snyder, msnyder@redhat.com. */
24 #include "frame-unwind.h"
25 #include "frame-base.h"
28 #include "arch-utils.h"
30 #include "gdb_string.h"
32 #include "reggroups.h"
34 #include "trad-frame.h"
36 #include "dwarf2-frame.h"
38 #include "gdb_assert.h"
42 enum mt_arch_constants
44 MT_MAX_STRUCT_SIZE = 16
49 MT_R0_REGNUM, /* 32 bit regs. */
51 MT_1ST_ARGREG = MT_R1_REGNUM,
55 MT_LAST_ARGREG = MT_R4_REGNUM,
64 MT_FP_REGNUM = MT_R12_REGNUM,
66 MT_SP_REGNUM = MT_R13_REGNUM,
68 MT_RA_REGNUM = MT_R14_REGNUM,
70 MT_IRA_REGNUM = MT_R15_REGNUM,
73 /* Interrupt Enable pseudo-register, exported by SID. */
75 /* End of CPU regs. */
79 /* Co-processor registers. */
80 MT_COPRO_REGNUM = MT_NUM_CPU_REGS, /* 16 bit regs. */
97 MT_BYPA_REGNUM, /* 32 bit regs. */
101 MT_CONTEXT_REGNUM, /* 38 bits (treat as array of
103 MT_MAC_REGNUM, /* 32 bits. */
104 MT_Z1_REGNUM, /* 16 bits. */
105 MT_Z2_REGNUM, /* 16 bits. */
106 MT_ICHANNEL_REGNUM, /* 32 bits. */
107 MT_ISCRAMB_REGNUM, /* 32 bits. */
108 MT_QSCRAMB_REGNUM, /* 32 bits. */
109 MT_OUT_REGNUM, /* 16 bits. */
110 MT_EXMAC_REGNUM, /* 32 bits (8 used). */
111 MT_QCHANNEL_REGNUM, /* 32 bits. */
112 MT_ZI2_REGNUM, /* 16 bits. */
113 MT_ZQ2_REGNUM, /* 16 bits. */
114 MT_CHANNEL2_REGNUM, /* 32 bits. */
115 MT_ISCRAMB2_REGNUM, /* 32 bits. */
116 MT_QSCRAMB2_REGNUM, /* 32 bits. */
117 MT_QCHANNEL2_REGNUM, /* 32 bits. */
119 /* Number of real registers. */
122 /* Pseudo-registers. */
123 MT_COPRO_PSEUDOREG_REGNUM = MT_NUM_REGS,
124 MT_MAC_PSEUDOREG_REGNUM,
125 MT_COPRO_PSEUDOREG_ARRAY,
127 MT_COPRO_PSEUDOREG_DIM_1 = 2,
128 MT_COPRO_PSEUDOREG_DIM_2 = 8,
129 /* The number of pseudo-registers for each coprocessor. These
130 include the real coprocessor registers, the pseudo-registe for
131 the coprocessor number, and the pseudo-register for the MAC. */
132 MT_COPRO_PSEUDOREG_REGS = MT_NUM_REGS - MT_NUM_CPU_REGS + 2,
133 /* The register number of the MAC, relative to a given coprocessor. */
134 MT_COPRO_PSEUDOREG_MAC_REGNUM = MT_COPRO_PSEUDOREG_REGS - 1,
136 /* Two pseudo-regs ('coprocessor' and 'mac'). */
137 MT_NUM_PSEUDO_REGS = 2 + (MT_COPRO_PSEUDOREG_REGS
138 * MT_COPRO_PSEUDOREG_DIM_1
139 * MT_COPRO_PSEUDOREG_DIM_2)
142 /* Return name of register number specified by REGNUM. */
145 mt_register_name (struct gdbarch *gdbarch, int regnum)
147 static const char *const register_names[] = {
149 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
150 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
152 /* Co-processor regs. */
153 "", /* copro register. */
154 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
155 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",
156 "bypa", "bypb", "bypc", "flag", "context", "" /* mac. */ , "z1", "z2",
157 "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac. */ , "Qchannel",
158 "zi2", "zq2", "Ichannel2", "Iscramb2", "Qscramb2", "Qchannel2",
159 /* Pseudo-registers. */
162 static const char *array_names[MT_COPRO_PSEUDOREG_REGS
163 * MT_COPRO_PSEUDOREG_DIM_1
164 * MT_COPRO_PSEUDOREG_DIM_2];
168 if (regnum < ARRAY_SIZE (register_names))
169 return register_names[regnum];
170 if (array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY])
171 return array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY];
180 regnum -= MT_COPRO_PSEUDOREG_ARRAY;
181 index = regnum % MT_COPRO_PSEUDOREG_REGS;
182 dim_2 = (regnum / MT_COPRO_PSEUDOREG_REGS) % MT_COPRO_PSEUDOREG_DIM_2;
183 dim_1 = ((regnum / MT_COPRO_PSEUDOREG_REGS / MT_COPRO_PSEUDOREG_DIM_2)
184 % MT_COPRO_PSEUDOREG_DIM_1);
186 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
187 stub = register_names[MT_MAC_PSEUDOREG_REGNUM];
188 else if (index >= MT_NUM_REGS - MT_CPR0_REGNUM)
191 stub = register_names[index + MT_CPR0_REGNUM];
194 array_names[regnum] = stub;
198 sprintf (name, "copro_%d_%d_%s", dim_1, dim_2, stub);
199 array_names[regnum] = name;
204 /* Return the type of a coprocessor register. */
207 mt_copro_register_type (struct gdbarch *arch, int regnum)
211 case MT_INT_ENABLE_REGNUM:
212 case MT_ICHANNEL_REGNUM:
213 case MT_QCHANNEL_REGNUM:
214 case MT_ISCRAMB_REGNUM:
215 case MT_QSCRAMB_REGNUM:
216 return builtin_type_int32;
225 return builtin_type_int16;
226 case MT_EXMAC_REGNUM:
228 return builtin_type_uint32;
229 case MT_CONTEXT_REGNUM:
230 return builtin_type (arch)->builtin_long_long;
232 return builtin_type (arch)->builtin_unsigned_char;
234 if (regnum >= MT_CPR0_REGNUM && regnum <= MT_CPR15_REGNUM)
235 return builtin_type_int16;
236 else if (regnum == MT_CPR0_REGNUM + MT_COPRO_PSEUDOREG_MAC_REGNUM)
238 if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2
239 || gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2)
240 return builtin_type_uint64;
242 return builtin_type_uint32;
245 return builtin_type_uint32;
249 /* Given ARCH and a register number specified by REGNUM, return the
250 type of that register. */
253 mt_register_type (struct gdbarch *arch, int regnum)
255 static struct type *copro_type = NULL;
257 if (regnum >= 0 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS)
259 if (copro_type == NULL)
260 copro_type = lookup_array_range_type (builtin_type_int16, 0, 1);
266 return builtin_type (arch)->builtin_func_ptr;
269 return builtin_type (arch)->builtin_data_ptr;
270 case MT_COPRO_REGNUM:
271 case MT_COPRO_PSEUDOREG_REGNUM:
273 case MT_MAC_PSEUDOREG_REGNUM:
274 return mt_copro_register_type (arch,
276 + MT_COPRO_PSEUDOREG_MAC_REGNUM);
278 if (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM)
279 return builtin_type_int32;
280 else if (regnum < MT_COPRO_PSEUDOREG_ARRAY)
281 return mt_copro_register_type (arch, regnum);
284 regnum -= MT_COPRO_PSEUDOREG_ARRAY;
285 regnum %= MT_COPRO_PSEUDOREG_REGS;
286 regnum += MT_CPR0_REGNUM;
287 return mt_copro_register_type (arch, regnum);
291 internal_error (__FILE__, __LINE__,
292 _("mt_register_type: illegal register number %d"), regnum);
295 /* Return true if register REGNUM is a member of the register group
296 specified by GROUP. */
299 mt_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
300 struct reggroup *group)
302 /* Groups of registers that can be displayed via "info reg". */
303 if (group == all_reggroup)
305 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS
306 && mt_register_name (gdbarch, regnum)[0] != '\0');
308 if (group == general_reggroup)
309 return (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM);
311 if (group == float_reggroup)
312 return 0; /* No float regs. */
314 if (group == vector_reggroup)
315 return 0; /* No vector regs. */
317 /* For any that are not handled above. */
318 return default_register_reggroup_p (gdbarch, regnum, group);
321 /* Return the return value convention used for a given type TYPE.
322 Optionally, fetch or set the return value via READBUF or
323 WRITEBUF respectively using REGCACHE for the register
326 static enum return_value_convention
327 mt_return_value (struct gdbarch *gdbarch, struct type *func_type,
328 struct type *type, struct regcache *regcache,
329 gdb_byte *readbuf, const gdb_byte *writebuf)
331 if (TYPE_LENGTH (type) > 4)
333 /* Return values > 4 bytes are returned in memory,
334 pointed to by R11. */
339 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
340 read_memory (addr, readbuf, TYPE_LENGTH (type));
347 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
348 write_memory (addr, writebuf, TYPE_LENGTH (type));
351 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
359 /* Return values of <= 4 bytes are returned in R11. */
360 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &temp);
361 store_unsigned_integer (readbuf, TYPE_LENGTH (type), temp);
366 if (TYPE_LENGTH (type) < 4)
369 /* Add leading zeros to the value. */
370 memset (buf, 0, sizeof (buf));
371 memcpy (buf + sizeof (buf) - TYPE_LENGTH (type),
372 writebuf, TYPE_LENGTH (type));
373 regcache_cooked_write (regcache, MT_R11_REGNUM, buf);
375 else /* (TYPE_LENGTH (type) == 4 */
376 regcache_cooked_write (regcache, MT_R11_REGNUM, writebuf);
379 return RETURN_VALUE_REGISTER_CONVENTION;
383 /* If the input address, PC, is in a function prologue, return the
384 address of the end of the prologue, otherwise return the input
387 Note: PC is likely to be the function start, since this function
388 is mainly used for advancing a breakpoint to the first line, or
389 stepping to the first line when we have stepped into a function
393 mt_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
395 CORE_ADDR func_addr = 0, func_end = 0;
399 if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end))
401 struct symtab_and_line sal;
404 /* Found a function. */
405 sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL);
406 if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
408 /* Don't use this trick for assembly source files. */
409 sal = find_pc_line (func_addr, 0);
411 if (sal.end && sal.end < func_end)
413 /* Found a line number, use it as end of prologue. */
419 /* No function symbol, or no line symbol. Use prologue scanning method. */
422 instr = read_memory_unsigned_integer (pc, 4);
423 if (instr == 0x12000000) /* nop */
425 if (instr == 0x12ddc000) /* copy sp into fp */
428 if (instr == 0x05dd) /* subi sp, sp, imm */
430 if (instr >= 0x43c0 && instr <= 0x43df) /* push */
432 /* Not an obvious prologue instruction. */
439 /* The breakpoint instruction must be the same size as the smallest
440 instruction in the instruction set.
442 The BP for ms1 is defined as 0x68000000 (BREAK).
443 The BP for ms2 is defined as 0x69000000 (illegal) */
445 static const gdb_byte *
446 mt_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
449 static gdb_byte ms1_breakpoint[] = { 0x68, 0, 0, 0 };
450 static gdb_byte ms2_breakpoint[] = { 0x69, 0, 0, 0 };
453 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
454 return ms2_breakpoint;
456 return ms1_breakpoint;
459 /* Select the correct coprocessor register bank. Return the pseudo
460 regnum we really want to read. */
463 mt_select_coprocessor (struct gdbarch *gdbarch,
464 struct regcache *regcache, int regno)
466 unsigned index, base;
469 /* Get the copro pseudo regnum. */
470 regcache_raw_read (regcache, MT_COPRO_REGNUM, copro);
471 base = (extract_signed_integer (&copro[0], 2) * MT_COPRO_PSEUDOREG_DIM_2
472 + extract_signed_integer (&copro[2], 2));
474 regno -= MT_COPRO_PSEUDOREG_ARRAY;
475 index = regno % MT_COPRO_PSEUDOREG_REGS;
476 regno /= MT_COPRO_PSEUDOREG_REGS;
479 /* Select the correct coprocessor register bank. Invalidate the
480 coprocessor register cache. */
483 store_signed_integer (&copro[0], 2, regno / MT_COPRO_PSEUDOREG_DIM_2);
484 store_signed_integer (&copro[2], 2, regno % MT_COPRO_PSEUDOREG_DIM_2);
485 regcache_raw_write (regcache, MT_COPRO_REGNUM, copro);
487 /* We must flush the cache, as it is now invalid. */
488 for (ix = MT_NUM_CPU_REGS; ix != MT_NUM_REGS; ix++)
489 regcache_invalidate (regcache, ix);
495 /* Fetch the pseudo registers:
497 There are two regular pseudo-registers:
498 1) The 'coprocessor' pseudo-register (which mirrors the
499 "real" coprocessor register sent by the target), and
500 2) The 'MAC' pseudo-register (which represents the union
501 of the original 32 bit target MAC register and the new
502 8-bit extended-MAC register).
504 Additionally there is an array of coprocessor registers which track
505 the coprocessor registers for each coprocessor. */
508 mt_pseudo_register_read (struct gdbarch *gdbarch,
509 struct regcache *regcache, int regno, gdb_byte *buf)
513 case MT_COPRO_REGNUM:
514 case MT_COPRO_PSEUDOREG_REGNUM:
515 regcache_raw_read (regcache, MT_COPRO_REGNUM, buf);
518 case MT_MAC_PSEUDOREG_REGNUM:
519 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
520 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
522 ULONGEST oldmac = 0, ext_mac = 0;
525 regcache_cooked_read_unsigned (regcache, MT_MAC_REGNUM, &oldmac);
526 regcache_cooked_read_unsigned (regcache, MT_EXMAC_REGNUM, &ext_mac);
528 (oldmac & 0xffffffff) | ((long long) (ext_mac & 0xff) << 32);
529 store_signed_integer (buf, 8, newmac);
532 regcache_raw_read (regcache, MT_MAC_REGNUM, buf);
536 unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
538 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
539 mt_pseudo_register_read (gdbarch, regcache,
540 MT_MAC_PSEUDOREG_REGNUM, buf);
541 else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
542 regcache_raw_read (regcache, index + MT_CPR0_REGNUM, buf);
548 /* Write the pseudo registers:
550 Mt pseudo-registers are stored directly to the target. The
551 'coprocessor' register is special, because when it is modified, all
552 the other coprocessor regs must be flushed from the reg cache. */
555 mt_pseudo_register_write (struct gdbarch *gdbarch,
556 struct regcache *regcache,
557 int regno, const gdb_byte *buf)
563 case MT_COPRO_REGNUM:
564 case MT_COPRO_PSEUDOREG_REGNUM:
565 regcache_raw_write (regcache, MT_COPRO_REGNUM, buf);
566 for (i = MT_NUM_CPU_REGS; i < MT_NUM_REGS; i++)
567 regcache_invalidate (regcache, i);
570 case MT_MAC_PSEUDOREG_REGNUM:
571 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
572 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
574 /* The 8-byte MAC pseudo-register must be broken down into two
575 32-byte registers. */
576 unsigned int oldmac, ext_mac;
579 newmac = extract_unsigned_integer (buf, 8);
580 oldmac = newmac & 0xffffffff;
581 ext_mac = (newmac >> 32) & 0xff;
582 regcache_cooked_write_unsigned (regcache, MT_MAC_REGNUM, oldmac);
583 regcache_cooked_write_unsigned (regcache, MT_EXMAC_REGNUM, ext_mac);
586 regcache_raw_write (regcache, MT_MAC_REGNUM, buf);
590 unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
592 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
593 mt_pseudo_register_write (gdbarch, regcache,
594 MT_MAC_PSEUDOREG_REGNUM, buf);
595 else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
596 regcache_raw_write (regcache, index + MT_CPR0_REGNUM, buf);
603 mt_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
605 /* Register size is 4 bytes. */
606 return align_down (sp, 4);
609 /* Implements the "info registers" command. When ``all'' is non-zero,
610 the coprocessor registers will be printed in addition to the rest
614 mt_registers_info (struct gdbarch *gdbarch,
615 struct ui_file *file,
616 struct frame_info *frame, int regnum, int all)
622 lim = all ? MT_NUM_REGS : MT_NUM_CPU_REGS;
624 for (regnum = 0; regnum < lim; regnum++)
626 /* Don't display the Qchannel register since it will be displayed
627 along with Ichannel. (See below.) */
628 if (regnum == MT_QCHANNEL_REGNUM)
631 mt_registers_info (gdbarch, file, frame, regnum, all);
633 /* Display the Qchannel register immediately after Ichannel. */
634 if (regnum == MT_ICHANNEL_REGNUM)
635 mt_registers_info (gdbarch, file, frame, MT_QCHANNEL_REGNUM, all);
640 if (regnum == MT_EXMAC_REGNUM)
642 else if (regnum == MT_CONTEXT_REGNUM)
644 /* Special output handling for 38-bit context register. */
646 unsigned int *bytes, i, regsize;
648 regsize = register_size (gdbarch, regnum);
650 buff = alloca (regsize);
651 bytes = alloca (regsize * sizeof (*bytes));
653 frame_register_read (frame, regnum, buff);
655 fputs_filtered (gdbarch_register_name
656 (gdbarch, regnum), file);
657 print_spaces_filtered (15 - strlen (gdbarch_register_name
660 fputs_filtered ("0x", file);
662 for (i = 0; i < regsize; i++)
663 fprintf_filtered (file, "%02x", (unsigned int)
664 extract_unsigned_integer (buff + i, 1));
665 fputs_filtered ("\t", file);
666 print_longest (file, 'd', 0,
667 extract_unsigned_integer (buff, regsize));
668 fputs_filtered ("\n", file);
670 else if (regnum == MT_COPRO_REGNUM
671 || regnum == MT_COPRO_PSEUDOREG_REGNUM)
673 /* Special output handling for the 'coprocessor' register. */
675 struct value_print_options opts;
677 buf = alloca (register_size (gdbarch, MT_COPRO_REGNUM));
678 frame_register_read (frame, MT_COPRO_REGNUM, buf);
680 regnum = MT_COPRO_PSEUDOREG_REGNUM;
681 fputs_filtered (gdbarch_register_name (gdbarch, regnum),
683 print_spaces_filtered (15 - strlen (gdbarch_register_name
686 get_raw_print_options (&opts);
688 val_print (register_type (gdbarch, regnum), buf,
689 0, 0, file, 0, &opts,
691 fputs_filtered ("\n", file);
693 else if (regnum == MT_MAC_REGNUM || regnum == MT_MAC_PSEUDOREG_REGNUM)
695 ULONGEST oldmac, ext_mac, newmac;
696 gdb_byte buf[3 * sizeof (LONGEST)];
698 /* Get the two "real" mac registers. */
699 frame_register_read (frame, MT_MAC_REGNUM, buf);
700 oldmac = extract_unsigned_integer
701 (buf, register_size (gdbarch, MT_MAC_REGNUM));
702 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
703 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
705 frame_register_read (frame, MT_EXMAC_REGNUM, buf);
706 ext_mac = extract_unsigned_integer
707 (buf, register_size (gdbarch, MT_EXMAC_REGNUM));
712 /* Add them together. */
713 newmac = (oldmac & 0xffffffff) + ((ext_mac & 0xff) << 32);
716 regnum = MT_MAC_PSEUDOREG_REGNUM;
717 fputs_filtered (gdbarch_register_name (gdbarch, regnum),
719 print_spaces_filtered (15 - strlen (gdbarch_register_name
722 fputs_filtered ("0x", file);
723 print_longest (file, 'x', 0, newmac);
724 fputs_filtered ("\t", file);
725 print_longest (file, 'u', 0, newmac);
726 fputs_filtered ("\n", file);
729 default_print_registers_info (gdbarch, file, frame, regnum, all);
733 /* Set up the callee's arguments for an inferior function call. The
734 arguments are pushed on the stack or are placed in registers as
735 appropriate. It also sets up the return address (which points to
736 the call dummy breakpoint).
738 Returns the updated (and aligned) stack pointer. */
741 mt_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
742 struct regcache *regcache, CORE_ADDR bp_addr,
743 int nargs, struct value **args, CORE_ADDR sp,
744 int struct_return, CORE_ADDR struct_addr)
747 gdb_byte buf[MT_MAX_STRUCT_SIZE];
748 int argreg = MT_1ST_ARGREG;
749 int split_param_len = 0;
755 /* First handle however many args we can fit into MT_1ST_ARGREG thru
757 for (i = 0; i < nargs && argreg <= MT_LAST_ARGREG; i++)
760 typelen = TYPE_LENGTH (value_type (args[i]));
767 regcache_cooked_write_unsigned (regcache, argreg++,
768 extract_unsigned_integer
769 (value_contents (args[i]),
775 val = value_contents (args[i]);
778 if (argreg <= MT_LAST_ARGREG)
780 /* This word of the argument is passed in a register. */
781 regcache_cooked_write_unsigned (regcache, argreg++,
782 extract_unsigned_integer
789 /* Remainder of this arg must be passed on the stack
790 (deferred to do later). */
791 split_param_len = typelen;
792 memcpy (buf, val, typelen);
793 break; /* No more args can be handled in regs. */
798 /* By reverse engineering of gcc output, args bigger than
799 16 bytes go on the stack, and their address is passed
801 stack_dest -= typelen;
802 write_memory (stack_dest, value_contents (args[i]), typelen);
803 regcache_cooked_write_unsigned (regcache, argreg++, stack_dest);
808 /* Next, the rest of the arguments go onto the stack, in reverse order. */
809 for (j = nargs - 1; j >= i; j--)
813 /* Right-justify the value in an aligned-length buffer. */
814 typelen = TYPE_LENGTH (value_type (args[j]));
815 slacklen = (wordsize - (typelen % wordsize)) % wordsize;
816 val = alloca (typelen + slacklen);
817 memcpy (val, value_contents (args[j]), typelen);
818 memset (val + typelen, 0, slacklen);
819 /* Now write this data to the stack. */
820 stack_dest -= typelen + slacklen;
821 write_memory (stack_dest, val, typelen + slacklen);
824 /* Finally, if a param needs to be split between registers and stack,
825 write the second half to the stack now. */
826 if (split_param_len != 0)
828 stack_dest -= split_param_len;
829 write_memory (stack_dest, buf, split_param_len);
832 /* Set up return address (provided to us as bp_addr). */
833 regcache_cooked_write_unsigned (regcache, MT_RA_REGNUM, bp_addr);
835 /* Store struct return address, if given. */
836 if (struct_return && struct_addr != 0)
837 regcache_cooked_write_unsigned (regcache, MT_R11_REGNUM, struct_addr);
839 /* Set aside 16 bytes for the callee to save regs 1-4. */
842 /* Update the stack pointer. */
843 regcache_cooked_write_unsigned (regcache, MT_SP_REGNUM, stack_dest);
845 /* And that should do it. Return the new stack pointer. */
850 /* The 'unwind_cache' data structure. */
852 struct mt_unwind_cache
854 /* The previous frame's inner most stack address.
855 Used as this frame ID's stack_addr. */
857 CORE_ADDR frame_base;
861 /* Table indicating the location of each and every register. */
862 struct trad_frame_saved_reg *saved_regs;
865 /* Initialize an unwind_cache. Build up the saved_regs table etc. for
868 static struct mt_unwind_cache *
869 mt_frame_unwind_cache (struct frame_info *this_frame,
870 void **this_prologue_cache)
872 struct gdbarch *gdbarch;
873 struct mt_unwind_cache *info;
874 CORE_ADDR next_addr, start_addr, end_addr, prologue_end_addr;
875 unsigned long instr, upper_half, delayed_store = 0;
879 if ((*this_prologue_cache))
880 return (*this_prologue_cache);
882 gdbarch = get_frame_arch (this_frame);
883 info = FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache);
884 (*this_prologue_cache) = info;
888 info->frame_base = 0;
889 info->frameless_p = 1;
890 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
892 /* Grab the frame-relative values of SP and FP, needed below.
893 The frame_saved_register function will find them on the
894 stack or in the registers as appropriate. */
895 sp = get_frame_register_unsigned (this_frame, MT_SP_REGNUM);
896 fp = get_frame_register_unsigned (this_frame, MT_FP_REGNUM);
898 start_addr = get_frame_func (this_frame);
900 /* Return early if GDB couldn't find the function. */
904 end_addr = get_frame_pc (this_frame);
905 prologue_end_addr = skip_prologue_using_sal (gdbarch, start_addr);
907 for (next_addr = start_addr; next_addr < end_addr; next_addr += 4)
909 instr = get_frame_memory_unsigned (this_frame, next_addr, 4);
910 if (delayed_store) /* previous instr was a push */
912 upper_half = delayed_store >> 16;
913 regnum = upper_half & 0xf;
914 offset = delayed_store & 0xffff;
915 switch (upper_half & 0xfff0)
917 case 0x43c0: /* push using frame pointer */
918 info->saved_regs[regnum].addr = offset;
920 case 0x43d0: /* push using stack pointer */
921 info->saved_regs[regnum].addr = offset;
931 case 0x12000000: /* NO-OP */
933 case 0x12ddc000: /* copy sp into fp */
934 info->frameless_p = 0; /* Record that the frame pointer is in use. */
937 upper_half = instr >> 16;
938 if (upper_half == 0x05dd || /* subi sp, sp, imm */
939 upper_half == 0x07dd) /* subui sp, sp, imm */
941 /* Record the frame size. */
942 info->framesize = instr & 0xffff;
945 if ((upper_half & 0xfff0) == 0x43c0 || /* frame push */
946 (upper_half & 0xfff0) == 0x43d0) /* stack push */
948 /* Save this instruction, but don't record the
949 pushed register as 'saved' until we see the
950 next instruction. That's because of deferred stores
951 on this target -- GDB won't be able to read the register
952 from the stack until one instruction later. */
953 delayed_store = instr;
956 /* Not a prologue instruction. Is this the end of the prologue?
957 This is the most difficult decision; when to stop scanning.
959 If we have no line symbol, then the best thing we can do
960 is to stop scanning when we encounter an instruction that
961 is not likely to be a part of the prologue.
963 But if we do have a line symbol, then we should
964 keep scanning until we reach it (or we reach end_addr). */
966 if (prologue_end_addr && (prologue_end_addr > (next_addr + 4)))
967 continue; /* Keep scanning, recording saved_regs etc. */
969 break; /* Quit scanning: breakpoint can be set here. */
973 /* Special handling for the "saved" address of the SP:
974 The SP is of course never saved on the stack at all, so
975 by convention what we put here is simply the previous
976 _value_ of the SP (as opposed to an address where the
977 previous value would have been pushed). This will also
978 give us the frame base address. */
980 if (info->frameless_p)
982 info->frame_base = sp + info->framesize;
983 info->prev_sp = sp + info->framesize;
987 info->frame_base = fp + info->framesize;
988 info->prev_sp = fp + info->framesize;
990 /* Save prev_sp in saved_regs as a value, not as an address. */
991 trad_frame_set_value (info->saved_regs, MT_SP_REGNUM, info->prev_sp);
993 /* Now convert frame offsets to actual addresses (not offsets). */
994 for (regnum = 0; regnum < MT_NUM_REGS; regnum++)
995 if (trad_frame_addr_p (info->saved_regs, regnum))
996 info->saved_regs[regnum].addr += info->frame_base - info->framesize;
998 /* The call instruction moves the caller's PC in the callee's RA reg.
999 Since this is an unwind, do the reverse. Copy the location of RA
1000 into PC (the address / regnum) so that a request for PC will be
1001 converted into a request for the RA. */
1002 info->saved_regs[MT_PC_REGNUM] = info->saved_regs[MT_RA_REGNUM];
1008 mt_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1012 pc = frame_unwind_register_unsigned (next_frame, MT_PC_REGNUM);
1017 mt_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1021 sp = frame_unwind_register_unsigned (next_frame, MT_SP_REGNUM);
1025 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1026 frame. The frame ID's base needs to match the TOS value saved by
1027 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1029 static struct frame_id
1030 mt_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1032 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MT_SP_REGNUM);
1033 return frame_id_build (sp, get_frame_pc (this_frame));
1036 /* Given a GDB frame, determine the address of the calling function's
1037 frame. This will be used to create a new GDB frame struct. */
1040 mt_frame_this_id (struct frame_info *this_frame,
1041 void **this_prologue_cache, struct frame_id *this_id)
1043 struct mt_unwind_cache *info =
1044 mt_frame_unwind_cache (this_frame, this_prologue_cache);
1046 if (!(info == NULL || info->prev_sp == 0))
1047 (*this_id) = frame_id_build (info->prev_sp, get_frame_func (this_frame));
1052 static struct value *
1053 mt_frame_prev_register (struct frame_info *this_frame,
1054 void **this_prologue_cache, int regnum)
1056 struct mt_unwind_cache *info =
1057 mt_frame_unwind_cache (this_frame, this_prologue_cache);
1059 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1063 mt_frame_base_address (struct frame_info *this_frame,
1064 void **this_prologue_cache)
1066 struct mt_unwind_cache *info =
1067 mt_frame_unwind_cache (this_frame, this_prologue_cache);
1069 return info->frame_base;
1072 /* This is a shared interface: the 'frame_unwind' object is what's
1073 returned by the 'sniffer' function, and in turn specifies how to
1074 get a frame's ID and prev_regs.
1076 This exports the 'prev_register' and 'this_id' methods. */
1078 static const struct frame_unwind mt_frame_unwind = {
1081 mt_frame_prev_register,
1083 default_frame_sniffer
1086 /* Another shared interface: the 'frame_base' object specifies how to
1087 unwind a frame and secure the base addresses for frame objects
1090 static struct frame_base mt_frame_base = {
1092 mt_frame_base_address,
1093 mt_frame_base_address,
1094 mt_frame_base_address
1097 static struct gdbarch *
1098 mt_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1100 struct gdbarch *gdbarch;
1102 /* Find a candidate among the list of pre-declared architectures. */
1103 arches = gdbarch_list_lookup_by_info (arches, &info);
1105 return arches->gdbarch;
1107 /* None found, create a new architecture from the information
1109 gdbarch = gdbarch_alloc (&info, NULL);
1111 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1112 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1113 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
1115 set_gdbarch_register_name (gdbarch, mt_register_name);
1116 set_gdbarch_num_regs (gdbarch, MT_NUM_REGS);
1117 set_gdbarch_num_pseudo_regs (gdbarch, MT_NUM_PSEUDO_REGS);
1118 set_gdbarch_pc_regnum (gdbarch, MT_PC_REGNUM);
1119 set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);
1120 set_gdbarch_pseudo_register_read (gdbarch, mt_pseudo_register_read);
1121 set_gdbarch_pseudo_register_write (gdbarch, mt_pseudo_register_write);
1122 set_gdbarch_skip_prologue (gdbarch, mt_skip_prologue);
1123 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1124 set_gdbarch_breakpoint_from_pc (gdbarch, mt_breakpoint_from_pc);
1125 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1126 set_gdbarch_frame_args_skip (gdbarch, 0);
1127 set_gdbarch_print_insn (gdbarch, print_insn_mt);
1128 set_gdbarch_register_type (gdbarch, mt_register_type);
1129 set_gdbarch_register_reggroup_p (gdbarch, mt_register_reggroup_p);
1131 set_gdbarch_return_value (gdbarch, mt_return_value);
1132 set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);
1134 set_gdbarch_frame_align (gdbarch, mt_frame_align);
1136 set_gdbarch_print_registers_info (gdbarch, mt_registers_info);
1138 set_gdbarch_push_dummy_call (gdbarch, mt_push_dummy_call);
1140 /* Target builtin data types. */
1141 set_gdbarch_short_bit (gdbarch, 16);
1142 set_gdbarch_int_bit (gdbarch, 32);
1143 set_gdbarch_long_bit (gdbarch, 32);
1144 set_gdbarch_long_long_bit (gdbarch, 64);
1145 set_gdbarch_float_bit (gdbarch, 32);
1146 set_gdbarch_double_bit (gdbarch, 64);
1147 set_gdbarch_long_double_bit (gdbarch, 64);
1148 set_gdbarch_ptr_bit (gdbarch, 32);
1150 /* Register the DWARF 2 sniffer first, and then the traditional prologue
1152 dwarf2_append_unwinders (gdbarch);
1153 frame_unwind_append_unwinder (gdbarch, &mt_frame_unwind);
1154 frame_base_set_default (gdbarch, &mt_frame_base);
1156 /* Register the 'unwind_pc' method. */
1157 set_gdbarch_unwind_pc (gdbarch, mt_unwind_pc);
1158 set_gdbarch_unwind_sp (gdbarch, mt_unwind_sp);
1160 /* Methods for saving / extracting a dummy frame's ID.
1161 The ID's stack address must match the SP value returned by
1162 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1163 set_gdbarch_dummy_id (gdbarch, mt_dummy_id);
1168 /* Provide a prototype to silence -Wmissing-prototypes. */
1169 extern initialize_file_ftype _initialize_mt_tdep;
1172 _initialize_mt_tdep (void)
1174 register_gdbarch_init (bfd_arch_mt, mt_gdbarch_init);