1 /* Target-dependent code for Morpho mt processor, for GDB.
3 Copyright (C) 2005-2016 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 /* Contributed by Michael Snyder, msnyder@redhat.com. */
24 #include "frame-unwind.h"
25 #include "frame-base.h"
28 #include "arch-utils.h"
31 #include "reggroups.h"
33 #include "trad-frame.h"
35 #include "dwarf2-frame.h"
40 enum mt_arch_constants
42 MT_MAX_STRUCT_SIZE = 16
47 MT_R0_REGNUM, /* 32 bit regs. */
49 MT_1ST_ARGREG = MT_R1_REGNUM,
53 MT_LAST_ARGREG = MT_R4_REGNUM,
62 MT_FP_REGNUM = MT_R12_REGNUM,
64 MT_SP_REGNUM = MT_R13_REGNUM,
66 MT_RA_REGNUM = MT_R14_REGNUM,
68 MT_IRA_REGNUM = MT_R15_REGNUM,
71 /* Interrupt Enable pseudo-register, exported by SID. */
73 /* End of CPU regs. */
77 /* Co-processor registers. */
78 MT_COPRO_REGNUM = MT_NUM_CPU_REGS, /* 16 bit regs. */
95 MT_BYPA_REGNUM, /* 32 bit regs. */
99 MT_CONTEXT_REGNUM, /* 38 bits (treat as array of
101 MT_MAC_REGNUM, /* 32 bits. */
102 MT_Z1_REGNUM, /* 16 bits. */
103 MT_Z2_REGNUM, /* 16 bits. */
104 MT_ICHANNEL_REGNUM, /* 32 bits. */
105 MT_ISCRAMB_REGNUM, /* 32 bits. */
106 MT_QSCRAMB_REGNUM, /* 32 bits. */
107 MT_OUT_REGNUM, /* 16 bits. */
108 MT_EXMAC_REGNUM, /* 32 bits (8 used). */
109 MT_QCHANNEL_REGNUM, /* 32 bits. */
110 MT_ZI2_REGNUM, /* 16 bits. */
111 MT_ZQ2_REGNUM, /* 16 bits. */
112 MT_CHANNEL2_REGNUM, /* 32 bits. */
113 MT_ISCRAMB2_REGNUM, /* 32 bits. */
114 MT_QSCRAMB2_REGNUM, /* 32 bits. */
115 MT_QCHANNEL2_REGNUM, /* 32 bits. */
117 /* Number of real registers. */
120 /* Pseudo-registers. */
121 MT_COPRO_PSEUDOREG_REGNUM = MT_NUM_REGS,
122 MT_MAC_PSEUDOREG_REGNUM,
123 MT_COPRO_PSEUDOREG_ARRAY,
125 MT_COPRO_PSEUDOREG_DIM_1 = 2,
126 MT_COPRO_PSEUDOREG_DIM_2 = 8,
127 /* The number of pseudo-registers for each coprocessor. These
128 include the real coprocessor registers, the pseudo-registe for
129 the coprocessor number, and the pseudo-register for the MAC. */
130 MT_COPRO_PSEUDOREG_REGS = MT_NUM_REGS - MT_NUM_CPU_REGS + 2,
131 /* The register number of the MAC, relative to a given coprocessor. */
132 MT_COPRO_PSEUDOREG_MAC_REGNUM = MT_COPRO_PSEUDOREG_REGS - 1,
134 /* Two pseudo-regs ('coprocessor' and 'mac'). */
135 MT_NUM_PSEUDO_REGS = 2 + (MT_COPRO_PSEUDOREG_REGS
136 * MT_COPRO_PSEUDOREG_DIM_1
137 * MT_COPRO_PSEUDOREG_DIM_2)
140 /* The tdep structure. */
143 /* ISA-specific types. */
144 struct type *copro_type;
148 /* Return name of register number specified by REGNUM. */
151 mt_register_name (struct gdbarch *gdbarch, int regnum)
153 static const char *const register_names[] = {
155 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
156 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
158 /* Co-processor regs. */
159 "", /* copro register. */
160 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
161 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",
162 "bypa", "bypb", "bypc", "flag", "context", "" /* mac. */ , "z1", "z2",
163 "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac. */ , "Qchannel",
164 "zi2", "zq2", "Ichannel2", "Iscramb2", "Qscramb2", "Qchannel2",
165 /* Pseudo-registers. */
168 static const char *array_names[MT_COPRO_PSEUDOREG_REGS
169 * MT_COPRO_PSEUDOREG_DIM_1
170 * MT_COPRO_PSEUDOREG_DIM_2];
174 if (regnum < ARRAY_SIZE (register_names))
175 return register_names[regnum];
176 if (array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY])
177 return array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY];
186 regnum -= MT_COPRO_PSEUDOREG_ARRAY;
187 index = regnum % MT_COPRO_PSEUDOREG_REGS;
188 dim_2 = (regnum / MT_COPRO_PSEUDOREG_REGS) % MT_COPRO_PSEUDOREG_DIM_2;
189 dim_1 = ((regnum / MT_COPRO_PSEUDOREG_REGS / MT_COPRO_PSEUDOREG_DIM_2)
190 % MT_COPRO_PSEUDOREG_DIM_1);
192 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
193 stub = register_names[MT_MAC_PSEUDOREG_REGNUM];
194 else if (index >= MT_NUM_REGS - MT_CPR0_REGNUM)
197 stub = register_names[index + MT_CPR0_REGNUM];
200 array_names[regnum] = stub;
203 name = (char *) xmalloc (30);
204 sprintf (name, "copro_%d_%d_%s", dim_1, dim_2, stub);
205 array_names[regnum] = name;
210 /* Return the type of a coprocessor register. */
213 mt_copro_register_type (struct gdbarch *arch, int regnum)
217 case MT_INT_ENABLE_REGNUM:
218 case MT_ICHANNEL_REGNUM:
219 case MT_QCHANNEL_REGNUM:
220 case MT_ISCRAMB_REGNUM:
221 case MT_QSCRAMB_REGNUM:
222 return builtin_type (arch)->builtin_int32;
231 return builtin_type (arch)->builtin_int16;
232 case MT_EXMAC_REGNUM:
234 return builtin_type (arch)->builtin_uint32;
235 case MT_CONTEXT_REGNUM:
236 return builtin_type (arch)->builtin_long_long;
238 return builtin_type (arch)->builtin_unsigned_char;
240 if (regnum >= MT_CPR0_REGNUM && regnum <= MT_CPR15_REGNUM)
241 return builtin_type (arch)->builtin_int16;
242 else if (regnum == MT_CPR0_REGNUM + MT_COPRO_PSEUDOREG_MAC_REGNUM)
244 if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2
245 || gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2)
246 return builtin_type (arch)->builtin_uint64;
248 return builtin_type (arch)->builtin_uint32;
251 return builtin_type (arch)->builtin_uint32;
255 /* Given ARCH and a register number specified by REGNUM, return the
256 type of that register. */
259 mt_register_type (struct gdbarch *arch, int regnum)
261 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
263 if (regnum >= 0 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS)
270 return builtin_type (arch)->builtin_func_ptr;
273 return builtin_type (arch)->builtin_data_ptr;
274 case MT_COPRO_REGNUM:
275 case MT_COPRO_PSEUDOREG_REGNUM:
276 if (tdep->copro_type == NULL)
278 struct type *elt = builtin_type (arch)->builtin_int16;
279 tdep->copro_type = lookup_array_range_type (elt, 0, 1);
281 return tdep->copro_type;
282 case MT_MAC_PSEUDOREG_REGNUM:
283 return mt_copro_register_type (arch,
285 + MT_COPRO_PSEUDOREG_MAC_REGNUM);
287 if (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM)
288 return builtin_type (arch)->builtin_int32;
289 else if (regnum < MT_COPRO_PSEUDOREG_ARRAY)
290 return mt_copro_register_type (arch, regnum);
293 regnum -= MT_COPRO_PSEUDOREG_ARRAY;
294 regnum %= MT_COPRO_PSEUDOREG_REGS;
295 regnum += MT_CPR0_REGNUM;
296 return mt_copro_register_type (arch, regnum);
300 internal_error (__FILE__, __LINE__,
301 _("mt_register_type: illegal register number %d"), regnum);
304 /* Return true if register REGNUM is a member of the register group
305 specified by GROUP. */
308 mt_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
309 struct reggroup *group)
311 /* Groups of registers that can be displayed via "info reg". */
312 if (group == all_reggroup)
314 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS
315 && mt_register_name (gdbarch, regnum)[0] != '\0');
317 if (group == general_reggroup)
318 return (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM);
320 if (group == float_reggroup)
321 return 0; /* No float regs. */
323 if (group == vector_reggroup)
324 return 0; /* No vector regs. */
326 /* For any that are not handled above. */
327 return default_register_reggroup_p (gdbarch, regnum, group);
330 /* Return the return value convention used for a given type TYPE.
331 Optionally, fetch or set the return value via READBUF or
332 WRITEBUF respectively using REGCACHE for the register
335 static enum return_value_convention
336 mt_return_value (struct gdbarch *gdbarch, struct value *function,
337 struct type *type, struct regcache *regcache,
338 gdb_byte *readbuf, const gdb_byte *writebuf)
340 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
342 if (TYPE_LENGTH (type) > 4)
344 /* Return values > 4 bytes are returned in memory,
345 pointed to by R11. */
350 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
351 read_memory (addr, readbuf, TYPE_LENGTH (type));
358 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
359 write_memory (addr, writebuf, TYPE_LENGTH (type));
362 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
370 /* Return values of <= 4 bytes are returned in R11. */
371 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &temp);
372 store_unsigned_integer (readbuf, TYPE_LENGTH (type),
378 if (TYPE_LENGTH (type) < 4)
381 /* Add leading zeros to the value. */
382 memset (buf, 0, sizeof (buf));
383 memcpy (buf + sizeof (buf) - TYPE_LENGTH (type),
384 writebuf, TYPE_LENGTH (type));
385 regcache_cooked_write (regcache, MT_R11_REGNUM, buf);
387 else /* (TYPE_LENGTH (type) == 4 */
388 regcache_cooked_write (regcache, MT_R11_REGNUM, writebuf);
391 return RETURN_VALUE_REGISTER_CONVENTION;
395 /* If the input address, PC, is in a function prologue, return the
396 address of the end of the prologue, otherwise return the input
399 Note: PC is likely to be the function start, since this function
400 is mainly used for advancing a breakpoint to the first line, or
401 stepping to the first line when we have stepped into a function
405 mt_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
407 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
408 CORE_ADDR func_addr = 0, func_end = 0;
409 const char *func_name;
412 if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end))
414 struct symtab_and_line sal;
417 /* Found a function. */
418 sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL).symbol;
419 if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
421 /* Don't use this trick for assembly source files. */
422 sal = find_pc_line (func_addr, 0);
424 if (sal.end && sal.end < func_end)
426 /* Found a line number, use it as end of prologue. */
432 /* No function symbol, or no line symbol. Use prologue scanning method. */
435 instr = read_memory_unsigned_integer (pc, 4, byte_order);
436 if (instr == 0x12000000) /* nop */
438 if (instr == 0x12ddc000) /* copy sp into fp */
441 if (instr == 0x05dd) /* subi sp, sp, imm */
443 if (instr >= 0x43c0 && instr <= 0x43df) /* push */
445 /* Not an obvious prologue instruction. */
452 /* Implement the breakpoint_kind_from_pc gdbarch method. */
455 mt_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
460 /* Implement the sw_breakpoint_from_kind gdbarch method. */
462 static const gdb_byte *
463 mt_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
465 /* The breakpoint instruction must be the same size as the smallest
466 instruction in the instruction set.
468 The BP for ms1 is defined as 0x68000000 (BREAK).
469 The BP for ms2 is defined as 0x69000000 (illegal). */
470 static gdb_byte ms1_breakpoint[] = { 0x68, 0, 0, 0 };
471 static gdb_byte ms2_breakpoint[] = { 0x69, 0, 0, 0 };
475 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
476 return ms2_breakpoint;
478 return ms1_breakpoint;
481 /* Select the correct coprocessor register bank. Return the pseudo
482 regnum we really want to read. */
485 mt_select_coprocessor (struct gdbarch *gdbarch,
486 struct regcache *regcache, int regno)
488 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
489 unsigned index, base;
492 /* Get the copro pseudo regnum. */
493 regcache_raw_read (regcache, MT_COPRO_REGNUM, copro);
494 base = ((extract_signed_integer (&copro[0], 2, byte_order)
495 * MT_COPRO_PSEUDOREG_DIM_2)
496 + extract_signed_integer (&copro[2], 2, byte_order));
498 regno -= MT_COPRO_PSEUDOREG_ARRAY;
499 index = regno % MT_COPRO_PSEUDOREG_REGS;
500 regno /= MT_COPRO_PSEUDOREG_REGS;
503 /* Select the correct coprocessor register bank. Invalidate the
504 coprocessor register cache. */
507 store_signed_integer (&copro[0], 2, byte_order,
508 regno / MT_COPRO_PSEUDOREG_DIM_2);
509 store_signed_integer (&copro[2], 2, byte_order,
510 regno % MT_COPRO_PSEUDOREG_DIM_2);
511 regcache_raw_write (regcache, MT_COPRO_REGNUM, copro);
513 /* We must flush the cache, as it is now invalid. */
514 for (ix = MT_NUM_CPU_REGS; ix != MT_NUM_REGS; ix++)
515 regcache_invalidate (regcache, ix);
521 /* Fetch the pseudo registers:
523 There are two regular pseudo-registers:
524 1) The 'coprocessor' pseudo-register (which mirrors the
525 "real" coprocessor register sent by the target), and
526 2) The 'MAC' pseudo-register (which represents the union
527 of the original 32 bit target MAC register and the new
528 8-bit extended-MAC register).
530 Additionally there is an array of coprocessor registers which track
531 the coprocessor registers for each coprocessor. */
533 static enum register_status
534 mt_pseudo_register_read (struct gdbarch *gdbarch,
535 struct regcache *regcache, int regno, gdb_byte *buf)
537 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
541 case MT_COPRO_REGNUM:
542 case MT_COPRO_PSEUDOREG_REGNUM:
543 return regcache_raw_read (regcache, MT_COPRO_REGNUM, buf);
545 case MT_MAC_PSEUDOREG_REGNUM:
546 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
547 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
549 enum register_status status;
550 ULONGEST oldmac = 0, ext_mac = 0;
553 status = regcache_cooked_read_unsigned (regcache, MT_MAC_REGNUM, &oldmac);
554 if (status != REG_VALID)
557 regcache_cooked_read_unsigned (regcache, MT_EXMAC_REGNUM, &ext_mac);
558 if (status != REG_VALID)
562 (oldmac & 0xffffffff) | ((long long) (ext_mac & 0xff) << 32);
563 store_signed_integer (buf, 8, byte_order, newmac);
568 return regcache_raw_read (regcache, MT_MAC_REGNUM, buf);
572 unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
574 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
575 return mt_pseudo_register_read (gdbarch, regcache,
576 MT_MAC_PSEUDOREG_REGNUM, buf);
577 else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
578 return regcache_raw_read (regcache, index + MT_CPR0_REGNUM, buf);
587 /* Write the pseudo registers:
589 Mt pseudo-registers are stored directly to the target. The
590 'coprocessor' register is special, because when it is modified, all
591 the other coprocessor regs must be flushed from the reg cache. */
594 mt_pseudo_register_write (struct gdbarch *gdbarch,
595 struct regcache *regcache,
596 int regno, const gdb_byte *buf)
598 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
603 case MT_COPRO_REGNUM:
604 case MT_COPRO_PSEUDOREG_REGNUM:
605 regcache_raw_write (regcache, MT_COPRO_REGNUM, buf);
606 for (i = MT_NUM_CPU_REGS; i < MT_NUM_REGS; i++)
607 regcache_invalidate (regcache, i);
610 case MT_MAC_PSEUDOREG_REGNUM:
611 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
612 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
614 /* The 8-byte MAC pseudo-register must be broken down into two
615 32-byte registers. */
616 unsigned int oldmac, ext_mac;
619 newmac = extract_unsigned_integer (buf, 8, byte_order);
620 oldmac = newmac & 0xffffffff;
621 ext_mac = (newmac >> 32) & 0xff;
622 regcache_cooked_write_unsigned (regcache, MT_MAC_REGNUM, oldmac);
623 regcache_cooked_write_unsigned (regcache, MT_EXMAC_REGNUM, ext_mac);
626 regcache_raw_write (regcache, MT_MAC_REGNUM, buf);
630 unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
632 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
633 mt_pseudo_register_write (gdbarch, regcache,
634 MT_MAC_PSEUDOREG_REGNUM, buf);
635 else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
636 regcache_raw_write (regcache, index + MT_CPR0_REGNUM, buf);
643 mt_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
645 /* Register size is 4 bytes. */
646 return align_down (sp, 4);
649 /* Implements the "info registers" command. When ``all'' is non-zero,
650 the coprocessor registers will be printed in addition to the rest
654 mt_registers_info (struct gdbarch *gdbarch,
655 struct ui_file *file,
656 struct frame_info *frame, int regnum, int all)
658 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
664 lim = all ? MT_NUM_REGS : MT_NUM_CPU_REGS;
666 for (regnum = 0; regnum < lim; regnum++)
668 /* Don't display the Qchannel register since it will be displayed
669 along with Ichannel. (See below.) */
670 if (regnum == MT_QCHANNEL_REGNUM)
673 mt_registers_info (gdbarch, file, frame, regnum, all);
675 /* Display the Qchannel register immediately after Ichannel. */
676 if (regnum == MT_ICHANNEL_REGNUM)
677 mt_registers_info (gdbarch, file, frame, MT_QCHANNEL_REGNUM, all);
682 if (regnum == MT_EXMAC_REGNUM)
684 else if (regnum == MT_CONTEXT_REGNUM)
686 /* Special output handling for 38-bit context register. */
688 unsigned int i, regsize;
690 regsize = register_size (gdbarch, regnum);
692 buff = (unsigned char *) alloca (regsize);
694 deprecated_frame_register_read (frame, regnum, buff);
696 fputs_filtered (gdbarch_register_name
697 (gdbarch, regnum), file);
698 print_spaces_filtered (15 - strlen (gdbarch_register_name
701 fputs_filtered ("0x", file);
703 for (i = 0; i < regsize; i++)
704 fprintf_filtered (file, "%02x", (unsigned int)
705 extract_unsigned_integer (buff + i, 1, byte_order));
706 fputs_filtered ("\t", file);
707 print_longest (file, 'd', 0,
708 extract_unsigned_integer (buff, regsize, byte_order));
709 fputs_filtered ("\n", file);
711 else if (regnum == MT_COPRO_REGNUM
712 || regnum == MT_COPRO_PSEUDOREG_REGNUM)
714 /* Special output handling for the 'coprocessor' register. */
715 struct value_print_options opts;
718 val = get_frame_register_value (frame, MT_COPRO_REGNUM);
720 regnum = MT_COPRO_PSEUDOREG_REGNUM;
721 fputs_filtered (gdbarch_register_name (gdbarch, regnum),
723 print_spaces_filtered (15 - strlen (gdbarch_register_name
726 get_no_prettyformat_print_options (&opts);
728 val_print (register_type (gdbarch, regnum),
730 &opts, current_language);
731 fputs_filtered ("\n", file);
733 else if (regnum == MT_MAC_REGNUM || regnum == MT_MAC_PSEUDOREG_REGNUM)
735 ULONGEST oldmac, ext_mac, newmac;
736 gdb_byte buf[3 * sizeof (LONGEST)];
738 /* Get the two "real" mac registers. */
739 deprecated_frame_register_read (frame, MT_MAC_REGNUM, buf);
740 oldmac = extract_unsigned_integer
741 (buf, register_size (gdbarch, MT_MAC_REGNUM), byte_order);
742 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
743 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
745 deprecated_frame_register_read (frame, MT_EXMAC_REGNUM, buf);
746 ext_mac = extract_unsigned_integer
747 (buf, register_size (gdbarch, MT_EXMAC_REGNUM), byte_order);
752 /* Add them together. */
753 newmac = (oldmac & 0xffffffff) + ((ext_mac & 0xff) << 32);
756 regnum = MT_MAC_PSEUDOREG_REGNUM;
757 fputs_filtered (gdbarch_register_name (gdbarch, regnum),
759 print_spaces_filtered (15 - strlen (gdbarch_register_name
762 fputs_filtered ("0x", file);
763 print_longest (file, 'x', 0, newmac);
764 fputs_filtered ("\t", file);
765 print_longest (file, 'u', 0, newmac);
766 fputs_filtered ("\n", file);
769 default_print_registers_info (gdbarch, file, frame, regnum, all);
773 /* Set up the callee's arguments for an inferior function call. The
774 arguments are pushed on the stack or are placed in registers as
775 appropriate. It also sets up the return address (which points to
776 the call dummy breakpoint).
778 Returns the updated (and aligned) stack pointer. */
781 mt_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
782 struct regcache *regcache, CORE_ADDR bp_addr,
783 int nargs, struct value **args, CORE_ADDR sp,
784 int struct_return, CORE_ADDR struct_addr)
787 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
788 gdb_byte buf[MT_MAX_STRUCT_SIZE];
789 int argreg = MT_1ST_ARGREG;
790 int split_param_len = 0;
796 /* First handle however many args we can fit into MT_1ST_ARGREG thru
798 for (i = 0; i < nargs && argreg <= MT_LAST_ARGREG; i++)
801 typelen = TYPE_LENGTH (value_type (args[i]));
808 regcache_cooked_write_unsigned (regcache, argreg++,
809 extract_unsigned_integer
810 (value_contents (args[i]),
811 wordsize, byte_order));
816 val = value_contents (args[i]);
819 if (argreg <= MT_LAST_ARGREG)
821 /* This word of the argument is passed in a register. */
822 regcache_cooked_write_unsigned (regcache, argreg++,
823 extract_unsigned_integer
824 (val, wordsize, byte_order));
830 /* Remainder of this arg must be passed on the stack
831 (deferred to do later). */
832 split_param_len = typelen;
833 memcpy (buf, val, typelen);
834 break; /* No more args can be handled in regs. */
839 /* By reverse engineering of gcc output, args bigger than
840 16 bytes go on the stack, and their address is passed
842 stack_dest -= typelen;
843 write_memory (stack_dest, value_contents (args[i]), typelen);
844 regcache_cooked_write_unsigned (regcache, argreg++, stack_dest);
849 /* Next, the rest of the arguments go onto the stack, in reverse order. */
850 for (j = nargs - 1; j >= i; j--)
853 struct cleanup *back_to;
854 const gdb_byte *contents = value_contents (args[j]);
856 /* Right-justify the value in an aligned-length buffer. */
857 typelen = TYPE_LENGTH (value_type (args[j]));
858 slacklen = (wordsize - (typelen % wordsize)) % wordsize;
859 val = (gdb_byte *) xmalloc (typelen + slacklen);
860 back_to = make_cleanup (xfree, val);
861 memcpy (val, contents, typelen);
862 memset (val + typelen, 0, slacklen);
863 /* Now write this data to the stack. */
864 stack_dest -= typelen + slacklen;
865 write_memory (stack_dest, val, typelen + slacklen);
866 do_cleanups (back_to);
869 /* Finally, if a param needs to be split between registers and stack,
870 write the second half to the stack now. */
871 if (split_param_len != 0)
873 stack_dest -= split_param_len;
874 write_memory (stack_dest, buf, split_param_len);
877 /* Set up return address (provided to us as bp_addr). */
878 regcache_cooked_write_unsigned (regcache, MT_RA_REGNUM, bp_addr);
880 /* Store struct return address, if given. */
881 if (struct_return && struct_addr != 0)
882 regcache_cooked_write_unsigned (regcache, MT_R11_REGNUM, struct_addr);
884 /* Set aside 16 bytes for the callee to save regs 1-4. */
887 /* Update the stack pointer. */
888 regcache_cooked_write_unsigned (regcache, MT_SP_REGNUM, stack_dest);
890 /* And that should do it. Return the new stack pointer. */
895 /* The 'unwind_cache' data structure. */
897 struct mt_unwind_cache
899 /* The previous frame's inner most stack address.
900 Used as this frame ID's stack_addr. */
902 CORE_ADDR frame_base;
906 /* Table indicating the location of each and every register. */
907 struct trad_frame_saved_reg *saved_regs;
910 /* Initialize an unwind_cache. Build up the saved_regs table etc. for
913 static struct mt_unwind_cache *
914 mt_frame_unwind_cache (struct frame_info *this_frame,
915 void **this_prologue_cache)
917 struct gdbarch *gdbarch;
918 struct mt_unwind_cache *info;
919 CORE_ADDR next_addr, start_addr, end_addr, prologue_end_addr;
920 unsigned long instr, upper_half, delayed_store = 0;
924 if ((*this_prologue_cache))
925 return (struct mt_unwind_cache *) (*this_prologue_cache);
927 gdbarch = get_frame_arch (this_frame);
928 info = FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache);
929 (*this_prologue_cache) = info;
933 info->frame_base = 0;
934 info->frameless_p = 1;
935 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
937 /* Grab the frame-relative values of SP and FP, needed below.
938 The frame_saved_register function will find them on the
939 stack or in the registers as appropriate. */
940 sp = get_frame_register_unsigned (this_frame, MT_SP_REGNUM);
941 fp = get_frame_register_unsigned (this_frame, MT_FP_REGNUM);
943 start_addr = get_frame_func (this_frame);
945 /* Return early if GDB couldn't find the function. */
949 end_addr = get_frame_pc (this_frame);
950 prologue_end_addr = skip_prologue_using_sal (gdbarch, start_addr);
952 for (next_addr = start_addr; next_addr < end_addr; next_addr += 4)
954 instr = get_frame_memory_unsigned (this_frame, next_addr, 4);
955 if (delayed_store) /* Previous instr was a push. */
957 upper_half = delayed_store >> 16;
958 regnum = upper_half & 0xf;
959 offset = delayed_store & 0xffff;
960 switch (upper_half & 0xfff0)
962 case 0x43c0: /* push using frame pointer. */
963 info->saved_regs[regnum].addr = offset;
965 case 0x43d0: /* push using stack pointer. */
966 info->saved_regs[regnum].addr = offset;
976 case 0x12000000: /* NO-OP */
978 case 0x12ddc000: /* copy sp into fp */
979 info->frameless_p = 0; /* Record that the frame
980 pointer is in use. */
983 upper_half = instr >> 16;
984 if (upper_half == 0x05dd || /* subi sp, sp, imm */
985 upper_half == 0x07dd) /* subui sp, sp, imm */
987 /* Record the frame size. */
988 info->framesize = instr & 0xffff;
991 if ((upper_half & 0xfff0) == 0x43c0 || /* frame push */
992 (upper_half & 0xfff0) == 0x43d0) /* stack push */
994 /* Save this instruction, but don't record the
995 pushed register as 'saved' until we see the
996 next instruction. That's because of deferred stores
997 on this target -- GDB won't be able to read the register
998 from the stack until one instruction later. */
999 delayed_store = instr;
1002 /* Not a prologue instruction. Is this the end of the prologue?
1003 This is the most difficult decision; when to stop scanning.
1005 If we have no line symbol, then the best thing we can do
1006 is to stop scanning when we encounter an instruction that
1007 is not likely to be a part of the prologue.
1009 But if we do have a line symbol, then we should
1010 keep scanning until we reach it (or we reach end_addr). */
1012 if (prologue_end_addr && (prologue_end_addr > (next_addr + 4)))
1013 continue; /* Keep scanning, recording saved_regs etc. */
1015 break; /* Quit scanning: breakpoint can be set here. */
1019 /* Special handling for the "saved" address of the SP:
1020 The SP is of course never saved on the stack at all, so
1021 by convention what we put here is simply the previous
1022 _value_ of the SP (as opposed to an address where the
1023 previous value would have been pushed). This will also
1024 give us the frame base address. */
1026 if (info->frameless_p)
1028 info->frame_base = sp + info->framesize;
1029 info->prev_sp = sp + info->framesize;
1033 info->frame_base = fp + info->framesize;
1034 info->prev_sp = fp + info->framesize;
1036 /* Save prev_sp in saved_regs as a value, not as an address. */
1037 trad_frame_set_value (info->saved_regs, MT_SP_REGNUM, info->prev_sp);
1039 /* Now convert frame offsets to actual addresses (not offsets). */
1040 for (regnum = 0; regnum < MT_NUM_REGS; regnum++)
1041 if (trad_frame_addr_p (info->saved_regs, regnum))
1042 info->saved_regs[regnum].addr += info->frame_base - info->framesize;
1044 /* The call instruction moves the caller's PC in the callee's RA reg.
1045 Since this is an unwind, do the reverse. Copy the location of RA
1046 into PC (the address / regnum) so that a request for PC will be
1047 converted into a request for the RA. */
1048 info->saved_regs[MT_PC_REGNUM] = info->saved_regs[MT_RA_REGNUM];
1054 mt_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1058 pc = frame_unwind_register_unsigned (next_frame, MT_PC_REGNUM);
1063 mt_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1067 sp = frame_unwind_register_unsigned (next_frame, MT_SP_REGNUM);
1071 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1072 frame. The frame ID's base needs to match the TOS value saved by
1073 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1075 static struct frame_id
1076 mt_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1078 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MT_SP_REGNUM);
1079 return frame_id_build (sp, get_frame_pc (this_frame));
1082 /* Given a GDB frame, determine the address of the calling function's
1083 frame. This will be used to create a new GDB frame struct. */
1086 mt_frame_this_id (struct frame_info *this_frame,
1087 void **this_prologue_cache, struct frame_id *this_id)
1089 struct mt_unwind_cache *info =
1090 mt_frame_unwind_cache (this_frame, this_prologue_cache);
1092 if (!(info == NULL || info->prev_sp == 0))
1093 (*this_id) = frame_id_build (info->prev_sp, get_frame_func (this_frame));
1098 static struct value *
1099 mt_frame_prev_register (struct frame_info *this_frame,
1100 void **this_prologue_cache, int regnum)
1102 struct mt_unwind_cache *info =
1103 mt_frame_unwind_cache (this_frame, this_prologue_cache);
1105 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1109 mt_frame_base_address (struct frame_info *this_frame,
1110 void **this_prologue_cache)
1112 struct mt_unwind_cache *info =
1113 mt_frame_unwind_cache (this_frame, this_prologue_cache);
1115 return info->frame_base;
1118 /* This is a shared interface: the 'frame_unwind' object is what's
1119 returned by the 'sniffer' function, and in turn specifies how to
1120 get a frame's ID and prev_regs.
1122 This exports the 'prev_register' and 'this_id' methods. */
1124 static const struct frame_unwind mt_frame_unwind = {
1126 default_frame_unwind_stop_reason,
1128 mt_frame_prev_register,
1130 default_frame_sniffer
1133 /* Another shared interface: the 'frame_base' object specifies how to
1134 unwind a frame and secure the base addresses for frame objects
1137 static struct frame_base mt_frame_base = {
1139 mt_frame_base_address,
1140 mt_frame_base_address,
1141 mt_frame_base_address
1144 static struct gdbarch *
1145 mt_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1147 struct gdbarch *gdbarch;
1148 struct gdbarch_tdep *tdep;
1150 /* Find a candidate among the list of pre-declared architectures. */
1151 arches = gdbarch_list_lookup_by_info (arches, &info);
1153 return arches->gdbarch;
1155 /* None found, create a new architecture from the information
1157 tdep = XCNEW (struct gdbarch_tdep);
1158 gdbarch = gdbarch_alloc (&info, tdep);
1160 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1161 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1162 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
1164 set_gdbarch_register_name (gdbarch, mt_register_name);
1165 set_gdbarch_num_regs (gdbarch, MT_NUM_REGS);
1166 set_gdbarch_num_pseudo_regs (gdbarch, MT_NUM_PSEUDO_REGS);
1167 set_gdbarch_pc_regnum (gdbarch, MT_PC_REGNUM);
1168 set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);
1169 set_gdbarch_pseudo_register_read (gdbarch, mt_pseudo_register_read);
1170 set_gdbarch_pseudo_register_write (gdbarch, mt_pseudo_register_write);
1171 set_gdbarch_skip_prologue (gdbarch, mt_skip_prologue);
1172 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1173 set_gdbarch_breakpoint_kind_from_pc (gdbarch, mt_breakpoint_kind_from_pc);
1174 set_gdbarch_sw_breakpoint_from_kind (gdbarch, mt_sw_breakpoint_from_kind);
1175 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1176 set_gdbarch_frame_args_skip (gdbarch, 0);
1177 set_gdbarch_print_insn (gdbarch, print_insn_mt);
1178 set_gdbarch_register_type (gdbarch, mt_register_type);
1179 set_gdbarch_register_reggroup_p (gdbarch, mt_register_reggroup_p);
1181 set_gdbarch_return_value (gdbarch, mt_return_value);
1182 set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);
1184 set_gdbarch_frame_align (gdbarch, mt_frame_align);
1186 set_gdbarch_print_registers_info (gdbarch, mt_registers_info);
1188 set_gdbarch_push_dummy_call (gdbarch, mt_push_dummy_call);
1190 /* Target builtin data types. */
1191 set_gdbarch_short_bit (gdbarch, 16);
1192 set_gdbarch_int_bit (gdbarch, 32);
1193 set_gdbarch_long_bit (gdbarch, 32);
1194 set_gdbarch_long_long_bit (gdbarch, 64);
1195 set_gdbarch_float_bit (gdbarch, 32);
1196 set_gdbarch_double_bit (gdbarch, 64);
1197 set_gdbarch_long_double_bit (gdbarch, 64);
1198 set_gdbarch_ptr_bit (gdbarch, 32);
1200 /* Register the DWARF 2 sniffer first, and then the traditional prologue
1202 dwarf2_append_unwinders (gdbarch);
1203 frame_unwind_append_unwinder (gdbarch, &mt_frame_unwind);
1204 frame_base_set_default (gdbarch, &mt_frame_base);
1206 /* Register the 'unwind_pc' method. */
1207 set_gdbarch_unwind_pc (gdbarch, mt_unwind_pc);
1208 set_gdbarch_unwind_sp (gdbarch, mt_unwind_sp);
1210 /* Methods for saving / extracting a dummy frame's ID.
1211 The ID's stack address must match the SP value returned by
1212 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1213 set_gdbarch_dummy_id (gdbarch, mt_dummy_id);
1218 /* Provide a prototype to silence -Wmissing-prototypes. */
1219 extern initialize_file_ftype _initialize_mt_tdep;
1222 _initialize_mt_tdep (void)
1224 register_gdbarch_init (bfd_arch_mt, mt_gdbarch_init);