1 /* Target-dependent code for Morpho mt processor, for GDB.
3 Copyright (C) 2005-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 /* Contributed by Michael Snyder, msnyder@redhat.com. */
24 #include "frame-unwind.h"
25 #include "frame-base.h"
28 #include "arch-utils.h"
31 #include "reggroups.h"
33 #include "trad-frame.h"
35 #include "dwarf2-frame.h"
39 #include "common/byte-vector.h"
41 enum mt_arch_constants
43 MT_MAX_STRUCT_SIZE = 16
48 MT_R0_REGNUM, /* 32 bit regs. */
50 MT_1ST_ARGREG = MT_R1_REGNUM,
54 MT_LAST_ARGREG = MT_R4_REGNUM,
63 MT_FP_REGNUM = MT_R12_REGNUM,
65 MT_SP_REGNUM = MT_R13_REGNUM,
67 MT_RA_REGNUM = MT_R14_REGNUM,
69 MT_IRA_REGNUM = MT_R15_REGNUM,
72 /* Interrupt Enable pseudo-register, exported by SID. */
74 /* End of CPU regs. */
78 /* Co-processor registers. */
79 MT_COPRO_REGNUM = MT_NUM_CPU_REGS, /* 16 bit regs. */
96 MT_BYPA_REGNUM, /* 32 bit regs. */
100 MT_CONTEXT_REGNUM, /* 38 bits (treat as array of
102 MT_MAC_REGNUM, /* 32 bits. */
103 MT_Z1_REGNUM, /* 16 bits. */
104 MT_Z2_REGNUM, /* 16 bits. */
105 MT_ICHANNEL_REGNUM, /* 32 bits. */
106 MT_ISCRAMB_REGNUM, /* 32 bits. */
107 MT_QSCRAMB_REGNUM, /* 32 bits. */
108 MT_OUT_REGNUM, /* 16 bits. */
109 MT_EXMAC_REGNUM, /* 32 bits (8 used). */
110 MT_QCHANNEL_REGNUM, /* 32 bits. */
111 MT_ZI2_REGNUM, /* 16 bits. */
112 MT_ZQ2_REGNUM, /* 16 bits. */
113 MT_CHANNEL2_REGNUM, /* 32 bits. */
114 MT_ISCRAMB2_REGNUM, /* 32 bits. */
115 MT_QSCRAMB2_REGNUM, /* 32 bits. */
116 MT_QCHANNEL2_REGNUM, /* 32 bits. */
118 /* Number of real registers. */
121 /* Pseudo-registers. */
122 MT_COPRO_PSEUDOREG_REGNUM = MT_NUM_REGS,
123 MT_MAC_PSEUDOREG_REGNUM,
124 MT_COPRO_PSEUDOREG_ARRAY,
126 MT_COPRO_PSEUDOREG_DIM_1 = 2,
127 MT_COPRO_PSEUDOREG_DIM_2 = 8,
128 /* The number of pseudo-registers for each coprocessor. These
129 include the real coprocessor registers, the pseudo-registe for
130 the coprocessor number, and the pseudo-register for the MAC. */
131 MT_COPRO_PSEUDOREG_REGS = MT_NUM_REGS - MT_NUM_CPU_REGS + 2,
132 /* The register number of the MAC, relative to a given coprocessor. */
133 MT_COPRO_PSEUDOREG_MAC_REGNUM = MT_COPRO_PSEUDOREG_REGS - 1,
135 /* Two pseudo-regs ('coprocessor' and 'mac'). */
136 MT_NUM_PSEUDO_REGS = 2 + (MT_COPRO_PSEUDOREG_REGS
137 * MT_COPRO_PSEUDOREG_DIM_1
138 * MT_COPRO_PSEUDOREG_DIM_2)
141 /* The tdep structure. */
144 /* ISA-specific types. */
145 struct type *copro_type;
149 /* Return name of register number specified by REGNUM. */
152 mt_register_name (struct gdbarch *gdbarch, int regnum)
154 static const char *const register_names[] = {
156 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
157 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
159 /* Co-processor regs. */
160 "", /* copro register. */
161 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
162 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",
163 "bypa", "bypb", "bypc", "flag", "context", "" /* mac. */ , "z1", "z2",
164 "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac. */ , "Qchannel",
165 "zi2", "zq2", "Ichannel2", "Iscramb2", "Qscramb2", "Qchannel2",
166 /* Pseudo-registers. */
169 static const char *array_names[MT_COPRO_PSEUDOREG_REGS
170 * MT_COPRO_PSEUDOREG_DIM_1
171 * MT_COPRO_PSEUDOREG_DIM_2];
175 if (regnum < ARRAY_SIZE (register_names))
176 return register_names[regnum];
177 if (array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY])
178 return array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY];
187 regnum -= MT_COPRO_PSEUDOREG_ARRAY;
188 index = regnum % MT_COPRO_PSEUDOREG_REGS;
189 dim_2 = (regnum / MT_COPRO_PSEUDOREG_REGS) % MT_COPRO_PSEUDOREG_DIM_2;
190 dim_1 = ((regnum / MT_COPRO_PSEUDOREG_REGS / MT_COPRO_PSEUDOREG_DIM_2)
191 % MT_COPRO_PSEUDOREG_DIM_1);
193 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
194 stub = register_names[MT_MAC_PSEUDOREG_REGNUM];
195 else if (index >= MT_NUM_REGS - MT_CPR0_REGNUM)
198 stub = register_names[index + MT_CPR0_REGNUM];
201 array_names[regnum] = stub;
204 name = (char *) xmalloc (30);
205 sprintf (name, "copro_%d_%d_%s", dim_1, dim_2, stub);
206 array_names[regnum] = name;
211 /* Return the type of a coprocessor register. */
214 mt_copro_register_type (struct gdbarch *arch, int regnum)
218 case MT_INT_ENABLE_REGNUM:
219 case MT_ICHANNEL_REGNUM:
220 case MT_QCHANNEL_REGNUM:
221 case MT_ISCRAMB_REGNUM:
222 case MT_QSCRAMB_REGNUM:
223 return builtin_type (arch)->builtin_int32;
232 return builtin_type (arch)->builtin_int16;
233 case MT_EXMAC_REGNUM:
235 return builtin_type (arch)->builtin_uint32;
236 case MT_CONTEXT_REGNUM:
237 return builtin_type (arch)->builtin_long_long;
239 return builtin_type (arch)->builtin_unsigned_char;
241 if (regnum >= MT_CPR0_REGNUM && regnum <= MT_CPR15_REGNUM)
242 return builtin_type (arch)->builtin_int16;
243 else if (regnum == MT_CPR0_REGNUM + MT_COPRO_PSEUDOREG_MAC_REGNUM)
245 if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2
246 || gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2)
247 return builtin_type (arch)->builtin_uint64;
249 return builtin_type (arch)->builtin_uint32;
252 return builtin_type (arch)->builtin_uint32;
256 /* Given ARCH and a register number specified by REGNUM, return the
257 type of that register. */
260 mt_register_type (struct gdbarch *arch, int regnum)
262 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
264 if (regnum >= 0 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS)
271 return builtin_type (arch)->builtin_func_ptr;
274 return builtin_type (arch)->builtin_data_ptr;
275 case MT_COPRO_REGNUM:
276 case MT_COPRO_PSEUDOREG_REGNUM:
277 if (tdep->copro_type == NULL)
279 struct type *elt = builtin_type (arch)->builtin_int16;
280 tdep->copro_type = lookup_array_range_type (elt, 0, 1);
282 return tdep->copro_type;
283 case MT_MAC_PSEUDOREG_REGNUM:
284 return mt_copro_register_type (arch,
286 + MT_COPRO_PSEUDOREG_MAC_REGNUM);
288 if (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM)
289 return builtin_type (arch)->builtin_int32;
290 else if (regnum < MT_COPRO_PSEUDOREG_ARRAY)
291 return mt_copro_register_type (arch, regnum);
294 regnum -= MT_COPRO_PSEUDOREG_ARRAY;
295 regnum %= MT_COPRO_PSEUDOREG_REGS;
296 regnum += MT_CPR0_REGNUM;
297 return mt_copro_register_type (arch, regnum);
301 internal_error (__FILE__, __LINE__,
302 _("mt_register_type: illegal register number %d"), regnum);
305 /* Return true if register REGNUM is a member of the register group
306 specified by GROUP. */
309 mt_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
310 struct reggroup *group)
312 /* Groups of registers that can be displayed via "info reg". */
313 if (group == all_reggroup)
315 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS
316 && mt_register_name (gdbarch, regnum)[0] != '\0');
318 if (group == general_reggroup)
319 return (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM);
321 if (group == float_reggroup)
322 return 0; /* No float regs. */
324 if (group == vector_reggroup)
325 return 0; /* No vector regs. */
327 /* For any that are not handled above. */
328 return default_register_reggroup_p (gdbarch, regnum, group);
331 /* Return the return value convention used for a given type TYPE.
332 Optionally, fetch or set the return value via READBUF or
333 WRITEBUF respectively using REGCACHE for the register
336 static enum return_value_convention
337 mt_return_value (struct gdbarch *gdbarch, struct value *function,
338 struct type *type, struct regcache *regcache,
339 gdb_byte *readbuf, const gdb_byte *writebuf)
341 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
343 if (TYPE_LENGTH (type) > 4)
345 /* Return values > 4 bytes are returned in memory,
346 pointed to by R11. */
351 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
352 read_memory (addr, readbuf, TYPE_LENGTH (type));
359 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
360 write_memory (addr, writebuf, TYPE_LENGTH (type));
363 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
371 /* Return values of <= 4 bytes are returned in R11. */
372 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &temp);
373 store_unsigned_integer (readbuf, TYPE_LENGTH (type),
379 if (TYPE_LENGTH (type) < 4)
382 /* Add leading zeros to the value. */
383 memset (buf, 0, sizeof (buf));
384 memcpy (buf + sizeof (buf) - TYPE_LENGTH (type),
385 writebuf, TYPE_LENGTH (type));
386 regcache_cooked_write (regcache, MT_R11_REGNUM, buf);
388 else /* (TYPE_LENGTH (type) == 4 */
389 regcache_cooked_write (regcache, MT_R11_REGNUM, writebuf);
392 return RETURN_VALUE_REGISTER_CONVENTION;
396 /* If the input address, PC, is in a function prologue, return the
397 address of the end of the prologue, otherwise return the input
400 Note: PC is likely to be the function start, since this function
401 is mainly used for advancing a breakpoint to the first line, or
402 stepping to the first line when we have stepped into a function
406 mt_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
408 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
409 CORE_ADDR func_addr = 0, func_end = 0;
410 const char *func_name;
413 if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end))
415 struct symtab_and_line sal;
418 /* Found a function. */
419 sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL).symbol;
420 if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
422 /* Don't use this trick for assembly source files. */
423 sal = find_pc_line (func_addr, 0);
425 if (sal.end && sal.end < func_end)
427 /* Found a line number, use it as end of prologue. */
433 /* No function symbol, or no line symbol. Use prologue scanning method. */
436 instr = read_memory_unsigned_integer (pc, 4, byte_order);
437 if (instr == 0x12000000) /* nop */
439 if (instr == 0x12ddc000) /* copy sp into fp */
442 if (instr == 0x05dd) /* subi sp, sp, imm */
444 if (instr >= 0x43c0 && instr <= 0x43df) /* push */
446 /* Not an obvious prologue instruction. */
453 /* Implement the breakpoint_kind_from_pc gdbarch method. */
456 mt_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
461 /* Implement the sw_breakpoint_from_kind gdbarch method. */
463 static const gdb_byte *
464 mt_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
466 /* The breakpoint instruction must be the same size as the smallest
467 instruction in the instruction set.
469 The BP for ms1 is defined as 0x68000000 (BREAK).
470 The BP for ms2 is defined as 0x69000000 (illegal). */
471 static gdb_byte ms1_breakpoint[] = { 0x68, 0, 0, 0 };
472 static gdb_byte ms2_breakpoint[] = { 0x69, 0, 0, 0 };
476 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
477 return ms2_breakpoint;
479 return ms1_breakpoint;
482 /* Select the correct coprocessor register bank. Return the pseudo
483 regnum we really want to read. */
486 mt_select_coprocessor (struct gdbarch *gdbarch,
487 struct regcache *regcache, int regno)
489 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
490 unsigned index, base;
493 /* Get the copro pseudo regnum. */
494 regcache_raw_read (regcache, MT_COPRO_REGNUM, copro);
495 base = ((extract_signed_integer (&copro[0], 2, byte_order)
496 * MT_COPRO_PSEUDOREG_DIM_2)
497 + extract_signed_integer (&copro[2], 2, byte_order));
499 regno -= MT_COPRO_PSEUDOREG_ARRAY;
500 index = regno % MT_COPRO_PSEUDOREG_REGS;
501 regno /= MT_COPRO_PSEUDOREG_REGS;
504 /* Select the correct coprocessor register bank. Invalidate the
505 coprocessor register cache. */
508 store_signed_integer (&copro[0], 2, byte_order,
509 regno / MT_COPRO_PSEUDOREG_DIM_2);
510 store_signed_integer (&copro[2], 2, byte_order,
511 regno % MT_COPRO_PSEUDOREG_DIM_2);
512 regcache_raw_write (regcache, MT_COPRO_REGNUM, copro);
514 /* We must flush the cache, as it is now invalid. */
515 for (ix = MT_NUM_CPU_REGS; ix != MT_NUM_REGS; ix++)
516 regcache_invalidate (regcache, ix);
522 /* Fetch the pseudo registers:
524 There are two regular pseudo-registers:
525 1) The 'coprocessor' pseudo-register (which mirrors the
526 "real" coprocessor register sent by the target), and
527 2) The 'MAC' pseudo-register (which represents the union
528 of the original 32 bit target MAC register and the new
529 8-bit extended-MAC register).
531 Additionally there is an array of coprocessor registers which track
532 the coprocessor registers for each coprocessor. */
534 static enum register_status
535 mt_pseudo_register_read (struct gdbarch *gdbarch,
536 struct regcache *regcache, int regno, gdb_byte *buf)
538 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
542 case MT_COPRO_REGNUM:
543 case MT_COPRO_PSEUDOREG_REGNUM:
544 return regcache_raw_read (regcache, MT_COPRO_REGNUM, buf);
546 case MT_MAC_PSEUDOREG_REGNUM:
547 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
548 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
550 enum register_status status;
551 ULONGEST oldmac = 0, ext_mac = 0;
554 status = regcache_cooked_read_unsigned (regcache, MT_MAC_REGNUM, &oldmac);
555 if (status != REG_VALID)
558 regcache_cooked_read_unsigned (regcache, MT_EXMAC_REGNUM, &ext_mac);
559 if (status != REG_VALID)
563 (oldmac & 0xffffffff) | ((long long) (ext_mac & 0xff) << 32);
564 store_signed_integer (buf, 8, byte_order, newmac);
569 return regcache_raw_read (regcache, MT_MAC_REGNUM, buf);
573 unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
575 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
576 return mt_pseudo_register_read (gdbarch, regcache,
577 MT_MAC_PSEUDOREG_REGNUM, buf);
578 else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
579 return regcache_raw_read (regcache, index + MT_CPR0_REGNUM, buf);
588 /* Write the pseudo registers:
590 Mt pseudo-registers are stored directly to the target. The
591 'coprocessor' register is special, because when it is modified, all
592 the other coprocessor regs must be flushed from the reg cache. */
595 mt_pseudo_register_write (struct gdbarch *gdbarch,
596 struct regcache *regcache,
597 int regno, const gdb_byte *buf)
599 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
604 case MT_COPRO_REGNUM:
605 case MT_COPRO_PSEUDOREG_REGNUM:
606 regcache_raw_write (regcache, MT_COPRO_REGNUM, buf);
607 for (i = MT_NUM_CPU_REGS; i < MT_NUM_REGS; i++)
608 regcache_invalidate (regcache, i);
611 case MT_MAC_PSEUDOREG_REGNUM:
612 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
613 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
615 /* The 8-byte MAC pseudo-register must be broken down into two
616 32-byte registers. */
617 unsigned int oldmac, ext_mac;
620 newmac = extract_unsigned_integer (buf, 8, byte_order);
621 oldmac = newmac & 0xffffffff;
622 ext_mac = (newmac >> 32) & 0xff;
623 regcache_cooked_write_unsigned (regcache, MT_MAC_REGNUM, oldmac);
624 regcache_cooked_write_unsigned (regcache, MT_EXMAC_REGNUM, ext_mac);
627 regcache_raw_write (regcache, MT_MAC_REGNUM, buf);
631 unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
633 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
634 mt_pseudo_register_write (gdbarch, regcache,
635 MT_MAC_PSEUDOREG_REGNUM, buf);
636 else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
637 regcache_raw_write (regcache, index + MT_CPR0_REGNUM, buf);
644 mt_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
646 /* Register size is 4 bytes. */
647 return align_down (sp, 4);
650 /* Implements the "info registers" command. When ``all'' is non-zero,
651 the coprocessor registers will be printed in addition to the rest
655 mt_registers_info (struct gdbarch *gdbarch,
656 struct ui_file *file,
657 struct frame_info *frame, int regnum, int all)
659 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
665 lim = all ? MT_NUM_REGS : MT_NUM_CPU_REGS;
667 for (regnum = 0; regnum < lim; regnum++)
669 /* Don't display the Qchannel register since it will be displayed
670 along with Ichannel. (See below.) */
671 if (regnum == MT_QCHANNEL_REGNUM)
674 mt_registers_info (gdbarch, file, frame, regnum, all);
676 /* Display the Qchannel register immediately after Ichannel. */
677 if (regnum == MT_ICHANNEL_REGNUM)
678 mt_registers_info (gdbarch, file, frame, MT_QCHANNEL_REGNUM, all);
683 if (regnum == MT_EXMAC_REGNUM)
685 else if (regnum == MT_CONTEXT_REGNUM)
687 /* Special output handling for 38-bit context register. */
689 unsigned int i, regsize;
691 regsize = register_size (gdbarch, regnum);
693 buff = (unsigned char *) alloca (regsize);
695 deprecated_frame_register_read (frame, regnum, buff);
697 fputs_filtered (gdbarch_register_name
698 (gdbarch, regnum), file);
699 print_spaces_filtered (15 - strlen (gdbarch_register_name
702 fputs_filtered ("0x", file);
704 for (i = 0; i < regsize; i++)
705 fprintf_filtered (file, "%02x", (unsigned int)
706 extract_unsigned_integer (buff + i, 1, byte_order));
707 fputs_filtered ("\t", file);
708 print_longest (file, 'd', 0,
709 extract_unsigned_integer (buff, regsize, byte_order));
710 fputs_filtered ("\n", file);
712 else if (regnum == MT_COPRO_REGNUM
713 || regnum == MT_COPRO_PSEUDOREG_REGNUM)
715 /* Special output handling for the 'coprocessor' register. */
716 struct value_print_options opts;
719 val = get_frame_register_value (frame, MT_COPRO_REGNUM);
721 regnum = MT_COPRO_PSEUDOREG_REGNUM;
722 fputs_filtered (gdbarch_register_name (gdbarch, regnum),
724 print_spaces_filtered (15 - strlen (gdbarch_register_name
727 get_no_prettyformat_print_options (&opts);
729 val_print (register_type (gdbarch, regnum),
731 &opts, current_language);
732 fputs_filtered ("\n", file);
734 else if (regnum == MT_MAC_REGNUM || regnum == MT_MAC_PSEUDOREG_REGNUM)
736 ULONGEST oldmac, ext_mac, newmac;
737 gdb_byte buf[3 * sizeof (LONGEST)];
739 /* Get the two "real" mac registers. */
740 deprecated_frame_register_read (frame, MT_MAC_REGNUM, buf);
741 oldmac = extract_unsigned_integer
742 (buf, register_size (gdbarch, MT_MAC_REGNUM), byte_order);
743 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
744 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
746 deprecated_frame_register_read (frame, MT_EXMAC_REGNUM, buf);
747 ext_mac = extract_unsigned_integer
748 (buf, register_size (gdbarch, MT_EXMAC_REGNUM), byte_order);
753 /* Add them together. */
754 newmac = (oldmac & 0xffffffff) + ((ext_mac & 0xff) << 32);
757 regnum = MT_MAC_PSEUDOREG_REGNUM;
758 fputs_filtered (gdbarch_register_name (gdbarch, regnum),
760 print_spaces_filtered (15 - strlen (gdbarch_register_name
763 fputs_filtered ("0x", file);
764 print_longest (file, 'x', 0, newmac);
765 fputs_filtered ("\t", file);
766 print_longest (file, 'u', 0, newmac);
767 fputs_filtered ("\n", file);
770 default_print_registers_info (gdbarch, file, frame, regnum, all);
774 /* Set up the callee's arguments for an inferior function call. The
775 arguments are pushed on the stack or are placed in registers as
776 appropriate. It also sets up the return address (which points to
777 the call dummy breakpoint).
779 Returns the updated (and aligned) stack pointer. */
782 mt_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
783 struct regcache *regcache, CORE_ADDR bp_addr,
784 int nargs, struct value **args, CORE_ADDR sp,
785 int struct_return, CORE_ADDR struct_addr)
788 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
789 gdb_byte buf[MT_MAX_STRUCT_SIZE];
790 int argreg = MT_1ST_ARGREG;
791 int split_param_len = 0;
797 /* First handle however many args we can fit into MT_1ST_ARGREG thru
799 for (i = 0; i < nargs && argreg <= MT_LAST_ARGREG; i++)
802 typelen = TYPE_LENGTH (value_type (args[i]));
809 regcache_cooked_write_unsigned (regcache, argreg++,
810 extract_unsigned_integer
811 (value_contents (args[i]),
812 wordsize, byte_order));
817 val = value_contents (args[i]);
820 if (argreg <= MT_LAST_ARGREG)
822 /* This word of the argument is passed in a register. */
823 regcache_cooked_write_unsigned (regcache, argreg++,
824 extract_unsigned_integer
825 (val, wordsize, byte_order));
831 /* Remainder of this arg must be passed on the stack
832 (deferred to do later). */
833 split_param_len = typelen;
834 memcpy (buf, val, typelen);
835 break; /* No more args can be handled in regs. */
840 /* By reverse engineering of gcc output, args bigger than
841 16 bytes go on the stack, and their address is passed
843 stack_dest -= typelen;
844 write_memory (stack_dest, value_contents (args[i]), typelen);
845 regcache_cooked_write_unsigned (regcache, argreg++, stack_dest);
850 /* Next, the rest of the arguments go onto the stack, in reverse order. */
851 for (j = nargs - 1; j >= i; j--)
853 const gdb_byte *contents = value_contents (args[j]);
855 /* Right-justify the value in an aligned-length buffer. */
856 typelen = TYPE_LENGTH (value_type (args[j]));
857 slacklen = (wordsize - (typelen % wordsize)) % wordsize;
858 gdb::byte_vector val (typelen + slacklen);
859 memcpy (val.data (), contents, typelen);
860 memset (val.data () + typelen, 0, slacklen);
861 /* Now write this data to the stack. */
862 stack_dest -= typelen + slacklen;
863 write_memory (stack_dest, val.data (), typelen + slacklen);
866 /* Finally, if a param needs to be split between registers and stack,
867 write the second half to the stack now. */
868 if (split_param_len != 0)
870 stack_dest -= split_param_len;
871 write_memory (stack_dest, buf, split_param_len);
874 /* Set up return address (provided to us as bp_addr). */
875 regcache_cooked_write_unsigned (regcache, MT_RA_REGNUM, bp_addr);
877 /* Store struct return address, if given. */
878 if (struct_return && struct_addr != 0)
879 regcache_cooked_write_unsigned (regcache, MT_R11_REGNUM, struct_addr);
881 /* Set aside 16 bytes for the callee to save regs 1-4. */
884 /* Update the stack pointer. */
885 regcache_cooked_write_unsigned (regcache, MT_SP_REGNUM, stack_dest);
887 /* And that should do it. Return the new stack pointer. */
892 /* The 'unwind_cache' data structure. */
894 struct mt_unwind_cache
896 /* The previous frame's inner most stack address.
897 Used as this frame ID's stack_addr. */
899 CORE_ADDR frame_base;
903 /* Table indicating the location of each and every register. */
904 struct trad_frame_saved_reg *saved_regs;
907 /* Initialize an unwind_cache. Build up the saved_regs table etc. for
910 static struct mt_unwind_cache *
911 mt_frame_unwind_cache (struct frame_info *this_frame,
912 void **this_prologue_cache)
914 struct gdbarch *gdbarch;
915 struct mt_unwind_cache *info;
916 CORE_ADDR next_addr, start_addr, end_addr, prologue_end_addr;
917 unsigned long instr, upper_half, delayed_store = 0;
921 if ((*this_prologue_cache))
922 return (struct mt_unwind_cache *) (*this_prologue_cache);
924 gdbarch = get_frame_arch (this_frame);
925 info = FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache);
926 (*this_prologue_cache) = info;
930 info->frame_base = 0;
931 info->frameless_p = 1;
932 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
934 /* Grab the frame-relative values of SP and FP, needed below.
935 The frame_saved_register function will find them on the
936 stack or in the registers as appropriate. */
937 sp = get_frame_register_unsigned (this_frame, MT_SP_REGNUM);
938 fp = get_frame_register_unsigned (this_frame, MT_FP_REGNUM);
940 start_addr = get_frame_func (this_frame);
942 /* Return early if GDB couldn't find the function. */
946 end_addr = get_frame_pc (this_frame);
947 prologue_end_addr = skip_prologue_using_sal (gdbarch, start_addr);
949 for (next_addr = start_addr; next_addr < end_addr; next_addr += 4)
951 instr = get_frame_memory_unsigned (this_frame, next_addr, 4);
952 if (delayed_store) /* Previous instr was a push. */
954 upper_half = delayed_store >> 16;
955 regnum = upper_half & 0xf;
956 offset = delayed_store & 0xffff;
957 switch (upper_half & 0xfff0)
959 case 0x43c0: /* push using frame pointer. */
960 info->saved_regs[regnum].addr = offset;
962 case 0x43d0: /* push using stack pointer. */
963 info->saved_regs[regnum].addr = offset;
973 case 0x12000000: /* NO-OP */
975 case 0x12ddc000: /* copy sp into fp */
976 info->frameless_p = 0; /* Record that the frame
977 pointer is in use. */
980 upper_half = instr >> 16;
981 if (upper_half == 0x05dd || /* subi sp, sp, imm */
982 upper_half == 0x07dd) /* subui sp, sp, imm */
984 /* Record the frame size. */
985 info->framesize = instr & 0xffff;
988 if ((upper_half & 0xfff0) == 0x43c0 || /* frame push */
989 (upper_half & 0xfff0) == 0x43d0) /* stack push */
991 /* Save this instruction, but don't record the
992 pushed register as 'saved' until we see the
993 next instruction. That's because of deferred stores
994 on this target -- GDB won't be able to read the register
995 from the stack until one instruction later. */
996 delayed_store = instr;
999 /* Not a prologue instruction. Is this the end of the prologue?
1000 This is the most difficult decision; when to stop scanning.
1002 If we have no line symbol, then the best thing we can do
1003 is to stop scanning when we encounter an instruction that
1004 is not likely to be a part of the prologue.
1006 But if we do have a line symbol, then we should
1007 keep scanning until we reach it (or we reach end_addr). */
1009 if (prologue_end_addr && (prologue_end_addr > (next_addr + 4)))
1010 continue; /* Keep scanning, recording saved_regs etc. */
1012 break; /* Quit scanning: breakpoint can be set here. */
1016 /* Special handling for the "saved" address of the SP:
1017 The SP is of course never saved on the stack at all, so
1018 by convention what we put here is simply the previous
1019 _value_ of the SP (as opposed to an address where the
1020 previous value would have been pushed). This will also
1021 give us the frame base address. */
1023 if (info->frameless_p)
1025 info->frame_base = sp + info->framesize;
1026 info->prev_sp = sp + info->framesize;
1030 info->frame_base = fp + info->framesize;
1031 info->prev_sp = fp + info->framesize;
1033 /* Save prev_sp in saved_regs as a value, not as an address. */
1034 trad_frame_set_value (info->saved_regs, MT_SP_REGNUM, info->prev_sp);
1036 /* Now convert frame offsets to actual addresses (not offsets). */
1037 for (regnum = 0; regnum < MT_NUM_REGS; regnum++)
1038 if (trad_frame_addr_p (info->saved_regs, regnum))
1039 info->saved_regs[regnum].addr += info->frame_base - info->framesize;
1041 /* The call instruction moves the caller's PC in the callee's RA reg.
1042 Since this is an unwind, do the reverse. Copy the location of RA
1043 into PC (the address / regnum) so that a request for PC will be
1044 converted into a request for the RA. */
1045 info->saved_regs[MT_PC_REGNUM] = info->saved_regs[MT_RA_REGNUM];
1051 mt_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1055 pc = frame_unwind_register_unsigned (next_frame, MT_PC_REGNUM);
1060 mt_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1064 sp = frame_unwind_register_unsigned (next_frame, MT_SP_REGNUM);
1068 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1069 frame. The frame ID's base needs to match the TOS value saved by
1070 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1072 static struct frame_id
1073 mt_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1075 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MT_SP_REGNUM);
1076 return frame_id_build (sp, get_frame_pc (this_frame));
1079 /* Given a GDB frame, determine the address of the calling function's
1080 frame. This will be used to create a new GDB frame struct. */
1083 mt_frame_this_id (struct frame_info *this_frame,
1084 void **this_prologue_cache, struct frame_id *this_id)
1086 struct mt_unwind_cache *info =
1087 mt_frame_unwind_cache (this_frame, this_prologue_cache);
1089 if (!(info == NULL || info->prev_sp == 0))
1090 (*this_id) = frame_id_build (info->prev_sp, get_frame_func (this_frame));
1095 static struct value *
1096 mt_frame_prev_register (struct frame_info *this_frame,
1097 void **this_prologue_cache, int regnum)
1099 struct mt_unwind_cache *info =
1100 mt_frame_unwind_cache (this_frame, this_prologue_cache);
1102 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1106 mt_frame_base_address (struct frame_info *this_frame,
1107 void **this_prologue_cache)
1109 struct mt_unwind_cache *info =
1110 mt_frame_unwind_cache (this_frame, this_prologue_cache);
1112 return info->frame_base;
1115 /* This is a shared interface: the 'frame_unwind' object is what's
1116 returned by the 'sniffer' function, and in turn specifies how to
1117 get a frame's ID and prev_regs.
1119 This exports the 'prev_register' and 'this_id' methods. */
1121 static const struct frame_unwind mt_frame_unwind = {
1123 default_frame_unwind_stop_reason,
1125 mt_frame_prev_register,
1127 default_frame_sniffer
1130 /* Another shared interface: the 'frame_base' object specifies how to
1131 unwind a frame and secure the base addresses for frame objects
1134 static struct frame_base mt_frame_base = {
1136 mt_frame_base_address,
1137 mt_frame_base_address,
1138 mt_frame_base_address
1141 static struct gdbarch *
1142 mt_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1144 struct gdbarch *gdbarch;
1145 struct gdbarch_tdep *tdep;
1147 /* Find a candidate among the list of pre-declared architectures. */
1148 arches = gdbarch_list_lookup_by_info (arches, &info);
1150 return arches->gdbarch;
1152 /* None found, create a new architecture from the information
1154 tdep = XCNEW (struct gdbarch_tdep);
1155 gdbarch = gdbarch_alloc (&info, tdep);
1157 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1158 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1159 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
1161 set_gdbarch_register_name (gdbarch, mt_register_name);
1162 set_gdbarch_num_regs (gdbarch, MT_NUM_REGS);
1163 set_gdbarch_num_pseudo_regs (gdbarch, MT_NUM_PSEUDO_REGS);
1164 set_gdbarch_pc_regnum (gdbarch, MT_PC_REGNUM);
1165 set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);
1166 set_gdbarch_pseudo_register_read (gdbarch, mt_pseudo_register_read);
1167 set_gdbarch_pseudo_register_write (gdbarch, mt_pseudo_register_write);
1168 set_gdbarch_skip_prologue (gdbarch, mt_skip_prologue);
1169 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1170 set_gdbarch_breakpoint_kind_from_pc (gdbarch, mt_breakpoint_kind_from_pc);
1171 set_gdbarch_sw_breakpoint_from_kind (gdbarch, mt_sw_breakpoint_from_kind);
1172 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1173 set_gdbarch_frame_args_skip (gdbarch, 0);
1174 set_gdbarch_register_type (gdbarch, mt_register_type);
1175 set_gdbarch_register_reggroup_p (gdbarch, mt_register_reggroup_p);
1177 set_gdbarch_return_value (gdbarch, mt_return_value);
1178 set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);
1180 set_gdbarch_frame_align (gdbarch, mt_frame_align);
1182 set_gdbarch_print_registers_info (gdbarch, mt_registers_info);
1184 set_gdbarch_push_dummy_call (gdbarch, mt_push_dummy_call);
1186 /* Target builtin data types. */
1187 set_gdbarch_short_bit (gdbarch, 16);
1188 set_gdbarch_int_bit (gdbarch, 32);
1189 set_gdbarch_long_bit (gdbarch, 32);
1190 set_gdbarch_long_long_bit (gdbarch, 64);
1191 set_gdbarch_float_bit (gdbarch, 32);
1192 set_gdbarch_double_bit (gdbarch, 64);
1193 set_gdbarch_long_double_bit (gdbarch, 64);
1194 set_gdbarch_ptr_bit (gdbarch, 32);
1196 /* Register the DWARF 2 sniffer first, and then the traditional prologue
1198 dwarf2_append_unwinders (gdbarch);
1199 frame_unwind_append_unwinder (gdbarch, &mt_frame_unwind);
1200 frame_base_set_default (gdbarch, &mt_frame_base);
1202 /* Register the 'unwind_pc' method. */
1203 set_gdbarch_unwind_pc (gdbarch, mt_unwind_pc);
1204 set_gdbarch_unwind_sp (gdbarch, mt_unwind_sp);
1206 /* Methods for saving / extracting a dummy frame's ID.
1207 The ID's stack address must match the SP value returned by
1208 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1209 set_gdbarch_dummy_id (gdbarch, mt_dummy_id);
1215 _initialize_mt_tdep (void)
1217 register_gdbarch_init (bfd_arch_mt, mt_gdbarch_init);