1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2007, 2008 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "arch-utils.h"
26 #include "gdb_string.h"
27 #include "gdb_assert.h"
28 #include "gdbcore.h" /* for write_memory_unsigned_integer */
32 #include "frame-unwind.h"
33 #include "frame-base.h"
34 #include "trad-frame.h"
36 #include "dwarf2-frame.h"
41 #include "mn10300-tdep.h"
44 extern struct trad_frame_cache *mn10300_frame_unwind_cache (struct frame_info*,
47 /* Compute the alignment required by a type. */
50 mn10300_type_align (struct type *type)
54 switch (TYPE_CODE (type))
65 return TYPE_LENGTH (type);
67 case TYPE_CODE_COMPLEX:
68 return TYPE_LENGTH (type) / 2;
70 case TYPE_CODE_STRUCT:
72 for (i = 0; i < TYPE_NFIELDS (type); i++)
74 int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
75 while (align < falign)
81 /* HACK! Structures containing arrays, even small ones, are not
82 elligible for returning in registers. */
85 case TYPE_CODE_TYPEDEF:
86 return mn10300_type_align (check_typedef (type));
89 internal_error (__FILE__, __LINE__, _("bad switch"));
93 /* Should call_function allocate stack space for a struct return? */
95 mn10300_use_struct_convention (struct type *type)
97 /* Structures bigger than a pair of words can't be returned in
99 if (TYPE_LENGTH (type) > 8)
102 switch (TYPE_CODE (type))
104 case TYPE_CODE_STRUCT:
105 case TYPE_CODE_UNION:
106 /* Structures with a single field are handled as the field
108 if (TYPE_NFIELDS (type) == 1)
109 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
111 /* Structures with word or double-word size are passed in memory, as
112 long as they require at least word alignment. */
113 if (mn10300_type_align (type) >= 4)
118 /* Arrays are addressable, so they're never returned in
119 registers. This condition can only hold when the array is
120 the only field of a struct or union. */
121 case TYPE_CODE_ARRAY:
124 case TYPE_CODE_TYPEDEF:
125 return mn10300_use_struct_convention (check_typedef (type));
133 mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
134 struct regcache *regcache, const void *valbuf)
136 int len = TYPE_LENGTH (type);
139 if (TYPE_CODE (type) == TYPE_CODE_PTR)
144 regsz = register_size (gdbarch, reg);
147 regcache_raw_write_part (regcache, reg, 0, len, valbuf);
148 else if (len <= 2 * regsz)
150 regcache_raw_write (regcache, reg, valbuf);
151 gdb_assert (regsz == register_size (gdbarch, reg + 1));
152 regcache_raw_write_part (regcache, reg+1, 0,
153 len - regsz, (char *) valbuf + regsz);
156 internal_error (__FILE__, __LINE__,
157 _("Cannot store return value %d bytes long."), len);
161 mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
162 struct regcache *regcache, void *valbuf)
164 char buf[MAX_REGISTER_SIZE];
165 int len = TYPE_LENGTH (type);
168 if (TYPE_CODE (type) == TYPE_CODE_PTR)
173 regsz = register_size (gdbarch, reg);
176 regcache_raw_read (regcache, reg, buf);
177 memcpy (valbuf, buf, len);
179 else if (len <= 2 * regsz)
181 regcache_raw_read (regcache, reg, buf);
182 memcpy (valbuf, buf, regsz);
183 gdb_assert (regsz == register_size (gdbarch, reg + 1));
184 regcache_raw_read (regcache, reg + 1, buf);
185 memcpy ((char *) valbuf + regsz, buf, len - regsz);
188 internal_error (__FILE__, __LINE__,
189 _("Cannot extract return value %d bytes long."), len);
192 /* Determine, for architecture GDBARCH, how a return value of TYPE
193 should be returned. If it is supposed to be returned in registers,
194 and READBUF is non-zero, read the appropriate value from REGCACHE,
195 and copy it into READBUF. If WRITEBUF is non-zero, write the value
196 from WRITEBUF into REGCACHE. */
198 static enum return_value_convention
199 mn10300_return_value (struct gdbarch *gdbarch, struct type *type,
200 struct regcache *regcache, gdb_byte *readbuf,
201 const gdb_byte *writebuf)
203 if (mn10300_use_struct_convention (type))
204 return RETURN_VALUE_STRUCT_CONVENTION;
207 mn10300_extract_return_value (gdbarch, type, regcache, readbuf);
209 mn10300_store_return_value (gdbarch, type, regcache, writebuf);
211 return RETURN_VALUE_REGISTER_CONVENTION;
215 register_name (int reg, char **regs, long sizeof_regs)
217 if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
224 mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
226 static char *regs[] =
227 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
228 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
229 "", "", "", "", "", "", "", "",
230 "", "", "", "", "", "", "", "fp"
232 return register_name (reg, regs, sizeof regs);
237 am33_register_name (struct gdbarch *gdbarch, int reg)
239 static char *regs[] =
240 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
241 "sp", "pc", "mdr", "psw", "lir", "lar", "",
242 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
243 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
245 return register_name (reg, regs, sizeof regs);
249 am33_2_register_name (struct gdbarch *gdbarch, int reg)
251 static char *regs[] =
253 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
254 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
255 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
256 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
257 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
258 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
259 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
260 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
262 return register_name (reg, regs, sizeof regs);
266 mn10300_register_type (struct gdbarch *gdbarch, int reg)
268 return builtin_type_int;
272 mn10300_read_pc (struct regcache *regcache)
275 regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
280 mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
282 regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
285 /* The breakpoint instruction must be the same size as the smallest
286 instruction in the instruction set.
288 The Matsushita mn10x00 processors have single byte instructions
289 so we need a single byte breakpoint. Matsushita hasn't defined
290 one, so we defined it ourselves. */
292 const static unsigned char *
293 mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
296 static char breakpoint[] = {0xff};
301 /* Set offsets of saved registers.
302 This is a helper function for mn10300_analyze_prologue. */
305 set_reg_offsets (struct frame_info *fi,
309 int stack_extra_size,
312 struct gdbarch *gdbarch;
313 struct trad_frame_cache *cache;
317 if (fi == NULL || this_cache == NULL)
320 cache = mn10300_frame_unwind_cache (fi, this_cache);
323 gdbarch = get_frame_arch (fi);
327 base = frame_unwind_register_unsigned (fi, E_A3_REGNUM);
331 base = frame_unwind_register_unsigned (fi, E_SP_REGNUM)
335 trad_frame_set_this_base (cache, base);
337 if (AM33_MODE (gdbarch) == 2)
339 /* If bit N is set in fpregmask, fsN is saved on the stack.
340 The floating point registers are saved in ascending order.
341 For example: fs16 <- Frame Pointer
342 fs17 Frame Pointer + 4 */
346 for (i = 0; i < 32; i++)
348 if (fpregmask & (1 << i))
350 trad_frame_set_reg_addr (cache, E_FS0_REGNUM + i,
359 if (movm_args & movm_other_bit)
361 /* The `other' bit leaves a blank area of four bytes at the
362 beginning of its block of saved registers, making it 32 bytes
364 trad_frame_set_reg_addr (cache, E_LAR_REGNUM, base + offset + 4);
365 trad_frame_set_reg_addr (cache, E_LIR_REGNUM, base + offset + 8);
366 trad_frame_set_reg_addr (cache, E_MDR_REGNUM, base + offset + 12);
367 trad_frame_set_reg_addr (cache, E_A0_REGNUM + 1, base + offset + 16);
368 trad_frame_set_reg_addr (cache, E_A0_REGNUM, base + offset + 20);
369 trad_frame_set_reg_addr (cache, E_D0_REGNUM + 1, base + offset + 24);
370 trad_frame_set_reg_addr (cache, E_D0_REGNUM, base + offset + 28);
374 if (movm_args & movm_a3_bit)
376 trad_frame_set_reg_addr (cache, E_A3_REGNUM, base + offset);
379 if (movm_args & movm_a2_bit)
381 trad_frame_set_reg_addr (cache, E_A2_REGNUM, base + offset);
384 if (movm_args & movm_d3_bit)
386 trad_frame_set_reg_addr (cache, E_D3_REGNUM, base + offset);
389 if (movm_args & movm_d2_bit)
391 trad_frame_set_reg_addr (cache, E_D2_REGNUM, base + offset);
394 if (AM33_MODE (gdbarch))
396 if (movm_args & movm_exother_bit)
398 trad_frame_set_reg_addr (cache, E_MCVF_REGNUM, base + offset);
399 trad_frame_set_reg_addr (cache, E_MCRL_REGNUM, base + offset + 4);
400 trad_frame_set_reg_addr (cache, E_MCRH_REGNUM, base + offset + 8);
401 trad_frame_set_reg_addr (cache, E_MDRQ_REGNUM, base + offset + 12);
402 trad_frame_set_reg_addr (cache, E_E1_REGNUM, base + offset + 16);
403 trad_frame_set_reg_addr (cache, E_E0_REGNUM, base + offset + 20);
406 if (movm_args & movm_exreg1_bit)
408 trad_frame_set_reg_addr (cache, E_E7_REGNUM, base + offset);
409 trad_frame_set_reg_addr (cache, E_E6_REGNUM, base + offset + 4);
410 trad_frame_set_reg_addr (cache, E_E5_REGNUM, base + offset + 8);
411 trad_frame_set_reg_addr (cache, E_E4_REGNUM, base + offset + 12);
414 if (movm_args & movm_exreg0_bit)
416 trad_frame_set_reg_addr (cache, E_E3_REGNUM, base + offset);
417 trad_frame_set_reg_addr (cache, E_E2_REGNUM, base + offset + 4);
421 /* The last (or first) thing on the stack will be the PC. */
422 trad_frame_set_reg_addr (cache, E_PC_REGNUM, base + offset);
423 /* Save the SP in the 'traditional' way.
424 This will be the same location where the PC is saved. */
425 trad_frame_set_reg_value (cache, E_SP_REGNUM, base + offset);
428 /* The main purpose of this file is dealing with prologues to extract
429 information about stack frames and saved registers.
431 In gcc/config/mn13000/mn10300.c, the expand_prologue prologue
432 function is pretty readable, and has a nice explanation of how the
433 prologue is generated. The prologues generated by that code will
434 have the following form (NOTE: the current code doesn't handle all
437 + If this is an old-style varargs function, then its arguments
438 need to be flushed back to the stack:
443 + If we use any of the callee-saved registers, save them now.
445 movm [some callee-saved registers],(sp)
447 + If we have any floating-point registers to save:
449 - Decrement the stack pointer to reserve space for the registers.
450 If the function doesn't need a frame pointer, we may combine
451 this with the adjustment that reserves space for the frame.
455 - Save the floating-point registers. We have two possible
458 . Save them at fixed offset from the SP:
460 fmov fsN,(OFFSETN,sp)
461 fmov fsM,(OFFSETM,sp)
464 Note that, if OFFSETN happens to be zero, you'll get the
465 different opcode: fmov fsN,(sp)
467 . Or, set a0 to the start of the save area, and then use
468 post-increment addressing to save the FP registers.
476 + If the function needs a frame pointer, we set it here.
480 + Now we reserve space for the stack frame proper. This could be
481 merged into the `add -SIZE, sp' instruction for FP saves up
482 above, unless we needed to set the frame pointer in the previous
483 step, or the frame is so large that allocating the whole thing at
484 once would put the FP register save slots out of reach of the
485 addressing mode (128 bytes).
489 One day we might keep the stack pointer constant, that won't
490 change the code for prologues, but it will make the frame
491 pointerless case much more common. */
493 /* Analyze the prologue to determine where registers are saved,
494 the end of the prologue, etc etc. Return the end of the prologue
497 We store into FI (if non-null) several tidbits of information:
499 * stack_size -- size of this stack frame. Note that if we stop in
500 certain parts of the prologue/epilogue we may claim the size of the
501 current frame is zero. This happens when the current frame has
502 not been allocated yet or has already been deallocated.
504 * fsr -- Addresses of registers saved in the stack by this frame.
506 * status -- A (relatively) generic status indicator. It's a bitmask
507 with the following bits:
509 MY_FRAME_IN_SP: The base of the current frame is actually in
510 the stack pointer. This can happen for frame pointerless
511 functions, or cases where we're stopped in the prologue/epilogue
512 itself. For these cases mn10300_analyze_prologue will need up
513 update fi->frame before returning or analyzing the register
516 MY_FRAME_IN_FP: The base of the current frame is in the
517 frame pointer register ($a3).
519 NO_MORE_FRAMES: Set this if the current frame is "start" or
520 if the first instruction looks like mov <imm>,sp. This tells
521 frame chain to not bother trying to unwind past this frame. */
524 mn10300_analyze_prologue (struct gdbarch *gdbarch, struct frame_info *fi,
528 CORE_ADDR func_addr, func_end, addr, stop;
529 long stack_extra_size = 0;
531 unsigned char buf[4];
538 /* Use the PC in the frame if it's provided to look up the
539 start of this function.
541 Note: kevinb/2003-07-16: We used to do the following here:
542 pc = (fi ? get_frame_pc (fi) : pc);
543 But this is (now) badly broken when called from analyze_dummy_frame().
547 pc = (pc ? pc : get_frame_pc (fi));
550 /* Find the start of this function. */
551 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
553 /* Do nothing if we couldn't find the start of this function
555 MVS: comment went on to say "or if we're stopped at the first
556 instruction in the prologue" -- but code doesn't reflect that,
557 and I don't want to do that anyway. */
561 goto finish_prologue;
564 /* If we're in start, then give up. */
565 if (strcmp (name, "start") == 0)
568 goto finish_prologue;
571 /* Figure out where to stop scanning. */
572 stop = fi ? pc : func_end;
574 /* Don't walk off the end of the function. */
575 stop = stop > func_end ? func_end : stop;
577 /* Start scanning on the first instruction of this function. */
580 /* Suck in two bytes. */
581 if (addr + 2 > stop || !safe_frame_unwind_memory (fi, addr, buf, 2))
582 goto finish_prologue;
584 /* First see if this insn sets the stack pointer from a register; if
585 so, it's probably the initialization of the stack pointer in _start,
586 so mark this as the bottom-most frame. */
587 if (buf[0] == 0xf2 && (buf[1] & 0xf3) == 0xf0)
589 goto finish_prologue;
592 /* Now look for movm [regs],sp, which saves the callee saved registers.
594 At this time we don't know if fi->frame is valid, so we only note
595 that we encountered a movm instruction. Later, we'll set the entries
596 in fsr.regs as needed. */
599 /* Extract the register list for the movm instruction. */
604 /* Quit now if we're beyond the stop point. */
606 goto finish_prologue;
608 /* Get the next two bytes so the prologue scan can continue. */
609 if (!safe_frame_unwind_memory (fi, addr, buf, 2))
610 goto finish_prologue;
613 /* Check for "mov pc, a2", an instruction found in optimized, position
614 independent code. Skip it if found. */
615 if (buf[0] == 0xf0 && buf[1] == 0x2e)
619 /* Quit now if we're beyond the stop point. */
621 goto finish_prologue;
623 /* Get the next two bytes so the prologue scan can continue. */
624 status = target_read_memory (addr, buf, 2);
626 goto finish_prologue;
629 if (AM33_MODE (gdbarch) == 2)
631 /* Determine if any floating point registers are to be saved.
632 Look for one of the following three prologue formats:
634 [movm [regs],(sp)] [movm [regs],(sp)] [movm [regs],(sp)]
636 add -SIZE,sp add -SIZE,sp add -SIZE,sp
637 fmov fs#,(sp) mov sp,a0/a1 mov sp,a0/a1
638 fmov fs#,(#,sp) fmov fs#,(a0/a1+) add SIZE2,a0/a1
639 ... ... fmov fs#,(a0/a1+)
641 fmov fs#,(#,sp) fmov fs#,(a0/a1+) fmov fs#,(a0/a1+)
643 [mov sp,a3] [mov sp,a3]
644 [add -SIZE2,sp] [add -SIZE2,sp] */
646 /* Remember the address at which we started in the event that we
647 don't ultimately find an fmov instruction. Once we're certain
648 that we matched one of the above patterns, we'll set
649 ``restore_addr'' to the appropriate value. Note: At one time
650 in the past, this code attempted to not adjust ``addr'' until
651 there was a fair degree of certainty that the pattern would be
652 matched. However, that code did not wait until an fmov instruction
653 was actually encountered. As a consequence, ``addr'' would
654 sometimes be advanced even when no fmov instructions were found. */
655 CORE_ADDR restore_addr = addr;
658 /* First, look for add -SIZE,sp (i.e. add imm8,sp (0xf8feXX)
659 or add imm16,sp (0xfafeXXXX)
660 or add imm32,sp (0xfcfeXXXXXXXX)) */
662 if (buf[0] == 0xf8 && buf[1] == 0xfe)
664 else if (buf[0] == 0xfa && buf[1] == 0xfe)
666 else if (buf[0] == 0xfc && buf[1] == 0xfe)
670 /* An "add -#,sp" instruction has been found. "addr + 2 + imm_size"
671 is the address of the next instruction. Don't modify "addr" until
672 the next "floating point prologue" instruction is found. If this
673 is not a prologue that saves floating point registers we need to
674 be able to back out of this bit of code and continue with the
675 prologue analysis. */
676 if (addr + 2 + imm_size < stop)
678 if (!safe_frame_unwind_memory (fi, addr + 2 + imm_size, buf, 3))
679 goto finish_prologue;
680 if ((buf[0] & 0xfc) == 0x3c)
682 /* Occasionally, especially with C++ code, the "fmov"
683 instructions will be preceded by "mov sp,aN"
684 (aN => a0, a1, a2, or a3).
686 This is a one byte instruction: mov sp,aN = 0011 11XX
687 where XX is the register number.
689 Skip this instruction by incrementing addr. The "fmov"
690 instructions will have the form "fmov fs#,(aN+)" in this
691 case, but that will not necessitate a change in the
692 "fmov" parsing logic below. */
696 if ((buf[1] & 0xfc) == 0x20)
698 /* Occasionally, especially with C++ code compiled with
699 the -fomit-frame-pointer or -O3 options, the
700 "mov sp,aN" instruction will be followed by an
701 "add #,aN" instruction. This indicates the
702 "stack_size", the size of the portion of the stack
703 containing the arguments. This instruction format is:
704 add #,aN = 0010 00XX YYYY YYYY
705 where XX is the register number
706 YYYY YYYY is the constant.
707 Note the size of the stack (as a negative number) in
708 the frame info structure. */
710 stack_extra_size += -buf[2];
716 if ((buf[0] & 0xfc) == 0x3c ||
717 buf[0] == 0xf9 || buf[0] == 0xfb)
719 /* An "fmov" instruction has been found indicating that this
720 prologue saves floating point registers (or, as described
721 above, a "mov sp,aN" and possible "add #,aN" have been
722 found and we will assume an "fmov" follows). Process the
723 consecutive "fmov" instructions. */
724 for (addr += 2 + imm_size;;addr += imm_size)
728 /* Read the "fmov" instruction. */
730 !safe_frame_unwind_memory (fi, addr, buf, 4))
731 goto finish_prologue;
733 if (buf[0] != 0xf9 && buf[0] != 0xfb)
736 /* An fmov instruction has just been seen. We can
737 now really commit to the pattern match. */
741 /* Get the floating point register number from the
742 2nd and 3rd bytes of the "fmov" instruction:
743 Machine Code: 0000 00X0 YYYY 0000 =>
745 regnum = (buf[1] & 0x02) << 3;
746 regnum |= ((buf[2] & 0xf0) >> 4) & 0x0f;
748 /* Add this register number to the bit mask of floating
749 point registers that have been saved. */
750 fpregmask |= 1 << regnum;
752 /* Determine the length of this "fmov" instruction.
753 fmov fs#,(sp) => 3 byte instruction
754 fmov fs#,(#,sp) => 4 byte instruction */
755 imm_size = (buf[0] == 0xf9) ? 3 : 4;
760 /* If no fmov instructions were found by the above sequence, reset
761 the state and pretend that the above bit of code never happened. */
765 status = target_read_memory (addr, buf, 2);
767 goto finish_prologue;
768 stack_extra_size = 0;
772 /* Now see if we set up a frame pointer via "mov sp,a3" */
777 /* The frame pointer is now valid. */
783 /* Quit now if we're beyond the stop point. */
785 goto finish_prologue;
787 /* Get two more bytes so scanning can continue. */
788 if (!safe_frame_unwind_memory (fi, addr, buf, 2))
789 goto finish_prologue;
792 /* Next we should allocate the local frame. No more prologue insns
793 are found after allocating the local frame.
795 Search for add imm8,sp (0xf8feXX)
796 or add imm16,sp (0xfafeXXXX)
797 or add imm32,sp (0xfcfeXXXXXXXX).
799 If none of the above was found, then this prologue has no
803 if (buf[0] == 0xf8 && buf[1] == 0xfe)
805 else if (buf[0] == 0xfa && buf[1] == 0xfe)
807 else if (buf[0] == 0xfc && buf[1] == 0xfe)
812 /* Suck in imm_size more bytes, they'll hold the size of the
814 if (!safe_frame_unwind_memory (fi, addr + 2, buf, imm_size))
815 goto finish_prologue;
817 /* Note the size of the stack. */
818 stack_extra_size -= extract_signed_integer (buf, imm_size);
820 /* We just consumed 2 + imm_size bytes. */
821 addr += 2 + imm_size;
823 /* No more prologue insns follow, so begin preparation to return. */
824 goto finish_prologue;
826 /* Do the essentials and get out of here. */
828 /* Note if/where callee saved registers were saved. */
830 set_reg_offsets (fi, this_cache, movm_args, fpregmask, stack_extra_size,
835 /* Function: skip_prologue
836 Return the address of the first inst past the prologue of the function. */
839 mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
841 return mn10300_analyze_prologue (gdbarch, NULL, NULL, pc);
844 /* Simple frame_unwind_cache.
845 This finds the "extra info" for the frame. */
846 struct trad_frame_cache *
847 mn10300_frame_unwind_cache (struct frame_info *next_frame,
848 void **this_prologue_cache)
850 struct gdbarch *gdbarch;
851 struct trad_frame_cache *cache;
852 CORE_ADDR pc, start, end;
855 if (*this_prologue_cache)
856 return (*this_prologue_cache);
858 gdbarch = get_frame_arch (next_frame);
859 cache_p = trad_frame_cache_zalloc (next_frame);
860 pc = gdbarch_unwind_pc (gdbarch, next_frame);
861 mn10300_analyze_prologue (gdbarch, next_frame, &cache_p, pc);
864 if (find_pc_partial_function (pc, NULL, &start, &end))
865 trad_frame_set_id (cache,
866 frame_id_build (trad_frame_get_this_base (cache),
870 start = frame_func_unwind (next_frame, NORMAL_FRAME);
871 trad_frame_set_id (cache,
872 frame_id_build (trad_frame_get_this_base (cache),
876 (*this_prologue_cache) = cache;
880 /* Here is a dummy implementation. */
881 static struct frame_id
882 mn10300_unwind_dummy_id (struct gdbarch *gdbarch,
883 struct frame_info *next_frame)
885 return frame_id_build (frame_sp_unwind (next_frame),
886 frame_pc_unwind (next_frame));
889 /* Trad frame implementation. */
891 mn10300_frame_this_id (struct frame_info *next_frame,
892 void **this_prologue_cache,
893 struct frame_id *this_id)
895 struct trad_frame_cache *cache =
896 mn10300_frame_unwind_cache (next_frame, this_prologue_cache);
898 trad_frame_get_id (cache, this_id);
902 mn10300_frame_prev_register (struct frame_info *next_frame,
903 void **this_prologue_cache,
904 int regnum, int *optimizedp,
905 enum lval_type *lvalp, CORE_ADDR *addrp,
906 int *realnump, gdb_byte *bufferp)
908 struct trad_frame_cache *cache =
909 mn10300_frame_unwind_cache (next_frame, this_prologue_cache);
911 trad_frame_get_register (cache, next_frame, regnum, optimizedp,
912 lvalp, addrp, realnump, bufferp);
914 trad_frame_get_prev_register (next_frame, cache->prev_regs, regnum,
915 optimizedp, lvalp, addrp, realnump, bufferp);
919 static const struct frame_unwind mn10300_frame_unwind = {
921 mn10300_frame_this_id,
922 mn10300_frame_prev_register
926 mn10300_frame_base_address (struct frame_info *next_frame,
927 void **this_prologue_cache)
929 struct trad_frame_cache *cache =
930 mn10300_frame_unwind_cache (next_frame, this_prologue_cache);
932 return trad_frame_get_this_base (cache);
935 static const struct frame_unwind *
936 mn10300_frame_sniffer (struct frame_info *next_frame)
938 return &mn10300_frame_unwind;
941 static const struct frame_base mn10300_frame_base = {
942 &mn10300_frame_unwind,
943 mn10300_frame_base_address,
944 mn10300_frame_base_address,
945 mn10300_frame_base_address
949 mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
953 pc = frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
958 mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
962 sp = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
967 mn10300_frame_unwind_init (struct gdbarch *gdbarch)
969 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
970 frame_unwind_append_sniffer (gdbarch, mn10300_frame_sniffer);
971 frame_base_set_default (gdbarch, &mn10300_frame_base);
972 set_gdbarch_unwind_dummy_id (gdbarch, mn10300_unwind_dummy_id);
973 set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc);
974 set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp);
977 /* Function: push_dummy_call
979 * Set up machine state for a target call, including
980 * function arguments, stack, return address, etc.
985 mn10300_push_dummy_call (struct gdbarch *gdbarch,
986 struct value *target_func,
987 struct regcache *regcache,
989 int nargs, struct value **args,
992 CORE_ADDR struct_addr)
994 const int push_size = register_size (gdbarch, E_PC_REGNUM);
997 int stack_offset = 0;
999 char *val, valbuf[MAX_REGISTER_SIZE];
1001 /* This should be a nop, but align the stack just in case something
1002 went wrong. Stacks are four byte aligned on the mn10300. */
1005 /* Now make space on the stack for the args.
1007 XXX This doesn't appear to handle pass-by-invisible reference
1009 regs_used = struct_return ? 1 : 0;
1010 for (len = 0, argnum = 0; argnum < nargs; argnum++)
1012 arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
1013 while (regs_used < 2 && arg_len > 0)
1016 arg_len -= push_size;
1021 /* Allocate stack space. */
1027 regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
1032 /* Push all arguments onto the stack. */
1033 for (argnum = 0; argnum < nargs; argnum++)
1035 /* FIXME what about structs? Unions? */
1036 if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
1037 && TYPE_LENGTH (value_type (*args)) > 8)
1039 /* Change to pointer-to-type. */
1040 arg_len = push_size;
1041 store_unsigned_integer (valbuf, push_size,
1042 VALUE_ADDRESS (*args));
1047 arg_len = TYPE_LENGTH (value_type (*args));
1048 val = (char *) value_contents (*args);
1051 while (regs_used < 2 && arg_len > 0)
1053 regcache_cooked_write_unsigned (regcache, regs_used,
1054 extract_unsigned_integer (val, push_size));
1056 arg_len -= push_size;
1062 write_memory (sp + stack_offset, val, push_size);
1063 arg_len -= push_size;
1065 stack_offset += push_size;
1071 /* Make space for the flushback area. */
1074 /* Push the return address that contains the magic breakpoint. */
1076 write_memory_unsigned_integer (sp, push_size, bp_addr);
1078 /* The CPU also writes the return address always into the
1079 MDR register on "call". */
1080 regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr);
1083 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
1085 /* On the mn10300, it's possible to move some of the stack adjustment
1086 and saving of the caller-save registers out of the prologue and
1087 into the call sites. (When using gcc, this optimization can
1088 occur when using the -mrelax switch.) If this occurs, the dwarf2
1089 info will reflect this fact. We can test to see if this is the
1090 case by creating a new frame using the current stack pointer and
1091 the address of the function that we're about to call. We then
1092 unwind SP and see if it's different than the SP of our newly
1093 created frame. If the SP values are the same, the caller is not
1094 expected to allocate any additional stack. On the other hand, if
1095 the SP values are different, the difference determines the
1096 additional stack that must be allocated.
1098 Note that we don't update the return value though because that's
1099 the value of the stack just after pushing the arguments, but prior
1100 to performing the call. This value is needed in order to
1101 construct the frame ID of the dummy call. */
1103 CORE_ADDR func_addr = find_function_addr (target_func, NULL);
1104 CORE_ADDR unwound_sp
1105 = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
1106 if (sp != unwound_sp)
1107 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
1108 sp - (unwound_sp - sp));
1114 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1115 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1116 register number. Why don't Dwarf2 and GDB use the same numbering?
1117 Who knows? But since people have object files lying around with
1118 the existing Dwarf2 numbering, and other people have written stubs
1119 to work with the existing GDB, neither of them can change. So we
1120 just have to cope. */
1122 mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2)
1124 /* This table is supposed to be shaped like the gdbarch_register_name
1125 initializer in gcc/config/mn10300/mn10300.h. Registers which
1126 appear in GCC's numbering, but have no counterpart in GDB's
1127 world, are marked with a -1. */
1128 static int dwarf2_to_gdb[] = {
1129 0, 1, 2, 3, 4, 5, 6, 7, -1, 8,
1130 15, 16, 17, 18, 19, 20, 21, 22,
1131 32, 33, 34, 35, 36, 37, 38, 39,
1132 40, 41, 42, 43, 44, 45, 46, 47,
1133 48, 49, 50, 51, 52, 53, 54, 55,
1134 56, 57, 58, 59, 60, 61, 62, 63,
1139 || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
1141 warning (_("Bogus register number in debug info: %d"), dwarf2);
1145 return dwarf2_to_gdb[dwarf2];
1148 static struct gdbarch *
1149 mn10300_gdbarch_init (struct gdbarch_info info,
1150 struct gdbarch_list *arches)
1152 struct gdbarch *gdbarch;
1153 struct gdbarch_tdep *tdep;
1156 arches = gdbarch_list_lookup_by_info (arches, &info);
1158 return arches->gdbarch;
1160 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1161 gdbarch = gdbarch_alloc (&info, tdep);
1163 switch (info.bfd_arch_info->mach)
1166 case bfd_mach_mn10300:
1167 set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
1168 tdep->am33_mode = 0;
1172 set_gdbarch_register_name (gdbarch, am33_register_name);
1173 tdep->am33_mode = 1;
1176 case bfd_mach_am33_2:
1177 set_gdbarch_register_name (gdbarch, am33_2_register_name);
1178 tdep->am33_mode = 2;
1180 set_gdbarch_fp0_regnum (gdbarch, 32);
1183 internal_error (__FILE__, __LINE__,
1184 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1189 set_gdbarch_num_regs (gdbarch, num_regs);
1190 set_gdbarch_register_type (gdbarch, mn10300_register_type);
1191 set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
1192 set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
1193 set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
1194 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1195 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1196 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
1198 /* Stack unwinding. */
1199 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1201 set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc);
1202 /* decr_pc_after_break? */
1204 set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
1207 set_gdbarch_return_value (gdbarch, mn10300_return_value);
1209 /* Stage 3 -- get target calls working. */
1210 set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
1211 /* set_gdbarch_return_value (store, extract) */
1214 mn10300_frame_unwind_init (gdbarch);
1216 /* Hook in ABI-specific overrides, if they have been registered. */
1217 gdbarch_init_osabi (info, gdbarch);
1222 /* Dump out the mn10300 specific architecture information. */
1225 mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
1227 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1228 fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
1233 _initialize_mn10300_tdep (void)
1235 gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);