1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 1996-2019 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
25 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
28 #include "frame-unwind.h"
29 #include "frame-base.h"
31 #include "dwarf2-frame.h"
34 #include "prologue-value.h"
37 #include "mn10300-tdep.h"
40 /* The am33-2 has 64 registers. */
41 #define MN10300_MAX_NUM_REGS 64
43 /* Big enough to hold the size of the largest register in bytes. */
44 #define MN10300_MAX_REGISTER_SIZE 64
46 /* This structure holds the results of a prologue analysis. */
47 struct mn10300_prologue
49 /* The architecture for which we generated this prologue info. */
50 struct gdbarch *gdbarch;
52 /* The offset from the frame base to the stack pointer --- always
55 Calling this a "size" is a bit misleading, but given that the
56 stack grows downwards, using offsets for everything keeps one
57 from going completely sign-crazy: you never change anything's
58 sign for an ADD instruction; always change the second operand's
59 sign for a SUB instruction; and everything takes care of
63 /* Non-zero if this function has initialized the frame pointer from
64 the stack pointer, zero otherwise. */
67 /* If has_frame_ptr is non-zero, this is the offset from the frame
68 base to where the frame pointer points. This is always zero or
72 /* The address of the first instruction at which the frame has been
73 set up and the arguments are where the debug info says they are
74 --- as best as we can tell. */
75 CORE_ADDR prologue_end;
77 /* reg_offset[R] is the offset from the CFA at which register R is
78 saved, or 1 if register R has not been saved. (Real values are
79 always zero or negative.) */
80 int reg_offset[MN10300_MAX_NUM_REGS];
84 /* Compute the alignment required by a type. */
87 mn10300_type_align (struct type *type)
91 switch (TYPE_CODE (type))
102 case TYPE_CODE_RVALUE_REF:
103 return TYPE_LENGTH (type);
105 case TYPE_CODE_COMPLEX:
106 return TYPE_LENGTH (type) / 2;
108 case TYPE_CODE_STRUCT:
109 case TYPE_CODE_UNION:
110 for (i = 0; i < TYPE_NFIELDS (type); i++)
112 int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
113 while (align < falign)
118 case TYPE_CODE_ARRAY:
119 /* HACK! Structures containing arrays, even small ones, are not
120 elligible for returning in registers. */
123 case TYPE_CODE_TYPEDEF:
124 return mn10300_type_align (check_typedef (type));
127 internal_error (__FILE__, __LINE__, _("bad switch"));
131 /* Should call_function allocate stack space for a struct return? */
133 mn10300_use_struct_convention (struct type *type)
135 /* Structures bigger than a pair of words can't be returned in
137 if (TYPE_LENGTH (type) > 8)
140 switch (TYPE_CODE (type))
142 case TYPE_CODE_STRUCT:
143 case TYPE_CODE_UNION:
144 /* Structures with a single field are handled as the field
146 if (TYPE_NFIELDS (type) == 1)
147 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
149 /* Structures with word or double-word size are passed in memory, as
150 long as they require at least word alignment. */
151 if (mn10300_type_align (type) >= 4)
156 /* Arrays are addressable, so they're never returned in
157 registers. This condition can only hold when the array is
158 the only field of a struct or union. */
159 case TYPE_CODE_ARRAY:
162 case TYPE_CODE_TYPEDEF:
163 return mn10300_use_struct_convention (check_typedef (type));
171 mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
172 struct regcache *regcache, const gdb_byte *valbuf)
174 int len = TYPE_LENGTH (type);
177 if (TYPE_CODE (type) == TYPE_CODE_PTR)
182 regsz = register_size (gdbarch, reg);
185 regcache->raw_write_part (reg, 0, len, valbuf);
186 else if (len <= 2 * regsz)
188 regcache->raw_write (reg, valbuf);
189 gdb_assert (regsz == register_size (gdbarch, reg + 1));
190 regcache->raw_write_part (reg + 1, 0, len - regsz, valbuf + regsz);
193 internal_error (__FILE__, __LINE__,
194 _("Cannot store return value %d bytes long."), len);
198 mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
199 struct regcache *regcache, void *valbuf)
201 gdb_byte buf[MN10300_MAX_REGISTER_SIZE];
202 int len = TYPE_LENGTH (type);
205 if (TYPE_CODE (type) == TYPE_CODE_PTR)
210 regsz = register_size (gdbarch, reg);
211 gdb_assert (regsz <= MN10300_MAX_REGISTER_SIZE);
214 regcache->raw_read (reg, buf);
215 memcpy (valbuf, buf, len);
217 else if (len <= 2 * regsz)
219 regcache->raw_read (reg, buf);
220 memcpy (valbuf, buf, regsz);
221 gdb_assert (regsz == register_size (gdbarch, reg + 1));
222 regcache->raw_read (reg + 1, buf);
223 memcpy ((char *) valbuf + regsz, buf, len - regsz);
226 internal_error (__FILE__, __LINE__,
227 _("Cannot extract return value %d bytes long."), len);
230 /* Determine, for architecture GDBARCH, how a return value of TYPE
231 should be returned. If it is supposed to be returned in registers,
232 and READBUF is non-zero, read the appropriate value from REGCACHE,
233 and copy it into READBUF. If WRITEBUF is non-zero, write the value
234 from WRITEBUF into REGCACHE. */
236 static enum return_value_convention
237 mn10300_return_value (struct gdbarch *gdbarch, struct value *function,
238 struct type *type, struct regcache *regcache,
239 gdb_byte *readbuf, const gdb_byte *writebuf)
241 if (mn10300_use_struct_convention (type))
242 return RETURN_VALUE_STRUCT_CONVENTION;
245 mn10300_extract_return_value (gdbarch, type, regcache, readbuf);
247 mn10300_store_return_value (gdbarch, type, regcache, writebuf);
249 return RETURN_VALUE_REGISTER_CONVENTION;
253 register_name (int reg, const char **regs, long sizeof_regs)
255 if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
262 mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
264 static const char *regs[] =
265 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
266 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
267 "", "", "", "", "", "", "", "",
268 "", "", "", "", "", "", "", "fp"
270 return register_name (reg, regs, sizeof regs);
275 am33_register_name (struct gdbarch *gdbarch, int reg)
277 static const char *regs[] =
278 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
279 "sp", "pc", "mdr", "psw", "lir", "lar", "",
280 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
281 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
283 return register_name (reg, regs, sizeof regs);
287 am33_2_register_name (struct gdbarch *gdbarch, int reg)
289 static const char *regs[] =
291 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
292 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
293 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
294 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
295 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
296 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
297 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
298 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
300 return register_name (reg, regs, sizeof regs);
304 mn10300_register_type (struct gdbarch *gdbarch, int reg)
306 return builtin_type (gdbarch)->builtin_int;
309 /* The breakpoint instruction must be the same size as the smallest
310 instruction in the instruction set.
312 The Matsushita mn10x00 processors have single byte instructions
313 so we need a single byte breakpoint. Matsushita hasn't defined
314 one, so we defined it ourselves. */
315 constexpr gdb_byte mn10300_break_insn[] = {0xff};
317 typedef BP_MANIPULATION (mn10300_break_insn) mn10300_breakpoint;
319 /* Model the semantics of pushing a register onto the stack. This
320 is a helper function for mn10300_analyze_prologue, below. */
322 push_reg (pv_t *regs, struct pv_area *stack, int regnum)
324 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
325 stack->store (regs[E_SP_REGNUM], 4, regs[regnum]);
328 /* Translate an "r" register number extracted from an instruction encoding
329 into a GDB register number. Adapted from a simulator function
330 of the same name; see am33.igen. */
332 translate_rreg (int rreg)
334 /* The higher register numbers actually correspond to the
335 basic machine's address and data registers. */
336 if (rreg > 7 && rreg < 12)
337 return E_A0_REGNUM + rreg - 8;
338 else if (rreg > 11 && rreg < 16)
339 return E_D0_REGNUM + rreg - 12;
341 return E_E0_REGNUM + rreg;
344 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area::scan.
346 If VALUE is a saved register, ADDR says it was saved at a constant
347 offset from the frame base, and SIZE indicates that the whole
348 register was saved, record its offset in RESULT_UNTYPED. */
350 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
352 struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped;
354 if (value.kind == pvk_register
356 && pv_is_register (addr, E_SP_REGNUM)
357 && size == register_size (result->gdbarch, value.reg))
358 result->reg_offset[value.reg] = addr.k;
361 /* Analyze the prologue to determine where registers are saved,
362 the end of the prologue, etc. The result of this analysis is
363 returned in RESULT. See struct mn10300_prologue above for more
366 mn10300_analyze_prologue (struct gdbarch *gdbarch,
367 CORE_ADDR start_pc, CORE_ADDR limit_pc,
368 struct mn10300_prologue *result)
370 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
373 pv_t regs[MN10300_MAX_NUM_REGS];
374 CORE_ADDR after_last_frame_setup_insn = start_pc;
375 int am33_mode = AM33_MODE (gdbarch);
377 memset (result, 0, sizeof (*result));
378 result->gdbarch = gdbarch;
380 for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++)
382 regs[rn] = pv_register (rn, 0);
383 result->reg_offset[rn] = 1;
385 pv_area stack (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
387 /* The typical call instruction will have saved the return address on the
388 stack. Space for the return address has already been preallocated in
389 the caller's frame. It's possible, such as when using -mrelax with gcc
390 that other registers were saved as well. If this happens, we really
391 have no chance of deciphering the frame. DWARF info can save the day
392 when this happens. */
393 stack.store (regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
396 while (pc < limit_pc)
401 /* Instructions can be as small as one byte; however, we usually
402 need at least two bytes to do the decoding, so fetch that many
404 status = target_read_memory (pc, instr, 2);
408 /* movm [regs], sp */
409 if (instr[0] == 0xcf)
413 save_mask = instr[1];
415 if ((save_mask & movm_exreg0_bit) && am33_mode)
417 push_reg (regs, &stack, E_E2_REGNUM);
418 push_reg (regs, &stack, E_E3_REGNUM);
420 if ((save_mask & movm_exreg1_bit) && am33_mode)
422 push_reg (regs, &stack, E_E4_REGNUM);
423 push_reg (regs, &stack, E_E5_REGNUM);
424 push_reg (regs, &stack, E_E6_REGNUM);
425 push_reg (regs, &stack, E_E7_REGNUM);
427 if ((save_mask & movm_exother_bit) && am33_mode)
429 push_reg (regs, &stack, E_E0_REGNUM);
430 push_reg (regs, &stack, E_E1_REGNUM);
431 push_reg (regs, &stack, E_MDRQ_REGNUM);
432 push_reg (regs, &stack, E_MCRH_REGNUM);
433 push_reg (regs, &stack, E_MCRL_REGNUM);
434 push_reg (regs, &stack, E_MCVF_REGNUM);
436 if (save_mask & movm_d2_bit)
437 push_reg (regs, &stack, E_D2_REGNUM);
438 if (save_mask & movm_d3_bit)
439 push_reg (regs, &stack, E_D3_REGNUM);
440 if (save_mask & movm_a2_bit)
441 push_reg (regs, &stack, E_A2_REGNUM);
442 if (save_mask & movm_a3_bit)
443 push_reg (regs, &stack, E_A3_REGNUM);
444 if (save_mask & movm_other_bit)
446 push_reg (regs, &stack, E_D0_REGNUM);
447 push_reg (regs, &stack, E_D1_REGNUM);
448 push_reg (regs, &stack, E_A0_REGNUM);
449 push_reg (regs, &stack, E_A1_REGNUM);
450 push_reg (regs, &stack, E_MDR_REGNUM);
451 push_reg (regs, &stack, E_LIR_REGNUM);
452 push_reg (regs, &stack, E_LAR_REGNUM);
453 /* The `other' bit leaves a blank area of four bytes at
454 the beginning of its block of saved registers, making
455 it 32 bytes long in total. */
456 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
460 after_last_frame_setup_insn = pc;
463 else if ((instr[0] & 0xfc) == 0x3c)
465 int aN = instr[0] & 0x03;
467 regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM];
471 after_last_frame_setup_insn = pc;
474 else if ((instr[0] & 0xf0) == 0x90
475 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
477 int aN = instr[0] & 0x03;
478 int aM = (instr[0] & 0x0c) >> 2;
480 regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM];
485 else if ((instr[0] & 0xf0) == 0x80
486 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
488 int dN = instr[0] & 0x03;
489 int dM = (instr[0] & 0x0c) >> 2;
491 regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM];
496 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0)
498 int dN = instr[1] & 0x03;
499 int aM = (instr[1] & 0x0c) >> 2;
501 regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM];
506 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0)
508 int aN = instr[1] & 0x03;
509 int dM = (instr[1] & 0x0c) >> 2;
511 regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM];
516 else if (instr[0] == 0xf8 && instr[1] == 0xfe)
522 status = target_read_memory (pc + 2, buf, 1);
526 imm8 = extract_signed_integer (buf, 1, byte_order);
527 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8);
530 /* Stack pointer adjustments are frame related. */
531 after_last_frame_setup_insn = pc;
534 else if (instr[0] == 0xfa && instr[1] == 0xfe)
539 status = target_read_memory (pc + 2, buf, 2);
543 imm16 = extract_signed_integer (buf, 2, byte_order);
544 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16);
547 /* Stack pointer adjustments are frame related. */
548 after_last_frame_setup_insn = pc;
551 else if (instr[0] == 0xfc && instr[1] == 0xfe)
556 status = target_read_memory (pc + 2, buf, 4);
561 imm32 = extract_signed_integer (buf, 4, byte_order);
562 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32);
565 /* Stack pointer adjustments are frame related. */
566 after_last_frame_setup_insn = pc;
569 else if ((instr[0] & 0xfc) == 0x20)
574 aN = instr[0] & 0x03;
575 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
577 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
583 else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0)
589 aN = instr[1] & 0x03;
591 status = target_read_memory (pc + 2, buf, 2);
596 imm16 = extract_signed_integer (buf, 2, byte_order);
598 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
604 else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0)
610 aN = instr[1] & 0x03;
612 status = target_read_memory (pc + 2, buf, 4);
616 imm32 = extract_signed_integer (buf, 2, byte_order);
618 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
623 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30)
628 Y = (instr[1] & 0x02) >> 1;
630 status = target_read_memory (pc + 2, buf, 1);
634 sM = (buf[0] & 0xf0) >> 4;
638 stack.store (regs[translate_rreg (rN)], 4,
639 regs[E_FS0_REGNUM + fsM]);
644 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34)
649 Y = (instr[1] & 0x02) >> 1;
651 status = target_read_memory (pc + 2, buf, 1);
655 sM = (buf[0] & 0xf0) >> 4;
658 stack.store (regs[E_SP_REGNUM], 4,
659 regs[E_FS0_REGNUM + fsM]);
663 /* fmov fsM, (rN, rI) */
664 else if (instr[0] == 0xfb && instr[1] == 0x37)
666 int fsM, sM, Z, rN, rI;
670 status = target_read_memory (pc + 2, buf, 2);
674 rI = (buf[0] & 0xf0) >> 4;
676 sM = (buf[1] & 0xf0) >> 4;
677 Z = (buf[1] & 0x02) >> 1;
680 stack.store (pv_add (regs[translate_rreg (rN)],
681 regs[translate_rreg (rI)]),
682 4, regs[E_FS0_REGNUM + fsM]);
686 /* fmov fsM, (d8, rN) */
687 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30)
693 Y = (instr[1] & 0x02) >> 1;
695 status = target_read_memory (pc + 2, buf, 2);
699 sM = (buf[0] & 0xf0) >> 4;
702 d8 = extract_signed_integer (&buf[1], 1, byte_order);
704 stack.store (pv_add_constant (regs[translate_rreg (rN)], d8),
705 4, regs[E_FS0_REGNUM + fsM]);
709 /* fmov fsM, (d24, rN) */
710 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30)
716 Y = (instr[1] & 0x02) >> 1;
718 status = target_read_memory (pc + 2, buf, 4);
722 sM = (buf[0] & 0xf0) >> 4;
725 d24 = extract_signed_integer (&buf[1], 3, byte_order);
727 stack.store (pv_add_constant (regs[translate_rreg (rN)], d24),
728 4, regs[E_FS0_REGNUM + fsM]);
732 /* fmov fsM, (d32, rN) */
733 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30)
739 Y = (instr[1] & 0x02) >> 1;
741 status = target_read_memory (pc + 2, buf, 5);
745 sM = (buf[0] & 0xf0) >> 4;
748 d32 = extract_signed_integer (&buf[1], 4, byte_order);
750 stack.store (pv_add_constant (regs[translate_rreg (rN)], d32),
751 4, regs[E_FS0_REGNUM + fsM]);
755 /* fmov fsM, (d8, SP) */
756 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34)
762 Y = (instr[1] & 0x02) >> 1;
764 status = target_read_memory (pc + 2, buf, 2);
768 sM = (buf[0] & 0xf0) >> 4;
770 d8 = extract_signed_integer (&buf[1], 1, byte_order);
772 stack.store (pv_add_constant (regs[E_SP_REGNUM], d8),
773 4, regs[E_FS0_REGNUM + fsM]);
777 /* fmov fsM, (d24, SP) */
778 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34)
784 Y = (instr[1] & 0x02) >> 1;
786 status = target_read_memory (pc + 2, buf, 4);
790 sM = (buf[0] & 0xf0) >> 4;
792 d24 = extract_signed_integer (&buf[1], 3, byte_order);
794 stack.store (pv_add_constant (regs[E_SP_REGNUM], d24),
795 4, regs[E_FS0_REGNUM + fsM]);
799 /* fmov fsM, (d32, SP) */
800 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34)
806 Y = (instr[1] & 0x02) >> 1;
808 status = target_read_memory (pc + 2, buf, 5);
812 sM = (buf[0] & 0xf0) >> 4;
814 d32 = extract_signed_integer (&buf[1], 4, byte_order);
816 stack.store (pv_add_constant (regs[E_SP_REGNUM], d32),
817 4, regs[E_FS0_REGNUM + fsM]);
821 /* fmov fsM, (rN+) */
822 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31)
824 int fsM, sM, Y, rN, rN_regnum;
827 Y = (instr[1] & 0x02) >> 1;
829 status = target_read_memory (pc + 2, buf, 1);
833 sM = (buf[0] & 0xf0) >> 4;
837 rN_regnum = translate_rreg (rN);
839 stack.store (regs[rN_regnum], 4,
840 regs[E_FS0_REGNUM + fsM]);
841 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
845 /* fmov fsM, (rN+, imm8) */
846 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31)
848 int fsM, sM, Y, rN, rN_regnum;
852 Y = (instr[1] & 0x02) >> 1;
854 status = target_read_memory (pc + 2, buf, 2);
858 sM = (buf[0] & 0xf0) >> 4;
861 imm8 = extract_signed_integer (&buf[1], 1, byte_order);
863 rN_regnum = translate_rreg (rN);
865 stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
866 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
870 /* fmov fsM, (rN+, imm24) */
871 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31)
873 int fsM, sM, Y, rN, rN_regnum;
877 Y = (instr[1] & 0x02) >> 1;
879 status = target_read_memory (pc + 2, buf, 4);
883 sM = (buf[0] & 0xf0) >> 4;
886 imm24 = extract_signed_integer (&buf[1], 3, byte_order);
888 rN_regnum = translate_rreg (rN);
890 stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
891 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
895 /* fmov fsM, (rN+, imm32) */
896 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31)
898 int fsM, sM, Y, rN, rN_regnum;
902 Y = (instr[1] & 0x02) >> 1;
904 status = target_read_memory (pc + 2, buf, 5);
908 sM = (buf[0] & 0xf0) >> 4;
911 imm32 = extract_signed_integer (&buf[1], 4, byte_order);
913 rN_regnum = translate_rreg (rN);
915 stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
916 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
921 else if ((instr[0] & 0xf0) == 0x90)
923 int aN = instr[0] & 0x03;
926 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
928 regs[E_A0_REGNUM + aN] = pv_constant (imm8);
932 else if ((instr[0] & 0xfc) == 0x24)
934 int aN = instr[0] & 0x03;
938 status = target_read_memory (pc + 1, buf, 2);
942 imm16 = extract_signed_integer (buf, 2, byte_order);
943 regs[E_A0_REGNUM + aN] = pv_constant (imm16);
947 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc))
949 int aN = instr[1] & 0x03;
953 status = target_read_memory (pc + 2, buf, 4);
957 imm32 = extract_signed_integer (buf, 4, byte_order);
958 regs[E_A0_REGNUM + aN] = pv_constant (imm32);
962 else if ((instr[0] & 0xf0) == 0x80)
964 int dN = instr[0] & 0x03;
967 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
969 regs[E_D0_REGNUM + dN] = pv_constant (imm8);
973 else if ((instr[0] & 0xfc) == 0x2c)
975 int dN = instr[0] & 0x03;
979 status = target_read_memory (pc + 1, buf, 2);
983 imm16 = extract_signed_integer (buf, 2, byte_order);
984 regs[E_D0_REGNUM + dN] = pv_constant (imm16);
988 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc))
990 int dN = instr[1] & 0x03;
994 status = target_read_memory (pc + 2, buf, 4);
998 imm32 = extract_signed_integer (buf, 4, byte_order);
999 regs[E_D0_REGNUM + dN] = pv_constant (imm32);
1004 /* We've hit some instruction that we don't recognize. Hopefully,
1005 we have enough to do prologue analysis. */
1010 /* Is the frame size (offset, really) a known constant? */
1011 if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM))
1012 result->frame_size = regs[E_SP_REGNUM].k;
1014 /* Was the frame pointer initialized? */
1015 if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM))
1017 result->has_frame_ptr = 1;
1018 result->frame_ptr_offset = regs[E_A3_REGNUM].k;
1021 /* Record where all the registers were saved. */
1022 stack.scan (check_for_saved, (void *) result);
1024 result->prologue_end = after_last_frame_setup_insn;
1027 /* Function: skip_prologue
1028 Return the address of the first inst past the prologue of the function. */
1031 mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1034 CORE_ADDR func_addr, func_end;
1035 struct mn10300_prologue p;
1037 /* Try to find the extent of the function that contains PC. */
1038 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
1041 mn10300_analyze_prologue (gdbarch, pc, func_end, &p);
1042 return p.prologue_end;
1045 /* Wrapper for mn10300_analyze_prologue: find the function start;
1046 use the current frame PC as the limit, then
1047 invoke mn10300_analyze_prologue and return its result. */
1048 static struct mn10300_prologue *
1049 mn10300_analyze_frame_prologue (struct frame_info *this_frame,
1050 void **this_prologue_cache)
1052 if (!*this_prologue_cache)
1054 CORE_ADDR func_start, stop_addr;
1056 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue);
1058 func_start = get_frame_func (this_frame);
1059 stop_addr = get_frame_pc (this_frame);
1061 /* If we couldn't find any function containing the PC, then
1062 just initialize the prologue cache, but don't do anything. */
1064 stop_addr = func_start;
1066 mn10300_analyze_prologue (get_frame_arch (this_frame),
1067 func_start, stop_addr,
1068 ((struct mn10300_prologue *)
1069 *this_prologue_cache));
1072 return (struct mn10300_prologue *) *this_prologue_cache;
1075 /* Given the next frame and a prologue cache, return this frame's
1078 mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
1080 struct mn10300_prologue *p
1081 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1083 /* In functions that use alloca, the distance between the stack
1084 pointer and the frame base varies dynamically, so we can't use
1085 the SP plus static information like prologue analysis to find the
1086 frame base. However, such functions must have a frame pointer,
1087 to be able to restore the SP on exit. So whenever we do have a
1088 frame pointer, use that to find the base. */
1089 if (p->has_frame_ptr)
1091 CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM);
1092 return fp - p->frame_ptr_offset;
1096 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1097 return sp - p->frame_size;
1101 /* Here is a dummy implementation. */
1102 static struct frame_id
1103 mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1105 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1106 CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM);
1107 return frame_id_build (sp, pc);
1111 mn10300_frame_this_id (struct frame_info *this_frame,
1112 void **this_prologue_cache,
1113 struct frame_id *this_id)
1115 *this_id = frame_id_build (mn10300_frame_base (this_frame,
1116 this_prologue_cache),
1117 get_frame_func (this_frame));
1121 static struct value *
1122 mn10300_frame_prev_register (struct frame_info *this_frame,
1123 void **this_prologue_cache, int regnum)
1125 struct mn10300_prologue *p
1126 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1127 CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache);
1129 if (regnum == E_SP_REGNUM)
1130 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1132 /* If prologue analysis says we saved this register somewhere,
1133 return a description of the stack slot holding it. */
1134 if (p->reg_offset[regnum] != 1)
1135 return frame_unwind_got_memory (this_frame, regnum,
1136 frame_base + p->reg_offset[regnum]);
1138 /* Otherwise, presume we haven't changed the value of this
1139 register, and get it from the next frame. */
1140 return frame_unwind_got_register (this_frame, regnum, regnum);
1143 static const struct frame_unwind mn10300_frame_unwind = {
1145 default_frame_unwind_stop_reason,
1146 mn10300_frame_this_id,
1147 mn10300_frame_prev_register,
1149 default_frame_sniffer
1153 mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame)
1157 pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM);
1162 mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
1166 sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM);
1171 mn10300_frame_unwind_init (struct gdbarch *gdbarch)
1173 dwarf2_append_unwinders (gdbarch);
1174 frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind);
1175 set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id);
1176 set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc);
1177 set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp);
1180 /* Function: push_dummy_call
1182 * Set up machine state for a target call, including
1183 * function arguments, stack, return address, etc.
1188 mn10300_push_dummy_call (struct gdbarch *gdbarch,
1189 struct value *target_func,
1190 struct regcache *regcache,
1192 int nargs, struct value **args,
1194 function_call_return_method return_method,
1195 CORE_ADDR struct_addr)
1197 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1198 const int push_size = register_size (gdbarch, E_PC_REGNUM);
1201 int stack_offset = 0;
1203 const gdb_byte *val;
1204 gdb_byte valbuf[MN10300_MAX_REGISTER_SIZE];
1206 /* This should be a nop, but align the stack just in case something
1207 went wrong. Stacks are four byte aligned on the mn10300. */
1210 /* Now make space on the stack for the args.
1212 XXX This doesn't appear to handle pass-by-invisible reference
1214 regs_used = (return_method == return_method_struct) ? 1 : 0;
1215 for (len = 0, argnum = 0; argnum < nargs; argnum++)
1217 arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
1218 while (regs_used < 2 && arg_len > 0)
1221 arg_len -= push_size;
1226 /* Allocate stack space. */
1229 if (return_method == return_method_struct)
1232 regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
1237 /* Push all arguments onto the stack. */
1238 for (argnum = 0; argnum < nargs; argnum++)
1240 /* FIXME what about structs? Unions? */
1241 if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
1242 && TYPE_LENGTH (value_type (*args)) > 8)
1244 /* Change to pointer-to-type. */
1245 arg_len = push_size;
1246 gdb_assert (push_size <= MN10300_MAX_REGISTER_SIZE);
1247 store_unsigned_integer (valbuf, push_size, byte_order,
1248 value_address (*args));
1253 arg_len = TYPE_LENGTH (value_type (*args));
1254 val = value_contents (*args);
1257 while (regs_used < 2 && arg_len > 0)
1259 regcache_cooked_write_unsigned (regcache, regs_used,
1260 extract_unsigned_integer (val, push_size, byte_order));
1262 arg_len -= push_size;
1268 write_memory (sp + stack_offset, val, push_size);
1269 arg_len -= push_size;
1271 stack_offset += push_size;
1277 /* Make space for the flushback area. */
1280 /* Push the return address that contains the magic breakpoint. */
1282 write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr);
1284 /* The CPU also writes the return address always into the
1285 MDR register on "call". */
1286 regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr);
1289 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
1291 /* On the mn10300, it's possible to move some of the stack adjustment
1292 and saving of the caller-save registers out of the prologue and
1293 into the call sites. (When using gcc, this optimization can
1294 occur when using the -mrelax switch.) If this occurs, the dwarf2
1295 info will reflect this fact. We can test to see if this is the
1296 case by creating a new frame using the current stack pointer and
1297 the address of the function that we're about to call. We then
1298 unwind SP and see if it's different than the SP of our newly
1299 created frame. If the SP values are the same, the caller is not
1300 expected to allocate any additional stack. On the other hand, if
1301 the SP values are different, the difference determines the
1302 additional stack that must be allocated.
1304 Note that we don't update the return value though because that's
1305 the value of the stack just after pushing the arguments, but prior
1306 to performing the call. This value is needed in order to
1307 construct the frame ID of the dummy call. */
1309 CORE_ADDR func_addr = find_function_addr (target_func, NULL);
1310 CORE_ADDR unwound_sp
1311 = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
1312 if (sp != unwound_sp)
1313 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
1314 sp - (unwound_sp - sp));
1320 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1321 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1322 register number. Why don't Dwarf2 and GDB use the same numbering?
1323 Who knows? But since people have object files lying around with
1324 the existing Dwarf2 numbering, and other people have written stubs
1325 to work with the existing GDB, neither of them can change. So we
1326 just have to cope. */
1328 mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2)
1330 /* This table is supposed to be shaped like the gdbarch_register_name
1331 initializer in gcc/config/mn10300/mn10300.h. Registers which
1332 appear in GCC's numbering, but have no counterpart in GDB's
1333 world, are marked with a -1. */
1334 static int dwarf2_to_gdb[] = {
1335 E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM,
1336 E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM,
1339 E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM,
1340 E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM,
1342 E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3,
1343 E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7,
1345 E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11,
1346 E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15,
1348 E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19,
1349 E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23,
1351 E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27,
1352 E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31,
1354 E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM
1358 || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
1361 return dwarf2_to_gdb[dwarf2];
1364 static struct gdbarch *
1365 mn10300_gdbarch_init (struct gdbarch_info info,
1366 struct gdbarch_list *arches)
1368 struct gdbarch *gdbarch;
1369 struct gdbarch_tdep *tdep;
1372 arches = gdbarch_list_lookup_by_info (arches, &info);
1374 return arches->gdbarch;
1376 tdep = XCNEW (struct gdbarch_tdep);
1377 gdbarch = gdbarch_alloc (&info, tdep);
1379 switch (info.bfd_arch_info->mach)
1382 case bfd_mach_mn10300:
1383 set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
1384 tdep->am33_mode = 0;
1388 set_gdbarch_register_name (gdbarch, am33_register_name);
1389 tdep->am33_mode = 1;
1392 case bfd_mach_am33_2:
1393 set_gdbarch_register_name (gdbarch, am33_2_register_name);
1394 tdep->am33_mode = 2;
1396 set_gdbarch_fp0_regnum (gdbarch, 32);
1399 internal_error (__FILE__, __LINE__,
1400 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1404 /* By default, chars are unsigned. */
1405 set_gdbarch_char_signed (gdbarch, 0);
1408 set_gdbarch_num_regs (gdbarch, num_regs);
1409 set_gdbarch_register_type (gdbarch, mn10300_register_type);
1410 set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
1411 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1412 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1413 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
1415 /* Stack unwinding. */
1416 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1418 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
1419 mn10300_breakpoint::kind_from_pc);
1420 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
1421 mn10300_breakpoint::bp_from_kind);
1422 /* decr_pc_after_break? */
1425 set_gdbarch_return_value (gdbarch, mn10300_return_value);
1427 /* Stage 3 -- get target calls working. */
1428 set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
1429 /* set_gdbarch_return_value (store, extract) */
1432 mn10300_frame_unwind_init (gdbarch);
1434 /* Hook in ABI-specific overrides, if they have been registered. */
1435 gdbarch_init_osabi (info, gdbarch);
1440 /* Dump out the mn10300 specific architecture information. */
1443 mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
1445 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1446 fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
1451 _initialize_mn10300_tdep (void)
1453 gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);