1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 1996-2016 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
25 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
28 #include "frame-unwind.h"
29 #include "frame-base.h"
31 #include "dwarf2-frame.h"
34 #include "prologue-value.h"
37 #include "mn10300-tdep.h"
40 /* The am33-2 has 64 registers. */
41 #define MN10300_MAX_NUM_REGS 64
43 /* This structure holds the results of a prologue analysis. */
44 struct mn10300_prologue
46 /* The architecture for which we generated this prologue info. */
47 struct gdbarch *gdbarch;
49 /* The offset from the frame base to the stack pointer --- always
52 Calling this a "size" is a bit misleading, but given that the
53 stack grows downwards, using offsets for everything keeps one
54 from going completely sign-crazy: you never change anything's
55 sign for an ADD instruction; always change the second operand's
56 sign for a SUB instruction; and everything takes care of
60 /* Non-zero if this function has initialized the frame pointer from
61 the stack pointer, zero otherwise. */
64 /* If has_frame_ptr is non-zero, this is the offset from the frame
65 base to where the frame pointer points. This is always zero or
69 /* The address of the first instruction at which the frame has been
70 set up and the arguments are where the debug info says they are
71 --- as best as we can tell. */
72 CORE_ADDR prologue_end;
74 /* reg_offset[R] is the offset from the CFA at which register R is
75 saved, or 1 if register R has not been saved. (Real values are
76 always zero or negative.) */
77 int reg_offset[MN10300_MAX_NUM_REGS];
81 /* Compute the alignment required by a type. */
84 mn10300_type_align (struct type *type)
88 switch (TYPE_CODE (type))
99 return TYPE_LENGTH (type);
101 case TYPE_CODE_COMPLEX:
102 return TYPE_LENGTH (type) / 2;
104 case TYPE_CODE_STRUCT:
105 case TYPE_CODE_UNION:
106 for (i = 0; i < TYPE_NFIELDS (type); i++)
108 int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
109 while (align < falign)
114 case TYPE_CODE_ARRAY:
115 /* HACK! Structures containing arrays, even small ones, are not
116 elligible for returning in registers. */
119 case TYPE_CODE_TYPEDEF:
120 return mn10300_type_align (check_typedef (type));
123 internal_error (__FILE__, __LINE__, _("bad switch"));
127 /* Should call_function allocate stack space for a struct return? */
129 mn10300_use_struct_convention (struct type *type)
131 /* Structures bigger than a pair of words can't be returned in
133 if (TYPE_LENGTH (type) > 8)
136 switch (TYPE_CODE (type))
138 case TYPE_CODE_STRUCT:
139 case TYPE_CODE_UNION:
140 /* Structures with a single field are handled as the field
142 if (TYPE_NFIELDS (type) == 1)
143 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
145 /* Structures with word or double-word size are passed in memory, as
146 long as they require at least word alignment. */
147 if (mn10300_type_align (type) >= 4)
152 /* Arrays are addressable, so they're never returned in
153 registers. This condition can only hold when the array is
154 the only field of a struct or union. */
155 case TYPE_CODE_ARRAY:
158 case TYPE_CODE_TYPEDEF:
159 return mn10300_use_struct_convention (check_typedef (type));
167 mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
168 struct regcache *regcache, const gdb_byte *valbuf)
170 int len = TYPE_LENGTH (type);
173 if (TYPE_CODE (type) == TYPE_CODE_PTR)
178 regsz = register_size (gdbarch, reg);
181 regcache_raw_write_part (regcache, reg, 0, len, valbuf);
182 else if (len <= 2 * regsz)
184 regcache_raw_write (regcache, reg, valbuf);
185 gdb_assert (regsz == register_size (gdbarch, reg + 1));
186 regcache_raw_write_part (regcache, reg+1, 0,
187 len - regsz, valbuf + regsz);
190 internal_error (__FILE__, __LINE__,
191 _("Cannot store return value %d bytes long."), len);
195 mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
196 struct regcache *regcache, void *valbuf)
198 gdb_byte buf[MAX_REGISTER_SIZE];
199 int len = TYPE_LENGTH (type);
202 if (TYPE_CODE (type) == TYPE_CODE_PTR)
207 regsz = register_size (gdbarch, reg);
210 regcache_raw_read (regcache, reg, buf);
211 memcpy (valbuf, buf, len);
213 else if (len <= 2 * regsz)
215 regcache_raw_read (regcache, reg, buf);
216 memcpy (valbuf, buf, regsz);
217 gdb_assert (regsz == register_size (gdbarch, reg + 1));
218 regcache_raw_read (regcache, reg + 1, buf);
219 memcpy ((char *) valbuf + regsz, buf, len - regsz);
222 internal_error (__FILE__, __LINE__,
223 _("Cannot extract return value %d bytes long."), len);
226 /* Determine, for architecture GDBARCH, how a return value of TYPE
227 should be returned. If it is supposed to be returned in registers,
228 and READBUF is non-zero, read the appropriate value from REGCACHE,
229 and copy it into READBUF. If WRITEBUF is non-zero, write the value
230 from WRITEBUF into REGCACHE. */
232 static enum return_value_convention
233 mn10300_return_value (struct gdbarch *gdbarch, struct value *function,
234 struct type *type, struct regcache *regcache,
235 gdb_byte *readbuf, const gdb_byte *writebuf)
237 if (mn10300_use_struct_convention (type))
238 return RETURN_VALUE_STRUCT_CONVENTION;
241 mn10300_extract_return_value (gdbarch, type, regcache, readbuf);
243 mn10300_store_return_value (gdbarch, type, regcache, writebuf);
245 return RETURN_VALUE_REGISTER_CONVENTION;
249 register_name (int reg, char **regs, long sizeof_regs)
251 if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
258 mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
260 static char *regs[] =
261 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
262 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
263 "", "", "", "", "", "", "", "",
264 "", "", "", "", "", "", "", "fp"
266 return register_name (reg, regs, sizeof regs);
271 am33_register_name (struct gdbarch *gdbarch, int reg)
273 static char *regs[] =
274 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
275 "sp", "pc", "mdr", "psw", "lir", "lar", "",
276 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
277 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
279 return register_name (reg, regs, sizeof regs);
283 am33_2_register_name (struct gdbarch *gdbarch, int reg)
285 static char *regs[] =
287 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
288 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
289 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
290 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
291 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
292 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
293 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
294 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
296 return register_name (reg, regs, sizeof regs);
300 mn10300_register_type (struct gdbarch *gdbarch, int reg)
302 return builtin_type (gdbarch)->builtin_int;
306 mn10300_read_pc (struct regcache *regcache)
309 regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
314 mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
316 regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
319 /* The breakpoint instruction must be the same size as the smallest
320 instruction in the instruction set.
322 The Matsushita mn10x00 processors have single byte instructions
323 so we need a single byte breakpoint. Matsushita hasn't defined
324 one, so we defined it ourselves. */
325 constexpr gdb_byte mn10300_break_insn[] = {0xff};
327 typedef BP_MANIPULATION (mn10300_break_insn) mn10300_breakpoint;
329 /* Model the semantics of pushing a register onto the stack. This
330 is a helper function for mn10300_analyze_prologue, below. */
332 push_reg (pv_t *regs, struct pv_area *stack, int regnum)
334 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
335 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
338 /* Translate an "r" register number extracted from an instruction encoding
339 into a GDB register number. Adapted from a simulator function
340 of the same name; see am33.igen. */
342 translate_rreg (int rreg)
344 /* The higher register numbers actually correspond to the
345 basic machine's address and data registers. */
346 if (rreg > 7 && rreg < 12)
347 return E_A0_REGNUM + rreg - 8;
348 else if (rreg > 11 && rreg < 16)
349 return E_D0_REGNUM + rreg - 12;
351 return E_E0_REGNUM + rreg;
354 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
356 If VALUE is a saved register, ADDR says it was saved at a constant
357 offset from the frame base, and SIZE indicates that the whole
358 register was saved, record its offset in RESULT_UNTYPED. */
360 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
362 struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped;
364 if (value.kind == pvk_register
366 && pv_is_register (addr, E_SP_REGNUM)
367 && size == register_size (result->gdbarch, value.reg))
368 result->reg_offset[value.reg] = addr.k;
371 /* Analyze the prologue to determine where registers are saved,
372 the end of the prologue, etc. The result of this analysis is
373 returned in RESULT. See struct mn10300_prologue above for more
376 mn10300_analyze_prologue (struct gdbarch *gdbarch,
377 CORE_ADDR start_pc, CORE_ADDR limit_pc,
378 struct mn10300_prologue *result)
380 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
383 pv_t regs[MN10300_MAX_NUM_REGS];
384 struct pv_area *stack;
385 struct cleanup *back_to;
386 CORE_ADDR after_last_frame_setup_insn = start_pc;
387 int am33_mode = AM33_MODE (gdbarch);
389 memset (result, 0, sizeof (*result));
390 result->gdbarch = gdbarch;
392 for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++)
394 regs[rn] = pv_register (rn, 0);
395 result->reg_offset[rn] = 1;
397 stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
398 back_to = make_cleanup_free_pv_area (stack);
400 /* The typical call instruction will have saved the return address on the
401 stack. Space for the return address has already been preallocated in
402 the caller's frame. It's possible, such as when using -mrelax with gcc
403 that other registers were saved as well. If this happens, we really
404 have no chance of deciphering the frame. DWARF info can save the day
405 when this happens. */
406 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
409 while (pc < limit_pc)
414 /* Instructions can be as small as one byte; however, we usually
415 need at least two bytes to do the decoding, so fetch that many
417 status = target_read_memory (pc, instr, 2);
421 /* movm [regs], sp */
422 if (instr[0] == 0xcf)
426 save_mask = instr[1];
428 if ((save_mask & movm_exreg0_bit) && am33_mode)
430 push_reg (regs, stack, E_E2_REGNUM);
431 push_reg (regs, stack, E_E3_REGNUM);
433 if ((save_mask & movm_exreg1_bit) && am33_mode)
435 push_reg (regs, stack, E_E4_REGNUM);
436 push_reg (regs, stack, E_E5_REGNUM);
437 push_reg (regs, stack, E_E6_REGNUM);
438 push_reg (regs, stack, E_E7_REGNUM);
440 if ((save_mask & movm_exother_bit) && am33_mode)
442 push_reg (regs, stack, E_E0_REGNUM);
443 push_reg (regs, stack, E_E1_REGNUM);
444 push_reg (regs, stack, E_MDRQ_REGNUM);
445 push_reg (regs, stack, E_MCRH_REGNUM);
446 push_reg (regs, stack, E_MCRL_REGNUM);
447 push_reg (regs, stack, E_MCVF_REGNUM);
449 if (save_mask & movm_d2_bit)
450 push_reg (regs, stack, E_D2_REGNUM);
451 if (save_mask & movm_d3_bit)
452 push_reg (regs, stack, E_D3_REGNUM);
453 if (save_mask & movm_a2_bit)
454 push_reg (regs, stack, E_A2_REGNUM);
455 if (save_mask & movm_a3_bit)
456 push_reg (regs, stack, E_A3_REGNUM);
457 if (save_mask & movm_other_bit)
459 push_reg (regs, stack, E_D0_REGNUM);
460 push_reg (regs, stack, E_D1_REGNUM);
461 push_reg (regs, stack, E_A0_REGNUM);
462 push_reg (regs, stack, E_A1_REGNUM);
463 push_reg (regs, stack, E_MDR_REGNUM);
464 push_reg (regs, stack, E_LIR_REGNUM);
465 push_reg (regs, stack, E_LAR_REGNUM);
466 /* The `other' bit leaves a blank area of four bytes at
467 the beginning of its block of saved registers, making
468 it 32 bytes long in total. */
469 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
473 after_last_frame_setup_insn = pc;
476 else if ((instr[0] & 0xfc) == 0x3c)
478 int aN = instr[0] & 0x03;
480 regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM];
484 after_last_frame_setup_insn = pc;
487 else if ((instr[0] & 0xf0) == 0x90
488 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
490 int aN = instr[0] & 0x03;
491 int aM = (instr[0] & 0x0c) >> 2;
493 regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM];
498 else if ((instr[0] & 0xf0) == 0x80
499 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
501 int dN = instr[0] & 0x03;
502 int dM = (instr[0] & 0x0c) >> 2;
504 regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM];
509 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0)
511 int dN = instr[1] & 0x03;
512 int aM = (instr[1] & 0x0c) >> 2;
514 regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM];
519 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0)
521 int aN = instr[1] & 0x03;
522 int dM = (instr[1] & 0x0c) >> 2;
524 regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM];
529 else if (instr[0] == 0xf8 && instr[1] == 0xfe)
535 status = target_read_memory (pc + 2, buf, 1);
539 imm8 = extract_signed_integer (buf, 1, byte_order);
540 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8);
543 /* Stack pointer adjustments are frame related. */
544 after_last_frame_setup_insn = pc;
547 else if (instr[0] == 0xfa && instr[1] == 0xfe)
552 status = target_read_memory (pc + 2, buf, 2);
556 imm16 = extract_signed_integer (buf, 2, byte_order);
557 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16);
560 /* Stack pointer adjustments are frame related. */
561 after_last_frame_setup_insn = pc;
564 else if (instr[0] == 0xfc && instr[1] == 0xfe)
569 status = target_read_memory (pc + 2, buf, 4);
574 imm32 = extract_signed_integer (buf, 4, byte_order);
575 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32);
578 /* Stack pointer adjustments are frame related. */
579 after_last_frame_setup_insn = pc;
582 else if ((instr[0] & 0xfc) == 0x20)
587 aN = instr[0] & 0x03;
588 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
590 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
596 else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0)
602 aN = instr[1] & 0x03;
604 status = target_read_memory (pc + 2, buf, 2);
609 imm16 = extract_signed_integer (buf, 2, byte_order);
611 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
617 else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0)
623 aN = instr[1] & 0x03;
625 status = target_read_memory (pc + 2, buf, 4);
629 imm32 = extract_signed_integer (buf, 2, byte_order);
631 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
636 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30)
641 Y = (instr[1] & 0x02) >> 1;
643 status = target_read_memory (pc + 2, buf, 1);
647 sM = (buf[0] & 0xf0) >> 4;
651 pv_area_store (stack, regs[translate_rreg (rN)], 4,
652 regs[E_FS0_REGNUM + fsM]);
657 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34)
662 Y = (instr[1] & 0x02) >> 1;
664 status = target_read_memory (pc + 2, buf, 1);
668 sM = (buf[0] & 0xf0) >> 4;
671 pv_area_store (stack, regs[E_SP_REGNUM], 4,
672 regs[E_FS0_REGNUM + fsM]);
676 /* fmov fsM, (rN, rI) */
677 else if (instr[0] == 0xfb && instr[1] == 0x37)
679 int fsM, sM, Z, rN, rI;
683 status = target_read_memory (pc + 2, buf, 2);
687 rI = (buf[0] & 0xf0) >> 4;
689 sM = (buf[1] & 0xf0) >> 4;
690 Z = (buf[1] & 0x02) >> 1;
693 pv_area_store (stack,
694 pv_add (regs[translate_rreg (rN)],
695 regs[translate_rreg (rI)]),
696 4, regs[E_FS0_REGNUM + fsM]);
700 /* fmov fsM, (d8, rN) */
701 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30)
707 Y = (instr[1] & 0x02) >> 1;
709 status = target_read_memory (pc + 2, buf, 2);
713 sM = (buf[0] & 0xf0) >> 4;
716 d8 = extract_signed_integer (&buf[1], 1, byte_order);
718 pv_area_store (stack,
719 pv_add_constant (regs[translate_rreg (rN)], d8),
720 4, regs[E_FS0_REGNUM + fsM]);
724 /* fmov fsM, (d24, rN) */
725 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30)
731 Y = (instr[1] & 0x02) >> 1;
733 status = target_read_memory (pc + 2, buf, 4);
737 sM = (buf[0] & 0xf0) >> 4;
740 d24 = extract_signed_integer (&buf[1], 3, byte_order);
742 pv_area_store (stack,
743 pv_add_constant (regs[translate_rreg (rN)], d24),
744 4, regs[E_FS0_REGNUM + fsM]);
748 /* fmov fsM, (d32, rN) */
749 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30)
755 Y = (instr[1] & 0x02) >> 1;
757 status = target_read_memory (pc + 2, buf, 5);
761 sM = (buf[0] & 0xf0) >> 4;
764 d32 = extract_signed_integer (&buf[1], 4, byte_order);
766 pv_area_store (stack,
767 pv_add_constant (regs[translate_rreg (rN)], d32),
768 4, regs[E_FS0_REGNUM + fsM]);
772 /* fmov fsM, (d8, SP) */
773 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34)
779 Y = (instr[1] & 0x02) >> 1;
781 status = target_read_memory (pc + 2, buf, 2);
785 sM = (buf[0] & 0xf0) >> 4;
787 d8 = extract_signed_integer (&buf[1], 1, byte_order);
789 pv_area_store (stack,
790 pv_add_constant (regs[E_SP_REGNUM], d8),
791 4, regs[E_FS0_REGNUM + fsM]);
795 /* fmov fsM, (d24, SP) */
796 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34)
802 Y = (instr[1] & 0x02) >> 1;
804 status = target_read_memory (pc + 2, buf, 4);
808 sM = (buf[0] & 0xf0) >> 4;
810 d24 = extract_signed_integer (&buf[1], 3, byte_order);
812 pv_area_store (stack,
813 pv_add_constant (regs[E_SP_REGNUM], d24),
814 4, regs[E_FS0_REGNUM + fsM]);
818 /* fmov fsM, (d32, SP) */
819 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34)
825 Y = (instr[1] & 0x02) >> 1;
827 status = target_read_memory (pc + 2, buf, 5);
831 sM = (buf[0] & 0xf0) >> 4;
833 d32 = extract_signed_integer (&buf[1], 4, byte_order);
835 pv_area_store (stack,
836 pv_add_constant (regs[E_SP_REGNUM], d32),
837 4, regs[E_FS0_REGNUM + fsM]);
841 /* fmov fsM, (rN+) */
842 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31)
844 int fsM, sM, Y, rN, rN_regnum;
847 Y = (instr[1] & 0x02) >> 1;
849 status = target_read_memory (pc + 2, buf, 1);
853 sM = (buf[0] & 0xf0) >> 4;
857 rN_regnum = translate_rreg (rN);
859 pv_area_store (stack, regs[rN_regnum], 4,
860 regs[E_FS0_REGNUM + fsM]);
861 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
865 /* fmov fsM, (rN+, imm8) */
866 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31)
868 int fsM, sM, Y, rN, rN_regnum;
872 Y = (instr[1] & 0x02) >> 1;
874 status = target_read_memory (pc + 2, buf, 2);
878 sM = (buf[0] & 0xf0) >> 4;
881 imm8 = extract_signed_integer (&buf[1], 1, byte_order);
883 rN_regnum = translate_rreg (rN);
885 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
886 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
890 /* fmov fsM, (rN+, imm24) */
891 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31)
893 int fsM, sM, Y, rN, rN_regnum;
897 Y = (instr[1] & 0x02) >> 1;
899 status = target_read_memory (pc + 2, buf, 4);
903 sM = (buf[0] & 0xf0) >> 4;
906 imm24 = extract_signed_integer (&buf[1], 3, byte_order);
908 rN_regnum = translate_rreg (rN);
910 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
911 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
915 /* fmov fsM, (rN+, imm32) */
916 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31)
918 int fsM, sM, Y, rN, rN_regnum;
922 Y = (instr[1] & 0x02) >> 1;
924 status = target_read_memory (pc + 2, buf, 5);
928 sM = (buf[0] & 0xf0) >> 4;
931 imm32 = extract_signed_integer (&buf[1], 4, byte_order);
933 rN_regnum = translate_rreg (rN);
935 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
936 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
941 else if ((instr[0] & 0xf0) == 0x90)
943 int aN = instr[0] & 0x03;
946 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
948 regs[E_A0_REGNUM + aN] = pv_constant (imm8);
952 else if ((instr[0] & 0xfc) == 0x24)
954 int aN = instr[0] & 0x03;
958 status = target_read_memory (pc + 1, buf, 2);
962 imm16 = extract_signed_integer (buf, 2, byte_order);
963 regs[E_A0_REGNUM + aN] = pv_constant (imm16);
967 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc))
969 int aN = instr[1] & 0x03;
973 status = target_read_memory (pc + 2, buf, 4);
977 imm32 = extract_signed_integer (buf, 4, byte_order);
978 regs[E_A0_REGNUM + aN] = pv_constant (imm32);
982 else if ((instr[0] & 0xf0) == 0x80)
984 int dN = instr[0] & 0x03;
987 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
989 regs[E_D0_REGNUM + dN] = pv_constant (imm8);
993 else if ((instr[0] & 0xfc) == 0x2c)
995 int dN = instr[0] & 0x03;
999 status = target_read_memory (pc + 1, buf, 2);
1003 imm16 = extract_signed_integer (buf, 2, byte_order);
1004 regs[E_D0_REGNUM + dN] = pv_constant (imm16);
1008 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc))
1010 int dN = instr[1] & 0x03;
1014 status = target_read_memory (pc + 2, buf, 4);
1018 imm32 = extract_signed_integer (buf, 4, byte_order);
1019 regs[E_D0_REGNUM + dN] = pv_constant (imm32);
1024 /* We've hit some instruction that we don't recognize. Hopefully,
1025 we have enough to do prologue analysis. */
1030 /* Is the frame size (offset, really) a known constant? */
1031 if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM))
1032 result->frame_size = regs[E_SP_REGNUM].k;
1034 /* Was the frame pointer initialized? */
1035 if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM))
1037 result->has_frame_ptr = 1;
1038 result->frame_ptr_offset = regs[E_A3_REGNUM].k;
1041 /* Record where all the registers were saved. */
1042 pv_area_scan (stack, check_for_saved, (void *) result);
1044 result->prologue_end = after_last_frame_setup_insn;
1046 do_cleanups (back_to);
1049 /* Function: skip_prologue
1050 Return the address of the first inst past the prologue of the function. */
1053 mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1056 CORE_ADDR func_addr, func_end;
1057 struct mn10300_prologue p;
1059 /* Try to find the extent of the function that contains PC. */
1060 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
1063 mn10300_analyze_prologue (gdbarch, pc, func_end, &p);
1064 return p.prologue_end;
1067 /* Wrapper for mn10300_analyze_prologue: find the function start;
1068 use the current frame PC as the limit, then
1069 invoke mn10300_analyze_prologue and return its result. */
1070 static struct mn10300_prologue *
1071 mn10300_analyze_frame_prologue (struct frame_info *this_frame,
1072 void **this_prologue_cache)
1074 if (!*this_prologue_cache)
1076 CORE_ADDR func_start, stop_addr;
1078 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue);
1080 func_start = get_frame_func (this_frame);
1081 stop_addr = get_frame_pc (this_frame);
1083 /* If we couldn't find any function containing the PC, then
1084 just initialize the prologue cache, but don't do anything. */
1086 stop_addr = func_start;
1088 mn10300_analyze_prologue (get_frame_arch (this_frame),
1089 func_start, stop_addr,
1090 ((struct mn10300_prologue *)
1091 *this_prologue_cache));
1094 return (struct mn10300_prologue *) *this_prologue_cache;
1097 /* Given the next frame and a prologue cache, return this frame's
1100 mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
1102 struct mn10300_prologue *p
1103 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1105 /* In functions that use alloca, the distance between the stack
1106 pointer and the frame base varies dynamically, so we can't use
1107 the SP plus static information like prologue analysis to find the
1108 frame base. However, such functions must have a frame pointer,
1109 to be able to restore the SP on exit. So whenever we do have a
1110 frame pointer, use that to find the base. */
1111 if (p->has_frame_ptr)
1113 CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM);
1114 return fp - p->frame_ptr_offset;
1118 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1119 return sp - p->frame_size;
1123 /* Here is a dummy implementation. */
1124 static struct frame_id
1125 mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1127 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1128 CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM);
1129 return frame_id_build (sp, pc);
1133 mn10300_frame_this_id (struct frame_info *this_frame,
1134 void **this_prologue_cache,
1135 struct frame_id *this_id)
1137 *this_id = frame_id_build (mn10300_frame_base (this_frame,
1138 this_prologue_cache),
1139 get_frame_func (this_frame));
1143 static struct value *
1144 mn10300_frame_prev_register (struct frame_info *this_frame,
1145 void **this_prologue_cache, int regnum)
1147 struct mn10300_prologue *p
1148 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1149 CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache);
1151 if (regnum == E_SP_REGNUM)
1152 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1154 /* If prologue analysis says we saved this register somewhere,
1155 return a description of the stack slot holding it. */
1156 if (p->reg_offset[regnum] != 1)
1157 return frame_unwind_got_memory (this_frame, regnum,
1158 frame_base + p->reg_offset[regnum]);
1160 /* Otherwise, presume we haven't changed the value of this
1161 register, and get it from the next frame. */
1162 return frame_unwind_got_register (this_frame, regnum, regnum);
1165 static const struct frame_unwind mn10300_frame_unwind = {
1167 default_frame_unwind_stop_reason,
1168 mn10300_frame_this_id,
1169 mn10300_frame_prev_register,
1171 default_frame_sniffer
1175 mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame)
1179 pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM);
1184 mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
1188 sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM);
1193 mn10300_frame_unwind_init (struct gdbarch *gdbarch)
1195 dwarf2_append_unwinders (gdbarch);
1196 frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind);
1197 set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id);
1198 set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc);
1199 set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp);
1202 /* Function: push_dummy_call
1204 * Set up machine state for a target call, including
1205 * function arguments, stack, return address, etc.
1210 mn10300_push_dummy_call (struct gdbarch *gdbarch,
1211 struct value *target_func,
1212 struct regcache *regcache,
1214 int nargs, struct value **args,
1217 CORE_ADDR struct_addr)
1219 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1220 const int push_size = register_size (gdbarch, E_PC_REGNUM);
1223 int stack_offset = 0;
1225 const gdb_byte *val;
1226 gdb_byte valbuf[MAX_REGISTER_SIZE];
1228 /* This should be a nop, but align the stack just in case something
1229 went wrong. Stacks are four byte aligned on the mn10300. */
1232 /* Now make space on the stack for the args.
1234 XXX This doesn't appear to handle pass-by-invisible reference
1236 regs_used = struct_return ? 1 : 0;
1237 for (len = 0, argnum = 0; argnum < nargs; argnum++)
1239 arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
1240 while (regs_used < 2 && arg_len > 0)
1243 arg_len -= push_size;
1248 /* Allocate stack space. */
1254 regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
1259 /* Push all arguments onto the stack. */
1260 for (argnum = 0; argnum < nargs; argnum++)
1262 /* FIXME what about structs? Unions? */
1263 if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
1264 && TYPE_LENGTH (value_type (*args)) > 8)
1266 /* Change to pointer-to-type. */
1267 arg_len = push_size;
1268 store_unsigned_integer (valbuf, push_size, byte_order,
1269 value_address (*args));
1274 arg_len = TYPE_LENGTH (value_type (*args));
1275 val = value_contents (*args);
1278 while (regs_used < 2 && arg_len > 0)
1280 regcache_cooked_write_unsigned (regcache, regs_used,
1281 extract_unsigned_integer (val, push_size, byte_order));
1283 arg_len -= push_size;
1289 write_memory (sp + stack_offset, val, push_size);
1290 arg_len -= push_size;
1292 stack_offset += push_size;
1298 /* Make space for the flushback area. */
1301 /* Push the return address that contains the magic breakpoint. */
1303 write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr);
1305 /* The CPU also writes the return address always into the
1306 MDR register on "call". */
1307 regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr);
1310 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
1312 /* On the mn10300, it's possible to move some of the stack adjustment
1313 and saving of the caller-save registers out of the prologue and
1314 into the call sites. (When using gcc, this optimization can
1315 occur when using the -mrelax switch.) If this occurs, the dwarf2
1316 info will reflect this fact. We can test to see if this is the
1317 case by creating a new frame using the current stack pointer and
1318 the address of the function that we're about to call. We then
1319 unwind SP and see if it's different than the SP of our newly
1320 created frame. If the SP values are the same, the caller is not
1321 expected to allocate any additional stack. On the other hand, if
1322 the SP values are different, the difference determines the
1323 additional stack that must be allocated.
1325 Note that we don't update the return value though because that's
1326 the value of the stack just after pushing the arguments, but prior
1327 to performing the call. This value is needed in order to
1328 construct the frame ID of the dummy call. */
1330 CORE_ADDR func_addr = find_function_addr (target_func, NULL);
1331 CORE_ADDR unwound_sp
1332 = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
1333 if (sp != unwound_sp)
1334 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
1335 sp - (unwound_sp - sp));
1341 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1342 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1343 register number. Why don't Dwarf2 and GDB use the same numbering?
1344 Who knows? But since people have object files lying around with
1345 the existing Dwarf2 numbering, and other people have written stubs
1346 to work with the existing GDB, neither of them can change. So we
1347 just have to cope. */
1349 mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2)
1351 /* This table is supposed to be shaped like the gdbarch_register_name
1352 initializer in gcc/config/mn10300/mn10300.h. Registers which
1353 appear in GCC's numbering, but have no counterpart in GDB's
1354 world, are marked with a -1. */
1355 static int dwarf2_to_gdb[] = {
1356 E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM,
1357 E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM,
1360 E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM,
1361 E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM,
1363 E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3,
1364 E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7,
1366 E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11,
1367 E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15,
1369 E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19,
1370 E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23,
1372 E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27,
1373 E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31,
1375 E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM
1379 || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
1382 return dwarf2_to_gdb[dwarf2];
1385 static struct gdbarch *
1386 mn10300_gdbarch_init (struct gdbarch_info info,
1387 struct gdbarch_list *arches)
1389 struct gdbarch *gdbarch;
1390 struct gdbarch_tdep *tdep;
1393 arches = gdbarch_list_lookup_by_info (arches, &info);
1395 return arches->gdbarch;
1397 tdep = XNEW (struct gdbarch_tdep);
1398 gdbarch = gdbarch_alloc (&info, tdep);
1400 switch (info.bfd_arch_info->mach)
1403 case bfd_mach_mn10300:
1404 set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
1405 tdep->am33_mode = 0;
1409 set_gdbarch_register_name (gdbarch, am33_register_name);
1410 tdep->am33_mode = 1;
1413 case bfd_mach_am33_2:
1414 set_gdbarch_register_name (gdbarch, am33_2_register_name);
1415 tdep->am33_mode = 2;
1417 set_gdbarch_fp0_regnum (gdbarch, 32);
1420 internal_error (__FILE__, __LINE__,
1421 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1425 /* By default, chars are unsigned. */
1426 set_gdbarch_char_signed (gdbarch, 0);
1429 set_gdbarch_num_regs (gdbarch, num_regs);
1430 set_gdbarch_register_type (gdbarch, mn10300_register_type);
1431 set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
1432 set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
1433 set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
1434 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1435 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1436 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
1438 /* Stack unwinding. */
1439 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1441 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
1442 mn10300_breakpoint::kind_from_pc);
1443 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
1444 mn10300_breakpoint::bp_from_kind);
1445 /* decr_pc_after_break? */
1447 set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
1450 set_gdbarch_return_value (gdbarch, mn10300_return_value);
1452 /* Stage 3 -- get target calls working. */
1453 set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
1454 /* set_gdbarch_return_value (store, extract) */
1457 mn10300_frame_unwind_init (gdbarch);
1459 /* Hook in ABI-specific overrides, if they have been registered. */
1460 gdbarch_init_osabi (info, gdbarch);
1465 /* Dump out the mn10300 specific architecture information. */
1468 mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
1470 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1471 fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
1475 /* Provide a prototype to silence -Wmissing-prototypes. */
1476 extern initialize_file_ftype _initialize_mn10300_tdep;
1479 _initialize_mn10300_tdep (void)
1481 gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);