1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2013 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "solib-svr4.h"
25 #include "mips-tdep.h"
26 #include "gdb_string.h"
27 #include "gdb_assert.h"
30 #include "trad-frame.h"
31 #include "tramp-frame.h"
35 #include "solib-svr4.h"
38 #include "target-descriptions.h"
40 #include "mips-linux-tdep.h"
41 #include "glibc-tdep.h"
42 #include "linux-tdep.h"
43 #include "xml-syscall.h"
44 #include "gdb_signals.h"
46 static struct target_so_ops mips_svr4_so_ops;
48 /* This enum represents the signals' numbers on the MIPS
49 architecture. It just contains the signal definitions which are
50 different from the generic implementation.
52 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
53 from the Linux kernel tree. */
57 MIPS_LINUX_SIGEMT = 7,
58 MIPS_LINUX_SIGBUS = 10,
59 MIPS_LINUX_SIGSYS = 12,
60 MIPS_LINUX_SIGUSR1 = 16,
61 MIPS_LINUX_SIGUSR2 = 17,
62 MIPS_LINUX_SIGCHLD = 18,
63 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD,
64 MIPS_LINUX_SIGPWR = 19,
65 MIPS_LINUX_SIGWINCH = 20,
66 MIPS_LINUX_SIGURG = 21,
67 MIPS_LINUX_SIGIO = 22,
68 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO,
69 MIPS_LINUX_SIGSTOP = 23,
70 MIPS_LINUX_SIGTSTP = 24,
71 MIPS_LINUX_SIGCONT = 25,
72 MIPS_LINUX_SIGTTIN = 26,
73 MIPS_LINUX_SIGTTOU = 27,
74 MIPS_LINUX_SIGVTALRM = 28,
75 MIPS_LINUX_SIGPROF = 29,
76 MIPS_LINUX_SIGXCPU = 30,
77 MIPS_LINUX_SIGXFSZ = 31,
79 MIPS_LINUX_SIGRTMIN = 32,
80 MIPS_LINUX_SIGRT64 = 64,
81 MIPS_LINUX_SIGRTMAX = 127,
84 /* Figure out where the longjmp will land.
85 We expect the first arg to be a pointer to the jmp_buf structure
86 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
87 at. The pc is copied into PC. This routine returns 1 on
90 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
91 #define MIPS_LINUX_JB_PC 0
94 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
97 struct gdbarch *gdbarch = get_frame_arch (frame);
98 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
99 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
101 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
103 if (target_read_memory ((jb_addr
104 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
105 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
108 *pc = extract_unsigned_integer (buf,
109 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
115 /* Transform the bits comprising a 32-bit register to the right size
116 for regcache_raw_supply(). This is needed when mips_isa_regsize()
120 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
122 struct gdbarch *gdbarch = get_regcache_arch (regcache);
123 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
124 gdb_byte buf[MAX_REGISTER_SIZE];
125 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
126 extract_signed_integer (addr, 4, byte_order));
127 regcache_raw_supply (regcache, regnum, buf);
130 /* Unpack an elf_gregset_t into GDB's register cache. */
133 mips_supply_gregset (struct regcache *regcache,
134 const mips_elf_gregset_t *gregsetp)
137 const mips_elf_greg_t *regp = *gregsetp;
138 char zerobuf[MAX_REGISTER_SIZE];
139 struct gdbarch *gdbarch = get_regcache_arch (regcache);
141 memset (zerobuf, 0, MAX_REGISTER_SIZE);
143 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
144 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
146 if (mips_linux_restart_reg_p (gdbarch))
147 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
149 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
150 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
152 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
154 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
155 regp + EF_CP0_BADVADDR);
156 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
157 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
158 regp + EF_CP0_CAUSE);
160 /* Fill the inaccessible zero register with zero. */
161 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
165 mips_supply_gregset_wrapper (const struct regset *regset,
166 struct regcache *regcache,
167 int regnum, const void *gregs, size_t len)
169 gdb_assert (len == sizeof (mips_elf_gregset_t));
171 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
174 /* Pack our registers (or one register) into an elf_gregset_t. */
177 mips_fill_gregset (const struct regcache *regcache,
178 mips_elf_gregset_t *gregsetp, int regno)
180 struct gdbarch *gdbarch = get_regcache_arch (regcache);
182 mips_elf_greg_t *regp = *gregsetp;
187 memset (regp, 0, sizeof (mips_elf_gregset_t));
188 for (regi = 1; regi < 32; regi++)
189 mips_fill_gregset (regcache, gregsetp, regi);
190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
191 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
192 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
193 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
194 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
195 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
196 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
200 if (regno > 0 && regno < 32)
202 dst = regp + regno + EF_REG0;
203 regcache_raw_collect (regcache, regno, dst);
207 if (regno == mips_regnum (gdbarch)->lo)
209 else if (regno == mips_regnum (gdbarch)->hi)
211 else if (regno == mips_regnum (gdbarch)->pc)
212 regaddr = EF_CP0_EPC;
213 else if (regno == mips_regnum (gdbarch)->badvaddr)
214 regaddr = EF_CP0_BADVADDR;
215 else if (regno == MIPS_PS_REGNUM)
216 regaddr = EF_CP0_STATUS;
217 else if (regno == mips_regnum (gdbarch)->cause)
218 regaddr = EF_CP0_CAUSE;
219 else if (mips_linux_restart_reg_p (gdbarch)
220 && regno == MIPS_RESTART_REGNUM)
227 dst = regp + regaddr;
228 regcache_raw_collect (regcache, regno, dst);
233 mips_fill_gregset_wrapper (const struct regset *regset,
234 const struct regcache *regcache,
235 int regnum, void *gregs, size_t len)
237 gdb_assert (len == sizeof (mips_elf_gregset_t));
239 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
242 /* Likewise, unpack an elf_fpregset_t. */
245 mips_supply_fpregset (struct regcache *regcache,
246 const mips_elf_fpregset_t *fpregsetp)
248 struct gdbarch *gdbarch = get_regcache_arch (regcache);
250 char zerobuf[MAX_REGISTER_SIZE];
252 memset (zerobuf, 0, MAX_REGISTER_SIZE);
254 for (regi = 0; regi < 32; regi++)
255 regcache_raw_supply (regcache,
256 gdbarch_fp0_regnum (gdbarch) + regi,
259 regcache_raw_supply (regcache,
260 mips_regnum (gdbarch)->fp_control_status,
263 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
264 regcache_raw_supply (regcache,
265 mips_regnum (gdbarch)->fp_implementation_revision,
270 mips_supply_fpregset_wrapper (const struct regset *regset,
271 struct regcache *regcache,
272 int regnum, const void *gregs, size_t len)
274 gdb_assert (len == sizeof (mips_elf_fpregset_t));
276 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs);
279 /* Likewise, pack one or all floating point registers into an
283 mips_fill_fpregset (const struct regcache *regcache,
284 mips_elf_fpregset_t *fpregsetp, int regno)
286 struct gdbarch *gdbarch = get_regcache_arch (regcache);
289 if ((regno >= gdbarch_fp0_regnum (gdbarch))
290 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
292 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
293 regcache_raw_collect (regcache, regno, to);
295 else if (regno == mips_regnum (gdbarch)->fp_control_status)
297 to = (char *) (*fpregsetp + 32);
298 regcache_raw_collect (regcache, regno, to);
300 else if (regno == -1)
304 for (regi = 0; regi < 32; regi++)
305 mips_fill_fpregset (regcache, fpregsetp,
306 gdbarch_fp0_regnum (gdbarch) + regi);
307 mips_fill_fpregset (regcache, fpregsetp,
308 mips_regnum (gdbarch)->fp_control_status);
313 mips_fill_fpregset_wrapper (const struct regset *regset,
314 const struct regcache *regcache,
315 int regnum, void *gregs, size_t len)
317 gdb_assert (len == sizeof (mips_elf_fpregset_t));
319 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum);
322 /* Support for 64-bit ABIs. */
324 /* Figure out where the longjmp will land.
325 We expect the first arg to be a pointer to the jmp_buf structure
326 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
327 at. The pc is copied into PC. This routine returns 1 on
330 /* Details about jmp_buf. */
332 #define MIPS64_LINUX_JB_PC 0
335 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
338 struct gdbarch *gdbarch = get_frame_arch (frame);
339 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
340 void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
341 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
343 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
345 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
347 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
350 *pc = extract_unsigned_integer (buf,
351 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
357 /* Register set support functions. These operate on standard 64-bit
358 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
359 target will still use the 64-bit format for PTRACE_GETREGS. */
361 /* Supply a 64-bit register. */
364 supply_64bit_reg (struct regcache *regcache, int regnum,
367 struct gdbarch *gdbarch = get_regcache_arch (regcache);
368 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
369 && register_size (gdbarch, regnum) == 4)
370 regcache_raw_supply (regcache, regnum, buf + 4);
372 regcache_raw_supply (regcache, regnum, buf);
375 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
378 mips64_supply_gregset (struct regcache *regcache,
379 const mips64_elf_gregset_t *gregsetp)
382 const mips64_elf_greg_t *regp = *gregsetp;
383 gdb_byte zerobuf[MAX_REGISTER_SIZE];
384 struct gdbarch *gdbarch = get_regcache_arch (regcache);
386 memset (zerobuf, 0, MAX_REGISTER_SIZE);
388 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
389 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
390 (const gdb_byte *) (regp + regi));
392 if (mips_linux_restart_reg_p (gdbarch))
393 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
394 (const gdb_byte *) (regp + MIPS64_EF_REG0));
396 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
397 (const gdb_byte *) (regp + MIPS64_EF_LO));
398 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
399 (const gdb_byte *) (regp + MIPS64_EF_HI));
401 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
402 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
403 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
404 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
405 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
406 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
407 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
408 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
410 /* Fill the inaccessible zero register with zero. */
411 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
415 mips64_supply_gregset_wrapper (const struct regset *regset,
416 struct regcache *regcache,
417 int regnum, const void *gregs, size_t len)
419 gdb_assert (len == sizeof (mips64_elf_gregset_t));
421 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
424 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
427 mips64_fill_gregset (const struct regcache *regcache,
428 mips64_elf_gregset_t *gregsetp, int regno)
430 struct gdbarch *gdbarch = get_regcache_arch (regcache);
431 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
433 mips64_elf_greg_t *regp = *gregsetp;
438 memset (regp, 0, sizeof (mips64_elf_gregset_t));
439 for (regi = 1; regi < 32; regi++)
440 mips64_fill_gregset (regcache, gregsetp, regi);
441 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
442 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
443 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
444 mips64_fill_gregset (regcache, gregsetp,
445 mips_regnum (gdbarch)->badvaddr);
446 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
447 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
448 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
452 if (regno > 0 && regno < 32)
453 regaddr = regno + MIPS64_EF_REG0;
454 else if (regno == mips_regnum (gdbarch)->lo)
455 regaddr = MIPS64_EF_LO;
456 else if (regno == mips_regnum (gdbarch)->hi)
457 regaddr = MIPS64_EF_HI;
458 else if (regno == mips_regnum (gdbarch)->pc)
459 regaddr = MIPS64_EF_CP0_EPC;
460 else if (regno == mips_regnum (gdbarch)->badvaddr)
461 regaddr = MIPS64_EF_CP0_BADVADDR;
462 else if (regno == MIPS_PS_REGNUM)
463 regaddr = MIPS64_EF_CP0_STATUS;
464 else if (regno == mips_regnum (gdbarch)->cause)
465 regaddr = MIPS64_EF_CP0_CAUSE;
466 else if (mips_linux_restart_reg_p (gdbarch)
467 && regno == MIPS_RESTART_REGNUM)
468 regaddr = MIPS64_EF_REG0;
474 gdb_byte buf[MAX_REGISTER_SIZE];
477 regcache_raw_collect (regcache, regno, buf);
478 val = extract_signed_integer (buf, register_size (gdbarch, regno),
480 dst = regp + regaddr;
481 store_signed_integer (dst, 8, byte_order, val);
486 mips64_fill_gregset_wrapper (const struct regset *regset,
487 const struct regcache *regcache,
488 int regnum, void *gregs, size_t len)
490 gdb_assert (len == sizeof (mips64_elf_gregset_t));
492 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
495 /* Likewise, unpack an elf_fpregset_t. */
498 mips64_supply_fpregset (struct regcache *regcache,
499 const mips64_elf_fpregset_t *fpregsetp)
501 struct gdbarch *gdbarch = get_regcache_arch (regcache);
504 /* See mips_linux_o32_sigframe_init for a description of the
505 peculiar FP register layout. */
506 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
507 for (regi = 0; regi < 32; regi++)
509 const gdb_byte *reg_ptr
510 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
511 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
513 regcache_raw_supply (regcache,
514 gdbarch_fp0_regnum (gdbarch) + regi,
518 for (regi = 0; regi < 32; regi++)
519 regcache_raw_supply (regcache,
520 gdbarch_fp0_regnum (gdbarch) + regi,
521 (const char *) (*fpregsetp + regi));
523 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
524 (const gdb_byte *) (*fpregsetp + 32));
526 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
527 include it - but the result of PTRACE_GETFPREGS does. The best we
528 can do is to assume that its value is present. */
529 supply_32bit_reg (regcache,
530 mips_regnum (gdbarch)->fp_implementation_revision,
531 (const gdb_byte *) (*fpregsetp + 32) + 4);
535 mips64_supply_fpregset_wrapper (const struct regset *regset,
536 struct regcache *regcache,
537 int regnum, const void *gregs, size_t len)
539 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
541 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
544 /* Likewise, pack one or all floating point registers into an
548 mips64_fill_fpregset (const struct regcache *regcache,
549 mips64_elf_fpregset_t *fpregsetp, int regno)
551 struct gdbarch *gdbarch = get_regcache_arch (regcache);
552 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
555 if ((regno >= gdbarch_fp0_regnum (gdbarch))
556 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
558 /* See mips_linux_o32_sigframe_init for a description of the
559 peculiar FP register layout. */
560 if (register_size (gdbarch, regno) == 4)
562 int regi = regno - gdbarch_fp0_regnum (gdbarch);
564 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
565 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
567 regcache_raw_collect (regcache, regno, to);
571 to = (gdb_byte *) (*fpregsetp + regno
572 - gdbarch_fp0_regnum (gdbarch));
573 regcache_raw_collect (regcache, regno, to);
576 else if (regno == mips_regnum (gdbarch)->fp_control_status)
578 gdb_byte buf[MAX_REGISTER_SIZE];
581 regcache_raw_collect (regcache, regno, buf);
582 val = extract_signed_integer (buf, register_size (gdbarch, regno),
584 to = (gdb_byte *) (*fpregsetp + 32);
585 store_signed_integer (to, 4, byte_order, val);
587 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
589 gdb_byte buf[MAX_REGISTER_SIZE];
592 regcache_raw_collect (regcache, regno, buf);
593 val = extract_signed_integer (buf, register_size (gdbarch, regno),
595 to = (gdb_byte *) (*fpregsetp + 32) + 4;
596 store_signed_integer (to, 4, byte_order, val);
598 else if (regno == -1)
602 for (regi = 0; regi < 32; regi++)
603 mips64_fill_fpregset (regcache, fpregsetp,
604 gdbarch_fp0_regnum (gdbarch) + regi);
605 mips64_fill_fpregset (regcache, fpregsetp,
606 mips_regnum (gdbarch)->fp_control_status);
607 mips64_fill_fpregset (regcache, fpregsetp,
608 mips_regnum (gdbarch)->fp_implementation_revision);
613 mips64_fill_fpregset_wrapper (const struct regset *regset,
614 const struct regcache *regcache,
615 int regnum, void *gregs, size_t len)
617 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
619 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
622 static const struct regset *
623 mips_linux_regset_from_core_section (struct gdbarch *gdbarch,
624 const char *sect_name, size_t sect_size)
626 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
627 mips_elf_gregset_t gregset;
628 mips_elf_fpregset_t fpregset;
629 mips64_elf_gregset_t gregset64;
630 mips64_elf_fpregset_t fpregset64;
632 if (strcmp (sect_name, ".reg") == 0)
634 if (sect_size == sizeof (gregset))
636 if (tdep->gregset == NULL)
637 tdep->gregset = regset_alloc (gdbarch,
638 mips_supply_gregset_wrapper,
639 mips_fill_gregset_wrapper);
640 return tdep->gregset;
642 else if (sect_size == sizeof (gregset64))
644 if (tdep->gregset64 == NULL)
645 tdep->gregset64 = regset_alloc (gdbarch,
646 mips64_supply_gregset_wrapper,
647 mips64_fill_gregset_wrapper);
648 return tdep->gregset64;
652 warning (_("wrong size gregset struct in core file"));
655 else if (strcmp (sect_name, ".reg2") == 0)
657 if (sect_size == sizeof (fpregset))
659 if (tdep->fpregset == NULL)
660 tdep->fpregset = regset_alloc (gdbarch,
661 mips_supply_fpregset_wrapper,
662 mips_fill_fpregset_wrapper);
663 return tdep->fpregset;
665 else if (sect_size == sizeof (fpregset64))
667 if (tdep->fpregset64 == NULL)
668 tdep->fpregset64 = regset_alloc (gdbarch,
669 mips64_supply_fpregset_wrapper,
670 mips64_fill_fpregset_wrapper);
671 return tdep->fpregset64;
675 warning (_("wrong size fpregset struct in core file"));
682 static const struct target_desc *
683 mips_linux_core_read_description (struct gdbarch *gdbarch,
684 struct target_ops *target,
687 asection *section = bfd_get_section_by_name (abfd, ".reg");
691 switch (bfd_section_size (abfd, section))
693 case sizeof (mips_elf_gregset_t):
694 return mips_tdesc_gp32;
696 case sizeof (mips64_elf_gregset_t):
697 return mips_tdesc_gp64;
705 /* Check the code at PC for a dynamic linker lazy resolution stub.
706 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
707 section uniformly since version 2.15. If the pc is in that section,
708 then we are in such a stub. Before that ".stub" was used in 32-bit
709 ELF binaries, however we do not bother checking for that since we
710 have never had and that case should be extremely rare these days.
711 Instead we pattern-match on the code generated by GNU ld. They look
719 (with the appropriate doubleword instructions for N64). As any lazy
720 resolution stubs in microMIPS binaries will always be in a
721 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
724 mips_linux_in_dynsym_stub (CORE_ADDR pc)
726 gdb_byte buf[28], *p;
727 ULONGEST insn, insn1;
728 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64);
729 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
731 if (in_mips_stubs_section (pc))
734 read_memory (pc - 12, buf, 28);
738 /* ld t9,0x8010(gp) */
743 /* lw t9,0x8010(gp) */
750 insn = extract_unsigned_integer (p, 4, byte_order);
758 insn = extract_unsigned_integer (p + 4, 4, byte_order);
762 if (insn != 0x03e0782d)
768 if (insn != 0x03e07821)
772 insn = extract_unsigned_integer (p + 8, 4, byte_order);
774 if (insn != 0x0320f809)
777 insn = extract_unsigned_integer (p + 12, 4, byte_order);
780 /* daddiu t8,zero,0 */
781 if ((insn & 0xffff0000) != 0x64180000)
786 /* addiu t8,zero,0 */
787 if ((insn & 0xffff0000) != 0x24180000)
794 /* Return non-zero iff PC belongs to the dynamic linker resolution
795 code, a PLT entry, or a lazy binding stub. */
798 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
800 /* Check whether PC is in the dynamic linker. This also checks
801 whether it is in the .plt section, used by non-PIC executables. */
802 if (svr4_in_dynsym_resolve_code (pc))
805 /* Likewise for the stubs. They live in the .MIPS.stubs section these
806 days, so we check if the PC is within, than fall back to a pattern
808 if (mips_linux_in_dynsym_stub (pc))
814 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
815 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
816 implementation of this triggers at "fixup" from the same objfile as
817 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
818 "__dl_runtime_resolve" directly. An unresolved lazy binding
819 stub will point to _dl_runtime_resolve, which will first call
820 __dl_runtime_resolve, and then pass control to the resolved
824 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
826 struct minimal_symbol *resolver;
828 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
830 if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
831 return frame_unwind_caller_pc (get_current_frame ());
833 return glibc_skip_solib_resolver (gdbarch, pc);
836 /* Signal trampoline support. There are four supported layouts for a
837 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
838 n64 rt_sigframe. We handle them all independently; not the most
839 efficient way, but simplest. First, declare all the unwinders. */
841 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
842 struct frame_info *this_frame,
843 struct trad_frame_cache *this_cache,
846 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
847 struct frame_info *this_frame,
848 struct trad_frame_cache *this_cache,
851 #define MIPS_NR_LINUX 4000
852 #define MIPS_NR_N64_LINUX 5000
853 #define MIPS_NR_N32_LINUX 6000
855 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
856 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
857 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
858 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
860 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
861 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
862 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
863 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
864 #define MIPS_INST_SYSCALL 0x0000000c
866 static const struct tramp_frame mips_linux_o32_sigframe = {
870 { MIPS_INST_LI_V0_SIGRETURN, -1 },
871 { MIPS_INST_SYSCALL, -1 },
872 { TRAMP_SENTINEL_INSN, -1 }
874 mips_linux_o32_sigframe_init
877 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
881 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
882 { MIPS_INST_SYSCALL, -1 },
883 { TRAMP_SENTINEL_INSN, -1 } },
884 mips_linux_o32_sigframe_init
887 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
891 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
892 { MIPS_INST_SYSCALL, -1 },
893 { TRAMP_SENTINEL_INSN, -1 }
895 mips_linux_n32n64_sigframe_init
898 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
902 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
903 { MIPS_INST_SYSCALL, -1 },
904 { TRAMP_SENTINEL_INSN, -1 }
906 mips_linux_n32n64_sigframe_init
910 /* The unwinder for o32 signal frames. The legacy structures look
914 u32 sf_ass[4]; [argument save space for o32]
915 u32 sf_code[2]; [signal trampoline or fill]
916 struct sigcontext sf_sc;
920 Pre-2.6.12 sigcontext:
923 unsigned int sc_regmask; [Unused]
924 unsigned int sc_status;
925 unsigned long long sc_pc;
926 unsigned long long sc_regs[32];
927 unsigned long long sc_fpregs[32];
928 unsigned int sc_ownedfp;
929 unsigned int sc_fpc_csr;
930 unsigned int sc_fpc_eir; [Unused]
931 unsigned int sc_used_math;
932 unsigned int sc_ssflags; [Unused]
933 [Alignment hole of four bytes]
934 unsigned long long sc_mdhi;
935 unsigned long long sc_mdlo;
937 unsigned int sc_cause; [Unused]
938 unsigned int sc_badvaddr; [Unused]
940 unsigned long sc_sigset[4]; [kernel's sigset_t]
943 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
946 unsigned int sc_regmask; [Unused]
947 unsigned int sc_status; [Unused]
948 unsigned long long sc_pc;
949 unsigned long long sc_regs[32];
950 unsigned long long sc_fpregs[32];
952 unsigned int sc_fpc_csr;
953 unsigned int sc_fpc_eir; [Unused]
954 unsigned int sc_used_math;
956 [Alignment hole of four bytes]
957 unsigned long long sc_mdhi;
958 unsigned long long sc_mdlo;
959 unsigned long sc_hi1;
960 unsigned long sc_lo1;
961 unsigned long sc_hi2;
962 unsigned long sc_lo2;
963 unsigned long sc_hi3;
964 unsigned long sc_lo3;
967 The RT signal frames look like this:
970 u32 rs_ass[4]; [argument save space for o32]
971 u32 rs_code[2] [signal trampoline or fill]
972 struct siginfo rs_info;
973 struct ucontext rs_uc;
977 unsigned long uc_flags;
978 struct ucontext *uc_link;
980 [Alignment hole of four bytes]
981 struct sigcontext uc_mcontext;
986 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
988 #define RTSIGFRAME_SIGINFO_SIZE 128
989 #define STACK_T_SIZE (3 * 4)
990 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
991 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
992 + RTSIGFRAME_SIGINFO_SIZE \
993 + UCONTEXT_SIGCONTEXT_OFFSET)
995 #define SIGCONTEXT_PC (1 * 8)
996 #define SIGCONTEXT_REGS (2 * 8)
997 #define SIGCONTEXT_FPREGS (34 * 8)
998 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
999 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
1000 #define SIGCONTEXT_HI (69 * 8)
1001 #define SIGCONTEXT_LO (70 * 8)
1002 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
1003 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
1004 #define SIGCONTEXT_HI1 (71 * 8 + 0)
1005 #define SIGCONTEXT_LO1 (71 * 8 + 4)
1006 #define SIGCONTEXT_HI2 (72 * 8 + 0)
1007 #define SIGCONTEXT_LO2 (72 * 8 + 4)
1008 #define SIGCONTEXT_HI3 (73 * 8 + 0)
1009 #define SIGCONTEXT_LO3 (73 * 8 + 4)
1011 #define SIGCONTEXT_REG_SIZE 8
1014 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
1015 struct frame_info *this_frame,
1016 struct trad_frame_cache *this_cache,
1019 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1021 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1022 CORE_ADDR sigcontext_base;
1023 const struct mips_regnum *regs = mips_regnum (gdbarch);
1024 CORE_ADDR regs_base;
1026 if (self == &mips_linux_o32_sigframe)
1027 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
1029 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
1031 /* I'm not proud of this hack. Eventually we will have the
1032 infrastructure to indicate the size of saved registers on a
1033 per-frame basis, but right now we don't; the kernel saves eight
1034 bytes but we only want four. Use regs_base to access any
1036 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1037 regs_base = sigcontext_base + 4;
1039 regs_base = sigcontext_base;
1041 if (mips_linux_restart_reg_p (gdbarch))
1042 trad_frame_set_reg_addr (this_cache,
1043 (MIPS_RESTART_REGNUM
1044 + gdbarch_num_regs (gdbarch)),
1045 regs_base + SIGCONTEXT_REGS);
1047 for (ireg = 1; ireg < 32; ireg++)
1048 trad_frame_set_reg_addr (this_cache,
1049 (ireg + MIPS_ZERO_REGNUM
1050 + gdbarch_num_regs (gdbarch)),
1051 (regs_base + SIGCONTEXT_REGS
1052 + ireg * SIGCONTEXT_REG_SIZE));
1054 /* The way that floating point registers are saved, unfortunately,
1055 depends on the architecture the kernel is built for. For the r3000 and
1056 tx39, four bytes of each register are at the beginning of each of the
1057 32 eight byte slots. For everything else, the registers are saved
1058 using double precision; only the even-numbered slots are initialized,
1059 and the high bits are the odd-numbered register. Assume the latter
1060 layout, since we can't tell, and it's much more common. Which bits are
1061 the "high" bits depends on endianness. */
1062 for (ireg = 0; ireg < 32; ireg++)
1063 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
1064 trad_frame_set_reg_addr (this_cache,
1065 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1066 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1067 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1069 trad_frame_set_reg_addr (this_cache,
1070 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1071 (sigcontext_base + SIGCONTEXT_FPREGS
1072 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1074 trad_frame_set_reg_addr (this_cache,
1075 regs->pc + gdbarch_num_regs (gdbarch),
1076 regs_base + SIGCONTEXT_PC);
1078 trad_frame_set_reg_addr (this_cache,
1079 (regs->fp_control_status
1080 + gdbarch_num_regs (gdbarch)),
1081 sigcontext_base + SIGCONTEXT_FPCSR);
1083 if (regs->dspctl != -1)
1084 trad_frame_set_reg_addr (this_cache,
1085 regs->dspctl + gdbarch_num_regs (gdbarch),
1086 sigcontext_base + SIGCONTEXT_DSPCTL);
1088 trad_frame_set_reg_addr (this_cache,
1089 regs->hi + gdbarch_num_regs (gdbarch),
1090 regs_base + SIGCONTEXT_HI);
1091 trad_frame_set_reg_addr (this_cache,
1092 regs->lo + gdbarch_num_regs (gdbarch),
1093 regs_base + SIGCONTEXT_LO);
1095 if (regs->dspacc != -1)
1097 trad_frame_set_reg_addr (this_cache,
1098 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1099 sigcontext_base + SIGCONTEXT_HI1);
1100 trad_frame_set_reg_addr (this_cache,
1101 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1102 sigcontext_base + SIGCONTEXT_LO1);
1103 trad_frame_set_reg_addr (this_cache,
1104 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1105 sigcontext_base + SIGCONTEXT_HI2);
1106 trad_frame_set_reg_addr (this_cache,
1107 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1108 sigcontext_base + SIGCONTEXT_LO2);
1109 trad_frame_set_reg_addr (this_cache,
1110 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1111 sigcontext_base + SIGCONTEXT_HI3);
1112 trad_frame_set_reg_addr (this_cache,
1113 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1114 sigcontext_base + SIGCONTEXT_LO3);
1118 trad_frame_set_reg_addr (this_cache,
1119 regs->cause + gdbarch_num_regs (gdbarch),
1120 sigcontext_base + SIGCONTEXT_CAUSE);
1121 trad_frame_set_reg_addr (this_cache,
1122 regs->badvaddr + gdbarch_num_regs (gdbarch),
1123 sigcontext_base + SIGCONTEXT_BADVADDR);
1126 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1127 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1131 /* For N32/N64 things look different. There is no non-rt signal frame.
1133 struct rt_sigframe_n32 {
1134 u32 rs_ass[4]; [ argument save space for o32 ]
1135 u32 rs_code[2]; [ signal trampoline or fill ]
1136 struct siginfo rs_info;
1137 struct ucontextn32 rs_uc;
1140 struct ucontextn32 {
1144 struct sigcontext uc_mcontext;
1145 sigset_t uc_sigmask; [ mask last for extensibility ]
1148 struct rt_sigframe {
1149 u32 rs_ass[4]; [ argument save space for o32 ]
1150 u32 rs_code[2]; [ signal trampoline ]
1151 struct siginfo rs_info;
1152 struct ucontext rs_uc;
1156 unsigned long uc_flags;
1157 struct ucontext *uc_link;
1159 struct sigcontext uc_mcontext;
1160 sigset_t uc_sigmask; [ mask last for extensibility ]
1163 And the sigcontext is different (this is for both n32 and n64):
1166 unsigned long long sc_regs[32];
1167 unsigned long long sc_fpregs[32];
1168 unsigned long long sc_mdhi;
1169 unsigned long long sc_hi1;
1170 unsigned long long sc_hi2;
1171 unsigned long long sc_hi3;
1172 unsigned long long sc_mdlo;
1173 unsigned long long sc_lo1;
1174 unsigned long long sc_lo2;
1175 unsigned long long sc_lo3;
1176 unsigned long long sc_pc;
1177 unsigned int sc_fpc_csr;
1178 unsigned int sc_used_math;
1179 unsigned int sc_dsp;
1180 unsigned int sc_reserved;
1183 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1184 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1188 #define N32_STACK_T_SIZE STACK_T_SIZE
1189 #define N64_STACK_T_SIZE (2 * 8 + 4)
1190 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1191 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1192 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1193 + RTSIGFRAME_SIGINFO_SIZE \
1194 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1195 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1196 + RTSIGFRAME_SIGINFO_SIZE \
1197 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1199 #define N64_SIGCONTEXT_REGS (0 * 8)
1200 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1201 #define N64_SIGCONTEXT_HI (64 * 8)
1202 #define N64_SIGCONTEXT_HI1 (65 * 8)
1203 #define N64_SIGCONTEXT_HI2 (66 * 8)
1204 #define N64_SIGCONTEXT_HI3 (67 * 8)
1205 #define N64_SIGCONTEXT_LO (68 * 8)
1206 #define N64_SIGCONTEXT_LO1 (69 * 8)
1207 #define N64_SIGCONTEXT_LO2 (70 * 8)
1208 #define N64_SIGCONTEXT_LO3 (71 * 8)
1209 #define N64_SIGCONTEXT_PC (72 * 8)
1210 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1211 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1213 #define N64_SIGCONTEXT_REG_SIZE 8
1216 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1217 struct frame_info *this_frame,
1218 struct trad_frame_cache *this_cache,
1221 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1223 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1224 CORE_ADDR sigcontext_base;
1225 const struct mips_regnum *regs = mips_regnum (gdbarch);
1227 if (self == &mips_linux_n32_rt_sigframe)
1228 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
1230 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
1232 if (mips_linux_restart_reg_p (gdbarch))
1233 trad_frame_set_reg_addr (this_cache,
1234 (MIPS_RESTART_REGNUM
1235 + gdbarch_num_regs (gdbarch)),
1236 sigcontext_base + N64_SIGCONTEXT_REGS);
1238 for (ireg = 1; ireg < 32; ireg++)
1239 trad_frame_set_reg_addr (this_cache,
1240 (ireg + MIPS_ZERO_REGNUM
1241 + gdbarch_num_regs (gdbarch)),
1242 (sigcontext_base + N64_SIGCONTEXT_REGS
1243 + ireg * N64_SIGCONTEXT_REG_SIZE));
1245 for (ireg = 0; ireg < 32; ireg++)
1246 trad_frame_set_reg_addr (this_cache,
1247 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1248 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1249 + ireg * N64_SIGCONTEXT_REG_SIZE));
1251 trad_frame_set_reg_addr (this_cache,
1252 regs->pc + gdbarch_num_regs (gdbarch),
1253 sigcontext_base + N64_SIGCONTEXT_PC);
1255 trad_frame_set_reg_addr (this_cache,
1256 (regs->fp_control_status
1257 + gdbarch_num_regs (gdbarch)),
1258 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1260 trad_frame_set_reg_addr (this_cache,
1261 regs->hi + gdbarch_num_regs (gdbarch),
1262 sigcontext_base + N64_SIGCONTEXT_HI);
1263 trad_frame_set_reg_addr (this_cache,
1264 regs->lo + gdbarch_num_regs (gdbarch),
1265 sigcontext_base + N64_SIGCONTEXT_LO);
1267 if (regs->dspacc != -1)
1269 trad_frame_set_reg_addr (this_cache,
1270 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1271 sigcontext_base + N64_SIGCONTEXT_HI1);
1272 trad_frame_set_reg_addr (this_cache,
1273 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1274 sigcontext_base + N64_SIGCONTEXT_LO1);
1275 trad_frame_set_reg_addr (this_cache,
1276 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1277 sigcontext_base + N64_SIGCONTEXT_HI2);
1278 trad_frame_set_reg_addr (this_cache,
1279 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1280 sigcontext_base + N64_SIGCONTEXT_LO2);
1281 trad_frame_set_reg_addr (this_cache,
1282 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1283 sigcontext_base + N64_SIGCONTEXT_HI3);
1284 trad_frame_set_reg_addr (this_cache,
1285 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1286 sigcontext_base + N64_SIGCONTEXT_LO3);
1288 if (regs->dspctl != -1)
1289 trad_frame_set_reg_addr (this_cache,
1290 regs->dspctl + gdbarch_num_regs (gdbarch),
1291 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1293 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1294 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1297 /* Implement the "write_pc" gdbarch method. */
1300 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1302 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1304 mips_write_pc (regcache, pc);
1306 /* Clear the syscall restart flag. */
1307 if (mips_linux_restart_reg_p (gdbarch))
1308 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1311 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1314 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1316 /* If we do not have a target description with registers, then
1317 MIPS_RESTART_REGNUM will not be included in the register set. */
1318 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1321 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1322 either be GPR-sized or missing. */
1323 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1326 /* When FRAME is at a syscall instruction, return the PC of the next
1327 instruction to be executed. */
1330 mips_linux_syscall_next_pc (struct frame_info *frame)
1332 CORE_ADDR pc = get_frame_pc (frame);
1333 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1335 /* If we are about to make a sigreturn syscall, use the unwinder to
1336 decode the signal frame. */
1337 if (v0 == MIPS_NR_sigreturn
1338 || v0 == MIPS_NR_rt_sigreturn
1339 || v0 == MIPS_NR_N64_rt_sigreturn
1340 || v0 == MIPS_NR_N32_rt_sigreturn)
1341 return frame_unwind_caller_pc (get_current_frame ());
1346 /* Return the current system call's number present in the
1347 v0 register. When the function fails, it returns -1. */
1350 mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1353 struct regcache *regcache = get_thread_regcache (ptid);
1354 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1355 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1356 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1357 /* The content of a register */
1362 /* Make sure we're in a known ABI */
1363 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1364 || tdep->mips_abi == MIPS_ABI_N32
1365 || tdep->mips_abi == MIPS_ABI_N64);
1367 gdb_assert (regsize <= sizeof (buf));
1369 /* Getting the system call number from the register.
1370 syscall number is in v0 or $2. */
1371 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf);
1373 ret = extract_signed_integer (buf, regsize, byte_order);
1378 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1382 mips_gdb_signal_to_target (struct gdbarch *gdbarch,
1383 enum gdb_signal signal)
1387 case GDB_SIGNAL_EMT:
1388 return MIPS_LINUX_SIGEMT;
1390 case GDB_SIGNAL_BUS:
1391 return MIPS_LINUX_SIGBUS;
1393 case GDB_SIGNAL_SYS:
1394 return MIPS_LINUX_SIGSYS;
1396 case GDB_SIGNAL_USR1:
1397 return MIPS_LINUX_SIGUSR1;
1399 case GDB_SIGNAL_USR2:
1400 return MIPS_LINUX_SIGUSR2;
1402 case GDB_SIGNAL_CHLD:
1403 return MIPS_LINUX_SIGCHLD;
1405 case GDB_SIGNAL_PWR:
1406 return MIPS_LINUX_SIGPWR;
1408 case GDB_SIGNAL_WINCH:
1409 return MIPS_LINUX_SIGWINCH;
1411 case GDB_SIGNAL_URG:
1412 return MIPS_LINUX_SIGURG;
1415 return MIPS_LINUX_SIGIO;
1417 case GDB_SIGNAL_POLL:
1418 return MIPS_LINUX_SIGPOLL;
1420 case GDB_SIGNAL_STOP:
1421 return MIPS_LINUX_SIGSTOP;
1423 case GDB_SIGNAL_TSTP:
1424 return MIPS_LINUX_SIGTSTP;
1426 case GDB_SIGNAL_CONT:
1427 return MIPS_LINUX_SIGCONT;
1429 case GDB_SIGNAL_TTIN:
1430 return MIPS_LINUX_SIGTTIN;
1432 case GDB_SIGNAL_TTOU:
1433 return MIPS_LINUX_SIGTTOU;
1435 case GDB_SIGNAL_VTALRM:
1436 return MIPS_LINUX_SIGVTALRM;
1438 case GDB_SIGNAL_PROF:
1439 return MIPS_LINUX_SIGPROF;
1441 case GDB_SIGNAL_XCPU:
1442 return MIPS_LINUX_SIGXCPU;
1444 case GDB_SIGNAL_XFSZ:
1445 return MIPS_LINUX_SIGXFSZ;
1447 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1448 therefore we have to handle it here. */
1449 case GDB_SIGNAL_REALTIME_32:
1450 return MIPS_LINUX_SIGRTMIN;
1453 if (signal >= GDB_SIGNAL_REALTIME_33
1454 && signal <= GDB_SIGNAL_REALTIME_63)
1456 int offset = signal - GDB_SIGNAL_REALTIME_33;
1458 return MIPS_LINUX_SIGRTMIN + 1 + offset;
1460 else if (signal >= GDB_SIGNAL_REALTIME_64
1461 && signal <= GDB_SIGNAL_REALTIME_127)
1463 int offset = signal - GDB_SIGNAL_REALTIME_64;
1465 return MIPS_LINUX_SIGRT64 + offset;
1468 return linux_gdb_signal_to_target (gdbarch, signal);
1471 /* Translate signals based on MIPS signal values.
1472 Adapted from gdb/common/signals.c. */
1474 static enum gdb_signal
1475 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal)
1479 case MIPS_LINUX_SIGEMT:
1480 return GDB_SIGNAL_EMT;
1482 case MIPS_LINUX_SIGBUS:
1483 return GDB_SIGNAL_BUS;
1485 case MIPS_LINUX_SIGSYS:
1486 return GDB_SIGNAL_SYS;
1488 case MIPS_LINUX_SIGUSR1:
1489 return GDB_SIGNAL_USR1;
1491 case MIPS_LINUX_SIGUSR2:
1492 return GDB_SIGNAL_USR2;
1494 case MIPS_LINUX_SIGCHLD:
1495 return GDB_SIGNAL_CHLD;
1497 case MIPS_LINUX_SIGPWR:
1498 return GDB_SIGNAL_PWR;
1500 case MIPS_LINUX_SIGWINCH:
1501 return GDB_SIGNAL_WINCH;
1503 case MIPS_LINUX_SIGURG:
1504 return GDB_SIGNAL_URG;
1506 /* No way to differentiate between SIGIO and SIGPOLL.
1507 Therefore, we just handle the first one. */
1508 case MIPS_LINUX_SIGIO:
1509 return GDB_SIGNAL_IO;
1511 case MIPS_LINUX_SIGSTOP:
1512 return GDB_SIGNAL_STOP;
1514 case MIPS_LINUX_SIGTSTP:
1515 return GDB_SIGNAL_TSTP;
1517 case MIPS_LINUX_SIGCONT:
1518 return GDB_SIGNAL_CONT;
1520 case MIPS_LINUX_SIGTTIN:
1521 return GDB_SIGNAL_TTIN;
1523 case MIPS_LINUX_SIGTTOU:
1524 return GDB_SIGNAL_TTOU;
1526 case MIPS_LINUX_SIGVTALRM:
1527 return GDB_SIGNAL_VTALRM;
1529 case MIPS_LINUX_SIGPROF:
1530 return GDB_SIGNAL_PROF;
1532 case MIPS_LINUX_SIGXCPU:
1533 return GDB_SIGNAL_XCPU;
1535 case MIPS_LINUX_SIGXFSZ:
1536 return GDB_SIGNAL_XFSZ;
1539 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX)
1541 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1542 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
1543 int offset = signal - MIPS_LINUX_SIGRTMIN;
1546 return GDB_SIGNAL_REALTIME_32;
1547 else if (offset < 32)
1548 return (enum gdb_signal) (offset - 1
1549 + (int) GDB_SIGNAL_REALTIME_33);
1551 return (enum gdb_signal) (offset - 32
1552 + (int) GDB_SIGNAL_REALTIME_64);
1555 return linux_gdb_signal_from_target (gdbarch, signal);
1558 /* Initialize one of the GNU/Linux OS ABIs. */
1561 mips_linux_init_abi (struct gdbarch_info info,
1562 struct gdbarch *gdbarch)
1564 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1565 enum mips_abi abi = mips_abi (gdbarch);
1566 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
1568 linux_init_abi (info, gdbarch);
1570 /* Get the syscall number from the arch's register. */
1571 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1576 set_gdbarch_get_longjmp_target (gdbarch,
1577 mips_linux_get_longjmp_target);
1578 set_solib_svr4_fetch_link_map_offsets
1579 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1580 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1581 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1582 set_xml_syscall_file_name ("syscalls/mips-o32-linux.xml");
1585 set_gdbarch_get_longjmp_target (gdbarch,
1586 mips_linux_get_longjmp_target);
1587 set_solib_svr4_fetch_link_map_offsets
1588 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1589 set_gdbarch_long_double_bit (gdbarch, 128);
1590 /* These floatformats should probably be renamed. MIPS uses
1591 the same 128-bit IEEE floating point format that IA-64 uses,
1592 except that the quiet/signalling NaN bit is reversed (GDB
1593 does not distinguish between quiet and signalling NaNs). */
1594 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1595 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1596 set_xml_syscall_file_name ("syscalls/mips-n32-linux.xml");
1599 set_gdbarch_get_longjmp_target (gdbarch,
1600 mips64_linux_get_longjmp_target);
1601 set_solib_svr4_fetch_link_map_offsets
1602 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1603 set_gdbarch_long_double_bit (gdbarch, 128);
1604 /* These floatformats should probably be renamed. MIPS uses
1605 the same 128-bit IEEE floating point format that IA-64 uses,
1606 except that the quiet/signalling NaN bit is reversed (GDB
1607 does not distinguish between quiet and signalling NaNs). */
1608 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1609 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1610 set_xml_syscall_file_name ("syscalls/mips-n64-linux.xml");
1616 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1618 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1620 /* Enable TLS support. */
1621 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1622 svr4_fetch_objfile_link_map);
1624 /* Initialize this lazily, to avoid an initialization order
1625 dependency on solib-svr4.c's _initialize routine. */
1626 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1628 mips_svr4_so_ops = svr4_so_ops;
1629 mips_svr4_so_ops.in_dynsym_resolve_code
1630 = mips_linux_in_dynsym_resolve_code;
1632 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1634 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1636 set_gdbarch_core_read_description (gdbarch,
1637 mips_linux_core_read_description);
1639 set_gdbarch_regset_from_core_section (gdbarch,
1640 mips_linux_regset_from_core_section);
1642 set_gdbarch_gdb_signal_from_target (gdbarch,
1643 mips_gdb_signal_from_target);
1645 set_gdbarch_gdb_signal_to_target (gdbarch,
1646 mips_gdb_signal_to_target);
1648 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1652 const struct tdesc_feature *feature;
1654 /* If we have target-described registers, then we can safely
1655 reserve a number for MIPS_RESTART_REGNUM (whether it is
1656 described or not). */
1657 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1658 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1659 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1661 /* If it's present, then assign it to the reserved number. */
1662 feature = tdesc_find_feature (info.target_desc,
1663 "org.gnu.gdb.mips.linux");
1664 if (feature != NULL)
1665 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1670 /* Provide a prototype to silence -Wmissing-prototypes. */
1671 extern initialize_file_ftype _initialize_mips_linux_tdep;
1674 _initialize_mips_linux_tdep (void)
1676 const struct bfd_arch_info *arch_info;
1678 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1680 arch_info = arch_info->next)
1682 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1684 mips_linux_init_abi);